Gated diode-based true random number generator with information encryption

Abstract

To provide a true random number generator for realizing information encryption by generating a random bit by a stochastic switching operation through a feedback loop phenomenon in a channel region of a gate diode, and controlling a generation probability of the random bit through control of voltage application.SOLUTION: The true random number generator 300 includes a gated diode 301 and a control transistor 302. The gated diode includes a p + - i-n + diode structure disposed between a drain and a source, a gate oxide layer disposed on an intrinsic region of the p + - i-n + diode structure, and a first gate and a second gate disposed on the gate oxide layer. The control transistor includes a control drain terminal connected to the source, a control gate terminal, and a control source terminal, and controls electron injection into the p + - i-n + diode structure by controlling a gate voltage applied through the control gate terminal.SELECTED DRAWING: Figure 3A

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of priority based on Korean Patent Application No. 10-2024-0095589, filed on July 19, 2024, the entire contents of which are incorporated herein by reference.

[0002] The present invention relates to a gated diode-based true random number generator capable of encrypting information, and more specifically to a technology for providing a true random number generator that generates random bits by stochastic switching operation through a feedback loop phenomenon in the channel region of a gated diode, while controlling the probability of random bit generation through control of voltage application, thereby realizing information encryption. [Background technology]

[0003] As the Internet of Things (IoT) has become more commonplace, edge devices such as smartphones have become authentication hubs for financial transactions, uploading personal information, and other purposes, making security technology on edge devices increasingly important.

[0004] In particular, random number generators (RNGs) have attracted much attention because they generate security keys, which are the basis of security technology.

[0005] Random number generators can generally be divided into two categories: pseudo random number generators (PRNGs) and true random number generators (TRNGs).

[0006] Among these, pseudo-random number generators that use mathematical algorithms are vulnerable to security due to their deterministic nature that requires an initial seed.

[0007] On the other hand, a true random number generator uses physical probabilistic properties and is therefore impossible to copy, thereby increasing the security level.

[0008] Conventional technologies that use the randomness of non-silicon channel materials, such as ferroelectric random-access memory (FeRAM), resistive RAM (ReRAM), and magnetic RAM (MRAM), require peripheral circuitry to convert the entropy source into random bits.

[0009] Furthermore, the uniformity and stability of the device deteriorates, and CMOS processes cannot be applied, making it difficult to put into practical use.

[0010] True random number generator technology, which uses noise generated in circuits such as SRAM metastability and ring oscillator (RO) jitter, has the advantage of being easily fabricated using a CMOS process and capable of generating stable random bit strings in hardware.

[0011] However, the metastable method of SRAM generally requires post-processing, and in the case of ring oscillator jitter, multiple ring oscillator stages and some digital circuits are required, so the circuit area occupied by the implemented true random number generator is very large, and there are limitations in terms of integration level and energy consumption.

[0012] In an attempt to reduce the noise source to a single element in a circuit, a true random number generator technique using random telegraph noise (RTN) generated by a single MOSFET element has been developed.

[0013] However, there are limitations in that the result of RTN appears as a current of several hundred nA or more, which requires additional circuitry to amplify this, and post-processing is required to eliminate bias in the output signal.

[0014] Recently, true random number generator technology has been developed in Fin-FET devices that does not require post-processing due to randomness generated by impact ionization.

[0015] This has not overcome the limitation of requiring an amplification and sampling circuit to convert voltage fluctuations occurring in the hundreds of millivolts into random bits.

[0016] To ensure high quality randomness, techniques have been developed that utilize the properties of non-silicon channel materials, such as filament formation, spin flip, and polarization.

[0017] However, the small fluctuation range of a few hundred millivolts requires an amplification process using comparators and sense amplifiers, and in some cases an additional extraction step to convert the entropy source into random bits.

[0018] For example, if a stochastic delay is used as the entropy source, it is compared with a clock signal using an AND gate, and the random bit sequence is measured using a counter circuit.

[0019] Therefore, an additional auxiliary circuit is required, but the uniformity and stability of the device is reduced and a CMOS process cannot be applied, which is expected to make large-scale mass production difficult.

[0020] Therefore, there is a need to develop true random number generator technology that can be applied to CMOS processes, has excellent element stability, and can generate random bit strings without complex additional circuitry using gated pin diodes that independently amplify random fluctuations. Summary of the Invention [Problem to be solved by the invention]

[0021] The present invention aims to provide a true random number generator that generates random bits by stochastic switching operation through a feedback loop phenomenon in the channel region of a gated diode, but controls the probability of random bit generation through control of applied voltage, thereby achieving information encryption.

[0022] The present invention aims to realize a true random number generator that generates random bit strings with a simple structure without requiring complex additional circuits, by utilizing a gate diode that amplifies random fluctuation characteristics by utilizing a feedback loop process in the channel region.

[0023] The present invention aims to realize probabilistic computing by controlling the probability of random bit strings in a true random number generator through the application of voltage.

[0024] The present invention aims to realize PUF (physical unclonable function) technology by stably generating random numbers through a gated diode-based true random number generator using a CMOS process to generate a random bit string that is physically unclonable. [Means for solving the problem]

[0025] The gated diode-based true random number generator according to one embodiment of the present invention has a p + -in + The diode structure is located + -in + A gated diode is formed by a gate insulating film on an intrinsic region of a diode structure and two gate terminals on the gate insulating film. A control drain terminal is connected to the source terminal, and the gated diode is composed of a control gate terminal and a control source terminal together with the control drain terminal. A gate voltage V applied through the control gate terminal is applied to the gate insulating film. MOS By controlling + -in +and a control transistor for controlling electron injection into the diode structure, wherein the gated diode is configured to control the intrinsic region to be n-channel based on different voltages applied via the two gate terminals. * Channel region and p * While one of the channel regions is changed, a potential barrier is formed in the intrinsic region by electrostatic doping, and a feedback loop, either a positive feedback loop or a negative feedback loop, associated with the formed potential barrier is randomly formed by fluctuations in electron injection based on the controlled electron injection, thereby outputting a random bit.

[0026] The gated diode has a p between a first gate terminal of the two gate terminals and the drain terminal. + When a positive voltage is applied to the first gate terminal, the region under the first gate terminal in the intrinsic region becomes n * a second gate terminal of the two gate terminals and the source terminal; + When a negative voltage is applied to the second gate terminal, the region under the second gate terminal in the intrinsic region becomes p * It may be included as a channel region.

[0027] The gate diode forms a positive feedback loop when the injected electrons based on the controlled electron injection are greater than a reference electron for forming a positive feedback loop in which the current latches up, and when the injected electrons are smaller than the reference electron, a negative feedback loop phenomenon in which the positive feedback loop is not formed is repeated, and the current may fluctuate randomly just before the latch-up.

[0028] The gated diode receives a drain supply voltage through the drain terminal, and generates and outputs a positive bit ("1") when the positive feedback loop is formed in relation to a first gate voltage pulse and a second gate voltage pulse applied through the first gate terminal and the second gate terminal of the two gate terminals, and generates a negative bit ("0") when the negative feedback loop is formed.

[0029] The control transistor is + -in + A stochastic region within the intrinsic region of the gated diode can be induced by controlling electron injection into the diode structure.

[0030] The gated diode receives a drain supply voltage through the drain terminal, and randomly determines an output voltage in response to a first gate voltage pulse and a second gate voltage pulse applied through the first and second gate terminals of the two gate terminals, thereby randomly outputting either a positive bit ("1") or a negative bit ("0").

[0031] The height of the potential barrier of the gated diode can be controlled by adjusting the voltage applied via the second gate terminal, and the probability of a positive feedback loop being formed can be controlled based on the controlled height of the potential barrier.

[0032] When the voltage applied through the second gate terminal of the gate diode increases, the height of the potential barrier decreases, increasing the probability of outputting the positive bit ('1'), and when the voltage applied through the second gate terminal decreases, the height of the potential barrier increases, increasing the probability of outputting the negative bit ('0').

[0033] The output random bits are composed of a random bit string, converted into an image format based on pixel information based on binary data, and generated as a security key. The generated security key can then be used to XOR encrypt the original image, thereby converting it into encrypted data.

[0034] The encrypted data is encrypted in the form of a random noise image and can only be decrypted with the generated security key. [Effects of the Invention]

[0035] The present invention provides a true random number generator that generates random bits through stochastic switching operations via a feedback loop phenomenon in the channel region of a gated diode, but controls the probability of random bit generation through voltage application control, thereby enabling information encryption.

[0036] The present invention utilizes a gate diode that amplifies the random fluctuation characteristics by utilizing the feedback loop process in the channel region, thereby realizing a true random number generator that generates random bit strings with a simple structure without requiring any complex additional circuitry.

[0037] The present invention can achieve probabilistic computing by controlling the probability of random bit sequences in a true random number generator through the application of voltages.

[0038] The present invention realizes PUF (physical unclonable function) technology by stably generating random numbers through a gated diode-based true random number generator using a CMOS process and generating a random bit string that is physically unclonable. [Brief explanation of the drawings]

[0039] [Figure 1A]1A and 1B are diagrams illustrating the structure and operational characteristics of gated diodes that constitute a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 1B] 1A and 1B are diagrams illustrating the structure and operational characteristics of gated diodes that constitute a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 2A] FIG. 1 is a diagram illustrating the electrical characteristics of a gated diode that constitutes a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 2B] FIG. 1 is a diagram illustrating the electrical characteristics of a gated diode that constitutes a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 3A] FIG. 1 illustrates a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 3B] FIG. 1 illustrates a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 3C] 1A and 1B are diagrams illustrating the random bit generation principle and results of a gated diode-based true random number generator according to an embodiment of the present invention. [Figure 3D] 1A and 1B are diagrams illustrating the random bit generation principle and results of a gated diode-based true random number generator according to an embodiment of the present invention. [Figure 4A] FIG. 1 illustrates the probability adjustment function of a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 4B] FIG. 1 illustrates the probability adjustment function of a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 5A] 10A and 10B are diagrams illustrating the results of a simulation to verify the randomness of a random bit string generated by a gated diode-based true random number generator according to an embodiment of the present invention. [Figure 5B] 10A and 10B are diagrams illustrating the results of a simulation to verify the randomness of a random bit string generated by a gated diode-based true random number generator according to an embodiment of the present invention. [Figure 6A]FIG. 1 illustrates a gated diode-based true random number generator and its operating characteristics according to one embodiment of the present invention. [Figure 6B] FIG. 1 illustrates a gated diode-based true random number generator and its operating characteristics according to one embodiment of the present invention. [Figure 7A] FIG. 1 is a diagram illustrating information encryption using a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 7B] FIG. 1 is a diagram illustrating information encryption using a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 7C] FIG. 1 is a diagram illustrating information encryption using a gated diode-based true random number generator according to one embodiment of the present invention. [Figure 8] FIG. 1 is a diagram illustrating information encryption using a gated diode-based true random number generator according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0040] Various embodiments of the present document will now be described with reference to the accompanying drawings.

[0041] The examples and the terms used therein are not intended to limit the technology described in this document to a particular embodiment, but should be understood to include various modifications, equivalents, and / or alternatives to the examples.

[0042] When describing various embodiments below, if it is determined that a detailed description of related publicly known functions or configurations may obscure the gist of the invention, the detailed description will be omitted.

[0043] The terms used below are defined in consideration of the functions in various embodiments, and may vary depending on the intentions or practices of users or operators. Therefore, the definitions should be based on the overall content of this specification.

[0044] In connection with the description of the drawings, like reference numerals may be used for like components.

[0045] A singular expression can include a plural expression unless the context clearly indicates otherwise.

[0046] In this document, phrases such as "A or B" or "at least one of A and / or B" may include all possible combinations of the items listed together.

[0047] Expressions such as "first," "second," "initial," or "second" may modify the components in question regardless of order or importance, and are used only to distinguish one component from other components, and do not limit the components in question.

[0048] When a (e.g., first) component is referred to as being "(functionally or communicatively) coupled" or "connected" to another (e.g., second) component, the component may be directly coupled to the other component or may be coupled through another component (e.g., third component).

[0049] As used herein, "configured to" may be used interchangeably with, for example, hardware or software terms such as "suitable for," "capable of," "modified to," "made to," "capable of," or "designed to," depending on the context.

[0050] In some circumstances, the phrase "a device configured to" can mean that the device is "capable of" in conjunction with other devices or components.

[0051] For example, the phrase "a processor configured (or set) to perform A, B, and C" may refer to a processor dedicated to performing those operations (e.g., an embedded processor), or to a general-purpose processor (e.g., a CPU or application processor) that can perform those operations by executing one or more software programs stored in a memory device.

[0052] Also, the term "or" means an inclusive or rather than an exclusive or.

[0053] That is, unless otherwise stated or clear from the context, the phrase "x uses a or b" means any one of the natural inclusive permutations.

[0054] As used below, terms such as "...module" and "...device" refer to a unit that processes at least one function or operation, which may be embodied in hardware, software, or a combination of hardware and software.

[0055] 1A and 1B are diagrams illustrating the structure and operational characteristics of gated diodes that make up a gated diode-based true random number generator according to one embodiment of the present invention.

[0056] FIG. 1A illustrates an optical image of a gated diode that constitutes a gated diode-based true random number generator according to one embodiment of the present invention.

[0057] Referring to FIG. 1A, an optical image 100 shows a gated diode with a polysilicon gate electrode and an oxide silicon gate oxide layer on a buried oxide. + -in + It is surrounded by a silicon nanosheet (NS).

[0058] The width and height of the silicon nanosheet may be 180 nm and 80 nm, respectively, but are not limited to the above values.

[0059] FIG. 1B illustrates a structural diagram of a gated diode that constitutes a gated diode-based true random number generator according to one embodiment of the present invention.

[0060] Referring to FIG. 1B, there is shown a structure 110 of a gated diode constituting a gated diode-based true random number generator according to one embodiment of the present invention, and an operating state 111 depending on a gate voltage applied to the gate electrode.

[0061] In the gated diode structure 110, two polysilicon gate electrodes (first gate and second gate) may be arranged alongside the intrinsic channel with a spacing of 1 μm.

[0062] According to the operating state 111, an anode bias is applied to the first gate and a cathode bias is applied to the second gate, which can induce a potential barrier towards the drain and source regions through n-type and p-type virtual doping in the intrinsic channel.

[0063] In summary, the operating state 111 indicates that when the first gate voltage is applied as a positive voltage and the second gate voltage is applied as a negative voltage, a potential barrier is formed in the channel by electrostatic doping.

[0064] 2A and 2B are diagrams illustrating the electrical characteristics of a gated diode that constitutes a gated diode-based true random number generator according to one embodiment of the present invention.

[0065] FIG. 2A illustrates the output curve of a gated diode in conjunction with the electrical characteristics of the gated diode that constitutes a gated diode-based true random number generator according to one embodiment of the present invention.

[0066] Referring to FIG. 2A, graph 200 shows the first and second gate voltages (V G1 and VG2 ) are 1.5V and -2.0V, respectively, the drain current I D is the drain voltage V of 2.05V. D and shows the typical IV characteristics of a gated diode.

[0067] Drain voltage V D As θ increases, charge carriers are repeatedly injected into the channel and accumulated, which activates a positive feedback loop and immediately collapses the potential barrier.

[0068] On the other hand, the second gate voltage V G2 By changing from -2.0V to -3.0V, the gate diode can confirm that a current fluctuation occurs before latch-up occurs.

[0069] FIG. 2B illustrates the current fluctuations in the transfer curve in relation to the electrical characteristics of the gated diodes that make up a gated diode-based true random number generator according to one embodiment of the present invention.

[0070] Referring to FIG. 2B, a graph 210 shows the relationship between the second gate voltage V G2 When is swept from -1.0V to 0.5V, the drain current I D is the source voltage V of -0.8V. S This clearly shows that latch-up occurs.

[0071] On the other hand, the drain current I D is the source voltage V between -0.7V and -0.5V. S This allows us to see that there was a fluctuation in the range before latchup.

[0072] Second gate voltage V G2 or by increasing the source voltage V S Limiting electron injection, such as by reducing the current, can result in repetitive current fluctuations in the stochastic regime prior to latch-up.

[0073] Insufficient electron injection has been shown to cause current fluctuations when the creation of a positive feedback loop is attempted but interrupted.

[0074] Graphs 200 and 210 show the characteristics of the feedback field effect, where if electron injection is sufficient, positive feedback is formed in the channel and the current latches up, and when electron injection is limited by adjusting the gate or source voltage, the phenomenon of a positive feedback loop attempting to form but then being interrupted is repeated, and the current fluctuates randomly just before latch-up.

[0075] 3A and 3B are diagrams illustrating a gated diode-based true random number generator according to one embodiment of the present invention.

[0076] FIG. 3A illustrates the components of a gated diode-based true random number generator according to one embodiment of the present invention.

[0077] Referring to FIG. 3A, a gated diode-based true random number generator 300 according to one embodiment of the present invention is comprised of a gated diode 301 and a control transistor 302.

[0078] The gated diode 301 is a gated pin diode based on a CMOS process, and the control transistor 302 can be used as a MOSFET.

[0079] The gated diode 301 has a p-type gate between the drain terminal and the source terminal. + -in + The diode structure is located + -in + A gate insulating film is located on the intrinsic region of the diode structure, and two gate terminals are located on the gate insulating film.

[0080] For example, the intrinsic region is p + -in +This can correspond to the i-region of the diode structure.

[0081] The control transistor 302 has a control drain terminal connected to the source terminal of the gate diode 301 .

[0082] The control transistor 302 is configured with a control gate terminal and a control source terminal, as well as a control drain terminal, and is connected to a gate voltage V MOS By controlling + -in + The electron injection into the diode structure can be controlled.

[0083] The gated diode 301 has an intrinsic region that is n-type based on different voltages applied through two gate terminals. * Channel region and p * Electrostatic doping creates a potential barrier in the intrinsic region while altering one of the channel regions.

[0084] Furthermore, the gate diode 301 can output random bits by randomly forming either a positive feedback loop or a negative feedback loop associated with the formed potential barrier due to fluctuations in electron injection based on the controlled electron injection.

[0085] The gated diode 301 has a p-type gate electrode between the first gate terminal and the drain terminal. + When a positive voltage is applied to the first gate terminal, the region under the first gate terminal in the intrinsic region becomes n * Included as a channel region.

[0086] The gate diode 301 has an n-type gate electrode between the second gate terminal of the two gate terminals and the source terminal. + When a negative voltage is applied to the second gate terminal, the region under the second gate terminal in the intrinsic region becomes p* It may be included as a channel region.

[0087] The gate diode 301 forms a positive feedback loop when the electrons injected based on the controlled electron injection are greater than the reference electrons for forming a positive feedback loop in which the current latches up, and when the injected electrons are smaller than the reference electrons, a negative feedback loop phenomenon in which the positive feedback loop is not formed is repeated, and the current can fluctuate randomly just before the latch-up.

[0088] The gate diode 301 receives a drain supply voltage through the drain terminal, and in relation to a first gate voltage pulse and a second gate voltage pulse applied through the first gate terminal and the second gate terminal of the two gate terminals, a positive feedback loop is formed to generate and output a positive bit ("1"), and a negative feedback loop is formed to generate a negative bit ("0"), and outputs a voltage.

[0089] The control transistor 302 is p + -in + A stochastic region within the intrinsic region of the gated diode can be induced by controlling electron injection into the diode structure.

[0090] The gate diode 301 receives a drain supply voltage via the drain terminal, and randomly determines an output voltage in response to a first gate voltage pulse and a second gate voltage pulse applied via the first and second gate terminals of the two gate terminals, thereby randomly outputting either a positive bit ("1") or a negative bit ("0").

[0091] The height of the potential barrier of the gate diode 301 can be controlled by adjusting the voltage applied via the second gate terminal, and the probability of a positive feedback loop being formed can be controlled based on the controlled height of the potential barrier.

[0092] When the voltage applied through the second gate terminal of the gate diode 301 increases, the height of the potential barrier decreases, increasing the probability of outputting a positive bit ("1"), and when the voltage applied through the second gate terminal decreases, the height of the potential barrier increases, increasing the probability of outputting a negative bit ("0").

[0093] Therefore, the present invention can provide a true random number generator that generates random bits by stochastic switching operation through a feedback loop phenomenon in the channel region of a gated diode, but controls the probability of random bit generation through control of voltage application, thereby realizing information encryption.

[0094] FIG. 3B illustrates an optical image of a gated diode-based true random number generator according to one embodiment of the present invention.

[0095] Referring to FIG. 3B, optical image 310 shows one embodiment of the application of gated diodes and control transistors for the operation of a true random number generator.

[0096] 3C and 3D are diagrams illustrating the random bit generation principle and results of a gated diode-based true random number generator according to one embodiment of the present invention.

[0097] FIG. 3C illustrates a timing diagram relating to the random bit generation principle and results of a gated diode-based true random number generator according to one embodiment of the present invention.

[0098] Referring to FIG. 3C, a timing diagram 320 illustrates the output voltage V OUTshows the transient response of a true random number generator that randomly switches between random bits "0" and "1" between -0.5V and 0.5V.

[0099] A true random number generator according to one embodiment of the present invention will give an arbitrary bit sequence of '0011101001101111000111100101001110' in response to the same input pulse.

[0100] The NIST tests (22) presented in Table 1 below are performed to demonstrate the randomness of the TRNG.

[0101] [Table 1]

[0102] FIG. 3D illustrates the random bit generation mechanism for the random bit generation principle and results of a gated diode-based true random number generator according to one embodiment of the present invention.

[0103] Referring to FIG. 3D, a gated diode-based true random number generator according to one embodiment of the present invention utilizes gated diode-induced stochastic switching by adjusting the resistance of a control transistor (n-MOSFET) as an entropy source.

[0104] Gated diodes in the stochastic regime are biased towards positive or negative feedback by random fluctuations in electron injection.

[0105] If electron injection is sufficient in the base state 330, the TRNG exhibits a random bit "1" in the positive state 331, promoted by positive feedback in the gated diode.

[0106] Conversely, if there is insufficient electron injection in the base state 330, the negative feedback 332 in the gated diode causes the true random number generator to exhibit a random bit "0".

[0107] The feedback process activated by the random fluctuations in the stochastic field means that when the number of electrons stored in the channel region under the first gate terminal changes due to fluctuations in electron injection at the source, the height of the potential barrier in the channel region under the second gate terminal changes, which can induce fluctuations in the junction voltage V1 on the drain side.

[0108] Therefore, the variation of the electron current (I n +ΔI n The change in V1 (V1+ΔV1) due to the change in V1 can be derived as shown in Equation 1 below using a pn diode current model.

[0109]

number

[0110] In Equation 1, V T can be expressed as the thermal voltage, and I Rd can be expressed as the recombination current at the drain-side junction, and I sn may be the saturation current of electrons.

[0111] On the other hand, V1 is the forward bias at the drain-side pn junction, which leads to hole injection from the drain.

[0112] Therefore, ΔV1 is the hole current (I p ), which can be summarized as Equation 2 below:

[0113]

number

[0114] In Equation 2, I sp can be used to denote the saturation current of holes, and V biG1 V may represent the potential built into the channel region below the first gate terminal, and V2 may be the central junction voltage.

[0115] Injecting holes into the channel region under the second gate terminal modifies the potential barrier height, inducing a change in the source-side junction voltage V3.

[0116] In the end, I p The changes in V3 and I are as follows: n This can be expressed by the following Equation 3 and Equation 4.

[0117]

number

[0118]

number

[0119] In Equation 3 and Equation 4, I Rs can be used to denote the recombination current at the source junction, and V biG2 may be a potential built into the channel region below the second gate terminal.

[0120] In gated diodes, random fluctuations ΔI n But, I n and I p This is repeatedly fed back.

[0121] A small increase in electron injection near the threshold gradually increases both electron and hole injection, activating a positive feedback loop.

[0122] Therefore, the generation-recombination current can be made to a negligible level.

[0123] Conversely, a slight decrease in electron injection can induce a negative feedback loop that prevents carrier injection.

[0124] The total current of the gate diode can be summarized by the following Equation 5.

[0125]

number

[0126] In Equation 5, I Rs can be used to denote the recombination current at the source junction, and V biG2 may be the built-in potential in the channel region under the second gate terminal, and I sp can be used to denote the saturation current of holes, and V biG1 V can denote the built-in potential in the channel region under the first gate terminal, V2 can denote the central junction voltage, and V T can be expressed as the thermal voltage, and I Rd can be expressed as the recombination current at the drain-side junction, and I sn can be the saturation current of electrons, and qn i represents the amount of charge, and W d represents power and τ represents tau.

[0127] The control transistor provides a pull-down action so that the output of the true random number generator can be driven up with positive feedback and down with negative feedback depending on the random fluctuations to generate random bits without additional circuitry.

[0128] As a side note, in the stochastic regime, fluctuations in electron injection randomly form positive or negative feedback loops.

[0129] If enough electrons are injected, the true random number generator generates a random bit "1" by forming a positive feedback loop, but if there are not enough electrons injected, a negative feedback loop generates a random bit "0".

[0130] Therefore, the present invention utilizes a gate diode that amplifies the random fluctuation characteristics by utilizing the feedback loop process in the channel region, thereby realizing a true random number generator that generates a random bit string with a simple structure without requiring any complex additional circuitry.

[0131] 4A and 4B are diagrams illustrating the probability adjustment function of a gated diode-based true random number generator according to one embodiment of the present invention.

[0132] FIG. 4A illustrates a timing diagram associated with the probability adjustment function of a gated diode-based true random number generator in accordance with one embodiment of the present invention.

[0133] FIG. 4B illustrates the probability distribution associated with the probability adjustment function of a gated diode-based true random number generator according to one embodiment of the present invention.

[0134] Referring to FIG. 4A, a timing diagram 400 illustrates a second gate voltage V G2 , and graph 410 shows the change in the second gate voltage V G2 This shows the probability that a random bit "1" will be obtained due to a change in

[0135] Second gate voltage V G2 When the values ​​of are -2.2V, -2.1V and -1.9V, V OUT The transient response is shown in the timing diagram.

[0136] Second gate voltage V G2 The increase in decreases the potential barrier height in the channel region under the second gate terminal, increasing the probability of positive feedback in the gated diode and causing "1" to occur more frequently.

[0137] Graph 410 shows that each data point is data acquired from 5000 consecutive bits, and the probability of a "1" occurring varies with the second gate voltage V from -2.3V to -1.9V. G2 P1 varied from 0 to 1 in the range of the second gate voltage V G2This allows us to confirm that outside of this range, the random bit is determined to be either "0" or "1".

[0138] Such sigmoidal behavior resembles that of stochastic neurons, which suggests the applicability of true random number generators in stochastic computing.

[0139] Random V of a random number generator (RNG) OUT can be explained using the following Equation 6:

[0140]

number

[0141] In Equation 6, sgn(x) represents the signum function, rand represents a random number uniformly distributed between 0 and 1, and V 0.5 is P1=0.5 and V G2 values ​​can be shown, and a and b can be fitting parameters.

[0142] where V 0.5 a and b may be set to −2.1V and 0.06V, respectively, for a true random number generator.

[0143] Also, a (e.g., 0.5) is the V scaled according to the supply voltage of the true random number generator. OUT The range can be shown.

[0144] In Equation 6, the nth output voltage V OUT is the second gate voltage V G2 It can arbitrarily show -0.5 or 0.5V depending on the probability determined by

[0145] Referring to timing diagram 400 and graph 410, the output of a true random number generator according to one embodiment of the present invention varies with the second gate voltage V G2It can be seen that the probability P1 of generating a random bit "1" increases from 0 to 1 in the form of a sigmoid function as a function of the change in .

[0146] Therefore, the present invention can realize probabilistic computing by controlling the probability of random bit strings in a true random number generator through the application of voltages.

[0147] 5A and 5B are diagrams illustrating the results of a simulation performed to verify the randomness of a random bit string generated by a gated diode-based true random number generator according to an embodiment of the present invention.

[0148] 5A and 5B illustrate the results of a simulation to verify the randomness of a random bit string generated by a gated diode-based true random number generator according to one embodiment of the present invention.

[0149] Referring to FIG. 5A, graph 500 shows the durability of repeated cycles for generating random bit strings, and graph 501 shows the distribution of the probability of a "1" occurring.

[0150] Referring to FIG. 5B, in relation to the randomness of the generation of the random bit string, graphs 510 and 512 show measurement results for the Hamming distance (HD), and graphs 511 and 513 show the correlation coefficient (CC).

[0151] The Hamming distance is measured by comparing two bit strings and measuring the number of bits that are different in position, and in the present invention, 50 is an ideal value.

[0152] The correlation coefficient measures the linear relationship between bit strings and is expressed as a value between -1 and 1, with values ​​closer to 0 meaning there is no correlation.

[0153] The true random number generator according to one embodiment of the present invention has a random number generation time of 40 cycles (approximately 2×10 5 It can operate stably for a period of time (bits) and can generate random bit strings with a constant probability of P1 average 0.51 and standard deviation 0.03.

[0154] The Hamming distance and correlation coefficient between random bit strings generated by the same true random number generator were 49.79 and 0.004 on average, respectively, and the true random number generator according to one embodiment of the present invention can generate random bit strings that are uncorrelated with each other.

[0155] Furthermore, when the Hamming distance and correlation coefficient between random bit strings generated by different true random number generators are measured, the results are close to ideal values.

[0156] The bit string generated by the true random number generator according to one embodiment of the present invention can verify the physically unclonable characteristics of the true random number generator.

[0157] The physical unclonability of the true random number generator has the advantage that it makes reverse calculation impossible and ensures security when a security system is constructed.

[0158] 6A and 6B are diagrams illustrating a gated diode-based true random number generator and its operating characteristics according to one embodiment of the present invention.

[0159] FIG. 6A illustrates a gated diode-based true random number generator according to one embodiment of the present invention that is composed solely of gated diodes.

[0160] Referring to FIG. 6A, a gated diode-based true random number generator 600 according to one embodiment of the present invention is comprised of a single element of a gated diode, which has a p-type resistor between its drain terminal and its source terminal. + -in + The diode structure is located + -in +A gate insulating film is located on the intrinsic region of the diode structure, and two gate terminals are located on the gate insulating film.

[0161] For example, the intrinsic region is p + -in + This can correspond to the i-region of the diode structure.

[0162] The gated diode-based true random number generator 600 according to one embodiment of the present invention consists of only gated diodes and can be referred to as a single-element-based true random number generator.

[0163] Furthermore, the gated diode-based true random number generator 600 can be referred to as a current-output true random number generator because the current output is composed of random numbers.

[0164] A gated diode is a diode whose intrinsic region changes to n based on the different voltages applied through the two gate terminals. * Channel region and p * Electrostatic doping creates a potential barrier in the intrinsic region while altering one of the channel regions.

[0165] Furthermore, the gate diode can output random bits by randomly forming either a positive feedback loop or a negative feedback loop associated with the formed potential barrier due to fluctuations in electron injection based on the controlled electron injection.

[0166] A gated diode has two gate terminals, one of which is a p-type diode, and the other is a drain terminal. + When a positive voltage is applied to the first gate terminal, the region under the first gate terminal in the intrinsic region becomes n * Included as a channel region.

[0167] The gate diode has an n-type gate electrode between the second gate terminal of the two gate terminals and the source terminal. + When a negative voltage is applied to the second gate terminal, the region under the second gate terminal in the intrinsic region becomes p * It may be included as a channel region.

[0168] FIG. 6B shows the operating characteristics of a gated diode-based true random number generator according to one embodiment of the present invention when it is configured with gated diodes only.

[0169] Referring to FIG. 6B, graph 610 illustrates the performance characteristics of a gated diode-based true random number generator according to one embodiment of the present invention.

[0170] A gated diode-based true random number generator according to one embodiment of the present invention operates by controlling the drain voltage V DD , first gate voltage V G1 and the second gate voltage V G2 The output current I of the source stage generated when a constant voltage pulse is applied to the gate diode OUT A true random number generator can be realized by using as random bits.

[0171] In one embodiment of the gated diode-based true random number generator of the present invention, a current is randomly output from the source stage as a result of the random fluctuation characteristics generated by the gated diode, thereby realizing a current-output true random number generator.

[0172] In accordance with one embodiment of the present invention, a gated diode-based true random number generator includes a first gate voltage V to induce random fluctuation characteristics without a control transistor. G1 and the second gate voltage V G2 By adjusting the magnitude of the potential barrier formed inside the channel of the gated diode, the magnitude of the potential barrier can be adjusted.

[0173] A gated diode-based true random number generator according to one embodiment of the present invention operates by controlling the source voltage V SSWithout applying a drain voltage V DD The control can operate based on a control action that limits electron injection, such as applying only

[0174] A gated diode-based true random number generator according to one embodiment of the present invention operates by controlling the drain voltage V DD is applied at 2.0V, and the first gate voltage V G1 is applied at 2.0 V, and the second gate voltage V G2 When the same input voltage is applied repeatedly in pulses at -0.5V, the output current I OUT will randomly switch to 0μA (random number "0") or 60μA (random number "1"), and can output any bit sequence of "10011001100101100101".

[0175] The outputs described above are not limited to the voltage and current ranges described above, by way of example, nor are the results of any bit sequence output.

[0176] 7A to 8 are diagrams illustrating information encryption using a gated diode-based true random number generator according to one embodiment of the present invention.

[0177] FIG. 7A illustrates a binary data representation of a grayscale image in connection with information encryption using a gated diode-based true random number generator according to one embodiment of the present invention.

[0178] Referring to FIG. 7A, for a grayscale image 700, pixel information may be represented by 8-bit binary data 701.

[0179] This allows the grayscale image to be encrypted using a true random number generator.

[0180] To obtain a large size secret key, the random bit sequence can be drawn multiple times from a true random number generator with P1=0.5.

[0181] Here, P1=0.5 can indicate that the probability of "1" occurring among the randomly generated random numbers "0" and "1" is 50%.

[0182] FIG. 7B illustrates a procedure for encrypting information using a gated diode-based true random number generator according to one embodiment of the present invention, in which an encryption key image is combined with an original image to achieve information protection.

[0183] Referring to FIG. 7B, an original image 710 to be encrypted is XOR-encrypted using a security key 711 to generate an encrypted image 712 .

[0184] The encrypted image 712 is encrypted in the form of a random noise image to provide security for the information when it is communicated to or stored on the server.

[0185] Here, the security key 711 is a secret key based on a random bit sequence from a true random number generator.

[0186] Once the original image 710 and private key are encrypted, the encrypted image becomes unrecognizable, allowing the encrypted image to maintain security when communicated to or stored on a server.

[0187] FIG. 7C illustrates an image decryption process of an attacker attempting to decrypt a duplicated private key in connection with information encryption using a gated diode-based true random number generator according to one embodiment of the present invention.

[0188] Referring to FIG. 7C, original image 722 is decrypted from encrypted image 720 using security key 721 for XOR encryption, but when decryption is performed using replication key 730, original image 722 cannot be realized and fails, resulting in failed image 731.

[0189] Even if a hacker extracts another secret key from another true random number generator on the same wafer for a decryption attack using the duplicate key 730, the hacker will fail to decrypt the image due to physical unclonability. However, if the hacker decrypts the image using the same secret key that was used to encrypt the image, the encrypted image will be completely restored.

[0190] FIG. 8 illustrates an example where information encryption using a gated diode-based true random number generator according to one embodiment of the present invention is applied to data.

[0191] Referring to Figure 8, encryption and decryption can be achieved by encrypting original data 800, which is the data to be encrypted, using security key 801 to generate encrypted data 802, and then decrypting encrypted data 810 using security key 811 to restore original data 812.

[0192] The security key generated by the true random number generator according to one embodiment of the present invention protects the original data by making it physically unclonable.

[0193] Therefore, the present invention can realize PUF (physical unclonable function) technology by stably generating random numbers through a gated diode-based true random number generator using a CMOS process and generating a random bit string that cannot be physically replicated.

[0194] In the above-described specific embodiments, elements included in the invention are expressed as singular or plural by the specific embodiments presented.

[0195] However, the expressions "singular" or "plural" are selected to suit the circumstances presented for the convenience of explanation, and the above-described embodiments are not limited to singular or plural components, and elements expressed as plural may be composed of singular, and elements expressed as singular may be composed of plural.

[0196] Meanwhile, although specific embodiments have been described in the explanation of the invention, it goes without saying that various modifications are possible as long as they do not deviate from the scope of the technical ideas contained in the various embodiments.

[0197] Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined by the following claims as well as equivalents to these claims. [Explanation of symbols]

[0198] 300 Gated Diode-Based True Random Number Generator 301 Gate Diode 302 Control transistor

Claims

1. Between the drain terminal and the source terminal, + -i-n + A diode structure is located, and the p + -i-n + a gated diode having a gate insulating film on an intrinsic region of the diode structure and two gate terminals on the gate insulating film; A control drain terminal is connected to the source terminal, and together with the control drain terminal, a control gate terminal and a control source terminal are configured, and a gate voltage (V MOS ) by controlling the p + -i-n + a control transistor for controlling electron injection into the diode structure; The gated diode is configured such that the intrinsic region is n-type based on different voltages applied via the two gate terminals. * The channel region and p * A gated diode-based intrinsic random number generator, characterized in that a potential barrier is formed in the intrinsic region by electrostatic doping while one of the channel regions is changed, and a feedback loop of either a positive feedback loop or a negative feedback loop related to the formed potential barrier is randomly formed by fluctuations in electron injection based on the controlled electron injection, thereby outputting random bits.

2. The gated diode has a p-type diode between a first gate terminal of the two gate terminals and the drain terminal. + When a positive voltage is applied to the first gate terminal, the region under the first gate terminal in the intrinsic region is n * a second gate terminal of the two gate terminals and the source terminal; + When a negative voltage is applied to the second gate terminal, the region under the second gate terminal in the intrinsic region is p * 10. The gated diode-based true random number generator of claim 1, including as a channel region.

3. 3. The gated diode-based true random number generator of claim 2, wherein the gated diode forms a positive feedback loop when the injected electrons based on the controlled electron injection are greater than a reference electron for forming a positive feedback loop in which the current latches up, and when the injected electrons are smaller than the reference electron, a negative feedback loop phenomenon in which the positive feedback loop is not formed is repeated, causing the current to fluctuate randomly just before the latch-up.

4. 2. The gated diode-based true random number generator of claim 1, wherein the gated diode receives a drain supply voltage through the drain terminal, and generates and outputs a positive bit ("1") when the positive feedback loop is formed in association with a first gate voltage pulse and a second gate voltage pulse applied through the first gate terminal and the second gate terminal of the two gate terminals, and generates a negative bit ("0") when the negative feedback loop is formed.

5. The control transistor is + -i-n + 10. The gated diode-based true random number generator of claim 1, wherein a stochastic region within the intrinsic region of the gated diode is induced by controlling electron injection into the diode structure.

6. 2. The gated diode-based true random number generator of claim 1, wherein the gated diode receives a drain supply voltage through the drain terminal, and randomly determines an output voltage in response to a first gate voltage pulse and a second gate voltage pulse applied through the first gate terminal and the second gate terminal of the two gate terminals, thereby randomly outputting one bit of either a positive bit ("1") or a negative bit ("0").

7. 7. The gated diode-based true random number generator of claim 6, wherein the height of the potential barrier of the gated diode is controlled by adjusting the voltage applied via the second gate terminal, and the probability of forming a positive feedback loop is controlled based on the controlled height of the potential barrier.

8. 8. The gated diode-based true random number generator of claim 7, wherein, when the voltage applied through the second gate terminal increases, the height of the potential barrier decreases, increasing the probability of outputting the positive bit ("1"), and when the voltage applied through the second gate terminal decreases, the height of the potential barrier increases, increasing the probability of outputting the negative bit ("0").

9. 2. The gated diode-based true random number generator of claim 1, wherein the output random bits are composed of a random bit string, converted into an image format based on pixel information based on binary data, and generated as a security key, and converted into encrypted data by XOR-encrypting the original image using the generated security key.

10. 10. The gated diode-based true random number generator of claim 9, wherein the encrypted data is encrypted in the form of a random noise image and can be decrypted only with the generated security key.

Images