Photovoltaic element and method of fabrication

Abstract

This invention provides a photovoltaic element and a method for manufacturing it that form ohmic contacts and improve conversion efficiency. [Solution] The method involves forming a type II-VI semiconductor absorber layer 160 on top of a substrate laminate 113, wherein the type II material contains cadmium and the type VI material contains tellurium; contacting the second surface 164 of the type II-VI semiconductor absorber layer 160 with an alkaline cleaning fluid containing hydroxide to generate a Cd-rich surface; and depositing a type p contact layer 180 on top of the type II-VI semiconductor absorber layer 160 so that the p contact layer 180 is directly adjacent to the Cd-rich layer, wherein the p contact layer 180 contains at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, TF8-TAA, TIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconductor polymer, NiO, CuSCN, or Cui.

Description

[Technical Field]

[0001]

[0001] This specification generally relates to layers for photovoltaic elements, and more particularly to the use of specific combinations of materials and layering parameters to improve the efficiency of photovoltaic elements. [Background technology]

[0002]

[0002] Photovoltaic elements generate power by converting light into electricity using semiconductor materials that exhibit the photovoltaic effect. P-type contacts with low contact resistivity and low recombination loss have been a continuing challenge in the development of thin-film cadmium telluride solar cells. The lack of materials with good band alignment and high work function makes it difficult to form ohmic contacts with p-type CdTe and other II-VI type semiconductor alloys. Therefore, material layers to improve the efficiency of photovoltaic elements are desired. [Overview of the project]

[0003]

[0003] Therefore, there is a need for alternative layer structures and compositions for use in photovoltaic elements.

[0004] The embodiments described in the drawings are in fact descriptive and illustrative, and are not intended to limit the subject matter as defined by the claims. The following detailed descriptions of the descriptive embodiments can be understood in conjunction with the following drawings, and similar reference figures indicate identical or corresponding parts throughout the drawings. [Brief explanation of the drawing]

[0004] [Figure 1]

[0005] This is a schematic diagram of a photovoltaic element according to one or more embodiments shown and described herein. [Figure 2]

[0006] This figure schematically depicts a cross-sectional view of a segment of the photovoltaic element shown and described herein, according to one or more embodiments. [Figure 3]

[0007] A diagram schematically depicting a cross-sectional view of a segment of a photovoltaic device according to one or more embodiments shown and described herein. [Figure 4]

[0008] A diagram schematically depicting a cross-sectional view of a segment of a photovoltaic device according to one or more embodiments shown and described herein. [Figure 5]

[0009] A diagram showing a comparison of performance characteristics regarding the current-voltage (IV) curve of a comparative device having a p-type contact layer of NiOx, P3HT, PTAA, or SpiroOMeTAD according to embodiments shown and described herein. [Figure 6]

[0010] A diagram showing a comparison of performance characteristics regarding the current-voltage (IV) curve of a device under dark conditions according to embodiments shown and described herein. [Figure 7]

[0011] A diagram showing a comparison of performance characteristics based on the depletion width (W) in microns (μm) of the acceptor carrier concentration number (Na) for a control device and a device according to embodiments shown and described herein. [Figure 8]

[0012] A diagram showing a comparison of performance characteristics regarding the photoluminescence intensity with respect to the peak wavelength for a control device and a device according to embodiments shown and described herein. [Figure 9]

[0013] Figures 9A and 9B are diagrams showing a comparison of performance characteristics regarding the photoluminescence intensity with respect to the peak wavelength for a control device and a device according to embodiments shown and described herein. [Figure 10]

[0014] A diagram showing a comparison of performance characteristics regarding Voc and FF for a control device and a device according to embodiments shown and described herein.

Mode for Carrying Out the Invention

[0005]

[0015] The patent or application file has at least one drawing created in color and / Or it may include one or more photographs. Copies of this patent or patent application publication, including color drawings, will be provided by the Patent Office upon request and payment of the necessary fees.

[0006]

[0016] A photovoltaic element can be formed from a laminate of functional layers formed on a substrate. One or more functional layers may include thin films of material; that is, the photovoltaic element may be a thin-film photovoltaic element. A thin-film photovoltaic element may include an absorber layer for converting light into charge carriers and a conductive layer for collecting the charge carriers. Once charge carriers are generated, a potential is created by the separation of charges. The positive and negative charge carriers, holes and electrons, move in opposite directions toward the p-type and n-type regions on the opposite side of the absorber, respectively.

[0007]

[0017] Generating p-type contacts with low contact resistivity and low recombination loss has been a persistent challenge in the development of thin-film cadmium telluride solar cells. The lack of materials with good band alignment and high work function makes it difficult to form ohmic contacts to p-type CdTe and its alloys. Interface engineering using the described materials and methods provides an interface layer, back-surface contact, or p-type contact layer with high hole conductivity and low electron affinity. Thus, when p-type majority carriers (holes) reach the contact interface, the p-type contact layer efficiently transports the holes from the absorber and minimizes interfacial recombination.

[0008]

[0018] The p-type contact layer provides good back-side contact to solar cells having absorbers containing cadmium-tellurium alloys, including binary, ternary, and quaternary alloys. The p-type contact layer has good band alignment to CdTe, low or negligible hole transport barriers, and high electron barriers against electron reflection. The p-type contact layer has minimal interfacial defects, good passivation, and high conductivity. The p-type contact layer has high doping for deep Fermi levels and high hole mobility. In some examples, the p-type contact layer can be formed facing the back surface of the module relative to the absorber layer. In some examples, the p-type contact layer can be formulated to be substantially transparent and can be formed facing the front or light-facing surface of the module relative to the absorber layer. Embodiments provided herein relate to p-type contact layers and photovoltaic elements comprising them. The p-type contact layer of this disclosure can improve the efficiency of the current-collecting portion of the photovoltaic element.

[0009]

[0019] Referring here to Figure 1, an embodiment of the photovoltaic element 100 is schematically depicted. The photovoltaic element 100 can be configured to receive light and convert it into electrical energy, for example, by absorbing photons from light and converting them into electric current via the photovoltaic effect. Thus, for discussion and clarity, the photovoltaic element 100 may have a front surface 102 configured to face a primary light source, such as the sun. Furthermore, the photovoltaic element 100 may also have a back surface 104 that is offset from the front surface 102, for example, by multiple functional layers of material. It should be noted that the term “light” is not limited to but can refer to various wavelengths of the electromagnetic spectrum, such as ultraviolet (UV), infrared (IR), and visible wavelengths of the electromagnetic spectrum. As used herein, “sunlight” refers to light emitted by the sun.

[0010]

[0020] The photovoltaic element 100 may include multiple layers arranged between the front surface 102 and the back surface 104. As used herein, the term “layer” refers to the thickness of the material provided on the surface. Each layer may cover all or part of an adjacent surface. In some embodiments, the layers of the photovoltaic element 100 may be divided into an array of photovoltaic cells 200. For example, the photovoltaic element 100 may be scribed by multiple serial scribes 202 and multiple parallel scribes 204. The serial scribes 202 are photovoltaic A parallel scribe 204 can extend along the length Y of the element 100 and define the boundaries of the photovoltaic cell 200 along the length Y of the photovoltaic element 100. Neighboring cells of the photovoltaic cell 200 can be connected in series along the width X of the photovoltaic element 100. In other words, a monolithic interconnection of neighboring cells 200 can be formed adjacent to the serial scribe 202. A parallel scribe 204 can extend along the width X of the photovoltaic element 100 and define the boundaries of the photovoltaic cell 200 along the width X of the photovoltaic element 100. During operation, the current 205 can flow mainly along the width X through the photovoltaic cells 200 connected in series by the serial scribe 202. During operation, the parallel scribe 204 can limit the ability of the current 205 to flow along the length Y. The parallel scribe 204 is optional and can be configured to separate the series-connected photovoltaic cells 200 into groups 206 arranged along the length Y.

[0011]

[0021] Referring further to Figure 1, the parallel scribes 204 can electrically isolate groups 206 of photovoltaic cells 200 connected in series. In some embodiments, groups 206 of photovoltaic cells 200 can be connected in parallel, for example, via electrical bussing. Optionally, the number of parallel scribes 204 can be configured to limit the maximum current generated by each group 206 of photovoltaic cells 200. In some embodiments, the maximum current generated by each group 206 may be about 200 milliamperes (mA) or less, for example, about 100 mA or less in one embodiment, about 75 mA or less in another embodiment, or about 50 mA or less in yet another embodiment.

[0012]

[0022] Referring here to Figure 2, the layers of the photovoltaic element 100 may include a thin-film laminate provided above the substrate 110. The substrate 110 may be configured to facilitate the transmission of light to the photovoltaic element 100. The substrate 110 may be placed on the front surface 102 of the photovoltaic element 100. The substrate 110 may have a first surface 112 substantially facing the front surface 102 of the photovoltaic element 100, and a second surface 114 substantially facing the back surface 104 of the photovoltaic element 100. One or more layers may be placed between the first surface 112 and the second surface 114 of the substrate 110.

[0013]

[0023] The substrate 110 may include a transparent layer. The transparent layer may be formed from a substantially transparent material, such as glass. Suitable glasses include soda-lime glass or any glass with reduced iron content. The transparent layer may have any suitable transmittance range, including about 250 nm to about 1,300 nm in some embodiments. The transparent layer may have any suitable transmittance percentage, including, for example, more than about 50% in one embodiment, more than about 60% in another embodiment, more than about 70% in yet another embodiment, more than about 80% in a further embodiment, or more than about 85% in yet another embodiment. In one embodiment, the transparent layer may be formed from glass having a transmittance of about 90% or more. Optionally, the substrate 110 may include a coating on the first surface 112. The coating may be, but is not limited to, an anti-reflective coating, an anti-fouling coating, or a combination thereof, configured to interact with light or to improve the durability of the substrate 110.

[0014]

[0024] Referring again to Figure 2, the photovoltaic element 100 may include a barrier layer 130 configured to mitigate the diffusion of contaminants (e.g., sodium) from the substrate 110, which could lead to degradation or delamination of other layers of the photovoltaic laminate. The barrier layer 130 may have a first surface 132 substantially facing the front surface 102 of the photovoltaic element 100, and a second surface 134 substantially facing the back surface 104 of the photovoltaic element 100. In some embodiments, the barrier layer 130 may be provided adjacent to the substrate 110. For example, the first surface 132 of the barrier layer 130 may be provided on the second surface 114 of the substrate 100. This is possible. As used herein, the expression “adjacent” means that the two layers are in contact and arranged without any intervening material between at least part of the layers.

[0015]

[0025] Generally, the barrier layer 130 can be substantially transparent, thermally stable, have a low pinhole count, high sodium barrier capability, and good adhesion. Alternatively, or further, the barrier layer 130 can be configured to add color suppression to light. The barrier layer 130 may include, but is not limited to, one or more layers of preferred materials including tin oxide, silicon dioxide, aluminum-doped silicon oxide, silicon oxide, silicon nitride, or aluminum oxide. The barrier layer 130 may have any preferred thickness bounded by the first surface 132 and the second surface 134, for example, greater than about 100 Å in one embodiment, greater than about 150 Å in another embodiment, or less than about 200 Å in a further embodiment.

[0016]

[0026] Referring further to Figure 2, the photovoltaic element 100 may include an n-type contact layer 140 configured to provide electrical contact for transporting charge carriers generated by the photovoltaic element 100. The n-type contact layer may be a transparent conductive oxide (TCO) layer 140. The TCO layer 140 may have a first surface 142 substantially facing the front surface 102 of the photovoltaic element 100 and a second surface 144 substantially facing the back surface 104 of the photovoltaic element 100. In some embodiments, the TCO layer 140 may be provided adjacent to a barrier layer 130. For example, the first surface 142 of the TCO layer 140 may be provided on the second surface 134 of the barrier layer 130. Generally, the TCO layer 140 may be formed from one or more layers of a substantially transparent n-type semiconductor material having a broad bandgap. In particular, a broad bandgap can have a larger value compared to the energy of photons of light, which can mitigate the absorption of undesirable light. The TCO layer 140 may include, but is not limited to, one or more layers of a suitable material, including tin dioxide, doped tin dioxide (e.g., F-SnO2), indium tin oxide, or cadmium stannate (Cd2SnO4). In embodiments in which the TCO layer 140 contains cadmium stannate, the cadmium stannate may be provided in crystalline form. For example, the cadmium stannate may be deposited as a film and then subjected to an annealing process, thereby converting the thin film into a crystalline film.

[0017]

[0027] The photovoltaic element 100 may include a buffer layer 150 configured to provide an insulating layer between the TCO layer 140 and the semiconductor layer. The buffer layer 150 may have a first surface 152 substantially facing the front surface 102 of the photovoltaic element 100 and a second surface 154 substantially facing the back surface 104 of the photovoltaic element 100. In some embodiments, the buffer layer 150 may be provided adjacent to the TCO layer 140. For example, the first surface 152 of the buffer layer 150 may be provided on the second surface 144 of the TCO layer 140. The buffer layer 150 may be, but is not limited to, true tin dioxide, magnesium zinc oxide (e.g., Zn 1-x Mg xThe buffer layer 150 may include materials having a higher resistivity than the TCO layer 140, such as 0), silicon dioxide (SnO2), aluminum oxide (Al2O3), aluminum nitride (AlN), zinc tin oxide, zinc oxide, tin silicon oxide, or any combination thereof. In some embodiments, the material of the buffer layer 150 may be configured to substantially harmonize with the band gap of the adjacent semiconductor layer (e.g., absorber). The buffer layer 150 may have any preferred thickness between the first surface 152 and the second surface 154, for example, greater than about 100 Å in one embodiment, about 100 Å to about 800 Å in another embodiment, or about 150 Å to about 600 Å in a further embodiment.

[0018]

[0028] Referring further to Figure 2, the photovoltaic element 100 may include an absorber layer 160 configured to cooperate with another layer to form a pn junction within the photovoltaic element 100. Thus, the photons of absorbed light open electron-hole pairs, generating a carrier flow and electrical energy. It can produce.

[0019]

[0029] A partially formed element including a substrate 110, an n-type layer and / or buffer layer 150 including a TCO layer 140, and layers between them may be called a substrate laminate 113. An absorber layer 160 may be formed on top of the substrate laminate 113. The absorber layer 160 may have a first surface 162 substantially facing the front surface 102 of the photovoltaic element 100, and a second surface 164 substantially facing the back surface 104 of the photovoltaic element 100. The thickness of the absorber layer 160 can be defined between the first surface 162 and the second surface 164. The thickness of the absorber layer 160 may be about 0.5 μm to about 10 μm, for example, about 1 μm to about 7 μm in one embodiment, or about 1.5 μm to about 4 μm in another embodiment.

[0020]

[0030] According to embodiments described herein, the absorber layer 160 can be formed from a p-type semiconductor material having excess positive charge carriers, i.e., holes or acceptors. The absorber layer 160 may include any suitable p-type semiconductor material, such as a group II-VI semiconductor such as cadmium and tellurium. Further examples, but not limited to, include semiconductor materials comprising cadmium, zinc, tellurium, selenium, or any combination thereof. In some embodiments, the absorber layer 160 may be a ternary compound of cadmium, selenium, and tellurium (e.g., CdSe x Te 1-x ), or a compound containing cadmium, selenium, tellurium, and one or more additional elements (e.g., CdZnSeTe). The absorber layer 160 may further contain one or more dopants. The photovoltaic element 100 provided herein may contain multiple absorber materials.

[0021]

[0031] In embodiments where the absorber layer 160 contains tellurium and cadmium, the average atomic percentage of tellurium in the absorber layer 160 may be between approximately 25 atomic percentages and approximately 50 atomic percentages, for example, more than approximately 30 atomic percentages and less than approximately 50 atomic percentages in one embodiment, more than approximately 40 atomic percentages and less than approximately 50 atomic percentages in a further embodiment, or more than approximately 47 atomic percentages and less than approximately 50 atomic percentages in yet another embodiment. Alternatively or further, the average atomic percentage of tellurium in the absorber layer 160 may be more than approximately 45 atomic percentages, for example, more than approximately 49% in one embodiment. It should be noted that the average atomic percentages described herein are representative of the absorber layer 160 as a whole, and the atomic percentage of material at a particular location within the absorber layer 160 may be stepped throughout the thickness compared to the overall composition of the absorber layer 160. For example, the absorber layer 160 may have a stepped composition.

[0022]

[0032] In embodiments where the absorber layer 160 contains selenium and tellurium, the average atomic percentage of selenium in the absorber layer 160 may be greater than 0 atomic percent and less than or equal to about 25 atomic percent, for example, greater than about 1 atomic percent and less than about 20 atomic percent in one embodiment, greater than about 1 atomic percent and less than about 15 atomic percent in another embodiment, or greater than about 1 atomic percent and less than about 8 atomic percent in a further embodiment. It should be noted that the concentrations of tellurium, selenium, or both may be stepped throughout the thickness of the absorber layer 160. For example, if the absorber layer 160 contains a compound (Se) containing selenium in a mole fraction of x and tellurium in a mole fraction of 1-x x Te 1-x If this is included, x can vary in the absorber layer 160 with respect to the distance from the first surface 162 of the absorber layer 160.

[0023]

[0033] Referring further to Figure 2, the absorber layer 160 can be doped with dopants configured to manipulate the charge carrier concentration. In some embodiments, the absorber layer 160 can be doped with Group V dopants such as arsenic, phosphorous acid, antimony, or combinations thereof. Alternatively or further, the absorber layer 160 can be doped with Group IB dopants such as copper, silver, gold, or combinations thereof. The total density of dopants within the absorber layer 160 can be controlled. Furthermore, the amount of dopants can be varied with respect to the distance from the first surface 162 of the absorber layer 160.

[0024]

[0034] According to embodiments provided herein, a pn junction can be formed by providing an absorber layer 160 in close proximity to a portion of the photovoltaic element 100 having excess negative charge carriers, i.e., electrons or donors. For example, the p-type absorber layer may optionally be provided on top of the n-type TCO layer 140, interposed with a buffer layer 150. In some embodiments, the absorber layer 160 can be provided adjacent to the n-type semiconductor material. Alternatively, one or more intervening layers can be provided between the absorber layer 160 and the n-type semiconductor material. In some embodiments, the absorber layer 160 can be provided adjacent to the buffer layer 150. For example, the first surface 162 of the absorber layer 160 can be provided on top of the second surface 154 of the buffer layer 150. In some embodiments, the absorber layer 160 can be provided adjacent to the TCO layer 140. For example, the first surface 162 of the absorber layer 160 can be provided on top of the second surface 144 of the TCO layer 140.

[0025]

[0035] The photovoltaic element 100 may include a p-type contact layer 180 configured to provide electrical contact to the absorber layer 160. The p-type contact layer 180 may have a first surface 182 substantially facing the energy surface 102 of the photovoltaic element 100, and a second surface 184 substantially facing the opposite surface 104 of the photovoltaic element 100. The p-type contact layer 180 may be a back surface contact layer having the first surface 182 substantially facing the absorber layer 160. The thickness of the p-type contact layer 180 can be defined between the first surface 182 and the second surface 184. The thickness of the p-type contact layer 180 may be less than about 500 nm, for example, about 0.5 nm to about 100 nm in one embodiment, or about 5 nm to about 50 nm in another embodiment. In some embodiments, the thickness of the p-type contact layer 180 may be about 5 nm to about 200 nm, for example, about 10 nm to about 50 nm in one embodiment.

[0026]

[0036] In some embodiments, the p-type contact layer 180 is a polymer, small molecule, or inorganic compound. In some embodiments, the p-type contact layer is poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine](PTAA), poly(9,9-dioctylfluorene-alt-N-(4-sec-butylphenyl)-diphenylamine (TFB), poly[(9,9-dioctylfluorenyl-2,7-diyl)-co-(4,4'-(N-(2,4-dimethylphenyl))diphenylamine)](PF8-TAA), poly[[(2,4-dimethylphenyl)imino]-1,4-phenyl Poly(6,12-dihydro6,6,12,12-tetraoctylindeno[1,2-b]fluorene-2,8-diyl)-1,4-phenylene) (PIF8-TAA), poly(3-hexylthiophene-2,5-diyl) (P3HT), poly(N,N'-bis-4-butylphenyl-N,N'-bisphenyl)benzidine (PolyTPD), polythiophene, or poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonate) (PEDOT:PSS) selected from The material contains a rimer material. In some embodiments, the p-type contact layer is PTAA. In some embodiments, the p-type contact layer is N2,N2,N2',N2',N7,N7,N7',N7'-octakis(4-methoxyphenyl)-9,9'-spirobi[9H-fluorene]-2,2',7,7'-tetramine (Spiro-OMeTAD), N2,N2,N2',N2',N7,N7,N7',N7'-octakis(4-methoxyphenyl)-10-phenyl-10H-spiro[acridine-9,9'- Fluorene-2,2',7,7'-tetraamine (SAF-OMe), N,N',dialkylperidiimide (PDI), 4,4'-bis(N-carbazolyl)-1,1'-biphenyl (CBP), tris(4-carbazol-9-ylphenyl)amine (TCTA), 1,3,5-tris(carbazol-9-yl)benzene (TCP), tris{N,N-bis(4-methoxyphenyl)-N-phenyl}amine quinolidinoarcidin (OMeTPA-FA), SGT-407, condensed The p-type contact layer comprises a small molecule selected from α-NPD, 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene), poly[2,6-(4,4-bis-(2-ethylhexyl)-4H-cyclopenta[2,1-b;3,4-b']dithiophene)-alt-4,7(2,1,3-benzothiadiazole](PCPDTBT), poly[N-9'-heptadecanyl-2,7-carbazole-alt-5,5-(4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)](PCDTBT), graphene oxide, and quinolidinoacridine. In some embodiments, the p-type contact layer comprises nickel oxide (NiO x ), comprises an inorganic compound selected from cuprous thiocyanate (CuSCN), copper iodide (CuI), or copper oxide (Cu2O). In some embodiments, the p-type contact layer is nickel oxide (NiO x )

[0027]

[0037] The thin-film junction 176 can be defined as a thin-film laminate that primarily contributes to the photovoltaic effect. For example, in some embodiments, the thin-film junction 176 may include a transparent conductive oxide layer 140, a buffer layer 150, an absorber layer 160, and a p-type contact layer 180.

[0028]

[0038] The photovoltaic element 100 may include a conductive layer or conductive layer 190 configured to provide electrical contact with the absorber layer 160. The conductive layer 190 may have a first surface 192 substantially facing the energy face 102 of the photovoltaic element 100, and a second surface 194 substantially facing the opposite surface 104 of the photovoltaic element 100. In some embodiments, the conductive layer 190 may be provided adjacent to the p-type contact layer 180. For example, the first surface 192 of the conductive layer 190 may be provided on the second surface 184 of the p-type contact layer 180. The conductive layer 190 may include any preferred conductive material, such as one or more layers of nitrogen-containing metals, silver, nickel, copper, aluminum, titanium, palladium, chromium, molybdenum, gold, or similar materials. Preferred examples of nitrogen-containing metal layers include aluminum nitride, nickel nitride, titanium nitride, tungsten nitride, selenium nitride, tantalum nitride, or vanadium nitride.

[0029]

[0039] The photovoltaic element 100 may include a back support 196 configured to cooperate with the substrate 110 to form a housing for the photovoltaic element 100. The back support 196 may be located on the opposite side 102 of the photovoltaic element 100. For example, the back support 196 may be formed adjacent to the conductive layer 190. The back support 196 may include any of the following preferred materials, such as borosilicate glass, float glass, soda-lime glass, carbon fiber, or polycarbonate.

[0030]

[0040] Figure 3 shows an element similar to that in Figure 2, having a substrate 110 on a light-facing front surface 102, an n-type contact layer 140 above the substrate 110, an absorber layer 160 above the n-type contact layer 140, and a p-type contact 180 between the absorber layer 160 and the conductive layer 190.

[0031]

[0041] Figure 4 shows an element similar to the one shown in Figure 3, but with the polarity of the contact layers on both surfaces of the absorber layer 160 reversed, with the p-type contact layer 180 facing the light-facing front surface 102 relative to the n-type contact layer 140. In the orientation shown in Figure 4, the absorber layer 160 can be provided above the substrate laminate 113 including the p-type contact layer 180.

[0032]

[0042] The p-type contact layer 180 may have a first surface 182 substantially facing the front surface 102 of the photovoltaic element 100, and a second surface 184 substantially facing the back surface 104 of the photovoltaic element 100. The p-type contact layer 180 may be provided between the conductive layer 190 and the absorber layer 160. In some embodiments, the p-type contact layer 180 may be provided adjacent to one or both of the conductive layer 190 and the absorber layer 160, for example, as shown in Figure 4. The first surface 182 of the p-type contact layer 180 can be provided on the second surface 194 of the conductive layer 190, and the second surface 184 of the p-type contact layer 180 can be adjacent to the first surface 162 of the absorber layer 160. The thickness of the p-type contact layer 180 can be defined between the first surface 182 and the second surface 184.

[0033]

[0043] Referring together to Figures 3 and 4, the photovoltaic element 100 may include a p-type contact layer 180 adjacent to the absorber layer 160. Figures 3 and 4 show a thin-film junction 176 including an n-type contact layer 140, an absorber layer 160, and a p-type contact layer 180.

[0034]

[0044] Referring collectively to Figures 1-4, the substrate laminate 113 of the photovoltaic element 100 is positioned on the light-facing front 102 side and opposite the back surface 104. The absorber layer is provided above the substrate laminate 113. The layers including the substrate laminate 113 are substantially transparent. The photovoltaic element 100 may include multiple layers, and if the layers are not explicitly shown adjacent to each other, the photovoltaic element may include intervening layers that are not depicted. The layers may include one or more functional layers of material, and a single layer may have a compositional gradient within it. The deployment-ready element may further include electrical connections, encapsulation, and other functions.

[0035]

[0045] A photovoltaic element may contain several material layers sequentially deposited on a substrate. Steps for manufacturing a photovoltaic element may include, but are not limited to, sequentially placing functional layers or layer precursors into a "stack" of layers through one or more deposition processes including, but are not limited to, spin coating, thermal spraying, slot coating, blade coating, dip coating, sputtering, vapor deposition, molecular beam deposition, pyrolysis, closed sublimation (CSS), pulsed laser deposition (PLD), chemical vapor deposition (CVD), electrochemical vapor deposition (ECD), atomic layer deposition (ALD), or vapor transport deposition (VTD). One or more methods may be used to treat the as-deposited layers or stack of layers to modify their properties, for example, by annealing, passivation, heating, vapor contact, or chemical treatment. Manufacturing a photovoltaic element may further include a step of selectively removing a portion of a particular layer of the stack of layers, such as by scribing, to divide the photovoltaic element into multiple photovoltaic cells.

[0036]

[0046] Suitable materials for the p-type contact layer 180 include polymers, small molecules, or inorganic compounds. While not theoretically bound, the applicant has found that these materials can exhibit improved electrical properties when formed in contact with type II-VI semiconductor alloys. It is further conceivable that a robust structure resistant to degradation can be provided depending on the selected material combination.

[0037]

[0047] One group of materials suitable for use in the p-type contact layer includes, for example, polymers such as PTAA, P3HT, or PEDOT:PSS.

[0038]

[0048] Another group of materials suitable for use in the p-type contact layer includes, for example, small molecule compositions such as Spiro-OMeTAD, SAF-OMe, SGT-407, Condensed-F, OMeTPA-FA, or TTF-1. The small molecule compositions may be doped. Examples of p-dopants include, but are not limited to, transition metal oxides such as F4-TCNQ, molybdenum trioxide (MoO3), vanadium pentoxide (V2O5) or tungsten trioxide (WO3), and molybdenum tris[1,2-bis(trifluoromethyl-)ethane-1,2-dithiolene] (Mo(tfd)3).

[0039]

[0049] Another group of materials suitable for use as the p-type contact layer includes, for example, NiO x , inorganic compounds such as CuSCN, CuI, Cu2O, etc. These materials can be doped with impurities to change their electrical and optical properties.

[0040]

[0050] Unexpectedly, some materials that are more commonly used in combination with perovskite absorber materials have been found to demonstrate an excellent combination of optical and electrical properties compared to conventional back contact materials when paired with CdTe-based absorbers and other II-VI type alloys. Selected compositions containing poly(triarylamine) (PTAA) and nickel oxide (NiO x ) can be utilized in the p-type contact layer in a process that includes doping the absorber layer with arsenic, antimony, or bismuth, and has been further found to be suitable for use in the manufacturing process.

[0041]

[0051] Referring to Figures 5-8, a series of elements were prepared and their performance was compared. Control elements were prepared with the structures glass / TCO / CdTe / Au and glass / TCO / CdTe / ZnTe / Au. x Experimental elements were prepared with the structures of / Au, glass / TCO / CdTe / P3HT / Au, glass / TCO / CdTe / PTAA / Au, and glass / TCO / CdTe / SpiroOMeTAD / Au.

[0042]

[0052] NiO x The P3HT, PTAA, and SpiroOMeTAD layers were prepared by spin coating. Layers of P3HT, PTAA, and SpiroOMeTAD of varying thicknesses were deposited by spin coating at 3000, 4000, 5000, or 6000 revolutions per minute (rpm). By repeating the 1000 rpm spin coating growth sequence once, twice, or three times, NiO x Layers were prepared. Experimental elements with various thicknesses were prepared for the p-type contact layer. After formation, the layers were heat-treated at temperatures ranging from 100 to 150°C for 30 to 120 minutes. Gold (Au) back-side contact was applied. The elements were characterized in the as-deposited state and after light soaking treatment.

[0043]

[0053] Figure 5 shows NiO x This shows a comparison of the performance characteristics of comparison elements with a p-type contact layer, such as P3HT, PTAA, or SpiroOMeTAD, against the current-voltage (IV) curve. The elements were tested with and without light soaking, and the tested elements included those with the various thicknesses mentioned above. PTAA demonstrated the best efficiency, with an efficiency gain of 1.55% compared to the control.

[0044]

[0054] Figure 6 shows a comparison of the performance characteristics of the aforementioned comparison elements with respect to the current-voltage (IV) curve under dark conditions.

[0055] Figure 7 shows a comparison of the performance characteristics of the aforementioned comparison elements, specifically the carrier concentration of the acceptor (Na) versus the depletion width (W) at the micron (μm) level. PTAA and SpiroOMeTAD show slightly higher carrier concentration levels. Experimental data confirm that the p-type contact layer has good conductivity and does not generate an increase in parasitic capacitance at the back interface.

[0045]

[0056] Figure 8 shows a comparison of the photoluminescence intensity performance characteristics of the aforementioned comparison elements.

[0057] The comparative performance characteristics shown in Figures 5-8 and the comparative test results demonstrate that the test structure was effective. Good efficiency, high ohmic contact, low shunting, and good carrier concentration levels were observed. The metrics show that the test structure performed similarly to or better than the control in several parameters.

[0046]

[0058] The device is prepared by exemplary method. The TCO on the glass can function as the front electrode. The absorber can be deposited directly on the TCO layer or on a buffer layer above the TCO layer. The absorber material includes a sublayer of cadmium telluride, zinc cadmium telluride, and / or cadmium telluride selenide comprising zinc telluride. Alternatively, the surface treatment may be performed on the absorber surface. This treatment may include doping, passivating the surface by cadmium chloride heat treatment, cleaning the surface with an acid or base, and removing oxides. The p-type contact material may then be deposited in contact with the treated surface of the absorber layer.

[0047]

[0059] The p-type contact material can be directly deposited to form a layer by various methods, including, for example, sputtering, spin coating, and vapor deposition. In one example, the p-type contact material includes PTAA. In one example, the structure of the thin-film junction laminate formed is TCO / CdSeTe / CdTe:As / PTAA. The partially formed element laminate may then be subjected to heat treatment, for example, by heating at 80-150°C for 30-120 minutes. Post-deposition heat treatment of the p-type contact may be performed using a hot plate, furnace, and / or pressure-controlled heating chamber. A conductive material may then be applied on top of the p-type contact layer.

[0048]

[0060] The conductive material may contain one or more metallic elements. The conductive material may contain metal alloys, nitrides, oxides, and / or oxynitrides. The conductive material may have sublayers of different compositions.

[0049]

[0061] For example, nickel oxide (NiO x An element having a p-type contact layer is prepared. Adjacent to the arsenic-doped p-type absorber containing a type II-VI alloy containing cadmium, tellurium, and selenium is NiO x An element is formed, comprising layers.

[0050]

[0062] Nickel oxide (NiO x The NiO layer possesses excellent chemical and thermal stability, facilitating manufacturing by maintaining important properties despite high temperatures and chemical passivation steps that may be used in subsequent processing steps following its deposition. High temperatures or prolonged heating may adversely affect some layers or components of the element, but NiO x NiO is resistant to these same conditions. x It does not react with arsenic dopant. NiO x Compared to organic p-type charge carrier contact layers, it has superior chemical stability, low light absorption, and relatively high mobility. NiO x It has a high conduction band edge and provides electron blocking. Undoped NiO xThe p-type conductivity in this material is largely due to nickel vacancies.

[0051]

[0063] Despite the subsequent processing steps, which may include prolonged exposure to high temperatures, the formed layer can retain its characteristics, therefore NiO x The use of NiO can be particularly beneficial when the p-type contact layer is part of a substrate laminate. In some embodiments, NiO x A substrate laminate containing the material is formed and then exposed to a temperature in the range of 400-700°C for 1-3 hours.

[0052]

[0064] In some embodiments, NiO is used as an interface layer for a p-type contact layer, with a thickness of only a few nanometers. x Forming a film is beneficial. The film quality is high, and the NiO film is extremely thin. x Depositing layers is often difficult. Controlling or properly adjusting the band structure is beneficial for achieving good energy alignment to selected II-VI type absorbers. NiO x It can be deposited by many different methods. For example, NiO x Layer preparation can be achieved by gas-phase transport deposition (VTD), magnetron sputtering, pulsed laser deposition, or thermal decomposition of nickel salts such as chlorides, nitrates, or acetates. NiO x The layers can be doped during deposition.

[0053]

[0065] In some embodiments, to prevent damage to the underlying layers of the laminate or to maintain the chemically passivated state of the absorber layer surface, a low-temperature method is used for NiO x Forming a p-type contact layer, such as a film, is beneficial. NiO x It can withstand high processing temperatures, but it can also be formed without using high-temperature methods. For example, the nickel oxide layer is made of nickel The elements are formed using a sol-gel prepared from a precursor containing a nickel compound such as rubis(acetylacetonate) or nickel (acac)2. The nickel compound is dissolved in a solvent such as 2-methoxyethanol (EGME) or methoxypropanol (PGME). A chelate base such as triethanolamine (TEOA) is added to form the sol-gel mixture. Optionally, a dopant is added to the sol-gel mixture. The mixture is then sonicated to form the sol-gel. The sol-gel is coated onto the partially formed elements. In one example, the sol-gel coating can be formed by dipping, roll coating, thermal spraying, blade coating, or spin coating. To suppress thermal exposure of the partially formed photovoltaic elements to the laminate, heat treatment is performed at relatively low temperatures or for short periods to remove NiO x The sol-gel coating may be cured.

[0054]

[0066] NiO x The film thickness can be varied in the range of approximately 2 to 100 nm by changing the concentration of the nickel oxide precursor. The nickel oxide precursor may be a nickel salt. In some embodiments, NiO x The precursor may be one or more of nickel chloride (NiCl2), nickel nitrate (Ni(NO3)2), or nickel acetate (Ni(CH3COO)2). In some embodiments, the chelating base is selected from triethanolamine, diethanolamine, ethanolamine, or Tris. In some embodiments, the dopant is selected from CuCl2, CuCl, CuI, CuSCN, LiCl, LiOAC, KCl, CsCl, CsI, MgCl2, or Mg(OAC)2. In some embodiments, the dopant may include one or more rare earth elements such as Li, Cs, Cu, Mg, Sr, or Er, Tb, or Eu. In some embodiments, NiO is used to generate the desired thickness. xThe precursor sol gel can be coated once or in multiple coats. In some embodiments, the curing temperature may be between 80°C and 400°C, and the curing time between 1 minute and 120 minutes. In some embodiments, the curing temperature is less than 350°C, less than 325°C, less than 250°C, or less than 200°C. In some embodiments, the curing temperature is in the range of 80°C to 250°C. In some embodiments, the curing time is between 5 minutes and 60 minutes. In some embodiments, the curing time is between 1 minute and 30 minutes. In some embodiments, the curing time is less than 35 minutes, less than 25 minutes, or less than 15 minutes.

[0055]

[0067] Before forming the p-type back surface contact, the back surface of the absorber layer can be used for passivation. In CdTe-based absorber materials containing doped ternary and quaternary alloys with equal amounts of cadmium and tellurium, alkali treatment can produce a Cd-rich surface. A p-type contact layer may be formed by direct contact above the Cd-rich back surface to form an absorber interface, which may beneficially provide a reduction in the surface recombination rate at the absorber interface. However, this benefit may be negated by high-temperature formation of the p-type back surface contact layer, such as by depositing a nitrogen-doped zinc telluride layer above the passivated surface of the absorber layer by gas-phase transport deposition.

[0056]

[0068] Maintaining high temperatures can reduce the benefits of the passivation step or damage the layers of a partially formed element layer laminate. To maintain absorber passivation and the integrity of the layer laminate, the treatment following the passivation of the absorber surface is selected so as not to expose the intermediate structure with the absorber layer above the substrate laminate to high temperatures or other conditions that could cause damage. Many p-type contact materials, including most organic polymer hole transport materials, are susceptible to damage from heat, moisture, corrosive liquids, and some solvents. Due to these limitations, many processes used with other photovoltaic elements or on previously deposited layers may not be suitable for the treatment steps following the Cd enrichment step of the absorber layer.

[0057]

[0069] In some embodiments, the step of depositing a layer using a low-temperature method may involve thermal deposition, spray pyrolysis, closed sublimation (CSS), chemical vapor deposition (CVD), atomic layer deposition (ALD), or spin-coating. The coating is carried out by at least one of the following: coating, thermal spraying, slot die coating, blade coating, roll coating, dipping coating, inkjet printing, or sol-gel coating. In some embodiments, the step of depositing the layer using a low-temperature method is carried out at a substrate temperature of 150°C or less, 120°C or less, or 100°C or less, to prevent overheating of the substrate layer laminate during the deposition process.

[0058]

[0070] Passivation of the absorber surface may be carried out by alkaline chemical surface cleaning, which may further provide surface cleaning, removal of surface organic contaminants, and removal of oxides. The terms “cleaning” or “washing” include supplying, exposing, or contacting a surface, such as the back surface of the absorber layer, with a cleaning fluid. In non-limiting examples, the surface may be at least partially submerged in the bath by immersion in the cleaning fluid, or the cleaning fluid may be applied to the substrate by spraying, coating, painting, flowing, or other methods, so that at least a portion of the surface is in contact with the bath. Furthermore, the surface of a partially formed element may be subjected to surface cleaning or passivation in a continuous process, such as by a conveyor that continuously moves the substrate in and out of the cleaning fluid, or in a batch process.

[0059]

[0071] Te-rich surfaces, which have unpassivated excess Te detectable by the Raman sign of Te-Te bonds, exhibit greater recombination and reduced photoluminescence of the film surface. Alkaline etching or passivation using a cleaning fluid is performed to reduce surface Te dangling bonds and adjust the surface stoichiometry to a desired ratio. For example, methods for adjusting the surface stoichiometry of a semiconductor material include adjusting the concentration of the cleaning fluid to achieve a desired stoichiometric ratio on the surface of the semiconductor material, and subjecting the semiconductor material to passivation cleaning using the cleaning fluid. The surface ratio of Cd to Te in a CdTe substrate can be modified by adjusting the pH of the cleaning fluid. A substantially stoichiometric CdTe surface can be modified to have a Cd-rich surface using alkaline cleaning with a pH level of approximately 8–14. In some embodiments, the pH level of the cleaning fluid is 11–13. Cleaning passivation methods can be used to optimize the chemical and electronic properties of the back-facing contact surface.

[0060]

[0072] In some embodiments, the cleaning fluid contains hydroxides. In some embodiments, the cleaning fluid contains an aqueous solution of sodium hydroxide (NaOH), potassium hydroxide (KOH), or tetramethylammonium hydroxide ((CH3)4N(OH)), also known as TMAH. In some embodiments, the cleaning fluid contains KOH. In some embodiments, the cleaning fluid contains KOH at concentrations ranging from about 0.001 M to about 11.67 M, from 0.500 M to 4.000 M, from 1.500 M to 2.750 M, or from 1.750 M to 2.000 M. In some embodiments, the cleaning fluid contains 1.946 M KOH. In some embodiments, the cleaning fluid is in contact with the surface for a contact time ranging from 10 seconds to 90 minutes. In some embodiments, the contact time is in the range of 30 seconds to 30 minutes, or from 30 seconds to 10 minutes. In some embodiments, the contact time is 1 minute. In some embodiments, the temperature of the cleaning fluid is in the range of 0°C to 90°C. In some embodiments, the temperature of the cleaning fluid is in the range of 20°C to 30°C. In some embodiments, the temperature of the cleaning fluid is in the range of 5°C to 50°C, or in the range of 15°C to 35°C. In some embodiments, after contact with KOH, the absorbent surface is rinsed with water.

[0061]

[0073] In some embodiments, the ratio of Cd to Te (Cd:Te) on the Cd-rich surface of the absorber layer is in the range of 1:1 to 4:1. In some embodiments, the ratio of Cd to Te on the Cd-rich surface of the absorber layer is greater than 1:1. In some embodiments, the ratio of Cd to Te on the Cd-rich surface of the absorber layer, as measured by XPS, is between 1.3:1 and 2.5:1.

[0062]

[0074] In the exemplary method, following the passivation step, p containing a hole transport material (HTM) is used. A type back surface contact is formed above the Cd-rich surface of the absorber layer. In some embodiments, the absorber layer comprises multiple sublayers, the sublayers in contact with the back surface essentially consisting of cadmium telluride, doped cadmium telluride, or a ternary or quaternary alloy containing cadmium and tellurium. In one example, the absorber layer comprises multiple sublayers, the sublayers in contact with the back surface essentially consisting of arsenic-doped cadmium telluride.

[0063]

[0075] Hole transport materials (HTMs) possess high hole mobility and low electron affinity. Therefore, when a small number of carriers (electrons) reach the back-surface contact interface, the HTM prevents their transport through the p-type contact, minimizing interfacial recombination, while allowing for the easy transport of a large number of carriers (holes). The p-type contact layer is deposited at low temperatures to maintain the chemical passivation state of the absorber surface. The p-type contact layer is deposited on a cadmium-rich or stoichiometric CdTe-containing surface, which is created by treating a grown polycrystalline CdTe film with one or more basic solutions, such as potassium hydroxide or tetramethylammonium hydroxide. While not wishing to be constrained by theory, the p-type layer weakly interacts with the CdTe surface via van der Waals interactions or hydrogen bonding. The p-type layer has a large conduction band offset with CdTe to block electron recombination at metal contact, and a small valence band offset to enable efficient hole transport. Since the diffusion distance of photogenerated minority carriers becomes comparable to the thickness of the absorber film, the recombination rate value of the back contact surface can significantly contribute to the overall device recombination current. Furthermore, for bifacial photodetector solar cell designs, a reduction in recombination at the back contact surface has a strong impact on the potential for improved efficiency from open-circuit voltage and back illumination. A reduction in the back contact recombination rate can enable photovoltaic devices with improved minority carrier lifetime and higher open-circuit voltage (Voc).

[0064]

[0076] The selected HTM (High-Temperature Microlayer) significantly favors hole conduction over electron transport, improving hole selectivity at the back surface contact. Since these p-type contact layers can be deposited or formed at relatively low temperatures (e.g., ≤100°C), modifications to the back surface contact can be made with relatively minimal impact on the front surface junction, absorber passivation, and bulk properties of the absorber material. Photovoltaic devices using the described p-type contact layers exhibit increased photoluminescence intensity and open-circuit voltage, demonstrating improved hole selectivity.

[0065]

[0077] Referring to Figures 9-10, a series of elements were prepared and their performance was compared. Solar cell element stacks with high-quality bulk material were prepared using arsenic-doped CdSeTe and CdTe alloy films as absorber layers and subjected to CdCl2 treatment. Different back-surface treatments were performed and compared to evaluate the processes that produce Te-rich or Cd-rich absorber layer surfaces.

[0066]

[0078] After surface treatment, HTM deposition was performed. A high hole mobility material, poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine (PTAA)], was used as the conductive hole transport layer. PTAA was either undoped or doped with F4-TCNQ. The PTAA solid material was dissolved in chlorobenzene solvent. This layer was spin-coated onto the CdTe film and subsequently fired on a hot plate. The solar cell was completed by thermal deposition of a metal layer and solder wire for contact with the front contact, which contained a transparent conductive oxide layer.

[0067]

[0079] The photoluminescence intensity of the surface-treated absorber layer film was measured on both the front glass surface and the back film surface under illumination at an intensity equivalent to 100 times the sunlight intensity using a 660nm laser. This data was supplemented with photoluminescence images obtained using the LIS-P2 luminescence tool. Raman microscopy was also performed on the treated surface. Current-voltage (IV) element performance was measured on the completed solar cell.

[0068]

[0080] Figure 9A shows back-surface photoluminescence (PL) images for different surface treatments. From top to bottom, the samples are untreated, Te-rich, and Cd-rich. The left column shows the elements measured immediately after surface treatment and before PTAA coating. The right column shows the elements measured after PTAA coating and before the application of the metal layer.

[0069]

[0081] Spin-coated PTAA did not significantly affect the PL measured for untreated samples, indicating that PTAA does not have a significant passivation effect on itself. PTAA deposition showed a partial reduction in photoluminescence on the Cd-rich surface, but still maintained a high PL.

[0070]

[0082] The measurement of photoluminescence intensity may be susceptible to the spatial heterogeneity of the CdTe film, particularly at high PL intensities. As shown in Figure 9A, photoluminescence imaging provides a useful method to confirm these results, showing a significant decrease in PL on Te-rich surfaces and a significant increase on Cd-rich surfaces. Films with Cd-rich surfaces show a partial decrease in PL intensity after PTAA deposition, while Te-rich surfaces show no change or only a slight decrease in PL. Untreated surfaces show little change in PL after PTAA deposition.

[0071]

[0083] Figure 9B shows a comparison of front-side photoluminescence images for treated and untreated absorber surfaces, and for elements with and without a PTAA layer. The top two samples show results for untreated absorber layers, while the bottom two samples show results for absorbers whose back surfaces were treated with potassium hydroxide (KOH) washing. Note the different scale bars for the last sample. The top and bottom samples show results for elements with a metal layer above the absorber without an HTM layer. The two middle samples show results for elements with a PTAA layer between the metal layer and the absorber layer. Black squares represent high recombination at metal contact.

[0072]

[0084] Photoluminescence images obtained from the front surface show increased non-luminescent recombination in the untreated metal-contact region. Samples with PTAA demonstrate the ability to reduce this recombination pathway while maintaining high PL in the metal-contact region. PTAA demonstrates its effectiveness in blocking electron recombination at the back metal contact regardless of surface treatment. Furthermore, Cd-rich treated surfaces without PTAA HTM lose much of their passivation after metal-contact deposition, indicating that HTM helps maintain high passivation levels in the finished device.

[0073]

[0085] Photoluminescence intensity data showed a strong contrast between the untreated surface and the Cd-rich surface. Te-rich surfaces have been used in the past to generate ohmic contacts, but this is thought to lead to an increase in non-luminescent recombination. This is shown by the significant decrease in PL intensity on the Te-rich surface in Figure 9A. Similarly, the Cd-rich surface showed a dramatic increase in PL intensity. PL measurements on the back surface are a more direct measurement of the passivation quality of the back surface. PL on the front surface better indicates the overall minority carrier lifetime within the device and is therefore less affected by back surface treatment and more affected by bulk quality. The increase in front surface PL observed after treatment of the Cd-rich back surface indicates that this treatment significantly reduces non-luminescent recombination of photogenerated carriers diffusing from the front surface, indicating its impact on the Voc of the solar cell.

[0074]

[0086] Figure 10 provides results for solar cell devices showing Voc and FF for samples with a PTAA hole transport layer. Cd-rich surfaces showed favorable results regarding photoluminescence, producing the highest device Voc values. Samples with Te-rich surfaces showed a decrease in average Voc, which is correlated with the decrease in photoluminescence of these Te-rich surfaces. Untreated PTAA did not have a clear effect on Voc. QE As confirmed by measurements, no significant changes in Jsc were observed between samples. Devices using a combination of both a Cd-rich surface and PTAA hole transport material reached a maximum Voc value of 858 mV.

[0075]

[0087] A CdTe solar cell with improved back-side contact passivation was demonstrated using a PTAA hole transport material deposited on a Cd-rich surface. The high Voc of the device depends on the combination of these two components. The surface treatment that produces a Cd-rich surface enables passivation of the CdTe surface, increasing the PL, but this passivation is not maintained after metal-contact deposition. This is explained by the inherently high surface recombination rate of the metal-semiconductor contact. The introduction of an additional PTAA layer provides a barrier to electrons reaching the back-side metal contact. However, the PTAA itself does not provide a large passivation effect. The measured photoluminescence behavior is in good agreement with the final device Voc result.

[0076]

[0088] In another example, the performance of an element with PTAA deposited on top of a Cd-rich absorber surface was compared to an element with a p-type back-surface contact of nitrogen-doped zinc telluride (ZnTe:N). The absorber surface of the PTAA element was treated with an aqueous alkaline cleaning solution having a concentration in the range of 0.01 M to 4 M KOH for 10 to 180 seconds, and the PTAA was deposited by thermal deposition, followed by the application of metal contact. The absorber surface of the comparison element was treated with a hydrochloric acid (HCl) acid cleaning solution, and a layer of ZnTe:N was deposited by sputtering, followed by the application of metal contact. The element with the PTAA p-type back-surface contact showed an average Voc gain of 15 to 20 mV compared to the comparison element with the ZnTe:N p-type back-surface contact.

[0077]

[0089] In another example, devices with different p-type contact layers were prepared and their performance compared. Devices were prepared with p-type contact layers formed from selected HTMs, including PTAA, PIF8-TAA, poly-TPD, TFB, and PF8-TAA. The selected HTMs were deposited on top of the absorber layer. The absorber layer was formed from sublayers containing CdSe and CdTe. Surface doping was performed using arsenic dopants, and partially formed devices were heat-treated with CdCl2. Devices prepared and evaluated with the selected HTMs showed good performance characteristics.

[0078]

[0090] For example, the p-type contact layer is made of semiconductor polymer, polytriarylamine, PTAA, poly-TPD, TFB, PF8-TAA, PIF8-TAA, P3HT, PDI, CPB, TCTA, TCP, PCDTBT, anthracene-based HTM, Spiro-OMeTAD, NiO x It includes at least one HTM selected from CuSCN, CuI, or a combination thereof.

[0079]

[0091] In one example, the structure of the thin-film bonded laminate is TCO / CdSeTe / CdTe / PTAA. In another example, the structure of the thin-film bonded laminate is TCO / CdSeTe / CdTe:As / PTAA. In yet another example, the structure of the thin-film bonded laminate is TCO / CdSeTe / CdTe:As / CdZnTe / PTAA. In yet another example, the structure of the thin-film bonded laminate is TCO / CdSeTe / CdTe:As / PTAA / ZnTe. In yet another example, the structure of the thin-film bonded laminate is TCO / CdSeTe / CdTe:As / CdZnTe / PTAA / NiO x For example, the structure of a thin-film bonded laminate is TCO / CdZnTe / PTAA.

[0080]

[0092] The thin-film junction laminate of the described element structure can be adapted for use in tandem photovoltaic elements or in two-sided modules.

[0093] According to embodiments provided herein, the p-type contact layer may include one or more functional layers of the material.

[0081]

[0094] In some embodiments, the conductive layer is positioned above the thin-film bonding laminate, adjacent to the p-type contact layer. In some embodiments, the conductive layer is made of silver, nickel, copper, aluminum, or titanium. The conductive layer includes a metal selected from palladium, chromium, molybdenum, or gold. In some embodiments, the conductive layer includes a nitrogen-containing metal layer such as aluminum nitride, nickel nitride, titanium nitride, tungsten nitride, selenium nitride, tantalum nitride, or vanadium nitride.

[0082]

[0095] In some embodiments, the p-type contact layer can have an average transmittance of more than 70% for light having wavelengths of 400 nm to 700 nm. Optionally, the p-type contact layer 180 can have an average transmittance of more than 50% for light having wavelengths of 400 nm to 1000 nm, for example, more than 85% in one embodiment, more than 90% in another embodiment, or more than 95% in a further embodiment.

[0083]

[0096] The thickness of the p-type contact layer may be less than approximately 500 nm, for example, about 0.5 nm to about 100 nm in one embodiment, or about 5 nm to about 50 nm in another embodiment.

[0097] Suitable materials for the p-type contact layer 180 include, for example, PTAA, P3HT, PEDOT:PSS, Spiro-OMeTAD, SAF-OMe, SGT-407, condensation-F, OMeTPA-FA, α-NPD, TIPS-pentacene, PCPDTBT, PCDTBT, quinolidinoacridine, TTF-1, and NiO x Examples of such materials include graphene oxide, CuSCN, CuI, or Cu2O. These can be doped with impurities to alter their electrical and optical properties.

[0084]

[0098] Unexpectedly, PTAA and NiO xIt has been found to demonstrate an excellent combination of optical and electrical properties for use in semiconductor absorbers containing cadmium and tellurium. Furthermore, PTAA or NiO formed adjacent to a type II-VI semiconductor doped with a group V dopant such as arsenic, antimony, or bismuth. x The layer provides excellent performance properties. Furthermore, PTAA and NiO x It is compatible with high-temperature manufacturing processes compared to many other materials.

[0085]

[0099] Here, it should be understood that the functional layer of the p-type contact layer can provide ohmic contact with improved passivation to the absorber, while at the same time providing comparable functionality and reliability to known p-type contact layers for type II-VI absorber materials. Accordingly, the embodiments provided herein can improve the usefulness of photovoltaic elements.

[0086]

[0100] According to embodiments described herein, the photovoltaic element is a type II-VI semiconductor The following may be included: an absorber layer on a substrate laminate; a p-type contact layer on the absorber layer containing at least one of PTAA, P3HT, TTF-1, SGT-407, SpiroOMeTAD, NiO, CuSCN, or CuI; and a conductive layer on the p-type contact layer.

[0087]

[0101] In some embodiments, the absorbent layer contains cadmium selenide telluride; absorb The body layer is doped with at least one dopant selected from arsenic, antimony, or bismuth; the p-type contact layer contains PTAA, P3HT, TTF-1, SGT-407, Spiro, or NiO.

[0088]

[0102] In some embodiments, the absorber layer contains copper-doped cadmium telluride. nothing.

[0103] According to embodiments described herein, a p-type contact layer for a photovoltaic element is provided. In some embodiments, the p-type contact layer is provided with a substantially uniform thickness over the entire surface of the directly adjacent passivated absorber layer. In some embodiments, the p-type contact layer is provided with a substantially continuous coverage of 90% to 100% with a substantially uniform thickness over the directly adjacent absorber layer surface. In some embodiments, the p-type contact layer is provided with discontinuous coverage over a portion of the absorber layer surface. In some embodiments, the p-type contact layer is provided with discontinuous coverage over 10% to 25% of the absorber surface. In some embodiments, a p-type contact layer is provided for selective regional contact. In some embodiments, the photovoltaic element includes an absorber layer having a type II-VI semiconductor. In some embodiments, the p-type contact layer includes a PTAA layer in contact with the absorber layer, and the PTAA layer has a continuous or discontinuous coating with a thickness of 0.5 nm to 500 nm. In some embodiments, the thickness of the p-type contact layer is in the range of 0.5 nm to 100 nm, 5 nm to 200 nm, 5 nm to 50 nm, 10 nm to 100 nm, or 10 nm to 50 nm.

[0089]

[0104] In some embodiments, the p-type contact layer is an absorber layer having a type II-VI semiconductor. It includes a contacting PTAA layer, the PTAA layer having a thickness of 10-100 nm, the type II-VI semiconductor contains cadmium, tellurium, selenium, and zinc, and the type II-VI semiconductor is doped with arsenic.

[0090]

[0105] Embodiments described herein provide a method for fabricating a photovoltaic element. The method comprises the steps of: depositing type II-VI semiconductors on top of a substrate stack to form an absorber layer; depositing a p-type contact layer on top of the absorber layer, wherein the p-type contact layer comprises at least one of PTAA, P3HT, TTF-1, SGT-407, Spiro, NiO, CuSCN, or CuI; and depositing a conductive layer on top of the p-type contact layer.

[0091]

[0106] In some embodiments, this method is performed at a temperature in the range of 80 to 150°C at least The process includes heating the p-type contact layer for 2 minutes, 10–120 minutes, 30–120 minutes, or 5–60 minutes before depositing the conductive layer. In some embodiments, the heat treatment of the p-type contact may be performed using a hot plate, furnace, and / or pressure-controlled heating chamber.

[0092]

[0107] In some embodiments, the p-type contact layer is NiO deposited by sputtering. x Includes.

[0108] In some embodiments, the step of forming the absorber layer involves depositing a p-type contact layer. The process further includes doping, passivation, and removing oxides from type II-VI semiconductors, prior to the doping step.

[0093]

[0109] In some embodiments, the p-type contact layer is made of a polymer, small molecules, or inorganic compound. be.

[0110] In some embodiments, the p-type contact layer is PTAA, P3HT, or PEDOT :Includes a polymer selected from PSS. In some embodiments, the p-type contact layer is PTAA.

[0094]

[0111] In some embodiments, the p-type contact layer is Spiro-OMeTAD, SAF-O Contains small molecules selected from Me, OMeTPA-FA, or TTF-1.

[0112] In some embodiments, the p-type contact layer is NiO x CuSCN, CuI, Cu2 It contains an inorganic compound selected from O. In some embodiments, the p-type contact layer is NiO x That is the case.

[0095]

[0113] The terms "substantially" and "about" refer to quantitative comparisons, values, measurements, or other tables. It should be noted that these terms may be used herein to express the degree of inherent uncertainty that may actually arise. These terms are also used herein to express the extent to which a quantitative expression may deviate from the given standard without altering the fundamental function of the subject matter in question.

[0096]

[0114] While specific embodiments have been illustrated and described herein, it should be understood that various other changes and modifications may be made without departing from the spirit and scope of the claimed subject matter. Furthermore, while various aspects of the claimed subject matter have been described herein, these aspects do not need to be used in combination. Therefore, the attached claims are intended to encompass all such changes and modifications that fall within the scope of the claimed subject matter. [Modes of the Invention] [1] A method for fabricating a photovoltaic element, An absorber layer is formed on top of the substrate laminate, where the absorber layer comprises type II-VI semiconductor materials, the type II material contains cadmium (Cd), and the type VI material contains tellurium (Te); To create a Cd-rich surface with a Cd-to-Te ratio of 1:1 or greater by bringing an alkaline cleaning fluid containing hydroxide into contact with the second surface of the absorbent layer; Depositing a p-type contact layer above the absorber layer, thereby the p-type contact layer being directly adjacent to the Cd-rich layer, and the p-type contact layer comprising at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, PF8-TAA, PIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconductor polymer, NiO, CuSCN, or CuI; and Depositing a conductive layer on top of the p-type contact layer Methods that include... [2] The method according to claim 1, wherein the step of depositing a p-type contact layer is performed at a substrate temperature of 150°C or lower. [3] The method according to claim 1, wherein the hydroxide comprises at least one of sodium hydroxide (NaOH), potassium hydroxide (KOH), or tetramethylammonium hydroxide ((CH3)4N(OH))TMAH. [4] The method according to claim 1, wherein the p-type contact layer comprises PIF8-TAA, poly-TPD, or undoped or F4-TCNQ-doped PTAA. [5] The method according to claim 1, wherein the absorbent layer is doped with at least one dopant selected from phosphorus, arsenic, antimony, or bismuth. [6] The method according to claim 1, wherein the Cd-rich surface has a Cd:Te ratio of 1:1 to 4:1. [7] The method according to claim 1, wherein the p-type contact layer is deposited by slot die coating, blade coating, roll coating, thermal spraying, spin coating, vapor deposition, or sol-gel formation. [8] A photovoltaic element, An absorber layer on a substrate laminate containing type II-VI semiconductors, where the type II material contains cadmium (Cd) and the type VI material contains tellurium (Te); A p-type contact layer on an absorber layer comprising at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, PF8-TAA, PIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconductor polymer, NiO, CuSCN, or CuI; and Conductive layer on p-type contact layer A photovoltaic element comprising a p-type contact layer directly adjacent to the second surface of the absorber layer at the passivated interface, the second surface of the absorber layer being a Cd-rich surface with a Cd:Te ratio of 1:1 or greater. [9] The photovoltaic element according to claim 8, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

[10] The photovoltaic element according to claim 8, wherein the absorber layer is doped with at least one dopant selected from phosphorus, arsenic, antimony, or bismuth; and the p-type contact layer comprises PIF8-TAA, PF8-TAA, poly-TPD, TFB, or PTAA.

[11] A photovoltaic element, An absorber layer on a substrate laminate containing type II-VI semiconductors; PTAA, P3HT, TTF-1, SGT-407, SpiroOMeTAD, NiO x A p-type contact layer on an absorber layer comprising at least one of CuSCN or CuI; and Conductive layer on p-type contact layer A photovoltaic element, including a photovoltaic element.

[12] The photovoltaic element according to claim 11, wherein the p-type contact layer includes PTAA.

[13] The absorbent layer contains cadmium selenide telluride; The absorbent layer is doped with at least one dopant selected from arsenic, antimony, or bismuth; The p-type contact layer is PTAA, P3HT, TTF-1, SGT-407, SpiroOMeTAD, or NiO x including, The photovoltaic element according to claim 11.

[14] The photovoltaic element according to claim 11, wherein the absorber layer contains copper-doped cadmium selenide telluride.

[15] The photovoltaic element according to claim 11, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

[16] The conductive layer is adjacent to the p-type contact layer. The conductive layer comprises at least one metal or metal nitride. The photovoltaic element according to claim 1.

[17] A p-type contact layer for a photovoltaic element, wherein the photovoltaic element includes an absorber layer having a type II-VI semiconductor, and the p-type contact layer includes a PTAA layer in contact with the absorber layer, and the PTAA layer has a thickness in the range of 0.5 nm to 100 nm.

[18] The p-type contact layer according to claim 17, wherein the PTAA layer has a thickness in the range of 5 nm to 50 nm.

[19] The p-type contact layer according to claim 17, wherein the type II-VI semiconductor comprises cadmium, tellurium, selenium, and zinc, and the type II-VI semiconductor is doped with arsenic.

[20] A method for fabricating a photovoltaic element, An absorber layer is formed on top of the substrate laminate, where the absorber layer contains type II-VI semiconductor material; Depositing a p-type contact layer above the absorber layer, where the p-type contact layer comprises at least one of PTAA, P3HT, TTF-1, SGT-407, SpiroOMeTAD, NiO, CuSCN, or CuI; and Depositing a conductive layer on top of the p-type contact layer A method that includes this. [twenty one] The method according to claim 20, wherein the p-type contact layer is heated to a temperature in the range of 80 to 150°C before the step of depositing the conductive layer. [twenty two] The method according to claim 21, wherein the heat treatment of the p-type contact layer is performed using a hot plate, a furnace, or a pressure-controlled heating chamber. [twenty three] The method according to claim 20, wherein the p-type contact layer is deposited by slot die coating, blade coating, roll coating, thermal spraying, spin coating, vapor deposition, or sol-gel formation. [twenty four] The p-type contact layer is deposited by sputtering NiO x The method according to claim 20, including the method described in claim 20. [twenty five] The method according to claim 20, wherein forming the absorber layer further comprises doping, passivating, and removing oxides from the type II-VI semiconductor before depositing the p-type contact layer.

[26] The method according to claim 20, wherein the p-type contact layer includes PTAA.

[27] The absorbent layer contains cadmium selenide telluride; The absorbent layer is doped with at least one dopant selected from arsenic, antimony, or bismuth; and The p-type contact layer is PTAA, P3HT, TTF-1, SGT-407, SpiroOMeTAD, or NiO x including, The method according to claim 20.

[28] The method according to claim 20, wherein the absorbent layer comprises copper-doped cadmium selenide telluride.

[29] The method according to claim 20, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

[30] The method according to claim 20, wherein the conductive layer is adjacent to a p-type contact layer, and the conductive layer comprises at least one metal or metal nitride.

[31] p-type contact layer is used in slot die coating, blade coating, and roll coating. The method according to claim 21 or 22, wherein the material is deposited by spray coating, spin coating, vapor deposition, or sol-gel formation.

[32] The p-type contact layer is deposited by sputtering NiO x The method according to claim 21 or 22, including the method described in claim 21 or 22.

[33] The method according to any one of claims 21, 22 or 31, 32, wherein the step of forming the absorber layer further comprises doping, passivating, and removing oxides from the type II-VI semiconductor before depositing the p-type contact layer.

[34] The method according to any one of claims 21, 22, or 31 to 33, wherein the p-type contact layer comprises PTAA.

[35] The absorbent layer contains cadmium selenide telluride; The absorbent layer is doped with at least one dopant selected from arsenic, antimony, or bismuth; The p-type contact layer is made of PTAA, P3HT, TTF-1, SGT-407, SpiroOMeTAD, or NiO x including, The method according to any one of claims 21, 22, or 31 to 34.

[36] The method according to any one of claims 21, 22, or 31 to 34, wherein the absorbent layer comprises copper-doped cadmium selenide telluride.

[37] The method according to any one of claims 21, 22, or 31 to 36, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

[38] The method according to any one of claims 21, 22, or 31 to 37, wherein the conductive layer is adjacent to a p-type contact layer, and the conductive layer comprises at least one metal or metal nitride.

[39] The photovoltaic element according to claim 13, wherein the p-type contact layer includes PTAA.

[40] The photovoltaic element according to claim 12, wherein the absorber layer contains copper-doped cadmium selenide telluride.

[41] A photovoltaic element according to any one of claims 12, 13 or 39, 40, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

[42] The conductive layer is adjacent to the p-type contact layer. The conductive layer comprises at least one metal or metal nitride. A photovoltaic element according to claim 12, 13, or any of claims 39 to 41.

[43] The p-type contact layer according to any one of claims 11, 19, 39, 40, or 42, wherein the p-type contact layer has a thickness in the range of 5 nm to 50 nm.

[44] The p-type contact layer according to any one of claims 11, 18, 39, or 41 to 43, wherein the type II-VI semiconductor comprises cadmium, tellurium, selenium, and zinc, and the type II-VI semiconductor is doped with arsenic.

Claims

1. A method for fabricating a photovoltaic element, An absorber layer is formed on top of the substrate laminate, where the absorber layer comprises type II-VI semiconductor materials, the type II material comprises cadmium (Cd), and the type VI material comprises tellurium (Te); To bring an alkaline cleaning fluid containing hydroxide into contact with the second surface of the absorbent layer to create a Cd-rich surface in which the ratio of Cd to Te is 1:1 or greater; Depositing a p-type contact layer above the absorber layer, thereby the p-type contact layer being directly adjacent to the Cd-rich layer, and the p-type contact layer comprising at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, PF8-TAA, PIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconductor polymer, NiO, CuSCN, or CuI; and Depositing a conductive layer on top of the p-type contact layer Methods that include...

2. The method according to claim 1, wherein the step of depositing a p-type contact layer is performed at a substrate temperature of 150°C or lower.

3. Hydroxides include sodium hydroxide (NaOH), potassium hydroxide (KOH), or tetramethylammonium hydroxide ((CH)). ３ ) ４ The method according to claim 1, comprising at least one of N(OH))TMAH.

4. The method according to claim 1, wherein the p-type contact layer comprises PIF8-TAA, poly-TPD, or undoped or F4-TCNQ-doped PTAA.

5. The method according to claim 1, wherein the absorbent layer is doped with at least one dopant selected from phosphorus, arsenic, antimony, or bismuth.

6. The method according to claim 1, wherein the Cd-rich surface has a Cd:Te ratio of 1:1 to 4:

1.

7. The method according to claim 1, wherein the p-type contact layer is deposited by slot die coating, blade coating, roll coating, thermal spraying, spin coating, vapor deposition, or sol-gel formation.

8. A photovoltaic element, An absorber layer on a substrate laminate containing type II-VI semiconductors, wherein the type II material contains cadmium (Cd) and the type VI material contains tellurium (Te); A p-type contact layer on an absorber layer comprising at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, PF8-TAA, PIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconductor polymer, NiO, CuSCN, or CuI; and conductive layer on p-type contact layer A photovoltaic element comprising a p-type contact layer, the p-type contact layer being directly adjacent to the second surface of the absorber layer at the passivated interface, the second surface of the absorber layer being a Cd-rich surface, and the ratio of Cd to Te being 1:1 or greater.

9. The photovoltaic element according to claim 8, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

10. The photovoltaic element according to claim 8, wherein the absorber layer is doped with at least one dopant selected from phosphorus, arsenic, antimony, or bismuth; and the p-type contact layer comprises PIF8-TAA, PF8-TAA, poly-TPD, TFB, or PTAA.

11. A photovoltaic element, An absorber layer on a substrate laminate containing type II-VI semiconductors; PTAA, P3HT, TTF-1, SGT-407, SpiroOMeTAD, NiO ｘ A p-type contact layer on an absorber layer comprising at least one of CuSCN or CuI; and conductive layer on p-type contact layer A photovoltaic element, including a photovoltaic element.

12. The photovoltaic element according to claim 11, wherein the p-type contact layer contains PTAA.

13. The absorbent layer contains cadmium selenide telluride; The absorbent layer is doped with at least one dopant selected from arsenic, antimony, or bismuth; The p-type contact layer is PTAA, P3HT, TTF-1, SGT-407, SpiroMeTAD, or NiO ｘ including, The photovoltaic element according to claim 11.

14. The photovoltaic element according to claim 11, wherein the absorber layer contains copper-doped cadmium selenide telluride.

15. The photovoltaic element according to claim 11, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

16. The conductive layer is adjacent to the p-type contact layer. The conductive layer comprises at least one metal or metal nitride. The photovoltaic element according to claim 1.

17. A p-type contact layer for a photovoltaic element, wherein the photovoltaic element includes an absorber layer having a type II-VI semiconductor, and the p-type contact layer includes a PTAA layer in contact with the absorber layer, and the PTAA layer has a thickness in the range of 0.5 nm to 100 nm.

18. The p-type contact layer according to claim 17, wherein the PTAA layer has a thickness in the range of 5 nm to 50 nm.

19. The p-type contact layer according to claim 17, wherein the type II-VI semiconductor comprises cadmium, tellurium, selenium, and zinc, and the type II-VI semiconductor is doped with arsenic.

20. A method for fabricating a photovoltaic element, An absorber layer is formed on top of the substrate laminate, where the absorber layer contains type II-VI semiconductor material; A p-type contact layer is deposited above the absorber layer, wherein the p-type contact layer comprises at least one of PTAA, P3HT, TTF-1, SGT-407, SpiroOMeTAD, NiO, CuSCN, or CuI; and Depositing a conductive layer on top of the p-type contact layer A method that includes this.

21. The method according to claim 20, wherein the p-type contact layer is heated to a temperature in the range of 80 to 150°C before the step of depositing the conductive layer.

22. The method according to claim 21, wherein the heat treatment of the p-type contact layer is performed using a hot plate, a furnace, or a pressure-controlled heating chamber.

23. The method according to claim 20, wherein the p-type contact layer is deposited by slot die coating, blade coating, roll coating, thermal spraying, spin coating, vapor deposition, or sol-gel formation.

24. The p-type contact layer is deposited by sputtering NiO ｘ The method according to claim 20, including the method described in claim 20.

25. The method according to claim 20, wherein forming the absorber layer further comprises doping, passivation, and removing oxides from the type II-VI semiconductor before depositing the p-type contact layer.

26. The method according to claim 20, wherein the p-type contact layer contains PTAA.

27. The absorbent layer contains cadmium selenide telluride; The absorbent layer is doped with at least one dopant selected from arsenic, antimony, or bismuth; and The p-type contact layer is PTAA, P3HT, TTF-1, SGT-407, SpiroMeTAD, or NiO ｘ including, The method according to claim 20.

28. The method according to claim 20, wherein the absorbent layer contains copper-doped cadmium selenide telluride.

29. The method according to claim 20, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

30. The method according to claim 20, wherein the conductive layer is adjacent to the p-type contact layer, and the conductive layer comprises at least one metal or metal nitride.

31. The method according to claim 21 or 22, wherein the p-type contact layer is deposited by slot die coating, blade coating, roll coating, spray coating, spin coating, vapor deposition, or sol-gel formation.

32. The p-type contact layer is deposited by sputtering NiO ｘ The method according to claim 21 or 22, including the method according to claim 21 or 22.

33. The method according to any one of claims 21, 22 or 31, 32, wherein the step of forming the absorber layer further comprises doping, passivating, and removing oxides from the type II-VI semiconductor before depositing the p-type contact layer.

34. The method according to any one of claims 21, 22, or 31 to 33, wherein the p-type contact layer contains PTAA.

35. The absorbent layer contains cadmium selenide telluride; The absorbent layer is doped with at least one dopant selected from arsenic, antimony, or bismuth; The p-type contact layer is PTAA, P3HT, TTF-1, SGT-407, SpiroMeTAD, or NiO ｘ including, The method according to any one of claims 21, 22, or 31 to 34.

36. The method according to any one of claims 21, 22, or 31 to 34, wherein the absorbent layer comprises copper-doped cadmium selenide telluride.

37. The method according to any one of claims 21, 22, or 31 to 36, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

38. The method according to any one of claims 21, 22, or 31 to 37, wherein the conductive layer is adjacent to the p-type contact layer, and the conductive layer comprises at least one metal or metal nitride.

39. The photovoltaic element according to claim 13, wherein the p-type contact layer contains PTAA.

40. The photovoltaic element according to claim 12, wherein the absorber layer contains copper-doped cadmium selenide telluride.

41. The photovoltaic element according to any one of claims 12, 13 or 39, 40, wherein the p-type contact layer has a thickness in the range of 0.5 nm to 100 nm.

42. The conductive layer is adjacent to the p-type contact layer. The conductive layer comprises at least one metal or metal nitride. A photovoltaic element according to any one of claims 12, 13, or 39 to 41.

43. The p-type contact layer according to any one of claims 11, 19, 39, 40, or 42, wherein the p-type contact layer has a thickness in the range of 5 nm to 50 nm.

44. The p-type contact layer according to any one of claims 11, 18, 39, or 41 to 43, wherein the type II-VI semiconductor comprises cadmium, tellurium, selenium, and zinc, and the type II-VI semiconductor is doped with arsenic.

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