Power converters and on-board chargers

Abstract

This allows for miniaturization of the reactor and enables constant control of the DC bus voltage. [Solution] The AC / DC converter 6 is equipped with a converter mechanism 13 including a bridgeless PFC circuit 20 and performs a boost operation to perform unidirectional conversion. The bridgeless PFC circuit 20 has a first switching element S1 and a second switching element S2 whose switching operation is performed by a controller 14 according to the polarity of the input voltage. The controller 14 has a peak current control unit 80 that performs peak current mode control and outputs control signals to turn the first switching element S1 and the second switching element S2 on and off. By interposing a limiter 90 between the DC bus voltage control unit 60 and the peak current command value setting unit 70, the command value Iinv of the reactor current is set * Restrict.

Description

[Technical Field]

[0001] The disclosed technology relates to a power converter (AC / DC converter) that performs a boost operation to unidirectionally convert an AC voltage to a DC voltage, and an on-board charger equipped therewith. [Background technology]

[0002] In recent years, the electrification of automobiles, such as electric vehicles and hybrid vehicles, has been remarkable. These vehicles that run on electricity are equipped with high-output batteries as their power source. In order to charge these batteries, these vehicles are also equipped with on-board chargers (OBCs) that convert AC power, which is the commercial power source, into DC power.

[0003] Many OBCs (Out-of-Bass Converters) use AC / DC converters equipped with a Power Factor Correction (PFC) circuit to improve the power factor drop caused by distortion of the input current waveform (for example, Patent Document 1). Among PFC circuits, bridgeless PFC circuits are widely used to improve efficiency by replacing the diodes in the lossy full-wave rectifier circuit with switching elements (MOSFETs).

[0004] In AC / DC converters equipped with a bridgeless PFC circuit, average current mode control is commonly used as the control method for switching the switching elements on and off.

[0005] However, average current mode control has the disadvantage that if the reactor capacity is small, the current control becomes unstable, requiring a larger reactor. Furthermore, since the switching frequency is fundamentally the same as the control frequency, it is difficult to increase the switching frequency, which is another disadvantage.

[0006] Regarding the disclosed technology, a bridgeless PFC circuit is disclosed in Patent Document 2. In that case, every time the polarity of the input voltage changes between positive and negative, the polarity is determined and two MOSFETs (Nch) are controlled to switch between an active switch and a synchronous rectification switch. Because of the complex polarity determination, the circuit and control tend to become complex in that method.

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0008] As one solution to the above-mentioned demerits in average current mode control, the adoption of peak current mode control can be considered. If peak current mode control is adopted, the pulsation of the reactor current can be increased compared with average current mode control, and the current control is relatively stable even if the capacity of the reactor is small, so the reactor can be miniaturized.

[0009] However, in the case of peak current mode control, slope compensation is required to ensure stable operation. That is, in peak current mode control, the on / off of the switching element is controlled every switching period based on the peak waveform of the current. At that time, if the slope when the current value decreases during the off-time is larger than the slope when the current value increases during the on-time, oscillation will occur. Therefore, it is necessary to compensate so that the slope during the on-time is larger than that during the off-time.

[0010] Furthermore, in OBCs, it is common for a DC / DC converter to be connected to the output side of the AC / DC converter. In this case, if the DC / DC converter stops while the AC / DC converter is still operating, the voltage of the DC link between them (DC bus voltage) may become excessive. For this reason, conventional AC / DC converters and DC / DC converters are generally configured to operate in conjunction with each other.

[0011] Furthermore, if the AC / DC converter and DC / DC converter are linked, restarting them requires restoring the DC bus voltage that dropped during shutdown. Consequently, charging cannot be started immediately. Also, to improve the stability of the OBC's power supply, it is desirable to suppress fluctuations in the DC bus voltage. Therefore, it is preferable to control the DC bus voltage to be constant, without being affected by the operating status of the AC / DC converter and DC / DC converter.

[0012] Therefore, in this specification, an AC / DC converter equipped with a bridgeless PFC circuit that performs boost operation and unidirectional conversion is provided with a mechanism to enable peak current mode control, and by utilizing this peak current mode control, the reactor can be miniaturized and the DC bus voltage can be kept constant. [Means for solving the problem]

[0013] The disclosed technology relates to a power conversion device comprising a converter mechanism including a bridgeless PFC circuit and a controller for controlling the converter mechanism, which performs a boost operation to unidirectionally convert an AC input voltage to a DC output voltage.

[0014] The bridgeless PFC circuit includes a pair of input wirings for inputting the input voltage, a pair of output wirings for outputting the output voltage, a reactor located on at least one of the input wirings, and a first switching element and a second switching element located between the input wirings and the output wirings, which are switched by the controller according to the polarity of the input voltage.

[0015] The converter mechanism includes an input voltage sensor located in the input wiring for measuring the input voltage, an output voltage sensor located in the output wiring for measuring the output voltage, and a current sensor located in the input wiring for measuring the reactor current flowing toward the output side, with the reactor current being measured as the positive side.

[0016] The controller includes: a DC bus voltage control unit that receives the output voltage command value and the measured value of the output voltage sensor and outputs the reactor current command value so that the output voltage becomes a set DC bus voltage; a peak current command value setting unit that sets a predetermined peak current command value from the reactor current command value based on the measured value of the input voltage sensor and the measured value of the output voltage sensor; and a peak current control unit that receives the peak current command value and the measured value of the current sensor, performs peak current mode control by using a first slope compensation circuit corresponding to the positive polarity of the input voltage and a second slope compensation circuit corresponding to the negative polarity of the input voltage, and outputs control signals to turn the first switching element and the second switching element on and off.

[0017] Furthermore, the command value of the reactor current is limited by interposing a limiter between the DC bus voltage control unit and the peak current command value setting unit, which has an upper limit that caps out above a predetermined positive value and a lower limit that caps out below a predetermined negative value.

[0018] In other words, this power converter is a unidirectional AC / DC converter and is configured to perform a boost operation to charge (it cannot discharge). The bridgeless PFC circuit included in the converter mechanism is provided with a first switching element and a second switching element that perform switching operations, and these switching operations are configured to be performed by peak current mode control that requires slope compensation.

[0019] Furthermore, the reactor current command value used to set the command value for the peak current mode control is limited by a limiter that has an upper limit that caps out above a predetermined positive value and a lower limit that caps out below a predetermined negative value.

[0020] While limiters are generally used to restrict the upper and lower limits of output values, the disclosed technology utilizes a limiter in combination with peak current mode control to limit the boost operation during charging.

[0021] In other words, by limiting the command value of the reactor current to a negative lower limit with a limiter, switching operations in peak current mode control are effectively prevented when the DC bus voltage exceeds the set value. As a result, the first and second switching elements switch in a predetermined switching pattern in which no boost operation occurs.

[0022] As a result, constant control of the DC bus voltage in the bridgeless PFC circuit becomes possible, allowing the DC bus voltage to be kept constant even when the power converter is operating during sudden load changes.

[0023] The second slope compensation circuit may include an inverting circuit that reverses the polarity and be configured using the same slope compensator as the first slope compensation circuit.

[0024] This allows peak current mode control to be performed using commercially available slope compensation components, enabling miniaturization of the reactor and providing an inexpensive, high-performance AC / DC converter.

[0025] Various types of bridgeless PFC circuits are possible.

[0026] For example, the bridgeless PFC circuit may further include a first diode and a second diode, and a first leg and a second leg connected in parallel between a pair of output-side wirings, wherein the first switching element and the first diode are arranged in series in the first leg such that their current-carrying directions are opposite and outward, and the second switching element and the second diode are arranged symmetrically with respect to the first switching element and the first diode in the second leg, with one output terminal of the input-side wiring connected to the intermediate portion between the first switching element and the first diode in the first leg, and the other output terminal of the input-side wiring connected to the intermediate portion between the second switching element and the second diode in the second leg.

[0027] The bridgeless PFC circuit also further comprises a first diode and a second diode, and a first leg and a second leg connected in parallel between a pair of output wirings, wherein the first diode and the second diode are arranged in series in the first leg such that their current-carrying directions are the same, and the first switching element and the second switching element are arranged in series in the second leg such that their current-carrying directions are opposite to those of the first diode and the second diode, and one output terminal of the input wiring is connected to a portion of the first leg between the first diode and the second diode, and the other output terminal of the input wiring is connected to a portion of the second leg between the first switching element and the second switching element.

[0028] The bridgeless PFC circuit further comprises a first diode, a second diode, a third diode, and a fourth diode, a first leg and a second leg connected in parallel between a pair of output wirings, and a third leg connected between a pair of input wirings on the output side of the reactor, wherein the first diode and the second diode are arranged in series in the first leg such that their current-carrying directions are the same, the third diode and the fourth diode are arranged symmetrically with respect to the first diode and the second diode in the second leg, the first switching element and the second switching element are arranged in series in the third leg such that their current-carrying directions face each other, one output terminal of the input wiring is connected to the intermediate portion between the first diode and the second diode in the first leg, and the other output terminal of the input wiring is connected to the intermediate portion between the third diode and the fourth diode in the second leg.

[0029] The disclosed technology can be effectively applied to AC / DC converters equipped with these types of bridgeless PFC circuits.

[0030] The current sensor may also directly measure the reactor current using a Hall element.

[0031] This allows for highly accurate measurement of the direction and magnitude of the reactor current. As a result, precise control of the DC bus voltage can be achieved.

[0032] The power converter described above is preferably applied to an on-board charger. In that case, the on-board charger includes the power converter and an output-side connection device connected to the pair of output-side wirings, which operates together with the power converter to perform predetermined processing while receiving DC power from the power converter and outputting it, and the on-board charger is capable of operating the power converter when the operation of the output-side connection device is stopped.

[0033] As described above, a power converter using the disclosed technology can control the DC bus voltage to a constant level. Therefore, there is no need to link the power converter and the output-side connection device, and the on-board charger can be configured in this way. With the on-board charger configured in this way, even if the output-side connection device temporarily stops due to a malfunction or other reason, the power converter can remain operational and on standby, and charging can be quickly resumed once the output-side connection device restarts. [Effects of the Invention]

[0034] According to the disclosed technology, in an AC / DC converter equipped with a bridgeless PFC circuit that performs boost operation and unidirectional conversion, the reactor can be miniaturized and the DC bus voltage can be controlled to a constant level by employing peak current mode control and a limiter. Therefore, it becomes possible to provide an inexpensive and high-performance AC / DC converter. [Brief explanation of the drawing]

[0035] [Figure 1] This is a schematic diagram illustrating an example of the application of the disclosed technology. [Figure 2] This diagram shows applicable bridgeless PFC circuits. [Figure 3] This is a diagram illustrating the specific operation of an AC / DC converter. [Figure 4] This is a block diagram and mathematical formulas to explain the control circuitry of the controller. [Figure 5] This is a block diagram of the control circuit in the peak current control unit. [Figure 6] This is a configuration table for the lookup table used by the determination unit. [Figure 7] This diagram shows the switching pattern under peak current mode control. [Figure 8] This diagram illustrates the control of the DC bus voltage and the associated limiter settings. [Figure 9] This diagram illustrates the changes in the switching pattern during the voltage boosting process. [Figure 10A]This shows the switching pattern and current path when the first input current command value Iinv* after passing through the limiter is negative. [Figure 10B] This shows the switching pattern and current path when the first input current command value Iinv* after passing through the limiter is negative. [Figure 11A] This is a diagram showing the results of the simulation. [Figure 11B] This is a diagram showing the results of the simulation. [Figure 12] This is a diagram showing the results of the simulation. [Modes for carrying out the invention]

[0036] The following describes the disclosed technology. However, the following description is essentially illustrative. Circuit components are assigned both an alphanumeric code to identify them and a predetermined symbol. For convenience, only the symbol may be used in explanations or illustrations. The uppercase letter "I" for current represents its maximum value (amplitude value), and the lowercase letter "i" for current represents its instantaneous value.

[0037] <Overview of Power Converter> Figure 1 shows an example of the application of the power conversion device relating to the disclosed technology in an on-board charger (OBC). The illustrated on-board charger 3 is installed in a vehicle 1 that runs using electricity, such as an electric vehicle or a hybrid vehicle, together with a high-voltage, high-output battery 4 for driving, such as several hundred volts.

[0038] The upper diagram of Figure 1 shows the vehicle 1 and commercial power supply 2 during charging. The commercial power supply 2 outputs high-voltage AC voltages such as 100V and 200V. By connecting the commercial power supply 2 and the vehicle 1 with a cable, the battery 4 is charged. The onboard charger 3 intervenes between the battery 4 and the commercial power supply 2 during this process, converting the AC voltage to a DC voltage corresponding to the battery 4.

[0039] As shown in the middle diagram of Figure 1, the onboard charger 3 consists of a DC / DC converter 5, an AC / DC converter 6, and other components. The AC / DC converter 6 is a device that takes an AC input voltage (einv) as input and converts it into a DC output voltage (DC bus voltage: Vdc) for output.

[0040] The AC / DC converter 6 is configured to perform a boost operation to increase the voltage. The AC / DC converter 6 is also configured to convert from AC to DC, but not from DC to AC (unidirectional conversion). The AC / DC converter 6 corresponds to a "power converter." In other words, the disclosed technology is applied to this AC / DC converter 6.

[0041] An isolated DC / DC converter 5 is connected to the output side (DC link 7) of the AC / DC converter 6. The DC / DC converter 5 corresponds to the "output side connection device". The DC / DC converter 5 is a device that converts a DC voltage to a different DC voltage.

[0042] The DC / DC converter 5 works together with the AC / DC converter 6 to take the DC bus voltage (Vdc) applied to the DC link 7 as input, convert it to a predetermined DC voltage (Vhv), and output it to the battery 4.

[0043] In the example onboard charger 3, the DC bus voltage Vdc is set to a predetermined value (e.g., 400V). Depending on the specifications and charge status of the battery 4, the output voltage Vhv of the DC / DC converter 5 may be less than or more than 400V. Accordingly, the DC / DC converter 5 performs either a step-down or step-up operation.

[0044] As shown in the lower part of Figure 1, the AC / DC converter 6 comprises a converter mechanism 13 and a controller 14 that controls the converter mechanism 13. The converter mechanism 13 includes a current sensor 10, an input voltage sensor 11, an output voltage sensor 12, a bridgeless PFC circuit 20, and the like.

[0045] The current sensor 10 is a Hall element type sensor constructed using a Hall element. This type of sensor is well known. The current sensor 10 can detect the direction and magnitude of the current with high precision by utilizing the Hall effect. The current sensor 10 is installed at a predetermined position on the input wiring 21, as will be described later.

[0046] The current sensor 10 directly measures the input current (reactor current iinv) flowing through the reactor 24 and outputs it to the controller 14. The current sensor 10 measures the reactor current iinv flowing toward the output side, that is, the current flowing in the charging direction, as the positive side. The current sensor 10 measures the reactor current iinv flowing toward the input side, that is, the current flowing in the discharge direction, as the negative side.

[0047] However, since the AC / DC converter 6 can only perform unidirectional conversion, it does not discharge. Therefore, the negative value of the reactor current iinv measured by the current sensor 10 is not used for control during discharge. As will be described later, it is used to stop the boost operation during charging in order to achieve constant bus voltage control.

[0048] The input voltage sensor 11 is also installed at a predetermined location on the input wiring 21, as will be described later. The input voltage sensor 11 directly measures the AC input voltage einv that is input to the AC / DC converter 6 and outputs it to the controller 14. The output voltage sensor 12 is installed at a predetermined location on the output wiring 22. The output voltage sensor 12 directly measures the DC bus voltage Vdc output from the AC / DC converter 6 and outputs it to the controller 14.

[0049] Based on the measured values ​​from these sensors, the controller 14 outputs a drive voltage to the two switching elements S1 and S2 of the bridgeless PFC circuit 20 to control their on / off state. In other words, it switches the energized state (on) and the de-energized state (off) of these switching elements S1 and S2 at predetermined timings.

[0050] (Bridgeless PFC circuit) Figure 2 shows types A to C of bridgeless PFC circuits 20 that can be applied to the AC / DC converter 6. The basic circuit of all these types of bridgeless PFC circuits 20 is the same.

[0051] In other words, each of the bridgeless PFC circuits 20 of types A to C has a pair of input wiring 21 (grounded N input wiring 21a and ungrounded L input wiring 21b), a pair of output wiring 22 (negative N output wiring 22a and positive P output wiring 22b), an input capacitor 23 (Cinv), a reactor 24 (Linv), a first switching element 25 (S1), and a second switching element 26 (S2).

[0052] A pair of input wirings 21 are located on the commercial power supply 2 side, and an AC input voltage einv is input to their input terminals. On the other hand, a pair of output wirings 22 are located on the battery 4 side, and a DC bus voltage Vdc is output from their output terminals. The pair of output wirings 22 are connected to a DC link 7. The DC bus voltage Vdc is applied to the DC link 7.

[0053] The input capacitor 23 is connected between a pair of input wirings 21 near the input terminals. The input capacitor 23 can reduce noise in the AC input current iac and stabilize the input voltage einv. Therefore, it is common for bridgeless PFC circuits 20 to include an input capacitor 23.

[0054] The reactor 24 is located at least one side of the connection point between the input side wiring 21 and the input side capacitor 23, on the output side. Specifically, the reactor 24 is located on the output side of the connection point between the input side wiring 21b and the input side capacitor 23. The first switching element 25 and the second switching element 26 are located between the input side wiring 21 and the output side wiring 22, although their arrangement differs depending on the type.

[0055] The first switching element 25 and the second switching element 26 consist of known MOSFETs and the like, each having gate, source, and drain terminals. They are turned on by applying a predetermined drive voltage to the gate terminal. Both the first switching element 25 and the second switching element 26 include a freewheeling diode 27 connected in antiparallel.

[0056] In the case of the Type A bridgeless PFC circuit 20, in addition to the basic circuit described above, it further includes a first diode 31 (D1), a second diode 32 (D2), a first leg 33, a second leg 34, an output capacitor 35 (Cdc), and a second reactor 36. The second reactor 36 is located in the N input wiring 21a in a position symmetrical to the reactor 24. Note that the second reactor 36 may be omitted.

[0057] The output capacitor 35 is connected between a pair of output wirings 22a and 22b near the output terminal. The first leg 33 and the second leg 34 are connected in parallel between a pair of output wirings 22a and 22b on the input side of the output capacitor 35. The first switching element 25 and the first diode 31 are arranged in series on the first leg 33 such that their current flows outwards in opposite directions.

[0058] Specifically, the first switching element 25 and the first diode 31 are arranged in order from the N output wiring 22a to the P output wiring 22b. When the first switching element 25 is ON, it is positioned to conduct current from the P output wiring 22b to the N output wiring 22a, and the first diode 31 is positioned to conduct current from the N output wiring 22a to the P output wiring 22b.

[0059] In the second leg 34, the second switching element 26 and the second diode 32 are arranged symmetrically with the first switching element 25 and the first diode 31.

[0060] Specifically, the second switching element 26 and the second diode 32 are arranged in order from the N output wiring 22a to the P output wiring 22b. When the second switching element 26 is ON, it is positioned to conduct current from the P output wiring 22b to the N output wiring 22a, and the second diode 32 is positioned to conduct current from the N output wiring 22a to the P output wiring 22b.

[0061] The output terminal of the N input wiring 21a is connected to the intermediate point between the first switching element 25 and the first diode 31 in the first leg 33. The output terminal of the L input wiring 21b is connected to the intermediate point between the second switching element 26 and the second diode 32 in the second leg 34.

[0062] In the case of the Type B bridgeless PFC circuit 20, in addition to the basic circuit described above, it further includes a first diode 41, a second diode 42, a third diode 43 (D3), a fourth diode 44 (D4), a first leg 45, a second leg 46, a third leg 47, and an output capacitor 48.

[0063] The output capacitor 48 is connected between a pair of output wirings 22a and 22b near the output terminal. The first leg 45 and the second leg 46 are connected in parallel between the pair of output wirings 22a and 22b on the input side of the output capacitor 48. The third leg 47 is connected between the parts of the pair of input wirings 21a and 21b on the output side of the reactor 24.

[0064] Then, in the first leg 45, the first diode 41 and the second diode 42 are arranged in series such that the direction of current flow on both sides is the same. Specifically, the second diode 42 and the first diode 41 are arranged in order from the N output wiring 22a side toward the P output wiring 22b side. These first diode 41 and second diode 42 are arranged in a direction that allows current to flow from the N output wiring 22a side toward the P output wiring 22b side.

[0065] In the second leg 46, the third diode 43 and the fourth diode 44 are arranged symmetrically with the first diode 41 and the second diode 42. Specifically, the fourth diode 44 and the third diode 43 are arranged in order from the N output wiring 22a side toward the P output wiring 22b side. Furthermore, these third diode 43 and fourth diode 44 are arranged in a direction that allows current to flow from the N output wiring 22a side toward the P output wiring 22b side.

[0066] In the third leg 47, the first switching element 25 and the second switching element 26 are arranged in series such that their respective current-carrying directions face each other. Specifically, the second switching element 26 and the first switching element 25 are arranged sequentially from the N input wiring 21a side toward the P input wiring 21 side. When the second switching element 26 is ON, it is positioned to conduct current from the N input wiring 21a side toward the L input wiring 21b side, and when the first switching element 25 is ON, it is positioned to conduct current from the L input wiring 21b side toward the N input wiring 21a side.

[0067] The output terminal of the N input wiring 21a is connected to the intermediate point between the first diode 41 and the second diode 42 in the first leg 45. The output terminal of the L input wiring 21b is connected to the intermediate point between the third diode 43 and the fourth diode 44 in the second leg 46.

[0068] In the case of the Type C bridgeless PFC circuit 20, in addition to the basic circuit described above, it further includes a first diode 51, a second diode 52, a first leg 53, a second leg 54, and an output capacitor 55.

[0069] The output capacitor 55 is connected between a pair of output wirings 22a and 22b near the output terminal. The first leg 53 and the second leg 54 are connected in parallel between the pair of output wirings 22a and 22b on the input side of the output capacitor 55.

[0070] In the first leg 53, the first diode 51 and the second diode 52 are arranged in series such that the direction of current flow is the same for both. Specifically, the second diode 52 and the first diode 51 are arranged in order from the N output wiring 22a side toward the P output wiring 22b side. Both the first diode 51 and the second diode 52 are arranged in a direction that allows current to flow from the N output wiring 22a side toward the P output wiring 22b side.

[0071] In the second leg 54, the first switching element 25 and the second switching element 26 are arranged in series such that the current flow directions of both are opposite to those of the first diode 51 and the second diode 52. Specifically, the second switching element 26 and the first switching element 25 are arranged in order from the N output wiring 22a side toward the P output wiring 22b side. Both the first switching element 25 and the second switching element 26 are arranged so that when they are ON, current flows from the P output wiring 22b side toward the N output wiring 22a side.

[0072] The output terminal of the N input wiring 21a is connected to the intermediate point between the first diode 51 and the second diode 52 in the first leg 53. The output terminal of the L input wiring 21b is connected to the intermediate point between the first switching element 25 and the second switching element 26 in the second leg 54.

[0073] <Specific control operation of the power converter> Referring to Figure 3, the specific operation of the AC / DC converter 6 under the control of the controller 14 will be explained. Figure 3 shows different operating states in a Type C bridgeless PFC circuit 20.

[0074] In Figure 3(a) only, the current sensor 10, input voltage sensor 11, and output voltage sensor 12 are shown in a simplified manner. Also, in Figures 3(b) and (d) only, the load R (corresponding to the DC / DC converter 5) is shown in a simplified manner.

[0075] Note that the Type A and Type B bridgeless PFC circuits 20 have different circuit structures from Type C, and therefore their current supply paths are different. However, in both the Type A and Type B bridgeless PFC circuits 20, the controlled elements are the same first switching element S1 and second switching element S2, and the current supply path can be determined accordingly, so their operation will be omitted.

[0076] In Figure 3, (a) and (b) represent the operation when the polarity of the input voltage einv is positive (sin(θinv)≧0) (positive half-cycle). On the other hand, (c) and (d) represent the operation when the polarity of the input voltage einv is negative (sin(θinv)<0) (negative half-cycle).

[0077] (a) and (d) represent the operation when the first switching element S1 is off and the second switching element S2 is on. (b) and (c) represent the operation when the first switching element S1 is on and the second switching element S2 is off. Depending on the polarity of the input voltage einv, the on / off switching of the first switching element S1 and the second switching element S2 is repeated between (a) and (b) and (c) and (d).

[0078] In other words, the controller 14 performs switching operations on the first switching element S1 and the second switching element S2 according to the polarity of the periodically changing input voltage einv. Specifically, when the polarity of the input voltage einv is positive, switching operations are performed on the first switching element S1 and the second switching element S2 as shown in (a) and (b). When the polarity of the input voltage einv is negative, switching operations are performed on the second switching element S2 and the first switching element S1 as shown in (c) and (d).

[0079] Then, as shown in (a), when the polarity of the input voltage einv is positive, the second switching element S2 turns on, and an input current iac flows in from the L input side wiring 21b. This input current iac flows through the current-carrying path consisting of the intermediate part of the second leg 54, the second switching element S2, the N output side wiring 22a, the second diode D2, the intermediate part of the first leg 53, and the N input side wiring 21a, as shown by the dashed arrow Y1. In other words, no input current iac flows to the output side.

[0080] As shown in (b), when the polarity of the input voltage einv is positive, and the second switching element S2 is turned off, the input current iac flowing in from the L input side wiring 21b flows through the current-carrying path consisting of the intermediate part of the second leg 54, the first switching element S1 (freewheeling diode 27), the P output side wiring 22b, the load R and output side capacitor 55, the N output side wiring 22a, the second diode D2, the intermediate part of the first leg 53, and the N input side wiring 21a, as indicated by the dashed arrow Y2. In other words, the input current iac flows to the output side.

[0081] As shown in (c), when the polarity of the input voltage einv is negative, the first switching element S1 turns on, and an input current iac flows in from the N input side wiring 21a. This input current iac then flows through a current-carrying path consisting of the intermediate part of the first leg 53, the first diode D1, the N output side wiring 22a, the first switching element S1, the intermediate part of the second leg 54, and the L input side wiring 21b, as shown by the dashed arrow Y3. In other words, no input current iac flows to the battery 4 side.

[0082] As shown in (d), when the polarity of the input voltage einv is negative, and the first switching element S1 is turned off, the input current iac flowing in from the N input side wiring 21a flows through the current-carrying path consisting of the intermediate part of the first leg 53, the first diode D1, the P output side wiring 22b, the load R and output side capacitor 55, the N output side wiring 22a, the second switching element S2 (freewheeling diode 27), the intermediate part of the second leg 54, and the L input side wiring 21b, as shown by the dashed arrow Y4. In other words, the input current iac flows to the battery 4 side.

[0083] <Controller control circuit> As described above, the controller 14 outputs the requested output voltage Vdc by switching the first switching element S1 and the second switching element S2 according to the polarity of the input voltage einv. An example of a block diagram of the control circuit that the controller 14 has for this purpose is shown in Figure 4.

[0084] The controller 14 includes a DC bus voltage control unit 60, a peak current command value setting unit 70, and a peak current control unit 80. In this AC / DC converter 6, a limiter 90 is interposed between the DC bus voltage control unit 60 and the peak current command value setting unit 70 to achieve constant control of the DC bus voltage, which will be described later.

[0085] The DC bus voltage control unit 60 controls the output voltage Vdc to be equal to the DC bus voltage. The DC bus voltage control unit 60 receives a command value for the output voltage Vdc * The measured value Vdc of the output voltage, measured by the output voltage sensor 12, is input.

[0086] Then, the DC bus voltage control unit 60 outputs a command value for the reactor current (first input current command value Iinv) corresponding to the maximum value of the reactor current (iinv). * The output value is Vdc. The measured output voltage Vdc is used as a feedback value, and the DC bus voltage control unit 60 uses the command value Vdc as the measured value Vdc. * PID control is performed to match the first input current command value Iinv * This is output to the peak current command value setting unit 70.

[0087] The peak current command value setting unit 70 consists of a phase-synchronization circuit 71, a multiplier 72, an adder 73, etc., and sets the first input current command value Iinv based on the measured value of the input voltage sensor 11 and the measured value of the output voltage sensor 12. * A predetermined peak current command value is set.

[0088] Specifically, first, the first input current command value Iinv * is input to the multiplier 72, and based on the phase of the input voltage einv, it is converted into a command value of the reactive current corresponding to the instantaneous value (the second input current command value iinv * ). That is, the measured value of the input voltage einv measured by the input voltage sensor 11 is input to the phase synchronization circuit 71. Based on the measured value, the phase angle θinv of the input voltage einv is obtained. And a predetermined signal (phase signal, sin(θinv)) is obtained from the phase angle θinv.

[0089] The phase signal sin(θinv) is output from the phase synchronization circuit 71 and input to the multiplier 72. In the multiplier 72, the first input current command value Iinv * is multiplied by the phase signal sin(θinv). By doing so, the second input current command value iinv * is calculated, and the value is output to the adder 73.

[0090] In the adder 73, the second input current command value iinv * is added with a predetermined current correction amount Δiinv. By doing so, the peak current command value iinv * .p as the instantaneous value introduced into the peak current control unit 80 is set. The current correction amount Δiinv is an estimated value of the pulsation component of the reactive current iinv and is obtained by the formula (1) shown in FIG. 4.

[0091] In formulas (1) to (3), Linv is the inductance of the reactor 24. As will be described later, for the switching operations of the first switching element S1 and the second switching element S2, a PWM method for changing the duty ratio is used. TPWM is a periodic signal indicating the timing corresponding to the switching period (a preset constant value) in the PWM control (see FIG. 8).

[0092] In equation (2), Ks is the slope value used for slope compensation in the peak current mode control described later. In equation (3), d is the ratio of the input voltage to the output voltage. The measured values ​​of the output voltage sensor 12 are used to calculate Ks and d.

[0093] The peak current control unit 80 controls the timing of turning the first switching element S1 and the second switching element S2 on and off by peak current mode control. Specifically, the peak current control unit 80 receives a peak current command value iinv * Along with .p, the measured value iinv of the reactor current measured by the current sensor 10 is input as its feedback value. The peak current control unit 80 also receives TPWM, Ks, TZRO, etc. TZRO is a set signal that indicates the timing corresponding to 0 degrees (360 degrees) of the switching period in PWM control.

[0094] As a result, the peak current control unit 80 outputs control signals Q1 and Q2 that indicate the timing for turning the first switching element S1 and the second switching element S2 on and off.

[0095] (Details of the peak current control unit) Figure 5 shows a block diagram of the control circuit in the peak current control unit 80. Figure 6 shows the setting table of the lookup table in the determination unit 87, which will be described later. Figure 7 shows the switching pattern due to peak current mode control. Figure 7(a) is the switching pattern during a positive half-cycle, and Figure 7(b) is the switching pattern during a negative half-cycle.

[0096] Slope compensation is essential for peak current mode control. In response to this, this controller 14 is designed to enable slope compensation even in the AC / DC converter 6 using inexpensive commercially available electronic components.

[0097] In other words, while electronic components such as ICs and microcontrollers that perform slope compensation (slope compensation components) are commercially available, these slope compensation components are developed for DC / DC converters that handle DC power. For this reason, these slope compensation components are structured to only be capable of processing signals for positive slope compensation.

[0098] In contrast, since the AC / DC converter 6 handles alternating current power whose polarity changes between positive and negative, the controller 14 also requires signal processing for negative slope compensation. Therefore, simply using commercially available slope compensation components as they are will not enable peak current mode control in the controller 14.

[0099] In contrast, in this controller 14, the peak current control unit 80 performs peak current mode control by using a first slope compensation circuit corresponding to the positive polarity of the input voltage einv and a second slope compensation circuit corresponding to the negative polarity of the input voltage einv. The second slope compensation circuit includes an inverting circuit that reverses the polarity of the input voltage einv and is configured using the same slope compensator as the first slope compensation circuit, that is, a slope compensator corresponding to the positive polarity.

[0100] Therefore, in the case of this controller 14, peak current mode control can be performed using only commercially available slope compensation components in the slope compensator. As a result, peak current mode control can be performed with a simple and inexpensive circuit configuration. Consequently, stable operation can be achieved even when the reactor 24 is miniaturized.

[0101] Specifically, the peak current control unit 80 includes a first slope compensator 81, a first comparator 82, a second slope compensator 83, a second comparator 84, an inverting amplifier circuit 85, a PWM control unit 86, a determination unit 87, a gate driver 88, and the like. The first slope compensator 81 and the first comparator 82 constitute the first slope compensator circuit, and the second slope compensator 83, the second comparator 84, and the inverting amplifier circuit 85 constitute the second slope compensator circuit.

[0102] As described above, the first slope compensator 81 and the second slope compensator 83 have the same function corresponding to the positive polarity of the input voltage einv. Therefore, commercially available slope compensation components such as analog ICs and control microcontrollers can be used for the first slope compensator 81 and the second slope compensator 83.

[0103] The first slope compensator 81 receives a positive peak current command value iinv corresponding to a positive half-cycle. * .p and Ks are input. Ks is the positive peak current control command value iinv * This corresponds to a predetermined slope value applied to .p. Ks is generally used to suppress the occurrence of low-frequency oscillations that occur when the duty cycle exceeds 50%.

[0104] The first slope compensator 81 also receives a pulsed set signal TZRO and a first reset signal TripA. As shown in Figure 7, the set signal TZRO is output at a timing corresponding to 0 degrees of the switching period. The first reset signal TripA is output at a timing corresponding to the upper limit (peak) of the reactor current iinv.

[0105] The set signal TZRO is input from the PWM control unit 86 based on the periodic signal TPWM. The first reset signal TripA is fed back after the output from the first comparator 82. The first slope compensator 81 calculates a positive peak current command value iinv based on these set signals TZRO and TripA. * Set or reset the .p file.

[0106] The first slope compensator 81 controls the positive peak current command value iinv * Based on .p and Ks, the positive peak current command value iinv * A slope is applied to .p and output to the first comparator 82 (the sloped dashed line portion in Figure 7(a)).

[0107] The first comparator 82 compares its output value with the value of the reactor current iinv. When the output value of the first comparator 82 matches the value of the reactor current iinv (the matching portion in Figure 7(a)), the first comparator 82 outputs a first reset signal TripA. The first reset signal TripA is fed back to the first slope compensator 81. The first reset signal TripA is also output to the determination unit 87.

[0108] The second slope compensator 83 has a negative peak current command value -iinv corresponding to a negative half-cycle. * .p and Ks are input. The second slope compensator 83 also receives the set signal TZRO and the second reset signal TripB, similar to the first slope compensator 81. Based on these set signal TZRO and second reset signal TripB, the second slope compensator 83 sets a negative peak current command value -iinv * Set or reset the .p file.

[0109] The second slope compensator 83 controls the negative peak current command value -iinv * Based on .p and Ks, the negative peak current command value -iinv * A slope is applied to .p and output to the second comparator 84 (the sloped dashed line portion in Figure 7(b)).

[0110] The inverting amplifier circuit 85 takes a reactor current iinv as input and outputs a reactor current that has been inverted to a negative value (negative reactor current value -iinv). In other words, it inverts the sign of the reactor current iinv depending on the polarity of the input voltage einv.

[0111] The second comparator 84 compares the output value from the second slope compensator 83 with its negative reactor current value -iinv. When the second comparator 84 finds that its output value matches the negative reactor current value -iinv (the matching portion in Figure 7(b)), it outputs a second reset signal TripB. The second reset signal TripB is fed back to the second slope compensator 83. The second reset signal TripB is also output to the determination unit 87.

[0112] The determination unit 87 has a lookup table set up as shown in the table in Figure 6. Based on the phase signal sin(θinv) input from the phase-locking circuit 71 and the lookup table, the determination unit 87 determines the input first reset signal TripA and second reset signal TripB. As a result, the determination unit 87 outputs control signals (first control signal Q1 and second control signal Q2) for turning the first switching element S1 and the second switching element S2 on and off.

[0113] Specifically, as shown in Figure 7(a), when the phase signal sin(θinv) is greater than or equal to 0, i.e., during a positive half-cycle, and the first reset signal TripA is input, the determination unit 87 outputs a first control signal Q1 in a high state (1) and a second control signal Q2 in a low state (0). On the other hand, even if the second reset signal TripB is input, the determination unit 87 ignores it and does not output a control signal. When the set signal TZRO is input, the determination unit 87 outputs a first control signal Q1 in a low state and a second control signal Q2 in a high state.

[0114] As shown in Figure 7(b), when the phase signal sin(θinv) is less than 0, i.e., during a negative half-cycle, even if the first reset signal TripA is input, the determination unit 87 ignores it and does not output a control signal. On the other hand, when the second reset signal TripB is input, the determination unit 87 outputs the first control signal Q1 in a low state and the second control signal Q2 in a high state. When the set signal TZRO is input, the determination unit 87 outputs the first control signal Q1 in a high state and the second control signal Q2 in a low state.

[0115] As shown in Figure 5, the first control signal Q1 and the second control signal Q2 output by the determination unit 87 are input to the gate driver 88. A predetermined dead time Td is also input to the gate driver 88.

[0116] The gate driver 88 turns the first switching element S1 on and off based on the first control signal Q1, and turns the second switching element S2 on and off based on the second control signal Q2. Specifically, when the first control signal Q1 is high, it outputs a drive voltage to the first switching element S1 to turn it on. When the first control signal Q1 is low, it does not output a drive voltage to the first switching element S1 and turns it off. Similarly, the second switching element S2 is turned on or off depending on the state of the second control signal Q2.

[0117] (limiter) As described above, in this AC / DC converter 6, a limiter 90 is interposed between the DC bus voltage control unit 60 and the peak current command value setting unit 70 in order to achieve constant control of the DC bus voltage Vdc.

[0118] In the case of this in-car charger 3, only the DC / DC converter 5 is connected to the DC link 7 on the output side of the AC / DC converter 6. Therefore, if the DC / DC converter 5 stops while the AC / DC converter 6, which performs the boost operation, is still running, power will be input to the DC link 7, which has no power output destination. As a result, the DC bus voltage Vdc may exceed the set value and become excessive.

[0119] Therefore, in conventional in-car chargers, the AC / DC converter and DC / DC converter are generally configured to operate and stop simultaneously, in a synchronized manner.

[0120] When AC / DC converters and DC / DC converters are working in conjunction, restarting them requires restoring the reduced DC bus voltage Vdc. Therefore, charging cannot begin immediately. Furthermore, fluctuations in the DC bus voltage Vdc affect the operation of the DC / DC converters. Consequently, to improve the stability of the power supply from the onboard charger, it is desirable to suppress fluctuations in the DC bus voltage Vdc.

[0121] For these reasons, it is preferable to be able to control the DC bus voltage Vdc to a constant value, without being affected by the operating status of the AC / DC converter or DC / DC converter.

[0122] Therefore, in this AC / DC converter 6, a limiter 90 is interposed between the DC bus voltage control unit 60 and the peak current command value setting unit 70, and by utilizing peak current mode control, constant control of the DC bus voltage Vdc is achieved. Specifically, the first input current command value Iinv output from the DC bus voltage control unit 60 * The limiter 90 limits the first input current command value Iinv. * This is configured to be input to the peak current command value setting unit 70.

[0123] The upper part of Figure 8 shows an image of the control of the DC bus voltage Vdc by the DC bus voltage control unit 60. The lower part of Figure 8 shows an image of the setting of the limiter 90.

[0124] As described above, the DC bus voltage control unit 60 controls the actual value Vdc measured by the output voltage sensor 12 to the command value Vdc by PID control. * Control to match (converge to) the command value Vdc. That is, if the measured value Vdc is low (before t1), the measured value Vdc will be controlled to match the command value Vdc. * Control to quickly match the command value Vdc. * If it matches (t1), control is applied to maintain that state.

[0125] In general terms, the measured value Vdc is equal to the commanded value Vdc. * The further away it is from the first input current command value Iinv * The value increases, and the measured value Vdc becomes equal to the commanded value Vdc. * The closer it gets, the higher the first input current command value Iinv * It becomes smaller. Note that the measured value Vdc is equal to the commanded value Vdc. * The following (before t1) is a charging state, so the first input current command value Iinv here is... * This is a positive value.

[0126] In contrast, the measured value Vdc is equal to the commanded value Vdc * If it exceeds (after t1, so-called overshoot), the DC bus voltage control unit 60 controls the measured value Vdc to decrease. That is, the DC bus voltage control unit 60 issues a negative first input current command value Iinv so that current flows in the discharge direction. * The following will be output.

[0127] A limiter 90 is a well-known electronic component generally used to limit output values ​​between upper and lower limits by setting these limits. That is, if the input value is between these upper and lower limits, the limiter 90 outputs the input value. If the input current value exceeds the upper or lower limit, it caps out and outputs the upper or lower limit.

[0128] In contrast, the disclosed technology does not use the limiter 90 to limit the upper and lower limits of the output value, but rather uses the limiter 90 in combination with peak current mode control to limit the boost operation during charging.

[0129] In other words, the limiter 90 of this AC / DC converter 6 receives the first input current command value Iinv * To limit this, an upper limit (Iinv.lim) is set that caps out values ​​above a predetermined positive value, and a lower limit (-Iinv.lim) is set that caps out values ​​below a predetermined negative value.

[0130] The upper limit should be set considering the rating of the onboard charger 3. For example, the maximum value of the rated current of the commercial power supply 2 (e.g., approximately 20A) may be set. If the upper limit is increased, the first input current command value Iinv * This allows for a larger bus voltage, which can shorten charging time when the DC bus voltage is low, such as during startup.

[0131] In contrast, it is preferable to set the lower limit to a value that is less than 0 and has the minimum necessary amplitude. Since the negative side is the discharge direction, in this AC / DC converter 6 which is specialized for charging, the first input current command value Iinv is limited by the limiter 90.* There is no need to restrict the lower limit on the negative side.

[0132] However, the first input current command value Iinv * By setting this to a certain negative value, as will be described later, the flow of the reactor current iinv required for boost operation can be stopped in combination with peak current mode control. This makes it possible to maintain a constant DC bus voltage Vdc while the AC / DC converter 6 is operating.

[0133] For example, the lower limit may be -0.1·the maximum value of the rated current of commercial power supply 2. Even if the lower limit is set to 0, switching operations are still performed in peak current mode control, so a reactor current iinv flows during charging. As a result, the boost operation cannot be completely stopped. In other words, the DC bus voltage Vdc cannot be kept constant.

[0134] On the other hand, if the lower limit is set too high, the boost operation during charging can be completely stopped even in peak current mode control, but the undershoot becomes excessive, making the PID control unstable. Therefore, as described above, it is preferable to set the lower limit of the limiter 90 to a value that is less than 0 and has the minimum necessary amplitude.

[0135] (Limiter and peak current mode control) Figure 9 illustrates the change in the switching pattern during the boosting process. The solid line in Figure 9 shows the change in the measured value Vdc compared to the switching pattern shown in Figure 7, compared to the command value Vdc. * This shows the case when it approaches the limiter 90. At this time, the first input current command value Iinv * This is a positive value.

[0136] During a positive half-cycle (sin(θinv)≧0), the measured value Vdc is equal to the commanded value Vdc. * The closer it gets, the higher the first input current command value Iinv * It becomes smaller, and the peak current command value iinv *.p also decreases. As a result, the first reset signal TripA is displaced to approach 0 degrees (360 degrees) of the switching period, as shown by the arrow in Figure 9. Consequently, the first control signal Q1 and the second control signal Q2 also change.

[0137] Specifically, the period of the first control signal Q1 being low decreases and the period of it being high increases during each switching cycle. The period of the second control signal Q2 being low increases and the period of it being high decreases during each switching cycle.

[0138] Similarly, during a negative half-cycle (sin(θinv)<0), the second reset signal TripB also shifts as shown by the arrow in Figure 9. Consequently, the period of the first control signal Q1 being low increases and the period of its high decreases during each switching cycle. The period of the second control signal Q2 being low decreases and the period of its high increases during each switching cycle.

[0139] The measured value Vdc is further converted to the commanded value Vdc. * As it approaches this point, the first reset signal TripA and the second reset signal TripB also approach 0 degrees (360 degrees) of the switching period. The first input current command value Iinv after passing through limiter 90 * It gets smaller and approaches 0.

[0140] The first input current command value Iinv after passing through limiter 90 * Even if it becomes 0, the peak current command value iinv * .p is the instantaneous value of the second input current command value iinv * Since the current correction amount Δiinv is added to the setting, the first reset signal TripA and the second reset signal TripB will not reach the point where they coincide with the set signal TZRO, even as they approach 0 degrees (360 degrees) of the switching period. Therefore, although the switching operation is extremely biased, it is still performed.

[0141] Thus, the measured value Vdc becomes the commanded value Vdc *When it exceeds this value, the first input current command value Iinv passes through limiter 90. * This becomes a negative value. As a result, the first reset signal TripA and the second reset signal TripB reach 0 degrees (360 degrees) of the switching cycle and coincide with the set signal TZRO. Consequently, switching operations corresponding to charging are no longer performed, and only switching operations corresponding to the polarity switching every half cycle of positive and negative occur.

[0142] Figure 10A shows the switching pattern and current path during a positive half-cycle. Figure 10B shows the switching pattern and current path during a negative half-cycle.

[0143] During a positive half-cycle, as shown by the solid line in the upper diagram of Figure 10A, the first control signal Q1 is always high and the second control signal Q2 is always low. In other words, no switching operation is performed, the first switching element S1 remains ON, and the second switching element S2 remains OFF.

[0144] As a result, during a positive half-cycle, the current path shown by the dashed line in the lower part of Figure 10A is formed.

[0145] During a negative half-cycle, as shown by the solid line in the upper diagram of Figure 10B, the first control signal Q1 is always low and the second control signal Q2 is always high. In other words, no switching operation is performed, the first switching element S1 remains off, and the second switching element S2 remains on.

[0146] As a result, during a negative half-cycle, the current path shown by the dashed line in the lower diagram of Figure 10B is formed.

[0147] Thus, the first input current command value Iinv after passing through the limiter 90 is *When the value becomes negative, the boost operation by the bridgeless PFC circuit 20 is eliminated during both positive and negative half-cycles, resulting in essentially the same operation as a rectifier. This allows the AC / DC converter 6 to operate regardless of whether or not there is power output from the DC link 7, and the DC bus voltage Vdc can be kept constant. Even if the DC / DC converter 5 (load) changes suddenly, the control response is excellent, enabling stable charging. The performance of the onboard charger 3 can be improved.

[0148] <Verification of effects through simulation> (Verification 1) To verify the effect of miniaturizing reactor 24, simulations were performed in two cases. In Case 1, the inductance of reactor 24 was set to 340 μH. In Case 2, the inductance of reactor 24 was set to half that, 170 μH.

[0149] The parameters of the circuits used in the simulations for Case 1 and Case 2 are as follows:

[0150] Capacitance of input capacitor 23 (Cinv): 5.5μF PWM frequency: 24kHz Input voltage (einv): 240V / 60Hz DC load: 4kW Dead time: 2μs Output capacitor (Cdc) capacitance: 2200μF Output voltage (Vdc): 400V.

[0151] Figure 11A shows the simulation results for Case 1. Figure 11B shows the simulation results for Case 2. It was confirmed that even with a small reactor 24 with an inductance of 170 μH, a stable reactor current iinv with a waveform that is not significantly different from that of a reactor 24 with an inductance of 340 μH can be obtained in practical use.

[0152] In other words, according to the disclosed technology, it becomes possible to reduce the inductance of the reactor 24 to 170 μH or less.

[0153] (Verification 2) This section presents an example of a simulation conducted to verify the effectiveness of constant control of the DC bus voltage. The simulation conditions are the same as those of Case 2 (inductance: 170 μH) in Verification 1, except that a limiter 90 is added. A limit of 20 A was set as the upper limit and a limit of 2 A as the lower limit for limiter 90.

[0154] In the simulation, a momentary power outage of commercial power supply 2 was assumed, and the input power to the AC / DC converter 6, which was operating with a 4kW power input Pac, was changed (4kW → 0kW → 4kW). The waveforms of each parameter at that time are shown in Figure 12.

[0155] As shown in Figure 12, even when power was temporarily lost, the DC bus voltage Vdc could be kept constant while the AC / DC converter 6 was operating. The operating state was also restored quickly after power was restored.

[0156] Furthermore, the disclosed technology is not limited to the embodiments described above, but also encompasses various other configurations.

[0157] For example, in the embodiment, the present invention was realized using a controller 14 as shown in Figures 5 to 7, but the positive and negative peak current command values ​​(iinv * .p,-iinv * The output is provided using a controller with a DAC output as described in .p), and all or some of the subsequent circuit blocks may be designed as analog circuits.

[0158] In this embodiment, an inverting circuit that reverses the polarity corresponding to the negative polarity was used to perform peak current mode control with a simple and inexpensive circuit configuration. However, peak current mode control may also be performed using two current sensors corresponding to the positive and negative polarities, respectively. [Explanation of Symbols]

[0159] 1 vehicle 3 On-board charger 4 Batteries 5 DC / DC Converters 6. AC / DC converter (power conversion device) 7 DC Link 10 Current Sensor 11 Input voltage sensor 12 Output Voltage Sensor 13 Converter mechanism 14 Controllers 20. Bridgeless PFC Circuit 21 Input side wiring 22 Output side wiring 23 Input capacitor 24 Reactors 25 First switching element 26. Second switching is possible. 27 Freewheel Diode 60 DC bus voltage control unit 70 Peak current command value setting unit 71 Phase-locked circuit 72 Multiplier 73 Adder 80 Peak Current Control Unit 81. First Slope Compensator 82 First Comparator 83. Second slope compensator 84 Second Comparator 85. Inverting Amplifier Circuit (Inverting Circuit) 86 PWM Control Unit 87 Judgment section 88 Gate Driver 90 Limiter

Claims

1. A power conversion device comprising a converter mechanism including a bridgeless PFC circuit and a controller for controlling the converter mechanism, which performs a boost operation to unidirectionally convert an AC input voltage to a DC output voltage, The aforementioned bridgeless PFC circuit is A pair of input-side wirings that input the aforementioned input voltage, A pair of output wirings that output the aforementioned output voltage, A reactor located on at least one of the input wirings, A first switching element and a second switching element are arranged between the input wiring and the output wiring, and their switching operations are performed by the controller according to the polarity of the input voltage. It has, The converter mechanism is An input voltage sensor is placed in the aforementioned input wiring and measures the input voltage, An output voltage sensor is located in the output wiring and measures the output voltage, A current sensor is placed in the input wiring and measures the reactor current flowing from the reactor toward the output side as the positive side, It has, The aforementioned controller, A DC bus voltage control unit receives the command value of the output voltage and the measured value of the output voltage sensor as input and outputs the command value of the reactor current so that the output voltage becomes the set DC bus voltage. A peak current command value setting unit sets a predetermined peak current command value from the reactor current command value based on the measured value of the input voltage sensor and the measured value of the output voltage sensor, A peak current control unit receives the peak current command value and the measured value of the current sensor as input, and performs peak current mode control by using a first slope compensation circuit corresponding to the positive polarity of the input voltage and a second slope compensation circuit corresponding to the negative polarity of the input voltage, and outputs a control signal to turn the first switching element and the second switching element on and off. It has, A power converter that limits the command value of the reactor current by interposing a limiter between the DC bus voltage control unit and the peak current command value setting unit, the limiter having an upper limit that caps out above a predetermined positive value and a lower limit that caps out below a predetermined negative value.

2. In the power conversion device according to claim 1, A power conversion device in which the second slope compensation circuit includes an inverting circuit for reversing the polarity and is configured using the same slope compensator as the first slope compensation circuit.

3. In the power conversion device according to claim 1 or 2, The aforementioned bridgeless PFC circuit is The first diode and the second diode, A first leg and a second leg are connected in parallel between the pair of output wirings, It further possesses, In the first leg, the first switching element and the first diode are arranged in series such that their current-carrying directions are opposite and outward, and in the second leg, the second switching element and the second diode are arranged symmetrically with respect to the first switching element and the first diode. A power converter in which one output terminal of the input wiring is connected to a portion intermediate between the first switching element and the first diode in the first leg, and the other output terminal of the input wiring is connected to a portion intermediate between the second switching element and the second diode in the second leg.

4. In the power conversion device according to claim 1 or 2, The aforementioned bridgeless PFC circuit is The first diode and the second diode, A first leg and a second leg are connected in parallel between the pair of output wirings, It further possesses, In the first leg, the first diode and the second diode are arranged in series such that their current-carrying directions are the same, and in the second leg, the first switching element and the second switching element are arranged in series such that their current-carrying directions are opposite to those of the first diode and the second diode. A power converter in which one output terminal of the input wiring is connected to a portion between the first diode and the second diode in the first leg, and the other output terminal of the input wiring is connected to a portion between the first switching element and the second switching element in the second leg.

5. In the power conversion device according to claim 1 or 2, The aforementioned bridgeless PFC circuit is The first diode, the second diode, the third diode, and the fourth diode, A first leg and a second leg are connected in parallel between the pair of output wirings, A third leg connected between the output-side portion of the pair of input-side wirings, It further possesses, In the first leg, the first diode and the second diode are arranged in series such that the direction of current flow for both is the same, and in the second leg, the third diode and the fourth diode are arranged symmetrically with respect to the first diode and the second diode. In the third leg, the first switching element and the second switching element are arranged in series such that their current-carrying directions face each other. A power converter in which one output terminal of the input wiring is connected to a point intermediate between the first diode and the second diode in the first leg, and the other output terminal of the input wiring is connected to a point intermediate between the third diode and the fourth diode in the second leg.

6. In the power conversion device according to claim 1, The current sensor is a power conversion device that directly measures the reactor current using a Hall element.

7. It is an in-car charger, The power conversion device described in claim 1, An output-side connection device connected to the pair of output-side wirings and operating together with the power converter, which performs predetermined processing and outputs DC power while receiving it from the power converter, Includes, An on-board charger capable of operating the power converter when the operation of the output-side connection device is stopped.

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