Wafer processing tape and wafer processing method

Abstract

The objective is to provide a wafer processing tape that can be used across a wafer in semiconductor processing, which can suppress the adhesion of cutting debris generated during the dicing process due to static electricity, and can also suppress contamination of chips by antistatic agents during processes requiring heating, and a wafer processing method that can integrate multiple semiconductor processing processes by using this tape. [Solution] The device comprises a base layer, an adhesive layer, and an antistatic layer disposed between the base layer and the adhesive layer, wherein the ratio (R1 / R0) of the surface resistivity R1 of the adhesive layer after heating at 250°C for 5 minutes to the surface resistivity R0 of the adhesive layer before heating is 0.001 to 10 or less, and the surface resistivity R1 is 1.0 × 10 12 The following is a tape for wafer processing.

Description

[Technical Field]

[0001] The present invention relates to a tape for wafer processing and a wafer processing method. [Background technology]

[0002] Adhesive sheets are applied to semiconductor wafers during processing to protect them from damage. For example, in the back grinding process of semiconductor wafer processing, adhesive sheets are applied to protect the patterned surface of the semiconductor wafer. In addition, various types of tapes are used in each process of semiconductor processing, such as back grinding tape, heat-resistant tape, conductive tape, dicing tape, and pickup tape.

[0003] As an example, a substrate is known that is used in adhesive sheets for semiconductor wafer processing, with the aim of improving the adhesion of the substrate to the stage in the semiconductor wafer processing process, and in which the thermal shrinkage rate of both the MD and TD after heating at 130°C for 10 minutes is 0% or more (Patent Document 1). [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] WO2023 / 068088 [Overview of the project] [Problems that the invention aims to solve]

[0005] In semiconductor processing, different tapes are used for each process because the required properties of the wafer processing tape differ for each stage. However, because the wafer processing tape has to be replaced after each process, the semiconductor processing process becomes more time-consuming and complicated.

[0006] The present invention has been made in view of the above problems, and aims to provide a wafer processing tape that can be used transversely in semiconductor processing, which can suppress the adhesion of cutting debris generated in the dicing process due to static electricity, and which can suppress contamination of chips by antistatic agents in processes requiring heating, and a wafer processing method that can integrate multiple semiconductor processing processes by using the tape. [Means for solving the problem]

[0007] In other words, the present invention is as follows: [1] A base layer and Adhesive layer, The substrate layer and the adhesive layer are disposed between them, The ratio (R1 / R0) of the surface resistivity R1 of the adhesive layer after heating at 250°C for 5 minutes to the surface resistivity R0 of the adhesive layer before heating is 0.001 to 10 or less. The aforementioned surface resistivity R1 is 1.0 × 10 12 The following is: Tape for wafer processing. [2] The aforementioned surface resistivity R0 is 1.0 × 10 12 The following is: [1] Wafer processing tape as described in [1]. [3] The antistatic layer includes a carbon material, The wafer processing tape described in [1] or [2]. [4] The antistatic layer comprises an acrylic urethane resin, A wafer processing tape as described in any one of items [1] to [3]. [5] The adhesive force N0 of the adhesive layer to the silicon wafer is 0.2 to 5.0 N / 25 mm at 25°C. A wafer processing tape as described in any one of items [1] to [4]. [6] The adhesive force N1 of the adhesive layer to the silicon wafer after heating at 250°C for 5 minutes is 0.5 to 6.0 N / 25 mm at 25°C. The wafer processing tape according to any one of [1] to [5]. 〔7〕 The base material layer contains a polyamide resin. The wafer processing tape according to any one of [1] to [6]. 〔8〕 The base material layer has no yield point. The wafer processing tape according to any one of [1] to [7]. 〔9〕 The ultraviolet transmittance of the base material layer at 365 nm is 70% or more. The wafer processing tape according to any one of [1] to [8]. 〔10〕 The wafer processing tape according to any one of [1] to [9] is attached to the wafer to have a processing step of performing wafer processing. Wafer processing method.

Advantages of the Invention

[0008] According to the present invention, it is possible to suppress the adhesion of cutting chips generated in the dicing process due to static electricity, and to suppress the contamination of chips by an antistatic agent in a process that requires heating. It is possible to provide a wafer processing tape that can be used transversely in semiconductor processing, and a wafer processing method capable of integrating a plurality of semiconductor processing steps by using the tape.

Brief Description of the Drawings

[0009] <​​​​​​​​​​​​The following describes in detail embodiments of the present invention (hereinafter referred to as "these embodiments"), but the present invention is not limited thereto, and various modifications are possible without departing from its essence. In the drawings, the same elements are denoted by the same reference numerals, and redundant explanations are omitted. Furthermore, unless otherwise specified, positional relationships such as up, down, left, and right are based on the positional relationships shown in the drawings. Moreover, the dimensional ratios in the drawings are not limited to those shown.

[0011] 1. Tape for wafer processing The wafer processing tape of this embodiment has a base layer, an adhesive layer, and an antistatic layer disposed between the base layer and the adhesive layer, and the ratio of the surface resistivity R1 of the adhesive layer after heating at 250°C for 5 minutes to the surface resistivity R0 of the adhesive layer before heating (R1 / R0) is 0.001 to 10 or less, and the surface resistivity R1 is 1.0 × 10 12 The following applies:

[0012] Figure 1 shows a schematic cross-sectional view of the wafer processing tape of this embodiment. As shown in Figure 1, the wafer processing tape 10 of this embodiment has a base layer 11, an adhesive layer 12, and an antistatic layer 13 disposed between the base layer 11 and the adhesive layer 12. The surface 12a (exposed surface) of the adhesive layer 12 adheres closely to the element formation surface 20a of the wafer 20 on which semiconductor elements are formed, thereby protecting the semiconductor elements on the element formation surface 20a of the wafer 20. In this embodiment, the surface of the wafer processing tape and each of its layers that is in contact with the wafer is called the front surface, and the opposite surface is called the back surface.

[0013] Figure 2 shows a flowchart illustrating one embodiment of the wafer processing method of this embodiment in a schematic cross-sectional view. As shown in Figure 2, the wafer processing method may include a bonding step S1 in which the wafer processing tape 10 is bonded to the element formation surface 20a of the wafer 20; a back grinding step S2 in which the non-element formation surface 20b of the wafer 20 bonded to the wafer processing tape 10 is polished with a grinder 40; a metal layer formation step S3 in which a metal layer 21 is formed on the non-element formation surface 20b opposite to the surface to which the wafer processing tape 10 is bonded; a dicing step S4 in which the wafer 20 bonded to the wafer processing tape 10 is diced to produce a chip 30; a processing step S5 in which surface treatment is applied to the back surface of the chip 30 by etching or sputtering or reflow treatment; and a peeling step S6 in which the wafer processing tape is peeled off.

[0014] Note that Figure 2 is an example of a wafer processing method, and it is not necessary to perform all of steps S2 to S5 in the wafer processing method, nor is the order of the steps limited to those specified in Figure 2. Therefore, for example, the metal layer formation step S3 may be omitted, or the processing step S5 may be omitted, or the processing step S5 may be performed before the dicing step S4.

[0015] Incidentally, in the dicing process S4, when the wafer bonded to the wafer processing tape is diced and separated into individual pieces, cutting debris may be generated. If such cutting debris adheres to the area around the separated chips 30 due to static electricity or the like, the chips 30 will be contaminated, and the subsequent processing steps S5 and peeling step S6 will be hindered. Therefore, it is conceivable to provide an antistatic layer on the wafer processing tape to suppress the adhesion of cutting debris. However, on the one hand, if the antistatic layer is provided on the surface 12a side of the adhesive layer 12, the conductive material that exhibits an antistatic effect may adhere to the element formation surface 20a of the wafer 20 and the chips 30, potentially degrading the electrical characteristics of the chips. On the other hand, if the antistatic layer is provided on the back surface 11b side of the base material layer 11, the antistatic effect may not be sufficiently exhibited, and the adhesion of cutting debris may not be sufficiently suppressed.

[0016] In contrast, the wafer processing tape 10 of this embodiment has an antistatic layer 13 between the base layer 11 and the adhesive layer 12. This allows for sufficient antistatic effect while suppressing the adhesion of conductive material to the element formation surface 20a or chip 30 of the wafer 20.

[0017] Furthermore, in processes where the wafer processing tape 10 is exposed to high temperatures, such as the metal layer formation process S3 and the processing process S5, it is anticipated that the antistatic agent in the antistatic layer 13 will migrate to the surface 12a side of the adhesive layer 12. While such migration improves the antistatic effect, it may cause the antistatic agent to adhere to the element formation surface 20a of the wafer 20 or the chip 30, potentially degrading the electrical characteristics of the chip.

[0018] In contrast, the wafer processing tape 10 of this embodiment defines the change in the surface resistivity of the adhesive layer before and after heating, from the viewpoint of defining the characteristic that the antistatic agent is less likely to migrate to the surface 12a side of the adhesive layer 12. This suppresses the migration of the antistatic agent from the antistatic layer 13 between the substrate layer 11 and the adhesive layer 12 to the surface 12a side of the adhesive layer 12, and suppresses contamination of the element formation surface 20a of the wafer 20 by the antistatic agent.

[0019] As described above, the wafer processing tape of this embodiment can suppress the adhesion of cutting debris generated during the dicing process due to static electricity, and can also suppress contamination of chips by antistatic agents during processes requiring heating. Therefore, there is no need to change the wafer processing tape according to each process in the wafer processing process, and it can be used across the wafer processing method as shown in Figure 2. The composition of each layer will be described in detail below.

[0020] 1.1. Antistatic layer The antistatic layer preferably contains an antistatic agent and a resin, and may contain other components as needed.

[0021] The antistatic agent is not particularly limited, but examples include magnesium silicate, smectite (e.g., montmorillonite, bydelite, nontronite, hectorite, savonite), carbon nanotubes, fullerene, graphene, graphite, quaternary ammonium salts, guanidine compounds, imidazoline compounds, pyridinium compounds, sulfonates, sulfate esters, phosphate esters, ionic liquids, polythiophene, phosphorus-doped tin oxide, spherical ATO, etc.

[0022] Among these, carbon materials such as carbon nanotubes, fullerenes, graphene, and graphite are preferred. By using such antistatic agents, migration of the antistatic agent is further suppressed, and chip contamination by the antistatic agent at high temperatures tends to be further suppressed.

[0023] The antistatic agent content is preferably 20-80% by mass, 30-70% by mass, or 40-60% by mass relative to the total amount of the antistatic layer. When the antistatic agent content is within the above range, the adhesion of cutting chips due to static electricity is further suppressed, the migration of the antistatic agent is further suppressed, and chip contamination by the antistatic agent at high temperatures tends to be further suppressed.

[0024] The resin is not particularly limited, but examples include polysiloxane, polyurethane resin, acrylic resin, acrylic urethane resin, polyvinyl chloride resin, ethylene-vinyl acetate resin, polyester resin, polyolefin resin, styrene resin, and acrylic-modified polyester resin.

[0025] Among these, it is preferable to include acrylic urethane resin. By using such a resin, migration of the antistatic agent is further suppressed, and chip contamination by the antistatic agent at high temperatures tends to be further suppressed.

[0026] The resin content is preferably 20-80% by mass, 30-70% by mass, or 40-60% by mass relative to the total amount of the antistatic layer. When the resin content is within the above range, migration of the antistatic agent is further suppressed, and chip contamination by the antistatic agent at high temperatures tends to be further suppressed.

[0027] The thickness of the antistatic layer is preferably 0.05 to 2 μm, 0.10 to 1.5 μm, or 0.25 to 1.0 μm. When the thickness of the antistatic layer is within the above range, migration of the antistatic agent is further suppressed, and chip contamination by the antistatic agent at high temperatures tends to be further suppressed.

[0028] The total light transmittance of the antistatic layer is preferably 70-99%, 75-98%, 80-97%, or 85-96%. Because the total light transmittance of the antistatic layer is within the above range, the transmittance when ultraviolet light is irradiated onto the adhesive layer 12 from the back surface 11b of the substrate layer tends to improve. Therefore, the adhesive layer 12 can be cured by ultraviolet irradiation, and the peelability of the wafer 20 from the adhesive layer 12 in the peeling process tends to improve.

[0029] The total light transmittance can be measured in accordance with JIS K 7375. Furthermore, the total light transmittance can be adjusted by the content and type of the antistatic agent and resin mentioned above.

[0030] 1.2. Base material layer The substrate layer 11 conforms to the irregularities of the wafer 20, protecting it from damage during the wafer processing process, and also contributes to improved adhesion by preventing gaps from forming between the adhesive layer and the element formation surface 20a.

[0031] The base layer preferably contains a resin, and the resin is not particularly limited, but examples include polyamide resins, ionomer resins, polyolefin resins, vinyl chloride resins, polyester resins, polystyrene resins, phenolic resins, and acrylic resins. These resins may be used individually or in combination of two or more. More specifically, the resins may be mixtures, copolymers, or laminates of one resin with another.

[0032] Among these, polyamide resins, ionomer resins, and polyolefin resins are preferred, with polyamide resins being more preferred. Using such resins tends to improve the wafer's conformability to irregularities, heat resistance, and ultraviolet transmittance.

[0033] The polyamide resin is not particularly limited, but examples include aliphatic polyamides such as polyamide 6 and polyamide 66; semi-aromatic polyamides such as polyamide 6T, polyamide 9T, and polyamide 10T; and fully aromatic polyamides obtained from aromatic dicarboxylic acids and aromatic diamines. Note that aliphatic polyamides may also have alicyclic groups in addition to aliphatic groups.

[0034] The ionomer resin is not particularly limited as long as it is a polymer in which metal ions are intermolecularly bonded, but examples include polyolefin-based ionomers, (meth)acrylic-based ionomers, polystyrene-based ionomers, and polyester-based ionomers. The metal ions that constitute the salt of the ionomer resin are not particularly limited, but examples include monovalent metal ions such as sodium ions and lithium ions; divalent metal ions such as zinc ions, calcium ions, and magnesium ions; and trivalent metal ions such as aluminum ions.

[0035] The polyolefin resin is not particularly limited, but examples include polyethylene, polypropylene, and copolymers thereof.

[0036] The resin content is preferably 80-100% by mass, 85-100% by mass, or 90-100% by mass, relative to the total amount of the substrate layer.

[0037] The base layer may contain additives other than resin, as needed. While not particularly limited, examples of additives include plasticizers, heat stabilizers, colorants, organic lubricants, inorganic lubricants, surfactants, processing aids, and antistatic agents. Additives may be used individually or in combination of two or more.

[0038] It is preferable that the base layer does not have a yield point. In this embodiment, "yield point" refers to the first point in the stress-strain curve where strain increases without an increase in stress. "Having no yield point" means that there is no point in the stress-strain curve where strain increases without an increase in stress. The stress-strain curve can be measured in accordance with JIS K 7161, and the yield point can be identified from the stress-strain curve measured in this manner.

[0039] Resins without a yield point are not particularly limited, but examples include polystyrene resin, acrylic resin, phenolic resin, and polyamide resin.

[0040] The ultraviolet transmittance of the substrate layer at 365 nm is preferably 70% or more, 80-99.5%, and 85-99%. A ultraviolet transmittance of 70% or more allows the adhesive layer 12 to be cured by irradiating it with ultraviolet light from the back surface 11b of the substrate layer, which tends to improve the peelability of the wafer 20 from the adhesive layer 12 during the peeling process.

[0041] The ultraviolet transmittance at 365 nm may also be measured by using a UV-Vis spectrophotometer to measure the light transmittance of the substrate in the wavelength range of 300 nm to 800 nm, and then reading the light transmittance at 365 nm from the obtained measurement results.

[0042] The thickness of the base material layer is preferably 10 to 500 μm, 15 to 250 μm, or 25 to 100 μm. When the thickness of the base material layer is within the above range, the followability with respect to the unevenness of the wafer is further improved, and it becomes difficult for voids or the like to enter between the wafer processing tape and the element formation surface, and the adhesion tends to be improved.

[0043] 1.3. Adhesive layer The adhesive layer 12 is a layer laminated on the surface 11a side of the base material layer 11 via an antistatic layer 13. During the semiconductor processing process, the adhesive layer 12 adheres to the wafer 20 to protect the element formation surface 20a, and after semiconductor processing, it can be peeled off without causing adhesive residue or the like.

[0044] The surface resistivity R0 on the adhesive layer side before heating is preferably 1.0×10 12 Ω / □ or less, 1.0×10 3 ~1.0×10 11 Ω / □, 1.0×10 4 ~1.0×10 10 Ω / □, 1.0×10 5 ~1.0×10 9 Ω / □, 1.0×10 6 ~1.0×10 8 Ω / □. When the surface resistivity R0 is within the above range, cutting chips generated in the dicing process or the like tend to be more suppressed from adhering due to static electricity.

[0045] The surface resistivity R1 on the adhesive layer side after heating at 250 °C for 5 minutes is 1.0×10 12 Ω / □ or less, preferably 1.0×10 3 ~1.0×10 11 Ω / □, 1.0×10 4 ~1.0×10 10 Ω / □, 1.0×10 5 ~1.0×10 9 Ω / □, 1.0×10 6 ~1.0×10 8The ratio is Ω / □. This suppresses chip contamination by antistatic agents at high temperatures, and because the surface resistivity R1 is within the above range, cutting chips generated during the dicing process and other processes tend to adhere more effectively due to static electricity.

[0046] The ratio (R1 / R0) of the surface resistivity R1 of the adhesive layer after heating at 250°C for 5 minutes to the surface resistivity R0 of the adhesive layer is 0.001 to 10 or less, preferably 0.01 to 7.5, 0.10 to 5.0, and 0.25 to 2.5.

[0047] Surface resistivity R0 and R1 can be measured using an ACL StaticideACL800 instrument based on ASTM D257. Furthermore, surface resistivity R0 and R1 and their ratio can be adjusted by the composition of the antistatic layer, particularly the type of antistatic agent and resin of the antistatic layer, and the thickness and components of the adhesive layer. In addition, surface resistivity R0 and R1 and their ratio can also be adjusted by the method of forming the adhesive layer. For example, by performing a heat treatment at 100-200°C for 1-30 minutes followed by an aging treatment at 30-70°C for 1-7 days, the reaction between the base polymer and the crosslinking agent proceeds sufficiently, and migration of the antistatic agent tends to be less likely to occur in processes exposed to high temperatures.

[0048] The adhesive force N0 of the adhesive layer to the silicon wafer is preferably 0.2 to 5.0 N / 25 mm, 0.3 to 2.5 N / 25 mm, 0.4 to 1.0 N / 25 mm, and 0.5 to 0.8 N / 25 mm at 25°C. By having the adhesive force N0 of the adhesive layer to the silicon wafer within the above range, the element formation surface of the wafer 20 can be protected more appropriately.

[0049] The adhesive force N1 of the adhesive layer to the silicon wafer after heating at 250°C for 5 minutes is preferably 0.5 to 6.0 N / 25 mm, 0.7 to 5.0 N / 25 mm, 1.0 to 2.5 N / 25 mm, and 1.1 to 1.5 N / 25 mm at 25°C. By having the adhesive force N1 of the adhesive layer to the silicon wafer within the above range, adhesion can be maintained even at high temperatures, and the element formation surface of the wafer 20 can be protected more appropriately.

[0050] The adhesive strengths N0 and N1 can be measured according to JIS Z 0237 (2009). Furthermore, the adhesive strengths N0 and N1 can be adjusted by the type and amount of base polymer and crosslinking agent used, as described later. In addition, the adhesive strengths N0 and N1 can also be adjusted by the method of forming the adhesive layer. For example, by heat treatment at 100-200°C for 1-30 minutes followed by aging treatment at 30-70°C for 1-7 days, the reaction between the base polymer and the crosslinking agent proceeds sufficiently, thereby adjusting the adhesive strengths N0 and N1.

[0051] The thickness of the adhesive layer is preferably 0.2 to 100 μm, 0.5 to 50 μm, 0.7 to 25 μm, or 1.0 to 20 μm. Having a thickness within these ranges tends to minimize interference with conformability and reduce adhesive residue.

[0052] It is preferable that the adhesive layer's adhesive strength is reduced by ultraviolet irradiation. This allows the layer to adhere closely to the wafer 20 and protect the element formation surface 20a from the bonding process S1 to the dicing process S4, and then, in the subsequent peeling process, the adhesive strength is reduced by ultraviolet irradiation, allowing the chip to be picked up without any adhesive residue.

[0053] Thus, from the viewpoint of reducing adhesive strength by ultraviolet irradiation, the adhesive layer may have a base polymer having polymerizable double bonds and crosslinkable groups, a photopolymerization initiator, and a crosslinking agent, and may also contain other components as needed. Furthermore, in the adhesive layer, the crosslinkable groups of the base polymer and the crosslinking agent may react to form a three-dimensional crosslinked structure.

[0054] The base polymer constituting the main component of the adhesive layer is not particularly limited, but examples include (meth)acrylic acid ester copolymers. The shape of the (meth)acrylic acid ester copolymer is not particularly limited, but examples include linear, branched, or crosslinked shapes. Among these, having a crosslinked shape is preferred. By using such a base polymer, the physical properties of the adhesive layer can be adjusted. The base polymer having a crosslinked or branched shape may be formed by bonding epoxy groups, etc., of a base polymer having a linear or branched shape via a crosslinking agent described later.

[0055] The monomers constituting the (meth)acrylic acid ester copolymer are not particularly limited, but examples include alkyl (meth)acrylic acid esters having an alkyl group with 1 to 3 carbon atoms, (meth)acrylic acid esters having a glycidyl group, (meth)acrylic acid esters having a hydroxyl group, and monomers having an aromatic group. In addition, the (meth)acrylic acid ester copolymer may also contain copolymerizable vinyl monomers other than acrylic monomers.

[0056] The alkyl (meth)acrylate ester having an alkyl group with 1 to 3 carbon atoms is not particularly limited, but examples include methyl (meth)acrylate, ethyl (meth)acrylate, and propyl (meth)acrylate.

[0057] The (meth)acrylic acid ester having a glycidyl group is not particularly limited, but examples include glycidyl (meth)acrylate and allyl glycidyl ether. The constituent units derived from the (meth)acrylic acid ester having a glycidyl group may be used for the purpose of introducing epoxy groups into the base polymer. The epoxy groups introduced into the base polymer react with the crosslinking agent described later, causing the base polymers to bond to each other and become three-dimensionally crosslinked.

[0058] The (meth)acrylic acid ester having a hydroxyl group is not particularly limited, but examples include 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, 2-hydroxybutyl (meth)acrylate, pentaerythritol triacrylate, glycidol di(meth)acrylate, and dipentaerythritol pentaacrylate. The constituent units derived from the (meth)acrylic acid ester having a hydroxyl group may be used for the purpose of introducing epoxy groups into the base polymer. The hydroxyl groups introduced into the base polymer react with the crosslinking agent described later, causing the base polymers to bond to each other and become three-dimensionally crosslinked.

[0059] The monomers having aromatic groups are not particularly limited, but examples include styrene, phenoxyethyl (meth)acrylate, and benzyl (meth)acrylate.

[0060] Among these, acrylic resins having hydroxyl groups or carboxyl groups and polymerizable double bonds are preferred as the base polymer. Including such a base polymer tends to improve tackiness before UV irradiation and peelability after UV irradiation.

[0061] The glass transition temperature of the base polymer is preferably -90 to -30°C, -80 to -40°C, or -70 to -50°C. Furthermore, having the glass transition temperature of the base polymer within the above range tends to make it easier to adjust the adhesive strengths N0 and N1 within the above range.

[0062] The base polymer content is preferably 85-99% by mass, 90-98% by mass, or 92-97% by mass, relative to the total amount of the adhesive layer.

[0063] The crosslinking agent is not particularly limited as long as it has two or more functional groups that react with crosslinkable groups such as carboxyl groups and hydroxyl groups of the base polymer.

[0064] Such crosslinking agents are not particularly limited, but examples include 2,4-tolylene diisocyanate, 2,6-tolylene diisocyanate, hydrogenated tolylene diisocyanate, 1,3-xylylene diisocyanate, 1,4-xylylene diisocyanate, diphenylmethane-4,4-diisocyanate, isophorone diisocyanate, 1,3-bis(isocyanatomethyl)cyclohexane, isocyanurate of hexamethylene diisocyanate, tetramethylxylylene diisocyanate, 1,5-naphthalene diisocyanate, trim Isocyanate crosslinking agents such as tyrolpropane tolylene diisocyanate adduct, trimethylolpropane xylylene diisocyanate adduct, triphenylmethane triisocyanate, and methylenebis(4-phenylmethane) triisocyanate; N,N,N',N'-tetraglycidyl-m-xylenediamine, 1,3-bis(N,N'-diglycidylaminomethyl)cyclohexane, bisphenol A·epichlorohydrin type epoxy resins, and N,N'-[1,3-phenylenebis(methylene)]bis[bis(oxiran-2-yl] Epoxy crosslinking agents such as methylamine, ethylene glycol diglycidyl ether, polyethylene glycol diglycidyl ether, glycerin diglycidyl ether, glycerin triglycidyl ether, 1,6-hexanediol diglycidyl ether, trimethylolpropane triglycidyl ether, sorbitol polyglycidyl ether, polyglycerol polyglycidyl ether, pentaerythritol polyglycidyl erythritol, diglycerol polyglycidyl ether, etc.; tetramethylolmethane-tri-β-agile Examples include aziridine crosslinking agents such as dinylpropionate, trimethylolpropane-tri-β-aziridinylpropionate, N,N'-diphenylmethane-4,4'-bis(1-aziridinecarboxamide), and N,N'-hexamethylene-1,6-bis(1-aziridinecarboxamide); and melamine crosslinking agents such as hexamethoxymethylmelamine, hexaethoxymethylmelamine, hexapropoxymethylmelamine, hexasubtoxymethylmelamine, hexapentyloxymethylmelamine, and hexahexyloxymethylmelamine.

[0065] Among these, epoxy crosslinking agents and isocyanate crosslinking agents are preferred, with epoxy crosslinking agents being more preferred. By using an epoxy crosslinking agent, the base polymers can be crosslinked with highly heat-resistant ester bonds. As a result, the adhesive layer can exhibit good heat resistance even in processes exposed to high temperatures, such as the metal layer formation process S3.

[0066] The crosslinking agent content is preferably 1.0 to 6.0 parts by mass, 2.0 to 5.0 parts by mass, or 3.0 to 4.0 parts by mass per 100 parts by mass of the base polymer. By having the crosslinking agent content within the above ranges, it tends to be easier to adjust the adhesive strengths N0 and N1 within these ranges. Furthermore, by adjusting the crosslinking density through the crosslinking agent content, it tends to be easier to adjust the surface resistivity R1 and R1 / R0 within these ranges.

[0067] The photopolymerization initiator is not particularly limited, but examples include: benzophenone and its derivatives; benzoin-type photopolymerization initiators such as benzoin, benzoin methyl ether, benzoin ethyl ether, benzoin propyl ether, benzoin isobutyl ether, and benzyldimethyl ketal; acetophenone-type photopolymerization initiators such as diethoxyacetophenone and 4-tert-butyltrichloroacetophenone; thioxanthone and its derivatives; camphorquinone, 7,7-dimethyl-2,3-dioxobitic Camphorquinone-type photopolymerization initiators such as [2.2.1]heptane-1-carboxylic acid, 7,7-dimethyl-2,3-dioxobicyclo[2.2.1]heptane-1-carboxy-2-bromoethyl ester, 7,7-dimethyl-2,3-dioxobicyclo[2.2.1]heptane-1-carboxy-2-methyl ester, and 7,7-dimethyl-2,3-dioxobicyclo[2.2.1]heptane-1-carboxylic acid chloride; 2-methyl-1-[4-(methylthio)phenyl]-2-morpholinopropane α-aminoalkylphenone type photopolymerization initiators such as -1-one, 2-benzyl-2-dimethylamino-1-(4-morpholinophenyl)-butanone-1; benzoyl diphenylphosphine oxide, 2,4,6-trimethylbenzoyl-diphenylphosphine oxide, benzoyl diethoxyphosphine oxide, 2,4,6-trimethylbenzoyl dimethoxyphenylphosphine oxide, 2,4,6-trimethylbenzoyl diethoxyphenylphosphine oxide, bis(2,4,6 Examples include acylphosphine oxide type photopolymerization initiators such as (-trimethylbenzoyl)-phenylphosphine oxide; and α-hydroxyalkylphenone type photopolymerization initiators such as 2-hydroxy-2-methyl-1-phenylpropan-1-one, 2-hydroxy-2-methyl-1-[4-(2-hydroxyethoxy)phenyl]propan-1-one, 1-hydroxycyclohexylphenyl ketone, and 2-hydroxy-2-methyl-1-[4-(1-methylvinyl)phenyl]propan-1-one.

[0068] Among these, acylphosphine oxide type photopolymerization initiators are preferred. Using such photopolymerization initiators results in excellent polymerization properties and a tendency for tackiness to decrease when irradiated with ultraviolet light.

[0069] The content of the photopolymerization initiator is preferably 1.0 to 5.0 parts by mass, 1.5 to 4.0 parts by mass, or 2.0 to 3.0 parts by mass per 100 parts by mass of the base polymer. When the content of the photopolymerization initiator is within the above range, the curing reaction proceeds effectively when irradiated with ultraviolet light, and the adhesive strength tends to decrease further.

[0070] 2. Method for manufacturing wafer processing tape The method for manufacturing the wafer processing tape of this embodiment is not particularly limited, but is not limited as long as it includes a step of forming an antistatic layer 13 and an adhesive layer 12 on the surface 11a of the base layer 11.

[0071] The method for forming the adhesive layer 12 and the antistatic layer 13 is not particularly limited. For example, the films may be dry-laminated together, or the composition may be coated onto the surface of the base layer 11, and the composition may be dried or photocured to form the adhesive layer 12 and the antistatic layer 13. Alternatively, the adhesive layer 12 and the antistatic layer 13 may be bonded to the base layer 11 via an adhesive layer different from the adhesive layer 12.

[0072] 3. Wafer Processing Method The wafer processing method of this embodiment includes a processing step of attaching the wafer processing tape to a wafer and performing wafer processing.

[0073] As shown in Figure 2, the wafer processing method may include a bonding step S1 in which the wafer processing tape 10 is bonded to the element formation surface 20a of the wafer 20; a back grinding step S2 in which the non-element formation surface 20b of the wafer 20 bonded to the wafer processing tape 10 is polished with a grinder 40; a metal layer formation step S3 in which a metal layer 21 is formed on the non-element formation surface 20b opposite to the surface to which the wafer processing tape 10 is bonded; a dicing step S4 in which the wafer 20 bonded to the wafer processing tape 10 is diced to produce a chip 30; a processing step S5 in which the back surface of the chip 30 is surface treated by etching or sputtering or reflow treatment; and a peeling step S6 in which the wafer processing tape is peeled off.

[0074] 3.1.Lamination process The bonding step S1 is a step of bonding the wafer processing tape 10 to the element formation surface 20a of the wafer 20. The surface of the wafer 20 to which the wafer processing tape 10 is bonded may be the non-element formation surface 20b.

[0075] In the bonding process, the wafer processing tape 10 may be bonded to the wafer main surface 20a after being preheated, or it may be bonded to the wafer main surface 20a and then heated. Alternatively, the wafer processing tape 10 may be bonded to the wafer main surface 20a without heating. By bonding the surface 11a of the adhesive layer 12 to the element formation surface 20a of the wafer while heated, the surface 11a of the adhesive layer 12 can be bonded in a state where it follows the element formation surface 20a of the wafer (see S2 in Figure 2). In this way, the protrusions are embedded in the wafer processing tape 10, thereby protecting the element formation surface 20a of the wafer that has the protrusions.

[0076] The heating temperature is preferably 60 to 150°C, more preferably 70 to 140°C, and even more preferably 80 to 130°C. The heating time for the wafer processing tape 10 is preferably 3 to 120 seconds, and more preferably 5 to 90 seconds. When the heating conditions are within the above range, the conformability of the wafer processing tape 10 tends to improve.

[0077] 3.2. Processing process The processing steps for processing the wafer 20 with the wafer processing tape 10 bonded to the wafer 20 are not particularly limited, and any wafer processing process can be applied as appropriate. For example, processing steps include a backgrinding step S2, a metal layer formation step S3, a dicing step S4, and a processing step S5.

[0078] Furthermore, as shown in Figure 2, a processing process that combines these steps includes a metal layer formation step S3 in which a metal layer 21 is formed after the backgrinding step S2, and a dicing step S4 in which the thinned wafer is diced by blade dicing or the like. In the following, a process in which the metal layer formation step S3 and the dicing step S4 are performed after the backgrinding step S2 will be described, but this embodiment is not limited to this.

[0079] 3.2.1. Backgrinding Process The backgrinding process S2 is a process of polishing the non-element formation surface 20b of the wafer 20 that is bonded to the wafer processing tape 10. Specifically, with the wafer processing tape 10 attached to the element formation surface 20a as a backgrinding tape from the viewpoint of protecting the element formation surface 20a, the non-element formation surface 20b of the wafer 20 is ground (backgrinded) to a desired thickness.

[0080] The specific method of back grinding is not particularly limited, and known methods can be used. For example, a method can be used in which a slurry containing abrasive particles is supplied to the back surface 20b of the wafer 20 while grinding. The thickness of the thinned wafer obtained by this process is not particularly limited as long as it is a thickness suitable for the processing purpose, but as an example, it is preferably 300 μm or less, 150 μm or less, and 50 μm or less.

[0081] In backgrinding, a load is applied in the thickness direction of the wafer 20, which can easily cause damage to protrusions and other parts, leading to a decrease in yield. In contrast, by using the wafer processing tape 10 of this embodiment, it is possible to perform processing with at least a portion of the protrusions embedded in the wafer processing tape 10, thereby avoiding damage to the protrusions and other parts.

[0082] In the wafer processing method of this embodiment, when performing backgrinding on a wafer that has been pre-formed with modified portions or grooves on its surface for fragmentation, the wafer 20 may be thinned to approximately the same depth as the modified portions or grooves when the wafer 20 is thinned from the back surface 20b of the wafer 20. This allows for simultaneous thinning by backgrinding and fragmentation.

[0083] 3.2.2. Metal layer formation process The metal layer formation step S3 is a step in which a metal layer 21 is formed on the surface 20b of the wafer 20 opposite to the surface 20a to which the wafer processing tape 10 is bonded. The method for forming the metal layer is not particularly limited, but examples include ALD (atomic layer deposition) and CVD (chemical vapor deposition). The conditions for forming the metal layer using these methods are not particularly limited, but examples include processing at 200-300°C for 3-10 minutes.

[0084] 3.2.3. Dicing Process The dicing process S4 is a process of dicing the wafer 20. The dicing method is not particularly limited, but one example is blade dicing, in which the wafer is cut into semiconductor chips 30 using a dicing blade.

[0085] 3.2.4. Processing steps In processing step S5, the back surface of the chip 30 may be surface-treated by etching, sputtering, or reflow to form any surface treatment layer 22. The processing method is not particularly limited, and any processing can be selected according to the application of the chip.

[0086] 3.3. Peeling Process The peeling step S6 is the process of peeling the wafer processing tape 10 from the wafer 20 or semiconductor chip 30. The peeling step in which the semiconductor chip 30 is taken from the wafer processing tape is also called the peeling step.

[0087] In the peeling step S6, the wafer processing tape 10 may be peeled off at room temperature, or it may be peeled off under heating. Also, in the peeling step S6, if the adhesive layer 12 contains a base polymer having polymerizable double bond groups and a photopolymerization initiator, the adhesive layer 12 may be cured by irradiation with ultraviolet light before peeling to reduce its adhesion to the wafer 20. This tends to further improve release properties and further suppress contamination by residue from the tape. Note that if the substrate is transparent, the ultraviolet irradiation may be performed from the substrate 11 side toward the adhesive layer 12.

[0088] Furthermore, when picking up the semiconductor chip 30 from the wafer processing tape, although not particularly limited, for example, the semiconductor chip 30 may be pushed up with a push-up needle and then picked up by suction with a suction collet.

[0089] Alternatively, during pickup, an expanding device may be used to stretch the wafer processing tape 10 in the planar direction, separating each semiconductor chip 30, and then the chips may be picked up by a pickup device. [Examples]

[0090] The present invention will be described in more detail below using examples and comparative examples. The present invention is not limited in any way by the following examples. Unless otherwise specified, each physical property value was measured at room temperature. In addition, unless otherwise specified, the amount of each raw material used is given in terms of solid content. Therefore, if it is stated that 100 parts by mass of a raw material with a solid content of 40% is used, the total amount used, including the liquid content, will be 250 parts by mass.

[0091] (Comparative Example 1) A composition for an adhesive layer was prepared by mixing 100 parts by mass of an acrylic resin having polymerizable carbon double bonds, carboxyl groups, and hydroxyl groups (Vinylole ELX-6512, manufactured by Resonaq, glass transition temperature: -60°C), 2.5 parts by mass of an acylphosphine oxide type photopolymerization initiator (Omnirad 819, manufactured by IGM Resins BV), and 3.5 parts by mass of an epoxy crosslinking agent (TETRAD-X, manufactured by Mitsubishi Gas Chemical Company).

[0092] A transparent polyamide film with a thickness of 50 μm (Unitika Corporation, Uniamide EX-50, 365 nm UV transmittance 85%, no yield point) was used as the substrate layer, and the adhesive layer composition prepared as described above was applied to one surface of the film. After heating at 150°C for 2 minutes, the film was aged at 40°C for 3 days to crosslink the carboxyl and hydroxyl groups of the acrylic resin with the epoxy groups of the epoxy crosslinking agent. This produced the wafer processing tape of Comparative Example 1. The thickness of the adhesive layer was 15 μm.

[0093] (Example 1) A 50 μm thick transparent polyamide film (Unitika Corporation, Uniamide EX-50, 365 nm UV transmittance 85%, no yield point) was used as the base layer. On one surface of this film, Corcoat CS-5309 (Corcoat Corporation), which contains acrylic urethane resin and carbon nanotubes, was applied and dried to form an antistatic layer (0.5 μm thick, total light transmittance 85%).

[0094] Then, an adhesive layer composition similar to that of Comparative Example 1 was applied to the antistatic layer, heated at 150°C for 2 minutes, and then aged at 40°C for 3 days to react the carboxyl and hydroxyl groups of the acrylic resin with the epoxy groups of the epoxy crosslinking agent, thereby crosslinking and forming an adhesive layer (thickness 15 μm). This produced the wafer processing tape of Example 1, which has a laminated structure in which the antistatic layer is sandwiched between the substrate layer and the adhesive layer.

[0095] (Comparative Example 2) A wafer processing tape for Comparative Example 2 was prepared in the same manner as in Example 1, except that an antistatic layer was fabricated using Colcoat (manufactured by Colcoat, product name: Colcoat PS-903), which contains polysiloxane and polystyrene sulfonic acid compounds.

[0096] (Comparative Example 3) Adhesive layer composition 2 was prepared by adding 1% by mass of an ionic liquid (manufactured by Nippon Carlit Co., Ltd., product name: CIL-312) to the adhesive layer composition of Comparative Example 1. A wafer processing tape for Comparative Example 3 was prepared in the same manner as for Comparative Example 1, except that adhesive layer composition 2 was used instead of adhesive layer composition 1.

[0097] (Adhesive strength) The adhesive strength was measured in accordance with JIS Z 0237. Specifically, the wafer processing tape was placed on the mirror surface of a silicon wafer, and a 2kg roller was passed over it once to bond it. After that, it was left to stand at 23°C for 30 minutes to bond the surface of the adhesive layer of the wafer processing tape to the mirror surface of the silicon wafer. Then, without heating, the wafer processing tape was peeled off at a peeling angle of 180° and a peeling speed (tensile speed) of 300 mm / min, and the adhesive strength N0 (N / 25mm) was determined.

[0098] Furthermore, after bonding the surface of the adhesive layer of the wafer processing tape to the mirror surface of a silicon wafer, the wafer was heated at 250°C for 5 minutes, and then the adhesive force N1 (N / 25mm) was measured when the wafer processing tape was peeled off at a peeling angle of 180° and a peeling speed (tensile speed) of 300 mm / min.

[0099] (Surface resistivity) Surface resistivity was measured in accordance with JIS K 6911. Specifically, the surface resistivity R0 (Ω / □) was measured on the adhesive layer of the wafer processing tape before heating using a digital ultra-high resistance / micro-current meter (ADC 5451).

[0100] Furthermore, the wafer processing tape was heated at 250°C for 5 minutes, and then the surface resistivity R1 (Ω / □) of the adhesive layer of the wafer processing tape was measured.

[0101] (Processing) A bonding process was performed in which the surface of the adhesive layer of the wafer processing tape was bonded to a silicon wafer, and then it was heated at 250°C for 5 minutes, simulating a metal layer formation process. The wafer was then diced, and the adhesive layer of the wafer processing tape was cured by irradiating it with ultraviolet light at 900 mJ / cm2 from the back side of the substrate layer using a high-pressure mercury lamp. The wafer processing tape was then peeled off the wafer to obtain individual chips.

[0102] (Low contamination) For 100 chips that underwent the above processing process, the surface after peeling from the wafer processing tape was observed using a digital microscope (Keyence VHX-900) to evaluate contamination. A: Over 95% of the chips showed no stain-like contamination. B: The percentage of chips that did not show stain-like contamination was between 85% and 95%. C: The percentage of chips that did not show stain-like contamination was between 75% and 85%. D: Less than 75% of the chips showed no stain-like contamination.

[0103] (Antistatic properties) The adhesion of polishing debris was visually inspected for 100 chips that had undergone the above processing process. Based on the results, the antistatic properties were evaluated according to the following evaluation criteria. A: Over 98% of the chips showed no signs of abrasive debris. B: The percentage of chips with no visible abrasive residue was between 95% and 98%. C: The percentage of chips that did not show any abrasive debris was between 90% and 95%. D: Less than 90% of the chips showed no abrasive residue.

[0104] [Table 1]

[0105] Furthermore, instead of forming the antistatic agent layer between the substrate layer and the adhesive layer, a wafer processing tape was fabricated in which the antistatic agent layer was provided on the back surface 11b of the substrate layer. As a result, the antistatic properties were poor, and the adhesion of cutting debris was observed. In addition, instead of forming the antistatic agent layer between the substrate layer and the adhesive layer, a wafer processing tape was fabricated in which the antistatic agent layer was provided on the back surface 12a of the adhesive layer. As a result, although the antistatic properties were excellent, the electrical characteristics of the chip deteriorated and contamination was observed.

[0106] Furthermore, a similar adhesive layer composition to that in Example 1 was prepared, applied to a transparent polyamide film, and then heated at 150°C for 60 minutes without aging to produce a wafer processing tape. The surface resistivity R1 of the adhesive layer side of this wafer processing tape after heating at 250°C for 5 minutes was 1.0 × 10⁻⁶. 12 The following conditions were observed, and although the ratio (R1 / R0) was between 0.001 and 10 or less, the surface resistivity R0 before heating, the surface resistivity R0 after heating, and the ratio (R1 / R0) were slightly higher than those in Example 1. This suggests that allowing the reaction between the base polymer and the crosslinking agent to proceed sufficiently made migration of the antistatic agent less likely to occur even in processes where the wafer processing tape is exposed to high temperatures. Therefore, from the viewpoint of adjusting the surface resistivity R0 and the ratio (R1 / R0), it is considered preferable to perform a predetermined aging treatment.

[0107] Furthermore, the wafer processing tape of Example 1 exhibited excellent chemical resistance, heat resistance, dicing properties, expandability, and pick-up properties, making it suitable for use as a wafer processing tape that can be used across the wafer in semiconductor processing. [Industrial applicability]

[0108] The present invention has industrial applicability as a wafer processing tape that can be used transversely in semiconductor processing and as a processing method using the same, because it can suppress the adhesion of cutting debris generated in the dicing process due to static electricity, and can also suppress contamination of the chip by an antistatic agent in heating processes such as the metal layer formation process S3 and the processing process S5. [Explanation of Symbols]

[0109] 10... Tape for wafer processing, 11... Substrate layer, 11a... Surface, 12... Adhesive layer, 12a... Surface, 12b... Back surface, 13... Antistatic layer, 20... Wafer, 20a... Element formation surface, 20b... Non-element formation surface, 21... Metal layer, 22... Arbitrary surface treatment layer, 30... Semiconductor chip, S1... Lamination process, S2... Backgrinding process, S3... Metal layer formation process, S4... Dicing process, S5... Processing process, S6... Peeling process

Claims

1. A base layer and Adhesive layer, The substrate layer and the adhesive layer are disposed between them, The ratio (R1 / R0) of the surface resistivity R1 of the adhesive layer after heating at 250°C for 5 minutes to the surface resistivity R0 of the adhesive layer before heating is 0.001 to 10 or less. The surface resistivity R1 is 1.0 × 10 12 The following is: Tape for wafer processing.

2. The aforementioned surface resistivity R0 is 1.0 × 10 12 The following is: The wafer processing tape according to claim 1.

3. The antistatic layer includes a carbon material, The wafer processing tape according to claim 1.

4. The antistatic layer comprises an acrylic urethane resin, The wafer processing tape according to claim 1.

5. The adhesive strength N0 of the adhesive layer to the silicon wafer is 0.2 to 5.0 N / 25 mm at 25°C. The wafer processing tape according to claim 1.

6. The adhesive strength N1 of the adhesive layer to the silicon wafer after heating at 250°C for 5 minutes is 0.5 to 6.0 N / 25 mm at 25°C. The wafer processing tape according to claim 1.

7. The aforementioned substrate layer contains a polyamide resin. The wafer processing tape according to claim 1.

8. The aforementioned substrate layer does not have a yield point. The wafer processing tape according to claim 1.

9. The ultraviolet transmittance of the substrate layer at 365 nm is 70% or more. The wafer processing tape according to claim 1.

10. A processing step comprising attaching a wafer processing tape according to any one of claims 1 to 9 to a wafer and performing wafer processing, Wafer processing method.

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