Grid-connected power converter and control method for grid-connected power converter

Abstract

To realize a grid-connected power converter that can achieve grid stabilization effects even under a wider range of grid fluctuation conditions. [Solution] The first polar coordinate transformation unit 11 outputs the first current estimated value amplitude and the first current estimated value phase θ_est from the output current estimated value Iest. The second polar coordinate transformation unit 12 outputs the current detection value phase θ_ac from the output current detection value I_ac. The rate of change limiting unit 13 limits the amount of change in the first current estimated value phase θ_est and outputs it as the second current estimated value phase when the phase difference between the first current estimated value phase θ_est and the current detection value phase θ_ac exceeds the limit value θ_limit_def. The virtual synchronous impedance calculation unit 19 calculates the virtual synchronous impedance Z'(r'', x') based on the second current estimated value amplitude, the third current estimated value phase θ, the internal induced voltage Ef, and the system voltage detection value Vac.

Description

Technical Field

[0001] The present invention relates to a control method for suppressing overcurrent caused by a system accident or the like in a system-connected power conversion device (VSG-PCS) that performs virtual synchronous generator control simulating a synchronous generator.

Background Art

[0002] Patent Document 1 discloses a technique for continuing operation by controlling to suppress overcurrent even when a short-circuit accident or the like occurs in the system in a VSG-PCS, and for providing a synchronizing force generated by the action of a virtual synchronous impedance.

[0003] In Embodiment 4 of Patent Document 1, it is described that the above virtual synchronous impedance is obtained by an estimated current instead of an actual output current. That is, FIG. 9 of Patent Document 1 is used for the Zs calculation unit 7 of Patent Document 1.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] As in equation (1) of Patent Document 1, the voltage drop amount Ef - Vac due to the virtual synchronous impedance Zs with respect to the internal induced voltage Ef and the system voltage detection value Vac is given by the following equation (1).

[0006]

Equation

[0007] Similar to equation (8) in Patent Document 1, the voltage drop due to the virtual synchronous impedance can be rewritten on the dq axis as equation (2) below. Here, E_d and E_q are the internal induced voltages on the dq axis, V_d and V_q are the system voltages on the dq axis, r is the resistance component of the virtual synchronous impedance, L is the inductance component of the virtual synchronous impedance, ω is the rated angular frequency, and I_d and I_q are the output currents on the dq axis. The rated angular frequency is, for example, the angular frequency assumed as a standard operating condition defined in the design. Patent Document 1 used this equation (2) to calculate the voltage drop due to the virtual synchronous impedance.

[0008]

number

[0009] On the other hand, the voltage drop due to the virtual sync impedance can be accurately expressed by the following equation (3). Here, the voltage drop due to the virtual sync impedance, Ef-Vac, is set as V_z (=[V_zd,V_zq] vector quantity).

[0010]

number

[0011] The +sL term is a differential element, necessary for more accurately simulating the voltage drop of the virtual synchronous impedance. However, differential elements tend to destabilize the control system, making its design difficult. Therefore, Patent Document 1 omitted the differential term to simplify the design of the control system.

[0012] However, when the phase θ used in calculating the virtual synchronous impedance described in Figure 9 of Patent Document 1 changes, the output currents I_d and I_q on the dq axis also change. As a result, while the phase change is occurring, there is a difference between the original voltage drop and the derivative term. Therefore, when the phase changes abruptly, the voltage drop becomes insufficient by the amount of +sL, and the current cannot be suppressed.

[0013] In other words, in Patent Document 1, when the phase used to calculate the virtual synchronous impedance changes abruptly, the virtual synchronous impedance necessary to suppress the current cannot be calculated correctly. This phenomenon is particularly likely to occur when the phase used to calculate the virtual synchronous impedance changes abruptly due to system conditions.

[0014] Based on the above, the challenge is to realize a grid-connected power converter that can achieve grid stabilization even under a wider range of grid fluctuation conditions. [Means for solving the problem]

[0015] The present invention was devised in view of the above-mentioned conventional problems, and one embodiment thereof is a grid-connected power converter that connects a DC power supply to the grid via a DC / AC converter and an LC filter and controls a virtual synchronous generator, comprising: an internal induced voltage calculation unit that calculates an internal induced voltage based on an output current detection value, an effective value of a grid voltage detection value, and an effective value of a grid voltage command value; a VSG model that determines an angular frequency simulating a synchronous generator based on the internal induced voltage, the output current detection value, and a power reference value; a Zs compensation unit that simulates the voltage drop due to the internal impedance of a synchronous generator and calculates the grid voltage command value based on the internal induced voltage, the grid voltage detection value, and the output current detection value; an output voltage control unit that performs voltage control to control the grid voltage detection value to the grid voltage command value and outputs a PWM control command value; and a PWM control unit that outputs a gate command for the DC / AC converter based on the PWM control command value and the angular frequency, wherein the Zs compensation unit calculates the current estimate of the output current or The system is characterized by comprising: a first polar coordinate transformation unit that outputs a first estimated current amplitude and a first estimated current phase; a second polar coordinate transformation unit that outputs a current detection value phase from the output current detection value; a rate of change limiting unit that limits the amount of change in the first estimated current phase and outputs it as a second estimated current phase when the phase difference between the first estimated current phase and the current detection value phase exceeds a limit value; an amplitude limiting unit that limits the first estimated current amplitude within a limit range and outputs it as a second estimated current amplitude; a phase limiting unit that limits the second estimated current phase within an effective range and outputs it as a third estimated current phase; a virtual synchronous impedance calculation unit that calculates a virtual synchronous impedance based on the second estimated current amplitude, the third estimated current phase, the internal induced voltage, and the system voltage detection value; a Vzs calculation unit that calculates a voltage drop based on the virtual synchronous impedance and the output current detection value; and a first subtractor that outputs the value obtained by subtracting the voltage drop from the internal induced voltage as the system voltage command value.

[0016] Furthermore, in one embodiment, the rate of change limiting unit is characterized by outputting the second current estimated phase of equation (5) below.

[0017]

number

[0018] θ: Phase of the second current estimated value θ_est: Phase of the first current estimated value θ_ac: Phase of the current detected value θ_limit_def: Limit value.

[0019] Also, as another aspect, a system-connected power conversion device that system-connects a DC power supply via a DC / AC conversion device and an LC filter and performs virtual synchronous generator control, including an internal induced voltage calculation unit that calculates an internal induced voltage based on the effective value of the output current detected value, the effective value of the system voltage detected value, and the effective value of the system voltage command value; a VSG model that determines an angular frequency simulating a synchronous generator based on the internal induced voltage, the output current detected value, and a power reference value; a Zs compensation unit that simulates a voltage drop due to the internal impedance of a synchronous generator based on the internal induced voltage, the system voltage detected value, and the output current detected value, and calculates the system voltage command value; an output voltage control unit that performs voltage control to control the system voltage detected value to the system voltage command value and outputs a PWM control command value; and a PWM control unit that outputs a gate command for the DC / AC conversion device based on the PWM control command value and the angular frequency. The Zs compensation unit includes a first polar coordinate conversion unit that outputs a first current estimated value amplitude and a first current estimated value phase from the current estimated value of the output current; an amplitude limiting unit that limits the first current estimated value amplitude within a limit range and outputs it as a second current estimated value amplitude; a phase limiting unit that limits the first current estimated value phase within a valid range and outputs it as a third current estimated value phase; a virtual synchronous impedance calculation unit that calculates a virtual synchronous impedance based on the second current estimated value amplitude, the third current estimated value phase, the internal induced voltage, and the system voltage detected value; a differential term compensation unit that calculates a change amount of the third current estimated value phase as a differential equivalent amount and adds the differential equivalent amount to the resistance component of the virtual synchronous impedance to correct the resistance component of the virtual synchronous impedance; a Vzs calculation unit that calculates a voltage drop based on the corrected virtual synchronous impedance and the output current detected value; and a first subtractor that outputs, as the system voltage command value, a value obtained by subtracting the voltage drop from the internal induced voltage. Characterized by comprising

[0020] Also, as one aspect, a differential term compensation unit is provided that calculates a change amount of the third current estimated value phase as a differential equivalent amount, and corrects the resistance component of the virtual synchronous impedance by adding the differential equivalent amount to the resistance component of the virtual synchronous impedance.

[0021] Also, as one aspect, the differential term compensation unit includes a first multiplier that multiplies the third current estimated value phase by sKr'' / (1 + sTr''), and a first adder that adds the resistance component of the virtual synchronous impedance to the output of the first multiplier and outputs it as the corrected resistance component. s: s in the Laplace operation Kr'': Gain Tr'': Time constant.

[0022] Also, as one aspect, the differential term compensation unit includes a second multiplier that multiplies the third current estimated value phase by sK1 / (1 + sT1), a third multiplier that multiplies the third current estimated value phase by sK2 / (1 + sT2), a second adder that adds the output of the second multiplier and the output of the third multiplier, and a third adder that adds the resistance component of the virtual synchronous impedance to the output of the second adder and outputs it as the corrected resistance component. s: s in the Laplace operation K1: Gain K2: Gain T1: Time constant T2: A time constant larger than T1.

Advantages of the Invention

[0023] According to the present invention, it is possible to realize a power conversion device for grid connection that can obtain the effect of grid stabilization even under a wider range of grid fluctuation conditions.

Brief Description of the Drawings

[0024] [Figure 1]A diagram showing a virtual synchronous impedance model for a grid-connected power converter. [Figure 2] A diagram showing the overall configuration of a grid-connected power conversion device. [Figure 3] A schematic diagram showing the Zs compensation section of Examples 1 to 4. [Figure 4] A diagram showing the Zs calculation unit of Example 1. [Figure 5] This figure shows an example of overcurrent when the present invention is not applied. [Figure 6] A diagram showing an example of overcurrent when Example 1 is applied. [Figure 7] A diagram showing the Zs calculation unit of Example 2. [Figure 8] A diagram showing an example of overcurrent when Example 2 is applied. [Figure 9] A diagram showing the Zs calculation unit of Example 3. [Figure 10] This figure shows an example of overcurrent when Example 3 is applied. [Figure 11] A diagram showing the Zs calculation unit of Example 4. [Figure 12] A diagram showing an example of overcurrent when Example 4 is applied. [Modes for carrying out the invention]

[0025] Examples 1 to 4 of the grid-connected power converter according to the present invention will be described in detail below with reference to Figures 1 to 12.

[0026] [Example 1] Figure 1 shows a virtual synchronous impedance model of a grid-connected power converter used in a PCS (Power Conversion System). As shown in Figure 1, the grid-connected power converter comprises a DC / AC converter INV and an LC filter LC (reactor Lf and capacitor Cf), and is connected to grid 1.

[0027] The grid-connected power converter performs voltage control so that the grid voltage detection value Vac after the LC filter matches the grid voltage command value Vac*, which is obtained by subtracting the voltage drop due to the virtual synchronous impedance Zs caused by the output current Iac flowing from the internally induced voltage Ef.

[0028] Figure 2 is a schematic diagram of the grid-connected power converter in this embodiment 1. As shown in Figure 2, the main circuit configuration of the grid-connected power converter connects a DC power source Vdc, such as a storage battery, to grid 1 via a DC / AC converter INV consisting of IGBTs, an LC filter LC, and a transformer Tr. In addition, the output current detection value Iac and the grid voltage detection value Vac between the LC filter LC and the transformer Tr are detected and output to the control block, which will be described later.

[0029] As shown in Figure 2, the control block of the grid-connected power converter in this embodiment 1 comprises an internal induced voltage calculation unit 2, a VSG model 3, a Zs compensation unit 4, an output voltage control unit 5, and a PWM control unit 6.

[0030] The internal induced voltage calculation unit 2 calculates the effective value of the system voltage command value |Vac| * The system voltage detection value RMS |Vac| and the output current detection value Iac are input, and the internal induced voltage Ef is calculated. VSG Model 3 takes the internal induced voltage Ef, the output current detection value Iac, and the power reference value Pm as input, and determines the angular frequency ωr which simulates a synchronous generator.

[0031] The Zs compensation unit 4 receives the system voltage detection value Vac, the output current detection value Iac, and the internal induced voltage Ef as inputs, simulates the voltage drop due to the internal impedance of the synchronous generator, and outputs the system voltage command value Vac*.

[0032] The output voltage control unit 5 receives the system voltage detection value Vac and the system voltage command value Vac* as input and controls the system voltage detection value Vac to match the system voltage command value Vac*, and outputs the PWM control command value Vcmd. The PWM control unit 6 receives the PWM control command value Vcmd and the angular frequency ωr as input and outputs the gate command Gate to the switching element such as the IGBT of the DC / AC converter INV.

[0033] The internal induced voltage calculation unit 2, VSG model 3, output voltage control unit 5, and PWM control unit 6 are not directly related to the present invention, and therefore a detailed explanation is omitted here.

[0034] As shown in Figure 3, the Zs compensation unit 4 comprises a Zs calculation unit 7, a Vzs calculation unit 8, and a first subtractor 9.

[0035] The Zs calculation unit 7 calculates the virtual synchronous impedance Zs'. The virtual synchronous impedance Zs' is a value necessary to suppress the output current when an overcurrent occurs. The Vzs calculation unit 8 calculates the voltage drop Vzs due to the output current detection value Iac and the virtual synchronous impedance Zs'. The first subtractor 9 subtracts the voltage drop Vzs from the internal induced voltage Ef to calculate the grid voltage command value Vac* that the grid-connected power converter should output.

[0036] In this embodiment 1, as shown in Figure 4, when the difference between the phase θ_ac of the current detection value of the output current detection value (actual current) Iac and the phase θ_est of the first current estimate value of the current estimate value Iest exceeds a limit value, the amount of change in the phase θ used to calculate the virtual synchronization impedance is limited to slow down the phase change. For this purpose, a change rate limiting unit 13 is provided.

[0037] Figure 4 shows the Zs calculation unit 7 of this embodiment 1. The first polar coordinate transformation unit 11 outputs the first current estimated value amplitude and the first current estimated value phase θ_est of the current estimated value Iest based on the current estimated value Iest.

[0038] The estimated current value Iest can be calculated using the method described in Embodiment 4 of Patent Document 1. That is, the estimated current value Iest can be calculated by performing an inverse dq transform on the left side of equation (4). This method allows for the estimation of the current that flows when a pre-set virtual synchronous impedance Zs is simulated. The estimated current value Iest virtually calculates the current that flows when the internal induced voltage Ef and the grid voltage Vac are connected via a pre-set virtual synchronous impedance Zs. In other words, the estimated current value Iest calculates the current that flows when two ideal power sources without output limitations such as overcurrent are connected. Ideally, the grid-connected power converter should output the estimated current value Iest, but there are limitations on the current amplitude that can be output. Therefore, the overcurrent suppression control described here is a control that maintains the current phase of the estimated current value Iest while keeping only the magnitude within the output range.

[0039]

number

[0040] When using current detection values, depending on the fault conditions, the angular frequency ωr output from VSG Model 3 may fluctuate significantly due to the overcurrent output. (That is, the angular frequency ωr of VSG Model 3 fluctuates in accordance with the difference between the power reference value Pm and the output active power. During a fault, an overcurrent occurs under these conditions, and the fluctuation in active power corresponding to the overcurrent causes a fluctuation in the angular frequency.) In such cases, the internal frequency of VSG Model 3 fluctuates significantly, and it may not be possible to maintain synchronization with the grid. In such cases, time is required to restore synchronization after the grid voltage is restored. As a result, the time required to release overcurrent suppression is also prolonged. On the other hand, when using current estimation values, the internal frequency works to synchronize with the grid frequency even during a fault. As a result, overcurrent suppression can be released immediately after the grid voltage is restored.

[0041] Furthermore, when using current detection values, disturbances to the current detection values ​​cause fluctuations in the current detection value phase θ_ac. When the current detection value phase θ_ac fluctuates, the virtual synchronous impedance Zs' calculated by the Zs calculation unit 7 changes, and the change in virtual synchronous impedance Zs' causes fluctuations in the system voltage command value Vac*, which in turn causes fluctuations in the output voltage and results in fluctuations in active power and reactive power. On the other hand, when using the current estimate value Iest, the virtual synchronous impedance Zs' is not affected by disturbances to the current detection value, and the active power and reactive power remain stable. This is because the current estimate value Iest is determined by the virtual synchronous impedances r,x, internal induced voltages E_d,E_q and system voltage detection values ​​V_d,V_q, as shown in equation (4).

[0042] The second polar coordinate transformation unit 12 outputs the current detection value phase θ_ac based on the output current detection value Iac. The first current estimate value phase θ_est and the current detection value phase θ_ac are input to the rate of change limiting unit 13.

[0043] The rate of change limiting unit 13 calculates the phase difference between the current detection value phase θ_ac and the first current estimate value phase θ_est in the second subtraction unit 14.

[0044] The saturation calculation unit 15 performs a saturation calculation on the phase difference. That is, as shown in equation (5) below, if the phase difference does not exceed the set limit value (upper and lower limit ± θ_limit_def), it outputs (θ_est - θ_ac) as is, and if it exceeds the limit value (± θ_limit_def), it outputs the limit value.

[0045] The first adder 16 adds the current detection value phase θ_ac to the output of the saturation calculation unit 15. θ in equation (5) becomes the second current estimate phase, which is the output of the first adder 16.

[0046]

number

[0047] In other words, the phase of the second current estimate is corrected so that it falls within the range of the current detection phase θ_ac to the limit value θ_limit_def.

[0048] The amplitude limiter 17 limits the first estimated current amplitude to within the limit range and outputs it as the second estimated current amplitude |I|. The phase limiter 18 limits the second estimated current phase so that it is within the effective range and outputs it as the third estimated current phase.

[0049] The virtual synchronous impedance calculation unit 19 calculates the virtual synchronous impedance Zs'(r'', x') based on the second current estimate amplitude |I|, the third current estimate phase θ, and Ef-Vac (internal induced voltage, system voltage detection value). The calculation method is the same as in Embodiment 4 of Patent Document 1. Specifically, r'' is {(E_d-V_d)cosθ+(E_q-V_q)sinθ} / I. x' is {-(E_d―V_d)sinθ+(E_q-V_q)cosθ} / I.

[0050] By suppressing the increase in the differential element +sL of the resistance component of the virtual synchronous impedance, the difference between the voltage drop calculated without considering the differential element and the voltage drop calculated with the differential element considered is reduced, allowing for sufficient current suppression.

[0051] Figure 5 shows an example of overcurrent when the present invention is not used. The horizontal line in Figure 5 indicates the target value (overcurrent level) for overcurrent suppression control.

[0052] When an event such as a system fault that causes overcurrent occurs, the current phase changes abruptly, and the output current amplitude increases rapidly. The peak of the output current amplitude appears immediately after the fault occurs and then decreases. The rate of decrease in current becomes more gradual over time, and it decreases slowly down to the overcurrent level.

[0053] The overcurrent level can be set within a range where the maximum current does not exceed the absolute rating of the power converter. Here, the absolute rating is a value that must not be exceeded even instantaneously. Therefore, the smaller the peak current that exceeds the overcurrent level, the higher the overcurrent level can be set. Setting a higher overcurrent level allows the device to supply a larger fault current, ensuring that the current necessary to operate the system's protective devices is reliably supplied. For this reason, it is desirable to keep the peak current that exceeds the overcurrent level as small as possible.

[0054] Figure 6 shows an example of overcurrent when this embodiment 1 is applied. The horizontal lines in Figure 6 indicate the overcurrent level and the absolute rating of the device. The dashed lines in Figure 6 represent the waveform when this embodiment 1 is not used (the same waveform as in Figure 5).

[0055] Although it takes time to reach the desired current phase, the current can be suppressed because the current phase changes gradually due to the effect of the rate of change limiting unit 13.

[0056] The larger the upper and lower limits ±θ_limit_def of the rate of change limiting unit 13, the larger the current exceeding the overcurrent level. In order to prevent the maximum current from exceeding the absolute rating of the device, a margin corresponding to the upper and lower limits ±θ_limit_def of the rate of change limiting unit 13 must be provided at the overcurrent level. Therefore, the fault current that can be supplied will be smaller than the absolute rating by the amount of the margin.

[0057] As shown above, according to this embodiment 1, the virtual synchronization impedance can be accurately calculated even when the phase used to calculate the virtual synchronization impedance changes abruptly. Therefore, the effect of system stabilization can be obtained under a wider range of system conditions.

[0058] [Example 2] Figure 7 shows the Zs calculation unit of this embodiment 2. In this embodiment 2, the rate of change limiting unit 13 of embodiment 1 is omitted. The amplitude limiter 17 and the phase limiter 18 receive the first estimated current amplitude and first estimated current phase θ_est, which are the outputs of the first polar coordinate transformation unit 11. The calculation method of the virtual synchronous impedance calculation unit 19 is the same as in embodiment 1.

[0059] In this embodiment 2, a differential term compensation unit 20 is provided as shown in Figure 7. The differential term compensation unit 20 calculates the change in the phase of the third current estimate as a differential equivalent and adds it to the resistance component r' of the virtual synchronous impedance.

[0060] The first multiplier 21 multiplies the phase of the third current estimate, which is the output of the phase limiter 18, by sKr'' / 1+sTr''. s is s in Laplace, Kr'' is the gain, and Tr'' is the time constant. The second adder 22 adds the output of the first multiplier 21 to the resistance component r' of the virtual sync impedance and outputs the corrected resistance component r'' of the virtual sync impedance.

[0061] Generally, when the derivative term is defined using the output current as the input, it tends to be susceptible to disturbances from high-frequency components, leading to unstable calculation results. On the other hand, in order to calculate the virtual synchronous impedance more accurately, it is necessary to consider the fluctuations in the virtual synchronous impedance due to the derivative term of the output current.

[0062] On the dq axis, the above derivative term is expressed by adding the value obtained by multiplying the time derivative of the current by the inductance value to the resistance component. Therefore, the derivative term behaves in a way that causes the resistance component to fluctuate.

[0063] Incidentally, the first current estimate phase θ_est is expressed as tan(I_q / I_d). Therefore, the amount of change in time of the first current estimate phase θ_est is roughly proportional to the amount of change in time of I_d and I_q. In other words, it was preferable to have a characteristic such that the resistance component r of the virtual synchronous impedance fluctuates by an amount roughly proportional to the fluctuation of the current estimate phase θ_est.

[0064] From the above, the input is given by the third current estimate phase θ and the time constant by T, as shown in equation (6) below. r’’ This method approximates the derivatives of I_d and I_q using a pseudo-derivative. The time constant T r’’ This value should be large enough to eliminate the effects of sampling frequency and disturbances expected during normal operation, and small enough to detect overcurrents at a sufficiently high speed under conditions where overcurrent occurs.

[0065]

number

[0066] Figure 8 shows an example of overcurrent when this embodiment 2 is applied. The horizontal lines in Figure 8 indicate the overcurrent level and the absolute rating of the device. The dashed lines in Figure 8 represent the waveform when the present invention is not used (the same waveform as in Figure 5).

[0067] The effect of the differential term compensation unit 20, which increases the resistance component of the virtual synchronization impedance in proportion to the pseudo-derivative of the phase, can suppress overcurrents caused by sudden changes in current, thereby suppressing the current peak immediately after an accident or other incident.

[0068] Furthermore, unlike Example 1, since there is no phase change rate limiting unit 13, the time required to match the current phase when the present invention is not used is shortened. Therefore, the influence on the current phase can be reduced compared to Example 1.

[0069] After suppressing the peak current, the resistance component of the virtual synchronous impedance decreases according to the time constant of the pseudo-derivative, resulting in a gradual increase in current. Therefore, it is necessary to set the overcurrent level so that the gradual current increase does not exceed the absolute rating of the device, and the fault current that can be supplied will be reduced accordingly.

[0070] As shown above, according to this embodiment 2, the virtual sync impedance can be accurately calculated even when the phase θ used to calculate the virtual sync impedance changes abruptly. Therefore, the effect of system stabilization can be obtained under a wider range of system conditions.

[0071] [Example 3] This third embodiment combines the configurations of the first and second embodiments. The configuration of this third embodiment is shown in Figure 9. Parts identical to those in the first and second embodiments are denoted by the same reference numerals and their descriptions are omitted.

[0072] The inputs to the virtual synchronous impedance calculation unit 19 and the differential term compensation unit 20 use a third current estimate phase with a limit on the rate of change of the first current estimate phase θ_est. This allows for the suppression of excessive fluctuations in the resistance component during virtual synchronous impedance calculation, in addition to the effects of Example 2.

[0073] Figure 10 shows an example of overcurrent when Example 3 is applied. The horizontal lines in Figure 10 indicate the overcurrent level and the absolute rating of the device. The dashed lines in Figure 10 represent the waveform when Example 3 is not used (the same waveform as in Figure 5).

[0074] Because the rate of change limiting unit 13 slows down the phase fluctuation, sudden changes in current are suppressed, and current peaks can be controlled. In addition, since the resistance component of the virtual synchronous impedance during the phase change is increased by the differential term compensation unit 20, it is easier to suppress overcurrent during the phase change compared to Example 1. Therefore, the limit value of the rate of change limiting unit 13 can be set higher than in Example 1. Thus, although not as much as in Example 2 which does not have a rate of change limiting unit 13, the impact on the current phase can be reduced.

[0075] Furthermore, the rate of change limiting unit 13 slows down the change in current phase, suppressing abrupt phase changes, which allows for a longer time constant in the differential term compensation unit 20. As a result, the gradual current increase that occurred in Example 2 can also be suppressed by the differential term compensation unit 20. Consequently, the current exceeding the overcurrent level becomes smaller than in Example 2, making it possible to supply a fault current close to the absolute rating.

[0076] As described above, according to the third embodiment, even when the phase θ used for calculating the virtual synchronous impedance changes abruptly, the virtual synchronous impedance can be accurately calculated. Therefore, the effect of system stabilization can be obtained under a wider range of system conditions.

[0077] [Embodiment 4] In the fourth embodiment, as shown in FIG. 11, the differential term compensation unit 20 of the second embodiment is configured in two parallel. The second multiplier 23 multiplies the third current estimated value phase θ, which is the output of the phase limiter 18, by sK1 / (1 + sT1). The third multiplier 24 multiplies the third current estimated value phase θ, which is the output of the phase limiter 18, by sK2 / (1 + sT2). Here, s is s in the Laplace operation, K1 and K2 are gains, and T1 and T2 are time constants. Note that T1 < T2. The third adder 25 adds the outputs of the second and third multipliers 23 and 24. The fourth adder 26 adds the output of the third adder 25 to the resistance component r' of the virtual synchronous impedance and outputs it as the corrected resistance component r'' of the virtual synchronous impedance.

[0078] Under the condition where an overcurrent occurs, the current may increase rapidly in a short time. In such a case, it is necessary to increase the gain of the differential term compensation in order to sufficiently suppress the overcurrent.

[0079] On the other hand, if the gain of the differential term compensation is increased, the output of the differential term compensation becomes excessive, and the output current may decrease excessively. In order to avoid this problem, it is necessary to shorten the time constant of the pseudo-differential and make the differential term compensation act greatly only immediately after the current change occurs.

[0080] However, if the time constant of the pseudo-differential is shortened, the output of the differential term compensation decays quickly, and an overcurrent may occur slowly after an event that causes an overcurrent occurs.

[0081] In order to suppress both the overcurrent generation due to a rapid current increase in a short time and the overcurrent generation due to a relatively slow current increase over a long time, two parallel differential term compensations are provided, and the respective pseudo-differentials are set to a short time constant and a long time constant.

[0082] By suppressing both rapid and gradual current increases using separate differential term compensation units, both the overcurrent immediately following an overcurrent event and the gradual current increase that occurs some time after the event are suppressed.

[0083] Figure 12 shows an example of overcurrent when Example 4 is applied. The horizontal lines in Figure 12 indicate the overcurrent level and the absolute rating of the device. The dashed lines in Figure 12 represent the waveform when the present invention is not used (the same waveform as in Figure 5).

[0084] The differential term compensation unit with a short time constant (second multiplier 23) can suppress the current peak that occurs immediately after a fault occurs. Furthermore, the differential term compensation unit with a long time constant (third multiplier 24) can suppress a gradual increase in current. Because the current exceeding the overcurrent level is small, the fault current can be increased to near the absolute rating of the device.

[0085] Furthermore, unlike Examples 1 and 3, this embodiment does not have a phase change rate limiting unit 13, so the time it takes to match the current phase when not using this embodiment is shortened. Therefore, the impact on the current phase can be reduced compared to Examples 1 and 3.

[0086] As shown above, according to this embodiment 4, the virtual sync impedance can be accurately calculated even when the phase θ used to calculate the virtual sync impedance changes abruptly. Therefore, the system stabilization effect can be obtained under a wider range of system conditions.

[0087] Although the present invention has been described in detail only with respect to the specific examples described above, it will be obvious to those skilled in the art that a wide variety of modifications and alterations are possible within the scope of the technical concept of the present invention, and it is natural that such modifications and alterations fall within the scope of the claims. [Explanation of Symbols]

[0088] INV…DC / AC converter, LC…LC filter, 1…System, Vdc…DC power supply, 2…Internal induced voltage calculation unit, 3…VSG model, 4…Zs compensation unit, 5…Output voltage control unit, 6…PWM control unit, 7…Zs calculation unit, 8…Vzs calculation unit, 9…First subtractor, 11…First polar coordinate transformation unit, 12…Second polar coordinate transformation unit, 13…Rate of change limiting unit, 14…Second subtractor, 15…Saturation calculation unit, 16…First adder, 17…Amplitude limiter, 18…Phase limiter, 19…Virtual synchronous impedance calculation unit, 20…Differential term compensation unit, 21…First multiplier, 22…Adder, 23…Second multiplier, 24…Third multiplier, 25…Third adder, 26…Fourth adder

Claims

1. A grid-connected power converter that connects a DC power supply to the grid via a DC / AC converter and an LC filter, and performs virtual synchronous generator control, An internal induced voltage calculation unit calculates the internal induced voltage based on the output current detection value, the effective value of the system voltage detection value, and the effective value of the system voltage command value. A VSG model that determines the angular frequency simulating a synchronous generator based on the internal induced voltage, the output current detection value, and the power reference value, A Zs compensation unit calculates the system voltage command value by simulating the voltage drop due to the internal impedance of the synchronous generator based on the internal induced voltage, the system voltage detection value, and the output current detection value. An output voltage control unit performs voltage control to control the detected system voltage value to the system voltage command value and outputs a PWM control command value, The system includes a PWM control unit that outputs a gate command for the DC / AC converter based on the PWM control command value and the angular frequency, The Zs compensation unit is, A first polar coordinate transformation unit that outputs the amplitude and phase of the first estimated current from the estimated output current, A second polar coordinate transformation unit outputs the current detection value phase from the output current detection value, A change rate limiting unit that limits the amount of change in the first current estimated value phase and outputs it as the second current estimated value phase when the phase difference between the first current estimated value phase and the current detected value phase exceeds a limit value, An amplitude limiting unit that limits the amplitude of the first estimated current value within a limit range and outputs it as the amplitude of the second estimated current value, A phase limiting unit that limits the phase of the second estimated current value within an effective range and outputs it as the phase of the third estimated current value, A virtual synchronous impedance calculation unit calculates a virtual synchronous impedance based on the second estimated current amplitude, the third estimated current phase, the internally induced voltage, and the system voltage detection value. A Vzs calculation unit that calculates a voltage drop based on the virtual synchronization impedance and the output current detection value, A first subtractor outputs the value obtained by subtracting the voltage drop from the internally induced voltage as the system voltage command value, A grid-connected power converter characterized by being equipped with the following features.

2. The grid-connected power converter according to claim 1, characterized in that the rate of change limiting unit outputs the second current estimated value phase of the following equation (5). [Math 5] θ: Phase of the second estimated current θ_est: first current estimated value phase θ_ac: Current detection value phase θ_limit_def: Limit value

3. A grid-connected power converter that connects a DC power supply to the grid via a DC / AC converter and an LC filter, and performs virtual synchronous generator control, An internal induced voltage calculation unit calculates the internal induced voltage based on the output current detection value, the effective value of the system voltage detection value, and the effective value of the system voltage command value. A VSG model that determines the angular frequency simulating a synchronous generator based on the internal induced voltage, the output current detection value, and the power reference value, A Zs compensation unit calculates the system voltage command value by simulating the voltage drop due to the internal impedance of the synchronous generator based on the internal induced voltage, the system voltage detection value, and the output current detection value. An output voltage control unit performs voltage control to control the detected system voltage value to the system voltage command value and outputs a PWM control command value, The system includes a PWM control unit that outputs a gate command for the DC / AC converter based on the PWM control command value and the angular frequency, The Zs compensation unit is, A first polar coordinate transformation unit that outputs the amplitude and phase of the first estimated current from the estimated output current, An amplitude limiting unit that limits the amplitude of the first estimated current value within a limit range and outputs it as the amplitude of the second estimated current value, A phase limiting unit that limits the phase of the first estimated current value within an effective range and outputs it as the phase of the third estimated current value, A virtual synchronous impedance calculation unit calculates a virtual synchronous impedance based on the second estimated current amplitude, the third estimated current phase, the internally induced voltage, and the system voltage detection value. A differential term compensation unit calculates the amount of change in the phase of the third estimated current as a differential equivalent, and adds the differential equivalent to the resistance component of the virtual sync impedance to correct the resistance component of the virtual sync impedance, A Vzs calculation unit calculates the voltage drop based on the corrected virtual synchronization impedance and the output current detection value, A first subtractor outputs the value obtained by subtracting the voltage drop from the internally induced voltage as the system voltage command value, A grid-connected power converter characterized by being equipped with the following features.

4. The grid-connected power converter according to claim 1, further comprising a differential term compensation unit that calculates the amount of change in the phase of the third estimated current as a differential equivalent, and adds the differential equivalent to the resistance component of the virtual synchronous impedance to correct the resistance component of the virtual synchronous impedance.

5. The aforementioned differential term compensation unit is, A first multiplier that multiplies the third estimated current phase by sKr'' / 1+sTr'', A first adder that adds the resistance component of the virtual synchronization impedance to the output of the first multiplier and outputs the corrected resistance component, A grid-connected power converter according to claim 3, characterized by comprising the above. s: s in Laplace operations Kr'': Gain Tr'': Time constant

6. The aforementioned differential term compensation unit is, The phase of the third estimated current is sK １ / 1+sT １ A second multiplier that multiplies by, The phase of the third estimated current is sK ２ / 1+sT ２ A third multiplier that multiplies by, A second adder that adds the output of the second multiplier and the output of the third multiplier, A third adder adds the resistance component of the virtual synchronization impedance to the output of the second adder and outputs the corrected resistance component, A grid-connected power converter according to claim 3, characterized by comprising the above. s: s in Laplace operations K １ :gain K ２ :gain T １ : Time constant T ２ : T １ a time constant larger than

7. An internal induced voltage calculation unit calculates the internal induced voltage based on the output current detection value, the effective value of the system voltage detection value, and the effective value of the system voltage command value. A VSG model that determines the angular frequency simulating a synchronous generator based on the internal induced voltage, the output current detection value, and the power reference value, A Zs compensation unit calculates the system voltage command value by simulating the voltage drop due to the internal impedance of the synchronous generator based on the internal induced voltage, the system voltage detection value, and the output current detection value. An output voltage control unit performs voltage control to control the detected system voltage value to the system voltage command value and outputs a PWM control command value, A PWM control unit outputs a gate command for a DC / AC converter based on the PWM control command value and the angular frequency, Equipped with, A control method for a grid-connected power converter that connects a DC power supply to the grid via a DC / AC converter and an LC filter, and performs virtual synchronous generator control, The Zs compensation unit is, The first polar coordinate transformation unit outputs the first current estimate amplitude and the first current estimate phase from the current estimate of the output current. The second polar coordinate transformation unit outputs the current detection value phase from the output current detection value, The rate of change limiting unit limits the amount of change in the first current estimated value phase and outputs it as the second current estimated value phase when the phase difference between the first current estimated value phase and the current detected value phase exceeds a limit value. The amplitude limiting unit limits the first estimated current amplitude within the limit range and outputs it as the second estimated current amplitude. The phase limiting unit limits the second estimated current phase to within an effective range and outputs it as the third estimated current phase. The virtual synchronous impedance calculation unit calculates the virtual synchronous impedance based on the second estimated current amplitude, the third estimated current phase, the internal induced voltage, and the system voltage detection value. The Vzs calculation unit calculates the voltage drop based on the virtual synchronous impedance and the output current detection value. A control method for a grid-connected power converter, characterized in that the first subtractor outputs a value obtained by subtracting the voltage drop from the internal induced voltage as the grid voltage command value.

8. An internal induced voltage calculation unit calculates the internal induced voltage based on the output current detection value, the effective value of the system voltage detection value, and the effective value of the system voltage command value. A VSG model that determines the angular frequency simulating a synchronous generator based on the internal induced voltage, the output current detection value, and the power reference value, A Zs compensation unit calculates the system voltage command value by simulating the voltage drop due to the internal impedance of the synchronous generator based on the internal induced voltage, the system voltage detection value, and the output current detection value. An output voltage control unit performs voltage control to control the detected system voltage value to the system voltage command value and outputs a PWM control command value, A PWM control unit outputs a gate command for a DC / AC converter based on the PWM control command value and the angular frequency, Equipped with, A control method for a grid-connected power converter that connects a DC power supply to the grid via a DC / AC converter and an LC filter, and performs virtual synchronous generator control, The Zs compensation unit is, The first polar coordinate transformation unit outputs the first current estimate amplitude and the first current estimate phase from the current estimate of the output current. The amplitude limiting unit limits the first estimated current amplitude within the limit range and outputs it as the second estimated current amplitude. The phase limiting unit limits the first estimated current phase to an effective range and outputs it as the third estimated current phase. The virtual synchronous impedance calculation unit calculates the virtual synchronous impedance based on the second estimated current amplitude, the third estimated current phase, the internal induced voltage, and the system voltage detection value. The differential term compensation unit calculates the change in the phase of the third estimated current as a differential equivalent, and corrects the differential equivalent by adding the resistance component of the virtual sync impedance to the resistance component of the virtual sync impedance. The Vzs calculation unit calculates the voltage drop based on the corrected virtual synchronous impedance and the output current detection value. A control method for a grid-connected power converter, characterized in that the first subtractor outputs a value obtained by subtracting the voltage drop from the internal induced voltage as the grid voltage command value.

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