Scalable optical quantum computing with hybrid resource states
A hybrid optical quantum computing system using bosonic qubits and squeezed states addresses scalability and cost issues by integrating optical circuits and detectors, enabling fault-tolerant quantum computing with reduced costs and modular, on-chip implementation.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- XANADU QUANTUM TECH INC
- Filing Date
- 2025-12-19
- Publication Date
- 2026-04-10
AI Technical Summary
Existing optical quantum computing systems face impracticality due to high experimental costs, complexity, and scalability issues, particularly in generating non-deterministic non-Gaussian states and multiplexing encoded qubit clusters.
A hybrid scheme for optical quantum computing that integrates bosonic qubits and squeezed states using a system comprising optical circuits, photon number resolving detectors, and an integrated circuit, which generates hybrid resource states through Gaussian boson sampling and multiplexing, enabling fault-tolerant quantum computing with a modular, on-chip implementation.
The system achieves scalable and fault-tolerant quantum computing by leveraging both deterministic and non-deterministic generation methods, allowing for efficient resource state generation and reduced experimental costs, with compatibility for ambient operation and reconfigurable modules.
Smart Images

Figure 2026062758000001_ABST
Abstract
Description
[Technical Field]
[0001] Cross-reference of related applications
[0001] This application claims priority and interest in U.S. Provisional Patent Application No. 63 / 084,994, filed on 29 September 2020, entitled “Scalable Optical Quantum Computing with Hybrid Resource States,” the entire contents of which are incorporated herein by reference.
[0002] field
[0002] This disclosure relates in general to the field of optical quantum computing, and more particularly to the generation of three-dimensional resource states such as boson qubits and squeezed states. [Background technology]
[0003] background
[0003] The ability to store and coherently manipulate quantum optical pulses is desirable for the development of long-range quantum communication and quantum computing. Integrating these functions into a photonic chip along with other quantum technologies such as entangled photon sources is an important practical step toward the implementation of such applications. [Overview of the Initiative] [Means for solving the problem]
[0004] overview
[0004] One or more embodiments described herein relate to the generation of three-dimensional resource states including bosonic qubits and squeezed states. In some embodiments, a system for scalable and fault-tolerant photonic computing includes a plurality of optical circuits, a plurality of photon number resolving detectors (PNRs), a multiplexer, and an integrated circuit (IC). In operation, the optical circuits generate an output state by Gaussian boson sampling (GBS), and the PNRs generate qubit clusters based on the output state. The multiplexer multiplexes the qubit clusters and replaces an empty mode with a squeezed vacuum state to generate a plurality of hybrid resource states. The IC converts the hybrid resource states (e.g., by stitching the hybrid resource states) into high-dimensional cluster states including states suitable for fault-tolerant quantum computing.
[0005] Brief Description of the Drawings
[0005] The drawings are for illustrative purposes primarily and are not intended to limit the scope of the subject matter described herein. The drawings are not necessarily drawn to scale. In some cases, various aspects of the disclosed subject matter may be shown exaggerated or enlarged in the drawings to facilitate understanding of various features. In the drawings, like reference numerals generally refer to like features (e.g., functionally similar and / or structurally similar elements).
Brief Description of the Drawings
[0006] [Figure 1]
[0006] A system diagram showing a system for generating a hybrid cluster state according to one embodiment. [Figure 2A]
[0007] A diagram showing an integrated photonic device implementing a non-Gaussian state Gaussian boson sampling (''GBS'') based preparation. [Figure 2B]
[0008] A diagram showing a simplified representation of a single GBS device. [Figure 2C]
[0009] FIG. 1 is a diagram showing a state preparation device including a GBS device multiplexed in a spatial region and / or a temporal region according to one embodiment. [Figure 3A]
[0010] FIG. 2 is a diagram showing the generation of a 1D qubit cluster in the temporal region according to one embodiment. [Figure 3B] FIG. 2 is a diagram showing the generation of a 1D qubit cluster in the temporal region according to one embodiment. [Figure 3C]
[0011] FIG. 3A is a diagram showing a simplified representation of the 1D qubit cluster generator of FIG. 3A. [Figure 4]
[0012] FIG. 3B is a time-domain equivalent circuit related to the 1D qubit cluster generator of FIG. 3A, showing that the output is in a 1D cluster state. [Figure 5A]
[0013] FIG. 4 is a diagram showing the generation of a (1+1)D cluster state using a plurality of 1D cluster generators according to one embodiment. [Figure 5B]
[0014] FIG. 5A is an exemplary 2D chip layout related to a (2+1)D cluster generator according to one embodiment. [Figure 5C]
[0015] FIG. 5B is a diagram showing a 3D cubic lattice generated using a 2D chip having the layout of FIG. 5B according to one embodiment. [Figure 6A]
[0016] FIG. 6A is a diagram separately showing exemplary representations of two layers of a Raussendorf lattice. [Figure 6B]
[0017] FIG. 6B is a combined representation of two layers of the Raussendorf lattice of FIG. 6A. [Figure 6C]
[0018] FIG. 6C is a diagram showing an exemplary chip layout including a plurality of controlled-Z ("CZ") gates for generating the Raussendorf lattice of FIG. 6A. [Figure 7]
[0019] FIG. 7 is a diagram showing node types for implementing a state generator using a beam splitter instead of a CZ gate according to one embodiment. [Figure 8]
[0020] This is a schematic diagram of a passive system configuration chip layout for generating a state, including the node shown in Figure 7, according to one embodiment. [Figure 9]
[0021] This figure shows an exemplary graph transformation relating to a passive configuration of a typical graph state according to one embodiment. [Figure 10A]
[0022] This figure shows an equivalent circuit for the state shown in Figure 8, according to one embodiment. [Figure 10B]
[0022] This figure shows an equivalent circuit relating to the state shown in Figure 8, according to one embodiment. [Figure 11A]
[0023] This figure shows equivalent circuits for various types of entanglement states shown in Figure 8, according to one embodiment. [Figure 11B]
[0023] This figure shows an equivalent circuit relating to various types of entanglement states shown in Figure 8, according to one embodiment. [Figure 11C]
[0023] This figure shows an equivalent circuit relating to various types of entanglement states shown in Figure 8, according to one embodiment. [Figure 12]
[0024] This figure shows the primary unit cell of a 3D hybrid pair macronode cluster state and the steps for generating it, according to several embodiments. [Figure 13]
[0025] This figure shows an identity that supports the equivalence between a two-mode entangled state and a two-mode clustered state according to one embodiment. [Figure 14]
[0026] This figure shows the equivalence of the two-mode cluster states generated with and without the CZ gate, as obtained from the identity in Figure 13. [Figure 15]
[0027] This figure shows the circuit representation of a beam splitter network associated with a single macronode according to one embodiment, and the relationship between that macronode and adjacent macronodes, along with their equivalent circuit representations. [Figure 16A]
[0028] This figure shows the arrangement of modes in a hybrid macronode 3D cluster state and edge disambiguation according to one embodiment. [Figure 16B]
[0028] This figure shows the arrangement of modes in a hybrid macronode 3D cluster state and the resolution of edge disambiguation according to one embodiment. [Figure 16C]
[0028] This figure shows the arrangement of modes in a hybrid macronode 3D cluster state and the resolution of edge disambiguation according to one embodiment. [Figure 17]
[0029] This figure shows the modularity of the system configuration of a GBS generation chip according to several embodiments. [Figure 18]
[0030] This flowchart illustrates a first method for generating a hybrid cluster state according to several embodiments. [Figure 19]
[0031] This flowchart illustrates a second method for generating a hybrid cluster state, according to several embodiments. [Modes for carrying out the invention]
[0007] Detailed explanation
[0032] Fault-tolerant optical quantum computing is an active research field, but known systems have demonstrated that implementation is impractical due to cost, size, and / or complexity. For example, some known quantum computing systems perform nearly deterministic generation of non-Gaussian states, but doing so incurs extremely high experimental costs and requires an impractical number of devices to achieve the desired level of reliability. Other known quantum computing systems perform direct generation of encoded qubit clusters, but multiplexing is difficult and implementation is costly.
[0008]
[0033] Embodiments described herein include system configurations for optical quantum computing that overcome the challenges of the known systems described above by generating and manipulating three-dimensional resource states, including both boson qubits and squeezed vacuum states. In some embodiments, known methods for the non-deterministic generation of boson qubits are utilized, while simultaneously providing the advantages of continuous-variable quantum computing, for example, by implementing Clifford gates using squeezed states. Some system configurations described herein are implemented using two-dimensional circuits of integrated photonic chips that generate qubit cluster states in one time dimension and two spatial dimensions. The two-dimensional circuits facilitate a modular approach to quantum computing, as different photonic chips can be optimized to suit various aspects of the desired computing protocol. In some such implementations, a primary computing chip can be used for operation under ambient conditions, enabling the scalable fabrication and operation of quantum computers.
[0009] introduction
[0034] In the process of building scalable and fault-tolerant quantum computers, photonics offers several advantages over competing platforms. These advantages may include: (i) the possibility of room-temperature computing, which allows scaling up to a large number of qubits by employing known silicon electronics and photonics techniques (with minimal modification); (ii) inherent compatibility with communication technologies, which enables high-fidelity connectivity between multiple modules (i.e., multiple photonic or other quantum computing circuits) without the noisy conversion steps of other platforms; and (iii) inherent flexibility in the selection of error correction codes, including high-dimensional codes that use temporal degrees of freedom, in the process of fault tolerance. These advantages motivate serious consideration of optical quantum computing system configurations.
[0010]
[0035] Known optical quantum computing system configurations can be seen as encompassing two main classes. The first class of system configurations is based on the use of continuous variable (CV) cluster states along with encoded qubits, taking advantage of the relative ease (compared to known techniques) of generating CV cluster states from squeezed light. In such system configurations, quantum information is encoded with boson qubits, e.g., boson qubits of the type proposed by Gottesman, Kitaev, and Preskill (hereinafter referred to herein as "GKP" qubits), and Clifford and non-Clifford operations are implemented using CV clusters and non-Gaussian resources, respectively. Further details on GKP encoding can be found in “Encoding a Qubit in an Oscillator” D. Gottesman, et al., Physical Review Letters A (64), 012310 (2001). This class includes the design and generation of CV cluster states in various lattices, such as two-layer square lattices (BSL), double BSL, and modified BSL. Known implementations of system configurations within the first class often rely on the near-deterministic generation of non-Gaussian states for encoding information, acting as non-Clifford gates, and correcting CV errors. This reliance on the near-deterministic generation of non-Gaussian states can lead to exorbitant experimental costs. Multiplexing the non-deterministic state generation procedure to generate states with a probability of approximately 1-p suggests that the number of state-generating devices scales as 1 / p, which becomes very large as p→0.
[0011]
[0036] The second class of system configurations is based on directly generating clusters of encoded qubits. This class includes schemes developed for dual-rail coding, cat-basis coding, and GKP coding. These schemes differ from those of the first class in that they are well-suited to the non-deterministic generation of encoded qubits and the non-deterministic gates used to construct cluster states. However, the challenge with these schemes is that each gate is ultimately implemented by consuming encoded qubits, which has complex multiplexing requirements due to its non-deterministic nature and therefore consumes far more experimental resources than nodes of deterministically generated CV cluster states.
[0012]
[0037] From the above perspective, it is desirable to devise a hybrid scheme that leverages the advantages of both classes of optical quantum computing system configurations, for example, by implementing Clifford operations using CV resources while still maintaining compatibility with the non-deterministic generation of encoded qubits. One or more embodiments described herein present precisely such a scheme.
[0013]
[0038] In addition to the advantages described above, the optical quantum computing system configurations of this disclosure exhibit several desirable features for scalability. One such desirable feature is that the system configurations may be suitable for a complete on-chip implementation, in contrast to known systems for CV optical quantum computing, which are typically optimized for free-space implementations. A complete on-chip implementation is facilitated by the planar nature of one or more optical quantum computing system configurations of this disclosure, for example, where each qubit is connected to a small number of adjacent qubits, and there are a fixed number of intersecting channels per qubit. Another desirable feature is that the system configurations are modular, and the size and number of integrated photonic chips do not depend on the desired circuit depth. Furthermore, one or more of the individual modules of this disclosure can be specialized to ensure compatibility with other technologies, unlike known optical quantum computing system configurations (e.g., system configurations for dual-rail qubits) which involve combinations of seemingly incompatible technologies. As an example, consider the challenge of achieving low-loss, high-speed, reconfigurable optical switching in cryogenic conditions. According to one or more embodiments of the optical quantum computing system configuration, the state generation module may be low-loss but not reconfigurable; the multiplexing module may present less stringent loss constraints and therefore be reconfigurable; and the computing module may accommodate reconfigurable switches with relatively large losses at room temperature (e.g., losses of 0.1 dB to 10 dB). Furthermore, the computing module can be enabled to operate at ambient temperature and pressure, and therefore manufacturing scalability can be achieved (e.g., by complementary metal-oxide-semiconductor (CMOS) processes).
[0014]
[0039] From a theoretical standpoint, one or more embodiments of this disclosure encompass at least two novel features. First, a planar system configuration for measurement-based quantum computing in the Raussendorf model using CV-coded qubits is described (see the section “Modular System Configurations” below). Second, a method for fault-tolerant quantum computing using hybrid resource states is described. In this method, some sites (i.e., optical pulses at a given location on the quantum system chip at a given time point) are bosonic qubits, and other sites are squeezed vacuum. Such resources can be generated using relatively few experimental resources. An exemplary model for fault-tolerant quantum computing is detailed in the section “Quantum Error Correction” below, and the related technical advantages are discussed in the section “Technical Advantages” below.
[0015] System Configuration Overview
[0040] In some embodiments, the optical quantum computing system configuration includes three modules configured together to generate computational resource states in two spatial dimensions and one temporal dimension using a two-dimensional circuit of an integrated photonic chip. Each resource state includes one or more clusters of encoded qubits (e.g., GKP qubits), a magic state, and CV nodes stitched to a hybrid “cluster state.” As used herein, “stitching” refers to the creation / addition of entanglement between different states. For example, during the operation of the two-dimensional circuit, non-deterministically generated encoded qubits and magic states can be stitched to a random but known site subset (generated at some random site subsets and not at others), with the remaining sites occupied by a deterministically generated squeezed vacuum state. An indication of whether a site is within a site subset is stored in a multiplexer. The encoded qubits carry quantum information and are used for CV error correction. The magic state is used to implement non-Clifford operations as desired, and Clifford operations are performed using CV nodes in cluster states if nearby CV nodes are available. As used herein, a “magic state” refers to a state that facilitates universal quantum computing when used in conjunction with operations from the Clifford group that have elements that affect the permutation of Pauli operators. For example, the eigenstates of a π / 4 gate are magic states.
[0016]
[0041] In some embodiments, the generation of hybrid cluster states is performed using three modules: a state preparation module, a multiplexing module, and a main computation module. The state preparation module is configured to generate boson qubits and magic states (e.g., programmed or hardwired). The multiplexing module is configured to perform multiplexing of boson qubits to increase the qubit generation rate and replace empty modes (e.g., when multiplexed qubit generation fails) with squeezed vacuum states (e.g., programmed or hardwired). As used herein, “multiplexing” means using multiple non-deterministic qubit generation devices in parallel and routing the qubits generated by any of these devices to an output. The probability that at least one of the multiple qubit generation devices succeeds is higher (i.e., “boosted”) than the probability that a single (non-multiplexed) device succeeds. The main computation module is configured to stitch (or “entangle)) the hybrid resource states for universal fault-tolerant quantum computation and to perform reconfigurable measurements on the generated resource states to complete the computation (e.g., programmed or hardwired). These steps will be described in more detail below.
[0017]
[0042] As shown in Figure 1, an exemplary system 100 for generating a hybrid cluster state according to one embodiment includes a state factory 102, a time stitch 104, a spatial stitch 106, a photonic quantum processing unit (QPU) 108, and a QPU controller 112. The state factory 102, time stitch 104, spatial stitch 106, photonic QPU 108, and QPU controller 112 each represent a logical function that can be implemented using hardware, software, or a combination thereof. As used herein, an "active" system implementation (e.g., system 100) represents an implementation that includes / performs inline squeezing and therefore uses additional squeezed states and homodyne measurements, while a "passive" system implementation (e.g., system 100) represents an implementation that does not include / performs inline squeezing and / or performs stitching with a beam splitter.
[0018]
[0043] The state factory 102 is operably coupled to the time stitch 104, the time stitch 104 is operably coupled to the spatial stitch 106, and the spatial stitch 106 is operably coupled to the photonic QPU 108. The components of the state factory 102 generate GKP states and output the GKP states to the time stitch 104, the time stitch 104 implements a delay line loop and juxtaposes qubits when they are received. The components of the spatial stitch 106 multiplex the output from the time stitch 104 in the spatial domain to generate multidimensional hybrid resource states. The photonic QPU 108 is controlled by the QPU controller 112 and, as discussed herein, entangles hybrid resource states from multiple hybrid resource states into a high-dimensional cluster state containing states for fault-tolerant quantum computation. The QPU controller 112 can receive orthogonal readouts 111 from the photonic QPU 108 and can send phase updates 109 to the photonic QPU 108. Furthermore, the QPU controller 112 can receive instructions 115 related to the program 116 and output results 114.
[0019] Module System Configuration Generation of boson qubits using a multiple Gaussian boson sampling ("GBS") device
[0044] The generation of non-Gaussian states of light, including single boson qubit states, has been proposed, analyzed, and developed by researchers. While high-fidelity state generation from a single GBS device is non-deterministic, multiplexing GBS devices can achieve fast, high-fidelity state generation, and by using more hardware resources, the speed and fidelity of the generated states can be increased. Multiplexing GBS devices can be used to leverage the non-Gaussian resources of photon-resolved detectors (PNRs) and generate arbitrary logical single-qubit states for boson coding, such as GKP and cat-based states. Figures 2A–2C show an example of such multiplexed state generation.
[0020]
[0045] Figure 2A shows a single integrated photonic device implementing a non-Gaussian state Gaussian boson sampling ("GBS") based preparation. In Figure 2A, light emitted from one output port is detected by a PNR detector (the "D" shaped object in Figures 2A-2B) connected to the remaining output port, creating the correct click pattern {n i The selected non-Gaussian state is obtained by obtaining}. The double line represents the classical (i.e., non-quantum) logic used to trigger the switch at the emission port. Figure 2B is a diagram showing a simplified representation of a single GBS device, and Figure 2C is a diagram showing a state-prepared device, according to one embodiment, that includes GBS devices multiplexed in the spatial and / or time domains using classical logic.
[0021] Time-domain generation of 1D clusters
[0046] According to some embodiments of this disclosure, cluster states are generated in one time dimension ("1D") using one or more optical delay lines and a source that generates either a GKP qubit or a squeezed vacuum state. Figure 3A (described later) shows an example setup for generating a 1D cluster state. Alternatively, or additionally, cluster states can be generated using other boson qubits (including, for example, the use of a photonic controlled Z ("CZ") gate). A CZ gate is a two-qubit gate that performs a two-qubit operation. The truth table for a CZ gate is as follows:
[0022] [Table 1]
[0023]
[0047] In some embodiments, an integrated photonic chip circuit receives light as input, which is emitted from a light source (e.g., the integrated photonic device in Figures 2A-2C) and generated using GBS state preparation. More specifically, the emitted modes are: |+> GKP(If the multiplexer is successful), or momentum squeezed state (if the multiplexer is |+> GKP It may be either (injected if no other mode is generated). The first mode is swapped to an optical delay line using an interferometer (whose operation is illustrated and described below with reference to Figure 3B), and its length is set to be equal to the distance between subsequent light pulses. This first mode then returns to the interferometer and interacts with the subsequent mode at a CZ gate implemented by the interferometer (see Figure 3B). This interaction is repeated for each incident mode. The effective optical circuit can be more easily visualized as an equivalent spatial representation shown in Figure 4. During the final step of operation, the circulating light is driven off the delay line by implementing the swap using the interferometer. Thus, a one-dimensional GKP cluster state is generated. A complete exemplary device for generating a one-dimensional cluster is shown in Figure 3C.
[0024]
[0048] Figures 3A-3B illustrate the generation of a 1D qubit cluster in the time domain according to one embodiment. On the left side of Figure 3A, a source 300 comprising multiplexed GBS devices 302A-302D is used to generate a pulse sequence, each pulse being in the |+> state of a selected group of qubits. Additional details regarding the GBS devices can be found, for example, in U.S. Patent Application No. 16 / 997,601, filed August 19, 2020, entitled “Apparatus and Method for Generating Gaussian States from Non-Gaussian States,” and “Conversion of Gaussian States to Non-Gaussian States Using Photon-Number-Resolving Detectors,” Phys. Rev. A, 100 (2019), the entire contents of each document are incorporated herein by reference.
[0025]
[0049] The first qubit is sent into the loop using a swap operation (upper right of Figure 3B). The second qubit follows the first qubit and interacts with the first qubit with a CZ gate (lower right of Figure 3B). The output pulse is in a 1D qubit cluster state in the time domain. Interferometer 310 in Figure 3A can function as either a swap gate or a CZ gate, depending on the configuration used. Turning off the squeezer (represented as "Sq" in Figures 3A-3B) and setting the phase shifter (represented as "PS" in Figures 3A-3B) to π activates a Mach-Zehnder interferometer with perfect reflectivity (upper right of Figure 3B). When the phase shifter is off and the squeezer is on, the CZ gate (lower right of Figure 3B) is activated. The generation of the N-site 1D cluster described in Figure 3A involves performing a swap during the first clock cycle and a CZ during the remaining clock cycles, except for the last clock cycle, which performs a swap (as in the first clock cycle) to drive the light out of the loop. Figure 3C is a simplified representation of the 1D qubit cluster generator in Figure 3A.
[0026] 2+1 dimensional GKP cluster
[0050] In some embodiments, the one-dimensional hybrid time cluster states described above can be stitched together into higher-dimensional cluster states that include states that can be used to perform fault-tolerant quantum computations. The generation of higher-dimensional hybrid lattices can be achieved, for example, by the interaction of pulses from multiple one-dimensional hybrid cluster generators with CZ gates. In one embodiment, a higher-dimensional hybrid lattice is generated using one or more CZ gates acting on a spatial lattice of a 1D cluster and a qubit source.
[0027]
[0051] In some embodiments, a 1D chain of multiple cluster generators is used to generate (1+1)D (i.e., 2D) cubic cluster states in one spatial dimension and one temporal dimension, as shown in Figure 5A. The generated 2D cubic cluster states can be stored in one or more delay lines to allow time for feedforward-based measurements, for example, especially when post-selected gates are used.
[0028]
[0052] In other embodiments, as shown in Figures 5B and 5C, a 2D chip can be used to generate 3D cubic cluster states in two spatial dimensions and one time dimension. More specifically, Figure 5A shows the generation of a (1+1)D cluster state using multiple 1D cluster generators. Qubits interacting with other qubits arriving simultaneously via CZ interactions give rise to a (1+1)D cluster state in the cubic lattice. Figure 5B is an exemplary 2D chip layout relating to a (2+1)D cluster generator according to one embodiment. The 2D chip layout in Figure 5B is similar to the 1D chip, except that the source is arranged as a 2D lattice on the chip. Figure 5C shows a 3D cubic lattice generated using a 2D chip having the layout in Figure 5B according to one embodiment. As can be seen in Figure 5C, There are two types of dots: GKP|+> state (black dots) and momentum squeezed state (white dots). In some implementations, other nodes may enter a magic state depending on the exact cluster used.
[0029] Generation of a hybrid Raussendorf-Harrington-Goyal ("RHG") lattice
[0053] In one embodiment, the generation of an exemplary cluster, i.e., a Raussendorf lattice (as a paradigm example), is discussed below. Instead of, or in addition to, a Raussendorf lattice, one or more other lattices (e.g., non-leaf lattices) useful for fault-tolerant quantum computation may be selected depending on the choice of quantum error correction code and generated using the schemes described herein.
[0030]
[0054] Figure 6A separately shows exemplary representations of two layers of a Raussendorf lattice according to one embodiment. More specifically, Figure 6A shows alternating even and odd layers of a Raussendorf lattice. Dots represent individual computational qubits, and connections between dots represent entanglements. The sub-diagram on the left of Figure 6A represents the even layers of the Raussendorf lattice, and the sub-diagram on the right of Figure 6A represents the odd layers of the Raussendorf lattice. Figure 6B is a combined representation of the two layers of the Raussendorf lattice in Figure 6A. A dot represented by "A" represents a type of qubit present in each layer and connected to the corresponding qubits in the next and previous layers. Dots (qubits) represented by "B" and connections represented by "b" exist only in odd layers. Dots (qubits) represented by "C" and connections represented by "c" exist only in odd and even layers.
[0031]
[0055] Figure 6C shows an exemplary chip layout including multiple controlled Z ("CZ") gates (black dots / lines connecting pairs of nodes) for generating the Raussendorf lattice of Figure 6A. The chip in Figure 6C could include, for example, the photonic QPU108 of Figure 1. The layout in Figure 6C includes two types of sources: a qubit source (such as the one shown in Figure 2C) and a 1D cluster source (such as the one shown in Figure 3C). During operation of the chip in Figure 6C, qubits emitted from the qubit source are entangled only with their spatially adjacent qubits, i.e., qubits emitted simultaneously. Qubits emitted from the cluster source are entangled not only with two spatially adjacent qubits, but also with modes emitted before and after. A Raussendorf lattice can be generated by turning half of the qubit source on and off in alternating time steps. This lattice can serve as a resource for performing fault-tolerant quantum computations, as will be discussed further below.
[0032]
[0056] As shown in Figure 6C, three types of sources are combined on the chip. The box labeled "D" is a hybrid 1D cluster state source, from which a sequence of entangled qubits is emitted with a time delay τ. The box labeled "H" is a hybrid qubit source. The points labeled "B" and "C" are qubit sources that emit only with a time delay of 2τ; the "B" source emits only at time (2n-1)τ, and the "C" source emits only at time (2n)τ. The lines on the chip in Figure 6C represent CZ gates. The CZ gate labeled "b" is turned on only at odd hours, and the CZ gate labeled "c" is turned on only at even hours. These qubits and CZ gates combine to generate the various layers of the Raussendorf lattice and the connections between those layers.
[0033] Passive version of system configuration
[0057] Robust and stable optical quantum information can be generated in hybrid continuous-variable (CV) and discrete-variable (DV) architectures by combining GKP qubits with qubit quantum error correction codes implemented by measurement-based quantum computation (MBQC). However, the most well-known architectures of this type still have significant challenges, particularly in that inline squeezing in circuit-based or measurement-based implementations of CZ gates introduces noise. Furthermore, the use of deterministic GKP sources can result in high computational costs associated with multiplexing, and the demand for rapid reconstruction in linear optical networks can place a heavy load on the ICs. Each of the aforementioned factors further increases the number of optical components that each photon encounters as it passes through the system, thereby exacerbating losses. Losses are the most detrimental flaw in optical quantum computers.
[0034]
[0058] According to several embodiments described herein, the output of a probabilistic source of a GKP qubit can be entangled in a fault-tolerant resource state for MBQC without using inline squeezing and / or a reconfigurable linear optical system. The architecture of this disclosure can generate a three-dimensional macronode lattice structure in one time dimension and two spatial dimensions, where each site in the lattice structure contains (or, in some implementations, consists of) four modes. In some implementations, the generating circuit may consist only of a single-mode source, a balanced beam splitter static circuit at depth 4, a single time-step delay line, and a homodyne detector. The generated resource state can be used similarly to a CV / DV hybridized RHG cluster state, although the process is generalizable to other qubit codes. Furthermore, due to the symmetry of the generating circuit, both finite squeezing noise and uniform photon loss across the entire beam splitter network can be equivalent to the local Gaussian noise in front of each detector.
[0035]
[0059] The logic error rate of the outer (qubit) code was calculated for various levels of finite squeezing and photon loss over various failure probabilities of GKP state generation. If the source fails to generate a GKP state, it is assumed that a squeezed vacuum state is generated. For example, with 15 dB of squeezing and no loss, the architecture of this disclosure was found to tolerate a GKP failure rate of over 50%, significantly reducing the size of the per-node state-prepared modules and multiplexers in known systems. Furthermore, under deterministic GKP state generation conditions, a squeezing threshold of approximately 10 dB was found (lower than the value found in known systems), even though known systems ignore noise from inline squeezing within the CZ gate. The trade-off between acceptable finite squeezing noise and uniform photon loss rate for a given GKP failure rate is discussed below.
[0036]
[0060] A qubit can be encoded into optical boson modes by GKP coding, and ideal logical 0 and 1 codewords are defined as follows:
number
[0037]
[0061] Here, μ is a placeholder for a value of 0 or 1.
number
number
number
number
number
number
[0038]
[0062] The effect of finite squeezing can be modeled by applying additive Gaussian boson channels to ideal |0>p and |φ> states.
number
number
number
[0039]
[0063] A 50:50 beam splitter is,
number
number
number
number
number
number
number
number
[0040] 3D Hybrid Macronode Architecture
[0064] A constant-depth generation circuit has been proposed for RHG lattice states compatible with a probabilistic GKP state source. However, this proposal remains experimentally difficult because it involves the use of inline squeezing (present in CZ gates) and time-varying circuits (i.e., different gate configurations for even and odd time steps). Each of the aforementioned problems can be avoided by replacing the RHG lattice target states with computationally equivalent macronode cluster states, each node having multiple modes subject to multimode measurement.
[0041]
[0065] Figure 12 shows inset (A) the principal unit cell of a 3D hybrid pair cluster state, and insets (B) to (C) show the steps to generate it according to several embodiments. Insets (B) to (D) of Figure 12 are shown as cross-sections of waveguide layers stacked in the Z direction, coinciding with the direction of light propagation through the waveguide. The 3D grid exists in two spatial (X,Y) dimensions and one time dimension. The time dimension is divided into discrete time bins of width ΔT. Colors (green is represented by "G", blue by "B", yellow by "Y", red by "R", and black by "K") are included in Figure 12, showing the relationship between the source and the final state. Yellow and blue indicate even-time or odd-time signatures. Macronodes on the blue shapes correspond to the blue macronodes in inset (A). Macronodes on the yellow shapes correspond to the yellow macronodes in (A). The macronodes above the green shapes correspond to the green areas (i.e., partially blue and partially yellow) in inset (A). Red arrows (indicated as "R") represent spatial connections, and black arrows (indicated as "K") represent temporal connections. Inset (B) in Figure 12 shows the waveguide configuration in the first layer, where each node receives input from the source for each ΔT width time bin. The time bins of the black circle nodes are offset by ΔT / 2 relative to the white circle nodes. As indicated by the arrows, 50:50 beam splitters are applied between pairs of modes, which produce entangled pairs (see equation (7) below). The beam splitters indicated by the black arrows create entangled pairs connecting the states in the Z direction. Inset (C) in Figure 12, X shows the application of a ΔT / 2 time delay line, and the shaded area shows the application of a π / 2 phase delay. In the inset (D) of Figure 12, the states are connected to the macronode cluster state by applying four additional beam splitters between the four modes that make up each macronode. Beam splitters shown by dotted lines are applied after beam splitters shown by solid lines. Note that the time delay lines change the time signature of a particular node.
[0042]
[0066] In some embodiments, the basic building block of the 3D hybrid pair cluster state is a kind of two-mode entangled state, which can be generated by first generating a mode pair that is either GKP or momentum-squeezed vacuum, and then sending the mode pair through a 50:50 beam splitter. The constituent modes are only combined by the beam splitter, but the resulting pair corresponds to a two-mode cluster state, as revealed by the identities shown in FIG. 13 (Equations 3-6), where |φ> can be in any state. From these identities, both |ψ> and |φ> are [Number] or at least one of the states |ψ>, |φ> is |0> p Assuming that, a state diagram shown in FIG. 14 can be obtained. Even if one can only randomly access either |φ> or |0> p , an entangled state that functions as a unit of the hybrid CV-GKP qubit cluster is always obtained. By making |ψ> or |φ> into a magic state such as |+T> and the other into |0> p , the magic state can be inserted into this architecture. Additional details regarding the creation of (two-mode) GKP EPR states and GKP / CV entangled states can be found, for example, in "Continuous-Variable Gate Teleportation and Bosonic-Code Error Correction," B. Walshe, et al., Physical Review A (102), December 2020, the entire content of which is incorporated herein by reference for all purposes.
[0043]
[0067] In some implementations, the entangled pairs are arranged in a 3D configuration, as shown in the inset (A) of FIG. 12. To achieve this, at regular intervals, with probability 1-p swap emit |φ>, with probability p swapWe start with a 2D array of sources that emit momentum-squeezed states. The desired probability p swap However, we assume that this can occur due to the multiplexing of multiple GBS sources for each valid source. Each source can be specified to generate an input mode every time step of length ΔT, but the timing of half of the sources can be offset by ΔT / 2 according to its position in the 2D layout in inset (B) of Figure 12. The beam splitter, delay line, and phase delay in insets (B) and (C) of Figure 12 generate the desired arrangement of paired states in (2+1) dimensions.
[0044]
[0068] To create a fully connected 3D resource state, four 50:50 beam splitters can be applied within each macronode, similar to a quad-rail grid structure, as shown in inset (D) of Figure 12. A detailed graphical representation of the resulting state is described in the following "Entanglement Structure" section. Each mode is then transmitted to a homodyne detector.
[0045] Equivalence with canonical hybrid cluster state
[0069] In some embodiments, there is one mode per node, and its generation involves a CZ gate, so the hybrid RHG cluster state is used as the canonical RHG lattice state. The state generated by the circuit in Figure 12 is a macronode version of this state. If we always measure three modes called satellite modes,
number
[0046]
[0070] Inset (A) of Figure 15 shows a circuit representation of a beam splitter network associated with a single macronode 0 when the central mode is the top wire. Connectivity to adjacent macronodes by the beam splitter is also shown. The circuit rules are shown in the legend of Figure 15. The last four beam splitters correspond to the beam splitter inset (D) of Figure 12. Inset (B) of Figure 15 shows the equivalent circuit to inset (A), which is derived by applying the identity in Figure 14. X0 represents the displacement X((m2+m3 / 2). S is a squeezing gate, whose effect is to rescale the homodyne result. Inset (C) of Figure 12 shows the equivalent circuit to inset (B), which is derived from the identity of the circuit that transitions the CZ gate toward measurement. CX † The gates act trivially on the circuit input and are therefore depicted with dotted lines. The displacements Z1, ..., 4 depend on the measurement results of the satellite modes at adjacent macronodes.
[0047]
[0071] To conserve the description of the post-measurement state, the central mode at each macronode can, whenever possible, always be selected from a wire with an input prepared in a GKP state. Representing state generation and measurement by quantum circuits allows for further simplification when the central mode is considered to be the top wire shown in inset (A) of Figure 15, as other cases can be made equivalent by finally substituting the measurement base. Using equations (3) and (7), the beam splitter can be replaced with a CX(†) gate and a squeezer. On the measurement side, gates X(a), S(ξ), and CX jk The exchange relations between them and the identity relating to homodyne measurement <m| q X(a) = <m-a| q , <m| q S(ξ)∝ <m / ξ| q and
number
number
number
[0048]
[0072] The central mode is the encoded GKP state.
number
number
number
[0049] Noise model
[0073] Any single-mode Gaussian boson channel ε that preserves the phase space average in the vacuum state satisfies the following equation:
number
[0050]
[0074] Furthermore, if ε is also isotropic with respect to the orthogonal phase of the phase space, then the following equation holds. R(θ)(ε(·))R † (θ) = ε(R(θ))(·)R † (θ) (10)
[0051]
[0075] These identities allow us to couple and exchange the uniform photon loss occurring immediately before the beam splitter layer in inset (B-D) of Figure 12, so that it acts immediately before the homodyne detector layer in inset (A) of Figure 15. η represents the total transmission coefficient of the cumulative losses acting before each detector. The homodyne results are...
number
number
number
number
[0052]
[0076] When photon loss and finite squeezing noise are taken into account as Gaussian random noise in the measured data, the reduction to the canonical RHG lattice state described above can be applied. However, reinterpreting this noisy measured data and restoring the conditional displacement (also known as the byproduct operator) in the central mode inset (C) of Figure 15 further distorts the homodyne result of the central mode.
[0053] Threshold calculation
[0077] Correctable regions regarding the macronode resource state can be found by Monte Carlo simulation, with each trial involving three steps: simulating the complete macronode RHG grid prepared in Figure 12, scaling it down to a canonical grid, and performing error correction on the scaled-down grid.
[0054]
[0078] The noisy homodyne results for macronode lattices are obtained by first sampling the (ideal) orthogonal phase, applying an entangle gate, and then combining them into a covariance matrix.
number
[0055]
[0079] If all modes are in the GKP state, the swap-out probability p swap The threshold was found to be 10.1 dB. With the additional constraint that every macronode has exactly one GKP state, the threshold becomes 13.6 dB. There is a significant improvement in the swap-out tolerance of the passive architecture, at approximately 71%, in contrast to about 24% for some known active architectures.
[0056]
[0080] While we do not wish to be bound by theory, the inventors assume two main reasons for the observed improvement. First, the swapping of GKP modes with momentum-squeezed states introduces noise correlated between their neighbors. Analysis has revealed that the reduced grid has effective momentum-squeezed states only if all four modes in the macronode before reduction are swapped. Thus, the redundancy of the macronode grid provides greater tolerance for swap-out. Second, by-product operators, conditioned on the measurement of adjacent GKP states, are binned and therefore do not propagate Gaussian noise. Indeed, any additional GKP states present in a given macronode provide additional degree of local GKP error correction.
[0057]
[0081] Known studies have shown that quantum error correction (in the form of topologically protected cluster states) can be used for optical quantum computing using a probabilistic source of GKP qubits, provided that the available squeezing is sufficiently high. However, such studies have envisioned systems with both inline squeeze and time-varying beam splitters, both of which are difficult to implement at the desired noise level. By using static linear optical circuits to generate a macronode lattice, the architectures described herein in several embodiments circumvent such obstacles and thereby make it possible to implement topology error correction at the desired (i.e., optimally low) noise level.
[0058]
[0082] In some embodiments, the systems for generating hybrid cluster states described herein do not use experimentally demanding CZ gates. Such CZ gates, previously considered ideal among researchers, have been shown to substantially degrade the quality of the states. The cause of such degradation is thought to be inline squeezing. The embodiments described herein avoid such degradation by using circuit identities to transfer all squeezing to the input of the circuit (which can be absorbed into state preparation) or to the output (which appears as conventional processing of homodyne measurement results). Furthermore, by doubling the number of modes at sites with connectivity in the Z direction, the need for reconfigurability of optical elements in the cluster state generation circuit can be eliminated. The only remaining reconfigurable components are the multiplexed sources of the individual GKP states (if switches are used) and the local oscillator phase of each homodyne detector.
[0059]
[0083] By leveraging the symmetry of the resource generation circuit, both uniform loss effects and finite squeezing effects can be integrated into the composite Gaussian noise associated with each detector. Such models have been shown to treat finite squeezing noise and photon loss equally, leading to unprecedented noise reduction.
[0060]
[0084] The circuit identity represents the built-in redundancy provided by the satellite modes of resource states described herein, arising from the substitution symmetry of the generating circuit. Having multiple GKP states per macronode is equivalent to an additional round of GKP error correction, keeping the threshold at approximately 10 dB in the case of all GKPs. However, providing even one GKP state to a macronode means that the encoded state at each site behaves like a GKP state, significantly increasing the tolerance for swap-out. At 15 dB, i.e., the highest level of optical squeezing observed and reported to date (with respect to a squeezed vacuum in the bulk optics), the embodiments described herein can accommodate the replacement of more than half of its GKP states by momentum-squeezed states. This means that the increase in the number of modes in the cluster is balanced by a corresponding decrease in the number of stochastic state sources at each node, thereby significantly relaxing the multiplexing requirements. In summary, the results achievable by the systems of this disclosure substantially facilitate the realization of fault-tolerant and scalable optical quantum computers.
[0061] Entanglement structure
[0085] The relationship between the generation circuit and the entanglement structure of the generated states is described below. After the state generation stages shown in insets (C) and (D) of Figure 12, the array of modes becomes as shown in inset (A) of Figure 16. Figure 16 shows a graph of the hybrid macronode 3D cluster state. Inset (A) of Figure 16 shows a 2D mode layout and has ΔT / 2 offset modes that coincide with insets (C) and (D) of Figure 12. That is, the modes at the black circle nodes are temporally offset by ΔT / 2 relative to the modes at the white circle nodes. Each macronode consists of four modes represented by 1 to 4. Inset (B) of Figure 16 shows a three-dimensional arrangement of the 4-mode macronodes. For clarity, the labels A through F have colors corresponding to the given letters, with lighter colors for deeper layers (green in the X and Y directions, red in the Z direction; light green is represented by "LG", dark green by "DG", light red by "LR", and dark red by "DR"). Five modes corresponding to the back of the cube are omitted from the unit cell. Connectivity in the XY plane is the same as on the front. Inset (C) in Figure 16 shows the macronode graph edges for each connection inset (B). The upper six configurations correspond to CZ gates with a weight of 1, connecting mode pairs as shown in inset (A) in Figure 12. The lower six configurations correspond to CZ gates with a weight of ±1 / 4 (darker edges are positive, lighter edges are negative), showing the connectivity of the subsequent modes as shown in inset (D) in Figure 12.
[0062]
[0086] It should be noted that the black dots in Figure 12 indicate that these lattice sites exist in time modes and are offset by ΔT / 2 compared to the lattice sites of the white dots. The grouping of modes into macronodes is shown by the yellow (blue) squares and rectangles, which also indicate that these macronodes are offset (or not offset) by ΔT / 2. When the resources are built up to the point between stages C and D in Figure 12, it corresponds to projected entangled pair states (PEPS) with respect to the CV / DV RHG cluster state, as shown in inset (A) of Figure 12. The precise identification of waveguide modes by graph nodes is shown in Figure 16.
[0063]
[0087] As described herein, a 4:1 reduction in modes for each macronode may correspond to the application of a projection operator equivalent to performing four beam splitter and three homodyne measurements. Similarly, other measurements can be performed after the beam splitter (resulting in more general operations than those achievable on a canonical lattice). A four-layer graph of the states after the beam splitter but before the homodyne measurements is shown in inset (C) of Figure 16. The dark / light edge coloring is consistent with the plus / minus signs in the real-valued adjacency matrix of the states, which result from graphical calculations of the Gaussian pure states when all modes are initially in a squeezed state.
[0064]
[0088] In some implementations of the passive system configuration described above, the passive grid is dimensional 2. N The grid can be determined for (for example, 2, 4, 8, 16) grids. Additional details regarding passive implementations are provided, for example, in “Fault-Tolerant Quantum Computations with Static Linear Optics,” I. Tzitrin, et al., available at https: / / arxiv.org / abs / 2104.03241, and the entire contents of that document are incorporated herein by reference for all purposes.
[0065]
[0089] As described above, Figures 6A-6C illustrate a method for generating a Raussendorf grid according to one embodiment. Each node represents the output of a single-mode source (emitting either a GKP-plus state or a momentum-squeezed state at each time step), and each link / edge represents the application of a CZ gate (implemented, for example, using a pair of squeezers sandwiched between two beam splitters). However, in some examples, the use of CZ gates in the generation procedure can be architecturally challenging, for example, when active squeezing elements are implemented using measurement-based squeezing and feedforward gates. Therefore, in some embodiments, all CZ gates represented by links / edges in Figures 6A-6C are replaced with 50:50 beam splitters (for example, measurement-based squeezing and feedforward gates may require additional high-speed electronics on the photonics chip and may introduce unwanted noise into the light, so 50:50 beam splitters may be easier to implement experimentally), and each node in Figure 6B is modified as follows: Nodes "B" and "C" are modified to include four separate light sources of squeezed light / GKP-plus state delivered via four additional beam splitters; node "A" is modified to include six separate light sources of squeezed light / GKP-plus state delivered via six additional beam splitters. An example of such modifications is shown in Figure 7, and an example of the entire chip layout of the associated passive system configuration is shown in Figure 8.
[0066]
[0090] In Figure 7, each link / edge represents a 50:50 beam splitter (rather than a CZ gate). Four different types of nodes are shown in Figure 7, each configured to emit either four or six modes. The representation in Figure 7 is the same as in Figure 6B. The "A" nodes (and "a" links / edges) are implemented in each layer of the state generator, the "B" nodes and "b" links / edges are implemented in the odd-numbered layers of the state generator, and the "C" nodes and "c" links / edges are implemented in the even-numbered layers of the state generator. The arrows in each panel of Figure 7 indicate the next implementation of the rightmost beam splitter interaction. The double lines in the rightmost panel of Figure 7 indicate beam splitters that cannot be implemented simultaneously with the beam splitters shown by the solid lines, although the order of the solid / double-lined beam splitters is interchangeable in the rightmost panel. In other words, any particular macronode (i.e., the set of four "B" and / or "C" modes in Figure 7) is occupied by only four states. The resulting states contain more modes and have a more complex entanglement structure, but can be reduced to a Raussendorf-Harrington-Goyal ("RHG") lattice based on local homodyne measurements.
[0067]
[0091] As described above, Figure 8 is a schematic diagram of a passive system configuration chip layout for generating states, including the nodes shown in Figure 6, according to one embodiment. In Figure 8, one mode in each mode pair "P" is time-delayed by Δt to connect layers at different time steps (as also shown in Figure 10B). In each mode pair in Figure 8,
number
number
number
number
number
number
number
number
[0068]
[0092] A legend regarding the components of the circuit in Figure 8 is shown and described with reference to Figures 10A-10B. Figure 10A shows the dumbbell-shaped entangled states of Figure 8, where each entangled state includes two modes that interact in the beam splitter. Depending on the selection of the two modes used (the small circles at the end of each dumbbell-shaped entangled state), various different entangled states can be implemented, examples of which are listed in Figure 11. Figure 10B shows,
number
number
number
number
[0069]
[0093] Each entanglement state shown in Figure 8 can be at least one of the following three types: (a) both modes are in a suitable squeezed state; (b) one mode is in a squeezed state and one mode is in a selected GKP state; or (c) both modes are in a selected GKP state. Figures 11A to 11C show equivalent circuits for each of these different types of entanglement states according to one embodiment.
[0070] Generalization of Passive Architectures - Passive Construction of General Graph States
[0094] In some embodiments, a general algorithm is defined for obtaining a set of N bell pairs and, by interferometry and subsequent destructive measurements, joining half of those N bell pairs to a single vertex such that the N edges yield the remaining half of each pair. The single unit in question can be written as a graph transformation shown in Figure 9, where the circle "C" indicates the mode of interaction with the interferometer.
[0071]
[0095] Several known beam splitter networks use four splitters to build a cluster state. Such a method can be extended to an eight-mode macronode by repeating the procedure with four other modes, adding another set of beam splitters connecting mode 1 to mode 1, mode 2 to mode 2, and so on. This pattern is size 2 NThe macronodes can be continuously scaled to a generalized beam splitter network that can entangle them. To accommodate various sizes of codes, the size of the macronodes can be artificially increased using additional auxiliary states, and then those additional modes can be removed by positional measurements. Further details regarding the construction of cluster states using four splitters are provided, for example, in “Blueprint for a Scalable Photonic Fault-Tolerant Quantum Computer,” by Bourassa, EJ, et al., Quantum (5), February 2021, available at https: / / arxiv.org / abs / 2104.03241, and in “Fault-Tolerant Quantum Computation with Static Linear Optics,” by Tzitrin, I., et al., the entirety of which disclosures are incorporated herein by reference.
[0072]
[0096] In some embodiments, the algorithm implements macronode construction from a base graph of arbitrary shape and size. For example, in one implementation, the algorithm may be configured to implement hypercube states, while in another implementation, the algorithm may be configured to implement non-hypercube states.
[0073]
[0097] Known interferometers based on the Discrete Fourier Transform ("DFT") can introduce complex-weighted edges into the graph between the external modes in Figure 9, thereby preventing the output graph state from being a true cluster state. Known universal N-mode multiport interferometer methods can be undesirable because they involve a considerable amount of redundancy. Losses and noise within the network can be reduced by minimizing the number of optical elements used in the optical network.
[0074]
[0098] In some implementations, the minimum criterion for a unitary that performs the graph transformation shown in Figure 9, which includes the desired output and minimizes the required optical elements, is that it has one row or one column of entries.
number
number
[0075]
[0099] A unitary matrix having the structure of equation (11) can be constructed using a beam splitter network.
number
number
number
[0076]
[0100] The subscripts represent the mode in which the operators act, and the product follows the order of the operators from left to right (i=1 to i=N-1). This network uses only N-1 beam splitters.
[0077]
[0101] In some implementations of the configuration described in this section, the passive grid can be determined for grids of dimensions 6, 10, 12, 14, 18, and so on.
[0078] Quantum error correction
[0102] The following examples illustrate how error correction procedures can be applied to a computation in the presence of an error, according to several embodiments. In the first example, a finite squeezing error is addressed, and probabilistic code state generation is considered. Method 1 below presents steps for performing a fault-tolerant computation, according to several embodiments. Method 1 takes as input a specific computation task, which is performed on a quantum computer and specified by the user. The subroutine for the computation task includes the implementation of a logical operation and the implementation of interleaved rounds of quantum error correction. The quantum error correction procedure is described in further detail in Method 2. The quantum error correction procedure takes as input the results of measurements implemented to perform a logical operation and outputs reliable syndrome data. As used herein, “syndrome data” represents the results of measurements performed to determine whether an error has occurred and, if so, which site has the error. “Reliable” means the results obtained by performing such measurements multiple times and polling the results to reduce the sensitivity of the results to measurement flaws. The error correction procedure includes the use of a decoder to process the measurement data. An example of a dual decoder including an internal (boson) decoder and an external (qubit) decoder is described in methods 3 and 4 below.
[0079] Method 1: Steps for performing fault-tolerant quantum computation Input: Input for calculation tasks and problems. 1. Compilation. Based on the computational task and the input to the problem, determine the appropriate logic circuit including the layers of operation and select the appropriate quantum error correction code and decoder. 2. State initialization. A cluster state is generated based on the selected quantum error correction code and logic circuit. An example of a generated state may include a GKP qubit in a known subset of modes and a squeezed vacuum state in the remaining modes. 3. Implementation of logic circuits. Error correction is performed by repeatedly applying layers of logic operations / measurements using logic circuits. (a) Perform one layer of logical operations by measuring a subset of sites within a suitable (e.g., predetermined) basis so as to be appropriate for the quantum computation, the selected quantum error correction code, and the measurement results from the previous error correction and logical operation rounds. The measurements may include, for example, homodyne measurements in optical mode. (b) Perform error correction on the measurement results obtained in the previous step using Method 2. 4. Processing of measurement results. Process the logical measurement results to obtain output related to the calculation task. Output: The output of the computation task for a given input.
[0080] Method 2: Steps for implementing quantum error correction Input: (1) Measurement results obtained by performing logical operations, e.g., real-valued homodyne measurement results, and (2) information regarding which sites contain GKP qubits and squeezed vacuum. 1. Decoder execution. An exemplary decoder implements the following two-step procedure: (a) Internal decoder: Processes the real-valued homodyne measurement results to obtain binary results representing bit values using local and global information obtained by Method 3. Uses information about which sites contain which states. (b) External decoder and error correction: Using the additional information provided in the previous step, external code error correction is applied using Method 4. Output: Reliable syndrome results.
[0081] Method 3: Exemplary Internal Decoder input:
number
number
number
[0082] Method 4: Exemplary external decoder: Minimum weight perfect matching ("MWPM") Input: Qubit measurement results from Method 3 1. Syndrome Identification: Relevant stabilizer measurement results are constructed from input qubit measurement results. 2. Building the matching graph: Use the following to build the complete graph. Vertices containing pairs of unmet syndromes (with additional vertices if specific boundary conditions are desired). An "unmet" syndrome represents a measurement in which an error was detected. • Edges that connect all pairs of vertices. • A weight assigned to an edge, reflecting the probability of the error that most likely resulted in a pair of unsatisfied syndromes. 3. Matching method: Find the minimum weight perfect match by running, for example, Edmonds' algorithm on the matching graph from the previous step. 4. Recovery Operation: Infer one or more recovery operations from the matching graph. 5. Correction: Interpret syndrome results in consideration of recovery procedures. Output: Reliable syndrome results.
[0083] Exemplary analysis Noise model
[0103] In some embodiments, the generated cluster states are occupied by the two types of states described herein, namely GKP coded |+> states and momentum squeezed states. The position wave function of an ideal GKP state is as follows:
number
number
number
number
number
number
[0084]
[0104] Alternatively, to model state initialization errors, an ideal GKP|+> gkp Assuming a state, the noise channel N at probabilities 1-p0 and p0 respectively. Ygkp or N Yp The ideal GKP|+> gkp This method can be applied to states. While this method closely approximates real-world momentum states in a position-based manner, it exhibits a periodic structure in momentum space (which will be re-examined below).
[0085]
[0105] There are several reasons to use the Gaussian white noise channel in equations (16) and (17) to model state-prepared errors. For example, many CV gates use measurement-based squeezing operations that inherently lead to defects modeled as Gaussian white noise channels. Furthermore, this type of noise is closely related to pure loss, which is derived by following a pure loss channel through an inverse-intensity amplifier. This relationship can play a significant role in situations where loss can be treated in this way, such as in the case of measurement defects.
[0086]
[0106] The Gaussian-White noise channel can be easily described using the Heisenberg picture. Consider the orthogonal operators of the N modes, where
number
number
number
[0087] Initialization of cluster state
[0107] As discussed in the previous subsection, a vector of length 2N (where N is the number of modes) can be initially initialized to store the average of the q and p orthogonal phases for each mode. Initially, the average of all orthogonal phases is 0. For each mode, a momentum squeezed state is prepared with probability p0, and a GKP|+> state is prepared with probability (1-p0). Then, CZ gates (e.g., "perfect" or "ideal" CZ gates) are applied according to the structure of the cluster state, i.e., whenever there is an edge between two nodes in the lattice. Some CZ gates may be inverted to conform to the CV toric code convention.
[0088]
[0108] Recall that the symplectic transformation of a CZ gate in the (q1,q2,p1,p2) basis order is given by the following equation.
number
[0089]
[0109] Note that A2 is an adjacency matrix with respect to two modes. That is, A2 is a symmetric binary matrix where the entry at the ij-th is 1 if the two modes are connected by an edge, and 0 otherwise. † Regarding its application, it is estimated that A2 → -A2. (Note: The notation † for a given gate represents its ermitan conjugate). Therefore, the symplectic matrix corresponding to the connection to the cluster state of all optical modes is given by the following equation.
number
number
number
[0090]
[0110] Finally, the momentum value is measured. In this case, only the momentum component of the noise matrix given by the following equation is considered.
number
[0091] Internal Decoder
[0111] In some embodiments, the standard map from homodyne measurement results to bit values is the binning function derived from the translational symmetry of the original GKP state, i.e., complete periodicity in the q and p directions. The subscript "gkp" is omitted when clear from the context. |+> and |->The state is determined by the momentum of each
number
number
number
number
number
[0092]
[0112] To illustrate the importance of such translators, consider the example of a momentum squeezed state at the center of a principal plane surrounded by four GKP states. -1 The large amount of CV noise is distributed symmetrically from the q-orthogonal phase of the momentum state to the p-orthogonal phase of the connected GKP state. However, due to the periodicity of the GKP state, the net effect is either an identity gate or a Z gate applied to all surrounding GKP states, which replaces the stabilizer in the RHG lattice.
[0093]
[0113] A translator is desirable in a hybrid system configuration that takes into account the coding phase of the computation, because it remains the same regardless of subsequent logical operations in the computation. In other words, it is possible to determine which modes are GKP states and p-squeezed states, and where CZ gates were applied to form cluster states. As numerical examples show, if the distribution of p-homodyne results is examined at this stage, the p-homodyne results are sampled from a periodic construction of Gaussian distributions, and each Gaussian distribution has a covariance Σ p Each Gauss has a point
number
[0094]
[0114] Suppose a value p is obtained after homodyne measurement. From the above discussion, the candidate distributions that may have generated p are covariance Σ p It has, lattice points
number
number
[0095]
[0115] Therefore, the lattice point that most likely generated point p is given by the following equation.
number
[0096] External Decoder
[0116] After obtaining and binning the results of homodyne measurements, error correction can be performed on the qubit outer codes. Details of the error correction problem are summarized in Method 4 with respect to a specific (e.g., general) selection of decoding algorithms, namely minimum-weight perfect matching (MWPM). However, it should be noted that countless other decoders can be used.
[0097]
[0117] In the weight assignment step, analog CV information (complete homodyne measurement results) can be included along with the locations of p-squeezed states in the lattice.
[0098] Numerical examples
[0118] The heuristic translator of the present disclosure can identify directions in the p-space that have significantly more noise than others by replacing some GKP states with p-squeezed states and then applying CZ gates to encode them into cluster states corresponding to the selected codes. The space orthogonal to these noisy directions has a small amount of noise. By performing a basis change, CV data can be determined along these directions at various levels of noise. These directions represent linear combinations of the original modes and, in an ideal case, still yield integer-valued results. Considering the self-consistency of the integer linear combinations and using appropriate binning, the results can be determined in this basis. By reversing the basis change, we return to an integer-valued vector with respect to the code lattice, and after taking mod2, a bit string representing the qubit-level result is returned.
[0099]
[0119] An example of how the heuristic translator operates in the case of a p-squeezed state surrounded by four GKP states is shown below according to some embodiments. This example involves assigning a bit string to five homodyne results.
[0100] Method 5: Exemplary internal decoder for one p-squeezed state surrounded by GKP states Input:
Number
Number
Number
Number
number
number
number
number
[0101]
[0120] Figure 17 shows the modularity of the system configuration of a GBS generation chip in several embodiments. In some implementations, the GBS generation chip is reconfigurable. In other implementations, the GBS generation chip is reconfigurable but includes an integrated PNR to minimize losses. The GBS generation chips of this disclosure may be partially or completely stored in a cryogenic environment and / or may operate in a cryogenic environment. For example, in some embodiments, state generation is performed in a cryostat and subsequent calculations are performed at room temperature. Each GBS generation chip includes an active switching system with a high-speed switch which may not be optionally reconfigurable. Depending on the application, some delay between the generation phase and the switching phase may be beneficial.
[0102] Technical advantages Modularity
[0121] The various aspects of the computation described here (state preparation, multiplexing, cluster generation, and measurement) have different associated hardware specifications. These hardware specifications facilitate modular design, allowing different tasks to be performed on different chips. For example, the generation of boson-coded states can be performed using non-reconfigurable circuitry with an on-chip PNR. Cluster stitching can also be performed on a non-reconfigurable chip. The measurement of the generated clusters can be performed using a reconfigurable homodyne detection fed forward from measurements at other homodyne detectors.
[0103] Minimum cryogenic requirements
[0122] The state generation chip described herein may include low-loss, non-reconfigurable circuitry in a static integration platform, and thus an on-chip PNR may be used, and optionally the entire chip may be placed in a cryostat, allowing the rest of the system (e.g., the switching network for state generation) to operate at room temperature.
[0104]
[0123] Keeping the switching network at room temperature can help utilize the delay introduced when extracting light from the cryostat. Cluster operations can be performed using reconfigurable homodyne detection and delay lines to enable feedforward. Thus, cluster generation and operation can be performed on a chip. On-chip homodyne detection may be faster than detection using superconducting detectors and can therefore reduce losses associated with delay lines present in the cluster operation phase.
[0105] Homodyne detection sets the time scale
[0124] In some embodiments, the timescale for cluster generation and cluster operation is set by the timescale of homodyne detection (or by any other slower process that may exist during the final generation procedure). This can be advantageous because homodyne detection can be much faster than PNR detection during the multiplexing procedure and / or threshold detectors during dual-rail coding. A faster timescale may mean a shorter cluster generation delay line and therefore lower loss. These advantages can be observed in Figures 2A, 2C, and 4C, for example, in that the delay line represented by τ in Figures 2A and 2C is shorter in the system designs described herein compared to known photonic systems.
[0106]
[0125] Figure 18 is a flowchart illustrating a first method for generating a hybrid cluster state according to several embodiments. As shown in Figure 18, method 1800 includes, in 1802, receiving the input vector and noise model of a homodyne measurement. In 1804, based on the input vector and noise model of the homodyne measurement, at least one direction having a noise level above a predetermined threshold is identified. In 1806, based on the identified at least one direction, a basis modification is performed on the input vector of the homodyne measurement (e.g., using a transformation matrix) to generate a first modified vector, and in 1808, a transformation is applied to the first modified vector to generate a second modified vector. The binning operation may be based, for example, on a map from the homodyne measurement results to bit values. Alternatively, or additionally, a rounding operation may be performed.
number
[0107]
[0126] Figure 19 is a flowchart illustrating a second method for generating a hybrid cluster state according to several embodiments. As shown in Figure 19, method 1900 includes receiving an input vector for a homodyne measurement in 1902 and performing a basis change on the input vector for the homodyne measurement in 1904 to generate a first modified vector. In 1906, a transformation is applied to the first modified vector to generate a second modified vector. The transformation may include binning and rounding operations. The binning operation may be based, for example, on a map from the homodyne measurement results to bit values. Alternatively, or additionally, a rounding operation may be performed.
number
[0108]
[0127] Although various embodiments have been described and illustrated herein, various other means and / or structures for performing the functions and / or obtaining one or more of the results and / or advantages described herein are possible, and each such variation and / or modification is possible. More generally, all parameters, dimensions, materials, and configurations described herein are intended to be examples, and the actual parameters, dimensions, materials, and / or configurations depend on one or more specific applications for which this disclosure is used. The foregoing embodiments are presented by way of example only, and it should be understood that other embodiments can be implemented in ways other than specifically described and claimed. Embodiments of this disclosure are directed to the individual functions, systems, articles, materials, kits, and / or methods described herein. Further, any combination of two or more of such functions, systems, articles, materials, kits, and / or methods is within the scope of the invention of this disclosure if such functions, systems, articles, materials, kits, and / or methods are not mutually inconsistent.
[0109]
[0128] Also, various concepts may be embodied as one or more methods, and an example thereof is provided. The actions performed as part of the method can be ordered in any suitable way. Thus, although shown as sequential actions in the exemplary embodiments, embodiments can be constructed in which the actions are performed in an order different from the example, and can include performing some actions simultaneously.
[0110]
[0129] All definitions defined and used herein should be understood to take precedence over dictionary definitions, definitions incorporated by reference within documents, and / or the ordinary meanings of the defined terms.
[0111]
[0130] As used herein, “module” may be any assembly and / or set of operablely coupled electrical components relating to the performance of a particular function, and may include, for example, memory, processors, electrical traces, optical connectors, software (stored and executed in hardware), etc.
[0112]
[0131] As used herein and in the claims, the indefinite articles "a" and "an" should be understood to mean "at least one" unless otherwise explicitly indicated.
[0113]
[0132] When used herein and in the claims, the phrase "and / or" should be understood to mean "either or both" of the elements thus connected; that is, elements that exist conjunctively in some cases and disjunctively in others. Multiple elements listed in "and / or" should be interpreted similarly, that is, "one or more" of the elements thus connected. Other elements other than those specifically identified by the "and / or" phrase may exist at their discretion, whether related to those specifically identified elements or not. Thus, as a non-restrictive example, when used in conjunction with open-ended phrases such as "including," a reference to "A and / or B" may, for example, represent only A (including elements other than B at their discretion) in one embodiment; only B (including elements other than A at their discretion) in another embodiment; and both A and B (including other elements at their discretion) in yet another embodiment.
[0114]
[0133] When used herein and in the claims, “or” should be understood to have the same meaning as “and / or” as defined above. For example, when separating elements in a list, “or” or “and / or” shall be interpreted as inclusive; that is, including at least one (or more) of several elements or lists of elements, and optionally any additional items not on the list. Only terms that are explicitly indicated, such as “one of” or “exactly one of” or “consisting of” when used in the claims, indicate that the list contains exactly one element from several elements or lists of elements. In general, when used herein, the term “or” shall be interpreted only as indicating an exclusive choice (i.e., “one or the other, but not both”) when accompanied by an exclusive word such as “either,” “one of,” “one of,” or “exactly one of.” When used in the claims, “consisting of” shall have its usual meaning as used in patent law.
[0115]
[0134] When used herein and in the claims, the phrase “at least one” referring to a list of one or more elements means at least one element selected from any one or more elements in the list of elements, but not necessarily including at least one of every element specifically listed in the list of elements, and not excluding any combination of elements in the list of elements. Furthermore, by this definition, elements other than those specifically identified in the list of elements represented by the phrase “at least one” may be present at will, regardless of whether they are related to the specifically identified elements or not. Therefore, as a non-restrictive example, “at least one of A and B” (or equivalently “at least one of A or B” or equivalently “at least one of A and / or B”) can, for example, in one embodiment include at least one optionally two or more A's and no B (and optionally include elements other than B); in another embodiment include at least one optionally two or more B's and no A (and optionally include elements other than A); and in yet another embodiment, at least one optionally two or more A's and at least one optionally two or more B's (and optionally include other elements).
[0116]
[0135] In the claims and the above specification, all transitional phrases such as “include,” “equip,” “possess,” “have,” “include,” “involve,” “hold,” and “constitute” should be understood as open-ended terms, that is, to mean include but not limit. Only the transitional phrases “consist of” and “essentially consist of” are closed-ended or semi-closed transitional phrases, as stated in Section 2111.03 of the U.S. Patent and Trademark Office's Patent Examination Manual.
Claims
1. A device comprising an integrated circuit, wherein the integrated circuit is Multiple sources, including qubit sources and cluster sources, It includes a plurality of control Z gates, and each control Z gate from the plurality of control Z gates connects at least two sources from the plurality of sources, The integrated circuit is configured to sequentially energize a subset of sources from the plurality of sources during operation and generate a Raussendorf grid based on the interactions between the sources from the plurality of sources. Device.
2. The apparatus according to claim 1, wherein each of the control Z gates from the plurality of control Z gates is a 2-qubit gate.
3. The apparatus according to claim 1, wherein the cluster source is a 1D cluster source.
4. The apparatus according to claim 1, wherein during the operation of the integrated circuit, a qubit emitted from the qubit source is entangled with a qubit emitted from at least one spatially adjacent qubit source of the qubit source.
5. Multiple optical circuits configured to generate light having multiple output states by Gaussian boson sampling (GBS), A plurality of photon number resolution detectors (PNRs) operably coupled to the plurality of optical circuits, wherein the plurality of photon number resolution detectors (PNRs) are configured to generate qubit clusters based on the plurality of output states, A multiplexer operably coupled to the plurality of PNRs, configured to perform multiplexing of the qubit clusters and replace empty modes with squeezed vacuum states, thereby generating light having a plurality of hybrid resource states, An integrated circuit operably coupled to the multiplexer, configured to entangle hybrid resource states from the plurality of hybrid resource states into a high-dimensional cluster state including a state for fault-tolerant quantum computation. A system equipped with these features.
6. The system according to claim 5, wherein the integrated circuit is configured to entangle the hybrid resource states from the plurality of hybrid resource states into the high-dimensional cluster state without using a reconfigurable linear optical system.
7. The system according to claim 5, wherein the higher-dimensional cluster state includes a three-dimensional macronode lattice structure in one time dimension and two spatial dimensions.
8. The system according to claim 5, wherein the higher-dimensional cluster state includes a three-dimensional lattice structure, and each site from a plurality of sites of the lattice structure includes at least four modes.
9. A device comprising an integrated circuit, wherein the integrated circuit is Multiple multimode sources, The system includes a plurality of beam splitters operably coupled to the plurality of multimode sources, each beam splitter from the plurality of beam splitters connecting at least two multimode sources from the plurality of multimode sources, The integrated circuit is configured to sequentially energize a subset of multimode sources from the plurality of multimode sources during operation, and to generate a Raussendorf lattice based on the interaction between the multimode sources from the plurality of multimode sources and at least one homodyne measurement. Device.
10. The apparatus according to claim 9, wherein the Raussendorf lattice comprises a first layer containing a set of first type qubits and a second layer containing a set of second type qubits different from the first type.
11. The apparatus according to claim 9, wherein during the operation of the integrated circuit, qubits emitted from the plurality of multimode sources are entangled with qubits emitted from at least one spatially adjacent multimode source of the plurality of multimode sources.
12. The apparatus according to claim 11, wherein the qubits emitted from the plurality of multimode sources are further entangled with previously emitted modes and subsequently emitted modes.
13. Receiving the input vector for homodyne measurement and the noise model, Based on the input vector and noise model of the homodyne measurement, identify at least one direction having a noise level exceeding a predetermined threshold. Based on the identified at least one direction, a basis change is performed on the input vector of the homodyne measurement to generate a first modified vector. Applying a transformation including binning and rounding operations to the first modified vector generates a second modified vector. Based on the second modified vector, the base change is reversed to return candidate grid points, and Based on the candidate lattice points, generate a binary sequence representing the interpreted qubit measurement result. A method that includes this.
14. The method according to claim 13, wherein the binning operation is based on a map from homodyne measurement results to bit values.
15. The method according to claim 13, wherein the basis change is performed using a transformation matrix.
16. The aforementioned rounding operation, [Math 1] The method according to claim 13, including rounding to an integer multiple.
17. Receiving the input vector for homodyne measurement, Performing a basis change on the input vector of the homodyne measurement to generate a first modified vector, Applying a transformation including binning and rounding operations to the first modified vector generates a second modified vector. Based on the second modified vector, the base change is reversed, and a third modified vector is returned. To modify the half-integer components of the third modified vector to generate a fourth modified vector n, Take n mod 2 = s and generate a sequence of bit values s. A method that includes this.
18. The method according to claim 17, wherein the binning operation is based on a map from homodyne measurement results to bit values.
19. The method according to claim 17, wherein the basis change is performed using a transformation matrix.
20. The aforementioned rounding operation, [Math 2] The method according to claim 17, including rounding to an integer multiple.