Indication device

Abstract

To provide a semiconductor device with a high aperture ratio. [Solution] The transistor has a capacitive element having a pair of electrodes, and the transistor The channel formation region and one electrode of the capacitive element are formed on the same insulating surface. The oxide semiconductor layer is the other electrode of the capacitive element, and the other electrode of the capacitive element is a translucent conductive film. The electrode on one side is an insulating surface on which the source electrode or drain electrode included in the transistor is formed. The wiring, formed on the same insulating surface as the surface, is in electrical contact with the other electrode of the capacitive element, which is a transistor It is electrically connected to either the source electrode or the drain electrode contained in the zista.

Description

[Technical Field]

[0001] This invention relates to a product, a method, or a method of manufacturing; or to a process, a machine , relating to manufacture or composition of matter. In particular The present invention relates, for example, to semiconductor devices, display devices, light-emitting devices, methods for driving them, or the The present invention relates to a method for producing these. In particular, the present invention relates to a semiconductor device having an oxide semiconductor, for example, The present invention relates to a display device, or a light-emitting device, and a method for manufacturing the same. [Background technology]

[0002] In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widely popular. In display devices such as flat panel displays, the row and column directions are arranged. Within the installed pixel, there is a transistor which is a switching element, and the transistor and electricity A liquid crystal element is provided, and a capacitive element is provided, connected in parallel with the liquid crystal element. ru.

[0003] The semiconductor material constituting the semiconductor film of the transistor is amorphous (non-crystalline). Silicon semiconductors such as polycrystalline silicon or polycon are commonly used.

[0004] Furthermore, metal oxides exhibiting semiconductor properties (hereinafter referred to as oxide semiconductors) are used in the semiconductor semiconductors of transistors. It is a semiconductor material that can be applied to conductive films. For example, zinc oxide or In-Ga-Zn based oxide. A technique for fabricating transistors using semiconductor materials has been disclosed (Patent Document 1 and Patent Document 2). (See Document 2). [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Overview of the project] [Problems that the invention aims to solve]

[0006] A capacitive element has a dielectric film between a pair of electrodes, and of the pair of electrodes, at least One electrode is a gate electrode, source electrode, or drain electrode that make up a transistor. Because it is formed from the same material, it is formed from a conductive film with light-shielding properties such as metal. many.

[0007] Furthermore, the larger the capacitance value of the capacitive element, the more the liquid crystal of the liquid crystal element changes when an electric field is applied. This allows for a longer period during which the molecular orientation can be kept constant. (Display a still image.) In a display device capable of doing so, being able to extend the said period means rewriting the image data. This can reduce the number of cycles and is expected to lower power consumption.

[0008] To increase the charge capacitance of a capacitive element, the area occupied by the capacitive element within the pixel must be increased. Specifically, one method is to increase the area over which the pair of electrodes overlap. However, in the above-mentioned display device, in order to increase the area over which the pair of electrodes overlap, light shielding is used. Increasing the area of ​​the conductive film with properties reduces the aperture ratio of the pixels, thus degrading the display quality of the image. do.

[0009] Therefore, in view of the above problems, one aspect of the present invention provides a semiconductor device with a high aperture ratio. One of the objectives is to have a capacitive element capable of increasing charge capacitance. One of the objectives is to provide semiconductor devices, etc. Alternatively, the photolithography process One of the objectives is to provide semiconductor devices and other equipment that can reduce the number of masks required. Alternatively, one of the objectives is to provide semiconductor devices with low off-current. One of the objectives is to provide semiconductor devices with reduced power consumption. Alternatively, transparent semi-transparent semiconductor devices. One of the objectives is to provide semiconductor devices using a conductive layer, or to provide high reliability. One of the objectives is to provide semiconductor devices that are easy on the eyes. One of the objectives is to provide the following: or to provide novel semiconductor devices, etc. One of the objectives is to provide a novel method for manufacturing semiconductor devices, etc. Let's make it one.

[0010] Furthermore, the description of these problems does not preclude the existence of other problems. The approach does not need to solve all of these problems. This will become clear from the description in the specification, drawings, claims, etc., and the specification, drawings It is possible to extract other issues from the descriptions in the surfaces, claims, etc. [Means for solving the problem]

[0011] One aspect of the present invention involves using an oxide semiconductor layer as one electrode and a translucent conductive film as the other electrode. This invention relates to a semiconductor device that includes a light-transmitting capacitive element.

[0012] One aspect of the present invention is a semiconductor device having a transistor, wherein a first insulating film is formed on the A first oxide semiconductor layer and a second oxide semiconductor layer are provided, and the first oxide semiconductor layer and electrical A source electrode layer and a drain electrode layer are electrically connected to a second oxide semiconductor layer. Connected wiring, first insulating film, first oxide semiconductor layer, second oxide semiconductor layer, saw A second insulating film formed on the drain electrode layer, the drain electrode layer, and the wiring, and the second insulating film A gate electrode layer overlapping with the first oxide semiconductor layer, a second insulating film, and a gate electrode layer. A third insulating film formed in layers, a fourth insulating film formed on the third insulating film, and a second The dielectric material comprises a transparent conductive film formed on a fourth insulating film on an oxide semiconductor layer, The material includes a body, with at least a portion of the second oxide semiconductor layer serving as the first electrode, and a small portion of the transparent conductive film. This semiconductor device is characterized by having a capacitive element in which at least a portion of the electrode is used as a second electrode.

[0013] It is preferable that the first oxide semiconductor layer and the second oxide semiconductor layer are formed from the same material. It seems so.

[0014] Furthermore, the first oxide semiconductor layer and the second oxide semiconductor layer have an energy gap of 2. It is preferable that the voltage is 0 eV or higher.

[0015] The second oxide semiconductor layer contains hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, and One or more dopants selected from zinc, tin, antimony, and noble gas elements are added. It's okay if it's not allowed.

[0016] The dielectric can be formed from a second insulating film, a third insulating film, and a fourth insulating film.

[0017] Alternatively, the dielectric may be formed with a third insulating film and a fourth insulating film.

[0018] Alternatively, the dielectric may be formed with a fourth insulating film.

[0019] Furthermore, the third insulating film consists of silicon oxide, silicon oxide nitride, aluminum oxide, and HA5 oxide. A single layer of oxide insulating material selected from nium, gallium oxide, or Ga-Zn-based metal oxides. It is preferable to form it with a single-layer or laminated structure.

[0020] Furthermore, the fourth insulating film is silicon nitride oxide, silicon nitride, aluminum nitride, silicon nitride oxide It is preferable to form a single-layer or multi-layer structure of a nitride insulating material selected from aluminum. It's nice.

[0021] Furthermore, a hydrogen-containing nitride insulating film is formed between the first insulating film and the second oxide semiconductor layer. It's okay to be there.

[0022] Furthermore, the source electrode layer, drain electrode layer, and wiring are formed on the same insulating surface. It can be done this way.

[0023] Furthermore, the source electrode layer, drain electrode layer, and wiring are formed from the same material. It is possible.

[0024] Furthermore, the translucent conductive film is electrically connected to either the source electrode or the drain electrode. It can be considered a success.

[0025] Another aspect of the present invention is a first oxide semiconductor layer and a second oxide semiconductor layer on a first insulating film. A source electrode layer and a drain are formed to form a material semiconductor layer and electrically connect to the first oxide semiconductor layer. An in electrode layer and wiring that electrically connects to the second oxide semiconductor layer are formed, and the first insulating film, first oxide semiconductor layer, second oxide semiconductor layer, source electrode layer, drain electrode layer , and a second insulating film is formed on the wiring, and the first oxide semiconductor layer is superimposed on the second insulating film. A gate electrode layer is formed, and a second insulating film and a third insulating film are formed on the gate electrode layer. , a fourth insulating film is formed on the third insulating film, the second insulating film, the third insulating film, and the fourth An opening is formed in the insulating film that leads to the source electrode layer or the drain electrode layer, and on the fourth insulating film A translucent conductive film is formed at the opening that electrically connects to the source electrode layer or drain electrode layer. A transistor and at least a portion of a second oxide semiconductor layer as the first electrode, the second electrode To form a capacitive element having at least a portion of a translucent conductive film and a dielectric layer. This is a method for fabricating semiconductor devices that are characterized by their design.

[0026] It is preferable that the first oxide semiconductor layer and the second oxide semiconductor layer be formed from the same material. .

[0027] Furthermore, the first oxide semiconductor layer and the second oxide semiconductor layer have an energy gap of 2. It is preferable to form it with a material with a voltage of 0 eV or higher.

[0028] Furthermore, the second oxide semiconductor layer contains hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, and arsenic. , one or more dopants selected from indium, tin, antimony, and noble gas elements It may be added.

[0029] The dielectric can be formed from a second insulating film, a third insulating film, and a fourth insulating film.

[0030] Furthermore, the second insulating film on the second oxide semiconductor layer is etched, and the dielectric is made into the third insulating film. It may also be formed with a fourth insulating film.

[0031] Furthermore, the second insulating film and the third insulating film on the second oxide semiconductor layer are etched, The body may be formed with a fourth insulating film.

[0032] Furthermore, the third insulating film is made of silicon oxide, silicon oxide nitride, aluminum oxide, and HA5 oxide. A single layer of oxide insulating material selected from nium, gallium oxide, or Ga-Zn-based metal oxides. It is preferable to form it with a single-layer or laminated structure.

[0033] Furthermore, the fourth insulating film is silicon nitride, silicon nitride, aluminum nitride, silicon nitride It is preferable to form a single-layer or multi-layer structure of a nitride insulating material selected from aluminum. It's nice.

[0034] Furthermore, even if a hydrogen-containing nitride insulating film is formed between the first insulating film and the second oxide semiconductor layer, good.

[0035] Furthermore, it is preferable to form the source electrode layer, drain electrode layer, and wiring from the same material. .

[0036] Furthermore, the source electrode layer, the drain electrode layer, and the wiring are formed on the same insulating surface. It is preferable to do so. [Effects of the Invention]

[0037] According to one aspect of the present invention, a semiconductor device with a high aperture ratio can be provided. Alternatively, This allows us to provide semiconductor devices and the like that have capacitive elements capable of increasing charge capacity. Alternatively, a semiconductor device that can reduce the number of masks in the photolithography process. It can provide such as, or it can provide semiconductor devices with low off-current. It is possible to provide semiconductor devices with reduced power consumption. Alternatively, transparent We can provide semiconductor devices using a bright semiconductor layer, or a highly reliable semiconductor... We can provide conductive devices, etc. Or, we can provide semiconductor devices that are easy on the eyes. This can be done. Or, a method for manufacturing semiconductor devices can be provided. [Brief explanation of the drawing]

[0038] [Figure 1] A top view illustrating a semiconductor device. [Figure 2] A cross-sectional view illustrating a semiconductor device. [Figure 3] A diagram illustrating a semiconductor device. [Figure 4] A circuit diagram illustrating the pixels of a semiconductor device. [Figure 5] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 6] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 7] A cross-sectional diagram illustrating the capacitive elements of a semiconductor device. [Figure 8] A cross-sectional view illustrating a semiconductor device. [Figure 9] A cross-sectional view illustrating a semiconductor device. [Figure 10] A diagram showing the micro-electron diffraction pattern of an oxide semiconductor film. [Figure 11] A figure showing the results of CPM measurement of an oxide semiconductor film. [Figure 12] This figure shows the CPM measurement results for CAAC-OS membranes. [Figure 13] Cross-sectional TEM image and micro-electron diffraction pattern of an oxide semiconductor film. [Figure 14] Planar TEM image and selected-field electron diffraction pattern of an oxide semiconductor film. [Figure 15] Conceptual diagram of electron diffraction intensity distribution. [Figure 16] Micro-electron diffraction pattern of a quartz glass substrate. [Figure 17] Micro-electron diffraction pattern of an oxide semiconductor film. [Figure 18]Cross-sectional TEM image of an oxide semiconductor film. [Figure 19] X-ray diffraction analysis results of an oxide semiconductor film. [Figure 20] Cross-sectional TEM image of a CAAC-OS film. [Figure 21] Electron diffraction pattern of CAAC-OS film. [Figure 22] Cross-sectional TEM image of a CAAC-OS film. [Figure 23] Cross-sectional TEM image and X-ray diffraction spectrum of the CAAC-OS film. [Figure 24] Electron diffraction pattern of CAAC-OS film. [Figure 25] Cross-sectional TEM image and X-ray diffraction spectrum of the CAAC-OS film. [Figure 26] Electron diffraction pattern of CAAC-OS film. [Figure 27] Cross-sectional TEM image and X-ray diffraction spectrum of the CAAC-OS film. [Figure 28] Electron diffraction pattern of CAAC-OS film. [Figure 29] A top view illustrating a semiconductor device. [Figure 30] A cross-sectional view illustrating a semiconductor device. [Figure 31] Cross-sectional and top views illustrating a semiconductor device. [Figure 32] A block diagram illustrating the configuration of an information processing device with a display function. [Figure 33] A block diagram and circuit diagram illustrating the configuration of the display unit of an information processing device. [Figure 34] A block diagram illustrating the configuration of an information processing device and a schematic diagram illustrating image data. [Figure 35] A diagram illustrating the effects of an information processing device. [Figure 36] A block diagram illustrating an information processing device. [Figure 37] A diagram illustrating electronic devices using semiconductor devices. [Figure 38] A diagram illustrating electronic devices using semiconductor devices. [Figure 39]A diagram illustrating electronic devices using semiconductor devices. [Modes for carrying out the invention]

[0039] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is... Not limited to the following description, the form and details can be modified in various ways, as any person skilled in the art would know. This is easily understood. Furthermore, the present invention shall be interpreted as being limited to the contents of the embodiments described below. It's not something that can be done.

[0040] In the configuration of the present invention described below, the same part or part having a similar function is the same The same symbols are used consistently across different drawings, and explanations of their repetition are omitted. When referring to a part that has a function, the hatch pattern is the same, and no special symbol is assigned. be.

[0041] In each figure described herein, the size of each component, the thickness of the film, or the area are for clarity. Therefore, it may be exaggerated. Thus, it is not necessarily limited to that scale.

[0042] In this specification and elsewhere, the ordinal numbers used as "1st," "2nd," etc., are for convenience only. This does not indicate the order of processes or layering. Furthermore, in order to specify the invention in this specification, etc. This does not indicate a specific name as a matter of fact.

[0043] Furthermore, voltage refers to the potential difference between two points, while electric potential refers to the potential difference between two points in an electrostatic field at a given point. It refers to the electrostatic energy (electrical potential energy) possessed by a unit charge within it. Generally, the potential difference between the potential at a certain point and a reference potential (e.g., ground potential) This phenomenon is simply called electric potential or voltage, and the terms electric potential and voltage are often used interchangeably. Therefore, unless otherwise specified in this specification, potential may be read as voltage, Voltage may be interpreted as electric potential.

[0044] In this specification, when etching is performed after photolithography, The resist mask formed by photolithography should be removed.

[0045] (Embodiment 1) In this embodiment, a semiconductor device, which is one aspect of the present invention, will be described with reference to the drawings. In this embodiment, a semiconductor device, which is one aspect of the present invention, will be described using a liquid crystal display device as an example. It is clarified that a semiconductor device according to one aspect of the present invention can also be applied to other display devices. Cut.

[0046] Figure 3 is a diagram illustrating a semiconductor device according to one aspect of the present invention. The semiconductor device shown in Figure 3 is The base unit 100, the first drive circuit 104, and the second drive circuit 106 are each parallel or approximately m scan lines 10 are arranged in parallel and their potential is controlled by the first drive circuit 104. 7 and each is arranged in parallel or approximately parallel, and the potential is controlled by the second drive circuit 106. It has n signal lines 109 that are controlled, and furthermore, the pixel section 100 is arranged in a matrix. It has multiple pixels 101. The semiconductor device also has capacitance lines 115 (shown in Figure 3). The capacitance lines 115 are arranged parallel or substantially parallel to each other along the scan lines 107. Alternatively, they are arranged parallel or nearly parallel to each other along signal line 109.

[0047] Each scan line 107 is one of the pixels 101 arranged in m rows and n columns in the pixel section 100. It is electrically connected to n pixels 101 arranged in any row. Also, each signal line 109 m pixels 101, among the m pixels 101 arranged in m rows and n columns, located in any of the columns. It is electrically connected to m and n, both of which are integers greater than or equal to 1. Also, each capacitance line 115 is , n pixels 101 located in any row out of the m rows and n columns of pixels 101 They are electrically connected. Furthermore, the capacitance line 115 runs parallel to the signal line 109, and each is parallel to the other. If they are arranged in roughly parallel directions, then any of the pixels 101 arranged in m rows and n columns The m pixels 101 arranged in a row are electrically connected.

[0048] The first drive circuit 104 switches the transistor connected to the scan line 107. It can have the function of supplying signals, for example, as a scan line driving circuit. Furthermore, the second drive circuit 106 supplies the video signal to the transistor connected to the signal line 109. It can have a supply function, for example, a function as a signal line drive circuit. In addition, the first drive circuit 104 and the second drive circuit 106 may supply other signals. It is also possible.

[0049] Furthermore, in this embodiment, since a liquid crystal display device is used as an example, for convenience, the first drive cycle The wiring connected to path 104 is referred to as scan line 107 and capacitance line 115, and the second drive circuit 106 The wiring connected to it is called signal line 109, but this name does not limit its function. do not have.

[0050] Figure 1 is a top view illustrating an example configuration of a pixel 101 included in the above semiconductor device. In Figure 1, one of the pair of electrodes in the liquid crystal layer and liquid crystal element is omitted. .

[0051] In the pixel 101 shown in Figure 1, the scan line 107 is in a direction approximately perpendicular to the signal line 109 (direction It is provided extending in the direction (towards). The signal line 109 is in a direction (towards the row) that is approximately perpendicular to the scan line 107. It is provided extending in the direction of the signal line 109. The capacity line 115 is provided extending in a direction parallel to the signal line 109. It is connected. Furthermore, scan line 107 is electrically connected to the first drive circuit 104 (see Figure 3). The signal line 109 is electrically connected to the second drive circuit 106 (see Figure 3). It is.

[0052] Transistor 103 is provided near the region where scan line 107 and signal line 109 intersect. The transistor 103 has at least a semiconductor film 111 having a channel formation region. It includes a gate electrode, a gate insulating film (not shown in Figure 1), a source electrode, and a drain electrode. Hmm. Note that in scan line 107, the region that overlaps with the semiconductor film 111 is transistor 103. It functions as a gate electrode. In signal line 109, the region that overlaps with the semiconductor film 111 is The conductive film 11 functions as either the source electrode or the drain electrode of transistor 103. In 3, the region superimposed on the semiconductor film 111 is the source electrode or of the transistor 103. It functions as the other side of the rain electrode. Therefore, the gate electrode, source electrode, and drain electrode are These may be referred to as scan line 107, signal line 109, and conductive film 113, respectively. Also, in Figure 1... In this configuration, the scan line 107 has an end that is located outside the end of the semiconductor film 111 in the upper surface shape. Therefore, scan line 107 functions as a light-shielding film that blocks light from the outside. As a result, When light is not irradiated onto the semiconductor film 111 contained in the transistor, the electrical characteristics of the transistor change. It can suppress movement.

[0053] Furthermore, in one aspect of the present invention, it is preferable to use an oxide semiconductor for the semiconductor film 111. Transistors using semiconductor materials can have extremely low off-currents when fabricated under appropriate conditions. This can be done. Therefore, the power consumption of semiconductor devices can be reduced.

[0054] In one embodiment of the present invention, the transistor using an oxide semiconductor is an n-channel type transistor. It is a ta. Also, oxygen vacancies contained in oxide semiconductors can generate carriers, This may degrade the electrical characteristics and reliability of the transistor. For example, the transistor The critical voltage fluctuates in the negative direction, and drain current flows when the gate voltage is 0V. This can happen. For example, drain current can flow when the gate voltage is 0V. This is called the normally-on characteristic. Note that when the gate voltage is 0V, drain current flows. A transistor that can be considered as not existing is called a normally-off transistor.

[0055] Therefore, when using an oxide semiconductor for the semiconductor film 111, the oxide semiconductor is the semiconductor film 111. Defects in body membranes (typically oxygen deficiencies) should be minimized as much as possible. For example, the g-value is 1 when the direction of the magnetic field is applied parallel to the film surface using electron spin resonance. A spin density of 0.93 (corresponding to the defect density contained in the oxide semiconductor film) is detected by the measuring instrument. It is preferable that the defects contained in the oxide semiconductor film be reduced to below the lower limit. By reducing this, the normally-on characteristics of transistor 103 are suppressed. This allows for improvements in the electrical characteristics and reliability of semiconductor devices.

[0056] Variation of the threshold voltage of the transistor in the negative direction is not only caused by oxygen deficiency but also by hydrogen contained in the oxide semiconductor (including hydrogen compounds such as water). A part of the hydrogen contained in the oxide semiconductor contributes to the formation of donor levels and generates electrons as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics.

[0057] Therefore, when an oxide semiconductor is used for the semiconductor film 111, it is preferable that the hydrogen in the oxide semiconductor film that is the semiconductor film 111 is reduced as much as possible. Specifically, the hydrogen concentration obtained by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry) is less than 5×10 18 atoms / cm 3 , preferably less than 1×10 18 atoms / cm 3 or less, more preferably less than 5×10 17 atoms / cm 3 or less, and even more preferably less than 1×10 16 atoms / cm 3 or less. The semiconductor film 11 1 is formed so as to have a region satisfying the above requirements.

[0058] In addition, the semiconductor film 111 is preferably formed so as to have a region where the concentration of alkali metal or alkaline earth metal obtained by secondary ion mass spectrometry is less than 1×10 18 atoms / cm 3 , preferably less than 2×10 16 atoms / cm 3 or less. When combined with the oxide semiconductor, alkali metals and alkaline earth metals may generate carriers, and ​​​​This may increase the off-current of transistor 103.

[0059] Furthermore, if the oxide semiconductor film 111 contains nitrogen, the carriers will be As offspring are produced, the carrier density increases, and it becomes easier for it to become n-type. As a result, nitrogen is present in the oxidation. Transistors using solid semiconductors tend to exhibit normally-on characteristics. Therefore, the acid In a semiconductor film, it is preferable that nitrogen is reduced as much as possible, for example, nitrogen The concentration is 5 × 10 18 atoms / cm 3 The semiconductor film 111 has the following region It is preferable to form [this].

[0060] In this way, impurities (such as hydrogen, nitrogen, alkali metals, or alkaline earth metals) can be produced. By using an oxide semiconductor film with reduced and highly purified properties as the semiconductor film 111, transient This suppresses the normally-on characteristics of transistor 103, and reduces the off-current of transistor 103. This can be significantly reduced. Therefore, semiconductor devices with good electrical characteristics can be fabricated. Yes, it is possible. Furthermore, it allows for the creation of semiconductor devices with improved reliability.

[0061] Furthermore, the low off-current of transistors using highly purified oxide semiconductor films is a positive sign. This can be proven through various experiments. For example, if the channel width is 1 × 10⁻⁶ 6 The channel length L in μm is Even with a 10μm element, the voltage between the source electrode and the drain electrode (drain voltage) is 1V In the range of 10V, the off-current is below the measurement limit of the semiconductor parameter analyzer. That is, 1 × 10 -13 A characteristic of A or less can be obtained. In this case, the transistor The off-current, which corresponds to the value obtained by dividing by the channel width, is found to be 100 Hz A / μm or less. Also, by connecting a capacitive element and a transistor, current flows into the capacitive element or out of the capacitive element. The off-current was measured using a circuit that controls the outflowing charge with the transistor in question. In this measurement, a highly purified oxide semiconductor film is used in the channel formation region of the transistor. The off-current of the transistor is measured from the change in the amount of charge per unit time of the capacitive element. As a result, when the voltage between the source and drain electrodes of the transistor is 3V, tens of It was found that an extremely low off-current of yA / μm could be obtained. Therefore, high purity Transistors using modified oxide semiconductor films exhibit remarkably low off-current. can.

[0062] In Figure 1, the conductive film 113 is formed of a conductive film that is translucent through the opening 117. It is electrically connected to the pixel electrode 121, which is one of the electrodes of the liquid crystal element.

[0063] Capacitive element 105 has a semiconductor film 119 made of a translucent oxide semiconductor that is connected to one side of the electrode. One electrode is used as the pole, and the other electrode is a light-transmitting pixel electrode 121, which is included in the transistor 103. The dielectric film is composed of a light-transmitting insulating film (not shown in Figure 1). Furthermore, the capacitive element 105 is light-transmitting. Also, the semiconductor film is one of the electrodes of the capacitive element 105. Line 119 is electrically connected to the capacitance line 115.

[0064] Thus, because the capacitive element 105 is light-transmitting, light also passes through the region where it is superimposed with the liquid crystal element. It can transmit light. Therefore, the capacitive element 105 can be made larger within the pixel 101 (large surface Even when formed in a series, it is possible to achieve a high aperture ratio, for example, 55% or more, or even 60% or more. This results in a semiconductor device with increased charge capacitance in the capacitive element.

[0065] For example, in a high-resolution liquid crystal display, the area of ​​the entire pixel is reduced, but the capacitance element In this case, the necessary charge capacity must be secured, and there is a limit to how much the area can be reduced. Therefore, in high-resolution liquid crystal display devices, the aperture ratio becomes smaller. Since the capacitive element 105 shown in the embodiment is light-transmitting, the capacitive element is provided in the pixel. This allows for obtaining sufficient charge capacitance in each pixel while increasing the aperture ratio. Typically, high-resolution liquid crystal display with a pixel density of 200 ppi or more, and even 300 ppi or more. It is preferable to use it in place. Furthermore, one aspect of the present invention can increase the aperture ratio. Therefore, it is possible to efficiently utilize the light from light sources such as backlights, and the power consumption of the display device is reduced. It can be reduced.

[0066] Next, the dotted lines A1-A2, B1-B2, and C1-C2 shown in Figure 1 Cross-sectional view between the two, and a cross-sectional view of the transistor used in the first drive circuit 104 shown in Figure 3. This is shown in Figure 2. Note that the top view of the first drive circuit 104 is omitted, and in Figure 2... A cross-sectional view of the first drive circuit 104 is shown as D1-D2. The transistor used in this circuit can also be used in the second drive circuit 106.

[0067] First, between the dashed lines A1-A2, between the dashed lines B1-B2, and between the dashed lines of pixel 101. The cross-sectional structure between C1 and C2 will be described.

[0068] A base insulating film 110 is provided on the substrate 102, and a semiconductor film 111 is placed on the base insulating film. A conductive film 119 is provided. The source power of the transistor 103 is on the semiconductor film 111. Signal line 109 including either the pole or drain electrode, and source power of transistor 103 A conductive film 113 is provided, including the other of the electrode or drain electrode, and on the semiconductor film 119, A quantity line 115 is provided. Semiconductor film 111, semiconductor film 119, signal line 109, conductive film 113, A gate insulating film 127 is provided on the capacitance line 115, and the gate insulating film A scan line 107 is provided on the region that overlaps with the semiconductor film 111. Gate insulating film 12 On 7, on signal line 109, on semiconductor film 111, on conductive film 113, and on semiconductor film 119, Insulating film 129, insulating film 131, and insulating film that function as protective insulating films for the transistor 103 A film 132 is provided. The insulating film 129, insulating film 131, and insulating film 132 are conductive An opening 117 (see Figure 1) that reaches the film 113 is provided, and a pixel is provided so as to cover the opening. An electrode 121 (see Figure 1) is provided.

[0069] In this embodiment, the capacitive element 105 has one of its pair of electrodes that is coated with an underlayer insulating film 110 The semiconductor film 119 is formed similarly to the semiconductor film 111 above, and of the pair of electrodes The other electrode is the pixel electrode 121, and the dielectric film provided between the pair of electrodes is the insulating film 12 9. Insulating film 131 and insulating film 132.

[0070] Furthermore, the semiconductor film 119 may have a dopant added to it. In the case of semiconductors, for example, hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, One or more dopants selected from indium, tin, antimony, and noble gas elements are added. By adding this, the oxide semiconductor layer can be made n-type, thereby increasing its conductivity. The semiconductor film 119 can also be described as a conductive film, and can be used as one of the electrodes of a capacitive element. It is possible.

[0071] Furthermore, the semiconductor film 119, which acts as a conductive film, has a higher hydrogen concentration than the semiconductor film 111. This is preferable. In the semiconductor film 119, secondary ion mass spectrometry (SIMS: Second The hydrogen concentration obtained by (ary Ion Mass Spectrometry) is 8 ×10 19 atoms / cm 3 Preferably 1 × 10 20 atoms / cm 3 That's all. Comfortable 5x10 20 atoms / cm 3 That concludes the explanation. In the semiconductor film 111, The hydrogen concentration obtained by secondary ion mass spectrometry is 5 × 10⁻⁶ 19 atoms / cm 3 below Preferably 5 × 10 18 atoms / cm 3 More preferably 1 × 10 18 ato ms / cm 3 The following is more preferable: 5 x 10 17 atoms / cm 3 The following are even more preferable ku is 1 x 10 16 atoms / cm 3 The following applies:

[0072] Furthermore, the semiconductor film 119, which acts as a conductive film, has a lower resistivity than the semiconductor film 111. The resistivity of the body membrane 119 is 1 × 10⁻⁶ of the resistivity of the semiconductor film 111. ―8 1×10 times more ―1 more than twice It is preferable that it be lower, typically 1 × 10 ―3 Ωcm or more, 1 × 10 4 Less than Ωcm, More preferably, the resistivity is 1 × 10 ―3 Ωcm or more, 1 × 10 ―1 It is preferable that it be less than Ωcm. .

[0073] Note that the semiconductor film 119 uses a different material than the semiconductor film 111 or the semiconductor film 231. It is also possible to form it by doing so. In other words, the semiconductor film 119 is the semiconductor film 111 or the semiconductor film 119. It is also possible to form the conductive film 231 using a different process.

[0074] Furthermore, a semiconductor film is formed in the same manner as the semiconductor film 119, and a resistive element is constructed using this semiconductor film. It is also possible to do so. Furthermore, it is possible to use that resistive element to construct a protection circuit. It is possible. By providing a protective circuit, damage from static electricity and other sources can be reduced. .

[0075] Next, the structure of the transistor provided in the first drive circuit 104 will be described.

[0076] A conductive film 241 is provided on the substrate 102, and an underlayer insulating film is provided on the substrate and on the conductive film. A 110 is provided. In the region where the conductive film 241 on the underlying insulating film 110 overlaps, a semiconductor film is provided. A body film 231 is provided. The source electrode of the transistor 223 is located on the semiconductor film 231. Or wiring 229 including one of the drain electrodes, and source electrode of transistor 223 A wiring 233 is provided, including the other side of the drain electrode. Semiconductor film 231, wiring 22 9. A gate insulating film 127 is provided on the wiring 233, and the semiconductor of the gate insulating film A gate electrode 227 is provided on the region that overlaps with the body film 231. Gate insulating film 127 Above, on the gate electrode 227, there is an insulating film 1 which functions as a protective insulating film for transistor 223. 29, an insulating film 131, and an insulating film 132 are provided. The transistor provided in 4 may be configured without the conductive film 241.

[0077] In transistor 223, the conductive material overlaps with the gate electrode 227 via the semiconductor film 231. By providing the film 241, the rising gate current of the on-current is controlled at different drain voltages. Pressure variations can be reduced. Also, the semiconductor film 231 facing the conductive film 241 In terms of surface, it is possible to control the current flowing between wiring 229 and wiring 233. This reduces variations in electrical characteristics between transistors. Also, conductive film 2 By providing 41, the influence of changes in the surrounding electric field on the semiconductor film 231 is reduced, The reliability of the zista can be improved. Furthermore, the potential of the conductive film 241 can be controlled in the drive circuit. The lowest potential (Vss, for example, the potential of wiring 229 if the potential of wiring 229 is used as the reference) and By setting the potential to the same or an equivalent potential, fluctuations in the transistor's threshold voltage are reduced. This makes it possible to improve the reliability of transistors.

[0078] Furthermore, the insulating film provided on the gate insulating film 127, the scan line 107, and the gate electrode 227 is The configuration is not limited to the three layers described above; it may also consist of one, two, or four or more layers.

[0079] Next, we will explain the components of the above structure in detail.

[0080] There are no major restrictions on the material of the substrate 102, but at least in the semiconductor device manufacturing process It must have sufficient heat resistance to withstand the heat treatment performed by the process. For example, glass substrates, Examples include laminated substrates and plastic substrates, while glass substrates include barium borosilicate. Alkali-free glass such as glass, aluminoborosilicate glass, or aluminosilicate glass. It is advisable to use a substrate. Alternatively, a substrate that does not transmit light, such as a stainless steel alloy, can be used. This is also possible. In that case, it is preferable to provide an insulating film on the substrate surface. Note that substrate 102 Examples include quartz substrates, sapphire substrates, single-crystal semiconductor substrates, polycrystalline semiconductor substrates, and compound semiconductors. It is also possible to use substrates, SOI (Silicon On Insulator) substrates, etc. Cut.

[0081] The base insulating film 110 is, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, and nitrogen Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn metals It can be formed using insulating materials such as oxides, in a single-layer or multi-layer structure. The thickness of one region of the border film 110 is 30 nm to 500 nm, preferably 150 nm or more. The wavelength should be 400nm or less.

[0082] Oxide semiconductor films are used for semiconductor films 111, 119, and 231. This is preferable. The oxide semiconductor film may have an amorphous structure, a single crystal structure, or a polycrystalline structure. It is possible. Also, the thickness of one region of the semiconductor film 111 is between 1 nm and 100 nm. Preferably 1 nm to 50 nm, more preferably 1 nm to 30 nm, most preferably Alternatively, the wavelength should be between 3nm and 20nm.

[0083] Furthermore, a light-shielding film is placed beneath the underlying insulating film 110 so as to conceal the channel region of the semiconductor film 111. It is also possible to arrange them. For example, the light-shielding film can be formed at the same time as the conductive film 241. good.

[0084] As a semiconductor applicable to semiconductor film 111, semiconductor film 119, and semiconductor film 231, Energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more and less than 3.9 eV, preferably less than 3.7 eV, more preferably less than 3.5 eV. Oxide semiconductors can be used as examples. Thus, oxide semiconductors with a wide energy gap can be used This reduces the off-current of transistor 103. Semiconductors have high transmittance to visible light, and by using them as one electrode of the capacitive element 105, It is possible to form optical capacitive elements, improving the aperture ratio of pixels in liquid crystal display devices and the like. It is possible.

[0085] Furthermore, by converting the oxide semiconductor film to n-type, the optical band gap of the oxide semiconductor film becomes 2 It can be between 0.4eV and 3.1eV, or between 2.6eV and 3.0eV. . Furthermore, for example, the oxide semiconductor film used as semiconductor film 119 has an atomic ratio of In:Ga:Z When n=1:1:1 is an In-Ga-Zn metal oxide, its optical band gap is It is 3.15 eV. Also, the optics of indium tin oxide used in pixel electrodes 121, etc. The band gap is 3.7eV to 3.9eV. Therefore, transmission occurs at the pixel electrode 121. Light including the highest energy wavelengths within the visible light spectrum and ultraviolet light are absorbed into the semiconductor film 1. 19 can be absorbed by light including wavelengths with high energy and ultraviolet light. Concerns have been raised about harm to the eyes, and the semiconductor uses a light-transmitting capacitive element 105 in the pixel 101. The device can be said to be easy on the eyes. It does not need to overlap with the region. At a minimum, the capacitive element 105 overlaps with a part of the pixel 101. This allows it to absorb light, including high-energy wavelengths within the visible light spectrum, as well as ultraviolet light. can.

[0086] The oxide semiconductor applicable to semiconductor film 111, semiconductor film 119, and semiconductor film 231 is: Preferably, it contains at least indium (In) or zinc (Zn). Or, I It is preferable that it contains both n and Zn. Also, the transistor using the oxide semiconductor To reduce variations in electrical characteristics, one or more stabilizers are used along with them. It is preferable to do so.

[0087] Stabilizers include gallium (Ga), tin (Sn), hafnium (Hf), and aluminum. Examples include aluminum (Al) or zirconium (Zr). Also, other stabilizers... These are lanthanides: lanthanum (La), cerium (Ce), and praseodymium (P). r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium Examples include rhodium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), etc. ru.

[0088] As an oxide semiconductor applicable to semiconductor film 111, semiconductor film 119, and semiconductor film 231 For example, as oxide semiconductors, indium oxide, tin oxide, zinc oxide, and two types of gold In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, and other oxides containing the genus Zn-Mg oxides, Sn-Mg oxides, In-Mg oxides, In-Ga oxides, In-Ga-Zn oxides (also written as IGZO) are oxides containing three types of metals. In-Al-Zn oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, A l-Ga-Zn oxides, Sn-Al-Zn oxides, In-Hf-Zn oxides, In -Zr-Zn oxides, In-Ti-Zn oxides, In-Sc-Zn oxides, In- Y-Zn oxides, In-La-Zn oxides, In-Ce-Zn oxides, In-Pr -Zn oxides, In-Nd-Zn oxides, In-Sm-Zn oxides, In-Eu- Zn oxides, In-Gd-Zn oxides, In-Tb-Zn oxides, In-Dy-Z n-based oxides, In-Ho-Zn-based oxides, In-Er-Zn-based oxides, In-Tm-Zn-based oxides In-Yb-Zn oxides, In-Lu-Zn ​​oxides, and four types of metals are included. Oxides such as In-Sn-Ga-Zn oxides, In-Hf-Ga-Zn oxides, In -Al-Ga-Zn oxides, In-Sn-Al-Zn oxides, In-Sn-Hf-Z n-based oxides and In-Hf-Al-Zn-based oxides can be used.

[0089] Here, an In-Ga-Zn oxide is an oxide that has In, Ga, and Zn as its main components. This means that the ratio of In, Ga, and Zn is not important. Also, other than In, Ga, and Zn... It may contain metallic elements.

[0090] In addition, as an oxide semiconductor, InMO3(ZnO) m Using materials denoted as (m>0) It is also possible that M is one or more metallic elements selected from Ga, Fe, Mn, and Co. This indicates a number of metallic elements, or elements used as stabilizers as described above.

[0091] For example, In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Ga:Z n=2:2:1 (=2 / 5:2 / 5:1 / 5), or In:Ga:Zn=3:1:2 Use an In-Ga-Zn metal oxide with an atomic ratio of (=1 / 2:1 / 6:1 / 3). This is possible. Alternatively, In:Sn:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), I n:Sn:Zn=2:1:3 (=1 / 3:1 / 6:1 / 2) or In:Sn:Zn= In-Sn-Zn metal oxides with an atomic ratio of 2:1:5 (=1 / 4:1 / 8:5 / 8) It is recommended to use it. Note that the atomic ratio of metal oxides should be plus or minus the above atomic ratio as an error. Includes a 20% fluctuation in eggplant.

[0092] However, this is not limited to these, and may include any other semiconductor and electrical properties (field effect mobility, etc.) required. Depending on the key voltage, etc., an appropriate atomic ratio should be used. To obtain the desired properties, the carrier density, impurity concentration, defect density, and atomic ratio of metal elements to oxygen are measured. It is preferable to make the interatomic distance, density, etc. appropriate. For example, In-Sn-Zn acid High field-effect mobility can be obtained relatively easily with chromium compounds. However, in-Ga-Zn Even in oxides, the field-effect mobility can be increased by lowering the bulk defect density. can.

[0093] The signal line 109, conductive film 113, capacitance line 115, wiring 229, and wiring 233 have resistive losses. To reduce loss, it is preferable to form it with a metal film with low resistance. For example, molybdenum ( Mo), Titanium (Ti), Tungsten (W), Tantalum (Ta), Aluminum (Al) Metal materials such as copper (Cu), chromium (Cr), neodymium (Nd), and scandium (Sc) Forming a single-layer or laminated structure using materials or alloy materials that mainly consist of these materials. It is possible.

[0094] An example of a signal line 109, conductive film 113, capacitance line 115, wiring 229, and wiring 233 is shown below. For example, a single-layer structure using silicon-containing aluminum, or titanium laminated on top of aluminum. A two-layer structure, a two-layer structure in which titanium is layered on titanium nitride, and a two-layer structure in which tungsten is layered on titanium nitride. Laminated two-layer structure, two-layer structure with tungsten laminated on tantalum nitride, copper-magnesium A two-layer structure in which copper is laminated on an aluminum alloy, and copper is laminated on titanium nitride, and further... Some structures include a three-layer structure with tungsten formed on top.

[0095] For example, signal line 109, conductive film 113, capacitance line 115, wiring 229, and wiring 233 It is preferable to use aluminum or copper, which are low-resistance materials. By using this, signal delay can be reduced and display quality can be improved. Furthermore, aluminum is It has low heat resistance and is prone to defects due to hillock, whiskering, or migration. To prevent aluminum migration, molybdenum and titanium are added to the aluminum. It is preferable to laminate metal materials with higher melting points than aluminum, such as aluminum and tungsten. Furthermore, when using copper, to prevent defects due to migration and the diffusion of copper elements... By layering metal materials with higher melting points than copper, such as molybdenum, titanium, and tungsten... This is preferable.

[0096] Also, the materials of the signal line 109, conductive film 113, capacitance line 115, wiring 229, and wiring 233 As a material, a light-transmitting conductive material applicable to the pixel electrode 121 can be used. Furthermore, when the semiconductor device according to one aspect of the present invention is a reflective display device, the pixel electrode 121 Alternatively, a conductive material that does not have light-transmitting properties can be used for the substrate 102.

[0097] The gate insulating film 127 is, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, Silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn gold It can be formed using insulating materials such as oxides, in a single-layer or multi-layer structure. In order to improve the interface characteristics with the oxide semiconductor film which is the semiconductor film 111, the gate insulating film 1 At least the region in contact with the semiconductor film 111 in 27 is formed with an insulating film containing oxygen. This is preferable.

[0098] Furthermore, the gate insulating film 127 is made of an insulating film that has barrier properties against oxygen, hydrogen, water, etc. This allows for the diffusion of oxygen from the oxide semiconductor film 111 to the outside, and from the outside This prevents the penetration of hydrogen, water, etc. into the oxide semiconductor film. Examples of insulating films having barrier properties include aluminum oxide, aluminum oxide and aluminum nitride. Gallium oxide, gallium oxide nitride, yttrium oxide, yttrium oxide nitride, HAF oxide Examples include nium, hafnium oxide-nitride, and silicon nitride.

[0099] Furthermore, as the gate insulating film 127, hafnium silicate (HfSiO x ), containing nitrogen Hafnium silicate (HfSi x O y N z ), hafnium aluminate containing nitrogen (HfAlx O y N z ) By using high-k materials such as hafnium oxide and yttrium oxide, the gate leakage of the transistor 103 can be reduced.

[0100] Further, the gate insulating film 127 preferably has the following laminated structure from the gate electrode side. As the first silicon nitride film, a silicon nitride film with a small amount of defects is provided. On the first silicon nitride film, as the second silicon nitride film, a silicon nitride film with a small amount of hydrogen desorption and ammonia desorption is provided. On the second silicon nitride film, it is preferable to provide any of the insulating films containing oxygen that can be used as the gate insulating film 127.

[0101] As the second silicon nitride film, in the temperature-programmed desorption gas analysis method, the desorption amount of hydrogen molecules is 5× 10 21 molecules / cm 3 less than, preferably 3×10 21 molecules / cm 3 or less, more preferably is 1×10 21 molecules / cm 3 or less, and the desorption amount of ammonia molecules is 1×10 22 molecules / cm 3 less than, preferably 5×10 21 molecules / cm 3 or less, more preferably 1×10 21 molecules / cm 3 or less. It is preferable to use a silicon nitride film. By using the first silicon nitride film and the second silicon nitride film as part of the gate insulating film 127, a gate insulating film with a small amount of defects and a small amount of hydrogen and ammonia desorption can be formed as the gate insulating film 127. Therefore, the hydrogen contained in the gate insulating film 127 and This makes it possible to reduce the amount of nitrogen that diffuses into the semiconductor film 111.

[0102] In a transistor using an oxide semiconductor, the interface between the oxide semiconductor film and the gate insulating film. Alternatively, if trapping levels (also called interface levels) exist in the gate insulating film, the transistor's structure Fluctuations in the threshold voltage, typically in the negative direction, become more likely. Furthermore, in this trapping level, the drain current changes by an order of magnitude when the transistor is turned on. This also causes an increase in the subthreshold coefficient (S value), which indicates the gate voltage required. Furthermore, the changes in the above electrical characteristics are not uniform, and the electrical characteristics vary from transistor to transistor. There is a problem. Therefore, a silicon nitride film with a low defect rate is used as the gate insulating film. Furthermore, by providing an insulating film containing oxygen in the region in contact with the semiconductor film 111, the threshold voltage can be reduced. This reduces the negative pressure shift and suppresses the increase in the S value.

[0103] The thickness of one region of the gate insulating film 127 is 5 nm or more and 400 nm or less, more preferably 10 The wavelength should be between 300 nm and 300 nm, more preferably between 50 nm and 250 nm.

[0104] Scan line 107, gate electrode 227 and conductive film 241 are connected to signal line 109 and conductive film 113. Using materials applicable to capacitance wires 115, wiring 229, and wiring 233, a single-layer structure or It can be formed in a layered structure.

[0105] Furthermore, nitrogen is used as a material for part of the scanning line 107, gate electrode 227, and conductive film 241. Metal oxides containing nitrogen, specifically In-Ga-Zn oxides containing nitrogen, and I n-Sn oxides, nitrogen-containing In-Ga oxides, and nitrogen-containing In-Zn oxides or nitrogen-containing Sn oxides, nitrogen-containing In oxides, and metal nitride films (InN, Sn These materials can use N, etc. These materials have a work function of 5 eV (electron volts) or more. It has. When an oxide semiconductor is used for the semiconductor film 111 of transistor 103, scan line 10 By using a nitrogen-containing metal oxide as the gate electrode of transistor 103, The threshold voltage of transistor 103 can be varied in the positive direction, so-called normally This enables the realization of transistors with off-mode characteristics. For example, an In-Ga-Zn system acid containing nitrogen. When using an oxide, at least a higher nitrogen concentration than that of the oxide semiconductor film of the semiconductor film 111, specifically In particular, an In-Ga-Zn oxide with a nitrogen concentration of 7 atomic percent or higher can be used.

[0106] The insulating film 129 and insulating film 131 are, for example, silicon oxide, silicon oxide nitride, and a Aluminum, hafnium oxide, gallium oxide, or Ga-Zn metal oxides such as oxides and oxides It can be formed using edge materials, either as a single-layer or laminated structure.

[0107] The thickness of one region of the insulating film 129 is 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less The wavelength should be less than or equal to nm, more preferably between 10 nm and 30 nm. Also, one of the insulating films 131 The thickness of the region is 30 nm to 500 nm, preferably 150 nm to 400 nm. do.

[0108] One or both of insulating film 129 and insulating film 131 contain more oxygen than satisfactorily satisfying the stoichiometric composition. It is preferable that the oxide insulating film contains a large amount of oxygen. Prevent the desorption of oxygen from the oxide semiconductor film and allow the oxygen contained in the oxygen-excess region to diffuse through the gate insulating film 127 into the oxide semiconductor film to fill the oxygen deficiency. . For example, the amount of oxygen molecules released during heat treatment at 100°C or higher and 700°C or lower, preferably 100°C or higher and 500°C or lower, measured by temperature-programmed desorption gas analysis (hereinafter referred to as TDS analysis) is 1.0×10 18 molecules / cm 3 or more. By using an insulating oxide film with such an amount, the oxygen deficiency contained in the oxide semiconductor film can be filled. Note that in one or both of the insulating films 129 and insulating film 131, an insulating oxide film may partially have a region containing oxygen in excess of the stoichiometric composition (oxygen excess region). As long as there is an oxygen-excess region in at least the region overlapping with the semiconductor film 11 1, the desorption of oxygen from the oxide semiconductor film can be prevented, and the oxygen contained in the oxygen-excess region can be diffused into the oxide semiconductor film to fill the oxygen deficiency.

[0109] When the insulating film 131 is an insulating oxide film containing more oxygen than the oxygen satisfying the stoichiometric composition, the insulating film 129 is preferably an insulating oxide film that permeates oxygen. Note that in the insulating film 1 29, all the oxygen that enters the insulating film 129 from the outside does not diffuse through the insulating film 129 but some oxygen remains in the insulating film 129. Also, there is oxygen that is initially contained in the insulating film 129 and diffuses from the insulating film 129 to the outside. Therefore, the insulating film 129 is preferably an insulating oxide film with a large oxygen diffusion coefficient.

[0110] In addition, one or both of the insulating films 129 and insulating film 131 have a barrier property against nitrogen It is preferable that the insulating film is dense. For example, by using a dense oxide insulating film, the barrier to nitrogen is It can have a ripeness, specifically, 0.5 wt% hydrofluoric acid at 25°C It is preferable to use an oxide insulating film whose etching rate when used is 10 nm / min or less. .

[0111] Furthermore, one or both of the insulating film 129 and insulating film 131 may be made of silicon oxidiznitride or nitrogen When using an oxide insulating film containing nitrogen, such as silicon oxide, the nitrogen concentration obtained from SIMS This is above the SIMS detection limit of 3 × 10⁻⁶. 20 atoms / cm 3 Less than 1 × 10 1 8 atoms / cm 3 The above 1 x 10 20 atoms / cm 3 The following areas are to be included. It is preferable to form it in this way. In this way, the semiconductor contained in transistor 103 This reduces the amount of nitrogen transferred to the body membrane 111. Furthermore, by doing so, This can reduce the amount of defects in the nitrogen-containing oxide insulating film itself.

[0112] Furthermore, the insulating film 132 can be, for example, silicon nitride, silicon nitride, aluminum nitride, or nitrogen. Formed using nitride insulating materials such as aluminum oxide, in a single-layer or multi-layer structure. It is possible.

[0113] A nitride insulating film with a low hydrogen content may be provided as the insulating film 132. For example, the surface temperature of the film is 100°C or more and 700°C or less, preferably 100°C or more and 5 The amount of hydrogen molecules released, as measured by TDS analysis performed during heat treatment below 00°C, is 5 .0 × 10 21 molecules / cm3 It is less than 3.0 × 10 21 molecules / cm 3 less than And more preferably 1.0 × 10 21 molecules / cm 3 Using a nitride insulating film that is less than It is possible.

[0114] One region of the insulating film 132 exhibits a function that suppresses the intrusion of impurities such as hydrogen and water from the outside. It is preferable to have a thickness of 50 nm or more and 200 nm or less, preferably 50 The dielectric material should be between 150 nm and 100 nm, more preferably between 50 nm and 100 nm. By providing 132, impurities such as carbon are blocked by the insulating film 132, and transients Impurities in semiconductor films 111 and 231 of transistors 103 and 223 Because external movement is reduced, variations in the electrical characteristics of transistors can be reduced. It is possible.

[0115] Furthermore, the insulating film provided on the gate insulating film 127, the scan line 107, and the gate electrode 227 is 1 If it is a layer, it is preferable to provide an insulating film 131. Also, if the insulating film is two layers It is preferable to provide the insulating film 131 and insulating film 132 in that order from the semiconductor film side.

[0116] Furthermore, the gate insulating film 127, scan line 107, gate electrode 227, pixel electrode 121, conductive An insulating film is formed between the film 241 and wiring, etc., which can be formed simultaneously therewith. Therefore, an oxide insulating film formed by CVD (chemical vapor deposition) using organic silane gas. Typically, a silicon oxide film may be included.

[0117] The silicon oxide film can be formed with a wavelength of 300 nm to 600 nm. (Organosilane) As gases, ethyl silicate (TEOS: chemical formula Si(OC2H5)4), tetramethyl methyl silicate Lan (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasiloxane (TM) CTS), Octamethylcyclotetrasiloxane (OMCTS), Hexamethyldisilazol (HMDS), triethoxysilane (SiH(OC2H5)3), trisdimethylam Silicon-containing compounds such as nosilane (SiH(N(CH3)2)3) can be used. ru.

[0118] The silicon oxide film is formed by a CVD method using organic silane gas, thereby forming the substrate 10 2. It is possible to improve the flatness of the surface of the element formed on the material. As a result, with organic resin Even without forming a planarization film, it is possible to reduce the orientation disorder of the liquid crystal and reduce light leakage. This also enhances contrast. Of course, it can replace the silicon oxide film. Organic resins may be used, or a laminate containing the silicon oxide film and organic resin may be used. .

[0119] The pixel electrode 121 is made of indium tin oxide, indium oxide containing tungsten oxide, and acid Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, oxide Titanium-containing indium tin oxide, indium zinc oxide, and indium with added silicon dioxide It can be formed from a light-transmitting conductive material such as um-tin oxide.

[0120] Next, we will describe each component included in the pixel 101 shown in this embodiment.

[0121] Figure 4(A) is an example of the circuit diagram of the pixel 101 described above. Pixel 101 is a transistor It has a gate 103, a capacitive element 105, and a liquid crystal element 108. The electrodes are electrically connected to the scan line 107, and either the source electrode or the drain electrode is connected to the signal line. It is electrically connected to 109, and the other of the source electrode or drain electrode is one of the capacitive elements 105. One electrode is electrically connected to one electrode (pixel electrode) of the liquid crystal element 108. The other electrode of the capacitive element 105 is electrically connected to the capacitance line 115, and the other electrode of the liquid crystal element 108 The electrode (counter electrode) is electrically connected to the wiring that supplies the counter potential to the counter electrode.

[0122] The liquid crystal element 108 consists of a substrate on which the transistor 103 and pixel electrodes are formed, and a facing substrate By the optical modulation effect of the liquid crystal sandwiched between a plate (for example, a substrate on which the opposing electrodes are formed) It is an element that controls the transmission or non-transmission of light. Furthermore, the optical modulation effect of liquid crystals is related to the properties of liquid crystals. It is controlled by such an electric field (including a vertical or diagonal electric field). When the primary electrode and the counter electrode (also called the common electrode) are formed on one side of the substrate, the liquid crystal The resulting electric field will be a lateral electric field.

[0123] Furthermore, Figure 4(B) is an example of a detailed circuit diagram of pixel 101. (See Figures 4(B) and 2) As shown, transistor 103 has a scan line 107 including the gate electrode and a source electrode It includes a signal line 109 that includes one of the drain electrodes and the other of the source electrode or drain electrode. It has a conductive film 113.

[0124] In the capacitive element 105, the semiconductor film 119 connected to the capacitance line 115 is one of the electrodes. It works. Also, the connection to the conductive film 113, which includes the source electrode or the other drain electrode. The elementary electrode 121 functions as the other electrode. Also, the semiconductor film 119 and the pixel electrode 121 The insulating film 129, insulating film 131, and insulating film 132, which are placed between them, function as a dielectric film. ru.

[0125] The liquid crystal element 108 includes a pixel electrode 121, a counter electrode 154, and the pixel electrode 121 and the counter It consists of a liquid crystal layer provided between the electrodes 154.

[0126] In the capacitive element 105, the semiconductor film 119, like the semiconductor film 111, has high resistance. It functions as an electrode for the capacitive element 105. This is because the pixel electrode 121 acts as the gate electrode, insulating Film 129, insulating film 131, and insulating film 132 are gate insulating films, and capacitance line 115 is source electrical It can function with a pole or drain electrode, and as a result, the capacitive element 105 can be traced This is because it can be operated in the same way as an inverter, thereby making the semiconductor film 119 conductive. Therefore, the semiconductor film 119 can function as one of the electrodes of the capacitive element 105. ru.

[0127] Next, the method for fabricating the semiconductor device shown in Figures 1 and 2 will be explained using Figures 5 and 6. ru.

[0128] First, a conductive film 241 is formed on the substrate 102, and an underlayer insulating film 110 is applied to cover the conductive film. It forms.

[0129] The conductive film 241 is formed using the aforementioned material, and a mask is formed on the conductive film. The conductive film can be formed by processing using the mask. Various film deposition methods such as sputtering and spin coating can be used. The thickness of the conductive film is not particularly limited and is determined by considering factors such as the formation time and the desired resistivity. This is possible. The mask is a resist formed by, for example, a photolithography process. It can be used as a mask. Furthermore, the conductive film can be processed by dry etching and wet etching. This can be done by etching, either by one or both of the above methods.

[0130] The underlayer insulating film 110 can be formed using the material described above. The underlayer insulating film is Various film deposition methods such as vapor deposition, CVD, sputtering, and spin coating are used. It is possible.

[0131] Next, semiconductor films 111, 119, and 231 are formed (see Figure 1). The semiconductor films 111, 119, and 231 are made of the aforementioned oxide semiconductor. Using this method, an oxide semiconductor film is formed, a mask is formed on the oxide semiconductor film, and the mask is It can be formed by processing using the following methods. The oxide semiconductor film can be formed by sputtering, coating, etc. It can be formed using methods such as pulsed laser deposition and laser ablation. By using a printing method, the element-separated semiconductor film 111 and semiconductor film 119 are used as a base. It can be formed directly on the insulating film 110. The oxide semiconductor film can be formed by sputtering. When forming the plasma, the power supply for generating the plasma is an RF power supply, an AC power supply, etc. Alternatively, a DC power supply or similar device can be used as appropriate. The sputtering gas is a noble gas (representative). Generally, argon, oxygen, noble gases, and mixed gases of oxygen are used as appropriate. In the case of a mixed gas of oxygen and noble gas, it is preferable to increase the gas ratio of oxygen to noble gas. The target should be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask in question may be a resist mask formed by, for example, a photolithography process. This can be done. Furthermore, the oxide semiconductor film can be processed using dry etching and wet etching. This can be done by either or both of the etching processes. Etching conditions (etching gas, etching solution, etching time, temperature) should be adjusted according to the material. Set the appropriate parameters (etc.).

[0132] Furthermore, the above oxide semiconductor film may be formed by the CVD method. The CVD method may be MOC. VD(Metal Organic Chemical Vapor Depositi) Thermal CV such as the (ON) method and ALD (Atomic Layer Deposition) method Method D may also be used.

[0133] Thermal CVD is a film deposition method that does not use plasma, so defects are generated by plasma damage. It has the advantage of not being affected.

[0134] In the thermal CVD method, the raw material gas and oxidizer are simultaneously introduced into the chamber, and the chamber pressure is reduced to atmospheric pressure. Alternatively, the film is formed by reacting the material near or on the substrate under reduced pressure, causing it to deposit on the substrate. That's fine.

[0135] Furthermore, the ALD method involves maintaining atmospheric pressure or reduced pressure inside the chamber, and sequentially supplying the raw material gases for the reaction. The gas can then be introduced into the chamber, and the film deposition process may be carried out by repeating this gas introduction sequence. For example, by switching between each switching valve (also called a high-speed valve), you can create two or more types. The raw material gases are supplied to the chamber in order, and the first raw material gas is supplied in order to prevent the mixing of multiple types of raw material gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the refrigerant gas, Introducing the raw material gas (2). Note that if an inert gas is introduced simultaneously, the inert gas should be... It becomes a carrier gas, and when introducing the second raw material gas, an inert gas may also be introduced at the same time. Also, instead of introducing an inert gas, the first raw material gas is discharged by vacuum evacuation. A second raw material gas may be introduced. The first raw material gas is adsorbed onto the surface of the substrate to form the first layer. The film is formed and reacts with a second raw material gas introduced later, so that the second layer is laminated on top of the first layer. A thin film is formed. This process is repeated multiple times while controlling the gas introduction sequence until the desired thickness is reached. By doing so, a thin film with excellent step coverage can be formed. The thickness of the thin film is determined by the order of gas introduction. Because it can be adjusted by the number of times the process is repeated, precise film thickness adjustment is possible. It is suitable for fabricating thin transistors.

[0136] For example, when forming an In-Ga-Zn-O film, trimethylindium, trimeth Trimethylindium and dimethylzinc are used. The chemical formula for trimethylindium is I It is n(CH3)3. Also, the chemical formula for trimethylgallium is Ga(CH3)3. Furthermore, the chemical formula for dimethylzinc is Zn(CH3)2. Also, these combinations Not limited to trimethylgallium, triethylgallium (chemical formula Ga(C2H5) )3) can also be used, and diethylzinc (chemical formula Zn(C2H5) can be used instead of dimethylzinc )2) can also be used.

[0137] When depositing an In-Ga-Zn-O film using the ALD method, In(CH3)3 gas and O3 gas are used. InO2 layers are formed by sequentially introducing gas, and then Ga(CH3)3 gas and O3 gas are introduced. A GaO layer is formed by simultaneously introducing Zn(CH3)2 and O3 gas, and then Zn(CH3)2 and O3 gas are introduced simultaneously. It is introduced to form a ZnO layer. Note that the order of these layers is not limited to this example. These gases are mixed to form In-Ga-O layers, In-Zn-O layers, Ga-In-O layers, and Zn-In A mixed compound layer such as an O layer or a Ga-Zn-O layer may be formed. Alternatively, instead of O3 gas... H2O gas obtained by bubbling with an inert gas such as Ar may be used, but it does not contain H. It is preferable to use O3 gas, which does not contain ions. Also, instead of In(CH3)3 gas, In(C2 H5)3 gas may be used. Alternatively, Ga(C2H5) can be used instead of Ga(CH3)3 gas. You may also use three gases. Alternatively, you can use In(C2H5)3 gas instead of In(CH3)3 gas. Alternatively, Zn(CH3)2 gas may be used.

[0138] After forming semiconductor films 111, 119, and 231, a heat treatment is performed. Dehydrogenation of oxide semiconductor films, which are semiconductor films 111, 119, and 231. It is preferable to perform ionization or dehydration. The temperature of the heat treatment is typically 150°C or higher. Below the upper substrate strain point, preferably 200°C to 450°C, and more preferably 300°C or higher. The temperature should be 450°C or lower. This heat treatment is performed on semiconductor film 111, semiconductor film 119, and semiconductor film 119. This may also be done on the oxide semiconductor film before it is processed into the conductive film 231.

[0139] In this heat treatment, the heat treatment apparatus is not limited to an electric furnace, but also includes a heated gas or other medium. It may also be a device that heats the object to be processed by heat conduction or thermal radiation. For example, GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (La mp Rapid Thermal Annealing (RTA) devices, etc. A stermal Anneal (LRTA) device can be used. The LRTA device uses halogen lamps. P, metal halide lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium The light (electromagnetic waves) emitted from lamps such as um lamps and high-pressure mercury lamps is used to treat the object being processed. It is a device for heating objects. A GRTA device is a device that performs heat treatment using high-temperature gas. ru.

[0140] The heat treatment involves nitrogen, oxygen, and ultra-dry air (with a water content of 20 ppm or less, preferably 1 (air) with a concentration of ppm or less, preferably 10 ppb or less, or a noble gas (argon, helium, etc.) This should be done under the atmosphere of ). Note that the above nitrogen, oxygen, ultra-dry air, or noble gas, hydrogen, It is preferable that the product does not contain water or other substances. After heating in an inert gas atmosphere, heating is performed in an oxygen atmosphere. This is also acceptable. The processing time is preferably between 3 minutes and 24 hours.

[0141] Here, a dopant may be added to the semiconductor film 119. The method of adding involves providing a mask in a region other than the semiconductor film 119, and using the mask, Hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony One or more dopants selected from ions and noble gas elements are implanted by ion implantation or ion dopant implantation. It is added using methods such as the Ping method. Alternatively, this method can be used instead of ion implantation or ion doping. By exposing the semiconductor film 119 to the plasma containing the dopant, even when the dopant is added... Good. Furthermore, heat treatment may be performed after adding the dopant. This heat treatment is, See details of the heat treatment for dehydrogenating or dehydrating semiconductor films 111 and 119. It can be done as appropriate by referring to the relevant information.

[0142] Next, the signal line 109, conductive film 113, capacitance line 115, wiring 229, and wiring 233 are formed The signal line 109, conductive film 113, capacitance line 115, wiring 229, and wiring 233 are configured as follows: Using the aforementioned materials, a conductive film is formed, a mask is formed on the conductive film, and the mask It can be formed by processing using the same method as the conductive film 241. The mask and the processing method are the same as those used for the conductive film 241. It can be done in the same way.

[0143] Next, the base insulating film 110, semiconductor film 111, semiconductor film 119, semiconductor film 231, signal line 1 09, gate so as to cover the conductive film 113, capacitance line 115, wiring 229, and wiring 233. An insulating film 127 is formed.

[0144] The gate insulating film 127 is made using the aforementioned material by a CVD method or sputtering method, etc. It can be formed using various film deposition methods. In addition, gallium oxide can be used for the gate insulating film 127. If applying MOCVD (Metal Organic Chemical Vaporsium), It can be formed using the (por Deposition) method.

[0145] Next, a scan line 107 is formed in the region that overlaps with the semiconductor film 111 on the gate insulating film 127. A gate electrode 227 is formed in the region that overlaps with the semiconductor film 231 (see Figure 5(B)).

[0146] The scan line 107 and the gate electrode 227 have a conductive film formed using the aforementioned material, It can be formed by forming a mask on a conductive film and processing using the mask. The process of creating the film and the subsequent processing can be carried out in the same manner as the conductive film 241.

[0147] Next, insulating film 129 is applied to the gate insulating film 127, scan line 107, and gate electrode 227. Insulating film 131 and insulating film 132 are formed (see Figure 6(A)). Note that insulating film 129 It is preferable that the insulating film 131 and insulating film 132 be formed continuously. By doing so, impurities are introduced into the interfaces of insulating film 129, insulating film 131, and insulating film 132. This can prevent contamination.

[0148] Insulating film 129, insulating film 131, and insulating film 132 were manufactured using the aforementioned materials by CVD. Alternatively, it can be formed by various film deposition methods such as sputtering.

[0149] The insulating film 129 can be formed, for example, using the aforementioned oxide insulating film. In this case, when forming a silicon oxide film or a silicon oxide nitride film as the oxide insulating film... This document describes the formation conditions in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The placed substrate is heated to a temperature of 180°C to 400°C, more preferably 200°C to 370°C. The material is held in place, and a depositing gas containing silicon and an oxidizing gas, which are raw material gases, are introduced into the processing chamber for processing. The pressure inside the laboratory should be 20 Pa or more and 250 Pa or less, more preferably 40 Pa or more and 20 The conditions are to keep the pressure below 0 Pa and supply high-frequency power to electrodes installed in the processing chamber.

[0150] Typical examples of silicon-containing sedimentary gases include silanes, disilanes, trisilanes, and silicon fluoride. Examples include orchids. Oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide. be.

[0151] Furthermore, by increasing the amount of oxidizing gas relative to the silicon-containing sedimentary gas to more than 100 times, It is possible to reduce the hydrogen content contained in the edge film 129, and also the insulating film 129 The dangling bond that is formed can be reduced. Oxygen diffusing from the insulating film 131 Because dangling bonds contained in the insulating film 129 may be trapped, If the dangling bond contained in 129 is reduced, the oxygen contained in the insulating film 131 Efficiently diffuses into semiconductor films 111 and 231 via gate insulating film 127. , to compensate for oxygen vacancies contained in the oxide semiconductor films, which are semiconductor films 111 and 231. This makes it possible to reduce the amount of hydrogen mixed into the oxide semiconductor film. Both methods can reduce oxygen vacancies in oxide semiconductor films.

[0152] The insulating film 131 is an oxide insulating film containing the above-mentioned oxygen-rich region or oxygen satisfying a stoichiometric composition. To form an oxide insulating film containing more oxygen than the following, the following formation conditions can be used. Yes, it is possible. Here, the oxide insulating film is either a silicon oxide film or silicon oxide nitride. This section describes the process for forming a film. The formation conditions include the vacuum of the plasma CVD apparatus. The substrate placed in the exhausted processing chamber is heated to a temperature of 180°C to 260°C, more preferably 1 Maintain a temperature between 80°C and 230°C, introduce the raw material gas into the processing chamber, and adjust the pressure within the processing chamber. The pressure should be between 100 Pa and 250 Pa, more preferably between 100 Pa and 200 Pa. 0.17 W / cm² is applied to the electrode installed in the processing chamber. 2 More than 0.5W / cm 2 The following are further preferred Or 0.25 W / cm² 2More than 0.35W / cm 2 The following conditions for supplying high-frequency power are This can be given as an example.

[0153] The raw material gas for insulating film 131 can be any raw material gas applicable to insulating film 129.

[0154] As a condition for forming the insulating film 131, a high-frequency power of the above power density is used in a reaction chamber at the above pressure. By supplying this, the decomposition efficiency of the raw material gas in the plasma is increased, and oxygen radicals increase. As the oxidation of the source gas progresses, the oxygen content in the insulating film 131 becomes greater than the stoichiometric composition. The amount increases. However, if the substrate temperature is the temperature of the above formation conditions, the bonding of silicon and oxygen Due to the weak net force, some of the oxygen is removed upon heating. As a result, the stoichiometric composition is achieved. It forms an oxide insulating film that contains more oxygen than oxygen, and some of the oxygen is removed upon heating. It is possible.

[0155] Furthermore, by increasing the thickness of the insulating film 131, the amount of oxygen that is desorbed by heating is increased. Therefore, it is preferable that the insulating film 131 be thicker than the insulating film 129. By providing the film 129, good coverage can be achieved even when the insulating film 131 is made thick. Cut.

[0156] When the insulating film 132 is made of a nitride insulating film with a low hydrogen content, the following formation conditions are used to shape It can be achieved. Note that here, when forming a silicon nitride film as the nitride insulating film, The following is an example of the formation conditions: the evacuated processing chamber of the plasma CVD apparatus. The substrate placed inside is heated to a temperature of 80°C to 400°C, more preferably 200°C to 370°C. Maintain the following conditions, introduce the raw material gas into the processing chamber, and raise the pressure inside the processing chamber to 100 Pa or more. The pressure should be 0 Pa or less, preferably 100 Pa or more and 200 Pa or less, and the processing chamber is equipped with One example is the condition for supplying high-frequency power to the electrodes.

[0157] The raw material gases for the insulating film 132 are silicon-containing depositing gas, nitrogen, and ammonia. It is preferable to use [a specific type of gas]. Typical examples of silicon-containing sedimentary gases include silane and disila. Examples include nitrates, trisilanes, and silane fluorides. Furthermore, the nitrogen flow rate is relative to the ammonia flow rate. It is preferable that the ratio be between 5 and 50 times, and more preferably between 10 and 50 times. By using ammonia as a raw material gas, the sedimentary gas containing silicon and nitrogen are removed. This can facilitate the solution. This is because ammonia is affected by plasma energy and thermal energy. It dissociates, and the energy released by the dissociation breaks the bonds of the silicon-containing sedimentary gas molecules. This is because it contributes to the breakdown of nitrogen molecule bonds. In this way, the hydrogen content A silicon nitride film that is small in quantity and can suppress the intrusion of impurities such as hydrogen and water from the outside. It can be formed.

[0158] At least the insulating film 131 is formed, followed by a heat treatment, and the insulating film 129 or insulating film 13 Excess oxygen contained in 1 is absorbed by the semiconductor film 111 and semiconductor film 23 via the gate insulating film 127. 1. Diffuse into the oxide semiconductor films, which are semiconductor films 111 and 231, to eliminate oxygen vacancies. It is preferable to replenish. Note that the heat treatment is performed on semiconductor film 111 and semiconductor film 231 This can be carried out as appropriate by referring to the details of the heat treatment for dehydrogenation or dehydration.

[0159] Next, the regions of insulating film 129, insulating film 131, and insulating film 132 that overlap with the conductive film 113. An opening 117 (see Figure 1) is formed that reaches the conductive film 113.

[0160] Next, by forming the pixel electrodes 121, the semiconductor device shown in Figures 1 and 2 can be fabricated. It is possible (see Figure 6(B)). The pixel electrode 121 uses the aforementioned material and passes through the aperture 117. A conductive film is formed in contact with the conductive film 113, a mask is formed on the conductive film, and the mask It can be formed by processing using the mask and the conductive film 24. It can be done in the same way as in 1.

[0161] In addition, in a semiconductor device according to one aspect of the present invention, the configuration of the capacitive elements may be changed as appropriate. This is possible. For example, as shown in the cross-sectional view of the capacitive element 105 in Figure 7(A), the capacitive element 105 The gate insulating film 127 may be removed from the dielectric portion. The film thickness of the body portion can be reduced, and the charge capacitance of the capacitive element 105 can be improved. To partially remove the gate insulating film 127, a mask can be placed on the gate insulating film. It can be formed by forming and processing using the mask. This processing can be carried out in the same manner as the conductive film 241. Note that a halftone mask is also used. When forming the gate electrode 227 using this method, a portion of the gate insulating film 127 may be removed. In this case, the photolithography process can be reduced. In addition, insulating film 1 Alternatively, either 29 or the insulating film 131 may be removed.

[0162] Furthermore, as shown in the cross-sectional view of the capacitive element 105 in Figure 7(B), the dielectric portion of the capacitive element 105 The gate insulating film 127, insulating film 129, and insulating film 131 may be removed from this. By doing so, the film thickness of the dielectric portion becomes even thinner, and the charge capacitance of the capacitive element 105 is improved. It can be raised.

[0163] Furthermore, in the capacitive element 105 shown in Figure 7(B), the semiconductor film 119 and the insulating film 132 are in contact. The insulating film 132 is preferably a nitride insulating film as described above. The film contains large amounts of nitrogen and hydrogen, and these are diffused into the semiconductor film 119. This is possible. When an oxide semiconductor is used as the semiconductor film 119, it is incorporated into the oxide semiconductor. Some of the nitrogen and hydrogen that are removed contribute to the formation of donor levels that generate carriers, thus oxidation The semiconductor layer can be made n-type. Therefore, the conductivity of the semiconductor film 119 can be improved. This allows for the elimination of processes such as doping the semiconductor film 119 with impurities.

[0164] Furthermore, as shown in Figure 8, the semiconductor film 119, which is one electrode of the capacitive element 105, and the underlying insulating layer are insulated. A nitride insulating film 118 may be provided between the film 110 and the film. In such a configuration, Similar to Figure 7(B), nitrogen and hydrogen are diffused from the nitride insulating film 118 to the semiconductor film 119. This allows for an improvement in the conductivity of the semiconductor film 119. To form 18, a film that can be used as an insulating film 132 is formed, and a mask is formed on the film. It can be formed by processing using the said mask. The processing can be carried out in the same manner as the conductive film 241. Furthermore, the capacitance element is shown in Figure 7. The configurations of the capacitive elements shown in (A) or (B) may be combined.

[0165] Furthermore, in a semiconductor device according to one aspect of the present invention, a transistor provided within a pixel The shape is not limited to the transistor shapes shown in Figures 1 and 2, and can be changed as appropriate. For example, in a transistor, the source electrode or drain included in the signal line 109 One of the electrodes is U-shaped (C-shaped, U-shaped, or horseshoe-shaped), and the source electrode or drain electrode It may also be a transistor with a shape that surrounds the conductive film including the other in electrode. This makes it possible to secure a sufficient channel width even with a small transistor area. This increases the amount of drain current (also called on-current) that flows when the transistor conducts. Synthesize.

[0166] Furthermore, the pixel 101 shown above has one gate electrode as a transistor. A transistor was shown, but it has two opposing gate electrodes separated by a semiconductor film 111. A transistor can be used. Note that the configuration of a transistor having two gate electrodes is... For example, the first drive having a gate electrode 227 and a conductive film 241 as shown in Figure 2 The transistors used in the dynamic circuit 104 can be referenced.

[0167] The transistor having the two gate electrodes described above is the transistor 1 described in this embodiment. The conductive film is located beneath the underlying insulating film 110 of 03. The conductive film is at least the semiconductor film 111. It overlaps with the channel formation region. The conductive film is positioned to overlap with the channel formation region of the semiconductor film 111. By providing this, the potential of the conductive film is the lowest potential of the video signal input to signal line 109. It is preferable to do so. As a result, on the surface of the semiconductor film 111 facing the conductive film, It is possible to control the current flowing between the drain electrode and the transistor. This can reduce variations in the electrical properties. Furthermore, by providing a conductive film, the surrounding electrical properties can be reduced. This reduces the impact of environmental changes on the semiconductor film 111 and improves the reliability of the transistor. It is possible.

[0168] The conductive film mentioned above includes conductive film 241, scan line 107, signal line 109, pixel electrode 121, etc. It can be formed using the same materials and methods as described above.

[0169] Based on the above, one electrode of the capacitive element can be formed using the same formation process as the semiconductor film included in the transistor. By using a semiconductor film formed in a certain manner, the aperture ratio is increased while the charge capacitance is increased. A semiconductor device having elements can be fabricated. As a result, a semiconductor device with excellent display quality can be fabricated. You can obtain a place.

[0170] Furthermore, one electrode of the capacitive element is formed using the same formation process as the semiconductor film included in the transistor. By using the formed semiconductor film, the number of masks required for the photolithography process can be increased. To fabricate a semiconductor device having a high aperture ratio and a large charge capacitance without any compromise. It is possible.

[0171] Furthermore, the oxide semiconductor film, which is a semiconductor film contained in the transistor, has reduced oxygen vacancies, and water Because impurities such as elemental compounds are reduced, a semiconductor device according to one aspect of the present invention is good This will become a semiconductor device with electrical properties.

[0172] This embodiment can be appropriately combined with other embodiments shown herein. .

[0173] (Embodiment 2) In this embodiment, the transistor included in the semiconductor device described in the above embodiment In a capacitance element, one embodiment applicable to an oxide semiconductor film used as a semiconductor film: I will explain about this.

[0174] Oxide semiconductors may have non-single crystal structures. Non-single crystals include, for example, CAAC(C Axi). (Aligned Crystal), polycrystalline, microcrystalline, and having amorphous parts.

[0175] The oxide semiconductor may have CAAC. Furthermore, the oxide semiconductor having CAAC may be C AAC-OS(C Axis Aligned Crystalline Oxide It is called a semiconductor.

[0176] CAAC-OS is a transmission electron microscope (TEM). In some cases, the crystalline portion can be confirmed by observing the image using a (ron Microscope). Yes, it exists. The crystalline portion contained in CAAC-OS, as observed by TEM, has sides of 100 nm. They are often small enough to fit inside a device. Furthermore, CAAC-OS is used for TEM observation. Therefore, the boundary between crystalline parts may not be clearly visible. Also, CAAC-OS Furthermore, the grain boundaries (also called TEM) cannot be clearly identified in the TEM observation image. In some cases, CAAC-OS does not have clear grain boundaries, so impurities may segregate. The number is small. Also, because CAAC-OS does not have clear grain boundaries, the defect level density is high. This is rare. Also, CAAC-OS does not have clear grain boundaries, resulting in a decrease in electron mobility. It's small.

[0177] CAAC-OS has multiple crystalline parts, and in these multiple crystalline parts, the c-axis is perpendicular to the plane on which it is formed. They may be aligned in a direction parallel to the line vector or the surface normal vector. Therefore, CAAC-OS uses an X-ray diffraction (XRD) instrument. Furthermore, when analysis is performed using the out-of-plane method, a peak appears where 2θ is near 31°. In some cases, the peak near 2θ = 31° is (00) 9) This indicates that it is oriented on the plane. Also, CAAC-OS has a peak near 36° at 2θ. This may appear. A peak near 2θ of 36° is, if it is a ZnGa2O4 crystal, ( 222) Indicates orientation to the plane. CAAC-OS preferably has 2θ close to 31°. A peak appears nearby, but no peak appears near 2θ = 36°.

[0178] Furthermore, in CAAC-OS, the orientation of the a-axis and b-axis is aligned between different crystalline regions. In some cases, it may not be possible. If it is a CAAC-OS with InGaZnO4 crystals, then it is an XRD instrument. Using this method, an in-plane analysis is performed in which X-rays are incident from a direction perpendicular to the c-axis. In some cases, a peak may appear when 2θ is near 56°. The peak near 2θ is InG The (110) plane of the aZnO4 crystal is shown. Here, 2θ is fixed near 56°, and the surface modulus When the sample is rotated around a line vector (φ axis) and analyzed (φ scan), the a-axis and In the case of single-crystal oxide semiconductors where the orientation of the b-axis is aligned, six symmetry peaks appear. In the case of CAAC-OS, no clear peak appears.

[0179] Thus, CAAC-OS is c-axis oriented, and the a-axis and / or b-axis are macroscopically aligned. They may not be there.

[0180] Furthermore, CAAC-OS may show spots (bright spots) in its electron diffraction pattern. Yes, it is possible. In particular, it can be obtained using an electron beam with a beam diameter of 10 nmφ or less, or 5 nmφ or less. The resulting electron diffraction pattern is called a micro-electron diffraction pattern.

[0181] Figure 10(A) shows an example of the micro-electron diffraction pattern of a sample containing CAAC-OS. Here, the sample is cut perpendicular to the surface on which CAAC-OS is formed, and the thickness is approximately 40 nm. The sample is thinned to the desired degree. Here, an electron beam with a beam diameter of 1 nmφ is used to cut the sample. The electron beam is incident from a direction perpendicular to the cross-section. Figure 10(A) shows the ultra-low electron diffraction of CAAC-OS. The pattern indicates that spots are being observed.

[0182] The crystalline portion contained in CAAC-OS has a c-axis that is aligned with the normal vector of the surface formed in CAAC-OS. Alternatively, they are aligned so as to be parallel to the surface normal vector, and viewed from a direction perpendicular to the ab plane. The metal atoms are arranged in a triangular or hexagonal shape, and when viewed from a direction perpendicular to the c-axis, the metal atoms are layered. The metal atoms and oxygen atoms are arranged in layers. The orientations of the a-axis and b-axis may be different. In this specification, they are simply referred to as perpendicular. In this case, the range of 80° to 100°, preferably 85° to 95°, is also included. In addition, when simply described as parallel, the angle should be -10° or more and 10° or less, preferably -5° or less. This will include the range of 5° or less above the baseline.

[0183] The c-axis of the crystalline portion contained in CAAC-OS is the normal vector of the surface formed in CAAC-OS. Or they align so as to be parallel to the surface normal vector, so the shape of CAAC-OS (covered Depending on the cross-sectional shape of the forming surface or the surface itself, they may face in different directions. Furthermore, the crystalline portion is formed when the film is deposited, or when crystallization treatment such as heat treatment is performed after film deposition. It is formed at this time. Therefore, the c-axis of the crystalline portion is the shape when CAAC-OS is formed. They are aligned so as to be parallel to the normal vector of the surface or the surface normal vector.

[0184] CAAC-OS can sometimes be formed by reducing the concentration of impurities. Therefore, impurities are elements other than the main components of oxide semiconductors, such as hydrogen, carbon, silicon, and transition metal elements. It is an element. In particular, elements such as silicon have a higher oxygen content than the metallic elements that make up oxide semiconductors. It has a strong bonding force with [another element]. Therefore, when this element removes oxygen from an oxide semiconductor, the oxide semiconductor... It can disrupt the atomic arrangement of conductors and reduce their crystallinity. Also, heavy metals such as iron and nickel Because of their large atomic radius (or molecular radius), oxides such as argon and carbon dioxide are considered semi-oxides. This can disrupt the atomic arrangement of conductors and reduce the crystallinity of oxide semiconductors. Therefore, C AAC-OS is an oxide semiconductor with a low impurity concentration. Impurities can sometimes be a source of carrier generation.

[0185] Furthermore, in CAAC-OS, the distribution of the crystalline regions does not need to be uniform. For example, CAAC -In the formation process of an OS, when crystal growth is performed from the surface side of the oxide semiconductor, the surface to be formed The proportion of crystalline material may be higher near the surface compared to the surrounding area. Also, CAAC- When impurities are introduced into the OS, the crystallinity of the crystalline region decreases in the area where the impurities are present. There are things that need to be done.

[0186] Furthermore, CAAC-OS can be formed by reducing the defect level density. In semiconductors, oxygen vacancies are defect levels. Oxygen vacancies can also become trap levels, It can become a carrier source by capturing hydrogen. It forms CAAC-OS. To achieve this, it is important to prevent oxygen vacancies from forming in the oxide semiconductor. Therefore, C AAC-OS is an oxide semiconductor with a low defect level density. Alternatively, CAAC-OS is... It is an oxide semiconductor with few oxygen vacancies.

[0187] High-purity intrinsic or true purity refers to a substance with a low impurity concentration and a low defect level density (low oxygen deficiency). This is qualitatively referred to as high-purity intrinsic. Oxide semiconductors that are high-purity intrinsic or substantially high-purity intrinsic are Because there are few carrier sources, it may be possible to lower the carrier density. However Therefore, in transistors that use the oxide semiconductor in question as the channel formation region, the threshold voltage is In some cases, the electrical properties that result in neutrality (also called normally-on) are rarely observed. Furthermore, oxide semiconductors that are high-purity intrinsic or substantially high-purity intrinsic have a low defect level density. Therefore, the trap level density may also be low. The transistors used in the formation region are highly reliable transistors with minimal variation in electrical characteristics. This can happen. Furthermore, charges trapped in the trap levels of oxide semiconductors will not disappear. The time required for this process is long, and it can behave as if it were a fixed charge. Therefore, Transistors that use oxide semiconductors with a high top level density in the channel formation region exhibit the following electrical characteristics This may become unstable.

[0188] Furthermore, transistors using CAAC-OS that are high-purity intrinsic or substantially high-purity intrinsic. It exhibits minimal changes in electrical properties due to irradiation with visible or ultraviolet light.

[0189] CAAC-OS can be formed, for example, by a sputtering method using a DC power supply. can.

[0190] Oxide semiconductors may have polycrystalline properties. Furthermore, an oxide semiconductor having polycrystalline properties may be referred to as a polycrystalline semiconductor. This is called an oxide semiconductor. Polycrystalline oxide semiconductors contain multiple crystal grains.

[0191] In some cases, the crystal grains of polycrystalline oxide semiconductors can be observed using TEM. The crystal grains contained in the polycrystalline oxide semiconductor are 2 nm or larger and 300 nm in size, as observed by TEM. The particle size must be less than or equal to nm, between 3 nm and 100 nm, or between 5 nm and 50 nm. There are many. Also, in polycrystalline oxide semiconductors, the boundaries between crystal grains can be seen in TEM observation images. It can sometimes be confirmed. Also, polycrystalline oxide semiconductors can be observed, for example, by TEM. In some cases, grain boundaries can be identified.

[0192] Polycrystalline oxide semiconductors have multiple crystal grains, and the orientation of these multiple crystal grains differs. In some cases, polycrystalline oxide semiconductors can be analyzed using an XRD device, and out-of-plural analysis is performed. Analysis using the ANE method revealed peaks near 31° for 2θ, indicating orientation, or multiple types of orientations. In some cases, peaks indicating direction may appear. Also, polycrystalline oxide semiconductors exhibit electron diffraction patterns. And sometimes spots are observed.

[0193] Polycrystalline oxide semiconductors, due to their high crystallinity, can sometimes exhibit high electron mobility. Therefore, transistors using polycrystalline oxide semiconductors in the channel formation region have a high electric field. It has effective mobility. However, in polycrystalline oxide semiconductors, impurities may segregate at grain boundaries. Furthermore, grain boundaries in polycrystalline oxide semiconductors become defect levels. Because they can act as carrier sources and trap levels, polycrystalline oxide semiconductors are channel-shaped The transistor used in the channel formation region is a transistor that uses CAAC-OS in the channel formation region. Compared to conventional transistors, these can exhibit greater fluctuations in electrical characteristics, resulting in less reliable transistors.

[0194] Polycrystalline oxide semiconductors can be formed by high-temperature heat treatment or laser light treatment. can.

[0195] Oxide semiconductors may have microcrystals. It is called an oxide semiconductor.

[0196] Microcrystalline oxide semiconductors do not allow for clear identification of the crystalline structure in TEM observation images. In some cases, the crystalline portion contained in the microcrystalline oxide semiconductor is between 1 nm and 100 nm in size. They are often between 1 nm and 10 nm in size. In particular, between 1 nm and 10 nm These microcrystals are called nanocrystals (nc). Oxides containing nanocrystals. Semiconductors, nc-OS (nanocrystalline oxide semiconductors) It is called a ductor. Also, in nc-OS, the crystalline part and the crystalline part are visible in the TEM observation image. In some cases, the boundary cannot be clearly identified. Also, nc-OS is observed in TEM images. Because it does not have clear grain boundaries, impurities are less likely to segregate. Also, nc-OS is Because it does not have clear grain boundaries, the defect level density is less likely to be high. Also, nc-OS Because it lacks clear grain boundaries, the decrease in electron mobility is small.

[0197] nc-OS has an atomic arrangement in a minute region (for example, a region between 1 nm and 10 nm). It may have periodicity. Also, nc-OS has regularity between the crystalline parts. Therefore, macroscopically, periodicity is not observed in the atomic arrangement, or long-range order is not observed. In some cases, nc-OS may be classified as an amorphous oxide semiconductor depending on the analytical method. There are cases where a distinction cannot be made. nc-OS, for example, uses an XRD instrument to determine if the area is larger than the crystal region. When analysis is performed using the out-of-plane method with X-rays of a certain beam diameter, a peak indicating orientation is observed. In some cases, it may not be detected. Also, nc-OS uses a beam diameter larger than the crystal portion (for example). In electron diffraction patterns using electron beams with a diameter of 20 nm or more, or 50 nm or more, A halo pattern may be observed. Also, nc-OS is either the same as the crystalline region or different from the crystalline region. An electron beam with a smaller beam diameter (for example, 10 nmφ or less, or 5 nmφ or less) is used. In micro-electron diffraction patterns, spots may be observed. Also, in the extremely small electron diffraction pattern of nc-OS... Electron diffraction patterns may sometimes show high-brightness regions forming a circular pattern. The nc-OS micro-electron diffraction pattern is obtained when multiple spots are observed within the region. There is.

[0198] Figure 10(B) shows an example of the micro-electron diffraction pattern of a sample containing nc-OS. Next, the sample is cut perpendicular to the surface on which nc-OS is formed, resulting in a thickness of approximately 40 nm. The sample is then thinned. Here, an electron beam with a beam diameter of 1 nmφ is applied perpendicularly to the cross-section of the sample. The electron beam is incident from a straight direction. From Figure 10(B), the micro-electron diffraction pattern of nc-OS is: A region of high brightness was observed in a circular pattern, and multiple spots were observed within that region. It becomes clear that...

[0199] Because nc-OS may have periodicity in the atomic arrangement in minute regions, amorphous acids The defect level density is lower than that of ionized semiconductors. However, nc-OS has a lower defect level density between the crystalline regions. Because there is no regularity between them, the defect level density is higher compared to CAAC-OS.

[0200] Therefore, nc-OS may have a higher carrier density compared to CAAC-OS. Oxide semiconductors with high carrier density may have high electron mobility. Therefore, Transistors using nc-OS in the channel formation region have high field-effect mobility. There are cases where this is the case. However, nc-OS has a higher defect level density compared to CAAC-OS. Therefore, the trap level density may also increase. The transistor used in the channel formation region is a transistor that uses CAAC-OS in the channel formation region. Compared to other transistors, it can have larger variations in electrical characteristics and be less reliable. Furthermore, nc-OS can be formed even if it contains a relatively large amount of impurities, C It is easier to form than AAC-OS and may be suitable for use in certain applications. Yes, it exists. Furthermore, nc-OS can be formed by film deposition methods such as sputtering using an AC power supply. It may be done. The sputtering method using an AC power supply allows for highly uniform film deposition on large substrates. Therefore, semiconductors having transistors that use nc-OS in the channel formation region Body devices can be manufactured with high productivity.

[0201] The oxide semiconductor may have amorphous regions. Furthermore, an oxide semiconductor having amorphous regions may be non This is called a crystalline oxide semiconductor. Amorphous oxide semiconductors have a disordered atomic arrangement and contain crystalline regions. No. Alternatively, amorphous oxide semiconductors have an amorphous state like quartz, and their atomic arrangement is not fixed. No pattern is observed.

[0202] In amorphous oxide semiconductors, crystalline regions may not be visible in TEM observation images. be.

[0203] Amorphous oxide semiconductors are analyzed using an XRD instrument and the out-of-plane method. In some cases, the peak indicating orientation may not be detected. Also, amorphous oxide semiconductors are electron In some cases, a halo pattern may be observed in the linear diffraction pattern. Also, amorphous oxide semiconductors Therefore, it was not possible to observe the spot in the extremely small electron diffraction pattern, and a halo pattern was observed. There are cases where this can happen.

[0204] Amorphous oxide semiconductors are formed by incorporating impurities such as hydrogen at high concentrations. This can sometimes occur. Therefore, amorphous oxide semiconductors contain high concentrations of impurities. It is a semiconductor.

[0205] When oxide semiconductors contain high concentrations of impurities, defect levels such as oxygen vacancies are created in the oxide semiconductor. This can sometimes form defects. Therefore, amorphous oxide semiconductors with high impurity concentrations may have defect levels. It has a high density. Also, amorphous oxide semiconductors have low crystallinity, such as CAAC-OS and nc-O Compared to S, it has a higher defect level density.

[0206] Therefore, amorphous oxide semiconductors have an even higher carrier density compared to nc-OS. This can sometimes occur. Therefore, transistors using amorphous oxide semiconductors in the channel formation region... This can result in normally-on electrical characteristics. Therefore, normally-on electrical characteristics Amorphous oxide semiconductors can be suitably used in transistors where performance is required. Because the body has a high defect level density, the trap level density may also be high. Therefore, Transistors using amorphous oxide semiconductors in the channel formation region include CAAC-OS and nc -Compared to transistors using OS in the channel formation region, the variation in electrical characteristics is large and reliable. This can result in unreliable transistors. However, amorphous oxide semiconductors are relatively impure. Because it can be formed even by film deposition methods that involve the inclusion of many substances, it is easy to form. Therefore, it may be suitable for use in certain applications. For example, spin coating, Zo Lugel method, immersion method, spray method, screen printing method, contact printing method, inkjet Amorphous oxide semiconductors are produced by film deposition methods such as inkjet printing, roll coating, and mist CVD. A conductor may be formed. Therefore, an amorphous oxide semiconductor can be used in the channel formation region. Semiconductor devices containing a transistor can be manufactured with high productivity.

[0207] Note that oxide semiconductors include CAAC-OS, polycrystalline oxide semiconductors, microcrystalline oxide semiconductors, and non- The mixed film may have two or more types of crystalline oxide semiconductors. The mixed film may, for example, be amorphous Oxide semiconductor region, microcrystalline oxide semiconductor region, polycrystalline oxide semiconductor region, CAAC -The OS region may have two or more of the following regions. Also, the mixed film may have, for example The regions of amorphous oxide semiconductors, microcrystalline oxide semiconductors, and polycrystalline oxide semiconductors, CAAC-OS may have a layered structure consisting of two or more regions.

[0208] The oxide semiconductor may, for example, have a single crystal. This is called a single-crystal oxide semiconductor.

[0209] Single-crystal oxide semiconductors, for example, have low impurity concentrations and low defect level densities (few oxygen vacancies). Therefore, the carrier density can be lowered. The transistor used in the channel formation region rarely exhibits normally-on electrical characteristics. In some cases, single-crystal oxide semiconductors have a low defect level density, and therefore the trap level density is low. The degree may also be lower. Therefore, when using a single-crystal oxide semiconductor in the channel formation region... Transistors can sometimes be highly reliable due to their small variations in electrical characteristics. .

[0210] Oxide semiconductors can have high density if they have few defects. Also, oxide semiconductors are... High crystallinity can result in high density. Also, oxide semiconductors, for example, contain hydrogen. When the concentration of the pure substance is low, the density increases. Also, single-crystal oxide semiconductors are more dense than CAAC-OS. It can have a high density. Also, CAAC-OS has a higher density than microcrystalline oxide semiconductors. In some cases, polycrystalline oxide semiconductors have a higher density than microcrystalline oxide semiconductors. Yes, that's true. Also, microcrystalline oxide semiconductors can sometimes have a higher density than amorphous oxide semiconductors.

[0211] Furthermore, it is preferable to apply the following conditions for forming the CAAC-OS film.

[0212] By reducing the inclusion of impurities during film formation, it is possible to suppress the disruption of the crystalline state due to impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, and nitrogen, etc.) present in the deposition chamber. It would be good to reduce it. Also, it would be good to reduce the impurity concentration in the film formation gas. Specifically, the dew point is A film-forming gas with a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0213] Furthermore, by increasing the heating temperature of the film-forming surface during film formation (e.g., substrate heating temperature), the film-forming surface After arrival, sputtering particle migration occurs. Specifically, the temperature of the film-deposited surface. The film is formed at a temperature of 100°C to 740°C, preferably 150°C to 500°C.

[0214] Furthermore, by increasing the oxygen content in the deposition gas and optimizing the power, plasma damage during film deposition can be reduced. It is preferable to reduce this. The oxygen content in the film-forming gas is 30% by volume or more, preferably 100% by volume. Let the product be %.

[0215] As an example of a target for sputtering, an In-Ga-Zn-O compound target is used. The following is an example.

[0216] InO X powder, GaO Y Powder and ZnO Z The powder is mixed in a predetermined number of moles and then subjected to pressure treatment. By heat treatment at temperatures between 1000°C and 1500°C, polycrystalline In-Ga - A Zn-based metal oxide target is used. Note that this pressurized treatment is performed without cooling (or allowing to cool). You can proceed as is, or you can proceed while heating. Note that X, Y, and Z are any positive numbers. There is. Here, a given molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z The powder is in a ratio of 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, or 3: Examples include 1:2. Note that the type of powder and the molar ratio of its mixture depend on the preparation of the spa. You can adjust this as needed depending on the target for tarring.

[0217] Here, oxide semiconductors (indicated as OS) and silicon (indicated as Si) are shown in their crystalline state. Table 1 shows a comparison of the two.

[0218] [Table 1]

[0219] The crystalline state of oxide semiconductors includes, for example, amorphous oxide semiconductors (aO) as shown in Table 1. S, a-OS:H), microcrystalline oxide semiconductors (nc-OS, μc-OS), polycrystalline oxide semiconductors Conductors (polycrystalline OS), continuous crystalline oxide semiconductors (CAAC-OS), single crystalline oxide semiconductors ( Examples include single-crystal OS. Furthermore, the crystalline states of silicon include, for example, as shown in Table 1, Amorphous silicon (a-Si and a-Si:H), microcrystalline silicon (nc-Si, μc-Si) ), polycrystalline silicon (polycrystalline Si), continuous crystalline silicon (CG (Continuous Examples include grain silicon and single-crystal silicon (single-crystal Si).

[0220] For oxide semiconductors in each crystalline state, an electron beam focused to a beam diameter of 10 nmφ or less was used. When electron diffraction using (micro-electron diffraction) is performed, the following electron diffraction pattern (micro-electron diffraction) is obtained. A halo pattern (electron diffraction pattern) is observed. In amorphous oxide semiconductors, a halo pattern (halo A spot (also called a halo or ring) is observed. In microcrystalline oxide semiconductors, spots A spot or / and ring pattern is observed. In polycrystalline oxide semiconductors, the spot is visible. It is measured. In continuous crystalline oxide semiconductors, spots are observed. In single crystalline oxide semiconductors... Spots are observed.

[0221] Furthermore, from the micro-electron diffraction pattern, it can be seen that the crystalline portion of the microcrystalline oxide semiconductor is nanometer (n From m), it can be seen that the diameter is in micrometers (μm). Polycrystalline oxide semiconductors are... It can be seen that there are grain boundaries between the crystal and crystalline parts, and that the boundaries are discontinuous. Continuous crystalline oxide semiconductor It can be seen that the conductor is continuously connected, with no visible boundaries observed between the crystalline regions.

[0222] The density of oxide semiconductors in each crystalline state will be explained. The density of amorphous oxide semiconductors is Low. The density of microcrystalline oxide semiconductors is moderate. The density of continuous crystalline oxide semiconductors is high. In other words, the density of continuous crystalline oxide semiconductors is higher than the density of microcrystalline oxide semiconductors, and microcrystalline oxide The density of semiconductors is higher than that of amorphous oxide semiconductors.

[0223] This section describes the characteristics of the density of states (DOS) present in oxide semiconductors in each crystalline state. Oxide semiconductors have high DOS. Microcrystalline oxide semiconductors have slightly lower DOS. Continuous crystalline oxide Monocrystalline semiconductors have low DOS. Single-crystal oxide semiconductors have extremely low DOS. That is, single-crystal oxide Monocrystalline semiconductors have a lower DOS than continuous crystalline oxide semiconductors, while continuous crystalline oxide semiconductors have a lower DOS than continuous crystalline oxide semiconductors. Microcrystalline oxide semiconductors have a lower DOS than solid-state semiconductors, and microcrystalline oxide semiconductors have a lower DOS than amorphous oxide semiconductors. .

[0224] Furthermore, the oxide semiconductor film may have a structure in which multiple oxide semiconductor films are stacked. For example, see Figure As shown in the transistor in 9(A), the semiconductor film is made of a first oxide semiconductor film 188a and a second The oxide semiconductor film 188b can be stacked. A metal oxide with a different atomic ratio may be used for the second oxide semiconductor film 188b. For example, On the other hand, oxide semiconductor films containing two types of metals, oxides containing three types of metals, and four types One of the oxides containing metals of the same type is used, and the other oxide semiconductor film is made of the same oxide semiconductor film. Oxides containing two different metals, oxides containing three different metals, acids containing four different metals You may use monsters.

[0225] Furthermore, the constituent elements of the first oxide semiconductor film 188a and the second oxide semiconductor film 188b are the same. The atomic ratios of the two can be different. For example, the atomic ratio of one oxide semiconductor film can be Let In:Ga:Zn = 3:1:2, and the atomic ratio of the other oxide semiconductor film be In:Ga:Z n=1:1:1 is also acceptable. Alternatively, the atomic ratio of one of the oxide semiconductor films can be In:Ga:Z Let n=2:1:3, and the atomic ratio of the other oxide semiconductor film be In:Ga:Zn=1:3:2 Alternatively, the atomic ratio of one of the oxide semiconductor films may be set to In:Ga:Zn=1:1:1. Alternatively, the atomic ratio of the other oxide semiconductor film may be set to In:Ga:Zn = 1:3:2. Furthermore, the atomic ratio of one oxide semiconductor film is set to In:Ga:Zn=1:1:1, and the other acid The atomic ratio of the ion semiconductor film may be In:Ga:Zn = 1:6:4. Also, one of the acids The atomic ratio of the oxide semiconductor film is set to In:Ga:Zn=1:1:1, and the other oxide semiconductor film is set to The atomic ratio may be In:Ga:Zn = 1:9:6. Note that the atoms of each oxide semiconductor film The numerical ratio includes a variation of plus or minus 20% from the above atomic ratio as an error.

[0226] At this time, among one oxide semiconductor film and the other oxide semiconductor film, the atomic number ratio of In and Ga in the oxide semiconductor film on the side closer to the gate electrode ( channel side) is set to In≥Ga, and the atomic number ratio of In and Ga in the oxide semiconductor film on the side farther from the gate electrode (back channel side) is set to In<Ga. By doing so, a transistor with high field-effect mobility can be fabricated. On the other hand, by setting the atomic number ratio of In and Ga in the oxide semiconductor film on the channel side to In<Ga and the atomic number ratio of In and Ga in the oxide semiconductor film on the back channel side to In≥Ga, the variation over time of the transistor and the variation amount of the threshold voltage due to the reliability test can be reduced. Also, the semiconductor film of the transistor may have a three-layer structure composed of a first oxide semiconductor film to a third oxide semiconductor film. At this time, the constituent elements of the first oxide semiconductor film to the third oxide semiconductor film may be the same, and the atomic number ratios thereof may be different. The configuration of the transistor having a three-layer structure of the semiconductor film will be described using FIG. 9(B). The transistor shown in FIG. 9(B) has a first oxide semiconductor film 199a, a second oxide semiconductor

[0227] film 199b, and a third oxide semiconductor film 199c laminated in this order from the gate insulating film 127 side. The materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c can be represented by InM Zn O

[0228] (x≥1, y>1, z>0, M1 = Ga, Hf, etc.). However, when Ga is included in the materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c, the proportion of Ga included is large. Specifically the materials are stacked in order from the gate insulating film 127 side. The materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c can be represented by InM Zn 1x O y (x≥1, y>1, z>0, M1 = Ga, Hf, etc.). However, when Ga is included in the materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c, the proportion of Ga included is large. Specifically z (x≥1, y>1, z>0, M1 = Ga, Hf, etc.). However, when Ga is included in the materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c, the proportion of Ga included is large. Specifically in terms of, if Ga is included in the materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c, the proportion of Ga included is large, specifically in terms of, if Ga is included in the materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c, the proportion of Ga included is large, specifically in terms of, InM 1X ZnY O Z When used in materials that can be represented by X > 10, powder may be generated during film formation, which is unsuitable.

[0229] Also, the material constituting the second oxide semiconductor film 199b is InM 2x Zn y O z (x ≥ 1 , y ≥ x, z > 0, M2 = Ga, Sn, etc.) is used.

[0230] The lower end of the conduction band of the first oxide semiconductor film 199a and the conduction band lower end of the third oxide semiconductor film 199c are selected appropriately so that the lower end of the conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level, forming a well - type structure.

[0231] In the oxide semiconductor film, silicon or carbon, which is one of the Group 14 elements, may contribute to the formation of donor levels. Therefore, when silicon or carbon is contained in the oxide semiconductor film, the oxide semiconductor film will become n - type. Thus, the concentration of each of silicon and carbon is preferably 3×10 / cm 18 / cm 3 or less, preferably 3×10 17 / cm 3 or less, and it is preferable to form each oxide semiconductor film so as to have a region with such a concentration. In particular, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are arranged to sandwich or surround the second oxide semiconductor film 199b, which serves as a carrier path, so that the Group 14 elements such as silicon and carbon do not mix much into the second oxide semiconductor film 199b. That is, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c have a lower content of Group 14 elements such as silicon and carbon than the second oxide semiconductor film 199b.​​​​​ It can also be called a barrier film that prevents contamination of 199b.

[0232] For example, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are in atomic ratio The oxide semiconductor has an In:Ga:Zn ratio of 1:3:2, 1:6:4, or 1:9:6. The conductive film is formed, and the atomic ratio of the second oxide semiconductor film 199b is In:Ga:Zn=1:1 It can be formed from an oxide semiconductor film with a ratio of :1 or 3:1:2.

[0233] Alternatively, the first oxide semiconductor film 199a has an atomic ratio of In:Ga:Zn=1:3:2 A second oxide semiconductor film 199b is formed with an oxide semiconductor film having an atomic ratio of In:Ga:Z. Formed with an oxide semiconductor film where n=1:1:1 or In:Ga:Zn=3:1:2, 3. The oxide semiconductor film 199c has an atomic ratio of In:Ga:Zn = 1:6:4 or 1:9 It may also be formed from an oxide semiconductor film with a ratio of 6.

[0234] The constituent elements of the first oxide semiconductor film 199a to the third oxide semiconductor film 199c are the same. Therefore, the second oxide semiconductor film 199b has an interface with the first oxide semiconductor film 199a. There are few defect levels (trap levels). In detail, the defect levels (trap levels) are: Less than the defect level at the interface between the gate insulating film 127 and the first oxide semiconductor film 199a No. Therefore, as described above, the oxide semiconductor film is stacked, and the transistor This can reduce the amount of fluctuation in threshold voltage due to changes over time and reliability testing.

[0235] Furthermore, the lower end of the conduction band of the first oxide semiconductor film 199a and the third oxide semiconductor film 199c The lower end of the conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level compared to the lower end of the conduction band of the first film. The first, second, and third oxide semiconductor films are arranged to form a well-shaped structure that is such that By appropriately selecting materials, it is possible to increase the field-effect mobility of a transistor. Both aim to reduce the fluctuations in threshold voltage due to transistor aging and reliability testing. It is possible.

[0236] Furthermore, the first oxide semiconductor film 199a to the third oxide semiconductor film 199c have different crystalline properties. Oxide semiconductors may also be used. That is, single-crystal oxide semiconductors, polycrystalline oxide semiconductors Body, microcrystalline (nanocrystalline) oxide semiconductor, amorphous oxide semiconductor, and CAAC-OS film A configuration with appropriate combinations is also possible. In addition, the first oxide semiconductor film 199a to the third acid When an amorphous oxide semiconductor is applied to any one of the oxide semiconductor films 199c, the oxide semiconductor This reduces internal and external stresses in the film, thereby reducing variations in transistor characteristics, and This can reduce the amount of fluctuation in threshold voltage due to transistor aging and reliability testing. ru.

[0237] Furthermore, the second oxide semiconductor film 199b, which can at least form a channel-forming region, is CAAC. - It is preferable that it be an OS film.

[0238] Furthermore, conductive materials that readily combine with oxygen (for example, those used in source or drain electrodes) When a metal and an oxide semiconductor film are brought into contact, the oxygen in the oxide semiconductor film readily combines with other oxygen molecules. A phenomenon of diffusion occurs towards the conductive material. This phenomenon becomes more pronounced at higher temperatures. The manufacturing process of Zista involves several heating steps, and due to the above phenomenon, oxide semicolons Oxygen deficiency occurs in the region of the conductive layer that is in contact with the source electrode or drain electrode, The region becomes n-type. Therefore, the n-type region is the source or drain of the transistor. It can be used as an input.

[0239] The n-type regions described above are illustrated in Figures 9(A) and (B). They are shown by dotted lines in the semiconductor film. Boundary 135 is the boundary between the intrinsic semiconductor region and the n-type semiconductor region, and in oxide semiconductors, The region in contact with the electrode or drain electrode becomes an n-type region. 135 is a schematic representation and may not be clear in reality. Also, boundary 13 The position of point 5 may also differ from the position shown in the diagram.

[0240] This embodiment can be appropriately combined with other embodiments shown herein. .

[0241] (Embodiment 3) In this embodiment, the electrons of a nanocrystalline oxide semiconductor film that can be used in one aspect of the present invention The linear diffraction pattern and localized energy levels will be described.

[0242] Nanocrystalline oxide semiconductor films can be analyzed by electron diffraction (micro-electron diffraction) with a beam diameter of 10 nmφ or less. In electron diffraction patterns using (folding), the halo pattern that indicates an amorphous state is also specified. Unlike spots that exhibit a regularity in their crystalline state, which are oriented toward a particular surface, these spots lack directionality. This is an oxide semiconductor film in which pots are observed.

[0243] Figure 13(A) shows a cross-sectional TEM (Transmission El) of a nanocrystalline oxide semiconductor film. Figure 13 shows an image taken with an ectron microscope (transmission electron microscope). B) shows the electron diffraction pattern measured using micro-electron diffraction at point 1 in Figure 13(A). The turn was measured in Figure 13(C) at point 2 in Figure 13(A) using microelectron diffraction. The defined electron diffraction pattern is shown in Figure 13(D) at point 3 in Figure 13(A) with an extremely low voltage. The electron diffraction patterns measured using sub-beam diffraction are shown below.

[0244] Figure 13 shows an example of a nanocrystalline oxide semiconductor film, an In-Ga-Zn based oxide film, and quartz. A sample with a film thickness of 50 nm deposited on a glass substrate is used. The nanocrystalline oxide semiconductor shown in Figure 13. The deposition conditions for the conductive film are an oxide target with an In:Ga:Zn = 1:1:1 (atomic ratio). Using a t- The power was set to 0.5kW and the substrate temperature to room temperature. The deposited nanocrystalline oxide semiconductor film was then subjected to a 100n process. The material was thinned to a width of less than m (e.g., 40 nm ± 10 nm), and cross-sectional TEM images and microelectron beam imaging were obtained. An electron diffraction pattern was obtained by diffraction.

[0245] Figure 13(A) shows a transmission electron microscope (Hitachi High-Technologies "H-9000NAR"). Using a 300kV accelerating voltage and a magnification of 2,000,000x, the nanocrystalline oxide semiconductor was photographed. These are cross-sectional TEM images of the membrane. Figures 13(B) to 13(D) are also shown using a transmission electron microscope. Using Hitachi High-Technologies' "HF-2000", the acceleration voltage was set to 200kV, and the beam This is an electron diffraction pattern obtained by micro-electron diffraction with a diameter of approximately 1 nmφ. The measurement range for ultra-micro electron diffraction with a beam diameter of approximately 1 nmφ is 5 nmφ to 10 It is less than nmφ.

[0246] As shown in Figure 13(B), the nanocrystalline oxide semiconductor film is subjected to electron beam diffraction using microelectron diffraction. In the diffraction pattern, multiple spots (bright spots) arranged in a circular pattern are observed. In other words... Then, in the nanocrystalline oxide semiconductor film, multiple spots are distributed in a circular (concentric) pattern. It could also be said that they are observed. Alternatively, multiple spots distributed in a circular pattern form multiple concentric circles. One could say so.

[0247] Furthermore, Figure 13(D) shows the vicinity of the interface with the quartz glass substrate, and the nanocrystalline oxide semiconductor film. In the central part of the film thickness direction, as in Figure 13(C), multiple layers are distributed circumferentially, similar to Figure 13(B). The spots are observed. In Figure 13(C), the spots are circumferential to the main spot. The distance to the plane ranged from 3.88 nm to 4.93 nm. Converted to interplanar spacing, this is 0. The range is from 203 nm to 0.257 nm.

[0248] From the micro-electron diffraction pattern in Figure 13, the nanocrystalline oxide semiconductor film has an irregular surface orientation. Furthermore, it can be seen that the film contains multiple crystalline regions of different sizes.

[0249] Next, Figure 14(A) shows a planar TEM image of the nanocrystalline oxide semiconductor film. Also, Figure 14( In B), the region enclosed by a circle in Figure 14(A) was measured using limited-field electron diffraction. The sub-ray diffraction pattern is shown.

[0250] Figure 14 shows an example of a nanocrystalline oxide semiconductor film, an In-Ga-Zn based oxide film, and quartz. A sample with a 30 nm film thickness deposited on a glass substrate is used. The nanocrystalline oxide semiconductor shown in Figure 14... The film deposition conditions for the body film are an oxide target with an In:Ga:Zn ratio of 1:1:1 (atomic ratio). Using this, under an oxygen atmosphere (flow rate 45 sccm), pressure 0.4 Pa, and DC power supply 0. The power was set to 5kW and the substrate temperature to room temperature. The sample was then thinned and the nanocrystalline oxide semiconductor film was flattened. We obtained a surface TEM image and an electron diffraction pattern using electron diffraction.

[0251] Figure 14(A) shows a transmission electron microscope (Hitachi High-Technologies "H-9000NAR"). A nanocrystalline oxide semiconductor film was photographed using a 300kV acceleration voltage and a 500,000x magnification. This is a planar TEM image. Also, Figure 14(B) shows an electron beam with a limited field of view of 300 nmφ. This is an electron diffraction pattern obtained by diffraction. Note that, considering the broadening of the electron beam, The measurement range is 300 nm in diameter or larger.

[0252] As shown in Figure 14(B), nanocrystalline oxide semiconductor films have a measurement range greater than that of microelectron diffraction. In electron diffraction patterns using broad-field-of-view electron diffraction, observations can be made by micro-electron diffraction. The multiple spots that were previously observed were not present, and a halo pattern was observed.

[0253] Next, Figure 15 shows the approximate distribution of diffraction intensity in the electron diffraction patterns of Figures 13 and 14. To illustrate, Figure 15(A) shows the ultra-micro electron diffraction patterns shown in Figures 13(B) to 13(D). This is a conceptual diagram of the diffraction intensity distribution in the field. Also, Figure 15(B) is shown in Figure 14(B). This is a conceptual diagram of the diffraction intensity distribution in the limited-field electron diffraction pattern. Also, Figure 15( C) is the concept of the distribution of diffraction intensity in the electron diffraction pattern of a single-crystal or polycrystalline structure. This is a diagram.

[0254] In Figure 15, the vertical axis represents electron diffraction intensity (in arbitrary units) that indicates the distribution of spots, etc., and the horizontal axis is This indicates the distance from the main spot.

[0255] In the single-crystal or polycrystalline structure shown in Figure 15(C), the interplanes between the planes where the crystal portion is oriented are shown. Spots are observed at specific distances from the main spot, corresponding to the interval (d value).

[0256] On the other hand, as shown in Figure 13, the micro-electron diffraction pattern of the nanocrystalline oxide semiconductor film was observed. The multiple spots have a relatively large width. Therefore, Figure 15(A) shows discrete intensity. It shows a distribution. Also, in the micro-electron diffraction pattern, there are clear spots between concentric regions. It can be seen that there are areas with high brightness that do not result in a "T" shape.

[0257] Furthermore, as shown in Figure 15(B), the selected field electron diffraction pattern of the nanocrystalline oxide semiconductor film The electron diffraction intensity distribution in n shows a continuous intensity distribution. Figure 15(B) is shown in Figure 15( Since the electron diffraction intensity distribution shown in A) can be approximated by the results of observing it over a wide area, Figure 15( We consider that the multiple spots shown in A) overlap and connect, resulting in a continuous intensity distribution. can.

[0258] As shown in Figures 15(A) to 15(C), the nanocrystalline oxide semiconductor film has an irregular plane orientation. A film in which multiple crystalline parts of different sizes are mixed, and the crystalline parts are controlled The spots are extremely fine, to the point that they are not visible in the limited-field electron diffraction pattern. This suggests that...

[0259] In Figure 13, where multiple spots are observed, the nanocrystalline oxide semiconductor film is less than 50 nm in size. It has been thinned. Also, the electron beam diameter is focused to 1 nmφ, so the measurement range The size is between 5 nm and 10 nm. Therefore, the crystalline portion contained in the nanocrystalline oxide semiconductor film It is at least 50nm or less, for example, 10nm or less, or 5nm or less. It is presumed that this is the case.

[0260] Here, Figure 16 shows the micro-electron diffraction pattern on a quartz glass substrate. The constant conditions were the same as those in Figures 13(B) to 13(D).

[0261] As shown in Figure 16, the quartz glass substrate having an amorphous structure does not have specific spots. A halo pattern with continuously changing brightness is observed from the main spot. Thus, In films with an amorphous structure, even if electron diffraction is performed on an extremely small area, nanoscale diffraction is not possible. Multiple circularly distributed spots, as observed in crystalline oxide semiconductor films, are not observed. Therefore, the multiple spots that are circumferentially distributed as observed in Figures 13(B) to 13(D) It has been confirmed that this is unique to nanocrystalline oxide semiconductor films.

[0262] Furthermore, Figure 17 shows electrons focused to a beam diameter of approximately 1 nmφ at point 2 shown in Figure 13(A). The electron diffraction pattern measured after irradiation with the beam for 1 minute is shown.

[0263] The electron diffraction pattern shown in Figure 17 is similar to the electron diffraction pattern shown in Figure 13(C). Multiple spots distributed in a circular pattern were observed, and no particular differences were found between the two measurement results. No. This indicates that the crystalline portion, as confirmed by the electron diffraction pattern in Figure 13(C), is a nanocrystal. This means that it was present from the time the oxide semiconductor film was formed, and that it was irradiated with a focused electron beam. This means that the crystalline part was not formed by [the process described above].

[0264] Next, Figure 18 shows a magnified view of a section of the cross-sectional TEM image shown in Figure 13(A). Figure 18(A) The vicinity of point 1 in Figure 13(A) (the surface of the nanocrystalline oxide semiconductor film) was examined at a magnification of 8 million times. This is the observed cross-sectional TEM image. Also, Figure 18(B) shows the vicinity of point 2 in Figure 13(A). Cross-sectional TEM image of the central part of a nanocrystalline oxide semiconductor film (in the thickness direction) observed at a magnification of 8 million times. That is the case.

[0265] The cross-sectional TEM image shown in Figure 18 clearly shows the crystal structure in the nanocrystalline oxide semiconductor film. Unable to confirm.

[0266] Furthermore, the nanocrystals of this embodiment were observed on a quartz glass substrate, as shown in Figures 13 and 14. X-ray diffraction (XRD) is used to analyze a sample in which an oxide semiconductor film has been deposited. The analysis was performed using (on). Figure 19 shows the XRD spectrum obtained using the out-of-plane method. The results of the measurement are shown below.

[0267] In Figure 19, the vertical axis represents X-ray diffraction intensity (in arbitrary units), and the horizontal axis represents the diffraction angle 2θ (deg. ) The XRD spectrum was measured using a Bruker AXS X-ray diffractometer D -8 ADVANCE was used.

[0268] As shown in Figure 19, a peak at around 2θ = 20~23° is observed, which is attributed to quartz. No peaks originating from the crystalline portion contained in the nanocrystalline oxide semiconductor film can be observed.

[0269] The results in Figures 18 and 19 also show that the crystalline parts contained in the nanocrystalline oxide semiconductor film are extremely fine. This suggests that it is a crystalline part.

[0270] As described above, the nanocrystalline oxide semiconductor film of this embodiment has a wide X-ray measurement range. Analysis by XRD (X-ray diffraction) revealed peaks indicating orientation. Not detected, and electron diffraction patterns obtained by limited-field electron diffraction with a wide measurement range. A halo pattern is observed in the ray. Therefore, the nanocrystalline oxide semiconductor of this embodiment The film can be said to be equivalent to a film with a macroscopically disordered atomic arrangement. However, electricity By using ultra-small electron diffraction with a sufficiently small beam diameter (e.g., 10 nmφ or less) By measuring nanocrystalline oxide semiconductor films, the resulting micro-electron diffraction patterns show spots. Bright spots can be observed. Therefore, the nanocrystalline oxide semiconductor film of this embodiment is , extremely fine crystalline parts with irregular surface orientation (for example, grain size of 10 nm or less, or 5 nm or less, It can be inferred that the film is formed by the aggregation of crystalline parts (3 nm or smaller). The nanocrystalline regions containing are included throughout the entire region in the thickness direction of the nanocrystalline oxide semiconductor film. ru.

[0271] Here, we will explain the localized energy levels of nanocrystalline oxide semiconductor films. Measuring semiconductor films using the CPM (Constant Photocurrent Method) I will now explain the results of the evaluation conducted at the standard level.

[0272] First, let's describe the structure of the sample being measured.

[0273] The measurement sample consists of an oxide semiconductor film provided on a glass substrate and a part in contact with the oxide semiconductor film. It comprises a pair of electrodes, an oxide semiconductor film, and an insulating film covering the pair of electrodes.

[0274] Next, we will explain the method for forming the oxide semiconductor film contained in the measurement sample.

[0275] The target is In-Ga-Zn oxide (In:Ga:Zn=1:1:1 [atomic ratio]). Using a t- The following conditions were used: pressure of 0.4 Pa, substrate temperature at room temperature, and DC power application of 0.5 kW. The first oxide semiconductor film was formed by sputtering. The body membrane is a nanocrystalline oxide semiconductor film.

[0276] Furthermore, the first oxide semiconductor film was heated in a nitrogen atmosphere at 450°C for 1 hour, and then at 450°C... By heating in an oxygen atmosphere for one hour, hydrogen contained in the first oxide semiconductor film is removed. The process involves supplying oxygen to the first oxide semiconductor film, and then the second oxide semiconductor film is processed. The second oxide semiconductor film was formed. The second oxide semiconductor film is a nanocrystalline oxide semiconductor film.

[0277] Next, a measurement sample having a first oxide semiconductor film, and a measurement sample having a second oxide semiconductor film CPM measurements were performed on a specific sample. Specifically, a pair of electrodes placed in contact with an oxide semiconductor film were used. With a voltage applied between the electrodes, the surface of the sample to be measured between the terminals is irradiated so that the photocurrent value remains constant. The amount of light was adjusted, and the absorption coefficient was derived from the amount of irradiated light within the desired wavelength range.

[0278] The absorption coefficient obtained by CPM measurement of each sample was reduced by removing the absorption coefficient due to band tail. The absorption coefficient, i.e., the absorption coefficient due to defects, is shown in Figure 11. In Figure 11, the horizontal axis represents the absorption coefficient. The vertical axis represents the number, and the vertical axis represents the light energy. Note that in the vertical axis of Figure 11, the oxide semiconductor film The lower end of the conduction band is set to 0 eV, and the upper end of the valence band is set to 3.15 eV. Also, in Figure 11... Each curve represents the relationship between the absorption coefficient and light energy, and corresponds to a defect level.

[0279] FIG. 11(A) shows the measurement results of a measurement sample having a first oxide semiconductor film. The absorption coefficient due to defect levels is 5.28×10 -1 cm -1 . FIG. 11(B) shows the measurement results of a measurement sample having a second oxide semiconductor film. The absorption coefficient due to defect levels is 1.75×1 0 -2 cm -1 .

[0280] Therefore, by heat treatment, the defects contained in the oxide semiconductor film can be reduced.

[0281] Note that, regarding the first oxide semiconductor film and the second oxide semiconductor film, measurement of film density was performed using the X-ray reflectometry (XRR (X-ray Reflectometry)). The film density of the first oxide semiconductor film is 5.9 g / cm 3 , and the film density of the second oxide semiconductor film is 6.1 g / cm 3 .

[0282] Therefore, by heat treatment, the film density of the oxide semiconductor film can be increased.

[0283] That is, in the oxide semiconductor film, it can be seen that the higher the film density, the fewer the defects contained in the film.

[0284] Note that this embodiment can be appropriately combined with other embodiments shown in this specification. .

[0285] (Embodiment 4) In this embodiment, an electron diffraction pattern and localized levels of a CAAC-OS film that can be used in one aspect of the present invention will be described.

[0286] ​​The CAAC-OS film used in this embodiment is an In-Ga-Zn oxide (In:Ga:Zn A target with an atomic ratio of 1:1:1, and a spalling gas containing oxygen to form a film. This is an In-Ga-Zn oxide film formed by the tarring method. Detailed explanations of the manufacturing method and other aspects can be found in Embodiments 1 and 2.

[0287] Figure 20 shows a cross-sectional TEM (Transmission Electron) of the CAAC-OS film. A microscope (transmission electron microscope) image is shown. Also, Figure 21 shows the same image as in Figure 20. The electron diffraction patterns measured using electron diffraction at points 1 to 4 are shown.

[0288] The cross-sectional TEM image shown in Figure 20 was obtained using a transmission electron microscope (Hitachi High-Technologies "H-9"). This image was taken using "000NAR" with an acceleration voltage of 300kV and a magnification of 2,000,000x. Furthermore, the electron diffraction pattern shown in Figure 21 was obtained using a transmission electron microscope (Hitachi High Technology). Using the "HF-2000" manufactured by Z, the acceleration voltage is set to 200kV, and the beam diameter is approximately 1nmφ or This is an electron diffraction pattern with a beam diameter of approximately 50 nm. Note that the beam diameter was set to 10 nm or less. Electron diffraction is sometimes specifically called micro-electron diffraction. Furthermore, the beam diameter is approximately 1 nmφ. In this case, the measurement range for electron diffraction is between 5 nmφ and 10 nmφ.

[0289] Point 1 (film surface side), Point 2 (film center), Point 3 (film substrate side) are shown in Figure 20. The electron diffraction patterns in Figures 21(A), (B), and (C) correspond to the respective patterns shown. This is an electron diffraction pattern with an electron beam diameter of approximately 1 nmφ. Also, the point shown in Figure 20... The electron diffraction pattern in T4 (the entire film) is shown in Figure 21(D), with an electron beam diameter of approximately 5 This is an electron diffraction pattern with a diameter of 0 nm.

[0290] The electron diffraction patterns at point 1 (film surface side) and point 2 (center of the film) are as follows: The formation of a pattern by (bright spots) can be observed, but at point 3 (film substrate side), the pattern is slightly different. The pattern is broken. This is because the crystalline state differs in the thickness direction of the CAAC-OS film. This suggests that... Furthermore, at point 4 (the entire film), the spots (bright spots) Since turn formation can be observed, the entire film is a CAAC-OS film, or It can be said that the membrane contains a CAAC-OS membrane.

[0291] Figure 22 is a magnified photograph of the vicinity of point 1 (film surface side) in Figure 20. A clear lattice pattern showing the orientation of the CAAC-OS film was confirmed up to the interface with the silicon oxide nitride film. It is possible.

[0292] Figures 23(A) and (B) show a different CAAC-OS film than the one used for the cross-sectional TEM observation in Figure 20. These are cross-sectional TEM images and X-ray diffraction spectra of the CAAC-OS film. There are various forms, and as shown in Figure 23(B), peak A shows the crystalline component near 2θ=31°. This appears. However, this peak may not always be clearly visible.

[0293] In the region shown concentrically on the CAAC-OS film in Figure 23(A), the electron beam diameter is 1n Figure 24 shows the results of electron diffraction performed with mφ, 20nmφ, 50nmφ, and 70nmφ. This is shown in A), (B), (C), and (D). When the electron beam diameter is 1 nmφ, see Figure 21. Similar to (A) and (B), the formation of patterns by clear spots (bright spots) can be confirmed. Yes, it is possible. However, as the electron beam diameter increases, the spot (bright spot) becomes somewhat less distinct. The diffraction pattern can be observed, and the film as a whole is a CAAC-OS film, or C It can be said that this is a membrane containing an AAC-OS membrane.

[0294] Figures 25(A) and (B) show the CAAC-OS film used for cross-sectional TEM observation in Figure 23(A) with 4 These are cross-sectional TEM images and X-ray diffraction spectra after annealing at 50°C.

[0295] In the region shown concentrically on the CAAC-OS film in Figure 25(A), the electron beam diameter is 1n Figure 26 shows the results of electron diffraction performed with mφ, 20nmφ, 50nmφ, and 70nmφ. As shown in A), (B), (C), and (D). Similar to the results shown in Figure 24, the electron beam diameter However, at 1 nm diameter, the formation of a pattern with clear spots (bright spots) can be confirmed. Yes, it is possible. Also, as the beam diameter of the electron beam increases, the spot (bright spot) becomes somewhat less distinct. However, the diffraction pattern can be confirmed, and the film as a whole is a CAAC-OS film. Alternatively, it can be said that it is a membrane containing a CAAC-OS membrane.

[0296] Figures 27(A) and (B) show the CAAC-OS film used in the cross-sectional TEM image of Figure 20, and Figure Cross-section of a CAAC-OS film different from the CAAC-OS film used for cross-sectional TEM observation of 23(A) These are a TEM image of the surface and an X-ray diffraction spectrum. CAAC-OS films have various morphologies, as shown in Figure 2. As shown in 7(B), a peak A indicating the crystalline component appears near 2θ=31°, and In some cases, peak B, which originates from the Pinel crystal structure, may appear.

[0297] In the region shown concentrically on the CAAC-OS film in Figure 27(A), the electron beam diameter is 1n Figure 28 shows the results of electron diffraction performed with mφ, 20nmφ, 50nmφ, and 90nmφ. As shown in A), (B), (C), and (D). When the electron beam diameter is 1 nmφ, a clear The formation of patterns by spots (bright spots) can be observed. As the diameter increases, the spot (bright spot) becomes slightly less distinct, but the diffraction pattern can still be observed. This is possible. Furthermore, with a beam diameter of 90 nmφ, a clearer spot (bright spot) can be observed. Therefore, the entire membrane is a CAAC-OS membrane, or CAAC- It can be said that it is a membrane that includes an OS membrane.

[0298] Here, we will explain the localization levels of the CAAC-OS film. Evaluated using CPM (Constant Photocurrent Method) measurement. I will explain the results.

[0299] First, let's describe the structure of the sample that underwent CPM measurement.

[0300] The measurement sample consists of an oxide semiconductor film provided on a glass substrate and a part in contact with the oxide semiconductor film. It comprises a pair of electrodes, an oxide semiconductor film, and an insulating film covering the pair of electrodes.

[0301] Next, we will explain the method for forming the oxide semiconductor film contained in the measurement sample.

[0302] The target is In-Ga-Zn oxide (In:Ga:Zn=1:1:1 [atomic ratio]). Using a t- The conditions are: pressure of 0.4 Pa, substrate temperature of 400°C, and application of DC power of 0.5 kW. An oxide semiconductor film was formed using the sputtering method. Next, under a nitrogen atmosphere at 450°C... After heating in an air atmosphere for 1 hour, the oxide semiconductor film is heated in an oxygen atmosphere at 450°C for 1 hour to extract the contents. A process was performed to remove the hydrogen and to supply oxygen to the oxide semiconductor film. The oxide semiconductor film in question is a CAAC-OS film.

[0303] Next, CPM measurements were performed on the sample having an oxide semiconductor film. Specifically, oxidation When a voltage is applied between a pair of electrodes placed in contact with a semiconductor film, the photocurrent value becomes constant. The amount of light irradiated onto the sample surface between the terminals is adjusted, and absorption is absorbed from the irradiated light within the desired wavelength range. The yield coefficient was derived.

[0304] The absorption coefficient obtained by CPM measurement of each sample was reduced by removing the absorption coefficient due to band tail. The absorption coefficient, i.e., the absorption coefficient due to defects, is shown in Figure 12. In Figure 12, the horizontal axis represents the absorption coefficient. The vertical axis represents the number, and the vertical axis represents the light energy. Note that in the vertical axis of Figure 12, the oxide semiconductor film The lower end of the conduction band is set to 0 eV, and the upper end of the valence band is set to 3.15 eV. Also, in Figure 12... The curve shows the relationship between the absorption coefficient and light energy, and corresponds to the defect level.

[0305] In the curve shown in Figure 12, the absorption coefficient due to the defect level is 5.86 × 10⁻⁶. -4 cm -1 in Yes, it was. In other words, the CAAC-OS film has an absorption coefficient of 1 × 10⁻¹⁰ due to defect levels. -3 Less than / cm Preferably 1 × 10 -4 The defect level density is less than / cm, indicating a low defect level density in the film.

[0306] Regarding oxide semiconductor films, X-ray reflectivity (XRR) is used. The film density was measured using etry). The film density of the oxide semiconductor film was 6.3 g / c³. m 3 Therefore, the CAAC-OS film is a film with high film density.

[0307] This embodiment can be appropriately combined with other embodiments shown herein. .

[0308] (Embodiment 5) A semiconductor with a display function using the transistor and capacitive elements shown as an example in the above embodiment. Conductor devices (display devices) can be manufactured. Also, one of the drive circuits including a transistor can be manufactured. To form a system-on-panel by integrally forming a part or the whole on the same substrate as the pixel part. This is possible. In this embodiment, a display using a transistor as an example shown in the above embodiment is possible. An example of the apparatus will be explained using Figures 29 to 31. Note that Figure 30 is the same as Figure 29(B). This is a cross-sectional view showing the cross-sectional structure of the area indicated by the dashed line MN in Figure 30. Therefore, only a portion of the pixel structure is described.

[0309] In Figure 29(A), the pixel portion 902 provided on the first substrate 901 is surrounded by A sealing material 905 is provided and sealed by a second substrate 906. Figure 29(A) In this case, it is different from the area surrounded by the sealing material 905 on the first substrate 901. In the region, a second drive formed of a single-crystal semiconductor or polycrystalline semiconductor on a separately prepared substrate... A drive circuit 903 and a first drive circuit 904 are implemented. Also, a second drive circuit 9 03. Various signals and potentials are supplied to the first drive circuit 904 or the pixel unit 902. FPC(Flexible printed circuit)918a, FPC918 It is supplied by b.

[0310] Furthermore, the first drive circuit 904 has the function of a scan line drive circuit. The drive circuit 903 functions as a signal line drive circuit.

[0311] In Figures 29(B) and 29(C), the pixel portion 90 is provided on the first substrate 901. A sealing material 905 is provided so as to surround 2 and the first drive circuit 904. The second substrate 906 is provided on top of the pixel section 902 and the first drive circuit 904. The pixel section 902 and the first drive circuit 904 are connected to the first substrate 901 and the sealing material 905. The display element is sealed together with the second substrate 906. (Figures 29(B) and 2) In 9(C), the region surrounded by the sealing material 905 on the first substrate 901 and In a different region, a second drive formed from a separately prepared single-crystal semiconductor or polycrystalline semiconductor... The drive circuit 903 is implemented. In Figures 29(B) and 29(C), the second drive Various signals are provided to the drive circuit 903, the first drive circuit 904, or the pixel unit 902, and The potential is supplied by the FPC918.

[0312] Furthermore, in Figures 29(B) and 29(C), a second drive circuit 903 is formed separately. The example shown is mounted on the first circuit board 901, but the configuration is not limited to this. The drive circuit may be formed and implemented separately, or it may be part of the second drive circuit or the first drive circuit. It is also acceptable to separately form and implement only a part of it.

[0313] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG(Ch IP On Glass method, wire bonding method, or TCP (Tape Carbide) method. Methods such as implementing the rier package can be used. Figure 29(A) This is an example of implementing the second drive circuit 903 and the first drive circuit 904 using the COG method. Figure 29(B) shows an example of implementing the second drive circuit 903 using the COG method. C) is an example in which the second drive circuit 903 is implemented as TCP.

[0314] Furthermore, the display device includes a panel in which the display elements are sealed, and a controller on the panel. Includes modules with ICs and other components mounted on them.

[0315] In this specification, "display device" refers to an image display device or a display device. Furthermore, it can function as a light source (including lighting devices) instead of a display device. A connector, for example, a module to which an FPC or TCP is attached, and a preamplifier at the end of the TCP. A module equipped with a circuit board, or a display element, is equipped with an IC (integrated circuit) using the COG method. Modules in which the ) are directly implemented are also included in the display device.

[0316] Furthermore, the pixel section and the first drive circuit provided on the first substrate have multiple transistors. Therefore, the transistor shown in the above embodiment can be applied.

[0317] Liquid crystal elements, light-emitting elements, and the like can be used as display elements in a display device. One example of a liquid crystal element is one in which the transmission or non-transmission of light is controlled by the optical modulation effect of the liquid crystal. There is such an element. This element can be constructed from a pair of electrodes and a liquid crystal layer. The optical modulation effect of liquid crystals is due to the electric field acting on the liquid crystal (horizontal electric field, vertical electric field, or diagonal electric field). It is controlled by (including the electric field in the direction). Specifically, an example of a liquid crystal element is: Nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, disco-liquid liquid crystal, thermo Tropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal (P DLC, ferroelectric liquid crystal, antiferroelectric liquid crystal, main-chain liquid crystal, side-chain polymer liquid crystal, banana-shaped liquid crystal, etc. These are some examples. Also, regarding the driving method of the LCD, TN (Twisted Nem atic) mode, STN (Super Twisted Nematic) mode, I PS (In-Plane-Switching) mode, FFS (Fringe Fie ld Switching) mode, MVA (Multi-domain Vertic) mode al Alignment) mode, PVA(Patterned Vertical) mode Alignment mode, ASV (Advanced Super View) mode ASM(Axially Symmetric aligned Micro-ce ll) mode, OCB (Optically Compensated Birefringence) (ngence) mode, ECB (Electrically Controlled B) irefringence) mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode, PDLC (Polymer Dispersed Light) iquid Crystal mode, PNLC (Polymer Network L) iquid Crystal) mode, guest host mode, blue phase (Blue Ph There are modes such as ase. However, this is not limited to these, and also includes liquid crystal elements and their driving methods. Various materials can be used. The brightness of the light-emitting element can be controlled by current or voltage. This category includes elements that are subjected to such treatment, specifically inorganic EL (Electroluminescent) This includes fluorescence elements, organic EL elements, etc. Also, electronic inks and other electrically charged elements. Display media in which the contrast changes can also be applied. Figure 30 shows the display element and Next, we will show an example of a liquid crystal display device using liquid crystal elements.

[0318] Figure 30 is a cross-sectional view of a vertical electric field type liquid crystal display device. This liquid crystal display device has connection terminals It has poles 915 and terminal electrodes 916, and connecting terminal electrodes 915 and terminal electrodes 916 It is electrically connected to the terminals of the FPC918 via the anisotropic conductive material 919.

[0319] The connecting terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 is The source and drain electrodes of transistors 910 and 911 are formed of the same conductive film. It is.

[0320] Furthermore, the pixel section 902 and the first drive circuit 904 provided on the first substrate 901 are connected to the tra It has multiple transistors, and the transistor 910 included in the pixel section 902 and the first drive cycle The transistor 911 included in circuit 904 is shown as an example. Transistors 910 and On the transistor 911 are the insulating film 129, insulating film 131, and insulating film shown in Embodiment 1. An insulating film 924 corresponding to 132 is provided. Furthermore, the insulating film 924 has high flatness. An insulating film 934 is provided for sealing. Furthermore, the insulating film 923 is a nitride insulating film.

[0321] In this embodiment, the transistor 910 is configured to connect to the pixel 101 shown in Embodiment 1 above. The transistors provided can be applied. Also, as transistor 911, The transistor provided in the first drive circuit 104 shown in Embodiment 1 is applied. This is possible. Note that the transistor 911 is shown as an example with a conductive film 917, The configuration may also be one in which the conductive film 917 is not provided.

[0322] Furthermore, the oxide semiconductor film 927, insulating film 924, insulating film 934, and the first electrode 930 are This is used to construct the capacitive element 936. The oxide semiconductor film 927 is connected to the capacitance line 929 and the electrical Connect electrically. Capacitive line 929 is connected to the gates of transistors 910 and 911. It is formed from the same conductive film as the electrode. Note that, in this embodiment, the capacitive element 936 is as follows: Although the capacitive elements shown are illustrated, other capacitive elements shown in other embodiments can be used as appropriate. ru.

[0323] The transistor 910 provided in the pixel section 902 is electrically connected to the display element and the display panel It constitutes the system. The display element is not particularly limited as long as it can display information, and various display elements can be used. It is possible to be there.

[0324] The liquid crystal element 913, which is a display element, consists of a first electrode 930, a second electrode 931, and a liquid crystal layer. Includes 908. Furthermore, insulating film 932 functions as an alignment film, sandwiching the liquid crystal layer 908. And an insulating film 933 is provided. Also, the second electrode 931 is on the second substrate 906 side. The first electrode 930 and the second electrode 931 are configured to overlap via a liquid crystal layer 908. It is.

[0325] A first electrode 930 and a second electrode 931 are provided to apply voltage to the display element. In pixel electrodes (also called common electrodes or counter electrodes), the direction of the extracted light and the electrodes are set Depending on the location where it is applied and the pattern structure of the electrodes, the transparency and reflectivity can be selected. ru.

[0326] The first electrode 930 and the second electrode 931 are similar to the pixel electrode 121 shown in Embodiment 1. The materials can be used as appropriate.

[0327] Furthermore, the spacer 935 is a columnar spacer obtained by selectively etching the insulating film. Therefore, in order to control the distance (cell gap) between the first electrode 930 and the second electrode 931 It is provided in [location]. A spherical spacer may also be used.

[0328] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. Depending on the conditions, the liquid crystal material can be classified into cholesteric phase, smectic phase, cubic phase, and chi. It exhibits the ranematic phase, isotropic phase, etc.

[0329] Alternatively, a liquid crystal exhibiting a blue phase without an alignment layer may be used. The blue phase is one of the liquid crystal phases. Yes, as the temperature of a cholesteric liquid crystal is increased, it transitions from the cholesteric phase to the isotropic phase. This is the phase that appears earlier. The blue phase only appears within a narrow temperature range, so improving the temperature range is necessary. To achieve this, a liquid crystal composition mixed with a chiral agent is used in the liquid crystal layer. The alignment film is It is composed of an organic resin, and since the organic resin contains hydrogen or water, it is one aspect of the present invention. This may degrade the electrical characteristics of transistors in semiconductor devices. Therefore, liquid crystal By using a blue phase as a layer, one aspect of the present invention is a semiconductor device without using an organic resin. This allows for the fabrication of a device and the acquisition of a highly reliable semiconductor device.

[0330] The first substrate 901 and the second substrate 906 are fixed together by a sealing material 925. Material 925 can be made of organic resins such as thermosetting resins and photocuring resins. The sealing material 925 is in contact with the insulating film 924. The sealing material 925 is shown in Figure 29. It is equivalent to aluminum alloy 905.

[0331] The sealing material 925 is provided on the insulating film 924. The insulating film 934 is also a sealing material It is located inside 925. The uppermost layer of insulating film 924 is a nitride insulating film, and water from the outside It is possible to suppress the intrusion of impurities such as water and other elements. On the other hand, the insulating film 934 is permeable to moisture. The cost is high. For this reason, an insulating film 934 is provided on the inside of the sealing material 925, and a seal is placed on the insulating film 924. By incorporating material 925, the intrusion of impurities such as hydrogen and water from the outside is suppressed, and transients This can suppress variations in the electrical characteristics of transistors 910 and 911.

[0332] Furthermore, in liquid crystal display devices, a black matrix (light-shielding film), a polarizing member, a phase difference member, Optical components (optical substrates) such as anti-reflective members are provided as appropriate. For example, polarizing substrates and Circular polarization using a phase-difference substrate may also be used. Furthermore, backlights and sidelights may be used as light sources. You may use any of these.

[0333] Furthermore, transistors are susceptible to damage from static electricity, etc., therefore, a protection circuit for the drive circuit is necessary. It is preferable to provide this. The protection circuit is preferably constructed using nonlinear elements.

[0334] Figure 31 shows the liquid crystal display device shown in Figure 30, with a second electrode 93 provided on the substrate 906. An example is shown in which a common connection part (pad part) for electrically connecting to 1 is formed on the substrate 901. vinegar.

[0335] The common connection section is positioned to overlap with the sealing material used to bond substrates 901 and 906. The second electrode 931 is then electrically connected to the first electrode 931 via conductive particles contained in the sealing material. Alternatively, a common connection point may be provided in an area that does not overlap with the sealing material (excluding the pixel area), and the common connection A paste containing conductive particles is provided separately from the sealing material so as to overlap the connecting portion, and the second electrode 93 It may be electrically connected to 1.

[0336] The right side of Figure 31(A) is a cross-sectional view of the transistor 910 provided in the pixel section. The left side of (A) is a common connection that can be formed using the same process as the transistor in question. This is a cross-sectional view of the section. The common connection section shown in Figure 31(A) is the same as the common connection section shown in Figure 31(B). This corresponds to the cross-section of IJ in the top view.

[0337] The common potential line 975 is provided on the gate insulating film 922 and is the source power of the transistor 910. It is manufactured using the same materials and processes as electrode 971 or drain electrode 973.

[0338] Furthermore, the common potential line 975 is covered with insulating film 924 and insulating film 934, and insulating film 924 The insulating film 934 has multiple openings at positions that overlap with the common potential line 975. The opening connects to either the source electrode 971 or the drain electrode 973 of transistor 910, and the first It is manufactured using the same process as the contact hole that connects electrode 930.

[0339] Furthermore, the common potential line 975 and the common electrode 977 are provided in the insulating film 924 and the insulating film 934. Electrical connection is made at the opening. The common electrode 977 is provided on the insulating film 934. Using the same materials and processes as the connection terminal electrode 915 and the first electrode 930 of the pixel section It is made by [doing something].

[0340] In this way, the common connection section is fabricated by using the same process as the fabrication process for the switching elements of the pixel section 902. It is possible.

[0341] The common electrode 977 is an electrode that comes into contact with conductive particles contained in the sealing material, and is located on the substrate 906. An electrical connection is made with the second electrode 931.

[0342] Furthermore, as shown in Figure 31(C), the common potential line 985 is connected to the gate electrode of transistor 910. It may also be manufactured using the same materials and processes.

[0343] In the common connection shown in Figure 31(C), the common potential line 985 is connected to the gate insulating film 922, and the insulation Provided beneath the edge film 924 and insulating film 934, the gate insulating film 922 and insulating film 924 The insulating film 934 has multiple openings at positions that overlap with the common potential line 985. These openings are One of the source electrode 971 or drain electrode 973 of transistor 910 and the first electrode 9 The insulating film 924 and insulating film 93 are made using the same process as the contact holes that connect 30. After etching 4, the gate insulating film 922 is further selectively etched to form it. It will be done.

[0344] Furthermore, the common potential line 985 and the common electrode 987 are connected to the gate insulating film 922 and insulating film 924. The common electrode 987 is electrically connected at the opening provided in the insulating film 934. It is provided on the film 934 and made of the same material as the connection terminal electrode 915 and the first electrode 930 of the pixel portion. It is manufactured using the same process.

[0345] Therefore, by applying the transistor and capacitance element shown in the above embodiment, an aperture can be created. We can provide a semiconductor device having a capacitive element that increases charge capacity while increasing the efficiency. As a result, a semiconductor device with excellent display quality can be obtained.

[0346] Furthermore, the oxide semiconductor film, which is a semiconductor film contained in the transistor, has reduced oxygen vacancies, and water Because impurities such as elemental compounds are reduced, a semiconductor device according to one aspect of the present invention is good This will become a semiconductor device with electrical properties.

[0347] This embodiment can be appropriately combined with other embodiments shown herein. .

[0348] (Embodiment 6) In this embodiment, the semiconductor device according to one aspect of the present invention can be applied to process image information. The configuration of the information processing device capable of displaying information will be explained with reference to Figures 32 and 33. I will reveal it.

[0349] Specifically, the G signal used to select pixels is preferably transmitted at a frequency of 30 Hz (30 times per second) or higher. It outputs at a frequency of 60Hz (60 times per second) or more but less than 960Hz (960 times per second). The first mode is 11.6 μHz (once a day) or more, and 0.1 Hz (0.1 times per second). Frequency less than 0.28 mHz (once per hour) or more, preferably 1 Hz (once per second) or less. This section describes an information processing device that has a second mode of outputting at full frequency.

[0350] When displaying a still image using an information processing device according to one embodiment of the present invention, the refresh rate is set to 1H The frequency can be less than Hz, preferably 0.2Hz or less, providing a display and usage that is easy on the user's eyes. It is possible to display information that reduces eye strain and does not burden the user's eyes. Furthermore, the display image is refreshed at an optimal frequency depending on the nature of the image displayed on the display unit. This is possible. Specifically, it allows for a lower refresh rate compared to displaying videos smoothly. By doing so, it is possible to display still images with less flicker. In addition, consumption It also has the effect of reducing power consumption.

[0351] Figure 32 is a block diagram illustrating the configuration of an information processing apparatus having a display function according to one embodiment of the present invention. That is the case.

[0352] Figure 33 is a block diagram illustrating the configuration of the display unit of a display device according to one embodiment of the present invention. .

[0353] The information processing device 600 having a display function described in this embodiment includes a display device 640 and a calculation device. The device includes a 620 and an input means 500 (see Figure 32).

[0354] The display device 640 has a display unit 630 and a control unit 610 (see Figure 32). Primary image Signal 625_V and primary control signal 625_C can be supplied to the display device 640. The unit 640 can display image information on the display unit 630.

[0355] The primary image signal 625_V contains not only the tonal information (which can also be called luminance information) of the image, but also, for example, chromaticity information. Includes reports, etc.

[0356] The primary control signal 625_C controls, for example, the timing of the scanning operation of the display device 640. This includes signals for that purpose.

[0357] The power supply potential and other parameters are supplied to the control unit 610 and the display unit 630 of the display device 640.

[0358] The control unit 610 has the function of controlling the display unit 630. For example, the secondary image signal 615_ Generates V and / or secondary control signals 615_C, etc.

[0359] For example, the control unit 610 may be configured to include a polarity determination circuit. The polarity determination circuit controls the signal The polarity can be reversed frame by frame.

[0360] The polarity determination circuit notifies the timing to reverse the polarity of the secondary image signal 615_V, and the The control unit 610 has a function to reverse the polarity of the secondary image signal 615_V according to the timing. The configuration may also be as follows. The polarity of the secondary image signal 615_V is set within the control unit 610. It may be inverted, or it may be inverted within the display unit 630 according to a command from the control unit 610. That's good too.

[0361] Furthermore, the polarity determination circuit has a counter and a signal generation circuit, and uses the synchronization signal to generate a secondary image signal 6 It may also have a function to determine the timing for reversing the polarity of 15V.

[0362] The counter has the function of counting the number of frame periods using pulses from the horizontal synchronization signal. Furthermore, the signal generation circuit determines the timing for inverting the polarity of the secondary image signal 615_V. It has a function to notify the control unit 610. This allows the frame obtained in the counter Using information about the number of periods, the poles of the secondary image signal 615_V for each of multiple consecutive frame periods. It is possible to reverse gender.

[0363] The secondary image signal 615_V can include image information.

[0364] For example, the control unit 610 generates the secondary image signal 615_V from the primary image signal 625_V. The secondary image signal 615_V may be output.

[0365] Furthermore, the control unit 610 uses the difference between the primary image signal 625_V and the reference potential Vsc as the amplitude, and A signal whose color is reversed frame by frame may be generated as the secondary image signal 615_V.

[0366] The secondary control signal 615_C is connected to the first drive circuit (also known as the G drive circuit 632) of the display unit 630. A signal to control (u) or a second drive circuit (also called S drive circuit 633) It can include signals for that purpose.

[0367] For example, the control unit 610 includes a primary control signal that includes synchronization signals such as a vertical synchronization signal and a horizontal synchronization signal. A secondary control signal 615_C may be generated from signal 625_C.

[0368] The secondary control signal 615_C includes, for example, a start pulse signal SP, a latch signal LP, and a pulse width Includes control signals PWC, clock signals CK, etc.

[0369] Specifically, the secondary control signal 615_C controls the operation of the S drive circuit 633. Start pulse signal SP for the path, clock signal CK for the S drive circuit, latch signal LP, etc. It can include a star for the G drive circuit that controls the operation of the G drive circuit 632. Includes pulse signal SP, clock signal CK for G drive circuit, pulse width control signal PWC, etc. It is possible to do so.

[0370] The display unit 630 includes a pixel unit 631, a first drive circuit (also called the G drive circuit 632), and the It has two drive circuits (also called S drive circuit 633).

[0371] The pixel section 631 does not contain light with a wavelength shorter than 420 nm in its display light, and has a resolution of 150 ppi or higher. It has multiple pixels 631p provided with a resolution of and wiring connecting the multiple pixels. Each pixel 631p is connected to at least one of the scan lines G and at least one of the signal lines S. They are connected to one. Note that the type and number of wires are related to the configuration and number of pixels in 631p. And it depends on the arrangement.

[0372] For example, if pixels 631p are arranged in the pixel section 631 in an x ​​x x y matrix... In addition, signal lines S1 to Sx and scan lines G1 to Gy are arranged within the pixel section 631. Place it (see Figure 33(A-1)). Multiple scan lines (G1 to Gy) supply the G signal to each line. It is possible. Multiple signal lines (S1 to Sx) supply S signals to multiple pixels. It is possible.

[0373] The G drive circuit 632 can select the scan line G by controlling the supply of the G signal 632_G (Figure 3). (See 2).

[0374] For example, the pixel portion 631 can be divided into multiple regions (specifically, the first region 631a, the second region 631b, etc.) It may also be divided into a third region (631c) and driven (see Figure 33(A-2)).

[0375] Each region contains multiple pixels 631p, and multiple scans for selecting each pixel 631p row by row. Multiple signal lines S for supplying the S signal 633_S to line G and selected pixel 631p It is possible to provide this.

[0376] Furthermore, there are multiple G drive circuits (specifically, the first G drive circuit 632a, the second G drive circuit 632b) A third G drive circuit (632c) may also be provided.

[0377] The G drive circuit controls the supply of the G signal 632_G to the scan lines G provided in each region (specifically Specifically, the first G drive circuit 632a controls scan lines G1 to Gj, and the second G drive circuit 632b controls scan line The Gj+1 to G2j and the 3G drive circuit 632c select scan lines G2j+1 to Gy). can.

[0378] The G drive circuit uses a first drive signal (also called the G signal) 632_G to select the pixel circuit 634. The G drive circuit 632 outputs the G signal 632_ to the pixel circuit 634. The G drive circuit 632 selects each scan line. G is applied to each scan line at a frequency of 30 Hz (30 times per second) or more, preferably 60 Hz (30 times per second) A first mode that outputs at a frequency of 60 times or more but less than 960 Hz (960 times per second), and 1 A frequency of 1.6 μHz (once a day) or more and less than 0.1 Hz (0.1 times per second), preferably. It outputs at a frequency of 0.28 mHz (once per hour) or more and less than 1 Hz (once per second). It has two modes.

[0379] The G drive circuit 632 can operate by switching between a first mode and a second mode. For example, secondary control signal 615_C or secondary control signal 615_ that includes a mode switching signal Using the start pulse for the G drive circuit contained in C, the first mode of the G drive circuit 632 And it is possible to switch to a second mode. Specifically, the G drive output by the control unit 610 The output frequency of the start pulse for the circuit may be controlled.

[0380] The G signal 632_G is generated by the G drive circuit 632. The G signal 632_G is generated row by row. The output is displayed on pixel 631p, and pixel 631p is selected row by row.

[0381] The display unit 630 may also have an S drive circuit 633. The S drive circuit receives a second drive signal (Also called S signal 633_S) is generated from the secondary image signal 615_V, and the S signal 633 Controls the supply of _S to signal lines S (specifically S1 to Sx).

[0382] The S signal 633_S contains image grayscale information, etc. The S signal 633_S is connected to the G signal 632_G. It is supplied to the selected pixel 631p.

[0383] The pixel section 631 has multiple pixels 631p.

[0384] Pixel 631p comprises a display element 635 and a pixel circuit 634 including the display element 635. (See Figure 32).

[0385] The pixel circuit 634 holds the supplied S signal 633_S and transmits image information to the display element 635. A portion of the display is shown. Note that the display element 635 is selected based on its type or driving method. It can be used in the basic circuit 634.

[0386] As an example of a pixel circuit 634, a configuration in which a liquid crystal element 635LC is applied to a display element 635 is shown. This is shown in 33(B-1).

[0387] The pixel circuit 634 has a gate electrode to which the G signal 632_G is input, and a second electrode to which the S signal is input. A transistor 634t has one electrode and the second electrode of the transistor 634t has electricity A liquid crystal element 635 comprising a first electrode that is directly connected and a second electrode to which a common potential is supplied. It comprises LC and

[0388] The pixel circuit 634 is a transistor that controls the supply of the S signal 633_S to the display element 635. It has a tonnage of 634 tons.

[0389] The gate of transistor 634t is connected to one of the scan lines G1 through Gy. The source and drain of transistor 634t are connected from signal line S1 to signal line One of the Sx is connected, and the other is the source and drain of transistor 634t. It is connected to the first electrode of the display element 635.

[0390] Pixel 631p controls the input of the S signal 633_S to pixel 631p via transistor 634t. It is used as a switching element. Furthermore, multiple transistors are used as a single switching element. It may also be used as a child for pixel 631p. Multiple transistors can be connected in parallel to form one It can be used as a switching element, or connected in series, or a combination of series and parallel. A split connection may also be used.

[0391] Pixel 631p maintains the voltage between the first and second electrodes of the liquid crystal element 635LC as needed. In addition to the capacitive element 634c used for this purpose, transistors, diodes, resistors, capacitive elements, and It may also have other circuit elements such as an inductor. The second electrode of the display element 635 is A predetermined common potential Vcom is given.

[0392] The capacitance of the capacitive element 634c can be adjusted as appropriate. For example, in the second mode described later... When the S signal 633_S is held for a relatively long period of time (specifically, 1 / 60 sec or more) A capacitive element 634c is provided. Alternatively, a configuration other than the capacitive element 634c can be used to measure the pixel rotation. The capacitance of the path 634 may be adjusted. Also, the first electrode and the second electrode of the liquid crystal element 635LC A capacitive element may be substantially formed by stacking these elements.

[0393] As another example of a pixel circuit, Figure 3 shows a configuration in which the EL element 635EL is applied to the display element 635. This is shown in 3(B-2).

[0394] The pixel circuit 634EL has a gate electrode to which the G signal 632_G is input, and an S signal to which... The first electrode and the second electrode electrically connected to the first electrode of the capacitive element 634c, It has a first transistor 634t_1. A gate electrode electrically connected to the second electrode of 1, and the second electrode of the capacitive element 634c are electrically connected. A first electrode that is electrically connected to the first electrode of the EL element 635EL. It has a second transistor 634t_2 having a second electrode. It also has a capacitive element 63 The second electrode of 4c and the first electrode of the second transistor 634t_2 are supplied with the power supply potential. The power supply is supplied, and a common potential is supplied to the second electrode of the EL element 635EL. The potential difference between the common potential and the EL element 635EL is greater than the light emission start voltage.

[0395] In the pixel circuit 634, the transistor 634t controls the potential of the signal line S relative to the display element 635. This controls whether or not the first electrode is supplied with power.

[0396] Furthermore, a transistor using an oxide semiconductor is suitable as a display device according to one aspect of the present invention. A transistor can be applied. For details on transistors using oxide semiconductors, see below. The descriptions of Embodiments 1 and 2 can be given due consideration.

[0397] Transistors with an oxide semiconductor film applied have a source-drain leakage in the off state. The current (off-current) is extremely low compared to conventional silicon transistors. This is possible by using transistors with extremely low off-currents in the pixel sections of the display. This allows for a reduction in frame rate while suppressing the occurrence of flicker.

[0398] The display element 635 is not limited to the liquid crystal element 635LC; for example, by applying voltage, it can also be luminescent. OLED elements that exhibit electroluminescence, and electrophoresis Various display elements can be applied, such as electronic ink that uses motion.

[0399] For example, the polarization transmittance of the liquid crystal element 635LC is controlled by the potential of the S signal 633_S. This allows for the display of gradations.

[0400] For example, when a transmissive liquid crystal element is applied to the display element 635, the light supply unit 650 is the display unit 6 It can be provided in 30. The light supply unit 650 has a light source. The control unit 610 controls the light supply unit 6 Controls the driving of the light source of 50. Light is supplied to the pixel section 631 where the liquid crystal element is provided. It functions as a backlight.

[0401] The light source for the light supply unit 650 is a cold cathode fluorescent lamp, a light-emitting diode (LED), or an OLE D elements and the like can be used.

[0402] In particular, a configuration in which the intensity of blue light emitted by the light source is weaker than the intensity of other colored light is preferred. The blue light emitted by it is not absorbed by the cornea or lens of the eye, and reaches the retina. To achieve this, there are long-term effects on the retina (e.g., age-related macular degeneration), and blue light exposure until late at night can cause problems. Circadian rhythms when exposed to This can reduce adverse effects on (hm). Specifically, 400nm or less, preferably 420nm Light that does not contain light having a wavelength of m or less, more preferably 440 nm or less (also known as UVA). A light source that emits light is preferred.

[0403] In addition, in a pixel of a semiconductor device according to one aspect of the present invention, light having the above wavelength is absorbed and transmitted. It has characteristics that make it difficult to pass through. Therefore, even if a light source emitting light with the above wavelength is used, By using a semiconductor device according to one aspect of the invention, light having the above wavelength can be reduced or blocked. It is possible.

[0404] The arithmetic unit 620 includes a primary image signal 625_V and a primary control signal including a mode switching signal. Generate code 625_C.

[0405] The mode switching signal may be generated by command of the user of the information processing device 600.

[0406] The user of the information processing device 600 can issue a command to switch the display using the input means 500. This is possible. The image switching signal 500_C is supplied to the arithmetic unit 620, and the arithmetic unit 620 It may be configured to output a primary control signal 625_C that includes a mode switching signal.

[0407] A primary control signal 625_C, including a mode switching signal, is sent to the control unit 610 of the display device 640. The power is supplied, and the control unit outputs a secondary control signal 615_C which includes a mode switching signal.

[0408] For example, secondary control including a mode switching signal to switch from a second mode to a first mode. When signal 615_C is supplied to the G drive circuit 632, the G drive circuit 632 enters a second mode. Then it switches to the first mode. Then the G drive circuit 632 sends the G signal for more than one frame. It outputs a signal, and then switches to the second mode.

[0409] Specifically, when the input means 500 detects a page-turning operation, an image switching signal 5 The 00_C may be configured to be output to the arithmetic unit 620.

[0410] The arithmetic unit 620 generates a primary image signal 625_V that includes a page-turning operation, and the primary It outputs a primary control signal 625_C, which includes a mode switching signal, along with the image signal 625_V. .

[0411] The control unit 610 to which the primary image signal 625_V and the primary control signal 625_C are supplied is , a secondary control signal 615_C including a mode switching signal, and a secondary image including a page turning operation The image signal 615V is supplied.

[0412] The G drive circuit 632, to which the secondary control signal 615_C including the mode switching signal is supplied, It switches from mode 2 to mode 1 and outputs the G signal 632_G at a high frequency.

[0413] The S drive circuit 633, to which the secondary image signal 615_V including the page-turning operation is supplied, The S signal 633_S generated from the secondary image signal 615_V is output to the pixel circuit 634.

[0414] This allows the 631p pixel to handle a large number of frame images, including page-turning actions, at a high frequency. It can be rewritten. As a result, the secondary image signal 615_V, which includes the page-turning operation, It can display smoothly.

[0415] The primary image signal 625_V output by the arithmetic unit 620 to the display unit 630 determines whether it is a moving image or a still image. It determines whether this is the case, and according to the determination result, it outputs a primary control signal 625_C including a mode switching signal. It may be configured to output.

[0416] Specifically, when the primary image signal 625_V is a moving image, the arithmetic unit 620 When the first mode is selected, the following switching signal is output, and the image is still, The arithmetic device 620 may be configured to output a switching signal for selecting a second mode.

[0417] Furthermore, the method for determining whether an image is moving or still is to use the primary image signal 625_V, which is included in the If the difference in signal between one frame and the frames before and after it is greater than a predetermined difference, You can distinguish between a moving image when the image is high and a still image when it is lower.

[0418] When the control unit 610 switches the operating mode of the G drive circuit from one mode to another mode (For example, when switching from the second mode to the first mode) the G drive circuit receives the G signal 63 The system may be configured to switch to another mode after outputting 2_G one or more predetermined times. .

[0419] The input means 500 includes a touch panel, touchpad, mouse, joystick, etc. Rack balls, data globes, imaging devices, etc. can be used. The computing unit 620 This allows the electrical signals input from the input means 500 to be associated with the coordinates of the display unit. This allows the user to input commands to process the information displayed on the display unit. can.

[0420] The information that the user inputs from the input means 500 includes, for example, an image displayed on the display unit. A command to drag to change the display position, to send the currently displayed image and display the next image. A command to swipe in order to move through a strip of images in order, a command to scroll in order to move through specific Select an image command, pinch in to change the size of the displayed image, pinch out Other commands that can be used include commands to wake up, as well as commands to input handwritten text.

[0421] Furthermore, illuminance is calculated by taking into account the spectral sensitivity of the eye, which is the amount of light incident on a unit area of ​​the illuminated surface per unit time. It is the amount of light that is emitted.

[0422] This embodiment can be appropriately combined with other embodiments shown herein. .

[0423] (Embodiment 7) In this embodiment, the information processing method of an information processing apparatus using a semiconductor device according to one aspect of the present invention is I will explain this further with reference to Figure 34.

[0424] Specifically, the display unit of the information processing apparatus using a semiconductor device according to one aspect of the present invention can display images. This section explains the method of generating images. In particular, it describes how to overwrite the image displayed on the display unit with another image. When switching between images, use a method that is easy on the user's eyes, and reduce eye strain. This explains how to change the image and how to switch images in a way that does not strain the user's eyes.

[0425] Figure 34 is a block diagram illustrating the configuration of an information processing apparatus using a semiconductor device according to one aspect of the present invention. And a schematic diagram to explain the image data.

[0426] One aspect of the present invention is a display unit of an information processing device that slowly rewrites the displayed image. That is the case.

[0427] This reduces the strain on the user's eyes when switching displays. As a result, calculations This provides a novel information processing method that allows images containing information processed by the department to be displayed in a way that is easy on the eyes.

[0428] Rapidly switching between images can induce eye strain in users. For example, This includes cases where there is a significant change in the scene between moving images or when switching between different still images. .

[0429] When switching between different images, the display should not switch instantaneously, but rather gradually. It is preferable to switch and display images smoothly and naturally.

[0430] For example, when switching the display from the first still image to the second still image, the first still image and A moving image or / o where the first still image fades out during the second still image. It is preferable to insert a video in which the first still image and the second still image fade in. As the image fades out, a second still image fades in simultaneously (crossfade). As shown (also called "do"), a video may be inserted which is a superimposed image of both images, the first still image A video showing the process of an image gradually changing into a second still image (also known as morphing). You may insert it.

[0431] The first still image data is displayed at a low refresh rate, followed by the image switching. After displaying the image for the first time at a high refresh rate, the second still image data is displayed at a lower refresh rate. You may also display it at the refresh rate.

[0432] The following describes an example of how to switch between two different images, A and B.

[0433] Figure 34(A) is a block diagram showing the configuration of a display unit capable of switching images. The display unit shown in Figure 34(A) consists of a calculation unit 701, a storage unit 702, a control unit 703, and It is equipped with a display unit 704.

[0434] In the first step, the arithmetic unit 701 receives data for images A and B from an external storage unit or the like. The data is stored in the memory unit 702.

[0435] In the second step, the calculation unit 701 calculates image A according to a preset number of divisions. Based on the image data of image B, new image data is generated sequentially.

[0436] In the third step, the generated image data is output to the control unit 703. The input image data is displayed on the display unit 704.

[0437] Figure 34(B) shows the generation when switching images stepwise from image A to image B. This is a schematic diagram to explain image data.

[0438] In Figure 34(B), N (where N is a natural number) image data are generated from image A to image B. When each image data is displayed for a period of f (where f is a natural number) frames, This is shown. Therefore, the period from image A to image B is f × N frames. It becomes mu.

[0439] Here, the parameters such as N and f mentioned above can be freely set by the user. This is preferable. The calculation unit 701 acquires these parameters in advance and performs the calculation according to those parameters. , generate image data.

[0440] The i-th generated image data (where i is an integer between 1 and N) is the image data of image A and the image data of the i-th image. It can be generated by applying weights to the image data of image B and then summing them up. For example, in a given pixel, the brightness (gradation) when displaying image A is a, and when displaying image B... If the brightness (gradation) at that time is b, then when the i-th generated image data is displayed... The brightness (grayscale) c of the pixel in question is the value shown in Equation 1. Note that grayscale refers to the shades of gray displayed by the display unit. This refers to the stage. An image that only has two levels, black and white, is an image with two tonal levels. It is possible to do so. For example, the display unit of a conventional personal computer uses red, green, and blue It has subpixels that display color. Each subpixel displays 256 levels of intensity. The following signal is input.

[0441]

number

[0442] Using the image data generated in this way, we can switch from image A to image B. This allows for a gradual (silent) and natural transition between discontinuous images.

[0443] Note that in Equation 1, when a=0 for all pixels, the image is gradually cut from black to image B. This corresponds to a fade-in effect. Also, if b=0 for all pixels, then image A is... This corresponds to a fade-out effect, where the image gradually switches to a black background.

[0444] The above describes a method for switching between images by temporarily overlapping two images. This method can also be used to avoid overlapping.

[0445] If the two images are not to overlap, when switching from image A to image B, there is an in-between You may insert a black image. In this case, when transitioning from image A to the black image, or from the black image Even when transitioning to image B, or both, using the image switching method described above Good. Also, the image inserted between image A and image B can be a single image such as a white image, not just a black image. You may use a color image, or you may use a multi-colored image that is different from image A or image B.

[0446] By inserting another image, especially a single-color image such as a black image, between image A and image B, The timing of the image switch can be perceived more naturally by the user, reducing stress for the user. Images can be switched without the user noticing any lag.

[0447] This embodiment can be appropriately combined with other embodiments shown herein. .

[0448] (Embodiment 8) In this embodiment, the configuration of an information processing apparatus using a semiconductor device according to one aspect of the present invention is described below. This will be explained with reference to Figures 35 and 36.

[0449] Figure 35 is a diagram illustrating the effects of the information processing device.

[0450] Figure 36 is a block diagram illustrating the configuration of an information processing device.

[0451] There are two types of eye strain: nervous system fatigue and muscular system fatigue. A schematic diagram illustrating eye strain is provided below. This is shown in Figure 35(A).

[0452] Nervous system fatigue occurs when you stare at the light or flashing screen of the display for extended periods, as the brightness of the display can be a factor. It is something that stimulates and fatigues the retina, nerves, or brain of the eye. Fluorescent lights and conventional display devices... The phenomenon of the indicator flashing rapidly is called flicker, and this type of flicker is a sign of nervous system fatigue. It causes labor.

[0453] Muscle fatigue occurs when the ciliary muscles, which are used for focusing, are overworked. It is something that is done.

[0454] Figure 35(A-1) shows a schematic diagram representing the display of a conventional display unit. The conventional display unit displays for 1 second The image has been rewritten 60 times. By staring at such a screen for a long time... This may stimulate the user's retina, nerves, or brain, potentially causing eye strain.

[0455] Also, as shown in Figure 35(A-2), when the size of one pixel is large (for example, when the resolution is 1 If the display is less than 50 ppi, the outlines of characters and other elements displayed on the screen will appear blurred. If you stare at blurred text or other objects for an extended period, the ciliary muscles will constantly try to maintain focus. Constantly moving to try and adjust your gaze can cause tension and strain your eyes.

[0456] Furthermore, methods for quantitatively measuring eye fatigue are being investigated. For example, evaluation of nervous system fatigue. As an indicator, the critical flicker frequency (CFF) On (on) and frequency are known indicators of muscle fatigue. For example, adjustment time and adjustment near point distance are known.

[0457] Other methods for evaluating eye fatigue include electroencephalography (EEG), thermography, and blink rate. Measurement, evaluation of tear volume, evaluation of pupil constriction response rate, and questionnaires to investigate subjective symptoms There are things like T, etc.

[0458] To solve the above problems, one aspect of the present invention relates to the illuminance of the working environment and the display of a display device. We focused on the background gradation of the image information. The embodiment described below uses environmental illuminance information and image This includes one aspect of the present invention that focuses on the grayscale information of the background of the image information.

[0459] A method for processing and displaying image information according to one aspect of the present invention involves processing ambient illuminance information and displaying it on a display unit. The steps involve obtaining the background grayscale information of the image information, and using this information to process the image information The display light does not contain light with wavelengths shorter than 420 nm and is provided with a resolution of 150 ppi or higher. The method includes the step of displaying the image on a display unit having a plurality of pixels. The information can be displayed at a brightness appropriate to the ambient light. As a result, the processing of image information and This provides a novel method for processing and displaying image information that is easy on the eyes.

[0460] An information processing apparatus to which a method for processing and displaying image information according to one aspect of the present invention can be applied. An example of a block diagram is shown in Figure 36.

[0461] The information processing device 330 includes an arithmetic unit 311, a storage unit 312, and a transmission line 314. The path 314 connects the arithmetic unit 311, the storage unit 312, and the input / output interface 315 to each other. They connect and transmit information. However, these configurations cannot be clearly separated, and one configuration is related to another. It may serve as part of a configuration or be part of another configuration. For example, a touch panel is a display unit. It is both a means of input and a means of input.

[0462] The input / output device 320 is connected to the transmission line 314 via the input / output interface 315. The input / output device 320 receives information from outside the arithmetic unit 310 or from outside the arithmetic unit 310. It is a device for outputting information.

[0463] The input / output device 320 may be a communication device, a network connection device, or a hard disk. One example of this is a writable external storage device such as removable memory. ru.

[0464] The input means 321 is a human input such as a keyboard, mouse, or touch panel. Cameras such as touchscreens, digital cameras, digital video cameras, and scanners. One example of this is read-only external storage devices such as CD-ROMs and DVD-ROMs. This is possible. For example, the user of the information processing device 330 can input a page-turning command from the input means 321. You can enter the order, etc.

[0465] In addition to the display unit 322, output devices such as speakers and printers can be connected. .

[0466] An information processing device 330 according to one aspect of the present invention includes a display unit 322. In particular, the display unit 322 is The display light does not contain light with a wavelength shorter than 420 nm, preferably light with a wavelength shorter than 440 nm. Furthermore, the display area is provided with a resolution of 150 ppi or more, preferably 200 ppi or more. It is desirable to have multiple pixels. This makes it possible to display images that are easy on the eyes. In this specification, display light refers to the light used by the display unit of an information processing device to display an image. This refers to light that is emitted towards or reflected by the user.

[0467] The display light from a display unit according to one aspect of the present invention is not absorbed by the cornea or lens of the eye, and does not reach the retina. To achieve this, it does not contain light that has long-term effects on the retina or adverse effects on circadian rhythms. For displaying the image, the light should be 400nm, preferably 420nm, more preferably 440nm. It does not contain light with the following wavelengths (also known as UVA).

[0468] An information processing device 330 according to one aspect of the present invention may use a semiconductor device according to one aspect of the present invention. Yes, it is possible. In the pixels of the semiconductor device, light having the above wavelength is absorbed and not easily transmitted. It has the following characteristics. Therefore, even if a light source emitting light having the above wavelength is used, one aspect of the present invention is By using a semiconductor device of the same type, it is possible to reduce or block light having the above wavelength. can.

[0469] Furthermore, the pixel resolution of the display unit according to one aspect of the present invention is preferably 150 ppi, and preferably 20 ppi. The pixel density is 0 ppi or higher, meaning the size of each pixel is small. This reduces eye strain on the user's eye muscles. This is reduced.

[0470] Figure 35(B) illustrates the effect of an information processing device according to one embodiment of the present invention on reducing eye strain. ) is shown.

[0471] An information processing device according to one aspect of the present invention can change the frequency at which it outputs a signal to select pixels. In particular, by using transistors with extremely low off-currents in the pixel section of the display, It is possible to lower the frame rate while suppressing the occurrence of flicker. For example, for 5 seconds Since the image can be rewritten once, the same image can be viewed by the user. The perceived screen flicker is reduced. This reduces the impact on the user's retina, nerves, or brain. The stimuli received are reduced, and fatigue in the nervous system is alleviated (see Figure 35 (B-1)).

[0472] As an example of a transistor with extremely low off-current, a transistor using an oxide semiconductor is used. Transistors, particularly those using CAAC-OS, are preferred.

[0473] An information processing device according to one aspect of the present invention has a small pixel size. Specifically, the resolution is 150 High-resolution display is possible, preferably with a ppi of 200 ppi or higher. The outlines of the image are clearly defined. Furthermore, it can display details and smoothness. This allows the ciliary muscle to focus. This makes it easier to move, thus reducing muscle fatigue in the user (see Figure 35 (B-2)). The resolution is expressed using pixel density (ppi: pixels per inch). This is possible. Pixel density is the number of pixels per inch. Also, pixels make up an image. It is a unit.

[0474] This embodiment can be appropriately combined with other embodiments shown herein. .

[0475] (Embodiment 9) One aspect of the present invention is a semiconductor device that can be applied to various electronic devices (including amusement machines). It is possible. Examples of electronic devices include television equipment, computer monitors, and digital displays. Digital cameras, digital video cameras, digital photo frames, mobile phones, game consoles Portable game consoles, personal digital assistants, audio playback devices, amusement machines (pachinko machines, slot machines) Examples include the above. Examples of these electronic devices are shown in Figures 37 and 38.

[0476] Figure 37(A) shows a table with a display unit. The table 9000 is located in the housing 90 The display unit 9003 is incorporated into 01, and the display unit 9003 can display video. It is possible. Note that the configuration shown is one in which the housing 9001 is supported by four legs 9002. Furthermore, the enclosure 9001 has a power cord 9005 for power supply.

[0477] The semiconductor device shown in any of the above embodiments can be used in the display unit 9003. Therefore, the display quality of the display unit 9003 can be improved.

[0478] The display unit 9003 has a touch input function, and the display unit 9003 of table 9000 By touching the displayed button 9004 with your finger, you can operate the screen or input information. This enables communication with or control of other home appliances, It may also be used as a control device to control other home appliances by touch operation. By using a semiconductor device with sensor or image sensor functions, the display unit 9003 can be touched. It can be equipped with an input function.

[0479] Furthermore, a hinge provided on the housing 9001 allows the screen of the display unit 9003 to be lowered relative to the floor. It can stand upright and can also be used as a television set. In a small room, Installing a large-screen television set reduces the available space, but it can be placed on a table. If the display unit is built-in, the space in the room can be used more effectively.

[0480] Figure 37(B) shows a television system. The television system 9100 has a housing 9 The display unit 9103 is incorporated into 101, and the display unit 9103 displays images. This is possible. Note that the configuration shown here involves supporting the housing 9101 with the stand 9105. They are doing it.

[0481] The television unit 9100 is operated using the control switches on the housing 9101 and a separate remote control. This can be done using the remote controller 9110. The control keys 9109 allow you to operate the channel and volume, and the display unit 910 The image displayed on 3 can be controlled. Also, the remote controller 9110 can be used to control the image. The configuration includes a display unit 9107 that displays information output from the remote controller. That's fine.

[0482] The television system 9100 shown in Figure 37(B) includes a receiver, communication means, and the like. The television system 9100 can receive general television broadcasts using its receiver. Furthermore, by connecting to a wired or wireless communication network via communication means, One-way (sender to receiver) or two-way (sender and receiver, or between receivers) It is also possible to perform information and communication.

[0483] The semiconductor device shown in any of the above embodiments is used for the display units 9103 and 9107. This is possible. Therefore, the display quality of television equipment can be improved.

[0484] Figure 37(C) shows the computer 9200, consisting of the main unit 9201, the casing 9202, and the display unit 92 03, Keyboard 9204, External connection port 9205, Pointing device 9206 This includes, among others.

[0485] The semiconductor device shown in any of the above embodiments can be used in the display unit 9203. Therefore, the display quality of the computer 9200 can be improved.

[0486] The display unit 9203 has a touch input function, and the display buttons displayed on the display unit 9203 You can operate the screen and input information by touching buttons with your fingers. Information can be entered via voice or other means.

[0487] Figures 38(A) and 38(B) show a foldable tablet device. ) is in an open state, and the tablet terminal consists of a housing 9630, a display unit 9631a, and a display Part 9631b, display mode switching switch 9034, power switch 9035, power saving mode It has a code change switch 9036, a fastener 9033, and an operating switch 9038.

[0488] The semiconductor device shown in any of the above embodiments has a display unit 9631a and a display unit 9631b. It can be used. Therefore, it can improve the display quality of tablet devices. ru.

[0489] The display unit 9631a can be partially designated as a touch panel area 9632a, and the display will be Data can be entered by touching the operation key 9638. Note that the display unit 963 In 1a, as an example, one half of the area has a display-only function, and the other half of the area The diagram shows a configuration that includes touch panel functionality, but is not limited to this configuration. Display unit 963 The entire area of ​​1a may also be configured to have touch panel functionality. For example, the display unit 96 The entire surface of 31a is used as a touch panel with keyboard buttons, and the display unit 9631b is displayed. It can be used as a screen.

[0490] Furthermore, in the display unit 9631b, similar to the display unit 9631a, a part of the display unit 9631b This can be designated as the touch panel area 9632b. Also, the touch panel keyboard... By touching the location where the display switch button 9639 is displayed with your finger or stylus, Keyboard buttons can be displayed on the display unit 9631b.

[0491] Furthermore, touch panel area 9632a and touch panel area 9632b can be touched simultaneously. You can also input text.

[0492] Additionally, the display mode switch 9034 changes the display orientation, such as portrait or landscape. You can switch between modes, such as switching between black and white and color displays. Power saving mode switching... The Itch 9036 detects ambient light during use using a light sensor built into the tablet device. The display brightness can be optimized according to the amount of light. The tablet terminal uses optical sensors. In addition to the sensor, other detection devices such as gyroscopes, accelerometers, and other sensors that detect tilt are also used. It can be built-in.

[0493] Furthermore, Figure 38(A) shows an example where the display area of ​​display unit 9631b and display unit 9631a are the same. However, this is not particularly limited, and one size may be different from the other. The quality of these components may also differ. For example, one display panel may be capable of displaying higher resolution than the other. That is also acceptable.

[0494] Figure 38(B) shows the closed state, and the tablet terminal has a solar cell 96 on the housing 9630. 33. It may also have a charge / discharge control circuit 9634. Note that in Figure 38(B), charge / discharge control As an example of circuit 9634, a configuration having a battery 9635 and a DC-DC converter 9636 This shows the concept of success.

[0495] Since the tablet device is foldable, the casing 9630 can be closed when not in use. This is possible. Therefore, the display units 9631a and 9631b can be protected. This allows us to provide tablet devices that are highly durable and reliable from a long-term use perspective.

[0496] In addition, the tablet devices shown in Figures 38(A) and 38(B) are also available in various forms. Features for displaying information (still images, videos, text images, etc.), calendar, date or time. Functions that display information such as the above on the display unit, and the ability to perform touch input operations or edit the information displayed on the display unit. It has features such as touch input functionality and the ability to control processing through various software (programs). It is possible.

[0497] The solar cell 9633 mounted on the surface of the tablet device powers the touch panel. It can be supplied to the display unit or the video signal processing unit, etc. Note that the solar cell 9633 is It can be installed on one or both sides of the housing 9630, and efficiently charges the battery 9635. This can be done. Furthermore, if a lithium-ion battery is used for the 9635 battery, This offers advantages such as the ability to miniaturize the device.

[0498] Furthermore, the configuration and operation of the charge / discharge control circuit 9634 shown in Figure 38(B) are shown in Figure 39. The block diagram will be shown and explained. In Figure 39(A), the solar cell 9633 and the battery 9635 are shown. DC-DC converter 9636, DC-DC converter 9637, switch SW1 to SW 3. The load (display unit 9631, etc.) is shown, including the battery 9635 and the DC-DC converter. The converter 9636, DC-DC converter 9637, and switches SW1 to SW3 are shown in Figure 38. This corresponds to the charge / discharge control circuit 9634 shown in B).

[0499] First, let's explain an example of operation when electricity is generated by solar cell 9633. The electricity generated in the pond is converted into a DC-DC converter to provide the voltage needed to charge the 9635 battery. The voltage is boosted or lowered by the converter 9636. Then, the load (display unit 9631, etc.) operates. When power from solar cell 9633 is used, switch SW1 is turned ON, DC-DC Converter 9637 boosts or lowers the voltage to the required level for the load (display unit 9631, etc.). This is the result. Also, when not supplying power to the load (display unit 9631, etc.), turn SW1. The configuration should be such that SW2 is turned off and SW2 is turned on to charge the 9635 battery.

[0500] Furthermore, if power is always supplied to the load (display unit 9631, etc.) via the battery 9635, Alternatively, as shown in Figure 39(B), the configuration may be configured without switch SW1.

[0501] Furthermore, if the appropriate voltage range supplied to the load is equivalent to the voltage of the battery 9635, As shown in Figure 39(C), a configuration that omits the DC-DC converter 9637 is also possible. stomach.

[0502] Note that while solar cell 9633 is shown as an example of a power generation method, it is not particularly limited to this. Other power generation methods such as piezoelectric elements (piezo elements) and thermoelectric elements (Peltier elements) The configuration may also include charging the 9635 battery. For example, power can be transmitted wirelessly (contactlessly). A contactless power transmission module that receives and charges, or a combination of other charging methods. It may be considered a success.

[0503] The configurations shown in this embodiment may be used in appropriate combination with the configurations shown in other embodiments. It is possible to be there. [Explanation of symbols]

[0504] 100 pixel section 101 pixels 102 circuit boards 103 Transistors 104 Drive Circuit 105 Capacitive element 106 Drive Circuit 107 scan lines 108 liquid crystal elements 109 signal line 110 Underlying insulating film 111 Semiconductor film 113 Conductive film 115 Capacity Line 117 Aperture 118 Nitride Insulated Film 119 Semiconductor film 121 Pixel Electrodes 127 Gate insulating film 129 Insulating film 130 insulating film 131 Insulating Film 132 Insulating film 135 Boundary 154 Counter electrode 188a Oxide semiconductor film 188b Oxide semiconductor film 199a Oxide semiconductor film 199b Oxide semiconductor film 199c oxide semiconductor film 223 Transistors 227 Shuttle gate 229 Wiring 231 Semiconductor film 233 Wiring 241 Conductive film 310 Arithmetic equipment 311 Arithmetic unit 312 Storage section 314 transmission line 315 Input / Output Interfaces 320 Input / Output Devices 321 Input means 322 Display section 330 Information Processing Device 500 input means 500_C signal 600 Information Processing Devices 610 Control Unit 615_C Secondary control signal 615_V secondary image signal 620 Arithmetic equipment 625_C Primary Control Signal 625_V Primary image signal 630 Display section 631 pixel section 631a area 631b area 631c area 631p pixels 632 G drive circuit 632_G G signal 632a G drive circuit 632b G drive circuit 632c G drive circuit 633 S drive circuit 633_S S signal 634-pixel circuit 634c capacitive element 634EL pixel circuit 634t transistor 634t_1 Transistor 634t_2 Transistor 635 Display element 635EL EL element 635LC liquid crystal element 640 Display device 650 Light supply unit 701 Arithmetic unit 702 Storage section 703 Control Unit 704 Display section 901 circuit board 902 pixel section 903 Drive Circuit 904 Drive Circuit 905 Sealant 906 circuit board 908 Liquid Crystal Layer 910 Transistors 911 Transistor 913 Liquid crystal element 915 Connection terminal electrode 916 Terminal electrode 917 Conductive film 918 FPC 918b FPC 919 Anisotropic conductive agent 922 Gate Insulator 923 Insulating film 924 Insulating film 925 Sealant 926 Capacitive elements 927 Oxide semiconductor film 929 Capacity Line 930 electrode 931 Electrode 932 Insulating film 933 Insulating film 934 Insulating film 935 Spacer 936 Capacitive element 971 Source electrode 973 Drain electrode 975 Common potential line 977 Common electrode 985 Common potential line 987 Common electrode 9000 Table 9001 enclosure 9002 Legs 9003 Display section 9004 Display button 9005 Power Cord 9033 Tools 9034 Switch 9035 Power switch 9036 Switch 9038 Operation switch 9100 Television equipment 9101 enclosure 9103 Display section 9105 Stand 9107 Display section 9109 Operation Keys 9110 Remote Controller 9200 Computer 9201 Main Unit 9202 enclosure 9203 Display section 9204 Keyboard 9205 External connection port 9206 Pointing device 9630 cabinet 9631 Display section 9631a Display section 9631b Display section 9632a area 9632b area 9633 Solar Cell 9634 Charge / Discharge Control Circuit 9635 Battery 9636 DC-DC converter 9637 DC-DC converter 9638 Operation Keys 9639 button

Claims

1. A display device having a pixel, a transistor, and a capacitor, It comprises a first insulating film, a first oxide semiconductor film, a second oxide semiconductor film, a first conductive film, a second conductive film, a third conductive film, a second insulating film, a fourth conductive film, a third insulating film, and a fifth conductive film. The first oxide semiconductor film and the second oxide semiconductor film each contain In, Ga, and Zn. The first insulating film has a region in contact with the first oxide semiconductor film and a region in contact with the second oxide semiconductor film. The first oxide semiconductor film has a region in contact with the first conductive film, a region in contact with the second insulating film, and a region in contact with the second conductive film. The first oxide semiconductor film has a channel formation region for the transistor, The first conductive film functions as either the source electrode or the drain electrode of the transistor. The second conductive film functions as either the source electrode or the drain electrode of the transistor. The second oxide semiconductor film has a region in contact with the third conductive film, The second oxide semiconductor film has the function of an electrode of the aforementioned capacitance. The second insulating film has a region in contact with the fourth conductive film and a region in contact with the third insulating film. The second insulating film functions as the gate insulating film of the transistor. The fourth conductive film has a region in contact with the third insulating film, The fourth conductive film has the function of a gate electrode of the transistor. The third insulating film has a region in contact with the fifth conductive film, The fifth conductive film has the function of a pixel electrode, The fifth conductive film is electrically connected to the second conductive film. A display device wherein the second oxide semiconductor film has a region that overlaps with the fifth conductive film via the third insulating film without interfering with the second insulating film.

2. A display device having a pixel, a transistor, and a capacitor, It comprises a first insulating film, a first oxide semiconductor film, a second oxide semiconductor film, a first conductive film, a second conductive film, a third conductive film, a second insulating film, a fourth conductive film, a third insulating film, and a fifth conductive film. The first oxide semiconductor film and the second oxide semiconductor film each contain In, Ga, and Zn. The first insulating film has a region in contact with the first oxide semiconductor film and a region in contact with the second oxide semiconductor film. The first oxide semiconductor film has a region in contact with the first conductive film, a region in contact with the second insulating film, and a region in contact with the second conductive film. The first oxide semiconductor film has a channel formation region for the transistor, The first conductive film functions as either the source electrode or the drain electrode of the transistor. The second conductive film functions as either the source electrode or the drain electrode of the transistor. The second oxide semiconductor film has a region in contact with the third conductive film, The second oxide semiconductor film has the function of an electrode of the aforementioned capacitance. The second insulating film has a region in contact with the fourth conductive film and a region in contact with the third insulating film. The second insulating film functions as the gate insulating film of the transistor. The fourth conductive film has a region in contact with the third insulating film, The fourth conductive film has the function of a gate electrode of the transistor. The third insulating film has a region in contact with the fifth conductive film, The fifth conductive film has the function of a pixel electrode, The fifth conductive film is electrically connected to the second conductive film. The second oxide semiconductor film has a region that overlaps with the fifth conductive film via the third insulating film without interfering with the second insulating film. A display device wherein, in a plan view of the pixel, the fifth conductive film does not overlap with the first oxide semiconductor film.

Images