Indication device

Abstract

To provide a display device capable of displaying high-quality images. [Solution] A display device having a first light-emitting element, a second light-emitting element, and a gap. The first light-emitting element has a first lower electrode, a first light-emitting layer on the first lower electrode, and a first upper electrode on the first light-emitting layer. The second light-emitting element has a second lower electrode, a second light-emitting layer on the second lower electrode, and a second upper electrode on the second light-emitting layer. The first light-emitting element and the second light-emitting element are adjacent to each other. The gap is provided between the first upper electrode and the first light-emitting layer, and between the second upper electrode and the second light-emitting layer. The first upper electrode has a region that protrudes from the side surface of the first light-emitting layer, and the second upper electrode has a region that protrudes from the side surface of the second light-emitting layer.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device and a method for manufacturing the same. Another aspect of the present invention relates to electronic equipment.

[0002] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. The technical field of one aspect of the invention disclosed herein relates to a product, method, or method of manufacture. Alternatively, one aspect of the present invention relates to a process, machine, manufacture, or composition of matter. More specifically, examples of the technical field of one aspect of the present invention disclosed herein include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, methods for driving them, or methods for manufacturing them. [Background technology]

[0003] In recent years, display devices have been expected to have applications in a variety of uses. For example, large-scale display devices are used in home television systems (also called televisions or television receivers), digital signage, and PID (Public Information Display). Furthermore, development is progressing on mobile information terminals such as smartphones and tablet devices equipped with touch panels.

[0004] Furthermore, there is a demand for higher resolution display devices. Devices requiring high-resolution displays, such as those for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR), are being actively developed.

[0005] As display devices, for example, light-emitting devices (also referred to as light-emitting devices) having light-emitting elements have been developed. In particular, light-emitting elements (also referred to as EL elements or EL devices) that utilize the electroluminescence (hereinafter referred to as EL) phenomenon have characteristics such as being easily thinned and lightened, being capable of responding quickly to input signals, and being drivable using a DC constant voltage power supply, and are applied to display devices.

[0006] Patent Document 1 discloses a display device for VR using an organic EL element (also referred to as an organic EL device).

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0008] One aspect of the present invention aims to provide a display device that displays high-quality images. Or, one aspect of the present invention aims to provide a display device with high light extraction efficiency. Or, one aspect of the present invention aims to provide a display device with a high aperture ratio. Or, one aspect of the present invention aims to provide a high-definition display device. Or, one aspect of the present invention aims to provide a low-cost display device. Or, one aspect of the present invention aims to provide a highly reliable display device. Or, one aspect of the present invention aims to provide a novel display device.

[0009] Alternatively, one aspect of the present invention aims to provide a method for manufacturing a display device that displays high-quality images. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a display device with high light extraction efficiency. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a display device with a high aperture ratio. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a high-definition display device. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a display device with a simplified process. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a highly reliable display device. Alternatively, one aspect of the present invention aims to provide a novel method for manufacturing a display device.

[0010] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Other problems will become apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other problems from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problems

[0011] One aspect of the present invention is a display device having a first light-emitting element, a second light-emitting element, and a gap. The first light-emitting element has a first lower electrode, a first light-emitting layer on the first lower electrode, and a first upper electrode on the first light-emitting layer. The second light-emitting element has a second lower electrode, a second light-emitting layer on the second lower electrode, and a second upper electrode on the second light-emitting layer. The first light-emitting element and the second light-emitting element are adjacent to each other, and the gap is provided between the first upper electrode and the first light-emitting layer and the second upper electrode and the second light-emitting layer. The first upper electrode has a region protruding from the side surface of the first light-emitting layer, and the second upper electrode has a region protruding from the side surface of the second light-emitting layer.

[0012] Alternatively, in the above aspect, the distance between the side surface of the first upper electrode and the side surface of the second upper electrode may have a region of 1 μm or less.

[0013] Alternatively, in the above embodiment, the distance between the side surface of the first electron injection layer and the side surface of the second electron injection layer may be in a region of 100 nm or less.

[0014] Alternatively, in the above embodiment, the void may contain one or more elements selected from nitrogen, oxygen, carbon dioxide, and Group 18 elements.

[0015] Alternatively, in the above embodiment, the Group 18 elements may consist of one or more selected from helium, neon, argon, xenon, and krypton.

[0016] Alternatively, in the above embodiment, the refractive index of the first light-emitting layer and the refractive index of the second light-emitting layer may be higher than the refractive index of the air gap.

[0017] Alternatively, in the above embodiment, the first light-emitting element and the second light-emitting element are provided on an insulating layer, the upper surface of the insulating layer has a region in contact with the lower surface of the void, and the thickness of the insulating layer in the region where the upper surface of the insulating layer is in contact with the lower surface of the void may be thinner than the thickness of the insulating layer in the region overlapping with the first light-emitting layer and the thickness of the insulating layer in the region overlapping with the second light-emitting layer.

[0018] Alternatively, in the above embodiment, protective layers may be provided on the first upper electrode and the second upper electrode, and the protective layer may have a region in contact with the upper surface of the void.

[0019] Alternatively, in the above embodiment, a microlens array may be provided on the protective layer.

[0020] Alternatively, in the above embodiment, the display device has a first transistor and a second transistor, wherein one of the source or drain of the first transistor is electrically connected to a first lower electrode, and one of the source or drain of the second transistor is electrically connected to a second lower electrode, and the first transistor and the second transistor may each have silicon or a metal oxide in their channel-forming regions.

[0021] An electronic device having a display device according to one aspect of the present invention and a lens is also an aspect of the present invention.

[0022] Alternatively, one aspect of the present invention is a method for manufacturing a display device, comprising sequentially forming layers to become a first lower electrode and a second lower electrode, a first light-emitting layer and a second light-emitting layer, and a first upper electrode and a second upper electrode, and processing them by a first etching to form first and second lower electrodes, first and second light-emitting layers, and first and second upper electrodes, and processing the first light-emitting layer and the second light-emitting layer by a second etching such that the first upper electrode has a region protruding from the side surface of the first light-emitting layer and the second upper electrode has a region protruding from the side surface of the second light-emitting layer.

[0023] Alternatively, in the above embodiment, the second etching may have higher isotropy than the first etching.

[0024] Alternatively, in the above embodiment, after the second etching, a protective layer may be formed such that a gap is provided between the first upper electrode and the first light-emitting layer and the second upper electrode and the second light-emitting layer.

[0025] Alternatively, in the above embodiment, a microlens array may be formed on the protective layer. [Effects of the Invention]

[0026] According to one aspect of the present invention, a display device that displays high-quality images can be provided. Alternatively, according to one aspect of the present invention, a display device with high light extraction efficiency can be provided. Alternatively, according to one aspect of the present invention, a display device with a high aperture ratio can be provided. Alternatively, according to one aspect of the present invention, a high-definition display device can be provided. Alternatively, according to one aspect of the present invention, a low-cost display device can be provided. Alternatively, according to one aspect of the present invention, a highly reliable display device can be provided. Alternatively, according to one aspect of the present invention, a novel display device can be provided.

[0027] Alternatively, according to one aspect of the present invention, a method for manufacturing a display device that displays high-quality images can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a display device with high light extraction efficiency can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a display device with a high aperture ratio can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a high-definition display device can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a display device with a simplified process can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a highly reliable display device can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a novel display device can be provided.

[0028] Furthermore, the description of these effects does not preclude the existence of other effects. Moreover, one embodiment of the present invention does not need to possess all of these effects. Other effects will naturally become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. [Brief explanation of the drawing]

[0029] [Figure 1] Figures 1A and 1B are cross-sectional views showing examples of the configuration of a display device. [Figure 2] Figures 2A to 2D are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 3] Figures 3A to 3C are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 4] Figure 4 is a cross-sectional view showing an example of the configuration of a display device. [Figure 5] Figures 5A to 5D are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 6] Figures 6A to 6D are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 7] Figures 7A to 7D are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 8] Figure 8 is a cross-sectional view showing an example of the configuration of a display device. [Figure 9] Figure 9 is a cross-sectional view showing an example of the configuration of a display device. [Figure 10] Figure 10 is a cross-sectional view showing an example of the configuration of a display device. [Figure 11] Figures 11A to 11C are cross-sectional views showing examples of transistor configurations. [Figure 12] Figure 12 is a cross-sectional view showing an example of the configuration of a display device. [Figure 13] Figure 13 is a cross-sectional view showing an example of the configuration of a display device. [Figure 14] Figure 14 is a cross-sectional view showing an example of the configuration of a display device. [Figure 15] Figure 15A is a block diagram showing an example of a display device configuration. Figure 15B is a circuit diagram showing an example of a pixel configuration. [Figure 16] Figure 16A is a top view showing an example of a transistor configuration. Figures 16B and 16C are cross-sectional views showing an example of a transistor configuration. [Figure 17] Figures 17A to 17C are cross-sectional views showing examples of the configuration of light-emitting elements. [Figure 18] Figure 18A illustrates the classification of IGZO crystal structures. Figure 18B illustrates the XRD spectrum of a CAAC-IGZO film. Figure 18C illustrates the micro-electron diffraction pattern of a CAAC-IGZO film. [Figure 19] Figures 19A to 19D show examples of electronic devices. [Figure 20] Figures 20A and 20B show examples of electronic devices. [Modes for carrying out the invention]

[0030] In this specification, a semiconductor device refers to a device that utilizes semiconductor properties, including circuits containing semiconductor elements (transistors, diodes, photodiodes, etc.), devices having such circuits, etc. It also refers to any device that can function by utilizing semiconductor properties. For example, integrated circuits, chips equipped with integrated circuits, and electronic components with chips housed in packages are examples of semiconductor devices. Furthermore, memory devices, display devices, light-emitting devices, lighting devices, and electronic devices are themselves semiconductor devices and may contain semiconductor devices.

[0031] Furthermore, when it is stated in this specification that X and Y are connected, it is assumed that this specification discloses the cases in which X and Y are electrically connected, functionally connected, and directly connected. Therefore, it is assumed that the disclosed connections are not limited to predetermined connections, such as those shown in the figures or text, but also include connections other than those shown in the figures or text. X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0032] One example of a case where X and Y are electrically connected is that one or more elements that enable electrical connection between X and Y (e.g., switches, transistors, capacitive elements, inductors, resistors, diodes, display elements, light-emitting elements, or loads) can be connected between X and Y. A switch has the function of controlling the on and off states. In other words, a switch has the function of controlling whether or not current flows by being in a conductive state (on state) or a non-conductive state (off state).

[0033] One example of a functional connection between X and Y is when one or more circuits that enable the functional connection between X and Y (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signal conversion circuits (digital-to-analog conversion circuits, analog-to-digital conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc.), voltage sources, current sources, switching circuits, amplification circuits (circuits that can increase the signal amplitude or current amount, etc., operational amplifiers, differential amplifiers, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control circuits, etc.) can be connected between X and Y.

[0034] Furthermore, when it is explicitly stated that X and Y are electrically connected, this includes both cases where X and Y are electrically connected (i.e., connected with another element or circuit in between) and cases where X and Y are directly connected (i.e., connected without another element or circuit in between).

[0035] Even if independent components are shown as electrically connected in a circuit diagram, a single component may possess the functions of multiple components. For example, if part of a wire also functions as an electrode, a single conductive film possesses the functions of both the wire and the electrode. Therefore, in this specification, "electrically connected" includes cases where a single conductive film possesses the functions of multiple components.

[0036] Furthermore, in this specification, the term "node" can be replaced with terminals, wiring, electrodes, conductive layers, conductors, impurity regions, etc., depending on the circuit configuration, device structure, etc. Also, terminals, wiring, etc. can be replaced with "node".

[0037] Furthermore, in this specification, "voltage" and "potential" may be used interchangeably as appropriate. "Voltage" is the potential difference from a reference potential; for example, if the reference potential is the ground potential (earth potential), then "voltage" can be replaced with "potential." Note that the ground potential does not necessarily mean 0V. Also, potential is relative, and when the reference potential changes, the potential applied to the wiring, the potential applied to the circuit, the potential output from the circuit, etc., also changes.

[0038] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" in this specification are used to avoid confusion of constituent elements. Therefore, they do not limit the number of constituent elements, nor do they limit the order of the constituent elements. For example, a constituent element referred to as "1st" in one embodiment of this specification may be referred to as "2nd" in another embodiment or in the claims. Also, for example, a constituent element referred to as "1st" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0039] Furthermore, in this specification, terms indicating placement such as "above," "below," "upward," or "downward" are sometimes used for convenience to explain the positional relationships between components with reference to the drawings. Also, the positional relationships between components change as appropriate depending on the direction in which each component is depicted. Therefore, the terms explained in this specification are not limited to those described and can be appropriately rephrased depending on the situation. For example, the expression "insulator located on the upper surface of the conductor" can be rephrased as "insulator located on the lower surface of the conductor" by rotating the orientation of the drawing shown by 180 degrees.

[0040] Furthermore, in this specification, terms such as "film" and "layer" can be interchanged as needed. For example, the term "conductive layer" may be changed to the term "conductive film." Or, for example, the term "insulating film" may be changed to the term "insulating layer." Alternatively, depending on the circumstances, terms such as "film" and "layer" can be omitted and replaced with other terms. For example, the term "conductive layer" or "conductive film" may be changed to the term "conductor." Or, for example, the terms "insulating layer" or "insulating film" may be changed to the term "insulator."

[0041] Furthermore, in this specification, terms such as "electrode," "wiring," and "terminal" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Moreover, the terms "electrode" or "wiring" also include cases where multiple "electrodes" or "wiring" are formed as a single unit. Similarly, for example, "terminal" may be used as part of "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" also includes cases where multiple "electrodes," "wiring," or "terminals" are formed as a single unit. Therefore, for example, an "electrode" can be part of "wiring" or a "terminal," and for example, a "terminal" can be part of "wiring" or an "electrode." In addition, terms such as "electrode," "wiring," and "terminal" may be replaced with terms such as "region" depending on the circumstances.

[0042] In this specification, "parallel" means a state in which two lines are positioned at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Furthermore, "approximately parallel" or "roughly parallel" means a state in which two lines are positioned at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" means a state in which two lines are positioned at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. Furthermore, "approximately perpendicular" or "roughly perpendicular" means a state in which two lines are positioned at an angle of 60° or more and 120° or less.

[0043] In this specification, "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also called oxide semiconductors or simply OS), etc. For example, when a metal oxide is used in the semiconductor layer of a transistor, the metal oxide may be called an oxide semiconductor. In other words, if a metal oxide can constitute a channel-forming region of a transistor having at least one of amplification, rectification, and switching functions, the metal oxide can be called a metal oxide semiconductor. Furthermore, when "OS transistor" is mentioned, it can be rephrased as a transistor having a metal oxide or oxide semiconductor.

[0044] Furthermore, in this specification, metal oxides containing nitrogen may also be collectively referred to as metal oxides. Alternatively, metal oxides containing nitrogen may be called metal oxynitrides.

[0045] Furthermore, in this specification, the configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form one aspect of the present invention. Also, if multiple configuration examples are shown within one embodiment, these configuration examples can be appropriately combined with each other.

[0046] Furthermore, in this specification, the term "void" refers to a region containing gas.

[0047] The embodiments described herein will be explained with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope thereof. Accordingly, the present invention is not to be interpreted as being limited to the contents described in the embodiments. In the configuration of the invention in the embodiments, the same reference numerals are used in common across different drawings for the same parts or parts having similar functions, and repeated explanations may be omitted. Also, in order to make the drawings easier to understand, some components may be omitted in perspective views or top views, etc.

[0048] Furthermore, in the drawings of this specification, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to the size or aspect ratio. The drawings are schematic representations of ideal examples and are not limited to the shapes or values ​​shown in the drawings. For example, they may include variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing differences.

[0049] (Embodiment 1) In this embodiment, a display device according to one aspect of the present invention and a method for manufacturing the same will be described with reference to the drawings.

[0050] One aspect of the present invention relates to a display device in which pixels having light-emitting elements such as organic EL elements are arranged in a matrix. In the display device according to one aspect of the present invention, light-emitting elements provided in adjacent pixels are separated from each other by air gaps containing a gas such as air. Light emitted from the light-emitting elements at an oblique angle can be totally reflected by the air gaps. This makes it possible to suppress the incidence of light emitted from the light-emitting elements on adjacent pixels.

[0051] In this specification, a light-emitting element provided in an adjacent pixel is referred to as an adjacent light-emitting element. The same applies to other elements provided in a pixel.

[0052] Furthermore, in a display device according to one aspect of the present invention, the light-emitting element includes a lower electrode, a light-emitting layer on the lower electrode, and an upper electrode on the light-emitting layer. The lower electrode, the light-emitting layer, and the upper electrode are each provided separately for each light-emitting element. The upper electrode has a region that protrudes from the side surface of the light-emitting layer. As a result, the width of the gap between adjacent light-emitting layers is wider than the width of the gap between adjacent upper electrodes. By widening the gap between adjacent light-emitting layers, it is possible to make it easier for light emitted by the light-emitting layer to enter the gap.

[0053] <Example of display device configuration_1> Figure 1A is a cross-sectional view showing an example of the configuration of the display device 10. The display device 10 includes a transistor 11, an insulating layer 13 on the transistor 11, a light-emitting element 20 on the insulating layer 13, a protective layer 43 on the light-emitting element 20, a microlens array 45 on the protective layer 43, an adhesive layer 47 on the microlens array 45, a colored layer 55R, a colored layer 55G, a colored layer 55B, and a light-shielding layer 49 on the adhesive layer 47, an insulating layer 51 on the colored layer 55R, a colored layer 55G, a colored layer 55B, and a light-shielding layer 49, and a substrate 53 on the insulating layer 51. The microlens array 45 and the colored layers 55R, 55G, 55B, and light-shielding layer 49 are bonded together by the adhesive layer 47.

[0054] In this specification, for example, when we refer to "B on A" or "B below A," it is not necessarily required that A and B have areas in contact.

[0055] Furthermore, in this specification, the term "element" may be replaced with "device." For example, a light-emitting element can be called a light-emitting device.

[0056] Furthermore, in this specification, when describing matters common to, for example, the colored layer 55R, the colored layer 55G, and the colored layer 55B, or when there is no need to distinguish between the three, the term "colored layer 55" may be used. The same applies to other elements.

[0057] The light-emitting element 20 includes a lower electrode 21, a hole injection layer 31, a light-emitting layer 33, an electron injection layer 35, and an upper electrode 25. Here, the hole injection layer 31, the light-emitting layer 33, and the electron injection layer 35 are collectively referred to as the EL layer 30.

[0058] The light-emitting element 20 can be a top-emission type light-emitting element. When the light-emitting element 20 is a top-emission type light-emitting element, the lower electrode 21 has the function of reflecting visible light, and the upper electrode 25 has the function of transmitting visible light. In addition, the lower electrode 21 functions as a pixel electrode of the display device 10.

[0059] The hole injection layer 31 has a material that has hole injection properties. Here, a layer having a material that has hole transport properties (hole transport layer) can be provided between the hole injection layer 31 and the light-emitting layer 33.

[0060] The electron injection layer 35 has an electron-injecting material. Here, a layer having an electron-transporting material (electron transport layer) can be provided between the light-emitting layer 33 and the electron injection layer 35.

[0061] Here, the hole injection layer 31 and the electron injection layer 35 may be swapped. In other words, the electron injection layer 35, the light-emitting layer 33, and the hole injection layer 31 may be stacked on the lower electrode 21 in this order. In this case, for example, the electron injection layer 35, the electron transport layer, the light-emitting layer 33, the hole transport layer, and the hole injection layer 31 can be stacked on the lower electrode 21 in this order. In the following explanation, we will assume that the hole injection layer 31, the light-emitting layer 33, and the electron injection layer 35 are stacked on the lower electrode 21 in this order, but even if the configuration is such that the electron injection layer 35, the light-emitting layer 33, and the hole injection layer 31 are stacked on the lower electrode 21 in this order, you can still refer to the following explanation by substituting "hole" for "electron" and "electron" for "hole".

[0062] As shown in Figure 1A, the lower electrode 21, hole injection layer 31, light-emitting layer 33, electron injection layer 35, and upper electrode 25 can be separated for each light-emitting element 20.

[0063] The display device 10 has pixels 60R, 60G, and 60B. Pixel 60R is provided with a colored layer 55R, pixel 60G is provided with a colored layer 55G, and pixel 60B is provided with a colored layer 55B.

[0064] The light-emitting layer 33 of pixel 60R, the light-emitting layer 33 of pixel 60G, and the light-emitting layer 33 of pixel 60B can emit light of the same color. For example, all of these light-emitting layers 33 can emit white light. In this case, the light-emitting element 20 can be, for example, a single structure or a tandem structure. Details of the single structure and the tandem structure will be described later.

[0065] The colored layer 55 can change the hue of the light transmitted through it. For example, the hue of the light transmitted through colored layer 55R can be red, the hue of the light transmitted through colored layer 55G can be green, and the hue of the light transmitted through colored layer 55B can be blue. The colored layer 55 may also transmit light with hues such as cyan, magenta, or yellow.

[0066] Full-color display can be achieved by providing the display device 10 with, for example, a colored layer 55R, a colored layer 55G, and a colored layer 55B. The display device 10 may also have pixels 60 that do not have a colored layer 55.

[0067] Materials that can be used for the colored layer 55 include metal materials, resin materials, and resin materials containing pigments or dyes.

[0068] Transistor 11 is provided in each of the pixels 60R, 60G, and 60B. Here, conductive layers 15 and 17 are embedded in the insulating layer 13, and transistor 11 is electrically connected to the lower electrode 21 via conductive layers 15 and 17.

[0069] Here, the conductive layer 15 functions, for example, as wiring. The conductive layer 17 also functions, for example, as a plug for electrically connecting the conductive layer 15 and the lower electrode 21.

[0070] In this specification, the wiring and the plug to which the wiring is electrically connected may be an integrated unit. That is, a portion of the conductive layer may function as the wiring, and another portion may function as the plug.

[0071] A light-shielding layer 49 is provided at the boundary between adjacent pixels 60. This suppresses the mixing of light of different colors, allowing the display device 10 to display a high-quality image. In this embodiment, a configuration with a light-shielding layer 49 is illustrated, but the device is not limited to this, and a configuration without a light-shielding layer 49 is also possible.

[0072] The protective layer 43 is formed on the upper electrode 25. The protective layer 43 can be an insulating layer, and for example, an oxide film, a nitride film, or an oxynitride film can be used. The oxide film may be a layer having silicon oxide, aluminum oxide, or hafnium oxide. The nitride film may be a layer having silicon nitride or aluminum nitride. The oxynitride film may be a layer having silicon oxynitride, silicon oxide nitride, aluminum oxide nitride, or aluminum oxide nitride.

[0073] In this specification, silicon oxidizride refers to a material in which the oxygen content is greater than the nitrogen content, and silicon nitride oxide refers to a material in which the nitrogen content is greater than the oxygen content. Furthermore, in this specification, aluminum oxidizride refers to a material in which the oxygen content is greater than the nitrogen content, and aluminum nitride oxide refers to a material in which the nitrogen content is greater than the oxygen content.

[0074] Furthermore, the protective layer 43 can be a semiconductor layer, for example, a layer having a metal oxide (also called IGZO) containing In, Ga, and Zn. Alternatively, the protective layer 43 can be a conductive layer, for example, having a translucent conductive material. As will be described in detail later, examples of translucent conductive materials include conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, gallium-doped zinc oxide, or graphene. Also, oxide conductors can be used as translucent conductive materials.

[0075] Furthermore, the protective layer 43 may have a laminated structure of two or more layers. For example, it may have a laminated structure of an insulating layer and a semiconductor layer or a conductive layer, or it may have a laminated structure of a layer having silicon nitride and a layer having a metal oxide. Specifically, the protective layer 43 may have a two-layer laminated structure in which, for example, the lower layer is a layer having silicon nitride and the upper layer is a layer having a metal oxide.

[0076] The protective layer 43 is preferably a layer that does not easily allow impurities such as water and oxygen to diffuse, or a layer that can capture (also called gettering) impurities such as water and oxygen. This prevents impurities from penetrating the light-emitting element 20, specifically, for example, the EL layer 30. Thus, the reliability of the display device 10 can be improved.

[0077] Here, the protective layer 43 is preferably formed by a method with low coverage, for example, by a method with lower coverage than atomic layer deposition (ALD). For example, the protective layer 43 is formed by sputtering or chemical vapor deposition (CVD). As a result, the openings separating adjacent light-emitting elements 20 are not covered by the protective layer 43, and voids 40 are formed.

[0078] Figure 1B is an enlarged view of the region 150 shown in Figure 1A. As shown in Figure 1B, the protective layer 43 may extend beneath the upper electrode 25. In addition, a gap 42 may be formed surrounded by the protective layer 43 and the upper electrode 25.

[0079] The shorter the distance between the upper electrodes 25, the easier it is for the gap 40 to form. For example, if the distance is 1 μm or less, preferably 500 nm or less, and more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm, the gap 40 can be suitably formed.

[0080] The void 40 contains one or more of the following: air, nitrogen, oxygen, carbon dioxide, and Group 18 elements. The void 40 may also contain gases used during the deposition of the upper electrode 25. For example, when the protective layer 43 is deposited by sputtering, the void 40 may contain Group 18 elements (typically helium, neon, argon, xenon, krypton, etc.). If the void 40 contains gas, the gas can be identified by gas chromatography or other methods. Alternatively, when the upper electrode 25 is deposited by sputtering, the film of the upper electrode 25 may also contain the gas used during sputtering. In this case, elements such as argon may be detected when the upper electrode 25 is analyzed by energy-dispersive X-ray spectroscopy (EDX analysis). The void 42 may also contain gases similar to those contained in the void 40.

[0081] If the refractive index of the air gap 40 is lower than the refractive index of the light-emitting layer 33, the refractive index of the electron injection layer 35, or the refractive index of the upper electrode 25, the light 61 emitted by the light-emitting layer 33 and incident on the interface between the light-emitting layer 33 and the air gap 40, the interface between the electron injection layer 35 and the air gap 40, or the interface between the upper electrode 25 and the air gap 40 will undergo total internal reflection. This suppresses the incidence of light 61 on adjacent pixels 60. Specifically, for example, light 61 emitted by the light-emitting layer 33 provided on pixel 60G can be suppressed from incident on pixel 60R or pixel 60B. This suppresses the mixing of light of different colors, allowing the display device 10 to display high-quality images.

[0082] Furthermore, as shown in Figure 1A, the upper electrode 25 has a region 63 that protrudes from the side surface of the light-emitting layer 33. In other words, in a top view, the light-emitting layer 33 is formed inward from the upper electrode 25. With this configuration, the width of the gap 40 between adjacent light-emitting layers 33 can be made wider than the width of the gap 40 between adjacent upper electrodes 25. Therefore, for example, it is possible to suppress the gap 40 from being embedded in the protective layer 43 while making it easier for the light emitted by the light-emitting layer 33 to enter the gap 40. Thus, the display device 10 can be made into a display device that is highly reliable and can display high-quality images.

[0083] The upper electrode 25 may have a region that protrudes from the side surface of the electron injection layer 35, in addition to the region that protrudes from the side surface of the light-emitting layer 33. This makes it easier for the light emitted by the light-emitting layer 33 to enter the gap 40. The upper electrode 25 may also have regions that protrude from the side surface of the hole injection layer 31 and the side surface of the lower electrode 21. For example, if the upper electrode 25 has a region that protrudes from the side surface of the lower electrode 21, the width of the gap 40 between adjacent lower electrodes 21 becomes wider than the width of the gap 40 between adjacent upper electrodes 25. This makes it possible to suppress, for example, the electrical short circuit caused by adjacent lower electrodes 21 contacting each other inside the gap 40. Thus, the reliability of the display device 10 can be improved.

[0084] Here, the void 40 can be configured to fit into the insulating layer 13. In this configuration, the thickness of the insulating layer 13 in the region where the upper surface of the insulating layer 13 is in contact with the lower surface of the void 40 is thinner than the thickness of the insulating layer 13 in the region that overlaps with the light-emitting layer 33. Furthermore, the thickness of the insulating layer 13 in the region where the upper surface of the insulating layer 13 is in contact with the lower surface of the void 40 can be made thinner than the thickness of the insulating layer 13 in the region that overlaps with the lower electrode 21, the hole injection layer 31, or the electron injection layer 35.

[0085] If the refractive index of the adhesive layer 47 is lower than that of the microlenses included in the microlens array 45, the microlenses can focus the light emitted by the light-emitting layer 33. This prevents the light from entering the light-shielding layer 49. Therefore, the light extraction efficiency of the display device 10 can be increased. Consequently, a bright image can be viewed, especially when the user of the display device 10 views the display surface from directly in front of it.

[0086] The following section describes the materials that can be used for the elements shown in Figure 1A.

[0087] [Insulating layer] Each insulating layer is made from a material selected from aluminum nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, magnesium oxide, silicon nitride, silicon oxide, silicon oxide nitride, silicon oxide nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, etc., and is used as a single layer or in multiple layers. Alternatively, a material made by mixing multiple materials from oxide materials, nitride materials, oxide nitride materials, and nitride oxide materials may be used.

[0088] In this specification, a nitride oxide refers to a compound in which the nitrogen content is higher than the oxygen content. Similarly, an oxidized nitride refers to a compound in which the oxygen content is higher than the nitrogen content. The content of each element can be measured, for example, using Rutherford backscattering spectrometry (RBS).

[0089] Furthermore, CMP treatment may be performed on the surface of the insulating layer, etc. By performing CMP treatment, surface irregularities of the sample can be reduced, thereby improving the coverage of the insulating layer and conductive layer formed thereafter.

[0090] [Conductive layer] Conductive materials that can be used for conductive layers such as the gate, source, and drain of transistors, as well as various wirings, plugs, and electrodes that constitute display devices, include metal elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium (Hf), vanadium (V), niobium (Nb), manganese, magnesium, zirconium, beryllium, etc., alloys composed of the above-mentioned metal elements, or alloys combining the above-mentioned metal elements. Semiconductors such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may also be used. The method of forming the conductive material is not particularly limited, and various formation methods such as vapor deposition, CVD, sputtering, and spin coating can be used.

[0091] Furthermore, conductive materials containing oxygen, such as indium tin oxide (ITO), indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide with silicon oxide added, can be used as conductive materials for the conductive layer. In addition, conductive materials containing nitrogen, such as titanium nitride, tantalum nitride, and tungsten nitride, can also be used. Moreover, a laminated structure can be constructed by appropriately combining oxygen-containing conductive materials, nitrogen-containing conductive materials, and materials containing the aforementioned metal elements.

[0092] The conductive material that can be used for the conductive layer may be a single-layer structure or a laminated structure of two or more layers. For example, there is a single-layer structure of an aluminum layer containing silicon, a two-layer structure in which a titanium layer is laminated on an aluminum layer, a two-layer structure in which a titanium layer is laminated on a titanium nitride layer, a two-layer structure in which a tungsten layer is laminated on a titanium nitride layer, a two-layer structure in which a tungsten layer is laminated on a tantalum nitride layer, and a three-layer structure in which a titanium layer is laminated, an aluminum layer is laminated on the titanium layer, and then a titanium layer is formed on top of that. In addition, an aluminum alloy containing one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used as the conductive material.

[0093] When the light-emitting element 20 is a top-emission type light-emitting element, it is preferable to form the lower electrode 21 using a conductive material that efficiently reflects the light emitted by the light-emitting layer 33. The lower electrode 21 is not limited to a single layer, but may be a multi-layered structure. For example, when the lower electrode 21 is used as an anode, the layer in contact with the hole injection layer 31 may be a translucent layer such as indium tin oxide, and a highly reflective layer (aluminum, an aluminum alloy, or silver, etc.) may be provided in contact with that layer. Furthermore, by forming the upper electrode 25 using a translucent conductive material, the light emitted by the light-emitting layer 33 can be efficiently extracted to the outside of the display device 10.

[0094] As conductive materials that reflect visible light, for example, metallic materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or alloys containing these metallic materials, can be used. Lanthanum, neodymium, or germanium may also be added to the above metallic materials and / or alloys. Furthermore, alloys containing aluminum (aluminum alloys) such as aluminum-titanium alloys, aluminum-nickel alloys, and aluminum-neodymium alloys, as well as silver-containing alloys such as silver-copper alloys, silver-palladium-copper alloys, and silver-magnesium alloys, can be used to form the film. Alloys containing silver and copper are preferred because of their high heat resistance. In addition, a metal film or alloy film and a metal oxide film may be laminated. For example, by laminating a metal film or metal oxide film so that it is in contact with an aluminum alloy film, oxidation of the aluminum alloy film can be suppressed. Other examples of metal films and metal oxide films include titanium and titanium oxide. Furthermore, as described above, a light-transmitting conductive film and a film made of a metallic material may be laminated. For example, a multilayer film of silver and indium tin oxide, or a multilayer film of a silver-magnesium alloy and indium tin oxide can be used.

[0095] Furthermore, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, gallium-doped zinc oxide, or graphene can be used as the light-transmitting conductive material. Alternatively, oxide conductors can be applied as the light-transmitting conductive material. Alternatively, metallic materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, and alloy materials containing such metallic materials can be used. Alternatively, nitrides of such metallic materials (e.g., titanium nitride) may be used. When using metallic materials, alloy materials (or their nitrides), they should be thinned to a degree that allows for light transmission. In addition, a laminated film of the above materials can be used as a conductive layer. For example, using a laminated film of a silver-magnesium alloy and indium tin oxide is preferable because it can enhance conductivity. These can also be used for conductive layers of various wirings and electrodes that constitute a display device, and for conductive layers (conductive layers that function as lower or upper electrodes) of light-emitting elements.

[0096] Here, we will explain oxide conductors, which are a type of metal oxide. In this specification, oxide conductors may also be referred to as OC (Oxide Conductor). As an example of an oxide conductor, when an oxygen vacancy is formed in a metal oxide (typically IGZO) that contains at least indium or zinc, and hydrogen is added to the oxygen vacancy, a donor level is formed near the conduction band. As a result, the metal oxide becomes highly conductive and turns into a conductor. A metal oxide that has been turned into a conductor can be called an oxide conductor. In general, metal oxides that have semiconductor function (oxide semiconductors) have a large energy gap and are therefore transparent to visible light. On the other hand, oxide conductors are metal oxides that have a donor level near the conduction band. Therefore, oxide conductors are less affected by absorption due to the donor level and have a transparency to visible light of a similar degree to that of oxide semiconductors.

[0097] [EL layer] The layers of the EL layer 30 may be composed of either low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds. Each of the layers constituting the EL layer 30 can be formed using methods such as vapor deposition (including vacuum deposition), transfer, printing, and coating.

[0098] Specifically, the hole injection layer 31 of the EL layer 30 has a hole-transporting material. For example, aromatic amine compounds or organic compounds having a π-electron-rich heteroaromatic ring can be used as the hole-transporting material.

[0099] Compounds having an aromatic amine skeleton, carbazole derivatives, aromatic hydrocarbons, aromatic hydrocarbons having a vinyl group, polymer compounds (oligomers, dendrimers, polymers, etc.) can be used in composite materials that have hole transport properties. Furthermore, if the hole mobility is 1 × 10⁻⁶ -6 cm 2 Materials with a Vs of / Vs or higher can be suitably used as materials with hole transport properties.

[0100] Furthermore, for example, substances comprising any of the carbazole skeleton, dibenzofuran skeleton, dibenzothiophene skeleton, and anthracene skeleton can be suitably used as hole-transporting materials in composite materials. In addition, substances comprising aromatic amines having substituents including a dibenzofuran ring or a dibenzothiophene ring, aromatic monoamines having a naphthalene ring, or aromatic monoamines in which a 9-fluorenyl group is bonded to the nitrogen of the amine via an arylene group can be used as hole-transporting materials in composite materials. Moreover, using a substance having an N,N-bis(4-biphenyl)amino group can improve the reliability of the light-emitting element.

[0101] The electron injection layer 35 of the EL layer 30 has an electron-transporting material. For example, a compound having a lone pair of electrons and an electron-deficient heteroaromatic ring can be used as the electron-transporting material. Specifically, a compound having at least one of a pyridine ring, a diazine ring (pyrimidine ring, pyrazine ring, pyridazine ring), or a triazine ring can be used.

[0102] Furthermore, it is preferable that the lowest unoccupied molecular orbital (LUMO) of an organic compound containing a lone pair of electrons is between -3.6 eV and -2.3 eV. In addition, the highest occupied molecular orbital (HOMO) level and LUMO level of an organic compound can generally be estimated by methods such as cyclic voltammetry (CV), photoelectron spectroscopy, optical absorption spectroscopy, and inverse photoelectron spectroscopy.

[0103] For example, 4,7-diphenyl-1,10-phenanthroline (abbreviated as BPhen), 2,9-bis(naphthalene-2-yl)-4,7-diphenyl-1,10-phenanthroline (abbreviated as NBPhen), diquinoxalino[2,3-a:2',3'-c]phenazine (abbreviated as HATNA), 2,4,6-tris[3'-(pyridine-3-yl)biphenyl-3-yl]-1,3,5-triazine (abbreviated as TmPPPyTz), etc., can be used in organic compounds containing lone pairs of electrons. NBPhen has a higher glass transition temperature (Tg) and superior heat resistance compared to BPhen. The chemical formulas for BPhen, NBPhen, HANTA, and TmPPPyTz are shown below.

[0104] [ka]

[0105] Furthermore, copper phthalocyanine can be used, for example, in organic compounds that possess lone pairs of electrons. Note that copper phthalocyanine has an odd number of electrons.

[0106] Furthermore, the electron injection layer 35 may contain a metal. For example, the electron injection layer 35 may contain an organic compound having a lone pair of electrons and a metal. Here, it is preferable that the sum of the number of electrons in the organic compound and the number of electrons in the metal is odd. For example, it is preferable that the electron injection layer 35 contains NBPhen and silver. Furthermore, the molar ratio of the metal to 1 mole of the organic compound is preferably 0.1 to 10, more preferably 0.2 to 2, and even more preferably 0.2 to 0.8.

[0107] As a result, the organic compound having lone pairs of electrons can interact with the metal to form a partially occupied molecular orbital (SOMO). Furthermore, when electrons are injected from the upper electrode 25 into the electron injection layer, the barrier between the two can be reduced. In addition, since the metal has poor reactivity with water and oxygen, the moisture resistance of the light-emitting element 20 can be improved.

[0108] [Adhesive layer] As the adhesive layer 47, various types of curing adhesives can be used, such as UV-curing adhesives, reaction-curing adhesives, thermosetting adhesives, and anaerobic adhesives. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. Materials with low moisture permeability, such as epoxy resins, are particularly preferred. Two-component mixed resins may also be used. Adhesive sheets may also be used.

[0109] [Light blocking layer] Materials that can be used as a light-shielding layer include carbon black, titanium black, metals, metal oxides, and composite oxides containing solid solutions of multiple metal oxides. The light-shielding layer may be a film containing a resin material or a thin film of an inorganic material such as a metal. In addition, a laminated film containing the material for the colored layer can be used as the light-shielding layer. For example, a laminated structure can be used in which a film containing the material used for a colored layer that transmits light of one color and a film containing the material used for a colored layer that transmits light of another color are used. It is preferable to use the same materials for the colored layer and the light-shielding layer because it is possible to use the same equipment and simplify the process.

[0110] <Example of a method for manufacturing a display device_1> Below, an example of a method for manufacturing the display device 10 shown in Figure 1A will be explained with reference to the drawings.

[0111] Furthermore, the insulating layer, semiconductor layer, and conductive layer for forming electrodes and wiring that constitute the display device can be formed using sputtering, CVD, vacuum deposition, pulsed laser deposition (PLD), ALD, plasma enhanced ALD (PEALD), etc. For CVD, plasma chemical vapor deposition (PECVD) or thermal CVD may be used. As an example of thermal CVD, metal-organic chemical vapor deposition (MOCVD) may be used.

[0112] Furthermore, insulating layers, semiconductor layers, and conductive layers for forming electrodes and wiring that constitute the display device may be formed by methods such as spin coating, dip coating, spray coating, inkjet printing, dispensing, screen printing, offset printing, slit coating, roll coating, curtain coating, and knife coating.

[0113] PECVD (Polymer-Emission Vapor Deposition) yields high-quality films at relatively low temperatures. Using non-plasma deposition methods such as MOCVD (Modified Oxide Vapor Deposition), ALD (Automated Lamination), or thermal CVD (Chemical Vapor Deposition) reduces damage to the deposition surface. For example, wiring, electrodes, and components (transistors, capacitive elements, etc.) in semiconductor devices can be charged up by receiving charge from the plasma. This accumulated charge can damage these components. On the other hand, non-plasma deposition methods avoid such plasma damage, resulting in higher yields for semiconductor devices. Furthermore, the absence of plasma damage during deposition allows for the production of films with fewer defects.

[0114] When forming oxide semiconductors by sputtering, the chamber in the sputtering apparatus is kept under high vacuum (5 × 10⁻¹⁰) using an adsorption-type vacuum pump such as a cryopump to remove as much water and other impurities as possible from the oxide semiconductor. -7 Pa to 1 × 10 -4 It is preferable to evacuate the chamber to approximately Pa. In particular, when the sputtering apparatus is in standby mode, the partial pressure of gas molecules corresponding to H2O (gas molecules corresponding to m / z=18) in the chamber should be 1 × 10⁻⁶. -4 It is preferable to keep it below Pa, 5 × 10 -5 It is more preferable to keep the temperature below Pa. The film deposition temperature is preferably above room temperature and below 500°C, more preferably above room temperature and below 300°C, and even more preferably above room temperature and below 200°C.

[0115] Furthermore, it is necessary to purify the sputtering gas. For example, by using oxygen and argon gases used as sputtering gases that have been purified to a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower, and more preferably -120°C or lower, it is possible to prevent moisture and other substances from being incorporated into the oxide semiconductor film as much as possible.

[0116] Furthermore, when forming insulating layers, conductive layers, or semiconductor layers using the sputtering method, oxygen can be supplied to the layer being formed by using a sputtering gas containing oxygen. The more oxygen contained in the sputtering gas, the more oxygen is likely to be supplied to the layer being formed.

[0117] When processing the layers (thin films) that constitute the display device, processing can be done using methods such as photolithography. Alternatively, island-like layers may be formed by a film deposition method using a shielding mask. Alternatively, the layers may be processed by nanoimprinting, sandblasting, lift-off, etc. Photolithography methods include a method in which a resist mask is formed on the layer (thin film) to be processed, a part of the layer (thin film) is selectively removed using the resist mask as a mask, and then the resist mask is removed; and a method in which a photosensitive layer is deposited, and then exposed and developed to process the layer into the desired shape.

[0118] In photolithography, when using light, the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture thereof. Other options include ultraviolet light, KrF laser light, or ArF laser light. Exposure may also be performed using immersion lithography. Furthermore, extreme ultraviolet (EUV) light or X-rays may be used for exposure. An electron beam can also be used instead of light for exposure. Using extreme ultraviolet light, X-rays, or an electron beam is preferable because it allows for extremely fine processing. Note that a photomask is not required when exposure is performed by scanning a beam such as an electron beam.

[0119] Dry etching, wet etching, and other methods can be used to remove (etch) the layer (thin film). These etching methods may also be used in combination.

[0120] To fabricate the display device 10 shown in Figure 1A, first, a conductive layer 15 is formed so as to be electrically connected to the transistor 11. Next, an insulating layer 13 is formed on the transistor 11 and on the conductive layer 15. Then, an opening is formed in the insulating layer 13 that reaches the conductive layer 15, and a conductive layer 17 is formed in this opening (Figure 2A).

[0121] Next, layers 21A, which will become the lower electrode 21, 31A, which will become the hole injection layer 31, 33A, which will become the light-emitting layer 33, 35A, which will become the electron injection layer 35, and 25A, which will become the upper electrode 25, are sequentially deposited on the insulating layer 13 and the conductive layer 17 (Figure 2B). Layers 21A, 31A, 33A, 35A, and 25A can be deposited by methods such as vapor deposition or sputtering. However, the above-described deposition methods can be used as appropriate. Furthermore, if a hole transport layer is provided on the hole injection layer 31, the layer that will become the hole transport layer is deposited on layer 31A, and then layer 33A is deposited. Furthermore, if an electron transport layer is provided on the light-emitting layer 33, layer 33A is deposited first, and then the layer that will become the electron transport layer is deposited.

[0122] Next, layers 25A, 35A, 33A, 31A, and 21A are processed using an etching method or the like. Specifically, for example, after forming a resist mask on layer 25A, layers 25A, 35A, 33A, 31A, and 21A are processed using an etching method or the like. This makes it possible to form, for example, an island-shaped upper electrode 25, an electron injection layer 35, an emissive layer 33, a hole injection layer 31, and a lower electrode 21 (Figure 2C).

[0123] Furthermore, as shown in Figure 2C, the insulating layer 13 may also be etched during the etching process described above. As a result, the thickness of the insulating layer 13 in the region overlapping with the processed region of layer 21A may become thinner than the thickness of the insulating layer 13 in the region overlapping with the lower electrode 21.

[0124] As described above, in one aspect of the present invention, a metal mask, specifically a fine metal mask, is not used when differentiating the EL layers. Therefore, one aspect of the present invention can be a method for manufacturing a display device with high productivity.

[0125] When forming the light-emitting elements 20 using a fine metal mask, it is difficult to reduce the distance between adjacent light-emitting elements 20 to 20 μm or less due to dimensional accuracy constraints. On the other hand, in the method for manufacturing a display device according to one embodiment of the present invention, the light-emitting elements 20 are formed without using a fine metal mask, making it possible to reduce the distance between adjacent light-emitting elements 20 to 20 μm or less. For example, the distance between adjacent electron injection layers 35 can be reduced to 20 μm or less. Specifically, the distance between adjacent light-emitting elements 20 can be reduced to 0.5 μm or more and 15 μm or less, preferably 0.5 μm or more and 10 μm or less, and more preferably 0.5 μm or more and 5 μm or less. Therefore, improvements in pixel aperture ratio, higher resolution, and miniaturization can be achieved.

[0126] In this specification, devices fabricated using a metal mask or an FMM (Fine Metal Mask, a high-resolution metal mask) may be referred to as MM (Metal Mask) structured devices. Furthermore, in this specification, devices fabricated without using a metal mask or FMM may be referred to as MML (Metal Maskless) structured devices.

[0127] Furthermore, when the distance between the light-emitting elements 20 is 100 nm or less, typically 90 nm or less, it is necessary to use an optimal exposure apparatus. For example, a stepper and a scanner can be used as the exposure apparatus. Wavelengths of light sources that can be used in the exposure apparatus include 13 nm (EUV), 157 nm (F2), 193 nm (ArF), 248 nm (KrF), 308 nm (XeCl), 365 nm (i-line), and 436 nm (g-line). By using a short wavelength light source, it is possible to create a display device with high resolution or miniaturization.

[0128] Subsequently, the electron injection layer 35, the light-emitting layer 33, the hole injection layer 31, and the lower electrode 21 are etched horizontally. As a result, the upper electrode 25 will have a region 63 that protrudes from the side surface of the light-emitting layer 33, etc. (Figure 2D). Horizontal etching can be performed, for example, by highly isotropic etching. For example, the etching of layers 25A, 35A, 33A, 31A, and 21A shown in Figures 2B to 2C is referred to as the first etching, and the etching shown in Figures 2C to 2D is referred to as the second etching. In this case, it is preferable that the second etching is performed using a method with lower anisotropy, i.e., higher isotropy, than the first etching.

[0129] In this specification, for example, when etching layers 25A, 35A, 33A, 31A, and 21A by a first etching process, it is not necessary to etch layers 25A, 35A, 33A, 31A, and 21A all at once. For example, the etching conditions may differ for each layer to be etched. Even in such a case, layers 25A, 35A, 33A, 31A, and 21A are all said to be etched by the first etching process. The same applies to second and subsequent etching processes.

[0130] As shown in Figure 2D, the insulating layer 13 may also be etched horizontally by the horizontal etching of the electron injection layer 35, light-emitting layer 33, hole injection layer 31, and lower electrode 21. Furthermore, the hole injection layer 31 and lower electrode 21 do not need to be etched horizontally. In this case, the insulating layer 13 may not be etched horizontally. Additionally, the electron injection layer 35 does not need to be etched horizontally.

[0131] Next, a protective layer 43 is formed. The protective layer 43 is preferably formed by a method with low coverage, for example, by a method with lower coverage than the ALD method. For example, the protective layer 43 is formed by sputtering or CVD. As a result, the openings separating adjacent light-emitting elements 20 are not covered by the protective layer 43, and a gap 40 is formed (Figure 3A).

[0132] Subsequently, a microlens array 45 is formed on the protective layer 43 (Figure 3B). The microlens array 45 can be formed, for example, by forming a resist pattern using photolithography, followed by a heat treatment to reflow the resist.

[0133] Next, a substrate 53 is prepared, an insulating layer 51 is formed on the substrate 53, and a light-shielding layer 49 is formed on the insulating layer 51. Then, a colored layer 55R, a colored layer 55G, and a colored layer 55B are formed on the insulating layer 51 and the light-shielding layer 49 (Figure 3C). After that, an adhesive layer 47 is formed on the colored layer 55R, the colored layer 55G, the colored layer 55B, and the light-shielding layer 49, and the microlens array 45 is bonded to the colored layer 55 and the light-shielding layer 49 by the adhesive layer 47. The adhesive layer 47 can be formed by screen printing or dispensing. By doing so, the display device 10 shown in Figure 1A can be manufactured.

[0134] <Example of display device configuration_2> Figure 4 is a cross-sectional view showing an example configuration of the display device 10, and is a modified version of the display device 10 shown in Figure 1A. The display device 10 shown in Figure 4 differs from the display device 10 shown in Figure 1A in that the pixels 60 do not have a colored layer 55. In the display device 10 shown in Figure 4, the light-emitting layer 33 is provided as follows: a light-emitting layer 33R is provided for pixels 60R, a light-emitting layer 33G is provided for pixels 60G, and a light-emitting layer 33B is provided for pixels 60B. A light-emitting element 20 having a light-emitting layer 33R is referred to as a light-emitting element 20R, a light-emitting element 20 having a light-emitting layer 33G is referred to as a light-emitting element 20G, and a light-emitting element 20 having a light-emitting layer 33B is referred to as a light-emitting element 20B.

[0135] The light-emitting layers 33R, 33G, and 33B can each have the function of emitting light of different colors. For example, light-emitting layer 33R may have the function of emitting red light, light-emitting layer 33G may have the function of emitting green light, and light-emitting layer 33B may have the function of emitting blue light. Light-emitting layers 33R, 33G, and 33B may also have the function of emitting cyan, magenta, yellow, or other colors of light. In addition, although three types of light-emitting layers 33 are shown in Figure 1A, the display device 10 may have four or more types of light-emitting layers 33. For example, the display device 10 may have a light-emitting layer 33R that emits red light, a light-emitting layer 33G that emits green light, a light-emitting layer 33B that emits blue light, and a light-emitting layer that emits white light.

[0136] A structure in which the light-emitting layer 33R, light-emitting layer 33G, and light-emitting layer 33B each emit light of a different color is called an SBS (Side By Side) structure of the light-emitting element 20. By making the light-emitting element 20 an SBS structure, the power consumption of the display device 10 can be reduced compared to when all light-emitting layers 33 emit light of the same color.

[0137] <An example of a method for manufacturing a display device_2> Below, an example of a method for manufacturing the display device 10 shown in Figure 4 will be explained with reference to the drawings. Steps common to the example of manufacturing the display device 10 shown in Figure 1A will be omitted as appropriate.

[0138] First, layers 31A are formed using the same method as shown in Figures 2A and 2B. Next, layer 33RA, which will become the light-emitting layer 33R, is deposited (Figure 5A). Layer 33RA can be deposited using the same method as layer 33A. If a hole transport layer is provided on the hole injection layer 31, the layer that will become the hole transport layer is deposited on layer 31A, and then layer 33RA is deposited. Furthermore, if an electron transport layer is provided on the light-emitting layer 33R, the layer that will become the electron transport layer is deposited after layer 33RA is deposited.

[0139] Subsequently, layer 140A is deposited on layer 33RA (Figure 5B). Layer 140A can be deposited using wet deposition methods such as spin coating, dip coating, spray coating, inkjet printing, dispensing, screen printing, offset printing, doctor knife method, slit coating, roll coating, curtain coating, and knife coating. Other deposition methods may also be used, including vapor deposition, as appropriate.

[0140] For layer 140A, it is preferable to use a material that is soluble in a chemically stable solvent. In particular, a material that is soluble in water or alcohol can be suitably used for layer 140A. When forming layer 140A, it is preferable to coat it using the wet film formation method described above while dissolved in a solvent such as water or alcohol, and then perform a heat treatment to evaporate the solvent. At this time, performing the heat treatment under a reduced pressure atmosphere is preferable because it allows the solvent to be removed at a low temperature and in a short time, thereby reducing thermal damage to layer 33RA.

[0141] For layer 140A, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin can be used.

[0142] Next, layers 140A, 33RA, and 31A are processed using an etching method or the like. Specifically, for example, after forming a resist mask on layer 140A, layers 140A, 33RA, and 31A are processed using an etching method or the like. This allows for the formation of, for example, island-shaped sacrificial layers 140, light-emitting layers 33R, and hole injection layers 31 (Figure 5C). In other words, layer 140A is the layer that becomes the sacrificial layer 140 on the light-emitting layer 33R.

[0143] Subsequently, layer 31B, which will become the hole injection layer 31, layer 33GA, which will become the light-emitting layer 33G, and layer 140B are deposited on layer 21A and sacrificial layer 140 (Figure 5D). Layer 31B can be deposited using the same method as layer 31A, layer 33GA can be deposited using the same method as layer 33RA, and layer 140B can be deposited using the same method as layer 140A. Layer 140B can also have the same material as layer 140A. Furthermore, if a hole transport layer is provided on the hole injection layer 31, a layer that will become the hole transport layer is deposited on layer 31B, and then layer 33GA is deposited. Furthermore, if an electron transport layer is provided on the light-emitting layer 33G, layer 33GA is deposited first, and then the layer that will become the electron transport layer is deposited.

[0144] Next, layers 140B, 33GA, and 31B are processed using an etching method or the like. Specifically, for example, after forming a resist mask on layer 140B, layers 140B, 33GA, and 31B are processed using an etching method or the like. This allows for the formation of, for example, island-shaped sacrificial layers 140, light-emitting layers 33G, and hole injection layers 31 (Figure 6A). In other words, layer 140B is the layer that becomes the sacrificial layer 140 on the light-emitting layer 33G.

[0145] Subsequently, layer 31C, which will become the hole injection layer 31, layer 33BA, which will become the light-emitting layer 33B, and layer 140C are deposited on layer 21A and sacrificial layer 140 (Figure 6B). Layer 31C can be deposited using the same method as layer 31A, layer 33BA can be deposited using the same method as layer 33RA, and layer 140C can be deposited using the same method as layer 140A. Layer 140C can also have the same material as layer 140A. Furthermore, if a hole transport layer is provided on the hole injection layer 31, a layer that will become the hole transport layer is deposited on layer 31C, and then layer 33BA is deposited. Furthermore, if an electron transport layer is provided on the light-emitting layer 33B, a layer that will become the electron transport layer is deposited after layer 33BA is deposited.

[0146] Next, layers 140C, 33BA, and 31C are processed using an etching method or the like. Specifically, for example, after forming a resist mask on layer 140C, layers 140C, 33BA, and 31C are processed using an etching method or the like. This allows for the formation of, for example, island-shaped sacrificial layers 140, light-emitting layers 33B, and hole-injection layers 31 (Figure 6C). In other words, layer 140C is the layer that becomes the sacrificial layer 140 on the light-emitting layer 33B.

[0147] Subsequently, the sacrificial layer 140 is removed, exposing the upper surfaces of the light-emitting layer 33R, light-emitting layer 33G, and light-emitting layer 33B (Figure 6D).

[0148] The sacrificial layer 140 can be removed by etching. In this case, it is preferable to use a method that minimizes damage to the light-emitting layers 33R, 33G, and 33B. In particular, it is preferable to remove the sacrificial layer 140 by dissolving it in a solvent such as water or alcohol. Various alcohols can be used to dissolve the sacrificial layer 140, including ethyl alcohol, methyl alcohol, isopropyl alcohol (IPA), or glycerin.

[0149] After removing the sacrificial layer 140, it is preferable to perform a drying treatment to remove water contained inside the light-emitting layers 33R, 33G, and 33B, as well as water adsorbed on the surface. For example, it is preferable to perform a heat treatment in an inert gas atmosphere or a reduced-pressure atmosphere. The heat treatment can be performed at a substrate temperature of 50°C to 200°C, preferably 60°C to 120°C, and more preferably 70°C to 100°C. A reduced-pressure atmosphere is preferable because it allows drying at a lower temperature.

[0150] Through the above process, for example, the light-emitting layer 33R, light-emitting layer 33G, and light-emitting layer 33B can be selectively produced. Thus, in one aspect of the present invention, a metal mask, specifically a fine metal mask, is not used when selectively producing the light-emitting layer 33R, light-emitting layer 33G, and light-emitting layer 33B. Therefore, one aspect of the present invention can be a method for manufacturing a display device with high productivity. Note that the light-emitting layer 33 does not necessarily have to be formed in the order of light-emitting layer 33R, light-emitting layer 33G, and light-emitting layer 33B, and can be formed in any order. For example, the light-emitting layer 33B may be formed first, then the light-emitting layer 33G, and then the light-emitting layer 33R may be formed.

[0151] When forming the light-emitting elements 20 using a fine metal mask, it is difficult to reduce the distance between adjacent light-emitting elements 20 to 20 μm or less due to dimensional accuracy constraints. On the other hand, in the method for manufacturing a display device according to one embodiment of the present invention, the light-emitting elements 20 are formed without using a fine metal mask, making it possible to reduce the distance between adjacent light-emitting elements 20 to 20 μm or less. For example, the distance between adjacent electron injection layers 35 can be reduced to 20 μm or less. Specifically, the distance between adjacent light-emitting elements 20 can be reduced to 0.5 μm or more and 15 μm or less, preferably 0.5 μm or more and 10 μm or less, and more preferably 0.5 μm or more and 5 μm or less. Therefore, improvements in pixel aperture ratio, higher resolution, and miniaturization can be achieved.

[0152] Furthermore, when the distance between the light-emitting elements 20 is 100 nm or less, typically 90 nm or less, it is necessary to use an optimal exposure apparatus. For example, a stepper and a scanner can be used as the exposure apparatus. Wavelengths of light sources that can be used in the exposure apparatus include 13 nm (EUV), 157 nm (F2), 193 nm (ArF), 248 nm (KrF), 308 nm (XeCl), 365 nm (i-line), and 436 nm (g-line). By using a short wavelength light source, it is possible to create a display device with high resolution or miniaturization.

[0153] Next, layer 35A, which will become the electron injection layer 35, and layer 25A, which will become the upper electrode 25, are deposited on the light-emitting layer 33R, light-emitting layer 33G, light-emitting layer 33B, and layer 21A, respectively (Figure 7A). Layers 35A and 25A can be deposited by methods such as vapor deposition or sputtering. However, the above-described deposition methods can be used as appropriate.

[0154] Subsequently, layers 25A, 35A, and 21A are processed using an etching method or the like. Specifically, for example, after forming a resist mask on layer 25A, layers 25A, 35A, and 21A are processed using an etching method or the like. This allows for the formation of, for example, island-shaped upper electrodes 25, electron injection layers 35, and lower electrodes 21 (Figure 7B).

[0155] Furthermore, as shown in Figure 7B, when etching layer 21A, the insulating layer 13 may also be etched. As a result, the thickness of the insulating layer 13 in the region overlapping with the processed area of ​​layer 21A may become thinner than the thickness of the insulating layer 13 in the region overlapping with the lower electrode 21.

[0156] Next, the electron injection layer 35, the light-emitting layer 33, the hole injection layer 31, and the lower electrode 21 are etched horizontally in the same manner as shown in Figure 2D. Then, the protective layer 43 and the microlens array 45 are formed in the same manner as shown in Figures 3A and 3B (Figure 7C). As described above, the formation of the protective layer 43 creates the void 40.

[0157] Next, a substrate 53 is prepared, an insulating layer 51 is formed on the substrate 53, and a light-shielding layer 49 is formed on the insulating layer 51 (Figure 7D). Then, an adhesive layer 47 is formed on the insulating layer 51 and the light-shielding layer 49, and the microlens array 45, the insulating layer 51 and the light-shielding layer 49 are bonded together by the adhesive layer 47. The adhesive layer 47 can be formed by screen printing or dispensing. By doing so, the display device 10 shown in Figure 4 can be manufactured.

[0158] <Example of display device configuration_3> Figure 8 is a cross-sectional view showing an example configuration of the display device 10, and is a modified version of the display device 10 shown in Figure 1A. The display device 10 shown in Figure 8 differs from the display device 10 shown in Figure 1A in that it does not have a microlens array 45. By not having a microlens array 45 in the display device 10, the manufacturing process of the display device 10 can be simplified. Therefore, the manufacturing cost of the display device 10 can be reduced and the yield can be increased. As a result, the price of the display device 10 can be reduced. Note that the display device 10 shown in Figure 4 and other figures besides Figure 1A can also be configured without a microlens array 45.

[0159] Figure 9 is a cross-sectional view showing an example configuration of the display device 10, and is a modified version of the display device 10 shown in Figure 1A. The display device 10 shown in Figure 9 differs from the display device 10 shown in Figure 1A in that a partition wall 19 is provided on the insulating layer 13. The partition wall 19 can be, for example, an insulating layer.

[0160] The partition wall 19 is provided between adjacent pixels 60 and is positioned to cover the end of the lower electrode 21. In the display device 10 shown in Figure 9, the hole injection layer 31 is provided on the lower electrode 21 and on the partition wall 19. Note that the hole injection layer 31, the light-emitting layer 33, and the electron injection layer 35 do not necessarily have to overlap with the partition wall 19. Also, the upper electrode 25 does not necessarily have to overlap with the partition wall 19.

[0161] By providing the partition wall 19, electrical short circuits that may occur between adjacent lower electrodes 21, etc., can be suppressed. On the other hand, if the partition wall 19 is not provided, the aperture ratio can be increased. For example, in the case of a configuration without the partition wall 19, the aperture ratio of the pixels can be 70% or more, preferably 80% or more, and more preferably 90% or more.

[0162] When manufacturing the display device 10 shown in Figure 9, when etching the layer that will become the hole injection layer 31, for example, in an island shape, a part of the partition wall 19 may be etched. Also, when etching the electron injection layer 35, the light-emitting layer 33, and the hole injection layer 31 in the horizontal direction, the partition wall 19 may also be etched in the horizontal direction. As a result, a configuration can be achieved in which the void 40 fits into the partition wall 19.

[0163] When manufacturing the display device 10 shown in Figure 9, the lower electrode 21 is not etched horizontally. Since the display device 10 shown in Figure 9 is provided with a partition wall 19, even if, for example, a part of the upper electrode 25 enters the gap 40, the upper electrode 25 and the lower electrode 21 will not come into contact inside the gap 40 and cause an electrical short circuit.

[0164] Figure 10 is a cross-sectional view showing an example of the configuration of the display device 10. Figure 10 is a cross-sectional view showing an example of the configuration of the layers below the insulating layer 13 of the display device 10 shown in Figure 1A.

[0165] As shown in Figure 10, the display device 10 has a transistor 80 and an element isolation layer 86 on a substrate 81. In addition, insulating layers 131, 133, 135, and 137 are provided on the substrate 81.

[0166] Furthermore, the display device 10 has an insulating layer 71 on the insulating layer 137 and an insulating layer 13 on the insulating layer 71. Although Figure 10 illustrates a configuration in which an insulating layer 71 is provided, the device is not limited to this. For example, the device may have an insulating layer 13 on the insulating layer 137 without providing an insulating layer 71.

[0167] Furthermore, the display device 10 includes a conductive layer 67 and a conductive layer 69. The conductive layer 67 is embedded in the insulating layers 131, 133, 135, and 137, and the conductive layer 69 is embedded in the insulating layer 71. The height of the conductive layer 67 and the height of the insulating layer 137 can be made to be approximately the same, and the height of the conductive layer 69 and the height of the insulating layer 71 can be made to be approximately the same.

[0168] As shown in Figure 10, the light-emitting element 20 and the transistor 80 are arranged in a stacked manner. Here, the layer on which the light-emitting element 20 is provided is designated as layer 121, and the layer on which the transistor 80 is provided is designated as layer 125.

[0169] Transistor 80 is provided in each of the pixels 60R, 60G, and 60B. One of the sources or drains of transistor 80 is electrically connected to the lower electrode 21 of the light-emitting element 20R, the lower electrode 21 of the light-emitting element 20G, or the lower electrode 21 of the light-emitting element 20B via conductive layers 67, 69, 15, and 17. In other words, in the display device 10 shown in Figure 10, transistor 80 corresponds to transistor 11 shown in Figure 1A, etc.

[0170] Here, the conductive layer 69 functions as a plug for electrically connecting, for example, the conductive layer 67 and the conductive layer 15.

[0171] In addition to the transistors of the pixels 60, the layer 125 can also be provided with transistors of drive circuits such as scan line drive circuits.

[0172] The transistor 80 can be a transistor having silicon in its channel formation region (Si transistor). The silicon in the Si transistor can be single-crystal silicon, polycrystalline silicon (polysilicon), amorphous silicon, etc. In particular, it is preferable that the channel formation region of the transistor 80 is formed of single-crystal silicon.

[0173] The transistor 80 includes a conductive layer 82 that functions as a gate electrode, an insulating layer 83 that functions as a gate insulating layer, and a part of the substrate 81. The transistor 80 also has a semiconductor region including a channel formation region, a low-resistance region 85a that functions as either a source region or a drain region, and a low-resistance region 85b that functions as either a source region or a drain region. The transistor 80 may be either a p-channel or an n-channel type. Alternatively, the transistor 80 may be a so-called CMOS (Complementary Metal Oxide Semiconductor) transistor, which is a combination of an n-channel transistor and a p-channel transistor.

[0174] Transistor 80 is electrically isolated from other transistors by the element isolation layer 86. Figure 10 shows the case where transistors 80 are electrically isolated from each other by the element isolation layer 86. The element isolation layer 86 can be formed using the LOCOS (LOCal Oxidation of Silicon) method or the STI (Shallow Trench Isolation) method, etc.

[0175] Figure 11A is a cross-sectional view showing an example of the configuration of transistor 80 in the channel width direction (A1-A2 direction) as shown in Figure 10.

[0176] As shown in Figures 10 and 11A, the transistor 80 has a convex semiconductor region. Furthermore, the sides and top surface of the semiconductor region are covered by a conductive layer 82 via an insulating layer 83. The conductive layer 82 can be made of a material that adjusts the work function.

[0177] A transistor with a convex semiconductor region, such as the transistor 80 shown in Figures 10 and 11A, is called a fin-type transistor because it utilizes the convex portion of the semiconductor substrate. It may also have an insulator in contact with the upper part of the convex portion, functioning as a mask for forming the convex portion. Furthermore, while Figure 10 shows a configuration where a portion of the substrate 81 is processed to form the convex portion, a semiconductor with a convex shape may also be formed by processing an SOI (Silicon On Insulator) substrate.

[0178] Figures 11B and 11C are cross-sectional views showing examples of the configuration of transistor 80 in the channel length direction, and are modified versions of the transistor 80 shown in Figure 10. The transistor 80 shown in Figure 11B differs from the transistor 80 shown in Figure 10 in that it is a planar type transistor. Furthermore, the configuration shown in Figure 11C differs from the configuration shown in Figure 10 in that an insulating layer 88 is provided on the substrate 81, and the transistor 80 is provided on the insulating layer 88.

[0179] The transistor 80 shown in Figure 11C has a semiconductor layer 87. The semiconductor layer 87 can be a thin film, for example, a thin film containing silicon. Specifically, the semiconductor layer 87 can be a thin film containing amorphous silicon or low-temperature polysilicon. Alternatively, the semiconductor layer 87 can be single-crystal silicon (SOI) formed on an insulating layer 88.

[0180] For example, the insulating layers 131, 133, 135, 137, and 71 shown in Figure 10 function as interlayer films. Furthermore, the insulating layers 131, 133, 135, 137, and 71 may also function as flattening layers that cover the uneven surface beneath them.

[0181] The following describes the materials that can be used for substrates 81 and 53.

[0182] There are no major restrictions on the materials used for substrates 81 and 53. Depending on the purpose, the materials should be determined by considering factors such as the presence or absence of light transmission and heat resistance sufficient to withstand heat treatment. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, etc., can be used. Semiconductor substrates, flexible substrates, laminated films, base films, etc., may also be used.

[0183] Examples of semiconductor substrates include semiconductor substrates made of silicon or germanium, or compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, the semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0184] Furthermore, in order to enhance the flexibility of the display device 10, flexible substrates, laminated films, base films, etc., may be used for the substrates 81 and 53.

[0185] As materials for flexible substrates, bonding films, base films, etc., for example, polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethyl methacrylate resins, polycarbonate (PC) resins, polyethersulfone (PES) resins, polyamide resins (nylon, aramid, etc.), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamideimide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE) resins, ABS resins, cellulose nanofibers, etc. can be used.

[0186] By using the above materials as the substrate, a lightweight display device can be provided. Also, by using the above materials as the substrate, a display device resistant to impact can be provided. Further, by using the above materials as the substrate, a display device that is difficult to be damaged can be provided.

[0187] The flexible substrate used for substrate 81 and substrate 53 is preferably one with a lower linear expansion coefficient as the deformation due to the environment is more suppressed. The flexible substrate used for substrate 81 and substrate 53, for example, can be a material with a linear expansion coefficient of 1×10 -3 / K or less, 5×10 -5 / K or less, or 1×10 -5 / K or less. Particularly, aramid is preferable as a flexible substrate because of its low linear expansion coefficient.

[0188] FIG. 12 is a cross-sectional view showing a configuration example of the display device 10 and is a modified example of the display device 10 shown in FIG. 10. The display device 10 shown in FIG. 12 is different from the display device 10 shown in FIG. 10 in that a layer 123 is provided between layer 121 and layer 125.

[0189] A transistor 70 is provided in layer 123. The transistor 70 is provided in each of the pixels 60R, 60G, and 60B. In the display device 10 shown in Figure 12, either the source or drain of the transistor 70 is electrically connected to the lower electrode 21 of the light-emitting element 20R, the lower electrode 21 of the light-emitting element 20G, or the lower electrode 21 of the light-emitting element 20B via the conductive layer 15 and the conductive layer 17. In other words, in the display device 10 shown in Figure 10, the transistor 70 corresponds to the transistor 11 shown in Figure 1A, etc.

[0190] The transistor 70 can be an OS transistor (OS transistor) having a metal oxide in the channel formation region. The metal oxide in the OS transistor preferably contains at least indium or zinc. In particular, it is preferable that it contains indium and zinc. In addition, it is preferable that it contains aluminum, gallium, yttrium, tin, etc. Furthermore, it may contain one or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc.

[0191] <Example of display device configuration_4> Figure 13 is a cross-sectional view showing an example of the configuration of the display device 10, and in addition to the configuration shown in Figure 10, it also shows a sealing material 91, a connecting electrode 93, an anisotropic conductive layer 95, and an FPC (Flexible Printed Circuit) 97, etc.

[0192] As shown in Figure 13, the substrate 53 and the insulating layer 13 are bonded together by a sealing material 91. Furthermore, connecting electrodes 93 are provided on the insulating layer 13 and the conductive layer 17 so as to be electrically connected to, for example, the source or drain of a transistor 80. An anisotropic conductive layer 95 is provided to be electrically connected to the connecting electrodes 93, and an FPC 97 is provided to be electrically connected to the anisotropic conductive layer 95. Various signals are supplied to the display device 10 from outside the display device 10 via the FPC 97. Note that the sealing material 91 may be omitted, and the FPC 97 may be replaced by wire bonding.

[0193] Figure 14 is a cross-sectional view showing an example configuration of the display device 10, and is a modified version of the display device 10 shown in Figure 13. The display device 10 shown in Figure 14 differs from the display device 10 shown in Figure 13 in that it has a transistor 70 which can be an OS transistor or the like.

[0194] Figure 15A is a block diagram showing an example configuration of the display device 10. The display device 10 includes a display unit 100, a scan line driving circuit 101, and a data line driving circuit 103. Pixels 60 are arranged in a matrix on the display unit 100. The scan line driving circuit 101 and the data line driving circuit 103 can be configured to include transistors 80.

[0195] The scan line drive circuit 101 is electrically connected to the pixel 60 via wiring 105. The data line drive circuit 103 is electrically connected to the pixel 60 via wiring 107. Wirings 105 and 107 can be configured to extend in orthogonal directions.

[0196] The scan line drive circuit 101 has the function of generating a selection signal for selecting the pixel 60 on which to write image data. The data line drive circuit 103 has the function of generating a signal (data signal) representing image data. The selection signal is supplied to the pixel 60 via wiring 105, and the data signal is supplied to the pixel 60 via wiring 107.

[0197] Figure 15B is a circuit diagram showing an example configuration of a pixel 60. The pixel 60 has a light-emitting element 20 and a pixel circuit 110.

[0198] The pixel circuit 110 includes transistor 111, transistor 11, transistor 113, and capacitor 115. The pixel circuit 110 is also electrically connected to one electrode of the light-emitting element 20. As mentioned above, transistor 11 can be transistor 80 as shown in Figure 10, etc., or transistor 70 as shown in Figure 12, etc.

[0199] One of the sources or drains of transistor 111 is electrically connected to the gate of transistor 11. The gate of transistor 11 is electrically connected to one electrode of capacitor 115. One of the sources or drains of transistor 111 is electrically connected to one of the sources or drains of transistor 113. One of the sources or drains of transistor 113 is electrically connected to the other electrode of capacitor 115. The other electrode of capacitor 115 is electrically connected to one electrode of light-emitting element 20. Here, the node where one of the sources or drains of transistor 111, the gate of transistor 11, and one electrode of capacitor 115 are electrically connected is called node 117. Also, the node where one of the sources or drains of transistor 111, one of the sources or drains of transistor 113, the other electrode of capacitor 115, and one electrode of light-emitting element 20 are electrically connected is called node 119.

[0200] The source or drain of transistor 111 is electrically connected to wiring 107. The gate of transistor 111 and the gate of transistor 113 are electrically connected to wiring 105. The source or drain of transistor 11 is electrically connected to potential supply line VL_a. The source or drain of transistor 113 is electrically connected to potential supply line VL0. The other electrode of light-emitting element 20 is electrically connected to potential supply line VL_b.

[0201] Transistor 111 has the function of controlling the writing of image data to node 117. Capacitor 115 has the function of a retention capacitor that holds the data written to node 117.

[0202] In a display device having pixel circuits 110, the scan line drive circuit 101 sequentially selects the pixel circuits 110 of each row, turns on transistors 111 and 113, and writes image data to node 117.

[0203] When image data is written to node 117, the pixel circuit 110 enters a holding state when transistors 111 and 113 are turned off. Furthermore, the amount of current flowing between the drain and source of transistor 11 is controlled in accordance with the potential of node 119, and the light-emitting element 20 emits light with a brightness corresponding to that current. By performing this sequentially row by row, an image can be displayed on the display unit 100.

[0204] <Example of transistor configuration> Figures 16A, 16B, and 16C are top and cross-sectional views of transistor 70 and the area surrounding transistor 70.

[0205] Figure 16A is a top view of transistor 70. Figures 16B and 16C are cross-sectional views of transistor 70. Here, Figure 16B is a cross-sectional view of the region indicated by the dashed line X1-X2 in Figure 16A, and is also a cross-sectional view of transistor 70 in the channel length direction. Similarly, Figure 16C is a cross-sectional view of the region indicated by the dashed line Y1-Y2 in Figure 16A, and is also a cross-sectional view of transistor 70 in the channel width direction. Note that in the top view of Figure 16A, some elements have been omitted for clarity.

[0206] As shown in Figures 16A, 16B, and 16C, the transistor 70 includes a metal oxide 230a disposed on a substrate (not shown), a metal oxide 230b disposed on the metal oxide 230a, conductors 242a and 242b disposed on the metal oxide 230b at a distance from each other, an insulator 280 disposed on the conductors 242a and 242b with an opening formed between the conductors 242a and 242b, a conductor 260 disposed in the opening, an insulator 250 disposed between the metal oxide 230b, conductor 242a, conductor 242b, insulator 280, and conductor 260, and a metal oxide 230c disposed between the metal oxide 230b, conductor 242a, conductor 242b, insulator 280, and insulator 250. Here, as shown in Figures 16B and 16C, it is preferable that the upper surface of the conductor 260 substantially coincides with the upper surfaces of the insulator 250, insulator 254, metal oxide 230c, and insulator 280. In the following, metal oxide 230a, metal oxide 230b, and metal oxide 230c may be collectively referred to as metal oxide 230. Also, conductors 242a and conductors 242b may be collectively referred to as conductor 242.

[0207] In the transistor 70 shown in Figure 16B, the sides of the conductors 242a and 242b facing the conductor 260 have a generally vertical shape. However, the transistor 70 shown in Figure 16B is not limited to this, and the angle between the side and bottom surfaces of the conductors 242a and 242b may be 10° to 80°, preferably 30° to 60°. Furthermore, the opposing sides of the conductors 242a and 242b may have multiple surfaces.

[0208] As shown in Figures 16B and 16C, it is preferable that an insulator 254 is placed between the insulator 224, metal oxide 230a, metal oxide 230b, conductor 242a, conductor 242b, and metal oxide 230c and the insulator 280. Here, it is preferable that the insulator 254 is in contact with the side surface of the metal oxide 230c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 230a and metal oxide 230b, and the top surface of the insulator 224, as shown in Figures 16B and 16C.

[0209] In the transistor 70, a configuration is shown in which three layers of metal oxide 230a, metal oxide 230b, and metal oxide 230c are stacked in the region where the channel is formed (hereinafter also referred to as the channel formation region) and in its vicinity. However, the present invention is not limited to this. For example, a two-layer structure of metal oxide 230b and metal oxide 230c, or a stacked structure of four or more layers, may be provided. Also, in the transistor 70, the conductor 260 is shown as a two-layer stacked structure. However, the present invention is not limited to this. For example, the conductor 260 may be a single-layer structure or a stacked structure of three or more layers. Furthermore, each of the metal oxide 230a, metal oxide 230b, and metal oxide 230c may have a stacked structure of two or more layers.

[0210] For example, if the metal oxide 230c has a layered structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has the same composition as metal oxide 230b and the second metal oxide has the same composition as metal oxide 230a.

[0211] Here, the conductor 260 functions as the gate electrode of the transistor, and the conductors 242a and 242b function as the source electrode or drain electrode, respectively. As described above, the conductor 260 is formed to be embedded in the opening of the insulator 280 and in the region sandwiched between the conductors 242a and 242b. Here, the arrangement of the conductors 260, 242a, and 242b is selected in a self-aligned manner with respect to the opening of the insulator 280. In other words, in the transistor 70, the gate electrode can be positioned in a self-aligned manner between the source electrode and the drain electrode. Therefore, since the conductor 260 can be formed without providing a positional margin, the occupied area of ​​the transistor 70 can be reduced. This makes it possible to make the display device high-resolution. It also makes it possible to make the display device narrow-bezel.

[0212] As shown in Figures 16B and 16C, it is preferable that the conductor 260 has a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a.

[0213] The transistor 70 preferably includes an insulator 214 disposed on a substrate (not shown), an insulator 216 disposed on top of the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed on top of the insulator 216 and the conductor 205, and an insulator 224 disposed on top of the insulator 222. It is preferable that a metal oxide 230a is disposed on top of the insulator 224.

[0214] It is preferable that an insulator 274 and an insulator 281, which function as interlayer films, are placed on top of the transistor 70. Here, it is preferable that the insulator 274 is placed in contact with the upper surfaces of the conductor 260, insulator 250, insulator 254, metal oxide 230c, and insulator 280.

[0215] It is preferable that insulators 222, 254, and 274 have a function to suppress the diffusion of hydrogen (for example, at least one such as hydrogen atoms or hydrogen molecules). For example, it is preferable that insulators 222, 254, and 274 have lower hydrogen permeability than insulators 224, 250, and 280. It is also preferable that insulators 222 and 254 have a function to suppress the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules). For example, it is preferable that insulators 222 and 254 have lower oxygen permeability than insulators 224, 250, and 280.

[0216] Here, insulator 224, metal oxide 230, and insulator 250 are separated from insulators 280 and 281 by insulators 254 and 274. Therefore, it is possible to suppress the mixing of impurities such as hydrogen, or excess oxygen, contained in insulators 280 and 281, into insulators 224, metal oxide 230a, metal oxide 230b, and insulator 250.

[0217] It is preferable that a conductor 240 (conductor 240a and conductor 240b) is provided that is electrically connected to the transistor 70 and functions as a plug. In addition, an insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface of the conductor 240 that functions as a plug. That is, the insulator 241 is provided in contact with the inner wall of the opening of the insulator 254, insulator 280, insulator 274, and insulator 281. Alternatively, a first conductor of the conductor 240 may be provided in contact with the side surface of the insulator 241, and a second conductor of the conductor 240 may be provided further inside. Here, the height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 281 can be made to be approximately the same. Although the transistor 70 shows a configuration in which the first conductor and the second conductor of the conductor 240 are stacked, the present invention is not limited to this. For example, the conductor 240 may be provided as a single layer or as a laminated structure of three or more layers. When the structure has a laminated structure, an ordinal number may be assigned to distinguish it according to the order of formation.

[0218] In transistor 70, it is preferable to use a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) for the metal oxide 230 (metal oxide 230a, metal oxide 230b, and metal oxide 230c) that includes a channel formation region. For example, it is preferable to use a metal oxide with a band gap of 2 eV or more, preferably 2.5 eV or more, as the metal oxide that forms the channel formation region of the metal oxide 230.

[0219] The above metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it is preferable that it contains indium (In) and zinc (Zn). In addition, it is preferable that it contains element M. As element M, one or more of the following can be used: aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), or cobalt (Co). In particular, it is preferable that element M is one or more of aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn). Furthermore, it is even more preferable that element M contains either Ga or Sn, or both.

[0220] Furthermore, as shown in Figure 16B, the thickness of the metal oxide 230b in the region that does not overlap with the conductor 242 may be thinner than the thickness of the metal oxide 230b in the region that overlaps with the conductor 242. This is formed by removing a portion of the upper surface of the metal oxide 230b when forming the conductors 242a and 242b. When a conductive film that will become the conductor 242 is deposited on the upper surface of the metal oxide 230b, a region with low resistance may be formed near the interface with the conductive film. In this way, by removing the region with low resistance located between the conductors 242a and 242b on the upper surface of the metal oxide 230b, it is possible to prevent the formation of a channel in that region.

[0221] According to one aspect of the present invention, a display device with a small size transistor and high resolution can be provided. Alternatively, a display device with a large on-current transistor and high brightness can be provided. Alternatively, a display device with a fast-operating transistor and fast operation can be provided. Alternatively, a display device with a stable electrical characteristic transistor and high reliability can be provided. Alternatively, a display device with a small off-current transistor and low power consumption can be provided.

[0222] A detailed configuration of a transistor 70 that can be used in a display device according to one aspect of the present invention will be described.

[0223] The conductor 205 is arranged so as to have an overlapping region with the metal oxide 230 and the conductor 260. Furthermore, it is preferable that the conductor 205 is embedded in the insulator 216.

[0224] The conductor 205 comprises conductor 205a, conductor 205b, and conductor 205c. Conductor 205a is provided in contact with the bottom surface and side wall of an opening provided in the insulator 216. Conductor 205b is provided so as to be embedded in a recess formed in conductor 205a. Here, the upper surface of conductor 205b is lower than the upper surface of conductor 205a and the upper surface of the insulator 216. Conductor 205c is provided in contact with the upper surface of conductor 205b and the side surface of conductor 205a. Here, the height of the upper surface of conductor 205c is approximately equal to the height of the upper surface of conductor 205a and the upper surface of the insulator 216. In other words, conductor 205b is enclosed by conductors 205a and 205c.

[0225] It is preferable that the conductors 205a and 205c use conductive materials that have the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use conductive materials that have the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms and oxygen molecules).

[0226] By using conductive materials that have the function of reducing hydrogen diffusion for conductors 205a and 205c, it is possible to suppress the diffusion of impurities such as hydrogen contained in conductor 205b into the metal oxide 230 via the insulator 224, etc. Furthermore, by using conductive materials that have the function of suppressing oxygen diffusion for conductors 205a and 205c, it is possible to suppress the oxidation of conductor 205b and the resulting decrease in conductivity. As conductive materials that have the function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. Therefore, the conductive material can be used as a single layer or in a laminate for conductor 205a. For example, titanium nitride can be used for conductor 205a.

[0227] Furthermore, it is preferable to use a conductive material whose main component is tungsten, copper, or aluminum for the conductor 205b. For example, tungsten may be used for the conductor 205b.

[0228] Here, the conductor 260 may function as the first gate (also called the top gate) electrode. Also, the conductor 205 may function as the second gate (also called the bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently of the potential applied to the conductor 260, the V of the transistor 70 can be controlled. th This can be controlled. In particular, by applying a negative potential to the conductor 205, the V of transistor 70 can be controlled. th By making the voltage greater than 0V, it becomes possible to reduce the off-current. Therefore, applying a negative potential to the conductor 205 reduces the drain current when the potential applied to the conductor 260 is 0V compared to not applying a negative potential.

[0229] The conductor 205 should be larger than the channel-forming region in the metal oxide 230. In particular, as shown in Figure 16C, it is preferable that the conductor 205 extends to the region outside the end that intersects with the channel width direction of the metal oxide 230. That is, it is preferable that the conductor 205 and the conductor 260 are superimposed on the outside of the side surface in the channel width direction of the metal oxide 230, with an insulator in between.

[0230] With the above configuration, the channel-forming region of the metal oxide 230 can be electrically surrounded by the electric field of the conductor 260, which functions as the first gate electrode, and the electric field of the conductor 205, which functions as the second gate electrode.

[0231] As shown in Figure 16C, the conductor 205 is extended to function as wiring. However, the configuration is not limited to this, and a conductor that functions as wiring may be provided beneath the conductor 205.

[0232] The insulator 214 preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 70 from the substrate side. Therefore, it is preferable to use an insulating material for the insulator 214 that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms (i.e., the above impurities are less permeable). Alternatively, it is preferable to use an insulating material that has the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (i.e., the above oxygen is less permeable).

[0233] For example, it is preferable to use aluminum oxide or silicon nitride as the insulator 214. This suppresses the diffusion of impurities such as water or hydrogen from the substrate side to the transistor 70 side beyond the insulator 214. Alternatively, it suppresses the diffusion of oxygen contained in the insulator 224, etc., to the substrate side beyond the insulator 214.

[0234] The insulators 216, 280, and 281, which function as interlayer films, preferably have a lower dielectric constant than insulator 214. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance between wiring can be reduced. For example, silicon oxide, silicon oxynitride, silicon nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or porous silicon oxide may be used as insulators 216, 280, and 281.

[0235] Insulators 222 and 224 function as gate insulators.

[0236] Here, it is preferable that the insulator 224 in contact with the metal oxide 230 deoxygenates upon heating. In this specification, oxygen that is deoxygenated upon heating is sometimes referred to as excess oxygen. For example, the insulator 224 may be silicon oxide or silicon oxynitride, etc., as appropriate. By providing an oxygen-containing insulator in contact with the metal oxide 230, the oxygen deficiency in the metal oxide 230 can be reduced, and the reliability of the transistor 70 can be improved.

[0237] Specifically, it is preferable to use an oxide material in which some oxygen is desorbed upon heating as the insulator 224. An oxide that desorbs oxygen upon heating is one in which the amount of oxygen desorbed, converted to oxygen atoms, is 1.0 × 10¹⁶ as determined by TDS (Thermal Desorption Spectroscopy) analysis. 18 atoms / cm 3 Preferably 1.0 × 10 19 atoms / cm 3 More preferably 2.0 × 10 19 atoms / cm 3 The above, or 3.0 × 10 20 atoms / cm 3 The oxide film is as described above. The surface temperature of the film during the TDS analysis is preferably in the range of 100°C to 700°C, or 100°C to 400°C.

[0238] As shown in Figure 16C, the thickness of the insulator 224 in the region that does not overlap with the insulator 254 and does not overlap with the metal oxide 230b may be thinner than the thickness of the other regions. In the insulator 224, it is preferable that the thickness of the region that does not overlap with the insulator 254 and does not overlap with the metal oxide 230b is such that the above-mentioned oxygen can diffuse sufficiently.

[0239] The insulator 222, like the insulator 214, preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 70 from the substrate side. For example, it is preferable that the insulator 222 has lower hydrogen permeability than the insulator 224. By surrounding the insulator 224, the metal oxide 230, and the insulator 250, etc., with the insulators 222, 254, and 274, it is possible to suppress the ingress of impurities such as water or hydrogen into the transistor 70 from the outside.

[0240] Furthermore, it is preferable that the insulator 222 has a function to suppress the diffusion of oxygen (for example, at least one such as oxygen atoms and oxygen molecules) (i.e., it is difficult for the above-mentioned oxygen to permeate it). For example, it is preferable that the insulator 222 has lower oxygen permeability than the insulator 224. It is preferable that the insulator 222 has a function to suppress the diffusion of oxygen or impurities, thereby reducing the diffusion of oxygen contained in the metal oxide 230 to the substrate side. In addition, it is possible to suppress the reaction of the conductor 205 with the oxygen contained in the insulator 224 or the oxygen contained in the metal oxide 230.

[0241] The insulator 222 may be an insulator containing an oxide of either or both aluminum and hafnium, which are insulating materials. Preferably, the insulator containing an oxide of either or both aluminum and hafnium is an aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses the release of oxygen from the metal oxide 230 and the incorporation of impurities such as hydrogen from the periphery of the transistor 70 into the metal oxide 230.

[0242] Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be subjected to nitriding treatment. Silicon oxide, silicon oxide nitride, or silicon nitride may be laminated onto the above insulators.

[0243] The insulator 222 may be a single-layer or multi-layer insulator containing so-called high-k materials such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more integrated, thinning of the gate insulator can lead to problems such as leakage current. By using a high-k material as the insulator that functions as the gate insulator, it becomes possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0244] Furthermore, the insulators 222 and 224 may have a laminated structure of two or more layers. In that case, the laminated structure is not limited to being made of the same material, but may be made of different materials. For example, an insulator similar to the insulator 224 may be provided below the insulator 222.

[0245] The metal oxide 230 comprises a metal oxide 230a, a metal oxide 230b on the metal oxide 230a, and a metal oxide 230c on the metal oxide 230b. By having the metal oxide 230a below the metal oxide 230b, the diffusion of impurities from structures formed below the metal oxide 230a to the metal oxide 230b can be suppressed. Furthermore, by having the metal oxide 230c on the metal oxide 230b, the diffusion of impurities from structures formed above the metal oxide 230c to the metal oxide 230b can be suppressed.

[0246] Furthermore, it is preferable that the metal oxide 230 has a layered structure of multiple oxide layers with different atomic ratios of each metal atom. For example, if the metal oxide 230 contains at least indium (In) and element M, it is preferable that the ratio of the number of atoms of element M contained in metal oxide 230a to the total number of atoms of all elements constituting metal oxide 230a is higher than the ratio of the number of atoms of element M contained in metal oxide 230b to the total number of atoms of all elements constituting metal oxide 230b. It is also preferable that the atomic ratio of element M contained in metal oxide 230a to In is higher than the atomic ratio of element M contained in metal oxide 230b to In. Here, metal oxide 230c can be any metal oxide that can be used in metal oxide 230a or metal oxide 230b.

[0247] It is preferable that the energy at the lower end of the conduction band of metal oxide 230a and metal oxide 230c is higher than the energy at the lower end of the conduction band of metal oxide 230b. In other words, it is preferable that the electron affinity of metal oxide 230a and metal oxide 230c is smaller than the electron affinity of metal oxide 230b. In this case, it is preferable that metal oxide 230c is a metal oxide that can be used for metal oxide 230a. Specifically, it is preferable that the ratio of the number of atoms of element M contained in metal oxide 230c to the total number of atoms of all elements constituting metal oxide 230c is higher than the ratio of the number of atoms of element M contained in metal oxide 230b to the total number of atoms of all elements constituting metal oxide 230b. It is also preferable that the atomic ratio of element M contained in metal oxide 230c to In is higher than the atomic ratio of element M contained in metal oxide 230b to In.

[0248] Here, at the junctions of metal oxide 230a, metal oxide 230b, and metal oxide 230c, the energy level at the lower end of the conduction band changes smoothly. In other words, the energy level at the lower end of the conduction band at the junctions of metal oxide 230a, metal oxide 230b, and metal oxide 230c can be said to change continuously or be continuously joined. To achieve this, it is desirable to lower the defect level density of the mixed layer formed at the interface between metal oxide 230a and metal oxide 230b, and at the interface between metal oxide 230b and metal oxide 230c.

[0249] Specifically, a mixed layer with a low defect level density can be formed by having metal oxide 230a and metal oxide 230b, and metal oxide 230b and metal oxide 230c, all having a common element other than oxygen (which serves as the main component). For example, if metal oxide 230b is In-Ga-Zn oxide, then In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, etc., may be used as metal oxide 230a and metal oxide 230c. Furthermore, metal oxide 230c may be in a layered structure. For example, a layered structure of In-Ga-Zn oxide and Ga-Zn oxide on the In-Ga-Zn oxide, or a layered structure of In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used. In other words, a layered structure of In-Ga-Zn oxide and an oxide that does not contain In may be used as metal oxide 230c.

[0250] Specifically, for metal oxide 230a, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4 or 1:1:0.5 may be used. For metal oxide 230b, a metal oxide with an atomic ratio of In:Ga:Zn = 4:2:3 or 3:1:2 may be used. For metal oxide 230c, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4, In:Ga:Zn = 4:2:3, Ga:Zn = 2:1, or Ga:Zn = 2:5 may be used. Furthermore, specific examples of layered structures for metal oxide 230c include a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], and a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and gallium oxide.

[0251] In this case, the main carrier pathway is metal oxide 230b. By configuring metal oxide 230a and metal oxide 230c as described above, the defect level density at the interface between metal oxide 230a and metal oxide 230b, and at the interface between metal oxide 230b and metal oxide 230c, can be reduced. As a result, the influence of interface scattering on carrier conduction is reduced, and the transistor 70 can obtain a high on-current and high frequency characteristics. Furthermore, if metal oxide 230c is in a stacked structure, in addition to the effect of reducing the defect level density at the interface between metal oxide 230b and metal oxide 230c as described above, it is expected that the diffusion of constituent elements of metal oxide 230c to the insulator 250 side will be suppressed. More specifically, by making metal oxide 230c in a stacked structure and positioning an oxide that does not contain In on top of the stacked structure, it is possible to suppress In that could diffuse to the insulator 250 side. Since the insulator 250 functions as a gate insulator, if In diffuses, it will result in poor transistor characteristics. Therefore, by using a layered structure for the metal oxide 230c, it becomes possible to provide a highly reliable display device.

[0252] A conductor 242 (conductor 242a and conductor 242b) that functions as a source electrode and a drain electrode is provided on the metal oxide 230b. It is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum as the conductor 242, or an alloy containing the above metal elements, or an alloy combining the above metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen.

[0253] By providing the conductor 242 in contact with the metal oxide 230, the oxygen concentration in the vicinity of the conductor 242 in the metal oxide 230 may be reduced. In addition, a metal compound layer containing the metal in the conductor 242 and the components of the metal oxide 230 may be formed in the vicinity of the conductor 242 in the metal oxide 230. In such a case, the carrier density increases in the region of the metal oxide 230 near the conductor 242, and this region becomes a low-resistance region.

[0254] Here, the region between the conductor 242a and the conductor 242b is formed by superimposing it on the opening of the insulator 280. This allows the conductor 260 to be positioned self-aligned between the conductor 242a and the conductor 242b.

[0255] Insulator 250 functions as a gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the metal oxide 230c. The insulator 250 can use silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, and silicon oxide having pores. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

[0256] Similar to the insulator 224, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 250 is reduced. The film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0257] A metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. Thereby, oxidation of the conductor 260 by oxygen in the insulator 250 can be suppressed.

[0258] The metal oxide may function as a part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, the metal oxide preferably uses a metal oxide that is a high-k material having a high relative dielectric constant. By making the gate insulator have a laminated structure of the insulator 250 and the metal oxide, a laminated structure that is stable against heat and has a high relative dielectric constant can be obtained. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. In addition, it is possible to thin the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator.

[0259] Specifically, metal oxides containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used. In particular, it is preferable to use insulators containing oxides of aluminum, hafnium, or both, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0260] Although the conductor 260 is shown as a two-layer structure in Figures 16B and 16C, it may also be a single-layer structure or a multilayer structure of three or more layers.

[0261] It is preferable to use a conductor 260a that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms and oxygen molecules).

[0262] The conductor 260a has the function of suppressing oxygen diffusion, thereby preventing the conductor 260b from oxidizing due to oxygen contained in the insulator 250 and reducing its conductivity. It is preferable to use a conductive material that has the function of suppressing oxygen diffusion, such as tantalum, tantalum nitride, ruthenium, or ruthenium oxide.

[0263] The conductor 260b is preferably made of a conductive material mainly composed of tungsten, copper, or aluminum. Furthermore, since the conductor 260 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. The conductor 260b may also have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0264] As shown in Figures 16A and 16C, in the region of the metal oxide 230b that does not overlap with the conductor 242, in other words, in the channel-forming region of the metal oxide 230, the side surface of the metal oxide 230 is covered by the conductor 260. This makes it easier to apply the electric field of the conductor 260, which functions as the first gate electrode, to the side surface of the metal oxide 230. Therefore, the on-current of the transistor 70 can be increased and the frequency characteristics can be improved.

[0265] The insulator 254, like the insulator 214, preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 70 from the insulator 280 side. For example, it is preferable that the insulator 254 has lower hydrogen permeability than the insulator 224. Furthermore, as shown in Figures 16B and 16C, it is preferable that the insulator 254 is in contact with the side surface of the metal oxide 230c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 230a and metal oxide 230b, and the top surface of the insulator 224. With this configuration, it is possible to suppress the ingress of hydrogen contained in the insulator 280 into the metal oxide 230 from the top or side surfaces of the conductor 242a, conductor 242b, metal oxide 230a, metal oxide 230b, and the insulator 224.

[0266] Furthermore, it is preferable that the insulator 254 has the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (i.e., it is difficult for the above-mentioned oxygen to permeate through it). For example, it is preferable that the insulator 254 has lower oxygen permeability than the insulator 280 or the insulator 224.

[0267] The insulator 254 is preferably deposited using a sputtering method. By depositing the insulator 254 using a sputtering method in an oxygen-containing atmosphere, oxygen can be added to the vicinity of the region of the insulator 224 that is in contact with the insulator 254. This allows oxygen to be supplied from this region to the metal oxide 230 via the insulator 224. Here, the insulator 254 has a function to suppress upward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 230 to the insulator 280. In addition, the insulator 222 has a function to suppress downward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 230 to the substrate side. In this way, oxygen is supplied to the channel formation region of the metal oxide 230. This reduces oxygen deficiency in the metal oxide 230 and suppresses normally-on formation of the transistor.

[0268] As the insulator 254, for example, an insulator containing an oxide of one or both of aluminum and hafnium may be formed as a film. It is preferable to use aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) as the insulator containing an oxide of one or both of aluminum and hafnium.

[0269] By covering the insulators 224, 250, and metal oxide 230 with the hydrogen-barrier insulator 254, the insulator 280 is separated from the insulators 224, 230, and 250 by the insulator 254. This prevents impurities such as hydrogen from entering the transistor 70 from the outside, thereby providing the transistor 70 with good electrical characteristics and reliability.

[0270] The insulator 280 is provided on the insulator 224, the metal oxide 230, and the conductor 242 via the insulator 254. For example, the insulator 280 is preferably silicon oxide, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, or porous silicon oxide. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and porous silicon oxide are particularly preferred because they can easily form regions containing oxygen that is desorbed by heating.

[0271] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. Furthermore, the upper surface of the insulator 280 may be flattened.

[0272] The insulator 274 preferably functions as a barrier insulating film that suppresses the incorporation of impurities such as water or hydrogen into the insulator 280 from above, similar to the insulator 214. For example, the insulator 274 can be an insulator that can be used for the insulator 214, insulator 254, etc.

[0273] It is preferable to provide an insulator 281, which functions as an interlayer film, on top of the insulator 274. It is preferable that the insulator 281, like the insulator 224, has a reduced concentration of impurities such as water or hydrogen in the film.

[0274] Conductors 240a and 240b are placed in the openings formed in insulators 281, 274, 280, and 254. Conductors 240a and 240b are provided facing each other with conductor 260 in between. The upper surfaces of conductors 240a and 240b may be on the same plane as the upper surface of insulator 281.

[0275] Furthermore, an insulator 241a is provided in contact with the inner wall of the opening of insulators 281, 274, 280, and 254, and a first conductive portion of conductor 240a is formed in contact with its side surface. Conductor 242a is located in at least a portion of the bottom of the opening, and conductor 240a is in contact with conductor 242a. Similarly, an insulator 241b is provided in contact with the inner wall of the opening of insulators 281, 274, 280, and 254, and a first conductive portion of conductor 240b is formed in contact with its side surface. Conductor 242b is located in at least a portion of the bottom of the opening, and conductor 240b is in contact with conductor 242b.

[0276] It is preferable that the conductors 240a and 240b are made of conductive materials mainly composed of tungsten, copper, or aluminum. Furthermore, the conductors 240a and 240b may be arranged in a laminated structure.

[0277] When the conductor 240 has a laminated structure, it is preferable to use a conductor that has the function of suppressing the diffusion of impurities such as water or hydrogen, as described above, for the conductors that come into contact with the metal oxide 230a, metal oxide 230b, conductor 242, insulator 254, insulator 280, insulator 274, and insulator 281. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Furthermore, the conductive material that has the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or a laminate. By using this conductive material, it is possible to suppress the absorption of oxygen added to the insulator 280 by the conductors 240a and 240b. In addition, it is possible to suppress the mixing of impurities such as water or hydrogen from the layer above the insulator 281 into the metal oxide 230 through the conductors 240a and 240b.

[0278] As the insulators 241a and 241b, for example, insulators that can be used for the insulator 254 or the like may be used. Since the insulators 241a and 241b are provided in contact with the insulator 254, it is possible to suppress impurities such as water or hydrogen from the insulator 280 or the like from mixing into the metal oxide 230 through the conductors 240a and 240b. Further, it is possible to suppress oxygen contained in the insulator 280 from being absorbed by the conductors 240a and 240b.

[0279] Although not shown, conductors that function as wiring may be arranged in contact with the upper surfaces of the conductor 240a and the conductor 240b. The conductor that functions as wiring preferably uses a conductive material mainly composed of tungsten, copper, or aluminum. Further, the conductor may have a laminated structure, for example, a laminate of titanium or titanium nitride and the above conductive material. The conductor may be formed so as to be embedded in an opening provided in the insulator.

[0280] <Configuration Example of Light-Emitting Element> As described above, the EL layer 30 included in the light-emitting element 20 can be composed of a plurality of layers such as a hole injection layer 31, a light-emitting layer 33, and an electron injection layer 35 as shown in FIG. 17A.

[0281] A configuration in which a hole injection layer 31, a light-emitting layer 33, and an electron injection layer 35 are provided between the lower electrode 21 and the upper electrode 25 can function as a single light-emitting unit. In this specification, the configuration of FIG. 17A is referred to as a single structure.

[0282] Note that a configuration in which a plurality of light-emitting layers (for example, a light-emitting layer 33a, a light-emitting layer 33b, and a light-emitting layer 33c) are provided between the electron injection layer 35 and the hole injection layer 31 as shown in FIG. 17B is also a variation of the single structure.

[0283] Furthermore, as shown in Figure 17C, a configuration in which multiple light-emitting units (e.g., EL layer 30a and EL layer 30b) are connected in series via an intermediate layer (charge generation layer) 37 is referred to as a tandem structure in this specification. Figure 17C shows a configuration in which EL layer 30a has a light-emitting layer 33d and EL layer 30b has a light-emitting layer 33e. In this specification, the configuration shown in Figure 17C is referred to as a tandem structure, but it is not limited to this, and for example, a tandem structure may also be called a stack structure. By using a tandem structure, a light-emitting element capable of high-brightness light emission can be made.

[0284] Furthermore, when comparing the single structure and tandem structure described above with the SBS structure described earlier, power consumption can be reduced in the order of SBS structure, tandem structure, and single structure. If it is desirable to keep the power consumption of the display device according to one embodiment of the present invention low, it is preferable to use the SBS structure. On the other hand, the single structure and tandem structure have simpler manufacturing processes than the SBS structure. Therefore, the manufacturing cost of the display device according to one embodiment of the present invention can be reduced and the yield can be increased. As a result, the display device according to one embodiment of the display device can be made cheaper.

[0285] The light-emitting color of the light-emitting element 20 can be red, green, blue, cyan, magenta, yellow, or white, depending on the material constituting the EL layer 30. Furthermore, the color purity can be further enhanced by adding a microcavity structure to the light-emitting element 20.

[0286] A light-emitting element that emits white light preferably has a configuration that includes two or more types of light-emitting materials in its light-emitting layer. To obtain white light emission, light-emitting materials should be selected such that the light emitted by each of the two or more materials is complementary in color.

[0287] The light-emitting layer preferably contains two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), or O (orange).

[0288] For example, if the light-emitting layer 33a has the function of emitting red light, the light-emitting layer 33b has the function of emitting green light, and the light-emitting layer 33c has the function of emitting blue light, the light-emitting element 20 shown in Figure 17B can emit white light. Also, if the light-emitting layer 33d has the function of emitting yellow light and the light-emitting layer 33e has the function of emitting blue light, the light-emitting element 20 shown in Figure 17C can emit white light.

[0289] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0290] (Embodiment 2) This embodiment describes metal oxides that can be used in the OS transistor described in the above embodiment.

[0291] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 18A. Figure 18A is a diagram illustrating the classification of crystal structures in oxide semiconductors, specifically IGZO (a metal oxide containing In, Ga, and Zn).

[0292] As shown in Figure 18A, oxide semiconductors are broadly classified into "Amorphous," "Crystalline," and "Crystal." "Amorphous" includes completely amorphous semiconductors. "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite). Note that single crystal, polycrystal, and completely amorphous semiconductors are excluded from the "Crystalline" classification. "Crystal" includes single crystal and polycrystal semiconductors.

[0293] The structure within the thick frame shown in Figure 18A represents an intermediate state between "Amorphous" and "Crystal," and belongs to a new crystalline phase. In other words, this structure is completely different from the energetically unstable "Amorphous" and "Crystal" states.

[0294] The crystal structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 18B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline". In Figure 18B, the horizontal axis is 2θ [deg.] and the vertical axis is Intensity [au]. The GIXD method is also known as the thin-film method or Seemann-Bohlin method. Hereafter, the XRD spectrum obtained by the GIXD measurement shown in Figure 18B will simply be referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 18B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 18B is 500 nm.

[0295] In Figure 18B, the horizontal axis represents 2θ [deg.] and the vertical axis represents intensity [au]. As shown in Figure 18B, the XRD spectrum of the CAAC-IGZO film shows a clear peak indicating crystallinity. Specifically, the XRD spectrum of the CAAC-IGZO film shows a peak indicating c-axis orientation near 2θ = 31°. As shown in Figure 18B, the peak near 2θ = 31° is asymmetrical with respect to the angle at which the peak intensity was detected.

[0296] The crystal structure of a film or substrate can be evaluated by the diffraction pattern (also called the nano-beam electron diffraction pattern) observed using nano-beam electron diffraction (NBED). The diffraction pattern of a CAAC-IGZO film is shown in Figure 18C. Figure 18C shows the diffraction pattern observed by NBED with the electron beam incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 18C is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. Furthermore, in nano-beam electron diffraction, electron diffraction is performed with a probe diameter of 1 nm.

[0297] As shown in Figure 18C, the diffraction pattern of the CAAC-IGZO film shows multiple spots indicating c-axis orientation.

[0298] [Structure of oxide semiconductors] Note that when focusing on the crystal structure, oxide semiconductors may be classified differently from those shown in Figure 18A. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors also include polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS), amorphous oxide semiconductors, etc.

[0299] Here, we will explain the details of the CAAC-OS, nc-OS, and a-like OS mentioned above.

[0300] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, the c-axis of which is oriented in a specific direction. This specific direction is the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If we consider the atomic arrangement as a lattice arrangement, then a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC-OS has regions where multiple crystalline regions are connected in the ab-plane direction, and these regions may exhibit distortion. Distortion refers to a point in the connected region where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement. In short, CAAC-OS is an oxide semiconductor that is c-axis oriented and does not exhibit clear orientation in the ab-plane direction.

[0301] Each of the above-mentioned crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of that crystalline region will be less than 10 nm. When a crystalline region is composed of many minute crystals, the size of that crystalline region may be around several tens of nanometers.

[0302] In In-M-Zn oxide (where element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystalline structure (also called a layered structure) consisting of layers containing indium (In) and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer). Indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. The In layer may also contain element M. The In layer may also contain Zn. This layered structure can be observed, for example, as a lattice image in high-resolution TEM images.

[0303] When structural analysis of a CAAC-OS film is performed using, for example, an XRD instrument, out-of-plane XRD measurements using θ / 2θ scanning show a peak indicating c-axis orientation at 2θ = 31° or nearby. Note that the position of the peak indicating c-axis orientation (value of 2θ) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0304] For example, multiple bright spots are observed in the electron diffraction pattern of a CAAC-OS film. These spots are observed at point-symmetric positions with respect to the incident electron beam spot (also called the direct spot) that passed through the sample.

[0305] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, the strain may have lattice arrangements such as pentagons or heptagons. Moreover, in CAAC-OS, clear grain boundaries cannot be observed even near the strain. In other words, it can be seen that the formation of grain boundaries is suppressed by the strain in the lattice arrangement. This is thought to be because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the ab-plane direction, and the bond distance between atoms changes due to the substitution of metal atoms.

[0306] A crystal structure in which clear grain boundaries are observed is known as a polycrystal. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in transistor on-current and field-effect mobility. Therefore, CAAC-OS, which does not exhibit clear grain boundaries, is one of the crystalline oxides with a suitable crystal structure for the semiconductor layer of a transistor. Furthermore, a structure containing Zn is preferred for the composition of CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they suppress the generation of grain boundaries more effectively than In oxide.

[0307] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. Furthermore, since the crystallinity of oxide semiconductors can decrease due to the inclusion of impurities or the generation of defects, CAAC-OS can be said to be an oxide semiconductor with few impurities or defects (such as oxygen vacancies). Consequently, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors allows for greater flexibility in the manufacturing process.

[0308] [nc-OS] nc-OS exhibits periodicity in atomic arrangement in minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). In other words, nc-OS contains minute crystals. These minute crystals are also called nanocrystals because their size is, for example, between 1 nm and 10 nm, particularly between 1 nm and 3 nm. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS or amorphous oxide semiconductors. For example, when structural analysis of an nc-OS film is performed using an XRD instrument, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Also, when electron diffraction (also called limited-field electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter larger than that of the nanocrystals (e.g., 50 nm or larger), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern may be obtained in which multiple spots are observed within a ring-shaped region centered on a direct spot.

[0309] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0310] [Oxide semiconductor configuration] Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS refers to the material composition.

[0311] [CAC-OS] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing the metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0312] Furthermore, CAC-OS is a composite metal oxide having a mosaic-like structure formed by the separation of the material into a first region and a second region, with the first region distributed within the film (hereinafter also referred to as a cloud-like structure). In other words, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0313] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is the region where [In] is greater than the [In] in the second region, and [Ga] is smaller than the [Ga] in the second region. The second region is the region where [Ga] is greater than the [Ga] in the first region, and [In] is smaller than the [In] in the first region.

[0314] Specifically, the first region described above is a region whose main components are indium oxide, indium zinc oxide, etc. The second region described above is a region whose main components are gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region whose main component is In. Similarly, the second region can be rephrased as a region whose main component is Ga.

[0315] Furthermore, a clear boundary may not be observed between the first region and the second region described above.

[0316] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) confirms that it has a structure in which regions mainly composed of In (first region) and regions mainly composed of Ga (second region) are unevenly distributed and mixed.

[0317] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulation due to the second region work complementaryly to give CAC-OS a switching function (on / off function). In other words, CAC-OS has conductive function in part of the material, insulating function in part of the material, and semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I) can be achieved. on ), high field-effect mobility (μ), and good switching operation can be achieved.

[0318] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention may include two or more of the following: amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0319] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0320] By using the above-mentioned oxide semiconductor in transistors, it is possible to realize transistors with high field-effect mobility. Furthermore, it is possible to realize highly reliable transistors.

[0321] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. For example, the carrier concentration of an oxide semiconductor is 1 × 10⁻⁶. 17 cm -3 The following is preferably 1 × 10 15 cm -3 More preferably 1 × 10 13 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm-3 This concludes the explanation. Furthermore, when lowering the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film should be lowered to reduce the defect level density. In this specification, a low impurity concentration and low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that an oxide semiconductor with a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.

[0322] High-purity intrinsic or substantially high-purity intrinsic oxide semiconductor films have a low defect level density, which may result in a low trap level density.

[0323] Charges trapped in the trap levels of oxide semiconductors can take a long time to disappear and sometimes behave like fixed charges. Therefore, transistors in which channel formation regions are formed in oxide semiconductors with a high density of trap levels may exhibit unstable electrical properties.

[0324] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0325] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0326] In oxide semiconductors, the presence of silicon, one of the Group 14 elements, or carbon, leads to the formation of defect levels in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are compared by 2 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 17atoms / cm 3 The following applies:

[0327] When alkali metals or alkaline earth metals are present in oxide semiconductors, they can form defect levels and generate carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to exhibit normally-on characteristics. For this reason, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor obtained by SIMS should be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0328] In oxide semiconductors, the presence of nitrogen generates electrons, which act as carriers, increasing the carrier concentration and making it easier for the semiconductor to become n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to exhibit normally-on characteristics. Alternatively, the presence of nitrogen in oxide semiconductors can lead to the formation of trap levels. As a result, the electrical properties of the transistor may become unstable. For this reason, the nitrogen concentration in oxide semiconductors obtained by SIMS should be set to 5 × 10⁻¹⁰. 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:

[0329] Hydrogen contained in oxide semiconductors can react with oxygen bonded to metal atoms to form water, potentially creating oxygen vacancies. When hydrogen fills these vacancies, electrons, which act as carriers, can be generated. Furthermore, some of the hydrogen can combine with oxygen bonded to metal atoms to generate electrons. Therefore, transistors using oxide semiconductors containing hydrogen tend to exhibit normally-on characteristics. For this reason, it is preferable to reduce the hydrogen content in oxide semiconductors as much as possible. Specifically, in oxide semiconductors, the hydrogen concentration obtained by SIMS should be 1 × 10⁻⁶. 20 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0330] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be provided.

[0331] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0332] (Embodiment 3) This embodiment describes an electronic device equipped with a display device, which is one aspect of the present invention.

[0333] Figure 19A shows the external appearance of the head-mounted display 8200.

[0334] The head-mounted display 8200 includes a mounting section 8201, lenses 8202, a main unit 8203, a display unit 8204, a cable 8205, etc. The mounting section 8201 also has a built-in battery 8206.

[0335] Cable 8205 supplies power from battery 8206 to main unit 8203. Main unit 8203 is equipped with a wireless receiver and can display images corresponding to received image data on display unit 8204. In addition, a camera provided on main unit 8203 captures the movement of the user's eyeballs or eyelids, and by calculating the coordinates of the user's gaze based on that information, the user's gaze can be used as an input means.

[0336] The attachment part 8201 may have multiple electrodes positioned to come into contact with the user. The main unit 8203 may have a function to recognize the user's gaze by detecting the current flowing through the electrodes in accordance with the user's eye movements. It may also have a function to monitor the user's pulse by detecting the current flowing through the electrodes. Furthermore, the attachment part 8201 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function to display the user's biometric information on the display unit 8204. It may also detect the user's head movements and change the image displayed on the display unit 8204 in accordance with those movements.

[0337] A display device according to one aspect of the present invention can be applied to the display unit 8204. This allows high-quality images to be displayed on the display unit 8204.

[0338] Figures 19B, 19C, and 19D show the external appearance of the head-mounted display 8300. The head-mounted display 8300 comprises a housing 8301, a display unit 8302, a band-shaped fixing device 8304, and a pair of lenses 8305. The housing 8301 also has a built-in battery 8306, which can supply power to the display unit 8302 and other components.

[0339] The user can view the display on the display unit 8302 through the lens 8305. It is preferable to position the display unit 8302 in a curved shape. By positioning the display unit 8302 in a curved shape, the user can experience a high degree of realism. In this embodiment, a configuration with one display unit 8302 has been illustrated, but the system is not limited to this, and for example, a configuration with two display units 8302 may be used. In this case, if one display unit is positioned for one eye and the other for the user, it becomes possible to perform 3D display using parallax, etc.

[0340] Furthermore, a display device according to one embodiment of the present invention can be applied to the display unit 8302. This allows high-quality images to be displayed on the display unit 8302.

[0341] Next, Figures 19A to 19D show the electronic equipment, and Figures 20A and 20B show examples of different electronic equipment.

[0342] The electronic device shown in Figures 20A and 20B includes a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or operation switch), connection terminals 9006, sensors 9007 (including functions for measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation), and a battery 9009, etc.

[0343] The electronic devices shown in Figures 20A and 20B have a variety of functions. For example, they may have functions to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to control processing by various software (programs), a wireless communication function, a function to connect to various computer networks using the wireless communication function, a function to transmit or receive various data using the wireless communication function, a function to read programs or data recorded on a recording medium and display them on a display unit, etc. However, the functions that the electronic devices shown in Figures 20A and 20B may have are not limited to these, and they may have a variety of functions. In addition, although not shown in Figures 20A and 20B, the electronic devices may have a configuration with multiple display units. Furthermore, the electronic devices may be equipped with a camera, etc., and have functions to capture still images, capture videos, save captured images to a recording medium (external or built into the camera), display captured images on a display unit, etc.

[0344] The details of the electronic equipment shown in Figures 20A and 20B will be explained below.

[0345] Figure 20A is a perspective view showing a portable information terminal 9101. The portable information terminal 9101 has one or more functions selected from, for example, a telephone, a notebook, or an information viewing device. Specifically, it can be used as a smartphone. The portable information terminal 9101 can also display text or images on multiple surfaces. For example, operation buttons 9050 (also called operation icons or simply icons) can be displayed on one surface of the display unit 9001. Information 9051, shown by a dashed rectangle, can also be displayed on other surfaces of the display unit 9001. Examples of information 9051 include notifications of incoming emails, SNS (Social Networking Service) messages, or phone calls, the title of emails or SNS messages, the sender's name of emails or SNS messages, the date and time, the battery level, the signal strength, etc. Alternatively, operation buttons 9050, etc., may be displayed in place of information 9051.

[0346] A display device according to one aspect of the present invention can be applied to the portable information terminal 9101. This allows a high-quality image to be displayed on the display unit 9001.

[0347] Figure 20B is a perspective view showing a wristwatch-type personal information terminal 9200. The personal information terminal 9200 can run various applications such as mobile phone calls, email, document viewing and creation, music playback, internet communication, and computer games. The display unit 9001 has a curved display surface, allowing it to display information along the curved surface. Figure 20B shows an example where the time 9251, operation buttons 9252 (also called operation icons or simply icons), and content 9253 are displayed on the display unit 9001. The content 9253 can be, for example, a video.

[0348] Furthermore, the personal information terminal 9200 is capable of performing standardized short-range wireless communication. For example, it can communicate with a wireless communication-enabled headset to make hands-free calls. The personal information terminal 9200 also has a connection terminal 9006, which allows it to directly exchange data with other information terminals via a connector. It can also be charged via the connection terminal 9006. However, charging may be performed by wireless power supply without using the connection terminal 9006.

[0349] A display device according to one aspect of the present invention can be applied to the portable information terminal 9200. This allows a high-resolution image to be displayed on the display unit 9001.

[0350] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part. [Explanation of symbols]

[0351] 10: Display device, 11: Transistor, 13: Insulating layer, 15: Conductive layer, 17: Conductive layer, 19: Partition, 20: Light-emitting element, 20B: Light-emitting element, 20G: Light-emitting element, 20R: Light-emitting element, 21: Lower electrode, 21A: Layer, 25: Upper electrode, 25A: Layer, 30: EL layer, 30a: EL layer, 30b: EL layer, 31: Hole injection layer, 31A: Layer, 31B: Layer, 31C: Layer, 33: Light-emitting layer, 33a: Light-emitting layer, 33A: Layer, 33b: Light-emitting layer, 33B: Light-emitting layer, 33BA: Layer, 33c: Light-emitting layer, 33d: Light-emitting layer, 33e: Light-emitting layer, 33G: Light-emitting layer, 33GA: Layer, 33R: Light-emitting layer, 33RA: layer, 35: electron injection layer, 35A: layer, 40: void, 42: void, 43: protective layer, 45: microlens array, 47: adhesive layer, 49: light shielding layer, 51: insulating layer, 53: substrate, 55: colored layer, 55B: colored layer, 55G: colored layer, 55R: colored layer, 60: pixel, 60B: pixel, 60G: pixel, 60R: pixel, 61: light, 63: region, 67: conductive layer, 69: conductive layer, 70: transistor, 71: insulating layer, 80: transistor, 81: substrate, 82: conductive layer, 83: insulating layer, 85a: low resistance region, 85b: low resistance region, 86: element isolation layer, 87: semiconductor layer, 8 8: Insulating layer, 91: Sealing material, 93: Connecting electrode, 95: Anisotropic conductive layer, 97: FPC, 100: Display unit, 101: Scan line driving circuit, 103: Data line driving circuit, 105: Wiring, 107: Wiring, 110: Pixel circuit, 111: Transistor, 113: Transistor, 115: Capacitor, 117: Node, 119: Node, 121: Layer, 123: Layer, 125: Layer, 131: Insulating layer, 133: Insulating layer, 135: Insulating layer, 137: Insulating layer, 140: Sacrificial layer, 140A: Layer, 140B: Layer, 140C: Layer, 150: Region, 205: Conductor, 205a: Conductor, 205b: Conductor Electrode, 205c: Conductor, 214: Insulator, 216: Insulator, 222: Insulator, 224: Insulator, 230: Metal oxide, 230a: Metal oxide, 230b: Metal oxide, 230c: Metal oxide, 240: Conductor, 240a: Conductor, 240b: Conductor, 241: Insulator, 241a: Insulator, 241b: Insulator, 242: Conductor, 242a: Conductor, 242b: Conductor, 250: Insulator, 254: Insulator, 260: Conductor, 260a: Conductor, 260b: Conductor, 274: Insulator, 280: Insulator, 281: Insulator, 8200: Head-mounted display,8201: Mounting part, 8202: Lens, 8203: Main unit, 8204: Display unit, 8205: Cable, 8206: Battery, 8300: Head-mounted display, 8301: Housing, 8302: Display unit, 8304: Fixing device, 8305: Lens, 8306: Battery, 9000: Housing, 9001: Display unit, 9003: Speaker, 9005: Operation keys, 9006: Connection terminal, 9007: Sensor, 9009: Battery, 9050: Operation buttons, 9051: Information, 9101: Personal digital assistant, 9200: Personal digital assistant, 9251: Time, 9252: Operation buttons, 9253: Content,

Claims

1. It comprises a first light-emitting element, a second light-emitting element, and a first void, The first light-emitting element comprises a first lower electrode, a first light-emitting layer on the first lower electrode, and a first upper electrode on the first light-emitting layer. The second light-emitting element comprises a second lower electrode, a second light-emitting layer on the second lower electrode, and a second upper electrode on the second light-emitting layer. The first void has a region that is in contact with the first side surface of the first lower electrode and the first side surface of the first light-emitting layer. A display device having a region in contact with the first side surface of the second lower electrode and the first side surface of the second light-emitting layer, wherein the first void is in contact with the first side surface of the second lower electrode.

2. In claim 1, A display device in which the distance between the first side surface of the first upper electrode and the first side surface of the second upper electrode is shorter than the distance between the first side surface of the first light-emitting layer and the first side surface of the second light-emitting layer.

3. In claim 2, Furthermore, it has a protective film, A display device having a second void on the lower side surface of the first upper electrode, surrounded by the upper electrode and the protective film.

4. In claims 1 to 3, Furthermore, an insulating film is provided below the first lower electrode, A display device having a region in which the first side surface of the insulating film and the bottom surface of the insulating film are in contact with the first void.

Images