Semiconductor equipment

Abstract

To improve the reliability of the drive circuit. [Solution] The oxide semiconductor layer superimposed on the drain electrode layer 405b (and source electrode layer 405a) In the conductor layer, a second high-resistance drain region 432 (or a first high-resistance drain region 43 1) is formed. By forming a second high-resistance drain region 432, the drain electrode layer From the second high-resistance drain region 432 to the channel formation region, the conductivity is changed in steps. A structure that allows this to be achieved can be made. Therefore, the drain electrode layer 405b is high power supply When connected to the wiring supplying position VDD and operated, the gate electrode layer 401 and the drain electrode Even when a high electric field is applied between layer 405b and the layer, the high-resistance drain region acts as a buffer, localizing the process. A configuration can be achieved where a high electric field is not applied, thereby improving the transistor's breakdown voltage.

Description

[Technical Field]

[0001] This invention relates to a semiconductor device using an oxide semiconductor and a method for manufacturing the same.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to all types of semiconductor devices, including electro-optical devices such as display devices, semiconductor circuits, and electronic equipment. be. [Background technology]

[0003] Translucent metal oxides are used in semiconductor devices. For example, indi oxide Metal oxides that possess conductivity, such as tin (ITO) (hereinafter referred to as oxide conductors), are liquid crystals. It is used as a transparent electrode material required in display devices such as screens.

[0004] In addition, translucent metal oxides are attracting attention as materials that exhibit semiconductor properties. For example, in-Ga-Zn-O oxides are required in display devices such as liquid crystal displays. It is expected to be applied to semiconductor materials in particular. It is expected to be applied to the channel layer of FT (also known as FT).

[0005] TFTs using metal oxides with semiconductor properties (hereinafter referred to as oxide semiconductors) are low-temperature It can be manufactured by process. Therefore, ammo used in display devices, etc. There are growing expectations that it will be a substitute for or even surpass Rufus silicon.

[0006] By constructing TFTs using transparent oxide conductors and oxide semiconductors, Translucent TFTs can be fabricated (see, for example, Non-Patent Document 1).

[0007] In addition, a TFT in which an oxide semiconductor is applied to the channel layer has a high field-effect mobility. Therefore , it is also possible to configure a drive circuit such as a display device using the TFT (for example, see Non-Patent Document 2).

Prior Art Documents

Non-Patent Documents

[0008]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0009] One aspect of the present invention has an object of reducing the manufacturing cost of a semiconductor device.

[0010] One aspect of the present invention has an object of improving the aperture ratio of a semiconductor device.

[0011] One aspect of the present invention has an object of enhancing the definition of an image displayed on a display portion of a semiconductor device.

[0012] One aspect of the present invention has an object of providing a semiconductor device capable of high-speed driving.

Means for Solving the Problems

[0013] One aspect of the present invention has a drive circuit portion and a display portion (also referred to as a pixel portion) on the same substrate, and the drive circuit portion includes a source electrode (also referred to as a source electrode layer) and a drain electrode (drain electrode ​​​(also referred to as a layer) is composed of a metal and the channel layer is composed of an oxide semiconductor It has a thin film transistor for a driving circuit and wiring for a driving circuit composed of a metal. The display unit includes a thin film transistor for pixels in which a source electrode layer and a drain electrode layer are composed of an oxide conductor and the semiconductor layer is composed of an oxide semiconductor, and wiring for the display unit composed of an oxide conductor. It is a semiconductor device.

[0014] As the thin film transistor for pixels and the thin film transistor for the driving circuit, an inverted staggered type thin film transistor with a bottom gate structure is used. The thin film transistor for pixels is a bottom gate type (also referred to as an inverted coplanar type or a bottom contact type) thin film transistor having an oxide semiconductor layer overlapping the source electrode layer and the drain electrode layer. On the other hand, the thin film transistor for the driving circuit is a bottom gate type (channel etch type) thin film transistor having a source electrode layer and a drain electrode layer overlapping the oxide semiconductor layer and provided with an oxide insulating film contacting the oxide semiconductor layer in the region between the source electrode layer and the drain electrode layer. The thin film transistor for pixels has an oxide semiconductor layer overlapping the source electrode layer and the drain electrode layer. It is a bottom gate type thin film transistor (also referred to as an inverted coplanar type or a bottom contact type). On the other hand, the thin film transistor for the driving circuit has a source electrode layer and a drain electrode layer overlapping the oxide semiconductor layer. An oxide insulating film contacting the oxide semiconductor layer is provided in the region between the source electrode layer and the drain electrode layer. It is a bottom gate type thin film transistor. (Channel etch type) thin film transistor.

[0015] Note that Non-Patent Document 1 does not disclose the manufacturing process of a specific TFT and the structure of other elements (such as a capacitive element, etc.) constituting the semiconductor device. There is also no description of fabricating a driving circuit and a transmissive TFT on the same substrate. For example, a capacitive element. There is also no description of fabricating a driving circuit and a transmissive TFT on the same substrate.

[0016] A semiconductor device according to one aspect of the present invention has a driving circuit portion having a TFT for a driving circuit and a display portion having a TFT for pixels fabricated on the same substrate. Therefore, the manufacturing cost of the semiconductor device can be reduced. On the same substrate, a driving circuit portion having a TFT for a driving circuit and a display portion having a TFT for pixels are fabricated. Therefore, the manufacturing cost of the semiconductor device can be reduced.

[0017] Furthermore, in one aspect of the present invention, the semiconductor device has a display unit in which the source electrode and drain electrode are made of oxide A pixel TFT composed of a conductor and having a semiconductor layer composed of an oxide semiconductor, , and wiring for the display unit made of an oxide conductor. In other words, the semiconductor device is The area where the pixel TFT and display wiring are formed is used as the display area for the pixel. This makes it possible to improve the aperture ratio of the semiconductor device.

[0018] Furthermore, in one aspect of the present invention, the semiconductor device has a display unit in which the source electrode and drain electrode are made of oxide A pixel TFT composed of a conductor and having a semiconductor layer composed of an oxide semiconductor, , and wiring for the display unit made of an oxide conductor. In other words, the semiconductor device is This allows for the design of pixel sizes without being limited by the size of the TFT used for pixels. Therefore, the image displayed on the display unit of the semiconductor device can be made higher resolution.

[0019] Furthermore, in one aspect of the present invention, the semiconductor device has a drive circuit section in which the source electrode and drain electrode are made of gold. A TFT for a drive circuit, composed of a group and with a channel layer made of oxide semiconductor. It has a drive circuit wiring made of metal. In other words, the semiconductor device is high The drive circuit is constructed using a TFT that exhibits high field-effect mobility and low-resistance wiring. Therefore, the semiconductor device can be made capable of high-speed operation.

[0020] Furthermore, the oxide semiconductor used in this specification is InMO3(ZnO) m (m>0) A thin film is formed, and a thin-film transistor is fabricated using this thin film as an oxide semiconductor layer. M is one or more metallic elements selected from Ga, Fe, Ni, Mn, and Co. This indicates a metallic element. For example, M can be Ga, or Ga and Ni, or Ga and In addition, the above oxide semiconductor may contain metal elements other than Ga, such as Fe. In addition to the metallic elements included as M, Fe, Ni, and other transition metals are included as impurity elements. Some contain elements or oxides of the transition metal. In this specification, In MO3(ZnO) m Among oxide semiconductor layers with a structure represented by (m>0), where M is Ga Oxide semiconductors with a structure containing are called In-Ga-Zn-O based oxide semiconductors, and their thin films are called I It is also called an n-Ga-Zn-O non-single crystal film.

[0021] In addition to the above, other metal oxides that can be applied to oxide semiconductor layers include In-Sn-Zn-O In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga-Zn-O system, Sn -Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In- O-based, Sn-O-based, and Zn-O-based metal oxides can be applied. Silicon oxide may be included in the oxide semiconductor layer made of the material.

[0022] Furthermore, in the manufacturing process of the above semiconductor device, nitrogen or a noble gas (argon, helium, etc.) By heat-treating the oxide semiconductor layer under an inert gas atmosphere or under reduced pressure, oxidation occurs. The material semiconductor layer is made oxygen-deficient to reduce resistance (i.e., N-type (N - (e.g., chemical reactions), then acid By forming an oxide insulating film in contact with the oxide semiconductor layer, the oxide semiconductor layer is acid-treated. It is preferable to increase the resistance (i.e., to type I) as an excess of primary components. This results in the electrical characteristics To fabricate and provide semiconductor devices having thin-film transistors with good performance and reliability. It becomes possible.

[0023] The above heat treatment is performed under an inert gas atmosphere of nitrogen or a noble gas (argon, helium, etc.). Alternatively, heat treatment under reduced pressure at 350°C or higher, preferably 400°C or higher, below the strain point of the substrate. This process is carried out. This heat treatment dehydrates or dehydrogenates the oxide semiconductor layer, and the oxide semiconductor The amount of impurities containing hydrogen atoms, such as water, in the layer is reduced.

[0024] The above heat treatment for dehydration or dehydrogenation is performed on the oxide semiconductor after dehydration or dehydrogenation. Even when measuring the layer using TDS up to 450°C, two peaks for water were observed, at least at 300°C. It is preferable to use heat treatment conditions such that no single peak appearing in the vicinity is detected. For thin-film transistors using oxide semiconductor layers that have undergone dehydration or dehydrogenation under the following conditions Even when measuring up to 450°C with TDS, the water peak that appears at least around 300°C is Not detected.

[0025] Cooling after heating is performed by exposing the oxide semiconductor layer to air using the same furnace that performed dehydration or dehydrogenation. Cool it to prevent exposure and keep the oxide semiconductor layer from coming into contact with water or hydrogen. Dehydration or dehydrogenation is performed to reduce the resistance of the type I oxide semiconductor layer, i.e., to convert it to type N (N - , N + After (etc.), the oxide semiconductor layer is made highly resistive and then converted back to type I, and a thin film transient is performed using this oxide semiconductor layer. By fabricating a transistor, the threshold voltage value of the thin-film transistor can be made positive, so Normally-off switching elements can be realized. The gate voltage of the thin-film transistor is 0V. For a display device, it is desirable that the channel be formed with a positive threshold voltage as close as possible to the positive threshold voltage. Furthermore, if the threshold voltage value of the thin-film transistor is negative, even if the gate voltage is 0V... Current flows between the source electrode and the drain electrode, making it prone to what is known as a normally-on state. In a dual-matrix display device, the electrical characteristics of the thin-film transistors that make up the circuit This is important, and these electrical characteristics affect the performance of the display device. In particular, the electrical properties of thin-film transistors Among the gas characteristics, the threshold voltage (Vth) is important. Even if the field-effect mobility is high, the threshold... If the voltage value is high, or the threshold voltage value is negative, the circuit cannot be controlled. It is difficult. Thin-film transistors with high threshold voltage values ​​and large absolute threshold voltage values. In some cases, when the drive voltage is low, it can perform the switching function as a TFT. This may cause a load. In the case of an n-channel thin-film transistor, a positive gate voltage A transistor in which a channel is formed and drain current begins to flow only when a voltage is applied. Desirable. Transistors that do not form a channel unless the drive voltage is high, or negative voltage A transistor in which a channel is formed and drain current flows even in its state is a thin film transistor used in the circuit. He is not suited to being a lunge player.

[0026] Furthermore, cooling after heating may be performed after switching to a different gas than the one used during heating. If, in the same furnace where dehydration or dehydrogenation was performed, the inside of the furnace is purified to a high purity without exposure to the atmosphere. Oxygen gas or N2O gas, ultra-dry air (with a dew point of -40°C or lower, preferably -60°C or lower) You can also fill it with the following and then cool it down.

[0027] Heat treatment that involves dehydration or dehydrogenation reduces impurities containing hydrogen atoms, such as water, in the membrane. After reduction, in an atmosphere free of moisture (dew point of -40°C or lower, preferably -60°C or lower), using the oxide semiconductor film slowly cooled (or cooled) under these conditions, the electrical characteristics of the thin film transistor are improved while realizing a thin film transistor that has both mass productivity and high performance.

[0028] In this specification, a heat treatment under an inert gas atmosphere of nitrogen or a noble gas (such as argon or helium), or under reduced pressure, is referred to as a heat treatment for dehydration or dehydrogenation. In this specification, only the desorption as H2 by this heat treatment is not called dehydrogenation, but for the sake of convenience, desorption of H, OH, etc. is also included and is collectively called dehydration or dehydrogenation.

[0029] As described above, when a heat treatment for dehydration or dehydrogenation is performed, the oxide semiconductor layer becomes oxygen-deficient type and its resistance decreases, i.e., it becomes N-type (N - type, etc.). Therefore, by forming a drain electrode layer on the oxide semiconductor layer with reduced resistance, the region where the drain electrode layer overlaps can be formed as a high-resistance drain region (also called HRD region) that is oxygen-deficient type. The carrier concentration of the high-resistance drain region is within the range of 1×10

[0030] / cm 17 or higher, and is in a region higher than at least the carrier concentration of the channel formation region (less than 1×10 3 / cm ). Note that the carrier concentration in this specification refers to the value of the carrier concentration obtained from Hall effect measurement at room temperature. 17 / cm 3

[0031] After this, at least a portion of the dehydrated or dehydrogenated oxide semiconductor layer is subjected to an oxygen-rich state. This increases resistance, i.e., converts it to type I, and forms a channel-forming region. Furthermore, dehydration Alternatively, the following methods can be used to create an oxygen-rich state in a portion of the dehydrogenated oxide semiconductor layer. This is done by any of the following methods. The oxide semiconductor layer in contact with the dehydrated or dehydrogenated oxide semiconductor layer The edge film is deposited by sputtering, or it comes into contact with a dehydrated or dehydrogenated oxide semiconductor layer. An oxide insulating film is formed as follows, and then subjected to heat treatment, or dehydration or dehydrogenation. An oxide insulating film is deposited in contact with the oxide semiconductor layer, and then heated in an oxygen-containing atmosphere. An oxide insulating film is placed in contact with an oxide semiconductor layer that has undergone processing, or has been dehydrated or dehydrogenated. After forming the film, it is heated in an inert gas atmosphere and then cooled in an oxygen atmosphere. Alternatively, after forming an oxide insulating film in contact with a dehydrated or dehydrogenated oxide semiconductor layer Heat under an inert gas atmosphere, and then use ultra-dry air (with a dew point of -40°C or lower, preferably - Cooling treatment is performed at temperatures below 60°C.

[0032] Furthermore, at least a portion of the dehydrated or dehydrogenated oxide semiconductor layer (gate electrode (gate By selectively creating an oxygen-rich state in the area overlapping with the electrode layer, resistance is increased, immediately It can also be made into a type I structure. This allows for the formation of a channel-forming region. For example, a metal electrode such as Ti is in contact with a dehydrated or dehydrogenated oxide semiconductor layer. Form a source electrode layer and a drain electrode layer that do not overlap the source electrode layer and the drain electrode layer. By selectively creating an oxygen-rich state in the exposed region, it is possible to form a channel-forming region. When selectively creating an oxygen-rich state, the first high-resistance drain region overlapping the source electrode layer and A second high-resistance drain region is formed, overlapping the drain electrode layer, and the first high-resistance drain The region between the drain region and the second high-resistance drain region becomes the channel-forming region. The Nell-forming region is self-aligned and formed between the source electrode layer and the drain electrode layer.

[0033] This allows for the fabrication of semiconductor devices with thin-film transistors that exhibit good electrical characteristics and high reliability. And it becomes possible to provide it.

[0034] Furthermore, in the oxide semiconductor layer superimposed on the drain electrode layer (and source electrode layer), high resistance By forming a rain region, the reliability of the drive circuit can be improved. By forming a high-resistance drain region, the drain electrode layer is separated from the high-resistance drain region. It is possible to create a structure in which the conductivity can be changed in stages in the channel formation region. Therefore, the drain electrode layer is connected to the wiring that supplies the high power potential VDD for operation. In this case, even if a high electric field is applied between the gate electrode layer and the drain electrode layer, the high-resistance drain region remains. This acts as a buffer, preventing the application of a localized high electric field, thus improving the transistor's breakdown voltage. It is possible.

[0035] Furthermore, in the oxide semiconductor layer superimposed on the drain electrode layer (and source electrode layer), high resistance By forming a rain region, leakage in the channel formation region when the drive circuit is formed is reduced. This can reduce the current. Specifically, by forming a high-resistance drain region, the current can be reduced. As a path for the leakage current of a transistor flowing between the rain electrode layer and the source electrode layer, Rain electrode layer, high-resistance drain region on the drain electrode layer side, channel formation region, source electrode The order is the high-resistance drain region on the layer side, followed by the source electrode layer. In this case, in the channel formation region, When the transistor is off, the leakage current flowing from the drain electrode layer side to the channel formation region is detected. It can be concentrated near the interface between the gate insulating layer, which has high resistance, and the channel formation region. That is, the back channel region (a part of the surface of the channel-forming region that is separated from the gate electrode layer) This can reduce leakage current.

[0036] Furthermore, there is a first high-resistance drain region overlapping the source electrode layer, and a second drain electrode region overlapping the drain electrode layer. By forming the high-resistance drain region so as to overlap a portion of the gate electrode layer, it can be more effectively This can reduce the electric field strength near the edge of the drain electrode layer.

[0037] Accordingly, one embodiment of the invention disclosed herein is a gate electrode layer on an insulating surface, and the gate A gate insulating layer is placed on the electrode layer, and an oxide semiconductor layer is placed on the gate insulating layer, and the oxide semiconductor The layers consist of a source electrode layer, a drain electrode layer, a gate insulating layer, an oxide semiconductor layer, and a source electrode. The material has a layer and a protective insulating layer in contact with a part of the oxide semiconductor layer on the drain electrode layer, and the acid The semiconductor layer comprises at least a channel formation region and a source electrode layer or drain electrode. This semiconductor device has a high-resistance drain region that overlaps with one of the layers.

[0038] In the above configuration, the carrier concentration in the high-resistance drain region is 1 × 10⁻⁶ 17 / cm 3 The above It is within the range, and the carrier concentration in the channel-forming region is at least (1 × 10⁻¹⁰ 17 / cm 3 less than This region is higher than ), and the high-resistance drain region is formed self-aligned, and the spacing between them This determines the length of the channel-forming region (channel length L).

[0039] One embodiment of the configuration of other inventions disclosed herein is a first thin-film transistor on the same substrate It has a drive circuit having a pixel portion and a second thin-film transistor, and the first thin-film transistor The gate electrode has a gate electrode layer on a substrate, a gate insulating layer on the gate electrode layer, and the gate insulating The source electrode layer and drain electrode layer are on top of the gate insulating layer, and the source electrode layer and drain An oxide semiconductor layer overlapping the electrode layer, a protective insulating layer in contact with the oxide semiconductor layer, and on the protective insulating layer The first thin-film transistor has a pixel electrode layer, a gate electrode layer, a gate insulating layer, and an oxide layer. The semiconductor layer, source electrode layer, drain electrode layer, protective insulating layer, and pixel electrode layer are translucent. The source electrode layer and drain electrode layer of the second thin-film transistor are the same as those of the first thin-film transistor. The source electrode layer and drain electrode layer of the first thin-film transistor are made of different materials, and the source This semiconductor device uses a conductive material with lower resistance than the electrode layer and the drain electrode layer.

[0040] Furthermore, in the above configuration, a capacitance section is further provided on the same substrate, and the capacitance section comprises capacitance wiring and It has capacitive electrodes that overlap with capacitive wiring, and both the capacitive wiring and capacitive electrodes are translucent. The wiring overlaps with the capacitive electrode via an insulating layer that acts as a dielectric, such as a gate insulating layer, and the gate insulating layer Since the marginal layer is translucent, the volumetric section is also translucent.

[0041] Furthermore, in the above configuration, the oxide semiconductor layer of the second thin-film transistor extends to the source electrode layer. Alternatively, it has a channel-forming region with a thinner film thickness than the region overlapping with the drain electrode layer, and the channel shape The region has a conductive layer with a protective insulating layer in between.

[0042] Furthermore, in the above configuration, the source electrode layer and drain electrode layer of the second thin-film transistor are A film mainly composed of elements selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or It consists of a multilayer film made by combining these elements.

[0043] Furthermore, in the above configuration, the source electrode layer, drain electrode layer, and of the first thin-film transistor The pixel electrode layer is made of indium oxide, a mixed oxide of indium and tin, and indium and zinc. It is a mixed oxide or zinc oxide. It is used as the gate electrode layer and source electrode of the first thin-film transistor. Polar layer, drain electrode layer, pixel electrode layer, or other electrode layers included in the pixel portion, and others The thickness of the wiring layer shall be between 30 nm and 200 nm, and shall be transparent to visible light. You can choose a film thickness that is either transparent or semi-transparent.

[0044] Furthermore, one embodiment of the configuration of another invention disclosed herein is a first on a substrate having an insulating surface A gate electrode layer and a second gate electrode layer are formed, and the first gate electrode layer and the second gate electrode A gate insulating layer is formed on the pole layer, and a first sole layer overlapping with the first gate electrode layer is formed on the gate insulating layer. A drain electrode layer and a first drain electrode layer are formed, and a first gate electrode layer is placed on the gate insulating layer. A portion of the first source electrode layer and a portion of the first drain electrode layer overlap the first oxide semiconductor A body layer and a second oxide semiconductor layer overlapping with the second gate electrode layer are formed, and the first oxide semiconductor The body layer and the second oxide semiconductor layer are dehydrated or dehydrogenated, and after dehydration or dehydrogenation Without exposing it to the atmosphere, the second source electrode layer and the second electrode layer are placed on the second oxide semiconductor layer. A rain electrode layer is formed to allow water and hydrogen to enter the first oxide semiconductor layer and the second oxide semiconductor layer. This prevents the re-introduction of any impurities, and protects a portion of the upper surface and sides of the second oxide semiconductor layer, as well as the second An oxide insulating layer is formed in contact with the upper surface of the oxide semiconductor layer, and a first Dre A pixel electrode layer electrically connected to the in electrode layer or the first source electrode layer, and the second oxidation This is a method for fabricating a semiconductor device in which a conductive layer is formed on top of a material semiconductor layer.

[0045] Furthermore, in the above configuration, the second source electrode layer and the second drain electrode layer are made of Al, A film mainly composed of elements selected from Cr, Cu, Ta, Ti, Mo, and W, or a film made of these elements. It is a laminated film combining an alloy film. Also, the first source electrode layer, the first drain electrode The polar layer and pixel electrode layer are made of indium oxide, indium oxide tin oxide alloy, and indium oxide. It is a zinc oxide alloy or zinc oxide.

[0046] In this specification, continuous processing refers to a process that starts with a first processing step of heat treatment and continues with a film deposition method such as sputtering. During the entire process up to the second processing step, the substrate to be processed is not exposed to contaminated air or other polluting environments. Therefore, always keep it in a vacuum or in an inert gas atmosphere (nitrogen atmosphere or noble gas atmosphere) This refers to being placed in a controlled environment. It also refers to purification through continuous processing. This allows for processing such as film formation while avoiding the re-adhesion of water or other substances to the treated substrate.

[0047] The entire process, from the first processing step to the second processing step, is carried out within the same chamber. This falls within the scope of continuous processing as defined herein.

[0048] Furthermore, the entire process from the first to the second processing step is carried out in different chambers. In this case, after the first processing step is completed, the substrate is transported between chambers without being exposed to the atmosphere. Applying a second process is also considered to be within the scope of continuous processing as defined herein.

[0049] Furthermore, between the first and second processing steps, there are substrate transport, alignment, and slow cooling processes. The process includes steps such as heating or cooling the substrate to the temperature required for the first or second process. However, this is considered to be within the scope of continuous processing as defined in this specification.

[0050] However, processes using liquids, such as the cleaning process, wet etching, and resist formation, are considered the first step. If it is between the first processing step and the second processing step, it does not fall under the scope of continuous processing as defined herein. Let's assume it doesn't happen.

[0051] The ordinal numbers "1st" and "2nd" are used for convenience only and do not represent the order of processes or stacking. This does not indicate that the invention is uniquely named. This does not indicate anything.

[0052] In addition, as a display device having a drive circuit, besides liquid crystal display devices, there are also light-emitting devices using light-emitting elements. Examples include display devices and electronic paper displays that use electrophoretic display elements. .

[0053] The liquid crystal display device is not particularly limited and includes TN LCDs, IPS LCDs, OCB LCDs, and STN LCDs. Crystal, VA liquid crystal, ECB type liquid crystal, GH liquid crystal, polymer dispersion liquid crystal, discotic liquid crystal, etc. While it is possible to use a normally black type LCD panel, for example, a vertically aligned ( It is preferable to use a transmissive liquid crystal display device employing the VA mode. There are several examples, but for instance, MVA (Multi-Domain Verification) tical Alignment) mode, PVA(Patterned Vertic) mode Alignment mode, ASV mode, etc. can be used. This involves dividing one pixel into multiple subpixels, and the opposing substrate located in the center of each subpixel By creating a protrusion in a specific location, one pixel is transformed into a multi-domain. By providing a protrusion on the opposing substrate located in the center of each subpixel, one pixel is oriented The driving method that achieves a wide viewing angle by dividing the image into multiple domains is called subpixel driving. The protrusions may be provided on one or both of the opposing substrates or element substrates, and in a radial pattern. This process aligns liquid crystal molecules and improves their alignment control.

[0054] Furthermore, the shape of the upper surface of the electrodes for driving the liquid crystal, i.e., the pixel electrodes, is made comb-shaped or zigzag-shaped to control the voltage. The orientation may be diversified. Alternatively, one pixel can be made into a multi-domain using optical alignment. That's good too.

[0055] Furthermore, thin-film transistors are susceptible to damage from static electricity, so the gate wire or source wire may be damaged. For each line, a protection circuit for protecting the thin-film transistors in the pixel area is provided on the same substrate. Preferably, the protection circuit is constructed using a nonlinear element made of oxide semiconductor. stomach.

[0056] In a light-emitting display device using a light-emitting element, the pixel section has multiple thin-film transistors, In the basic structure, the gate electrode of one thin-film transistor and the source wiring of another transistor, It has a location for connecting the drain wiring. It also has a light-emitting display device using a light-emitting element. In the drive circuit, the gate electrode of the thin-film transistor and the source of the thin-film transistor It has a point for connecting wiring or drain wiring. [Effects of the Invention]

[0057] In the pixel portion of a display device according to one embodiment of the present invention, light is transmitted to the constituent members of the thin-film transistor. Because a film with certain properties is used, the number of scan lines is increased to improve the resolution of the displayed image. Even with miniaturization of the basic dimensions, a high aperture ratio can be achieved. Also, thin-film transistors Because a translucent film is used in the constituent materials, in order to achieve a wide viewing angle, one pixel is made into multiple sub-pixels. Even when divided into pixels, a high aperture ratio can be achieved.

[0058] Furthermore, a light-transmitting thin-film transistor is provided in the pixel portion, and a different structure is provided on the same substrate as the pixel portion. A drive circuit with thin-film transistors is also provided, which helps to reduce manufacturing costs. [Brief explanation of the drawing]

[0059] [Figure 1] This is a cross-sectional view showing one aspect of the present invention. [Figure 2] These are a cross-sectional view and a plan view illustrating one aspect of the present invention. [Figure 3] This is a cross-sectional view showing one aspect of the present invention. [Figure 4] This is a plan view of a pixel illustrating one aspect of the present invention. [Figure 5] This is a cross-sectional view showing one aspect of the present invention. [Figure 6] This is a cross-sectional view showing one aspect of the present invention. [Figure 7] This is a cross-sectional view showing one aspect of the present invention. [Figure 8] These are a cross-sectional view and a plan view illustrating one aspect of the present invention. [Figure 9] This is a cross-sectional view showing one aspect of the present invention. [Figure 10] A diagram illustrating a semiconductor device. [Figure 11]A diagram illustrating a semiconductor device. [Figure 12] A diagram illustrating the pixel equivalent circuit of a semiconductor device. [Figure 13] A diagram illustrating a semiconductor device. [Figure 14] A diagram illustrating the block diagram of a semiconductor device. [Figure 15] A diagram illustrating the circuit diagram and timing chart of a signal line drive circuit. [Figure 16] A circuit diagram showing the configuration of a shift register. [Figure 17] A timing chart and circuit diagram illustrating the operation of a shift register. [Figure 18] A diagram illustrating a semiconductor device. [Figure 19] A diagram illustrating a semiconductor device. [Figure 20] An external view showing an example of an e-book. [Figure 21] External view showing examples of television equipment and digital photo frames. [Figure 22] An external view showing an example of a gaming machine. [Figure 23] An external view showing an example of a portable computer and mobile phone. [Figure 24] A diagram illustrating a semiconductor device. [Figure 25] A diagram illustrating a semiconductor device. [Figure 26] A diagram illustrating a semiconductor device. [Figure 27] A diagram illustrating the circuit diagram of a semiconductor device. [Figure 28] A diagram illustrating a semiconductor device. [Figure 29] A diagram illustrating a semiconductor device. [Figure 30] A diagram illustrating a semiconductor device. [Figure 31] A diagram illustrating the circuit diagram of a semiconductor device. [Figure 32] A diagram illustrating a semiconductor device. [Figure 33] A diagram illustrating a semiconductor device. [Figure 34] A diagram illustrating a semiconductor device. [Figure 35] A diagram illustrating a semiconductor device. [Figure 36] A diagram illustrating a semiconductor device. [Figure 37] A diagram illustrating a semiconductor device. [Modes for carrying out the invention]

[0060] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is... Not limited to the following description, the form and details can be modified in various ways, as any person skilled in the art would know. This is easily understood. Furthermore, the present invention shall be interpreted as being limited to the contents of the embodiments described below. It's not something that can be done.

[0061] (Embodiment 1) Semiconductor devices and methods for manufacturing semiconductor devices will be explained using Figures 1 and 2. Figure 2(A) shows This shows an example of the cross-sectional structure of two thin-film transistors with different structures fabricated on the same substrate. The thin-film transistor 470 shown in Figure 2(A) is a bottom-gate type called a channel-etch type. One of the structures is the thin-film transistor 460, which is a bottom-contact type (also called an inverse coplanar type). It is a type of bottom gate structure called (bu).

[0062] Figure 2(B1) shows the plan view of the channel etch type thin-film transistor 470 arranged in the drive circuit. This is a diagram, and Figure 2(A) is a cross-sectional view along the line C1-C2 in Figure 2(B1). Also, Figure 2 (C) is a cross-sectional view along the line C3-C4 in Figure 2(B1).

[0063] The thin-film transistor 470 placed in the drive circuit is a channel-etch type thin-film transistor. A gate electrode layer 401 and a first gate insulating layer 40 are placed on a substrate 400 having an insulating surface. 2a, second gate insulating layer 402b, at least channel forming region 434, first high resistance An oxide semiconductor layer having a drain region 431 and a second high-resistance drain region 432, It includes an electrode layer 405a and a drain electrode layer 405b. Also, thin-film transistor 47 An oxide insulating layer 407 is provided that covers 0 and is in contact with the channel-forming region 434.

[0064] A first high-resistance drain region 431 is formed in a self-aligned manner in contact with the lower surface of the source electrode layer 405a. This is achieved. Furthermore, a second high-resistance drain region is in contact with the lower surface of the drain electrode layer 405b. 432 is formed in a self-aligned manner. In addition, the channel formation region 434 is an oxide insulating layer It is in contact with 407 and the first high-resistance drain region 431 and the second high-resistance drain region 432 In comparison, the film thickness is smaller, and the first high-resistance drain region 431 and the second This is a region with higher resistance (Type I region) than the high-resistance drain region 432.

[0065] Furthermore, the thin-film transistor 470 has a source electrode layer 405a and It is preferable to use a metallic material as the drain electrode layer 405b.

[0066] Furthermore, in a drive circuit formed on the same substrate as the pixel section of a liquid crystal display device, the inverter circuit Thin-film transistors that make up logic gates such as paths, NAND gates, NOR gates, and latch gates Thin film components that make up analog circuits such as starters, sense amplifiers, constant voltage generators, and VCOs. A transistor can be used when either only positive polarity or only negative polarity is applied between the source electrode and the drain electrode. Therefore, the width of the second high-resistance drain region 432, which requires voltage resistance, is set to the width of the first high-resistance drain region. The rain region 431 may be designed to be wider than the rain region 431. Also, the first high-resistance drain region 43 The width over which the first and second high-resistance drain regions 432 overlap with the gate electrode layer may be increased.

[0067] Furthermore, the thin-film transistor 470 placed in the drive circuit is a single-gate thin-film transistor Although I explained using a zistor, a multi-gate with multiple channel formation regions can be used as needed. Thin-film transistors with this structure can also be formed.

[0068] Furthermore, a conductive layer 406 is provided that overlaps the channel formation region 434. By electrically connecting the electrode layer 401 and the conductive layer 4, the gate electrode layer 401 and the conductive layer 4 A gate voltage can be applied from above and below to the oxide semiconductor layer positioned between 06. Furthermore, the gate electrode layer 401 and the conductive layer 406 are at different potentials, for example, the conductive layer 406 is at a fixed potential. When GND is set to 0V, the electrical characteristics of the TFT, such as the threshold voltage, can be controlled. This is possible. In other words, the gate electrode layer 401 functions as the first gate electrode layer, and conduction By making layer 406 function as a second gate electrode layer, the thin-film transistor 470 has four terminals. It can be used as a thin-film transistor.

[0069] Furthermore, between the conductive layer 406 and the oxide insulating layer 407, there is a protective insulating layer 408 and a planar insulating layer 4 Stack 09 and 09.

[0070] Furthermore, the protective insulating layer 408 is provided below the first gate insulating layer 402 a or a configuration in contact with an insulating film substrate is preferable, and water, hydrogen ions, or O H - It blocks the intrusion of impurities containing hydrogen atoms, such as the protective insulating layer 40. If the first gate insulating layer 402a in contact with 8 or the underlying insulating film is a silicon nitride film, It is effective.

[0071] Furthermore, Figure 2(B2) shows the bottom-contact type thin-film transistor 460 arranged in the pixel. This is a plan view, and Figure 2(A) is a cross-sectional view along the line D1-D2 in Figure 2(B2). Figure 2(C) is a cross-sectional view along the line D3-D4 in Figure 2(B2).

[0072] The thin-film transistor 460 placed in the pixel is a bottom-contact type thin-film transistor. A gate electrode layer 451 and a first gate insulating layer 402 are placed on a substrate 400 having an insulating surface. a, second gate insulating layer 402b, oxide semiconductor layer 454 including channel formation region, It includes a drain electrode layer 455a and a drain electrode layer 455b. Also, thin-film transistor 460 An oxide insulating layer 407 is provided that covers the oxide semiconductor layer 454 and is in contact with the upper and side surfaces of the oxide semiconductor layer 454. Yes, they are.

[0073] However, liquid crystal display devices are driven by AC power to prevent degradation of the liquid crystal. Due to the movement, the polarity of the signal potential applied to the pixel electrode layer changes between positive and negative polarity at regular intervals. It inverts. The TFT connected to the pixel electrode layer has a pair of electrodes that alternately connect to the source electrode layer and the drain. It serves as an electrode layer. In this specification, for convenience, one electrode of the pixel thin-film transistor is It is called the source electrode layer, and the other electrode is called the drain electrode layer, but in reality, AC drive In this case, one electrode alternately functions as the source electrode layer and the drain electrode layer. Also, leakage current To reduce current flow, the width of the gate electrode layer of the thin-film transistor 460 placed in the pixel is driven. It may be narrower than the width of the gate electrode layer of the thin-film transistor 470 in the circuit. Also, leakage To reduce current, the gate electrode layer of the thin-film transistor 460 placed in the pixel is the source The design may be such that it does not overlap with the electrode layer or the drain electrode layer.

[0074] Furthermore, the thin-film transistor 460 placed in the pixel is a single-gate thin-film transistor Although explained using the example of "Ta," a multi-gate structure with multiple channel-forming regions can be used as needed. Thin-film transistors can also be formed.

[0075] Furthermore, the oxide semiconductor layer 454 is formed at least after the oxide semiconductor film is formed, and water, which is an impurity, is removed. Heat treatment is performed to reduce the amount of water (heat treatment for dehydration or dehydrogenation). Alternatively, after heat treatment and slow cooling for dehydrogenation, an oxide insulating layer is brought into contact with the oxide semiconductor layer. Reducing the carrier concentration in the oxide semiconductor layer by forming a film is a way to reduce thin-film transients. This will lead to improved electrical characteristics and reliability of the Ta460.

[0076] Furthermore, the oxide semiconductor layer 454 is the source electrode layer 455a and the drain electrode layer 455b It is formed on top and partially overlaps. Also, the oxide semiconductor layer 454 is the gate electrode layer 451 It overlaps with the first gate insulating layer 402a and the second gate insulating layer 402b. The channel formation region of the thin-film transistor 460 placed in the pixel is the oxide semiconductor layer 454 Of these, the side surface of the source electrode layer 455a and the drain electrode layer 455b facing the side surface The region sandwiched between the side and the gate electrode layer 4, that is, the region in contact with the second gate insulating layer 402b and the gate electrode layer 4 This area overlaps with 51.

[0077] Furthermore, the thin-film transistor 460 has a high aperture ratio as a light-transmitting thin-film transistor. To realize a transparent display device, the source electrode layer 455a and the drain electrode layer 455b are transparent A photosensitive conductive film is used.

[0078] Furthermore, the gate electrode layer 451 of the thin-film transistor 460 also uses a transparent conductive film.

[0079] Furthermore, pixels on which thin-film transistors 460 are placed have a pixel electrode layer 456, or other The electrode layer (such as a capacitive electrode layer) and other wiring layers (such as a capacitive wiring layer) are transparent to visible light. A display device with a high aperture ratio is realized using a photosensitive conductive film. Of course, the first gate The insulating layer 402a, the second gate insulating layer 402b, and the oxide insulating layer 407 are also transparent to visible light. It is preferable to use a photosensitive film.

[0080] In this specification, a film that is transparent to visible light is defined as a film with a visible light transmittance of 75 to 100. It refers to a film that is % and, if the film is conductive, it is also called a transparent conductive film. Electrode layer, source electrode layer, drain electrode layer, pixel electrode layer, or other electrode layers, and others A conductive film that is semi-transparent to visible light may be used as the metal oxide applied to the wiring layer. Semi-transparent to visible light means that the transmittance of visible light is between 50% and 75%.

[0081] Hereinafter, using Figures 1(A) to (F) and Figure 2(B), a thin-film transistor 4 is placed on the same substrate. The fabrication process for transistors 70 and 460 will be described.

[0082] First, a translucent conductive film is formed on a substrate 400 having an insulating surface, and then the first film The gate electrode layers 401 and 451 are formed by the trisography process. In addition, the pixel area is equipped with The first photolithography process uses a material with the same light-transmitting properties as electrode layers 401 and 451. To form a capacitive wiring layer. Also, if capacitance is required not only in the pixel section but also in the driving circuit, A capacitive wiring layer is also formed in the drive circuit. Furthermore, the resist mask is formed using an inkjet method. It is also acceptable. If the resist mask is formed by the inkjet method, a photomask is not used. Therefore, manufacturing costs can be reduced.

[0083] There are no major restrictions on the substrates that can be used for the substrate 400 having an insulating surface, however In addition, it is necessary that it has sufficient heat resistance to withstand subsequent heat treatment. The substrate 400 has glass such as barium borosilicate glass and aluminoborosilicate glass. A stainless steel substrate can be used.

[0084] Furthermore, regarding the aforementioned substrate 400, if the temperature of the subsequent heat treatment is high, the strain point is 730. It is best to use materials with a temperature of ℃ or higher. Also, for the substrate 400, for example, aluminosilicate glass Glass materials such as aluminum, aluminoborosilicate glass, and bariumborosilicate glass are used. Furthermore, by including more barium oxide (BaO) compared to boron oxide, This allows for the creation of practical heat-resistant glass. Therefore, glass substrates containing more BaO than B2O3 are obtained. It is preferable to use [this].

[0085] In addition, the above substrate 400 can be replaced with an insulating substrate such as a ceramic substrate, quartz substrate, or sapphire substrate. A substrate made of edge material may also be used. Other materials, such as crystallized glass, can also be used.

[0086] Alternatively, an insulating film that serves as the underlayer may be provided between the substrate 400 and the gate electrode layers 401 and 451. The undercoat has the function of preventing the diffusion of impurity elements from the substrate 400, and is a silicon nitride film. The compound is formed by one or more films selected from silicon oxide films, silicon nitride films, or silicon oxidoxide-nitride films. It can be formed by a layered structure.

[0087] The material of the gate electrode layers 401 and 451 is a conductive material that is transparent to visible light, for example In-Sn-Zn-O system, In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-G a-Zn-O series, Sn-Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al -Zn-O, In-O, Sn-O, and Zn-O metal oxides can be applied. The film thickness is appropriately selected within the range of 50 nm to 300 nm. Guard gate layer 401, 4 The metal oxide film deposition methods used in 51 include sputtering and vacuum deposition (such as electron beam deposition). ) or the arc discharge ion plating method or the spray method are used. In addition, the sputtering method is used. When used, the film is deposited using a target containing 2% to 10% by weight of SiO2. SiO2, which inhibits crystallization in light-transmitting conductive films. x (X>0) is included and performed in a later step. It is desirable to suppress crystallization during heat treatment for dehydration or dehydrogenation. It seems so.

[0088] Next, a gate insulating layer is formed on the gate electrode layers 401 and 451.

[0089] The gate insulating layer is formed using plasma CVD or sputtering, and consists of a silicon oxide layer and nitrided layer. A silicon layer, a silicon oxide nitride layer, or a silicon nitride oxide layer can be formed as a single layer or in multiple layers. For example, using SiH4, oxygen, and nitrogen as film-forming gases, an acid-based CVD method is used. A silicon nitride layer should be formed.

[0090] In this embodiment, a first gate insulating layer 402a with a film thickness of 50 nm to 200 nm, A gate insulating layer of a stack of second gate insulating layers 402b with a film thickness of 50 nm to 300 nm and The first gate insulating layer 402a is a silicon nitride film or oxidized nitride film with a thickness of 100 nm. A silicon film is used. In addition, the second gate insulating layer 402b is a silicon oxide film with a thickness of 100 nm. A film is used.

[0091] Next, a light-transmitting conductive film is formed on the second gate insulating layer 402b, and then the second The source electrode layer 455a and the drain electrode layer 455b are formed by a photolithography process. This is achieved (see Figure 1(A)). Methods for depositing transparent conductive films include sputtering and vacuum deposition. Methods such as electron beam deposition, arc discharge ion plating, and spraying are used. Yes. As for the conductive film material, a conductive material that is transparent to visible light, such as In-S n-Zn-O system, In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga-Zn -O series, Sn-Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn- O-based, In-O-based, Sn-O-based, and Zn-O-based metal oxides can be applied, and the film thickness is Select appropriately within the range of 50 nm to 300 nm. Also, when using the sputtering method, A film is formed using a target containing 2% to 10% by weight of SiO2, and the film has light-transmitting properties. The conductive film undergoes crystallization inhibiting SiO x (X>0) is included, and dehydration is performed in a later step. It is preferable to suppress crystallization during the heat treatment for dehydrogenation.

[0092] Furthermore, the resist for forming the source electrode layer 455a and the drain electrode layer 455b The screen may be formed by an inkjet method. This eliminates the need for photomasks, thus reducing manufacturing costs.

[0093] Next, the second gate insulating layer 402b, the source electrode layer 455a, and the drain electrode layer 45 An oxide semiconductor film with a thickness of 2 nm to 200 nm is formed on 5b. Even if heat treatment for dehydration or dehydrogenation is performed after the formation of the oxide semiconductor layer, the oxide semiconductor layer remains amorphous. To achieve this state, it is preferable to make the film thickness thin, to 50 nm or less. By making it thin, when the oxide semiconductor layer is heated after formation, crystallization is prevented. It can be suppressed.

[0094] Furthermore, before depositing the oxide semiconductor film by sputtering, argon gas is introduced to form plasma Reverse sputtering is performed to generate sputter, and the sputter attached to the surface of the second gate insulating layer 402b It is preferable to remove the aluminum. Reverse sputtering is a process where no voltage is applied to the target side. Under a gon atmosphere, a voltage is applied to the substrate side using an RF power supply to form plasma near the substrate. This is a method for modifying the surface. Note that nitrogen, helium, oxygen, etc., can be used instead of an argon atmosphere. You may use it.

[0095] Oxide semiconductor films include In-Ga-Zn-O non-single crystal films, In-Sn-Zn-O films, and In -Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga-Zn-O system, Sn-Al- Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In-O series, S nO-based and Zn-O-based oxide semiconductor films are used. In this embodiment, In-Ga-Zn -O-based oxide semiconductor targets are used to deposit films by sputtering. , under a noble gas (typically argon) atmosphere, under an oxygen atmosphere, or under a noble gas (typically argon) atmosphere This can be carried out under a gas and oxygen atmosphere. Also, when using the sputtering method, SiO2 A target containing 2% to 10% by weight of [the substance] is used to form a film, which then bonds to the oxide semiconductor film. SiO2 inhibits crystallization x (X>0) is included, and for dehydration or dehydrogenation to be performed in a later step It is preferable to suppress crystallization during the subsequent heat treatment.

[0096] Next, the oxide semiconductor film is transformed into island-shaped oxide semiconductor layers by a third photolithography process. Process. Note that the oxide semiconductor overlapping the source electrode layer 455a and the drain electrode layer 455b In order to obtain the conductive layer, the source electrode layer 455a and The materials and etching conditions are adjusted to ensure that the drain electrode layer 455b is not removed. Adjust as needed. Also, an inkjet resist mask is used to form island-shaped oxide semiconductor layers. It may also be formed by the inkjet method. If the resist mask is formed by the inkjet method, it becomes a photomask. Because it does not use [a specific ingredient / method], manufacturing costs can be reduced.

[0097] Next, the oxide semiconductor layer is dehydrated or dehydrogenated. The temperature of the heat treatment in step 1 is 350°C or higher and below the strain point of the substrate, preferably 400°C or higher. The substrate is kept below the strain point. Here, the substrate is introduced into an electric furnace, which is one of the heat treatment devices. After the oxide semiconductor layer is heat-treated in a nitrogen atmosphere, the substrate is exposed to the air. By preventing this, the re-importation of water and hydrogen into the oxide semiconductor layer is prevented, and oxide semiconductor layer 403, 4 53 is obtained (see Figure 1(B)). In this embodiment, the oxide semiconductor layer is dehydrated or dehydrated. Using the same furnace, from the heating temperature T used for the chemical reaction, the temperature is raised to a level sufficient to prevent water from entering again. The process involves slow cooling under a nitrogen atmosphere until the temperature drops by more than 100°C below the heating temperature T. Furthermore, dehydrogenation is not limited to a nitrogen atmosphere, but can also occur in noble gas atmospheres such as helium, neon, and argon. Dehydration or dehydrogenation may be carried out under gas or reduced pressure.

[0098] In the first heat treatment, nitrogen or a noble gas such as helium, neon, or argon is used. It is preferable that it does not contain water, hydrogen, etc. For example, nitrogen introduced into the heat treatment device, Alternatively, the purity of noble gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably 7N (99.99999%) or higher (i.e., impurity concentration of 1 ppm or less, preferably It is preferable to keep the concentration at 0.1 ppm or less.

[0099] Furthermore, depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, crystallization may occur, and microcrystalline formation may occur. It may also form a crystalline film or a polycrystalline film.

[0100] Furthermore, the first heat treatment of the oxide semiconductor layer is performed before processing it into an island-shaped oxide semiconductor layer. It is also possible to do this. In that case, after the first heat treatment, remove the substrate from the heat treatment apparatus and The photolithography process is performed.

[0101] Furthermore, before depositing the oxide semiconductor film, an inert gas atmosphere (nitrogen, or helium, neon, Heat treatment (400°C or higher) under argon, oxygen atmosphere, or reduced pressure to reduce substrate distortion. The process may involve removing impurities such as hydrogen and water contained within the gate insulating layer by performing a test (less than 100%).

[0102] Next, a metal conductive film is formed on the second gate insulating layer 402b, and then the fourth photolithography is performed. A resist mask 436 is formed by a graphing process, and selective etching is performed to remove metal electrodes. A polar layer 435 is formed (see Figure 1(C)). The materials for the metal conductive film are Al, Cr, and C. An element selected from u, Ta, Ti, Mo, W, or an alloy containing the above elements, There are alloys and other combinations of the elements mentioned above.

[0103] As a metallic conductive film, an aluminum layer is placed on a titanium layer, and a titanium layer is placed on the aluminum layer. A laminated structure consisting of three layers, or a molybdenum layer with an aluminum layer and the aluminum A three-layer laminated structure with a molybdenum layer laminated on top of the other layers is preferable. Of course, a metal conductive film is also preferable. It may be a single-layer, two-layer, or four-layer or more laminated structure.

[0104] Furthermore, in the fourth photolithography step, the oxide semiconductor layer 453 and the source electrode layer 455a , and in order to selectively remove the metal conductive film that overlaps with the drain electrode layer 455b, the metal conductive film During etching, the oxide semiconductor layer 453, the source electrode layer 455a, and the drain electrode Adjust the materials and etching conditions as appropriate so that layer 455b is not removed. Next, a resist mask 436 for forming the metal electrode layer 435 is formed by an inkjet method. It is also possible to use a photomask when forming the resist mask 436 by the inkjet method. Therefore, manufacturing costs can be reduced.

[0105] Next, the resist mask 436 is removed, and the resist is removed by a fifth photolithography step. A mask 437 is formed, and selective etching is performed to remove the source electrode layer 405a and the drain. An electrode layer 405b is formed (see Figure 1(D)). The fifth photolithography process In this case, only a portion of the oxide semiconductor layer 403 is etched, resulting in an oxide having grooves (recesses). This forms the semiconductor layer 433. Additionally, a resist is used to form grooves (recesses) in the oxide semiconductor layer. The mask 437 may be formed by an inkjet method. Since the photomask method does not require a photomask, manufacturing costs can be reduced.

[0106] Next, the resist mask 437 is removed, and the top and side surfaces of the oxide semiconductor layer 453 are brought into contact with each other. The oxide insulating layer 407 forms a protective insulating film that contacts the grooves (recesses) of the oxide semiconductor layer 433. To accomplish.

[0107] The oxide insulating layer 407 has a thickness of at least 1 nm, and is formed by an oxidation process such as sputtering. The material insulating layer 407 can be formed using an appropriate method that prevents the incorporation of impurities such as water and hydrogen. In this embodiment, a silicon oxide film with a thickness of 300 nm is used as the oxide insulating layer 407. The film is deposited using the dermatization method. The substrate temperature during film deposition should be between room temperature and 300°C. In this embodiment, the temperature is set to 100°C. The deposition of silicon oxide films by sputtering is rare. Under a gaseous atmosphere (typically argon), under an oxygen atmosphere, or under a noble gas atmosphere (typically argon) It can be carried out in an oxygen atmosphere. Also, silicon dioxide can be used as a target. A GET or silicon target can be used. For example, using a silicon target, Silicon oxide can be formed by sputtering under oxygen and nitrogen atmospheres. Oxide insulating layer formed in contact with an oxide semiconductor layer whose resistance has been reduced by hydration or dehydrogenation. 407 is water, hydrogen ions, and OH -It does not contain impurities containing hydrogen atoms, such as these. Inorganic insulating films are used to block external intrusion. Typical examples include silicon oxide films and nitride films. A silicon oxide film, aluminum oxide film, or aluminum oxide-nitride film is used.

[0108] Next, a second heat treatment (preferably 2) is performed under an inert gas atmosphere or an oxygen gas atmosphere. Perform the process at temperatures between 0°C and 400°C, for example, between 250°C and 350°C (see Figure 1(E)). For example, a second heat treatment is performed at 250°C for 1 hour under a nitrogen atmosphere. When this is done, the grooves of the oxide semiconductor layer 433, the upper surface and side surfaces of the oxide semiconductor layer 453 become oxide semiconductor It is heated in contact with the marginal layer 407.

[0109] Through the above process, the oxide semiconductor film after deposition is dehydrated or dehydrogenated. After performing a heat treatment to reduce resistance, a portion of the oxide semiconductor film is selectively treated to remove excess oxygen. This is the state. As a result, the channel formation region 434 that overlaps with the gate electrode layer 401 is type I and This results in a first high-resistance drain region 431 overlapping the source electrode layer 405a, and the drain electrode The second high-resistance drain region 432, which overlaps with layer 405b, is formed in a self-aligned manner. The oxide semiconductor layer 453 is entirely type I, and the oxide semiconductor layer 4 includes a channel formation region. It becomes 54.

[0110] Furthermore, the oxide semiconductor layer superimposed on the drain electrode layer 405b (and source electrode layer 405a) In this, the second high-resistance drain region 432 (or the first high-resistance drain region 431) By forming this, the reliability of the drive circuit can be improved. Specifically, the second By forming a high-resistance drain region 432, a second high-resistance drain is formed from the drain electrode layer. In the region 432, the channel formation region, a structure is provided such that the conductivity can be changed stepwise. Therefore, when the drain electrode layer 405b is connected to a wiring for supplying a high power supply potential VDD and operated, even if a high electric field is applied between the gate electrode layer 401 and the drain electrode layer 405b, the high resistance drain region serves as a buffer and no local high electric field is applied, and the breakdown voltage of the transistor can be improved. Also, in the oxide semiconductor layer overlapping the drain electrode layer 405b (and the source electrode layer 405a), by forming the second high resistance drain region 432 (or the first high resistance drain region 431), the leakage current in the channel formation region 434 can be reduced. Thus, a configuration can be achieved in which the breakdown voltage of the transistor is improved.

[0111] Next, a protective insulating layer 408 is formed on the oxide insulating layer 407 (see Fig. 1(F)). In this embodiment, a silicon nitride film is formed using the RF sputtering method. The RF sputtering method is preferable as a film formation method for the protective insulating layer 408 because of its good mass productivity. The protective insulating layer 408 does not contain impurities containing hydrogen atoms such as water, hydrogen ions, and OH, and an inorganic insulating film that blocks the intrusion of these from the outside is used, such as a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or aluminum oxynitride. Of course, the protective insulating layer 408 is a translucent insulating film.

[0112] -

[0113] -It blocks the entry of impurities containing hydrogen atoms, such as those mentioned above. In particular, the first gate insulating layer 402a or the underlying insulating film that is in contact with the protective insulating layer 408 A silicon nitride film is effective. That is, surrounding the bottom, top, and sides of the oxide semiconductor layer. Applying a silicon nitride film improves the reliability of the display device.

[0114] Next, a planar insulating layer 409 is formed on the protective insulating layer 408. For example, polyimide, acrylic resin, benzocyclobutene resin, polyamide, epoxy resin Heat-resistant organic materials such as fats can be used. In addition to the above organic materials, low induction Low-k materials, siloxane resins, PSG (phosphorus glass), BPSG (lithium glass) Boron glass, etc., can be used. Furthermore, multiple insulating films formed from these materials can be used. A planar insulating layer 409 may be formed by stacking several layers.

[0115] Siloxane-based resins are formed using siloxane-based materials as the starting material for Si-OS. This corresponds to a resin containing i-bonds. Siloxane resins use organic groups (e.g., alkyl groups) as substituents. Organic groups (such as aryl or aryl groups) may also be used. Furthermore, the organic group may contain a fluoro group.

[0116] The method for forming the planar insulating layer 409 is not particularly limited and can be done by sputtering, SO2, or other methods depending on the material. G method, spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen coating) Methods such as screen printing, offset printing, etc., as well as doctor knives, roll coaters, and curtain rods. Tools such as a tumble coater and a knife coater can be used.

[0117] Next, a sixth photolithography step is performed to form a resist mask and a planar insulating layer 4 09, the drain electrode layer 4 is formed by etching the protective insulating layer 408 and the oxide insulating layer 407. A contact hole reaching 55b is formed. Also, etching at this point causes the gate to dissipate. Contact holes reaching the polar layers 401 and 451 are also formed. Furthermore, the drain electrode layer 455 A resist mask for forming contact holes reaching b is formed using an inkjet method. It is also permissible to form the resist mask using an inkjet method, which eliminates the need for a photomask. Therefore, manufacturing costs can be reduced.

[0118] Next, after removing the resist mask, a translucent conductive film is formed. Materials used for conductive films include indium oxide and mixed oxides of indium and tin (abbreviated as ITO). (To be noted) etc. are formed using sputtering or vacuum deposition methods. A transparent conductive film Other materials include Al-Zn-O-based non-single-crystal films containing nitrogen, i.e., Al-Zn-ON Non-single-crystalline films, or Zn-O-based non-single-crystalline films containing nitrogen, i.e., Zn-ON-based non-single-crystalline films. or a nitrogen-containing Sn-Zn-O non-single crystal film, i.e., a Sn-Zn-ON non-single crystal film. You may also use [this]. Note that the zinc composition ratio (atomic %) of the Al-Zn-ON non-single crystal film is: It should be 47 atomic percent or less, and greater than the composition ratio of aluminum in a non-single crystal film (atomic percent). The composition ratio (atomic %) of aluminum in a crystalline film is equal to the composition ratio (atomic %) of nitrogen in a non-single-crystal film. Larger. Etching of such materials is carried out with hydrochloric acid-based solutions. However, especially ITO etching tends to produce residue, so to improve etching processability, A mixed oxide of zinc and zinc may also be used.

[0119] Note that the unit of the composition ratio of the conductive film having translucency is atomic %, and it shall be evaluated by analysis using an electron beam microanalyzer (EPMA: Electron Probe X-ray MicroAnalyzer ).

[0120] Next, a seventh photolithography process is performed to form a resist mask, and unnecessary portions are removed by etching to form the pixel electrode layer 456 and the conductive layer 406 (see Fig. 2(A)) . )

[0121] Through the above processes, using seven masks, the thin film transistor 470 and the thin film transistor 460 can be separately fabricated on the same substrate as a drive circuit or a pixel portion . Also, the first gate insulating layer 402a and the second gate insulating layer 402b are used as dielectrics, and the holding capacitor formed by the capacitance wiring layer and the capacitance electrode can also be formed on the same substrate. The thin film transistor 460 and the holding capacitor are arranged in a matrix corresponding to individual pixels to form a pixel portion, and a drive circuit having the thin film transistor 470 is arranged around the pixel portion, whereby it can be used as one substrate for manufacturing an active matrix type display device. In this specification, for convenience, such a substrate is referred to as an active matrix substrate . The pixel electrode layer 456 is electrically connected to the capacitance electrode layer through the contact hole formed in the planarization insulating layer 409, the protective insulating layer 408, and the oxide insulating layer 407. Note that the capacitance electrode layer can be formed of the same material having the same translucency as the drain electrode layer 455b and in the same process .

[0122] Note that the conductive layer 406 is provided at a position overlapping with the channel formation region 434 of the oxide semiconductor layer .

[0123] ​​​​​​ This refers to the bias-thermal stress test (BT) used to investigate the reliability of thin-film transistors. In the test, the threshold voltage of the thin-film transistor 470 before and after the BT test was The amount of change can be reduced. Also, the conductive layer 406 has the same potential as the gate electrode layer 401. They can be the same or different, and they can also function as a second gate electrode layer. Furthermore, the potential of the conductive layer 406 may be GND, 0V, or in a floating state. .

[0124] Furthermore, a resist mask for forming the pixel electrode layer 456 is formed by an inkjet method. This is also good. Because if the resist mask is formed by the inkjet method, a photomask is not used. This can reduce manufacturing costs.

[0125] (Embodiment 2) In this embodiment, the active matrix substrate shown in Embodiment 1 is used, This shows an example of fabricating a matrix-type liquid crystal display device.

[0126] An example of the cross-sectional structure of an active matrix substrate is shown in Figure 3(A). Figure 4 shows the pixel section. A portion of the top view is shown, and the cross section cut along the dashed line A1-A2 in Figure 4 is the same as A1-A in Figure 3(A). This corresponds to 2, and the cross-section cut along the dashed line B1-B2 in Figure 4 is the same as B1-B2 in Figure 3(A). It corresponds to the following. In the pixel layout shown in Figure 4, the oxide semiconductor layer overlaps with the soaring The upper surface shape of the electrode layer is U-shaped or C-shaped, and an example different from Embodiment 1 is shown, but in particular Not limited.

[0127] In Embodiment 1, the thin-film transistors of the drive circuit and the thin-film transistors of the pixel are mounted on the same substrate. Although the diagram shows the transistors, in this embodiment, in addition to those thin-film transistors, the holding capacitance and gate The terminal sections for wiring and source wiring will also be illustrated and explained. Capacitance, gate wiring, and source wiring terminal sections This can be formed using the same process as the manufacturing process shown in Embodiment 1, and the number of photomasks It can be manufactured without increasing the number of components or processes. Furthermore, the display area of ​​the pixel portion... In the relevant sections, the gate wiring, source wiring, and capacitive wiring layers are all transparent conductive materials. It is formed of a film, achieving a high aperture ratio. In addition, source distribution in areas not covered by the display area Metal wiring is used for the wire layers to reduce wiring resistance.

[0128] In Figure 3(A), the thin-film transistor 210 is a channel etched into the drive circuit. This is a thin-film transistor of type 2, which is electrically connected to the pixel electrode layer 227. 20 is a bottom-contact type thin-film transistor provided in the pixel area.

[0129] As the thin-film transistor 220 formed on the substrate 200, in this embodiment, The same structure as the thin-film transistor 460 of Form 1 is used.

[0130] A material having the same light-transmitting properties as the gate electrode layer of the thin-film transistor 220, and formed using the same process. The capacitance wiring layer 230 consists of a first gate insulating layer 202a which acts as a dielectric, and a second gate insulating layer It overlaps with the capacitive electrode 231 via the marginal layer 202b, forming a retained capacitance. 31 has the same light transmittance as the source electrode layer or drain electrode layer of the thin-film transistor 220. The material and the process are used to form it. Therefore, the thin-film transistor 220 has light-transmitting properties. In addition to this, each of the holding capacities also has light-transmitting properties, thus improving the aperture ratio. It is possible.

[0131] The fact that the holding capacity is light-transmitting is important for improving the aperture ratio, especially for 10-inch lenses. In the following small LCD display panel, increasing the number of gate wires, etc., improves the display image quality. To achieve higher resolution, even when pixel dimensions are reduced, a high aperture ratio can be achieved. By using a light-transmitting film for the components of the thin-film transistor 220 and the retaining capacitor, To achieve a wide viewing angle, a high aperture ratio is achieved even when one pixel is divided into multiple subpixels. This is possible. In other words, even if thin-film transistors are arranged at high density, a large aperture ratio can be achieved. This allows for sufficient display area to be secured. For example, 2- When there are four subpixels and a retaining capacitance, the thin-film transistor is translucent. In addition, since each of the holding capacities is also light-transmitting, the aperture ratio can be improved. ru.

[0132] Furthermore, the retaining capacitance is provided below the pixel electrode layer 227, and the capacitance electrode 231 is located below the pixel electrode layer 2 It is electrically connected to 27.

[0133] In this embodiment, a capacitive electrode 231 and a capacitive wiring layer 230 are used to form a retained capacitance. Although an example has been given, the structure that forms the retention capacity is not particularly limited. For example, capacitive wiring Without providing a layer, the pixel electrode layer is connected to the gate wiring of adjacent pixels, a planar insulating layer, a protective insulating layer, and The retention capacitance may be formed by overlapping the first gate insulating layer and the second gate insulating layer.

[0134] Figure 4 shows the contact hoses for electrically connecting the capacitive electrode 231 to the pixel electrode layer 227. The diagram shows contact hole 224. Contact hole 224 is a drain of thin-film transistor 220. A contact hole 225 for electrically connecting the electrode layer and the pixel electrode layer 227. It can be formed with a photomask. Therefore, without increasing the number of steps, contact holes 224 can be formed.

[0135] Furthermore, gate wiring, source wiring, and capacitive wiring layers are provided in multiple layers depending on the pixel density. Furthermore, at the terminal section, there is a first terminal electrode at the same potential as the gate wiring, and a source wiring. Multiple terminal electrodes, such as a second terminal electrode at the same potential as the capacitive wiring layer and a third terminal electrode at the same potential as the capacitive wiring layer, are arranged in a row. They are arranged. The number of each terminal electrode can be any number you like. The contractor should make the decision as appropriate.

[0136] In the terminal section, the first terminal electrode, which is at the same potential as the gate wiring, has the same light transmission as the pixel electrode layer 227. It can be formed from a material having properties. The first terminal electrode reaches the gate wiring. It is electrically connected to the gate wiring via a contact hole. The wire electrically connects the drain electrode layer of the thin-film transistor 220 and the pixel electrode layer 227. Using the same photomask as the contact holes for continuation, a planar insulating layer 204, protective insulating Edge layer 203, oxide insulating layer 216, second gate insulating layer 202b, and first gate insulating Layer 202a is formed by selective etching.

[0137] Furthermore, the gate electrode layer of the thin-film transistor 210 arranged in the drive circuit is an oxide semiconductor layer. The structure may also be configured to electrically connect to a conductive layer 217 provided above it. The drain electrode layer of the thin-film transistor 220 and the pixel electrode layer 227 are electrically connected. Using the same photomask as for the contact holes, planar insulating layer 204, protective insulating layer 2 03, oxide insulating layer 216, second gate insulating layer 202b, and first gate insulating layer 20 2a is selectively etched to form a contact hole. Through this contact hole The conductive layer 217 and the gate electrode layer of the thin-film transistor 210 arranged in the drive circuit are electrically connected. Connect electrically.

[0138] Furthermore, the second terminal electrode 235, which is at the same potential as the source wiring 234 of the drive circuit, is connected to the pixel electrode layer 22 It can be formed from a material having the same light-transmitting properties as 7. The second terminal electrode 235 is the source It is electrically connected to the source wiring via a contact hole that reaches wiring 234. Wiring 234 is a metal wiring, made of the same material as the source electrode layer of thin-film transistor 210, same They are formed during the process and have the same potential.

[0139] Furthermore, the third terminal electrode, which is at the same potential as the capacitive wiring layer 230, has the same light transmission properties as the pixel electrode layer 227. It can be formed from a material having the following properties. Also, contact holes reaching the capacitive wiring layer 230 The capacitive electrode 231 is electrically connected to the pixel electrode layer 227 by a contact hole 22 It can be formed using the same photomask and process as in 4.

[0140] Furthermore, when manufacturing an active matrix type liquid crystal display device, the active matrix A liquid crystal layer is provided between the substrate and the opposing substrate on which the opposing electrodes are provided, and an active matrix is ​​formed. The substrate and the opposing substrate are fixed together. Furthermore, the opposing electrode provided on the opposing substrate is electrically connected. A common electrode is provided on the active matrix substrate, and a fourth terminal is electrically connected to the common electrode. An electrode is provided at the terminal. This fourth terminal electrode is connected to a common electrode at a fixed potential, for example, GND, 0 This is a terminal for setting V, etc. The fourth terminal electrode has the same light transmittance as the pixel electrode layer 227. It can be formed from a material having the following properties.

[0141] Furthermore, the source electrode layer of thin-film transistor 220 and the source electrode layer of thin-film transistor 210 The configuration for electrically connecting the two is not particularly limited; for example, the source of the thin-film transistor 220 A connecting electrode that connects the electrode layer and the source electrode layer of the thin-film transistor 210 is located in the pixel electrode layer 227. It may also be formed using the same process. In addition, in the area that is not a display area, thin film transistor 2 The 20 source electrode layers and the source electrode layer of the thin-film transistor 210 are in contact and stacked together. That's fine.

[0142] The cross-sectional structure of the gate wiring layer 232 of the drive circuit is shown in Figure 3(A). The example is for a small LCD display panel of 10 inches or less, therefore the gate wiring layer of the drive circuit 232 uses a material having the same light-transmitting properties as the gate electrode layer of the thin-film transistor 220. ru.

[0143] Also, gate electrode layer, source electrode layer, drain electrode layer, pixel electrode layer, or other electrodes Using the same material for the layers and other wiring layers allows for the use of common sputtering targets and common manufacturing equipment. It can be used, and the material cost and the etchant used during etching (or This reduces the cost required for etching gas, and as a result, reduces manufacturing costs. It is possible.

[0144] Furthermore, in the structure shown in Figure 3(A), a photosensitive resin material is used as the planar insulating layer 204. In this case, the step of forming a resist mask can be omitted.

[0145] Furthermore, Figure 3(B) shows a cross-sectional structure that differs in part from that of Figure 3(A). Figure 3(B) is a reference to Figure 3( A) is the same as A) except that the planar insulating layer 204 is absent, therefore the same signs are used in the same locations. Using this, a detailed explanation of the same area will be omitted. In Figure 3(B), in contact with the protective insulating layer 203 The pixel electrode layer 227, the conductive layer 217, and the second terminal electrode 235 are formed.

[0146] With the structure shown in Figure 3(B), the step of forming the planarized insulating layer 204 can be omitted.

[0147] This embodiment can be freely combined with Embodiment 1.

[0148] (Embodiment 3) In this embodiment, the size of the liquid crystal display panel exceeds 10 inches, and is 60 inches, and furthermore... If the screen size is set to 120 inches, the wiring resistance of the translucent wiring may become a problem. This example shows how to reduce wiring resistance by using metal wiring for part of the gate wiring.

[0149] Note that Figure 5(A) uses the same reference numerals as Figure 3(A), and detailed explanations of the same parts are provided separately. Omitted.

[0150] Figure 5(A) shows that a portion of the gate wiring of the drive circuit is made of metal wiring, and the thin-film transistor 210 This is an example of forming a gate electrode layer in contact with wiring that has the same light-transmitting properties as the gate electrode layer. To achieve this, the number of photomasks increases compared to Embodiment 1.

[0151] First, a substrate 200 that can withstand a first heat treatment for dehydration or dehydrogenation A heat-resistant conductive material film (thickness between 100 nm and 500 nm) is formed.

[0152] In this embodiment, a tungsten film with a thickness of 370 nm and a tantalum nitride film with a thickness of 50 nm are used. Formed. Here, the conductive film is made of a laminate of a tantalum nitride film and a tungsten film, but there are no particular limitations. Not specified, an element selected from Ta, W, Ti, Mo, Al, Cu, or the above elements The alloy is a component of the above-mentioned elements, or an alloy film is a combination of the above-mentioned elements, or the above-mentioned elements are a component of the above-mentioned elements. It is formed from nitrides. The heat-resistant conductive material film is not limited to a single layer containing the above-mentioned elements, but rather two Multiple layers can be used.

[0153] A first photolithography process forms the metal wiring, and the first metal wiring layer 236 and the second A metal wiring layer 237 is formed. For etching the tungsten film and the tantalum nitride film, I CP (Inductively Coupled Plasma) It is best to use an etching method. Use the ICP etching method and the etching conditions (coil type) (The amount of power applied to the electrodes, the amount of power applied to the electrodes on the substrate side, the temperature of the electrodes on the substrate side, etc.) By adjusting the settings, the film can be etched into a desired tapered shape. The metal wiring layer 236 and the second metal wiring layer 237 are formed in contact with each other by tapering their shape. This can reduce defects in the deposition of conductive films that have light-transmitting properties.

[0154] Next, after forming a light-transmitting conductive film, a second photolithography process is performed. The wiring layer 238, the gate electrode layer of the thin-film transistor 210, and the gate electrode layer of the thin-film transistor 220 A translucent electrode layer is formed. The light-transmitting conductive film is directed towards visible light as described in Embodiment 1. A conductive material with light-transmitting properties is used.

[0155] Furthermore, depending on the material of the light-transmitting conductive film, the first metal wiring layer 236 or the second metal On the surface of the tail wiring layer 237 that is in contact with the gate wiring layer 238, the oxide film is formed by subsequent heat treatment, etc. Because a layer may form and potentially increase contact resistance, the second metal wiring layer 237 is formed on the first metal wiring layer It is preferable to use a metal nitride film to prevent oxidation of the linear layer 236.

[0156] Next, a gate insulating layer, an oxide semiconductor layer, and the like are formed using the same process as in Embodiment 1. The next step involves fabricating an active matrix substrate according to Embodiment 1.

[0157] Furthermore, in this embodiment, after forming the planar insulating layer 204, a photomask is used to form the terminals. This shows an example of selectively removing the planar insulating layer in a given area. In the terminal area, the planar insulating layer is present. It is preferable not to do so in order to ensure a good connection with the FPC.

[0158] In Figure 5(A), the second terminal electrode 235 is formed on the protective insulating layer 203. In 5(A), a gate wiring layer 238 overlapping with a portion of the second metal wiring layer 237 was shown, It can also be used as a gate wiring layer that covers the entirety of the first metal wiring layer 236 and the second metal wiring layer 237. Good. That is, the first metal wiring layer 236 and the second metal wiring layer 237 provide low resistance to the gate wiring. This can be called auxiliary wiring for resistance.

[0159] Furthermore, at the terminal section, the first terminal electrode, which is at the same potential as the gate wiring, is located on the protective insulating layer 203. It is formed and electrically connected to the second metal wiring layer 237. The wiring routed from the terminal is also metal. It is formed by wiring.

[0160] Furthermore, for gate wiring and capacitive wiring in areas not within the display area, metal is used to reduce wiring resistance. Wiring, specifically the first metal wiring layer 236 and the second metal wiring layer 237, are used as auxiliary wiring. It is also possible to do so.

[0161] Furthermore, Figure 5(B) shows a cross-sectional structure that differs in part from that of Figure 5(A). Figure 5(B) is a reference to Figure 5( A) is the same as the drive circuit except for the material of the gate electrode layer of the thin-film transistor. Therefore, the same symbols are used for the same sections, and detailed explanations of the same sections are omitted.

[0162] Figure 5(B) shows an example where the gate electrode layer of the thin-film transistor in the drive circuit is made of metal wiring. In the drive circuit, the gate electrode layer is not limited to a translucent material.

[0163] In Figure 5(B), the thin-film transistor 240 arranged in the drive circuit is the first metal wiring layer The gate electrode layer is formed by laminating a second metal wiring layer 241 on top of 242. The wiring layer 242 can be formed using the same material and process as the first metal wiring layer 236. Furthermore, the second metal wiring layer 241 is formed using the same material and process as the second metal wiring layer 237. It is possible.

[0164] Furthermore, when the gate electrode layer of the thin-film transistor 240 is electrically connected to the conductive layer 217, The second metal wiring layer 241, which prevents oxidation of the first metal wiring layer 242, is a metal nitride film. It is preferable.

[0165] In this embodiment, metal wiring is used in part of the wiring of the drive circuit to reduce wiring resistance. Therefore, the size of the LCD display panel exceeds 10 inches, 60 inches, and even 120 inches. Even when using a 3D converter, it is possible to maintain high resolution of the displayed image and a high aperture ratio.

[0166] (Embodiment 4) In this embodiment, an example of the configuration of the holding capacity that differs from that of Embodiment 2 is shown in Figure 6(A) and This is shown in Figure 6(B). Figure 6(A) is the same as Figure 3(A) except that the configuration of the holding capacity is different. Therefore, the same symbols are used for the same locations, and detailed explanations of the same locations are omitted. (See Figure 6) (A) shows the cross-sectional structure of the thin-film transistor 220 and retaining capacitance arranged in the pixel area.

[0167] Figure 6(A) shows the dielectric material consisting of an oxide insulating layer 216, a protective insulating layer 203, and a planar insulating layer 20 4. The pixel electrode layer 227 and the capacitive wiring layer 250 overlapping the pixel electrode layer 227 hold the capacitor. This is an example of forming a quantity. The capacitive wiring layer 250 is a thin-film transistor 220 placed in the pixel. Because it is made of a material having the same light-transmitting properties as the source electrode layer and formed in the same process, the thin film transistor The layout is designed so as not to overlap with the source wiring layer of the ZISTA 220.

[0168] The retention capacity shown in Figure 6(A) is due to the fact that the pair of electrodes and dielectric material are translucent, and the total retention capacity is It is translucent as a body.

[0169] Furthermore, Figure 6(B) is an example of a different storage capacity configuration from Figure 6(A). Since it is the same as 3(A) except for the difference in the configuration of the holding capacity, the same symbols are used for the same parts. I will omit a detailed explanation of the same section.

[0170] Figure 6(B) shows the dielectric material with a first gate insulating layer 202a and a second gate insulating layer 202b. Furthermore, the capacitance wiring layer 230 and the oxide semiconductor layer 252 overlapping the capacitance wiring layer 230 and the capacitance wiring layer This is an example of forming a retained capacitance by stacking with electrode 231. Also, the oxide semiconductor layer 252 is capacitive It is stacked in contact with electrode 231 and functions as one of the electrodes for holding capacitance. Electrode 231 has the same light transmission properties as the source electrode layer or drain electrode layer of the thin-film transistor 220. A material having the properties is formed by the same process. In addition, the capacitive wiring layer 230 is a thin-film transistor 2 Because it is made of the same translucent material as the 20 gate electrode layer and formed using the same process, the thin film transistor The layout is designed so as not to overlap with the gate wiring layer of the ZISTA 220.

[0171] Furthermore, the capacitive electrode 231 is electrically connected to the pixel electrode layer 227.

[0172] The retention capacity shown in Figure 6(B) is also due to the fact that the pair of electrodes and dielectric material are translucent, and the total retention capacity It is translucent as a body.

[0173] The holding capacities shown in Figures 6(A) and 6(B) are translucent and the number of gate wires To increase the resolution of the displayed image by increasing the number of pixels, even if the pixel dimensions are reduced, sufficient capacity is required. It can be obtained, and a high aperture ratio can be achieved.

[0174] This embodiment can be freely combined with other embodiments.

[0175] (Embodiment 5) In this embodiment, Figures 7 and 8 show examples in which the first heat treatment differs from that of Embodiment 1. Figures 7 and 8 are the same as Figures 1 and 2 except that the process differs in some parts, therefore the same parts are The same symbols are used, and detailed explanations of the same sections are omitted.

[0176] First, according to Embodiment 1, a translucent conductive film is applied to a substrate 400 having an insulating surface. After formation, gate electrode layers 401 and 451 are formed by a first photolithography process. ru.

[0177] Next, the first gate insulating layer 402a and the second gate insulating layer are placed on the gate electrode layers 401 and 451. This forms a layered structure of marginal layer 402b.

[0178] Next, a light-transmitting conductive film is formed on the second gate insulating layer 402b, and then the second The source electrode layer 455a and the drain electrode layer 455b are formed by a photolithography process. This is achieved (see Figure 7(A)). Note that Figure 7(A) is identical to Figure 1(A).

[0179] Next, the second gate insulating layer 402b, the source electrode layer 455a, and the drain electrode layer 45 On 5b, an oxide semiconductor film with a thickness of 2 nm to 200 nm is formed. The process is the same as in Embodiment 1.

[0180] Next, the oxide semiconductor film is dehydrated or dehydrated under an inert gas atmosphere or reduced pressure. Dehydration is performed. The temperature of the first heat treatment, in which dehydration or dehydrogenation is performed, is 350°C or higher and the base The temperature should be below the plate's strain point, preferably 400°C or higher, and below the substrate's strain point. Here, heating The substrate is introduced into an electric furnace, which is one of the processing devices, and the oxide semiconductor film is subjected to a nitrogen atmosphere. After heat treatment, the substrate is kept from being exposed to the atmosphere, thereby preventing water and hydrogen from entering the oxide semiconductor film. This prevents re-importation and reduces the resistance of the oxide semiconductor film by making it oxygen-deficient, i.e., N-type (N - , N + (etc.) Afterwards, high-purity oxygen gas, high-purity N2O gas, or ultra-drying gas are introduced into the same furnace. Cooling is performed by introducing air (with a dew point of -40°C or lower, preferably -60°C or lower). Oxygen gas Alternatively, it is preferable that the N2O gas does not contain water, hydrogen, etc. For example, a heat treatment apparatus. The purity of the oxygen gas or N2O gas introduced should preferably be 6N (99.9999%) or higher. 7N (99.99999%) or higher (i.e., the impurity concentration in oxygen gas or N2O gas) It is preferable to set the concentration to 1 ppm or less, preferably 0.1 ppm or less.

[0181] Furthermore, after the first heat treatment in which dehydration or dehydrogenation is performed, the temperature is preferably between 200°C and 400°C. Alternatively, at temperatures between 200°C and 300°C under an oxygen gas atmosphere, an N2O gas atmosphere, The heat treatment is performed in an ultra-dry air atmosphere (dew point of -40°C or lower, preferably -60°C or lower). You may go.

[0182] By going through the above process, the entire oxide semiconductor layer is made into an oxygen-rich state, To counteract, that is, to convert to type I.

[0183] As a result, the reliability of the thin-film transistors that are formed later can be improved.

[0184] Next, the oxide semiconductor film is transformed into an island-like oxide semiconductor layer by a photolithography process. The material is processed into ionized semiconductor layers 457 and 458 (see Figure 7(B)).

[0185] In this embodiment, an example is given in which dehydration or dehydrogenation is performed after the deposition of the oxide semiconductor film. As shown, but not limited to, the first heat treatment of the oxide semiconductor layer is an island-shaped oxide semiconductor layer This process can also be performed on oxide semiconductor films after they have been processed.

[0186] Furthermore, dehydration or dehydrogenation of oxide semiconductor films under an inert gas atmosphere or reduced pressure. After oxidation and cooling in an inert gas atmosphere, island-shaped oxidation is performed using a photolithography process. The oxide semiconductor layers 457 and 458, which are material semiconductor layers, are processed and then heated to over 200°C and 400°C. At a temperature of 200°C or higher, preferably 200°C to 300°C, under an oxygen gas atmosphere or N2O gas atmosphere. Under a dry atmosphere, or in an extremely dry air atmosphere (dew point of -40°C or lower, preferably -60°C or lower) Heat treatment may be performed as shown below.

[0187] Furthermore, before depositing the oxide semiconductor film, an inert gas atmosphere (nitrogen, or helium, neon, Under argon (or similar), in an oxygen atmosphere, or in ultra-dry air (with a dew point of -40°C or lower, preferably -60°C or lower). (Below) Heat treatment (400°C or higher, but below the strain point of the substrate) is performed in a controlled atmosphere or under reduced pressure. Impurities such as hydrogen and water contained within the insulating layer may be removed.

[0188] Next, a metal conductive film is formed on the second gate insulating layer 402b, and then the fourth photolithography is performed. A resist mask 436 is formed by a graphing process, and selective etching is performed to remove metal electrodes. It forms polar layer 435 (see Figure 7(C)).

[0189] Next, the resist mask 436 is removed, and the resist is removed by a fifth photolithography step. A mask 437 is formed, and selective etching is performed to remove the source electrode layer 405a and the drain. An electrode layer 405b is formed (see Figure 7(D)). The fifth photolithography process In this case, only a portion of the oxide semiconductor layer is etched, resulting in an oxide semiconductor with grooves (recesses). This results in layer 459.

[0190] Next, the resist mask 437 is removed, and the upper and side surfaces of the oxide semiconductor layer 458 are brought into contact with each other. The oxide insulating layer 407 forms a protective insulating film that contacts the groove (recess) of the oxide semiconductor layer 459. To accomplish.

[0191] Next, under an inert gas atmosphere, an oxygen gas atmosphere, or ultra-dry air (with a dew point of -40°C or lower) A second heat treatment (preferably 200°C or higher) is performed under an atmosphere (preferably below -60°C) for 40 minutes. Perform the process at temperatures below 0°C, for example, between 250°C and 350°C (see Figure 7(E)). For example, nitrogen A second heating treatment is performed at 250°C for 1 hour under controlled conditions.

[0192] Next, a protective insulating layer 408 is formed on the oxide insulating layer 407 (see Figure 7(F)).

[0193] Next, a planar insulating layer 409 is formed on the protective insulating layer 408.

[0194] Next, a sixth photolithography step is performed to form a resist mask and a planar insulating layer 4 09, the drain electrode layer 4 is formed by etching the protective insulating layer 408 and the oxide insulating layer 407. It forms a contact hole that reaches 55b.

[0195] Next, after removing the resist mask, a light-transmitting conductive film is deposited.

[0196] Next, a seventh photolithography step is performed to form a resist mask, and etching is performed. Unnecessary portions are removed to form the pixel electrode layer 456 and the conductive layer 406 (see Figure 8(A)). ).

[0197] Through the above process, using seven masks, thin-film transistors 471 and thin-film transistors are placed on the same substrate. The film transistors 461 can be fabricated separately as either a drive circuit or a pixel unit. Furthermore, the first gate insulating layer 402a and the second gate insulating layer 402b are used as dielectrics and capacitance The retaining capacitance formed by the wiring layer and the capacitive electrode can also be formed on the same substrate. The transistor 461 and the holding capacitor are arranged in a matrix corresponding to each individual pixel to form the pixel section. By arranging a drive circuit having a thin-film transistor 471 around the pixel area, It can be used as one of the substrates for fabricating an active matrix type display device.

[0198] By providing the conductive layer 406 in a position that overlaps with the channel formation region of the oxide semiconductor layer 459, This is a bias-thermal stress test (BT test) used to investigate the reliability of thin-film transistors. In this context, the change in threshold voltage of thin-film transistor 471 before and after BT testing was reduced. It is possible. Also, the conductive layer 406 may have the same potential as the gate electrode layer 401. They may be different, and can also function as a second gate electrode layer. The potential of layer 406 may be GND, 0V, or floating.

[0199] Furthermore, Figure 8(B1) shows channel etch type thin-film transistor 471, which is arranged in the drive circuit. This is a plan view, and Figure 8(A) is a cross-sectional view along the line C1-C2 in Figure 8(B1). Figure 8(C) is a cross-sectional view along the line C3-C4 in Figure 8(B1). Also, Figure 8(B2 ) is a plan view of a bottom-contact type thin-film transistor 461 arranged in a pixel, Figure Figure 8(A) is a cross-sectional view along the line D1-D2 in Figure 8(B2). Also, Figure 8(C) is a cross-sectional view. This is a cross-sectional view of line D3-D4 of 8(B2).

[0200] This embodiment can be freely combined with other embodiments.

[0201] (Embodiment 6) In this embodiment, an example of a process with fewer steps and photomasks than that of Embodiment 1 is shown. This is shown in Figures 9(A) to 9(E). Figures 9(A) to 9(E) show the same process as Figures 1 and 2. Since they are the same except for the differences in parts, the same symbols are used for the same parts, and the detailed explanation of the same parts is also included. (This part is omitted.)

[0202] First, according to Embodiment 1, a translucent conductive film is applied to a substrate 400 having an insulating surface. After formation, gate electrode layers 401 and 451 are formed by a first photolithography process. ru.

[0203] Next, the first gate insulating layer 402a and the second gate insulating layer are placed on the gate electrode layers 401 and 451. This forms a layered structure of marginal layer 402b.

[0204] Next, a light-transmitting conductive film is formed on the second gate insulating layer 402b, and then the second The source electrode layer 455a and the drain electrode layer 455b are formed by a photolithography process. This is achieved (see Figure 9(A)). Note that Figure 9(A) is identical to Figure 1(A).

[0205] Next, the second gate insulating layer 402b, the source electrode layer 455a, and the drain electrode layer 45 An oxide semiconductor film with a thickness of 2 nm to 200 nm is formed on 5b. This is an oxide semiconductor target containing In, Ga, and Zn with a diameter of 8 inches (In-Ga- Zn-O-based oxide semiconductor target (In2O3:Ga2O3:ZnO=1:1:1) Using the ratio of the number of cubic feet, the distance between the substrate and the target was set to 170 mm, the pressure to 0.4 Pa, and the direct current was set to 170 mm. DC power supply 0.5kW, oxygen only, argon only, or argon and oxygen atmosphere The film is then deposited. Using a pulsed DC power supply can reduce dust and ensure a more uniform film thickness distribution. This is preferable.

[0206] Next, the oxide semiconductor film is transformed into island-shaped oxide semiconductor layers by a third photolithography process. To process.

[0207] Next, the oxide semiconductor layer is dehydrated or dehydrogenated. The temperature of the heat treatment in step 1 is 350°C or higher and below the strain point of the substrate, preferably 400°C or higher. The substrate is kept below the strain point. Here, the substrate is introduced into an electric furnace, which is one of the heat treatment devices. After the oxide semiconductor layer is heat-treated in a nitrogen atmosphere, the substrate is exposed to the air. By preventing this, the re-importation of water and hydrogen into the oxide semiconductor layer is prevented, and oxide semiconductor layer 403, 4 Obtain 53 (see Figure 9(B)). Note that the steps up to this point are the same as in Embodiment 1.

[0208] Next, a metal conductive film is formed on the second gate insulating layer 402b, and then the fourth photolithography is performed. A resist mask 441 is formed by a graphing process, and the source is selectively etched. Electrode layer 405a and drain electrode layer 405b are formed (see Figure 9(C)). Selectively To perform etching, an alkaline etchant is used to obtain the state shown in Figure 9(C). It is possible. Materials for the metal conductive film include Al, Cr, Cu, Ta, Ti, Mo, and W. Elements selected from the above, or alloys containing the above elements, or combinations of the above elements There are alloys and the like. In this embodiment, the metal conductive film is a film thickness of 50 obtained by sputtering. A Ti film with a wavelength of 400 nm or more is used.

[0209] A Ti film is used as the metallic conductive film, and ammonia peroxide is used as the alkaline etchant. Using a mixture such as hydrogen oxide solution:ammonia solution:water (5:2:2), metal conductive films can be selectively removed. This leaves an oxide semiconductor layer made of In-Ga-Zn-O based oxide semiconductor. can.

[0210] Next, using the resist mask 441 as is, a portion of the oxide semiconductor layer is thinned to form a groove. An oxide semiconductor layer 433 having a (recess) is formed (see Figure 9(D)). During chipping, the thickness of the oxide semiconductor layer 453 becomes thinner, resulting in a thinned oxide semiconductor layer 44. The result is 2. Therefore, among the oxide semiconductor layer 453, the source electrode layer 405a and the drain electrode The film thickness in the region between layers 405b and the film thickness of the oxide semiconductor layer 442 are approximately the same. Thin-film transistors can be used as switching elements even without forming grooves (recesses) in the oxide semiconductor layer. If it functions as such, etching is not necessary, and etching is not performed. Of course, in this case, the film thickness of the oxide semiconductor layer 453 does not become thinner, and the same thin-film trace as in Embodiment 1 is achieved. A generator 460 is formed.

[0211] Next, the resist mask 441 is removed, and the top and side surfaces of the oxide semiconductor layer 442 are brought into contact with each other. The oxide insulating layer 407 forms a protective insulating film that contacts the grooves (recesses) of the oxide semiconductor layer 433. To accomplish.

[0212] Next, a second heat treatment (preferably 2) is performed under an inert gas atmosphere or an oxygen gas atmosphere. Perform the process at temperatures between 00°C and 400°C, for example, between 250°C and 350°C (see Figure 9(E)). .

[0213] Through the above process, the oxide semiconductor film after deposition is dehydrated or dehydrogenated. Heat treatment is performed to reduce resistance and selectively create an oxygen-rich state in a portion of it. The channel formation region 434, which overlaps with the gate electrode layer 401, becomes type I, and the source electrode layer 4 The first high-resistance drain region 431 overlaps with 05a, and the second overlaps with the drain electrode layer 405b The high-resistance drain region 432 of 2 is formed in a self-aligned manner. Also, the gate electrode layer 451 The channel-forming region 443 that overlaps with the other region is entirely type I.

[0214] Through the above process, thin-film transistors 470 and 440 are formed on the same substrate. Here, the oxide semiconductor layer 453 is the same as the oxide semiconductor layer 453 in Embodiment 1. If the film thickness is the same, the thin-film transistor 440 obtained in this embodiment is Compared to the thin-film transistor 460 of form 1, the oxide semiconductor layer 442 can be made thinner. The oxide semiconductor layer is preferably made with a thickness of 50 nm or less in order to maintain an amorphous state. In particular, in the channel etch type thin film transistor 470, the etch shown in Figure 9(D) It is preferable to make the film thickness of the channel formation region 433 after 30 nm or less. The channel formation region 443 of the thin-film transistor 440 is formed by etching as shown in Figure 9(D). The film thickness is also less than 30 nm. More specifically, the thin film trace fabricated in Figure 9(E) The film thickness of channel formation regions 443 and 434 of radiators 440 and 470 should be 5 nm to 20 nm. The following applies:

[0215] Furthermore, the channel width of the final fabricated thin-film transistor was between 0.5 μm and 10 μm. It is preferable to do so.

[0216] The subsequent steps are the same as in Embodiment 1, in which a protective insulating layer 408 and a planar insulating layer 409 are formed. After that, a contact hole is formed that reaches the drain electrode layer 455b, and the pixel electrode layer 456 And the conductive layer 406 is formed.

[0217] Through the above process, using six photomasks, thin-film transistors 470 are produced on the same substrate. The thin-film transistors 440 are fabricated separately for the drive circuit or the pixel section. This allows for the assignment of transistors with optimal structures onto the same substrate without increasing the number of manufacturing steps. This allows for the construction of various circuits.

[0218] This embodiment can be freely combined with other embodiments.

[0219] (Embodiment 7) Thin-film transistors are fabricated, and these thin-film transistors are used in the pixel section and further in the driving circuit. It is possible to fabricate semiconductor devices (also called display devices) that have display functions. A part or all of the drive circuit having a transistor is integrally formed on the same substrate as the pixel section, Stem-on-panel can be formed.

[0220] A display device includes display elements. Display elements include liquid crystal elements (also called liquid crystal display elements) and light-emitting elements. A light-emitting element (also called a light-emitting display element) can be used. The light-emitting element is activated by current or voltage. This category includes elements whose brightness is controlled, specifically inorganic EL (Electrical LEDs). This includes Luminescence elements, organic EL elements, etc. Also, electronic inks. Furthermore, display media in which the contrast changes due to electrical effects can also be applied.

[0221] Furthermore, the display device includes a panel in which the display elements are sealed, and a controller on the panel. It includes a module on which ICs and the like are mounted. Furthermore, it is a device for manufacturing the display device. In the process, the element substrate, which corresponds to one form before the display element is completed, supplies current to the display element. Each of the multiple pixels is provided with means for supplying power. Specifically, the element substrate is the pixel of the display element. It is acceptable to have only the electrodes formed, or to have the conductive film that will become the pixel electrode formed first. It may be the state before etching and forming the pixel electrodes, or any form may apply. I'm hooked.

[0222] In this specification, the term "display device" refers to an image display device, a display device, or an optical display device. This refers to the power source (including lighting equipment). It also refers to connectors, such as FPC (Flexible Printed Circuit). (inted circuit) or TAB (Tape Automated Bon) (ding) tape or TCP (Tape Carrier Package) Modules that have a printed circuit board attached to the end of the TAB tape or TCP. The display element or IC (integrated circuit board) is integrated using the COG (Chip On Glass) method. All modules in which the road is directly implemented are also included in the display device.

[0223] Figure 10 shows the external appearance and cross-section of a liquid crystal display panel, which is a form of semiconductor device. Let me explain. Figures 10(A1)(A2) show thin-film transistors 4010 and 4011, and liquid crystal. A sealing material 4005 is placed between the element 4013 and the first substrate 4001 and the second substrate 4006. Figure 10(B) is a plan view of the panel sealed by [a certain method], and Figure 10(A1)(A2) This corresponds to a cross-sectional view in MN.

[0224] The pixel section 4002 and the scanning line driving circuit 4004 are surrounded on the first substrate 4001. A sealing material 4005 is provided in this manner. Also, the pixel section 4002 and the scan line drive rotation A second substrate 4006 is provided on the path 4004. Therefore, the pixel section 4002 and the scanning The line drive circuit 4004 consists of the first substrate 4001, the sealing material 4005, and the second substrate 4006. It is sealed together with the liquid crystal layer 4008. Also, the seal on the first substrate 4001 A single crystal is placed on a separately prepared substrate in a region different from the area enclosed by material 4005. A signal line driving circuit 4003, formed from a semiconductor film or a polycrystalline semiconductor film, is mounted.

[0225] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG method, Wire bonding methods or TAB methods can be used. Figure 10(A1) This is an example of implementing the signal line drive circuit 4003 using the COG method, and Figure 10(A2) shows, This is an example of implementing the signal line drive circuit 4003 using the TAB method.

[0226] Furthermore, the pixel section 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001 are, It has multiple thin-film transistors, and in Figure 10(B), the thin film included in the pixel section 4002 Transistor 4010 and thin-film transistor 4011 included in scan line drive circuit 4004 The following is an example. A protective insulating layer 4020 is placed on thin-film transistors 4010 and 4011. A marginal layer 4021 is provided.

[0227] Thin-film transistors 4010 and 4011 have an oxide semiconductor layer as shown in Embodiments 1 to 6. Highly reliable thin-film transistors can be applied. Thin-film transistors for drive circuits As for st4011, thin-film transistors 470, 210, shown in Embodiments 1 to 6, 471. For the pixel thin-film transistor 4010, thin-film transistors 460 and 220 , 461 can be used. In this embodiment, thin-film transistors 4010, 4 011 is an n-channel thin-film transistor.

[0228] On the insulating layer 4021, the oxide semiconductor layer of the thin-film transistor 4011 for the drive circuit A conductive layer 4040 is provided in a position that overlaps with the channel formation region. The conductive layer 4040 is acid By placing it in a position that overlaps with the channel formation region of the synthetic semiconductor layer, before and after BT testing... This can reduce the change in the threshold voltage of the thin-film transistor 4011. The conductive layer 4040 may have the same potential as the gate electrode layer of the thin-film transistor 4011. They can be different, and can also function as a second gate electrode layer. Also, the conductive layer The potential of 4040 may be GND, 0V, or floating.

[0229] Furthermore, the pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin-film transistor 4010. They are electrically connected. And the counter electrode layer 4031 of the liquid crystal element 4013 is on the second substrate 40 Formed on 06. Pixel electrode layer 4030, counter electrode layer 4031, and liquid crystal layer 4008 The overlapping portion corresponds to the liquid crystal element 4013. Note that the pixel electrode layer 4030 and the opposite The electrode layer 4031 is provided with insulating layers 4032 and 4033, which function as alignment films. The liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033.

[0230] Furthermore, translucent substrates can be used as the first substrate 4001 and the second substrate 4006. Glass, ceramics, and plastics can be used. As for plastics... , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film, or acrylic resin film A film can be used.

[0231] Furthermore, 4035 is a columnar spacer obtained by selectively etching an insulating film. To control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 It is provided in [location]. A spherical spacer may also be used. Also, the counter electrode layer 4031 It is electrically connected to a common potential line provided on the same substrate as the thin-film transistor 4010. Using a common connection part, the opposing electrode layer 40 is connected via conductive particles placed between the pair of substrates. 31 and the common potential line can be electrically connected. Note that the conductive particles are the sealing material 40 It will be included in 05.

[0232] Alternatively, a liquid crystal exhibiting a blue phase without an alignment layer may be used. The blue phase is one of the liquid crystal phases. Yes, as the temperature of a cholesteric liquid crystal is increased, it transitions from the cholesteric phase to the isotropic phase. This is the phase that appears earlier. The blue phase appears within a relatively narrow temperature range, so the temperature range is modified. To improve the performance, a liquid crystal composition containing 5% or more by weight of a chiral agent is used for the liquid crystal layer 4008. It is used for the following purposes. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 1 mse Its c is short, and it is optically isotropic, so orientation processing is unnecessary, and it has low dependence on the viewing angle.

[0233] In addition to transmissive liquid crystal displays, this method can also be applied to semi-transmissive liquid crystal displays.

[0234] In addition, in liquid crystal displays, a polarizing plate is provided on the outside (viewing side) of the substrate, and a colored layer (color) is provided on the inside. The example shows the order of arrangement: filter, electrode layer used for display element, but the polarizing plate is on the inside of the substrate. It may also be provided in this embodiment. Furthermore, the laminated structure of the polarizing plate and the colored layer is not limited to this embodiment, and the polarizing plate Furthermore, the materials and manufacturing process conditions of the colored layer should be set appropriately. A light-shielding film that functions as a black matrix may be provided.

[0235] On thin-film transistors 4010 and 4011, an oxide semiconductor layer including a channel formation region is formed. A protective insulating layer 4020 is formed in contact with it. The protective insulating layer 4020 is shown in Embodiment 1. The oxide insulating layer 407 can be formed using the same materials and methods. To reduce surface irregularities, the structure is configured to cover the surface with an insulating layer 4021 that functions as a planarizing insulating film. Here, as the protective insulating layer 4020, the sputtering method is used in Embodiment 1. It forms a silicon oxide film.

[0236] Furthermore, a protective insulating layer is formed on the protective insulating layer 4020. The protective insulating layer is in Embodiment 1 It can be formed using the same materials and methods as the protective insulating layer 408 shown above. Here, protective insulating A silicon nitride film is formed as a layer using the RF sputtering method.

[0237] The insulating layer 4021 is made of the same material and method as the planar insulating layer 409 shown in Embodiment 1. It can be formed by the law, and includes polyimide, acrylic resin, benzocyclobutene resin, and polyam. Heat-resistant organic materials such as epoxy resin can be used. In addition to materials, low-dielectric constant materials (low-k materials), siloxane resins, and PSG (phosphorus glass) are also used. BPSG (Limboron glass), etc., can be used. The insulating layer 4021 may be formed by stacking multiple insulating films.

[0238] Siloxane-based resins are formed using siloxane-based materials as the starting material for Si-OS. This corresponds to a resin containing i-bonds. Siloxane resins use organic groups (e.g., alkyl groups) as substituents. Organic groups (such as aryl or aryl groups) may also be used. Furthermore, the organic group may contain a fluoro group.

[0239] The method for forming the insulating layer 4021 is not particularly limited and can be sputtered or SOG depending on the material. Spin coating, dip coating, spray coating, droplet ejection (inkjet method, screen coating) (Printing, offset printing, etc.) Roll coating method, curtain coating method, knife coating A firing process for the insulating layer 4021 and an aneating process for the oxide semiconductor layer can be used. By combining this function with that of a wire, it becomes possible to efficiently manufacture semiconductor devices.

[0240] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium oxide-containing indium tin oxide, indium tin oxide (ITO), indium zinc Translucent conductive materials such as oxides and indium tin oxide with added silicon dioxide. Materials can be used.

[0241] Furthermore, conductive polymers are used as the pixel electrode layer 4030 and the counter electrode layer 4031. It can be formed using a conductive composition containing (also known as). The resulting pixel electrodes have a sheet resistance of 10,000 Ω / □ or less and a light transmittance at a wavelength of 550 nm. It is preferable that the ratio is 70% or higher. The sheet resistance is preferably lower. Also, the guide It is preferable that the resistivity of the conductive polymer contained in the electrochemical composition is 0.1 Ω·cm or less. .

[0242] As the conductive polymer, so-called π-electron conjugated conductive polymers can be used. For example For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene Examples include derivatives thereof, or copolymers of two or more of these.

[0243] In addition, a separately formed signal line drive circuit 4003 and a scan line drive circuit 4004 or pixel unit 4 The various signals and potentials supplied to 002 are provided by the FPC4018.

[0244] Is the connection terminal electrode 4015 made of the same conductive film as the pixel electrode layer 4030 of the liquid crystal element 4013? The terminal electrode 4016 is formed from the source electrode layer and drain of the thin-film transistor 4011. It is formed from the same conductive film as the electrode layer.

[0245] The connecting terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. They are electrically connected.

[0246] Furthermore, in Figure 10, a signal line drive circuit 4003 is formed separately and implemented on the first substrate 4001. The example shown illustrates the configuration, but it is not limited to this setup. It may also apply to part of the signal line drive circuit or scanning. It is also possible to separately form and implement only a portion of the line drive circuit.

[0247] Figure 19 shows a semi-finished TFT substrate 2600 fabricated by the fabrication method disclosed herein. This shows an example of how a liquid crystal display module can be configured as a conductive device.

[0248] Figure 19 shows an example of a liquid crystal display module, in which the TFT substrate 2600 and the opposing substrate 2601 are The pixel portion 2603, which includes a TFT and the like, is fixed in place by a material 2602, and the liquid crystal layer is also included between them. A display element 2604 and a colored layer 2605 are provided to form a display area. Colored layer 2605 This is necessary for color display, and in the case of the RGB method, it corresponds to red, green, and blue. A colored layer is provided corresponding to each pixel. The TFT substrate 2600 and the opposing substrate 2601 Polarizing plates 2606, 2607, and 2613 are arranged on the outside. The light source is cold It consists of a cathode tube 2610 and a reflector 2611, and the circuit board 2612 is flexible The wiring circuit section 2608 of the TFT board 2600 is connected by the wire board 2609, and the control External circuits such as polarizing circuits and power supply circuits are incorporated. Also, between the polarizing plate and the liquid crystal layer The layers may be stacked with a phase difference plate in place.

[0249] The LCD display module has TN (Twisted Nematic) mode and IPS (I n-Plane-Switching) mode, FFS (Fringe Field Switching) (witching) mode, MVA (Multi-domain Vertical A) alignment) mode, PVA(Patterned Vertical Alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optically Compensated) Birefringence mode, FLC (Ferroelectric Liq uid Crystal) mode, AFLC(AntiFerroelectric L You can use modes such as iquid Crystal.

[0250] Through the above process, a highly reliable liquid crystal display panel can be manufactured as a semiconductor device. ru.

[0251] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. That is the case.

[0252] (Embodiment 8) An example of electronic paper as a form of semiconductor device is shown.

[0253] Electronic paper drives electronic ink using switching elements and electrically connected elements. - May be used for this purpose. Electronic paper is also called an electrophoretic display device (electrophoretic display). It has been discovered that it offers the same readability as paper, lower power consumption compared to other display devices, and a thin and light form factor. It has the advantage of making it possible to do so.

[0254] Electrophoretic displays can take various forms, but one involves a first particle with a positive charge. A microcapsule containing a child and a second particle having a negative charge is placed in a solvent or solute. It is a dispersed substance, and by applying an electric field to the microcapsules, micro Move the particles inside the capsule in opposite directions and display only the color of the particles that have gathered on one side. It is such that the first or second particle contains dye and, in the absence of an electric field, It does not move. Also, the color of the first particle and the color of the second particle are different (colorless). (Includes)

[0255] Thus, in electrophoretic displays, substances with high dielectric constants move to regions with high electric fields. This is a display that utilizes the so-called electrophoretic effect. Liquid crystal display devices do not require polarizing plates.

[0256] When the above microcapsules are dispersed in a solvent, it is called an electronic ink. This electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0257] Furthermore, the microphone is placed on the active matrix substrate, appropriately sandwiched between the two electrodes. By arranging multiple microcapsules, an active-matrix type display device can be completed. By applying an electric field to the cell, a display can be created. For example, the thin film of Embodiments 1 to 6 An active matrix substrate obtained by a transistor can be used.

[0258] Furthermore, the first and second particles in the microcapsules are made of conductive material, insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, electro A type of material selected from trochromic materials, magnetophoretic materials, or a composite material thereof Use it.

[0259] Figure 18 shows an active-matrix electronic paper as an example of a semiconductor device. The thin-film transistor 581 used in the device is the thin-film transistor shown in Embodiment 1. It can be fabricated in the same way as a transistor and is a highly reliable thin-film transistor containing an oxide semiconductor layer. The thin-film transistors shown in embodiments 2 to 6 are also used as the thin-film transistor 581 in this embodiment. It can also be applied.

[0260] Figure 18 shows an example of an electronic paper display using a twist ball display method. The Toball display method is an electrode layer that uses spherical particles painted in white and black as display elements. It is placed between the first electrode layer and the second electrode layer, and a potential difference is applied between the first electrode layer and the second electrode layer. This method of display is achieved by generating a phenomenon that controls the orientation of spherical particles.

[0261] The thin-film transistor 581 formed on the substrate 580 is a thin-film transistor with a bottom gate structure. It is covered by an insulating film 583 that is in contact with the semiconductor layer. Between substrate 580 and substrate 596 The source electrode layer or drain electrode layer of the thin-film transistor 581, which is sealed in between, The electrode layer 587 is in contact with the insulating film 583 and the insulating layer 585 through openings formed therein, and is electrically in contact. It continues between the first electrode layer 587 and the second electrode layer 588 formed on the substrate 596. The spherical particle 589 is provided, which includes a black region 590a and a white region 590b. The area surrounding the shaped particle 589 is filled with a filler material 595 such as resin. The first electrode layer 587 is defined The first electrode corresponds to the primary electrode, and the second electrode layer 588 corresponds to the common electrode. The second electrode layer 588 is thin It is electrically connected to a common potential line provided on the same substrate as the film transistor 581. Using the connecting portion, the second electrode layer is connected via conductive particles placed between substrates 580 and 596. 588 and the common potential line can be electrically connected.

[0262] Furthermore, instead of using twisted ball elements, electrophoretic elements can also be used. A transparent liquid containing positively charged white particles and negatively charged black particles, with a diameter of 1 Microcapsules of approximately 0 μm to 200 μm are used. Between the first electrode layer and the second electrode layer The microcapsules placed in between are subjected to an electric field by the first electrode layer and the second electrode layer. When this happens, the white and black particles move in opposite directions, resulting in either white or black being displayed. Yes, it is possible. An electrophoretic display element is a display element that applies this principle, and an electrophoretic display element is used The device is commonly called electronic paper. Electrophoretic display elements are liquid crystal display elements. Because it has a higher reflectivity than other lights, an auxiliary light is unnecessary, and it consumes less power and is dim. The display unit can be recognized even in location. Also, if power is not supplied to the display unit... Even if there is one, it is possible to retain the image once it has been displayed, so a semiconductor with a display function powered by a power supply When the device (also simply called a display device, or a semiconductor device equipped with a display device) is cut off Even if it doesn't exist, it will be possible to save the displayed image.

[0263] Through the above process, highly reliable electronic paper can be manufactured as a semiconductor device. .

[0264] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. That is the case.

[0265] (Embodiment 9) An example of a light-emitting display device is shown as a semiconductor device. The display elements of the display device are as follows: This is demonstrated using a light-emitting element that utilizes electroluminescence. Light-emitting devices that utilize luminescence depend on whether the light-emitting material is an organic compound or an inorganic compound. They are distinguished and generally referred to as organic EL elements and inorganic EL elements.

[0266] Organic EL elements emit electrons and holes from a pair of electrodes when a voltage is applied to the light-emitting element. Each of these is injected into a layer containing a luminescent organic compound, and an electric current flows through it. Then, these... The recombination of electrons and holes causes the luminescent organic compound to form an excited state. And when that excited state returns to the ground state, it emits light. From this mechanism, Such light-emitting devices are called current-excited light-emitting devices.

[0267] Inorganic electroluminescent (EL) elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements based on their element configuration. They are classified as such. Dispersive inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The luminescence mechanism utilizes donor and acceptor levels, and the donor-acceptor level is the key to this process. This is a receptor recombination type light emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. Furthermore, it has a structure where it is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. This is a localized light emission. Here, we will explain using an organic EL element as the light-emitting element. ru.

[0268] Figure 12 shows an example of a pixel configuration to which digital time-gradation driving can be applied as an example of a semiconductor device. This is a diagram.

[0269] This section describes the pixel configuration and operation to which digital time-based gradation driving can be applied. This uses an n-channel transistor with an oxide semiconductor layer as the channel formation region as one pixel. Here are two examples of its use.

[0270] Pixel 6400 includes a switching transistor 6401 and a light-emitting element driving transistor 6 It has 402, a light-emitting element 6404 and a capacitive element 6403. Switching Transistor STA 6401 has its gate connected to scan line 6406, and the first electrode (source electrode and drain) is connected to the first electrode (source electrode and drain). One electrode is connected to signal line 6405, and the other electrode (source electrode and drain electrode) is connected to the second electrode (source electrode and drain electrode). The (direction) is connected to the gate of the light-emitting element driving transistor 6402. The gate of transistor 6402 is connected to the power line 6407 via the capacitive element 6403. The first electrode is connected to the power line 6407, and the second electrode is connected to the first electrode (pixel) of the light-emitting element 6404. It is connected to the electrodes. The second electrode of the light-emitting element 6404 corresponds to the common electrode 6408. The common electrode 6408 is electrically connected to a common potential line formed on the same substrate.

[0271] Furthermore, a low power supply potential is set for the second electrode (common electrode 6408) of the light-emitting element 6404. The low power supply potential is defined as the low power supply potential set on power line 6407 relative to the high power supply potential. The potential is the potential that satisfies the high power supply potential, and low power supply potentials include, for example, GND and 0V. It may be fixed. The potential difference between this high power supply potential and the low power supply potential is applied to the light-emitting element 6404. Then, in order to pass current through the light-emitting element 6404 and make the light-emitting element 6404 emit light, a high power supply potential is used. The potential difference between the low power supply potential and the light-emitting element 6404 is set to be greater than or equal to the forward threshold voltage of the light-emitting element 6404. Set the potential for each.

[0272] Furthermore, the capacitive element 6403 substitutes for the gate capacitance of the light-emitting element driving transistor 6402. This can be omitted. Regarding the gate capacitance of the luminescent element driver transistor 6402. A capacitance may be formed between the channel region and the gate electrode.

[0273] Here, in the case of a voltage input voltage drive method, the gate of the light-emitting element drive transistor 6402 The system has two options: either the light-emitting element drive transistor 6402 is sufficiently on, or it is sufficiently off. Input a video signal that results in the state. In other words, the 6402 transistor for driving the light-emitting element. It operates in the linear region. The light-emitting element driver transistor 6402 operates in the linear region. Therefore, a voltage higher than the voltage of the power line 6407 is used to power the transistor 6402 for driving the light-emitting element. Apply to the circuit. Note that the signal line 6405 has (power line voltage + transistor for driving light-emitting element) Apply a voltage greater than or equal to the Vth of the 6402.

[0274] Furthermore, when using analog gradation drive instead of digital time gradation drive, the signal input is different. By doing so, the same pixel configuration as in Figure 12 can be used.

[0275] When performing analog grayscale driving, the gate of the light-emitting element driving transistor 6402 is connected to the light-emitting element. Apply the forward voltage of the 6404 + a voltage greater than or equal to Vth of the 6402 transistor used to drive the light-emitting element. The forward voltage of the light-emitting element 6404 refers to the voltage required to achieve the desired brightness, and is small. At the very least, it is greater than the forward threshold voltage. Note that the luminescent element driver transistor 6402 By inputting a video signal that operates in the saturation region, current flows to the light-emitting element 6404. This is possible. In order to operate the light-emitting element driving transistor 6402 in the saturation region, The potential of the source wire 6407 is higher than the gate potential of the light-emitting element driving transistor 6402. By converting the video signal to analog, the light-emitting element 6404 receives a current corresponding to the video signal. It can perform flow and analog gradation driving.

[0276] Note that the pixel configuration shown in Figure 12 is not limited to this. For example, if new pixels are added to the pixels shown in Figure 12... Switches, resistors, capacitives, transistors, or logic circuits may be added to it.

[0277] Next, the configuration of the light-emitting element will be explained using Figure 13. Here, the light-emitting element driver T The cross-sectional structure of a pixel will be explained using the case where the FT is n-type as an example. Figure 13(A)(B) TFT7001 and 7011 are light-emitting drive TFTs used in semiconductor devices (C). 7021 can be fabricated in the same way as the thin-film transistors arranged in the pixels shown in Embodiment 1. This is a highly reliable thin-film transistor containing an oxide semiconductor layer. Also, Embodiments 2 to The thin-film transistors placed in the pixels indicated by 6 are TFT7001, 7011, and 7021. It can also be applied in this way.

[0278] A light-emitting element only needs to have at least one of its electrodes, either the anode or the cathode, transparent in order to extract light. Then, a thin-film transistor and a light-emitting element are formed on the substrate, and light is emitted from the side opposite to the substrate. This includes top-side emission, bottom-side emission which extracts light from the substrate side, and on the substrate side and the opposite side of the substrate. There is a light-emitting element with a double-sided emission structure that extracts light from the side surface, and the pixel configuration is which emission structure It can also be applied to optical elements.

[0279] The light-emitting element with an upper surface injection structure will be explained using Figure 13(A).

[0280] Figure 13(A) shows that the TFT7001, which is a driving TFT placed in the pixel, is of n type, and the light-emitting element The diagram shows a cross-sectional view of the pixel when light emitted from sub-pixel 7002 passes through to the anode 7005. In 13(A), the cathode 7003 of the light-emitting element 7002 and the driving TFT placed in the pixel are The TFT7001 is electrically connected, with the light-emitting layer 7004 on the cathode 7003 and the anode 7 The 005 elements are stacked in order. The cathode 7003 has a small work function and also reflects light. A variety of materials can be used for conductive films. For example, Ca, Al, MgAg, Al Li is preferable. And even if the light-emitting layer 7004 is composed of a single layer, multiple layers are preferable. It doesn't matter whether it's constructed in layers or not. If it's composed of multiple layers, shadow On pole 7003, an electron injection layer, electron transport layer, light emission layer, hole transport layer, and hole injection layer are stacked in that order. Layers are added. Note that it is not necessary to provide all of these layers. The anode 7005 is a conductive material with light transmission. Formed using materials such as indium oxide containing tungsten oxide, tungsten oxide Indium zinc oxide containing titanium oxide, indium oxide containing titanium oxide, titanium oxide containing Indium tin oxide, indium tin oxide, indium zinc oxide, silicon oxide added. A transparent conductive film such as indium tin oxide may also be used.

[0281] Furthermore, between cathode 7003 and the cathode 7008 of the adjacent pixel, partitions cover each end. A 7009 partition wall will be installed. The partition wall 7009 will be made of polyimide, acrylic resin, polyamide, epoxy. Formed using an organic resin film such as a resin, an inorganic insulating film, or polysiloxane. (Partition 7009) In particular, a photosensitive resin material is used, and the side surface of the partition wall 7009 is formed with a continuous curvature. It is preferable to form it so that it becomes an inclined surface. A photosensitive resin material is used as the partition wall 7009. When used, the step of forming a resist mask can be omitted.

[0282] The region between the cathode 7003 and the anode 7005, which sandwiches the light-emitting layer 7004, is the light-emitting element 7002. It corresponds to the pixel shown in Figure 13(A), where the light emitted from the light-emitting element 7002 is the arrow. As indicated by the mark, inject towards the anode 7005 side.

[0283] Next, the light-emitting element with a bottom-extrusion structure will be explained using Figure 13(B). For driving the light-emitting element. TFT7011 is n-type, and the light emitted from the light-emitting element 7012 is projected towards the cathode 7013. The cross-sectional view of the pixel in this case is shown. Figure 13(B) shows the light-emitting element driving TFT7011 and the On a gas-connected translucent conductive film 7017, the cathode 7013 of the light-emitting element 7012 A film is formed, and the light-emitting layer 7014 and anode 7015 are sequentially stacked on the cathode 7013. Furthermore, if the anode 7015 is translucent, light should be reflected or blocked so as to cover the anode. A shielding film 7016 may be formed to block the cathode. The cathode 7013 is as shown in Figure 13(A). As with the previous case, various materials can be used as long as they are conductive materials with a small work function. However, the film thickness should be such that it transmits light (preferably around 5 nm to 30 nm). Example For example, an aluminum film with a thickness of 20 nm can be used as the cathode 7013. And the light-emitting layer 7014, as in Figure 13(A), is composed of a single layer, but multiple It is acceptable whether the layers are stacked or not. The anode 7015 transmits light. Although not necessary, it is formed using a translucent conductive material, similar to Figure 13(A). This is possible. And the shielding film 7016 can be made of, for example, a light-reflecting metal. The method is not limited to metal films. For example, a resin with black pigment added can also be used.

[0284] The region between the cathode 7013 and anode 7015, sandwiching the light-emitting layer 7014, is the light-emitting element 7012. This corresponds to the pixel shown in Figure 13(B), where the light emitted from the light-emitting element 7012 is As indicated by the arrow, the material is injected towards the cathode 7013.

[0285] Furthermore, between the conductive film 7017 and the conductive film 7018 of the adjacent pixel, the edges of each film are covered. A partition wall 7019 is provided. The partition wall 7019 is made of polyimide, acrylic resin, polyamide, epoxy It is formed using an organic resin film such as xylene, an inorganic insulating film, or polysiloxane. Partition wall 70 19 is formed using a particularly photosensitive resin material, with the sides of the partition wall 7019 having a continuous curvature. It is preferable to form it so that it becomes an inclined surface. A photosensitive resin material is used as the partition wall 7019. When using this material, the step of forming a resist mask can be omitted.

[0286] Next, a light-emitting element with a double-sided injection structure will be explained using Figure 13(C). Figure 13(C) Next, the light-transmitting conductive film 702 is electrically connected to the light-emitting element driving TFT 7021. A cathode 7023 of the light-emitting element 7022 is deposited on 7, and the light-emitting layer 7 is on the cathode 7023. 024 and the anode 7025 are stacked in order. The cathode 7023 is the same as in Figure 13(A). Similarly, various materials can be used as long as they are conductive materials with a small work function. However, The film thickness should be such that it transmits light. For example, Al with a film thickness of 20 nm is used as cathode 702 It can be used as 3. And the light-emitting layer 7024 is single, as in Figure 13(A). It doesn't matter whether it's composed of layers or multiple layers stacked on top of each other. The anode 7025 is formed using a light-transmitting conductive material, similar to Figure 13(A). It is possible.

[0287] Furthermore, between the conductive film 7027 and the conductive film 7028 of the adjacent pixel, the respective edges are covered. A partition wall 7029 is provided. The partition wall 7029 is made of polyimide, acrylic resin, polyamide, epoxy It is formed using an organic resin film such as xylene, an inorganic insulating film, or polysiloxane. Partition wall 70 29 is formed using a particularly photosensitive resin material, with the sides of the partition wall 7029 having a continuous curvature. It is preferable to form it so that it becomes an inclined surface. A photosensitive resin material is used as the partition wall 7029. When using this material, the step of forming a resist mask can be omitted.

[0288] The portion where the cathode 7023, the light-emitting layer 7024, and the anode 7025 overlap is the light-emitting element 70 This corresponds to 22. In the case of the pixel shown in Figure 13(C), the light emitted from the light-emitting element 7022 As indicated by the arrows, the material is injected into both the anode 7025 side and the cathode 7023 side.

[0289] Here, we have discussed organic EL elements as light-emitting elements, but inorganic EL elements can also be used as light-emitting elements. It is also possible to incorporate an L element.

[0290] Furthermore, a thin-film transistor (TFT for driving light-emitting elements) and a light-emitting element are used to control the driving of the light-emitting element. An example of an electrically connected TFT is shown, but a current control TFT is connected between the driving TFT and the light-emitting element. It is also acceptable to have a configuration where FT is connected.

[0291] The semiconductor device is not limited to the configuration shown in Figure 13, but is disclosed herein. Various modifications are possible based on the technical concept.

[0292] Next, the appearance of a light-emitting display panel (also called a light-emitting panel), which corresponds to a form of semiconductor device, and The cross-section will be explained using Figure 11. Figure 11(A) shows a thin layer formed on the first substrate. A panel in which a film transistor and a light-emitting element are sealed between a second substrate and a sealing material. This is a plan view, and Figure 11(B) corresponds to the cross-sectional view at HI in Figure 11(A).

[0293] Pixel section 4502, signal line driving circuit 4503a, 450 provided on the first substrate 4501 3b, and the scan line drive circuits 4504a and 4504b are surrounded by a sealing material 4505 A pixel unit 4502, signal line driving circuits 4503a, 4503b, and A second substrate 4506 is provided on top of the scan line driving circuits 4504a and 4504b. The pixel section 4502, signal line driving circuits 4503a, 4503b, and scan line driving circuit 45 04a and 4504b consist of a first substrate 4501, a sealing material 4505, and a second substrate 4506. It is sealed together with the filler 4507. Highly dense protective film with minimal degassing (laminated film, UV-curing resin film) It is preferable to package (seal) the product with a cover material such as a linoleum.

[0294] Also provided on the first substrate 4501 are the pixel section 4502, the signal line driving circuit 4503a, 4 503b, and the scan line driving circuits 4504a and 4504b have multiple thin-film transistors. In Figure 11(B), the thin-film transistor 4510 included in the pixel section 4502 and the signal The thin-film transistor 4509 included in the wire drive circuit 4503a is shown as an example.

[0295] Thin-film transistors 4509 and 4510 have an oxide semiconductor layer as shown in Embodiments 1 to 6. A highly reliable thin-film transistor can be applied. The thin film is placed in the drive circuit. As for transistor 4509, the thin-film transistor 470 shown in Embodiments 1 to 5, 210, 240, 471, and thin-film transistor 4510 arranged in the pixels are thin-film transistor Rangistas 460, 220, and 461 can be used. In this embodiment, thin film Transistors 4509 and 4510 are n-channel thin-film transistors.

[0296] On the insulating layer 4544, the oxide semiconductor layer of the thin-film transistor 4509 for the drive circuit A conductive layer 4540 is provided in a position that overlaps with the channel formation region. The conductive layer 4540 is oxidized. By placing it in a position that overlaps with the channel formation region of the semiconductor layer, before and after BT testing This can reduce the change in the threshold voltage of the thin-film transistor 4509. The potential of the electrode layer 4540 may be the same as that of the gate electrode layer of the thin-film transistor 4509, or it may be different. It may also function as a second gate electrode layer. The potential of 540 may be GND, 0V, or floating.

[0297] Thin-film transistors 4509 and 4510 include a channel-forming region as a protective insulating film. An insulating layer 4543 is formed in contact with the semiconductor layer. The insulating layer 4543 is shown in Embodiment 1. The oxide insulating layer 407 can be formed using the same materials and methods as described above. To reduce surface irregularities, the structure is configured to cover the surface with an insulating layer 4545 that functions as a planar insulating film. Here, as an insulating layer, a silicon oxide film is formed by sputtering using Embodiment 1. It forms.

[0298] Furthermore, a protective insulating layer 4547 is formed on the insulating layer 4543. The protective insulating layer 4547 is The protective insulating layer 408 shown in Embodiment 1 may be formed using the same materials and methods. A silicon nitride film is formed as a protective insulating layer 4547 by RF sputtering.

[0299] The insulating layer 4545 is made of the same material and method as the planar insulating layer 409 shown in Embodiment 1. It can be formed according to the law. Here, acrylic resin is used as the insulating layer 4545.

[0300] Furthermore, 4511 corresponds to a light-emitting element, and the first electrode is a pixel electrode of the light-emitting element 4511. Layer 4517 is electrically connected to the source electrode layer or drain electrode layer of the thin-film transistor 4510. It is connected to the following. The configuration of the light-emitting element 4511 is a first electrode layer 4517 and an electroluminescent layer The structure is a stacked structure of 4512 and a second electrode layer 4513, but is not limited to the configuration shown. The configuration of the light-emitting element 4511 is changed as appropriate to match the direction of the light extracted from the element 4511. It is possible.

[0301] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or polysiloxane. Using a photosensitive material, an opening is formed on the first electrode layer 4517, and the side walls of the opening are connected It is preferable to form the inclined surface with a continuous curvature.

[0302] Even if the electroluminescent layer 4512 consists of a single layer, it is configured to be stacked with multiple layers. It's fine either way.

[0303] To prevent oxygen, hydrogen, water, carbon dioxide, etc. from entering the light-emitting element 4511, the second electrode layer 4 A protective film may be formed on 513 and the partition wall 4520. The protective film may be a silicon nitride film, a nitride film, or a nitride film. It can form silicon oxide films, DLC films, and the like.

[0304] Also, signal line drive circuits 4503a, 4503b and scan line drive circuits 4504a, 4504b The various signals and potentials applied to the pixel section 4502 are FPC4518a, 4518 It is supplied by b.

[0305] The connection terminal electrode 4515 has the same conductive film as the first electrode layer 4517 of the light-emitting element 4511. Formed from, the terminal electrode 4516 has a source electrode layer and It is formed from the same conductive film as the drain electrode layer.

[0306] The connecting terminal electrode 4515 is connected to the terminal of FPC4518a via the anisotropic conductive film 4519. They are electrically connected.

[0307] The second substrate located in the direction of light extraction from the light-emitting element 4511 must be translucent. No. In that case, glass plate, plastic plate, polyester film or acrylic A light-transmitting material, such as a film, is used.

[0308] Furthermore, in addition to inert gases such as nitrogen and argon, UV-curable resin can also be used as the filler 4507. Oil or thermosetting resin can be used, such as PVC (polyvinyl chloride) or acrylic resin. Fat, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (a copolymer of ethylene and vinyl acetate) can be used. For example, filling. Nitrogen can be used as the material.

[0309] Furthermore, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plate) may be placed on the emission surface of the light-emitting element. You may also appropriately incorporate optical films such as phase difference plates (λ / 4 plate, λ / 2 plate) and color filters. Furthermore, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, by the surface irregularities An anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0310] Furthermore, the signal line drive circuit alone or partially, or the scan line drive circuit alone or partially, may be used separately. The configuration may be modified and implemented as shown in Figure 11, and is not limited to that shown.

[0311] Through the above process, a highly reliable light-emitting display device (display panel) is manufactured as a semiconductor device. It is possible.

[0312] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. That is the case.

[0313] (Embodiment 10) In this embodiment, at least a part of the drive circuit and a thin film to be placed in the pixel area are placed on the same substrate. An example of how to fabricate a lunger is described below.

[0314] The thin-film transistors placed in the pixel area are according to Embodiment 1, Embodiment 5, or Embodiment Formed according to 6. Furthermore, the thin-film transistors shown in Embodiments 1 to 6 are n-channel type. Since it is a TFT, the drive circuit can be composed of n-channel TFTs. A portion of the circuit is formed on the same substrate as the thin-film transistors in the pixel section.

[0315] An example of a block diagram of an active-matrix display device is shown in Figure 14(A). On the substrate 5300 are a pixel section 5301, a first scan line drive circuit 5302, and a second scan line drive circuit. It has a motion circuit 5303 and a signal line drive circuit 5304. The pixel section 5301 has multiple signal lines The signal line drive circuit 5304 extends and is arranged, and multiple scan lines are connected to the first scan line drive circuit 5302, and the second scan line drive circuit 5303 are arranged as extensions. In the intersection region of the signal line, pixels, each having a display element, are arranged in a matrix. Furthermore, the substrate 5300 of the display device is FPC (Flexible Printed Circuit Board). The timing control circuit 5305 (controller, control I) is connected via a connection part such as rcuit. (Also known as C) It is connected.

[0316] Figure 14(A) shows the first scan line drive circuit 5302, the second scan line drive circuit 5303, and The line drive circuit 5304 is formed on the same substrate 5300 as the pixel section 5301. Furthermore, since the number of external components such as drive circuits is reduced, costs can be lowered. Furthermore, when a drive circuit is provided outside the circuit board 5300, extending the wiring at the connection point can cause problems. This can reduce the number of connections, leading to improved reliability or yield.

[0317] The timing control circuit 5305 is, for example, related to the first scan line drive circuit 5302. Then, the start signal (GSP1) (also called the start pulse) for the first scan line drive circuit is sent, It supplies the clock signal (GCK1) for the probe drive circuit. Also, the timing control circuit 530 5 is a second scan line drive circuit 5303, and as an example, a second scan line drive circuit 5303 It supplies the clock signal (GSP2) and the clock signal (GCK2) for the scan line drive circuit. The drive circuit 5304 receives a start signal (SSP) for the signal line drive circuit and a crossover signal for the signal line drive circuit. SCK signal, video signal data (DATA) (also simply called video signal), A clock signal (LAT) shall be supplied. Each clock signal shall consist of multiple signals with different periods. It can be a clock signal, or it can be supplied along with an inverted clock signal (CKB). It may also be a first scan line drive circuit 5302 and a second scan line drive circuit 53 It is possible to omit either 03 or 03.

[0318] Figure 14(B) shows the first scan line drive circuit 5302 and the second scan line drive circuit 5303. The signal line drive circuit 5304 is formed on the same substrate 5300 as the element unit 5301, and the pixel unit 5301 is connected to the signal line drive circuit 5304. This shows a configuration formed on a separate substrate.

[0319] Furthermore, the thin-film transistors shown in Embodiments 1 to 6 are n-channel type TFTs. Figure 1 Figures 5(A) and 15(B) show the configuration and operation of a signal line driving circuit composed of n-channel TFTs. I will explain this by giving an example.

[0320] The signal line driving circuit includes a shift register 5601 and a switching circuit 5602. Switching circuit 5602 is a switching circuit 5602_1~5602_N (where N is natural). It has multiple circuits, each of which is called a number. Switching circuits 5602_1 to 5602_N are, , multiple transistors called thin-film transistors 5603_1~5603_k (where k is a natural number) It has a thin-film transistor 5603_1~5603_k, which is an N-channel type TFT. Let me explain an example.

[0321] The connection relationships of the signal line drive circuit will be explained using the switching circuit 5602_1 as an example. The first terminals of thin-film transistors 5603_1 to 5603_k are connected to wiring 5604_1, respectively. Connected to ~5604_k. Second terminal of thin-film transistor 5603_1~5603_k These are connected to signal lines S1~Sk, respectively. Thin-film transistors 5603_1~5603_ The gate of k is connected to wiring 5605_1.

[0322] The shift register 5601 sequentially supplies high levels (high signals) to the wiring 5605_1 to 5605_N. It outputs a signal at a high power supply potential level, also known as the switching circuit 5602_1~56 It has the function of selecting 02_N in order.

[0323] The switching circuit 5602_1 has a continuity state between the wiring 5604_1 and the signal line S1 (first terminal The function controls the conductivity between the child and the second terminal, i.e., the potential of the wiring 5604_1 is controlled by the signal line S1 It has a function to control whether or not to supply to it. Thus, the switching circuit 5602_1 It functions as a selector. Similarly, thin-film transistors 5603_2~5603 _k controls the continuity state between the wiring 5604_2~5604_k and the signal lines S2~Sk, respectively. The function is to supply the potential of wiring 5604_2~5604_k to signal lines S2~Sk. It has the ability. Thus, thin-film transistors 5603_1 to 5603_k each have the ability to switch It functions as a switch.

[0324] Note that wiring 5604_1 to 5604_k each contain video signal data (DATA). The input is video signal data (DATA), which is image information or analog corresponding to the image signal. It is often a G signal.

[0325] Next, regarding the operation of the signal line drive circuit in Figure 15(A), see the timing chart in Figure 15(B). Refer to the explanation. Figure 15(B) shows signals Sout_1 to Sout_N, and signals An example of Vdata_1 to Vdata_k is shown. Signals Sout_1 to Sout_N are each The following is an example of the output signals of the shift register 5601, with signals Vdata_1 to Vdata _k represents an example of a signal input to wiring 5604_1~5604_k. One operating period of the signal line drive circuit corresponds to one gate selection period in the display device. The selection period is divided into, for example, periods T1 to TN. Periods T1 to TN are each , a period for writing video signal data (DATA) to pixels belonging to the selected row be.

[0326] Note that the signal waveform distortions, etc., of each configuration shown in the drawings, etc. of this embodiment are for clarity. The figures may be exaggerated for aesthetic reasons. Therefore, they are not necessarily limited to that scale. It should be noted that...

[0327] During periods T1 to TN, the shift register 5601 receives a high-level signal via wiring 560 Outputs are sent sequentially from 5_1 to 5605_N. For example, during period T1, shift register 5 601 outputs a high-level signal to wiring 5605_1. Then the thin-film transistor... Since 5603_1~5603_k will be turned on, the wiring 5604_1~5604_k and signal Lines S1 to Sk become conductive. At this time, wiring 5604_1 to 5604_k are Data(S1) to Data(Sk) are entered. Each of these belongs to the selected row via thin-film transistors 5603_1 to 5603_k. Of the pixels, the data is written to the pixels in columns 1 through k. In this way, during the period T1 to TN... Then, the video signal data (DATA) is sequentially placed in k columns for each pixel belonging to the selected row. It will be written.

[0328] As described above, video signal data (DATA) is written to pixels in multiple columns. This allows for a reduction in the number of video signal data (DATA) or the number of wires. Therefore, the number of connections to external circuits can be reduced. Also, the video signal is displayed in multiple columns. By writing directly, the writing time can be extended, and the video signal can be written. This can prevent overcrowding and under-storage.

[0329] Note that the shift register 5601 and the switching circuit 5602 are as described in Embodiment 1. It is possible to use a circuit composed of thin-film transistors as shown in Embodiment 6.

[0330] A form of shift register used in part of a scan line drive circuit and / or signal line drive circuit. This will be explained using Figures 14 and 15.

[0331] The scan line drive circuit has a shift register. In some cases, it also has a level shifter. It may have a ff, etc. In a scan line driving circuit, a clock signal is input to the shift register. A selection signal is generated when the (CLK) and start pulse signal (SP) are input. The generated selection signal is buffered and amplified in a buffer and supplied to the corresponding scan line. The scan line is connected to the gate electrode of the transistor for one pixel line. Therefore, the transistors of the pixels for one line must be turned ON all at once, so buff A component capable of carrying a large current is used.

[0332] A form of shift register used in part of a scan line drive circuit and / or signal line drive circuit. This will be explained using Figures 16 and 17.

[0333] For the shift registers of the scan line drive circuit and signal line drive circuit, refer to Figures 16 and 17. Let me explain. The shift register is a first pulse output circuit 10_1 to the Nth pulse output circuit The path 10_N (where N is a natural number greater than or equal to 3) has a path (see Figure 16(A)). The first pulse output circuit 10_1 to the Nth pulse output circuit 10_N of the shift register shown. The first clock signal CK1 is received from the first wiring 11, and the second clock signal is received from the second wiring 12. Clock signal CK2 is transmitted from the third wire 13 to the third clock signal CK3 is transmitted from the fourth wire 14 to the fourth The clock signal CK4 is supplied. Also, in the first pulse output circuit 10_1, the fifth distribution The start pulse SP1 (first start pulse) from line 15 is input. Also, the second stage In the subsequent nth pulse output circuit 10_n (where n is a natural number between 2 and N), the previous stage The signal from the pulse output circuit (referred to as the pre-stage signal OUT(n-1)) is input. Also, the first In the pulse output circuit 10_1, the signal from the third pulse output circuit 10_3, which is two stages later, It is input. Similarly, in the nth pulse output circuit 10_n of the second stage and beyond, the second stage after the nth ( The signal from the pulse output circuit 10_(n+2) of n+2 (the subsequent signal OUT(n+2) (u) is input. Therefore, from the pulse output circuit of each stage, the subsequent and / or two stages prior The first output signal OUT(1)(SR)~OUT(N)( for input to the pulse output circuit SR), the second output signals OUT(1)~OUT(N), which are input to another circuit, are output. However, as shown in Figure 16(A), the last two stages of the shift register have Because the stage signal OUT(n+2) is not input, for example, a separate second start pulse The configuration should involve inputting SP2 and a third start pulse, SP3.

[0334] The clock signal (CK) alternates between high and low levels (L signal, low power supply potential) at regular intervals. This is a signal that repeats the same values ​​(also called the level). Here, the first clock signal (CK1) to the second... The four clock signals (CK4) are sequentially delayed by 1 / 4 period (i.e., 90 to each other). °The phase is shifted). In this embodiment, the first clock signal (CK1) to the fourth clock signal The clock signal (CK4) is used to control the drive of the pulse output circuit, etc. The signal may be GCK or SCK depending on the input drive circuit, but here it is C I will explain using the term K.

[0335] Figure 16(B) shows one of the pulse output circuits 10_n shown in Figure 16(A). The first input The power terminal 21, the second input terminal 22, and the third input terminal 23 are connected to the first wiring 11 to the fourth wiring It is electrically connected to one of the lines 14. For example, in Figure 16(A), the first part The output circuit 10_1 has a first input terminal 21 that is electrically connected to the first wiring 11, and The second input terminal 22 is electrically connected to the second wiring 12, and the third input terminal 23 is connected to the third wiring It is electrically connected to line 13. Also, the second pulse output circuit 10_2 is connected to the first input Terminal 21 is electrically connected to the second wiring 12, and the second input terminal 22 is connected to the third wiring 13. They are electrically connected, with the third input terminal 23 being electrically connected to the fourth wiring 14.

[0336] Each of the first pulse output circuits 10_1 to the Nth pulse output circuits 10_N has a first input terminal Child 21, second input terminal 22, third input terminal 23, fourth input terminal 24, fifth input terminal Assume that it has a child 25, a first output terminal 26, and a second output terminal 27 (see Figure 16(B)). (See). In the first pulse output circuit 10_1, the first clock signal is connected to the first input terminal 21. When signal CK1 is input, the second clock signal CK2 is input to the second input terminal 22, and the third The third clock signal CK3 is input to input terminal 23, and the start signal is input to the fourth input terminal 24. A pulse is input, and the subsequent signal OUT(3) is input to the 5th input terminal 25, and the 1st output The first output signal OUT(1)(SR) is output from terminal 26, and the second output terminal 27 This indicates that the second output signal, OUT(1), is being output.

[0337] The first pulse output circuit 10_1 to the Nth pulse output circuit 10_N are 3-terminal thin film In addition to transistors (also known as TFT: Thin Film Transistors), The four-terminal thin-film transistor described in the above embodiment can be used. Figure 16(C) The symbol for the 4-terminal thin-film transistor 28 described in the above embodiment is shown below. The symbol for the thin-film transistor 28 shown in 16(C) is one of any of the embodiments 1 to 5 described above. This refers to the 4-terminal thin-film transistor explained in section 1, and will be used in diagrams and other materials from now on. In this specification, a thin-film transistor has two gate electrodes separated by a semiconductor layer. In this case, the gate electrode below the semiconductor layer is called the lower gate electrode, and the gate electrode above the semiconductor layer is called the lower gate electrode. The upper gate electrode is also called the lower gate electrode. The thin-film transistor 28 has an input to the lower gate electrode. The first control signal G1 and the second control signal G2 input to the upper gate terminal are used. It is an element that can perform electrical control between the In terminal and the Out terminal.

[0338] When oxide semiconductors are used in the semiconductor layer including the channel formation region of a thin-film transistor, manufacturing Depending on the process, the threshold voltage may shift to the negative or positive side. Therefore, in thin-film transistors that use oxide semiconductors in the semiconductor layer including the channel formation region, A configuration that allows control of the threshold voltage is preferred. A 4-terminal thin-film transistor 2 The threshold voltage of 8 is applied to the gate insulating film above and below the channel formation region of the thin-film transistor 28. By providing a gate electrode via this, and controlling the potential of the upper and / or lower gate electrodes, It can be controlled to the desired value.

[0339] Next, let's look at an example of a specific circuit configuration of the pulse output circuit shown in Figure 16(B). (D) will explain this.

[0340] The first pulse output circuit shown in Figure 16(D) consists of the first transistor 31 to the 13th transistor It has an inverter 43. In addition, the first input terminal 21 to the fifth input terminal 25 described above In addition, a power line 51 to which a first high power potential VDD is supplied, and a power line 51 to which a second high power potential VCC is supplied The first transistor is supplied with power from power line 52, which is used for power supply, and power line 53, which is supplied with a low power supply potential VSS. A signal or power potential is supplied to transistors 31 to 43. Also, the first output Signals are output to the power terminal 26 and the second output terminal 27. Here in Figure 16(D) The relative power potentials of each power line are such that the first power potential VDD is greater than or equal to the second power potential VCC. The potentials are set such that the second power supply potential VCC is greater than the third power supply potential VSS. The first clock signal (CK1) to the fourth clock signal (CK4) are raised to high level at regular intervals. This is a signal that alternates between high and low levels, with VDD when it's high and VSS when it's low. Let's assume that this is the case. Furthermore, the potential VDD of power line 51 should be higher than the potential VCC of power line 52. This reduces the potential applied to the gate electrode of the transistor without affecting its operation. This can suppress the shift in the transistor threshold and reduce degradation. Yes, it is possible. As shown in Figure 16(D), the first transistor 31 to the 13th transistor Of the transistors 43, the first transistor 31, the sixth transistor 36 to the ninth transistor For the zista 39, it is preferable to use the 4-terminal thin-film transistor 28 shown in Figure 16(C). It seems. The first transistor 31, the sixth transistor 36 to the ninth transistor 39 This determines the potential of the node to which one of the electrodes, which will be the source or drain, is connected, relative to the gate electrode. This is a transistor that is required to be switched by a control signal, and the gate electrode is input The response to the control signal is fast (the rise of the on-current is steep), resulting in pulse output. This transistor can reduce circuit malfunctions. Therefore, as shown in Figure 16(C) By using the 4-terminal thin-film transistor 28, the threshold voltage can be controlled. This allows for a pulse output circuit that can further reduce malfunctions. Note that in Figure 16(D) The first control signal G1 and the second control signal G2 are the same control signal, but different control signals This can also be used as the input configuration.

[0341] In Figure 16(D), the first transistor 31 has its first terminal electrically connected to the power line 51. The second terminal is electrically connected to the first terminal of the ninth transistor 39, and the gate voltage The poles (the lower gate electrode and the upper gate electrode) are electrically connected to the fourth input terminal 24. The second transistor 32 has its first terminal electrically connected to the power line 53, and its second terminal The child is electrically connected to the first terminal of the ninth transistor 39, and the gate electrode is connected to the fourth transistor It is electrically connected to the gate electrode of transistor 34. The third transistor 33 is connected to the first terminal. The child is electrically connected to the first input terminal 21, and the second terminal is electrically connected to the first output terminal 26. It is connected. The fourth transistor 34 has its first terminal electrically connected to the power line 53. The second terminal is electrically connected to the first output terminal 26. The fifth transistor 35 is The first terminal is electrically connected to the power line 53, and the second terminal is connected to the second transistor 32. The electrode and the gate electrode of the fourth transistor 34 are electrically connected, and the gate electrode is the fourth It is electrically connected to input terminal 24. The sixth transistor 36 has its first terminal connected to the power supply. Electrically connected to line 52, the second terminal is the gate electrode of the second transistor 32 and the fourth Electrically connected to the gate electrode of transistor 34, the gate electrode (the lower gate electrode and The upper gate electrode is electrically connected to the fifth input terminal 25. The seventh transistor Terminal 37 has its first terminal electrically connected to power line 52, and its second terminal connected to transistor 8 3 It is electrically connected to the second terminal of 8, and the gate electrodes (the lower gate electrode and the upper gate electrode) are connected. The third input terminal 23 is electrically connected to the eighth transistor 38. The child is charged to the gate electrode of the second transistor 32 and the gate electrode of the fourth transistor 34. They are electrically connected, with the gate electrodes (lower gate electrode and upper gate electrode) at the second input terminal. It is electrically connected to child 22. The ninth transistor 39 has its first terminal connected to the first transistor It is electrically connected to the second terminal of the zista 31 and the second terminal of the second transistor 32, and the second The terminals are the gate electrode of the third transistor 33 and the gate electrode of the tenth transistor 40. It is electrically connected to power line 5, and the gate electrodes (lower gate electrode and upper gate electrode) are connected to power line 5. It is electrically connected to 2. The 10th transistor 40 has its first terminal connected to the first input terminal. The second terminal is electrically connected to terminal 21, and the second terminal is electrically connected to the second output terminal 27, and the gate electric The pole is electrically connected to the second terminal of the ninth transistor 39. The eleventh transistor Terminal 41 has its first terminal electrically connected to the power line 53, and its second terminal connected to the second output terminal 27. Electrically connected, the gate electrode of the second transistor 32 and the fourth transistor It is electrically connected to the gate electrode of transistor 34. The 12th transistor 42 is the first The terminal is electrically connected to the power line 53, and the second terminal is electrically connected to the second output terminal 27. And the gate electrode is the gate electrode of the 7th transistor 37 (the lower gate electrode and the upper gate electrode It is electrically connected to the electrode. The 13th transistor 43 has its first terminal connected to the power line. 53 is electrically connected, the second terminal is electrically connected to the first output terminal 26, and the gate electric The poles are connected to the gate electrodes of the 7th transistor 37 (the lower gate electrode and the upper gate electrode). They are electrically connected.

[0342] In Figure 16(D), the gate electrode of the third transistor 33 and the tenth transistor 4 The connection point between the gate electrode of transistor 0 and the second terminal of transistor 9 39 is defined as node A. Also, the gate electrode of the second transistor 32, the gate electrode of the fourth transistor 34, and The second terminal of transistor 35 (number 5), the second terminal of transistor 36 (number 6), and the eighth transistor The connection point between the first terminal of transistor 38 and the gate electrode of transistor 41 (number 11) is at node B. (See Figure 17(A)).

[0343] Figure 17(A) shows the pulse output circuit described in Figure 16(D) as the first pulse output circuit 10_ When applied to 1, the first input terminals 21 to the fifth input terminals 25 and the first output terminal 26 The signals input to or output to the second output terminal 27 are shown.

[0344] Specifically, the first clock signal CK1 is input to the first input terminal 21, and the second input terminal The second clock signal CK2 is input to child 22, and the third clock signal is input to the third input terminal 23. When input CK3 is received, a start pulse (SP1) is input to the 4th input terminal 24, and the 5th The subsequent signal OUT(3) is input to input terminal 25, and the first output is output from the first output terminal 26. Signal OUT(1)(SR) is output, and the second output signal OUT( 1) is output.

[0345] A thin-film transistor is defined as a transistor with at least three components, including a gate, a drain, and a source. It is an element having terminals. Furthermore, a channel region is formed in the region superimposed on the gate in a semiconductor. It has a body and controls the gate potential, allowing the drain and saw through the channel region. The current flowing between the source and drain can be controlled. Here, the source and drain are thin film transistors. It depends on the structure and operating conditions of the converter, so which is the source and which is the drain. It is difficult to limit the extent of this. Therefore, the regions that function as source and drain are defined as They are sometimes not called drains or suctions. In that case, for example, each is called the first It may be referred to as terminal or second terminal.

[0346] Note that in Figures 16(D) and 17(A), the boot process is performed by setting node A to a floating state. A capacitive element may be provided separately to perform the strapping action. Also, the potential of node B may be maintained. Therefore, a capacitive element with one electrode electrically connected to node B may be provided separately.

[0347] Here, the timing of a shift register equipped with multiple pulse output circuits as shown in Figure 17(A) The chart is shown in Figure 17(B). Note that if the shift register is a scan line drive circuit... In total, period 61 in Figure 17(B) is the vertical retrace period, and period 62 corresponds to the gate selection period. do.

[0348] Furthermore, as shown in Figure 17(A), the 9th gate electrode is subjected to a second power supply potential VCC. By providing transistor 39, before and after the bootstrap operation, It has the following advantages:

[0349] If there is no 9th transistor 39 to which the second power supply potential VCC is applied to the gate electrode, then When the potential of node A rises due to the trapping action, the second of the first transistor 31 The potential of the source terminal rises and becomes greater than the first power supply potential VDD. Then, the source of the first transistor 31 switches to the first terminal side, that is, to the power line 51 side. Therefore, in the first transistor 31, between the gate and source, and between the gate and drain Both are subjected to significant stress due to the application of a large bias voltage, and the transistor This can be a factor in degradation. Therefore, the 9th gate electrode is subjected to a second power supply potential VCC. By providing transistor 39, the power of node A is supplied by the bootstrap operation. Although the position rises, the potential of the second terminal of the first transistor 31 does not rise. This can be done. In other words, by providing the ninth transistor 39, the first transistor The value of the negative bias voltage applied between the gate and source of the zistor 31 can be reduced. Yes, it is possible. Therefore, by using the circuit configuration of this embodiment, the first transistor 31 The negative bias voltage applied between the gate and source can also be reduced, thus reducing stress. This makes it possible to suppress the degradation of the first transistor 31.

[0350] Furthermore, the location where the ninth transistor 39 is installed is the second transistor 31 The terminal is connected to the gate of the third transistor 33 via the first and second terminals. Any configuration that is set up in this manner is acceptable. Note that the pulse output circuit in this embodiment may be equipped with multiple pulse output circuits. In the case of a soft register, in a signal line drive circuit with more stages than a scan line drive circuit, the 9th transistor The ZISTA39 can be omitted, which has the advantage of reducing the number of transistors.

[0351] Furthermore, the semiconductor layers of the first transistor 31 to the thirteenth transistor 43 are made of oxide semiconductor material. By using a conductor, the off-current of the thin-film transistor is reduced, as well as the on-current and Because it is possible to increase the field effect mobility and reduce the degree of degradation. This can reduce malfunctions within the circuit. Also, transistors using oxide semiconductors, Compared to transistors using morphous silicon, a high potential is applied to the gate electrode. The degree of transistor degradation caused by this is small. Therefore, the second power supply potential VCC is supplied. The same operation can be obtained by supplying the first power potential VDD to the power line, and the connections between circuits are also This allows for a reduction in the number of power lines, thus enabling the miniaturization of the circuit.

[0352] Note that the gate electrodes of the seventh transistor 37 (the lower gate electrode and the upper gate electrode) The clock signal supplied by the third input terminal 23, and the gateway of the eighth transistor 38. The electrodes (lower gate electrode and upper gate electrode) are supplied by the second input terminal 22. The clock signal is transmitted to the gate electrode of the 7th transistor 37 (the lower gate electrode and the upper The clock signal supplied by the second input terminal 22 to the gate electrode of the eighth transistor The gate electrodes of terminal 38 (lower gate electrode and upper gate electrode) are connected to the third input terminal 23. Therefore, the same effect can be achieved by reversing the wiring so that it becomes the supplied clock signal. At this time, in the shift register shown in Figure 17(A), the seventh transistor 37 and From a state where the 8th transistor 38 is both ON, the 7th transistor 37 turns OFF, and the 8th Transistor 38 is ON, then transistor 37 (number 7) is OFF, and the 8th transistor By turning off the st38, the second input terminal 22 and the third input terminal 23 The decrease in potential at node B, caused by a decrease in the potential of the seventh transistor 37, is due to the decrease in the potential of node B. This is due to a decrease in the potential of the electrode and the decrease in the potential of the gate electrode of transistor 38. This will occur twice. On the other hand, the shift register shown in Figure 17(A) will occur during the period shown in Figure 17(B). As shown above, when both the seventh transistor 37 and the eighth transistor 38 are turned on, The seventh transistor 37 is ON, the eighth transistor 38 is OFF, and then the seventh By turning off transistor 37 and the eighth transistor 38, The potential of node B caused by a decrease in the potential of input terminal 22 and input terminal 23 of the second and third input terminals. The decrease is reduced to a single event caused by the decrease in the potential of the gate electrode of the eighth transistor 38. This is possible. Therefore, the gate electrode of the seventh transistor 37 (the lower gate electrode and the upper A clock signal CK3 is supplied from the third input terminal 23 to the gate electrode of the eighth transistor. The gate electrodes of ZISTA 38 (lower gate electrode and upper gate electrode) are connected to the second input terminal 2 It is preferable to have a wiring configuration in which the clock signal CK2 is supplied from 2. This is because the number of fluctuations in the potential of the B channel is reduced, and noise can also be reduced.

[0353] In this way, the period during which the potential of the first output terminal 26 and the second output terminal 27 is maintained at the L level In between, a configuration is set in which a high-level signal is periodically supplied to node B, and the pulse output This can suppress malfunctions in the force circuit.

[0354] This embodiment can be freely combined with other embodiments.

[0355] (Embodiment 11) The semiconductor device disclosed herein can be used as electronic paper. PA can be used in electronic devices in any field that displays information. For example, using e-paper, e-books, posters, and trains This can be applied to in-vehicle advertisements for goods, displays on various cards such as credit cards, etc. An example of an electronic device is shown in Figure 20.

[0356] Figure 20 shows the e-book 2700. For example, the e-book 2700 has a casing 2701 It consists of two enclosures, and enclosure 2703. Enclosures 2701 and 2703 are It is integrated with the shaft portion 2711, and the shaft portion 2711 is used as the axis for opening and closing operations. This configuration allows it to function like a physical book.

[0357] The display unit 2705 is incorporated into the housing 2701, and the display unit 2707 is incorporated into the housing 2703. It is included. Display units 2705 and 2707 are configured to display a continuation screen. Alternatively, a configuration that displays different screens is also acceptable. For example, text is displayed on the right-hand display unit (display unit 2705 in Figure 20), and the left-hand display unit An image can be displayed on the display unit 2707 in Figure 20.

[0358] Furthermore, Figure 20 shows an example in which the housing 2701 is equipped with an operating unit, etc. For example, housing 2 Unit 701 is equipped with a power supply 2721, operation keys 2723, speaker 2725, and the like. The page can be turned using operation key 2723. Note that the key is located on the same side as the display unit of the casing. The configuration may include a board or pointing device. Also, the back or sides of the enclosure may be used. On the side, there are external connection terminals (earphone terminal, USB terminal, or AC adapter and USB cable). The configuration includes terminals that can connect to various cables such as cables, a recording medium insertion section, and more. It is also permissible to do so. Furthermore, the eBook 2700 is configured to have the functionality of an electronic dictionary. That's good too.

[0359] Furthermore, the e-book 2700 may be configured to transmit and receive information wirelessly. By wireless means, The system will be configured to allow users to purchase and download desired book data from an e-book server. It is also possible.

[0360] (Embodiment 12) The semiconductor devices disclosed herein are applicable to a variety of electronic devices (including amusement machines). This is possible. As an electronic device, for example, a television set (television, or television Receivers (also called receivers), computer monitors, digital cameras, digital video cameras Cameras such as LA, digital photo frames, and mobile phones (also known as mobile phones or mobile phone devices) (u) Portable game consoles, personal information terminals, sound playback devices, and large game machines such as pachinko machines. Some examples include:

[0361] Figure 21(A) shows the television equipment 9600. The television equipment 9600 is The display unit 9603 is incorporated into the housing 9601. The display unit 9603 displays images. It is possible to demonstrate this. Furthermore, here, the stand 9605 supports the housing 9601. This shows the configuration.

[0362] The television unit 9600 is operated using the control switches on the housing 9601 and a separate remote control. This can be done using the control unit 9610. The remote control unit 9610 has control keys The 9609 allows you to control the channel and volume, and the information is displayed on the display unit 9603. The video can be controlled. Furthermore, the remote control unit 9610 can be controlled by the remote control unit. A display unit 9607 may be provided to display the information output from 9610.

[0363] The television system 9600 will consist of a receiver, modem, and other components. It can receive more general television broadcasts, and furthermore, it can connect via a modem, either wired or wirelessly. By connecting to the communication network, one-way (sender to receiver) or two-way communication is possible. It is also possible to communicate information (between a sender and a receiver, or between receivers, etc.).

[0364] Figure 21(B) shows the digital photo frame 9700. For example, a digital photo The frame 9700 has a display unit 9703 incorporated into the housing 9701. 03 can display various images, such as images taken with a digital camera. By displaying image data, it can function just like a regular picture frame.

[0365] The Digital Photo Frame 9700 includes an operating unit and external connection terminals (USB terminal, USB port). A structure that includes terminals that can connect to various cables such as B cables, a recording medium insertion section, etc. These components may be incorporated on the same surface as the display unit, but may also be on the sides or back. It is desirable to include it as it improves the design. For example, the recording medium of a digital photo frame. A memory device containing image data captured by a digital camera is inserted into the body insertion site. The system can capture data and display the captured image data on the display unit 9703.

[0366] Furthermore, the digital photo frame 9700 may be configured to send and receive information wirelessly. It is also possible to configure the system to acquire and display desired image data wirelessly.

[0367] Figure 22(A) shows a portable gaming machine, which consists of two cabinets, cabinet 9881 and cabinet 9891. It is connected by a connecting part 9893 so that it can be opened and closed. The housing 9881 has a display unit The 9882 is incorporated, and the display unit 9883 is incorporated into the housing 9891. The portable gaming machine shown in 22(A) also includes a speaker section 9884 and a recording medium insertion section 988 6. LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, Chemical substances, sound, time, hardness, electric field, electric current, voltage, power, radiation, flow rate, humidity, gradient, vibration Equipped with a function to measure motion, odor, or infrared radiation, a microphone (9889), etc. Of course, the configuration of portable gaming machines is not limited to those described above, and at least in this specification. Any configuration that includes the semiconductor device disclosed herein, and other auxiliary equipment as appropriate, is acceptable. This can be done. The portable gaming machine shown in Figure 22(A) has the data recorded on the recording medium. Functions for reading programs or data and displaying them on the display unit, and wireless communication with other portable gaming machines. It has the function of sharing information by doing so. The functions are not limited to these, and it can have a variety of functions.

[0368] Figure 22(B) shows the large-scale gaming machine, slot machine 9900. The 9900 has a display unit 9903 integrated into the casing 9901. Also, a slot machine... The 9900 also features other operating mechanisms such as a start lever and stop switch, and a coin slot. It is equipped with speakers, etc. Of course, the configuration of the slot machine 9900 is as described above. Not limited to, but including any configuration comprising at least one semiconductor device as disclosed herein, The configuration may include other auxiliary equipment as appropriate.

[0369] Figure 23(A) is a perspective view showing an example of a portable computer.

[0370] The portable computer in Figure 23(A) is constructed by connecting the upper casing 9301 and the lower casing 9302. The hinge unit is in the closed position, and the upper housing 9301 has a display unit 9303, and the keyboard The lower housing 9302, which has code 9304, can be stacked on top of each other, making it easy to carry. This is convenient, and when the user is typing on the keyboard, the hinge unit can be opened. Therefore, input operations can be performed by looking at the display unit 9303.

[0371] In addition, the lower casing 9302 houses the keyboard 9304 and a pointing device for input operations. It has a chair 9306. Also, if the display unit 9303 is a touch panel, a part of the display unit Input operations can also be performed by touching it. Additionally, the lower chassis 9302 contains the CPU and hard disk It has a processing unit such as a disk. Furthermore, the lower housing 9302 can connect to other devices, such as USB ports. It has an external connection port 9305 into which a communication cable compliant with the communication standard is plugged in. .

[0372] The upper housing 9301 also contains a display unit 93 which can be slid and stored inside the upper housing 9301. It has 07, which enables a large display screen. It also has a retractable display unit 93 The user can adjust the orientation of the 07 screen. Additionally, the retractable display unit 9307 can be used as a touch panel. If you choose this option, you can also perform input operations by touching a part of the retractable display unit.

[0373] The display unit 9303 or the retractable display unit 9307 is a liquid crystal display panel, an organic light-emitting element, or This uses an image display device such as an inorganic light-emitting element or other light-emitting display panel.

[0374] Furthermore, the portable computer shown in Figure 23(A) is configured to include a receiver and other components, and can also function as a television. The broadcast can be received and the image displayed on the display unit or on the display unit. Also, the upper housing 93 With the hinge unit connecting 01 and the lower housing 9302 in the closed position, the display unit 930 Slide the 7 to expose the entire screen, adjust the screen angle, and the user can watch television broadcasts. It is also possible to open the hinge unit and display the display unit 9303. Furthermore, because it only activates the circuit that displays the television broadcast, it consumes minimal power and This is useful in portable computers with limited battery capacity. ru.

[0375] Furthermore, Figure 23(B) shows a portable device that can be worn on the user's wrist like a wristwatch. This is a perspective illustrating one example of the story.

[0376] This mobile phone includes a communication device having at least telephone functionality and a main unit having a battery, A band portion 9204 for attaching the body to the arm, and the state of fixation of the band portion 9204 to the arm. The system consists of a control unit 9205, a display unit 9201, a speaker 9207, and a microphone 9208. It has been done.

[0377] The main unit also has an operation switch 9203, a power input switch, and a display switching switch. In addition to the start-up switch for imaging, for example, pressing a button will launch an internet program. Each function can be associated with a specific event, such as when a particular function is activated.

[0378] Input operations on this mobile phone are performed by touching the display unit 9201 with a finger or input pen, or by operating it. This is done by operating switch 9203 or by voice input to microphone 9208. In 23(B), the display button 9202 displayed on the display unit 9201 is shown, and a finger Input can be performed by touching the screen.

[0379] Furthermore, the main unit is an imaging device that converts the image of the subject formed through the imaging lens into an electronic image signal. It has a camera section 9206 with a step. However, the camera section is not required.

[0380] Furthermore, the mobile phone shown in Figure 23(B) is configured to include a television broadcast receiver, etc. It can receive TV broadcasts and display the images on the display unit 9201, and furthermore, it can store memory and other data. With a configuration that includes a storage device, television broadcasts can be recorded into memory. Also, Figure 23( The mobile phone shown in B) may have a function that can collect location information such as GPS.

[0381] The display unit 9201 is a light-emitting display panel such as a liquid crystal display panel, an organic light-emitting element, or an inorganic light-emitting element. A video display device such as a NEL is used. The mobile phone shown in Figure 23(B) is small and lightweight. Therefore, the battery capacity is limited, and the display device used in the display unit 9201 is low power consumption. It is preferable to use a panel that can be driven by force.

[0382] Note that Figure 23(B) illustrates an electronic device that is worn on the "arm," but it is not particularly limited to this. In short, it just needs to be something that can be carried around.

[0383] (Embodiment 13) In this embodiment, as one form of a semiconductor device, the thin film transient shown in Embodiments 1 to 6 Examples of display devices having a sta will be described with reference to Figures 24 to 37. This embodiment is a display An example of a liquid crystal display device using liquid crystal elements as components will be explained with reference to Figures 24 to 37. The TFTs 628 and 629 used in the liquid crystal display devices shown in Figures 24 to 37 are from Embodiment 1 to The thin-film transistor shown in 6 can be applied to Embodiment 1, Embodiment 5 or the actual A thin-film transistor with electrical characteristics and high reliability that can be similarly manufactured using the process shown in Embodiment 6. be.

[0384] First, we will explain VA (Vertical Alignment) type liquid crystal display devices. VA type refers to a method of controlling the arrangement of liquid crystal molecules in a liquid crystal display panel. In a liquid crystal display device, when no voltage is applied, the liquid crystal molecules are perpendicular to the panel surface. This is a method that directs the pixels in a certain direction. In this embodiment, pixels are particularly divided into several sub-regions (sub-pixels). The cells are divided into separate units, and the liquid crystal molecules are designed to be tilted in different directions in each unit. This is called main domain design or multi-domain design. In the following explanation, multi-domain design is considered This section describes the liquid crystal display device that was designed with this in mind.

[0385] Figures 25 and 26 show the pixel electrode and counter electrode, respectively. Figure 25 shows the pixel This is a plan view of the substrate side where the electrodes are formed, and the cross-sectional structure corresponding to the cutting line EF shown in the figure is This is shown in Figure 24. Figure 26 is a plan view of the substrate side where the counter electrodes are formed. The explanation will be explained using these diagrams.

[0386] Figure 24 shows the TFT 628, the pixel electrode layer 624 connected to it, and the holding capacitance section 630. The formed substrate 600 and the opposing substrate 601 on which the opposing electrode layer 640 etc. are formed are superimposed. This indicates that the liquid crystal has been injected.

[0387] A colored film 636 and a counter electrode layer 640 are formed on the opposing substrate 601, and on the counter electrode layer 640 A protrusion 644 is formed thereon. An alignment film 648 is formed on the pixel electrode layer 624, similarly. An orientation film 646 is also formed on the counter electrode layer 640 and the protrusion 644. A liquid crystal layer 650 is formed between the opposing substrates 601.

[0388] On the substrate 600 are a TFT 628, a pixel electrode layer 624 connected to it, and a holding capacitance section 6 30 is formed. The pixel electrode layer 624 consists of a TFT 628, wiring 616, and a holding capacitance portion 6 Insulating film 620 and insulating film 621 covering 30, insulating film covering insulating film 620 and insulating film 621 Each of the 622s is connected to the wiring 618 through the contact hole 623. TFT6 28 can be any thin-film transistor as shown in Embodiments 1 to 6. The capacitance section 630 is formed simultaneously with the gate wiring 602 of the TFT 628 by the first capacitance wiring 6 04, the first gate insulating film 606a, the second gate insulating film 606b, and wiring 616, 6 It consists of a second capacitive wiring 617 formed simultaneously with 18.

[0389] The pixel electrode layer 624, the liquid crystal layer 650, and the counter electrode layer 640 overlap, forming the shape of the liquid crystal element. It has been done.

[0390] Figure 25 shows the planar structure on the substrate 600. The pixel electrode layer 624 is made of the material shown in Embodiment 1. It is formed using [a certain method]. A slit 625 is provided in the pixel electrode layer 624. The slit 625 is liquid This is for controlling the orientation of the crystals.

[0391] The TFT 629 shown in Figure 25, the pixel electrode layer 626 connected thereto, and the holding capacitance unit 631 are, Each of these can be formed in the same manner as the TFT628, the pixel electrode layer 624, and the holding capacitance section 630. Yes, it is. Both the TFT628 and TFT629 are connected to wiring 616. This LCD display A pixel in Nell is composed of a pixel electrode layer 624 and a pixel electrode layer 626. Pixel electrode layers 624 and 626 are subpixels.

[0392] Figure 26 shows the planar structure on the opposing substrate side. The opposing electrode layer 640 is similar to the pixel electrode layer 624. It is preferable to form it using a material. On the counter electrode layer 640, there are protrusions that control the orientation of the liquid crystal. A starting layer 644 is formed. Note that Figure 26 shows the pixel electrode layer 624 formed on the substrate 600. The pixel electrode layer 626 is shown with a dashed line, and the counter electrode layer 640, the pixel electrode layer 624 and the pixel electrode This shows how the polar layers 626 are arranged in an overlapping pattern.

[0393] The equivalent circuit of this pixel structure is shown in Figure 27. Both TFT628 and TFT629 have gate configurations. It is connected to wire 602 and wiring 616. In this case, the power of capacitive wiring 604 and capacitive wiring 605 By changing their positions, the operation of liquid crystal elements 651 and 652 can be made different. In other words, by individually controlling the potential of capacitive wiring 604 and capacitive wiring 605, liquid crystals can be formed. The field of view is widened by precisely controlling the orientation of the elements.

[0394] When a voltage is applied to the pixel electrode layer 624 with the slit 625, near the slit 625... This generates distortion of the electric field (oblique electric field). This slit 625 and the protrusion on the opposing substrate 601 side By arranging 644 and other elements in an alternating interlocking manner, a diagonal electric field is effectively generated, resulting in a liquid crystal. By controlling the orientation, the direction in which the liquid crystals align varies depending on the location. That is, The multi-domain architecture widens the viewing angle of the LCD display panel.

[0395] Next, a VA-type liquid crystal display device, different from the one described above, will be explained using Figures 28 to 31. ru.

[0396] Figures 28 and 29 show the pixel structure of a VA-type liquid crystal display panel. Figure 29 shows the substrate 600 This is a plan view, and Figure 28 shows the cross-sectional structure corresponding to the cutting line YZ shown in the figure.

[0397] This pixel structure has multiple pixel electrodes for each pixel, and a TFT is in contact with each pixel electrode. It continues. Each TFT is configured to be driven by a different gate signal. In a multi-domain designed pixel, the signals applied to each pixel electrode are independently It has a configuration that controls it.

[0398] The pixel electrode layer 624 penetrates the insulating film 620, insulating film 621, and insulating film 622, respectively. In contact hole 623, the TFT628 is connected by wiring 618. The electrode layer 626 penetrates the insulating film 620, insulating film 621, and insulating film 622, respectively. In contact hole 627, it is connected to TFT629 by wiring 619. The gate wiring 602 of the 8 and the gate wiring 603 of the TFT629 are given different gate signals. They are separated so that they can be accessed. On the other hand, wiring 616, which functions as a data line, It is used in common with TFT628 and TFT629. TFT628 and TFT629 are actually Thin-film transistors shown in Embodiments 1 to 6 can be used as appropriate. Note that gate wiring On 602, the gate wiring 603 and the capacitance wiring 690 are the first gate insulating film 606a and the second The gate insulating film 606b is formed.

[0399] The shapes of the pixel electrode layer 624 and the pixel electrode layer 626 are different, with the pixel electrode layer spreading out in a V-shape. A pixel electrode layer 626 is formed to surround the outside of 624. Pixel electrode layer 624 and pixel By making the voltage applied to the electrode layer 626 different for TFT628 and TFT629, This controls the orientation of the liquid crystal. The equivalent circuit of this pixel structure is shown in Figure 31. The TFT628 is TFT629 is connected to gate wiring 603, and T Both the FT628 and TFT629 are connected to wiring 616. Gate wiring 602 and gate By applying different gate signals to the wiring 603, the movement of liquid crystal elements 651 and 652 is controlled. The operation can be made different. That is, the operation of TFT628 and TFT629 can be controlled individually. By doing so, the alignment of the liquid crystals in liquid crystal elements 651 and 652 is precisely controlled to control the field of view. The corners can be widened.

[0400] A colored film 636 and a counter electrode layer 640 are formed on the opposing substrate 601. A planarization film 637 is formed between 636 and the counter electrode layer 640 to prevent the alignment of the liquid crystal. Figure 30 shows the planar structure on the opposing substrate side. The opposing electrode layer 640 is common across different pixels. The electrode is formed with a slit 641. The elementary electrode layer 624 and the slit 625 on the pixel electrode layer 626 side are arranged to interlock alternately. By doing so, a diagonal electric field can be effectively generated to control the orientation of the liquid crystal. This allows the orientation of the liquid crystal to vary depending on the location, thereby widening the viewing angle. Note that in Figure 30, the pixel electrode layers 624 and 626 formed on the substrate 600 are indicated by dashed lines. As shown, the opposing electrode layer 640 and the pixel electrode layer 624 and pixel electrode layer 626 are arranged to overlap. This shows how it is placed.

[0401] An alignment film 648 is formed on the pixel electrode layer 624 and the pixel electrode layer 626, and similarly the counter electrode An alignment film 646 is also formed on layer 640. A liquid crystal is formed between substrate 600 and opposing substrate 601. Layer 650 is formed. Also, the pixel electrode layer 624, the liquid crystal layer 650, and the counter electrode layer 640 The overlapping of these elements forms the first liquid crystal element. Furthermore, the pixel electrode layer 626 and the liquid crystal... The second liquid crystal element is formed by the overlapping of layer 650 and the counter electrode layer 640. (Figure) The pixel structure of the display panel described in Figures 28 to 31 is such that each pixel contains a first liquid crystal element and a second liquid crystal element. It has a multi-domain structure with crystal elements.

[0402] Next, we will describe a transverse electric field type liquid crystal display device. In the transverse electric field type, the liquid crystal molecules within the cell This method drives the liquid crystal by applying an electric field in the horizontal direction to express gradation. This allows the field of view to be expanded to approximately 180 degrees. The following explanation uses a transverse electric field method. The liquid crystal display device used will be described below.

[0403] Figure 32 shows the shape of the electrode layer 607, TFT 628, and the pixel electrode layer 624 connected to the TFT 628. This shows the completed substrate 600 and the opposing substrate 601 superimposed, with liquid crystal injected. A colored film 636, a planarization film 637, etc., are formed on the opposing substrate 601. The electrode layer is located on the substrate 600 side, and is not provided on the opposing substrate 601 side. Between 600 and the opposing substrate 601, the liquid crystal layer 650 is provided via alignment films 646 and 648. It is formed.

[0404] On the substrate 600 are an electrode layer 607 and capacitive wiring 604 connected to the electrode layer 607, and T The FT628 is formed. The capacitive wiring 604 is formed simultaneously with the gate wiring 602 of the TFT628. This can be achieved. As for TFT628, the thin film transients shown in Embodiments 1 to 5 A st can be applied. The electrode layer 607 is the pixel electrode layer shown in Embodiments 1 to 6 and Similar materials can be used. Furthermore, the electrode layer 607 is divided into sections roughly the shape of a pixel. The electrode layer 607 and the capacitance wiring 604 are formed by the first gate insulating film 606a. Then, the second gate insulating film 606b is formed.

[0405] Wirings 616 and 618 of the TFT628 are the first gate insulating film 606a and the second gate insulating film It is formed on the edge film 606b. The wiring 616 carries the video signal in the liquid crystal display panel. It is a data line and a wiring that extends in one direction, and at the same time, it is the source area or drain area of ​​the TFT628. It connects to the input region and becomes one of the source and drain electrodes. Wiring 618 is source and drain This is the wiring that becomes the other electrode of the rain and connects to the pixel electrode layer 624.

[0406] Insulating films 620 and 621 are formed on wiring 616 and wiring 618. On 621, an insulating film 620 is distributed through a contact hole 623 formed in 621. A pixel electrode layer 624 is formed that connects to line 618. The pixel electrode layer 624 is the same as in Embodiment 1. It is formed using the same material as the pixel electrodes shown in section 6.

[0407] In this way, the TFT 628 and the pixel electrode layer 624 connected to it are formed on the substrate 600. The retention capacity is formed between the electrode layer 607 and the pixel electrode layer 624.

[0408] Figure 33 is a plan view showing the configuration of the pixel electrode. The section corresponding to the cutting line OP shown in Figure 33 The surface structure is shown in Figure 32. A slit 625 is provided in the pixel electrode layer 624. The 625 is for controlling the orientation of the liquid crystal. In this case, the electric field is between the electrode layer 607 and It occurs between the pixel electrode layer 624. There is a first gap between electrode layer 607 and pixel electrode layer 624. A first gate insulating film 606a and a second gate insulating film 606b are formed, but the first gate insulating film The thickness of film 606a and the second gate insulating film 606b is 50-200 nm, and 2-10 μm. Since it is sufficiently thin compared to the thickness of the liquid crystal layer, which is m, it is effectively in a direction parallel to the substrate 600 (horizontally). An electric field is generated in the direction. This electric field controls the orientation of the liquid crystal. Approximately parallel to this substrate The liquid crystal molecules are rotated horizontally using a directional electric field. In this case, the liquid crystal molecules are in any state. Because it is horizontal, the influence of contrast and other factors depending on the viewing angle is minimal, resulting in a wider field of view. This is the result. Also, since both the electrode layer 607 and the pixel electrode layer 624 are light-transmitting electrodes, the aperture ratio It can improve.

[0409] Next, we will show another example of a transverse electric field type liquid crystal display device.

[0410] Figures 34 and 35 show the pixel structure of an IPS-type liquid crystal display device. Figure 35 is a plan view. Yes, and the cross-sectional structure corresponding to the cutting line VW shown in the figure is shown in Figure 34. This will be explained by referring to these two figures.

[0411] Figure 34 shows a substrate 600 on which a TFT 628 and a pixel electrode layer 624 connected thereto are formed, This shows the state after the opposing substrate 601 is placed on top and liquid crystal has been injected. A color film 636, a planarization film 637, etc., are formed. A counter electrode is located on the opposing substrate 601 side. There is no such feature. Between the substrate 600 and the opposing substrate 601, there is an alignment film 646 and an alignment film 64 A liquid crystal layer 650 is formed via 8.

[0412] A common potential line 609 and a TFT 628 are formed on the substrate 600. 9 can be formed simultaneously with the gate wiring 602 of the TFT628. Therefore, the thin-film transistors shown in Embodiments 1 to 6 can be applied.

[0413] Wirings 616 and 618 of the TFT628 are the first gate insulating film 606a and the second gate insulating film It is formed on the edge film 606b. The wiring 616 carries the video signal in the liquid crystal display panel. It is a data line and a wiring that extends in one direction, and at the same time, it is the source area or drain area of ​​the TFT628. It connects to the input region and becomes one of the source and drain electrodes. Wiring 618 is source and drain This is the wiring that becomes the other electrode of the rain and connects to the pixel electrode layer 624.

[0414] Insulating films 620 and 621 are formed on wiring 616 and wiring 618. On 620 and 621, contact holes 623 formed in the insulating films 620 and 621 Then, a pixel electrode layer 624 is formed that connects to the wiring 618. The pixel electrode layer 624 is implemented It is formed using the same material as the pixel electrode layer shown in Forms 1 to 6. Note that as shown in Figure 35... Therefore, the pixel electrode layer 624 generates a transverse electric field with the comb-shaped electrodes formed simultaneously with the common potential line 609. It is formed in such a way that it grows. Also, the comb-tooth portion of the pixel electrode layer 624 is the same as the common potential line 609. Sometimes, the comb-shaped electrodes are formed to interlock alternately.

[0415] When an electric field is generated between the potential applied to the pixel electrode layer 624 and the potential of the common potential line 609, This electric field controls the orientation of the liquid crystal. The liquid crystal is formed using an electric field approximately parallel to the substrate. Rotate the molecules horizontally. In this case, since the liquid crystal molecules are horizontal in any state, the viewing angle... The impact on contrast and other factors is minimal, resulting in a wider viewing angle.

[0416] In this way, the TFT 628 and the pixel electrode layer 624 connected to it are formed on the substrate 600. The retention capacitance is achieved by the first gate insulating film 606 between the common potential line 609 and the capacitive electrode 615. a. A second gate insulating film 606b is provided, thereby forming a capacitive electrode 615 and a cross-section. The base electrode layer 624 is connected via the contact hole 633.

[0417] Next, we will describe the configuration of TN-type liquid crystal display devices.

[0418] Figures 36 and 37 show the pixel structure of a TN-type liquid crystal display device. Figure 37 is a plan view. Figure 36 shows the cross-sectional structure corresponding to the cutting line KL shown in the figure. This explanation will be given with reference to these two figures.

[0419] The pixel electrode layer 624 has contact holes 623 formed in the insulating films 620 and 621 and wiring It is connected to the TFT628 via 618. Wiring 616, which functions as a data line, is T It is connected to the FT628. The TFT628 is one of the TFTs shown in Embodiments 1 to 6. This can be applied.

[0420] The pixel electrode layer 624 is formed using the pixel electrode layer 456 shown in Embodiment 1. The quantized wiring 604 can be formed simultaneously with the gate wiring 602 of the TFT 628. A first gate insulating film 606a and a second gate insulating film are located on wiring 602 and capacitive wiring 604. 606b is formed. The retaining capacitance is a first gauge between the capacitance wiring 604 and the capacitance electrode 615. Capacitive electrode 615 is formed via a first insulating film 606a and a second gate insulating film 606b. The pixel electrode layer 624 is connected via a contact hole 633.

[0421] A colored film 636 and a counter electrode layer 640 are formed on the opposing substrate 601. A planarization film 637 is formed between 636 and the counter electrode layer 640 to prevent the alignment of the liquid crystal. The liquid crystal layer 650 has an alignment film 648 and an alignment film between the pixel electrode layer 624 and the counter electrode layer 640. It is formed via film 646.

[0422] The pixel electrode layer 624, the liquid crystal layer 650, and the counter electrode layer 640 overlap, forming the shape of the liquid crystal element. It has been done.

[0423] Furthermore, the colored film 636 may also be formed on the substrate 600 side. A polarizing plate is attached to the side opposite to the side where the transistor is formed, and the opposing substrate 601 A polarizing plate can be bonded to the surface opposite to the surface on which the opposing electrode layer 640 is formed. ru.

[0424] Through the above steps, a liquid crystal display device can be manufactured as a display device. (Embodiment) This liquid crystal display device is a liquid crystal display device with a high aperture ratio. [Explanation of Symbols]

[0425] 10. Pulse output circuit 11 Wiring 12 Wiring 13 Wiring 14 Wiring 15 Wiring 21 Input terminals 22 Input terminals 23 Input terminals 24 input terminals 25 Input terminals 26 output terminals 27 Output terminals 28 Thin-film transistors 31 transistors 32 transistors 33 transistors 34 transistors 35 transistors 36 transistors 37 transistors 38 transistors 39 Transistors 40 transistors 41 Transistors 42 transistors 43 transistors 51 Power line 52 Power line 53 Power line 61 period 62 period 200 circuit boards 203 Protective insulating layer 204 Planarized insulating layer 210 Thin-Film Transistors 216 Oxide insulating layer 217 Conductive layer 220 Thin-Film Transistors 224 Contact Holes 225 Contact Holes 227 Pixel electrode layer 230 Capacitive wiring layer 231 Capacitive electrode 232 Gate Wiring Layer 234 Source Wiring 235 Terminal electrode 236 Metal wiring layer 237 Metal wiring layer 238 Gate Wiring Layer 240 Thin-Film Transistors 241 Metal wiring layer 242 Metal wiring layer 250 capacitive wiring layer 252 Oxide semiconductor layer 400 circuit boards 401 Guard Layer 402a First gate insulating layer 402b Second gate insulating layer 403 Oxide semiconductor layer 405a Source electrode layer 405b Drain electrode layer 406 Conductive layer 407 Oxide insulating layer 408 Protective insulating layer 409 Planarized insulating layer 431 First high-resistance drain region 432 Second high-resistance drain region 433 Oxide semiconductor layer 434 Channel formation region 435 Metal electrode layer 436 Resist Mask 437 Resist Mask 451 Guard Layer 453 Oxide semiconductor layer 454 Channel formation region 455a Source electrode layer 455b Drain electrode layer 456 Pixel Electrode Layer 457 Oxide semiconductor layer 458 Oxide semiconductor layer 459 Oxide semiconductor layer 460 Thin-Film Transistors 461 Thin-film transistors 470 Thin-film transistors 471 Thin-film transistor 580 circuit boards 581 Thin-film transistor 583 Insulating film 585 Insulating layer 587 Electrode layer 588 Electrode layer 589 Spherical particles 590a black area 590b White area 595 Filling material 596 circuit boards 600 circuit boards 601 Opposing substrate 602 Gate Wiring 603 Gate wiring 604 Capacitance wiring 605 Capacitance wiring 606a First gate insulating film 606b Second gate insulating film 607 Electrode layer 609 Common potential line 615 Capacitive electrode 616 Wiring 617 Capacitance wiring 618 Wiring 619 Wiring 620 Insulating film 621 Insulating film 622 Insulating film 623 Contact Hole 624 Pixel Electrode Layer 625 Slit 626 Pixel Electrode Layer 627 Contact Hole 628 TFT 629 TFT 630 Holding capacity section 631 Holding capacity section 633 Contact Hole 636 Colored film 637 Planarization film 640 Counter electrode layer 641 Slit 644 Protrusion 646 alignment film 648 Alignment film 650 liquid crystal layers 651 Liquid crystal elements 652 liquid crystal elements 690 Capacitance wiring 2600 TFT substrate 2601 Opposing substrate 2602 Sealant 2603 pixel section 2604 display elements 2605 Colored layer 2606 Polarizing plate 2607 Polarizing plate 2608 Wiring circuit section 2609 Flexible Wiring Board 2610 cold cathode tube 2611 Reflector 2612 Circuit board 2613 Diffuser 2700 eBooks 2701 enclosure 2703 Casing 2705 ​​Display section 2707 Display section 2711 Shaft 2721 Power supply 2723 Operation Keys 2725 Speaker 4001 circuit board 4002 pixel section 4003 Signal Line Drive Circuit 4004 Scan Line Drive Circuit 4005 Sealant 4006 circuit board 4008 Liquid Crystal Layer 4010 Thin-Film Transistor 4011 Thin-film transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4019 Anisotropic conductive film 4020 Insulating layer 4021 Insulating layer 4030 Pixel electrode layer 4031 Counter electrode layer 4032 Insulating layer 4040 conductive layer 4501 circuit board 4502 pixel section 4503a, 4503b Signal Line Drive Circuit 4504a, 4504b Scan line drive circuit 4505 Sealant 4506 circuit board 4507 Filling material 4509 Thin-film transistor 4510 Thin-Film Transistor 4511 Light-emitting element 4512 Electroluminescent layer 4513 Electrode layer 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode layer 4518a, 4518b FPC 4519 Anisotropic conductive film 4520 Bulkhead 4540 Conductive layer 4544 Insulating layer 5300 circuit boards 5301 pixel section 5302 Scan line drive circuit 5303 Scan line drive circuit 5304 Signal Line Drive Circuit 5305 Timing control circuit 5601 Shift Register 5602 Switching Circuit 5603 Thin-film transistor 5604 Wiring 5605 Wiring 6400 pixels 6401 Switching Transistor 6402 Transistor for driving light-emitting elements 6403 Capacitive element 6404 Light-emitting element 6405 signal line 6406 scan lines 6407 Power line 6408 Common electrode 7001 TFT 7002 Light-emitting element 7003 Cathode 7004 Emitting layer 7005 Anode 7008 Cathode 7009 Bulkhead 7011 TFT for driving light-emitting elements 7012 Light-emitting element 7013 Cathode 7014 Emitting layer 7015 Anode 7016 Shielding membrane 7017 Conductive film 7018 Conductive film 7019 Bulkhead 7021 TFT for driving light-emitting elements 7022 Light-emitting element 7023 Cathode 7024 Emitting layer 7025 Anode 7027 Conductive film 7028 Conductive film 7029 Bulkhead 9201 Display section 9202 Display button 9203 Operation switch 9205 Adjustment part 9206 Camera Department 9207 Speaker 9208 Microphone 9301 Upper enclosure 9302 Lower enclosure 9303 Display section 9304 Keyboard 9305 External connection port 9306 Pointing device 9307 Display section 9600 Television equipment 9601 enclosure 9603 Display section 9605 Stand 9607 Display section 9609 Operation Keys 9610 Remote Control Unit 9700 Digital Photo Frame 9701 enclosure 9703 Display section 9881 cabinet 9882 Display section 9883 Display section 9884 Speaker section 9885 Operation Keys 9886 Recording medium insertion section 9887 Connection terminal 9888 Sensor 9889 Microphone 9890 LED Lamp 9891 cabinet 9893 Connection section 9900 slot machines 9901 cabinet 9903 indicates the part

Claims

[Claim 1] It has a pixel section having a first thin-film transistor and a drive circuit having a second thin-film transistor on the same substrate, The pixel portion comprises a gate electrode layer on the substrate, a gate insulating layer on the gate electrode layer, a source electrode layer and a drain electrode layer on the gate insulating layer, an oxide semiconductor layer provided on the gate insulating layer and overlapping with the source electrode layer and the drain electrode layer, a protective insulating layer having a region in contact with the oxide semiconductor layer, and a pixel electrode layer on the protective insulating layer. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source electrode layer, the drain electrode layer, the protective insulating layer, and the pixel electrode layer are light-transmitting, A semiconductor device wherein the source electrode layer and drain electrode layer of the second thin-film transistor are made of a different material from the source electrode layer and drain electrode layer of the first thin-film transistor, and are made of a conductive material with lower resistance than the source electrode layer and drain electrode layer of the first thin-film transistor.

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