Method and apparatus for improving delay status reporting in mobile communications
The DSR MAC CE with multiple entries and an extension field addresses inefficiencies in current DSR processing by providing detailed delay state information, enhancing scheduling efficiency for uplink data and resources in 5G NR.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- HTC CORP
- Filing Date
- 2025-10-02
- Publication Date
- 2026-04-17
AI Technical Summary
Current DSR processing in 5G NR is inefficient due to limitations in reporting only one pair of remaining time and buffer size for each logical channel group, leading to inadequate scheduling of uplink data and resources, particularly for latency-sensitive services.
Implementing a DSR MAC CE that includes multiple entries of delay state information for logical channel groups, each entry comprising a pair of remaining time and buffer size fields, along with an extension field to indicate additional pairs, allowing for more detailed reporting of delay-critical data.
Enhances the efficiency and effectiveness of scheduling uplink data and resources by providing more detailed information on delay-critical data distribution, improving system capacity and resource allocation.
Smart Images

Figure 2026066963000001_ABST
Abstract
Description
[Technical Field]
[0001] (Cross-reference of related patent applications) This disclosure claims priority to U.S. Patent Application No. 63 / 704,035, filed on 7 October 2024, and U.S. Patent Application No. 63 / 722,080, filed on 19 November 2024. The contents of U.S. Patent Application No. 63 / 704,035 and U.S. Patent Application No. 63 / 722,080 are incorporated herein by reference in their entirety.
[0002] This disclosure generally relates to mobile communications, and more specifically to improved delay status reporting (DSR) in mobile communications. [Background technology]
[0003] Unless otherwise stated herein, the methods described in this section are not prior art to the claims listed below, nor will they be recognized as prior art by their inclusion in this section.
[0004] Wireless communication networks have grown exponentially over the years. Long-term evolution (LTE) systems offer high peak data rates, low latency, improved system capacity, and lower operating costs as a result of a simplified network architecture. thThe LTE system, also known as the 4G system, also offers seamless integration with older wireless networks such as GSM®, CDMA, and the Universal Mobile Telecommunication System (UMTS). In the LTE system, the Evolved Universal Terrestrial Radio Access Network (E-UTRAN) includes multiple Evolved Node B (eNodeB or eNB) that communicate with multiple mobile stations, each referred to as a User Equipment (UE). Alternatively, the wireless network may include a hybrid of 2G / 3G / 4G systems. In the Third Generation Partner Project (3GPP®), the Next Generation Mobile Network (NGMN) Board decided that future NGMN activities will focus on defining end-to-end requirements for the 5th Generation (5G) New Radio (NR) system, the 5G Advanced system, and the 6G system.
[0005] 3GPP® Release 18 for 5G NR introduces a DSR procedure to provide logical channel group (LCG) latency status information to generation Node-B (gNB) in service via a DSR medium access control (MAC) control element (CE). This report enables rapid handling of latency-critical packet data convergence protocol (PDCP) service data unit (SDU) delivery, as required for certain latency-sensitive services such as extended reality (XR), remote control and remote operation / remote surgery, industrial automation, and vehicle-to-everything (V2X) services. Based on the reported delay status information, gNBs in service can perform scheduling more efficiently and effectively to improve system capacity, for example, by relaxing time constraints on resource allocation, while still meeting delay requirements (i.e., avoiding excessive delays in protocol data units: PDUs). However, the current design of DSR processing can still be inefficient with respect to uplink (UL) data and resource scheduling. For example, DSR processing is limited to reporting only one pair for each LCG: remaining time (i.e., the shortest remaining time for all running PDCP discardTimers) and buffer size (i.e., the total amount of delay-critical UL data). As a result, gNBs are unaware of the remaining time of other PDCP SDUs associated with running PDCP discardTimers with longer remaining times, which inevitably reduces the flexibility of UL data and resource scheduling.As another example, if there are multiple sets of PDUs in a logical channel whose remaining time is less than the remainingTimeThreshold, the gNB will not recognize the presence of these multiple sets of PDUs in that logical channel. Furthermore, as yet another example, if there are two sets of PDUs with different importance levels in a logical channel, and the less important PDUs (i.e., non-delay critical data) are queued before the more important PDUs (i.e., delay critical data), the UL resources provided by the gNB may be insufficient for the logical channel to transmit the delay critical data, because the less important PDUs also consume the provided UL resources.
[0006] Therefore, it is necessary to provide an appropriate method for addressing these problems. [Overview of the project]
[0007] The following summary is for illustrative purposes only and is not intended to limit in any way. That is, the following summary is provided to introduce the concepts, highlights, benefits and features of the novel and non-obvious techniques described herein. The following detailed description further discusses several implementation options. Therefore, the following summary is not intended to identify essential features of the claimed subject matter, nor to be used to determine the scope of the claimed subject matter.
[0008] One object of this disclosure is to propose schemes, concepts, designs, systems, methods, and / or apparatus related to improved DSR in mobile communications. The above-mentioned problems are thought to be avoided or otherwise mitigated by implementing one or more of the proposed schemes described herein.
[0009] In one embodiment, the device may include a transceiver that communicates wirelessly with a network node during operation. The device may also include a processor communicatively coupled to the transceiver. The processor may, during operation, perform a procedure that includes receiving a configuration from the network node via the transceiver, wherein the configuration includes a remaining time threshold for triggering DSR processing for one or more logical channels in the LCG. The processor may also perform a procedure that includes triggering the DSR processing based on the remaining time threshold. The processor may further perform a procedure that includes transmitting a DSR medium access control (MAC) control element (CE) to the network node via the transceiver in response to triggering the DSR processing, wherein the DSR MAC CE includes a plurality of entries of delay state information for the LCG, each of which includes a pair of a remaining time field and a buffer size field, and an extension (EXT) field indicating whether an additional pair of the remaining time field and the buffer size field exists for the LCG in a subsequent entry.
[0010] In one embodiment, a network node may include a transceiver that communicates wirelessly with the device during operation. The network node may also include a processor communicatively coupled to the transceiver. The processor may, during operation, perform a procedure that includes transmitting a configuration to the device via the transceiver, wherein the configuration includes a remaining time threshold for triggering DSR processing for one or more logical channels in the LCG. The processor may further perform a procedure that includes receiving a DSR MAC CE from the device via the transceiver during the DSR processing, wherein the DSR MAC CE includes a plurality of entries of delay state information for the LCG, each of which includes a pair of remaining time fields and buffer size fields, and an EXT field indicating whether an additional pair of the remaining time fields and buffer size fields exists for the LCG in a subsequent entry.
[0011] While the descriptions provided herein may be in the context of specific radio access technologies, it should be noted that the proposed concepts, schemes, and any variations / derivatives thereof, including Long-Term Evolution (LTE), LTE-Advanced, LTE-Advanced Pro, 5G, New Radio (NR), Internet of Things (IoT), Narrowband Internet of Things (NB-IoT), Industrial Internet of Things (IIoT), Beyond 5G (B5G), and 6G, as well as network and network topologies, may be implemented in, for, and by other types of radio access technologies, networks, and network topologies. Therefore, the scope of this disclosure is not limited to the examples described herein. [Brief explanation of the drawing]
[0012] The accompanying drawings are included to provide a further understanding of this disclosure, are incorporated into this disclosure, and constitute part of it. The drawings serve to illustrate the principles of this disclosure, along with the descriptions of the implementation. It should be understood that the drawings are not necessarily to scale, because some components may be shown in proportions different from their actual implementation size in order to clearly illustrate the concepts of this disclosure.
[0013] [Figure 1] This diagram illustrates an exemplary scenario for the DSR MAC CE format in the current 5G NR framework.
[0014] [Figure 2] This diagram illustrates exemplary scenarios of communication environments in which various solutions and methods described in this disclosure can be implemented.
[0015] [Figure 3] This diagram illustrates an exemplary scenario of improved DSR processing as implemented in this disclosure.
[0016] [Figure 4] A diagram illustrating an exemplary scenario of the format of DSR MAC CE according to an implementation of the present disclosure.
[0017] [Figure 5] A diagram illustrating an exemplary scenario of the content of DSR MAC CE according to an implementation of the present disclosure.
[0018] [Figure 6] A diagram illustrating another exemplary scenario of the content of DSR MAC CE according to an implementation of the present disclosure.
[0019] [Figure 7] A block diagram of an exemplary communication system according to an implementation of the present disclosure.
[0020] [Figure 8] A flowchart of an exemplary process according to an implementation of the present disclosure.
[0021] [[ID=Z30]] [Figure 9] A flowchart of another exemplary process according to an implementation of the present disclosure. **[Modes for Carrying Out the Invention]**
[0022] Detailed embodiments and implementations of the claimed subject matter are disclosed herein. However, it should be understood that the disclosed embodiments and implementations are merely exemplary of the claimed subject matter, which may be embodied in various forms. However, the present disclosure should not be construed as limited to the typical embodiments and implementations described herein. Rather, these typical embodiments and implementations are provided so that the description of the present disclosure is thorough and complete and conveys the scope of the present disclosure to those skilled in the art. In the following description, details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the presented embodiments and implementations. (Overview)
[0023] The implementations described herein relate to various techniques, methods, schemes, and / or solutions related to improved DSR in mobile communications. According to this disclosure, several possible solutions can be implemented individually or in combination. That is, these possible solutions may be described separately below, but two or more of these possible solutions may be implemented in one combination or another.
[0024] Figure 1 shows an exemplary scenario 100 of the DSR MAC CE format in the current 5G NR framework. As shown in Figure 1, the DSR MAC CE may hold delay state information for multiple LCGs (represented as LCGi (i=0~7)), but the delay state information for each LCH contains only a single pair of fields: a remaining time field and a buffer size field. The remaining time field indicates the shortest remaining time of the running PDCP discardTimer among all PDCP SDUs that are buffered for that LCG but not transmitted in any MAC PDU. The buffer size field indicates the total amount of delay-critical UL data for the LCG. Due to the limitation that only a single pair of fields, the remaining time field and the buffer size field, can be reported for each LCG, the scheduling of UL data and resources can be inefficient and ineffective, as described in the problems above.
[0025] In consideration of the foregoing, this disclosure proposes several schemes relating to improved DSR in mobile communications. According to the schemes of this disclosure, DSR processing is improved by enabling the DSR MAC CE to include multiple entries of delay state information for LCG. Specifically, each entry includes not only a pair of remaining time fields and buffer size fields, but also an extension field indicating whether an additional pair of remaining time fields and buffer size fields exists for the same LCG in subsequent entries. In other words, the extension field indicates whether the next entry of delay state information (i.e., the next pair of remaining time fields and buffer size fields) belongs to the same LCG as the current entry (i.e., the current pair of remaining time fields and buffer size fields). Accordingly, by applying the schemes of this disclosure, the reported delay state information may include more detailed information on delay-critical data (e.g., distribution of remaining time), thereby improving the efficiency and effectiveness of scheduling UL data and resources.
[0026] Figure 2 shows an exemplary scenario 200 of a communication environment in which various solutions and schemes according to this disclosure may be implemented. Scenario 200 involves a UE 210 that wirelessly communicates with a network 220 (e.g., a wireless network including a non-terrestrial network (NTN) and TN) via at least a terrestrial network node 222 (e.g., a base station (BS) such as an eNB, gNB, or transmit / receive point (TRP)) and / or at least a non-terrestrial network node 224 (e.g., a satellite). For example, the terrestrial network node 222 may form a TN serving cell for wireless communication with the UE 210, or the terrestrial network node 222 and the non-terrestrial network node 224 may form an NTN serving cell for wireless communication with the UE 210. In some implementations, the network 220 may be a 4G / 5G / B5G / 6G network, and the UE 210 may be a smartphone, tablet computer, laptop computer, or notebook computer. Alternatively, network 220 may be an IoT / NB-IoT / IIoT network, and UE 210 may be an IoT device such as an NB-IoT UE or an improved machine-type communications (eMTC) UE (e.g., a bandwidth-reduced low-complexity (BL) UE or coverage-extended (CE) UE). In such a communication environment, UE 210, network 220, terrestrial network node 222, and / or non-terrestrial network node 224 may implement various schemes related to improved DSR in mobile communications according to this disclosure, as described below. While the proposed schemes may be described individually or separately below, it should be noted that in actual implementations, some or all of the proposed schemes may be used, or otherwise implemented jointly. Naturally, each of the proposed schemes may be used, or otherwise implemented individually or separately.
[0027] Figure 3 illustrates an exemplary scenario 300 of improved DSR processing by an implementation of the present disclosure. In step 302, the UE receives radio resource control (RRC) signaling from the BS. Specifically, the RRC signaling includes configuring a remaining time threshold (represented as remainingTimeThreshold in Figure 3) for the LCG. The remaining time threshold is used to trigger DSR processing for logical channels within the LCG. Data in a logical channel (e.g., each PDCP SDU) is associated with a discard timer (e.g., PDCP discardTimer), and if the remaining time of the discard timer is shorter than the remaining time threshold, the data is considered delay-critical data. If the data is not transmitted before the discard timer expires, the data is discarded. Furthermore, the configuration also includes multiple reporting thresholds (represented as DSR-ReportingThreshold in Figure 3) for the LCG. The reporting thresholds may be provided in a list of remaining time thresholds (e.g., called DSR-reportingThresList) for reporting the amount of UL data buffered within the LCG. In one example, the reporting thresholds may be configured in ascending order (e.g., DSR-ReportingThreshold#1=3 milliseconds (ms), DSR-ReportingThreshold#2=5 ms, and DSR-ReportingThreshold#3=12 ms). The configuration may be included in the MAC-CellGroupConfig information element (IE) within the RRC signaling.
[0028] Next, in step 304, the UE triggers DSR processing for the LCG based on the remaining time threshold. Specifically, DSR processing is triggered when at least one of the logical channels in the LCG holds data in which the remaining time of the associated PDCP discard timer is shorter than the remaining time threshold. In step 306, the UE evaluates the delay state information associated with the reporting threshold. Specifically, for each logical channel in the LCG, the UE may check whether the shortest remaining time of the running PDCP discardTimer among all PDCP SDUs buffered for that logical channel but not transmitted in any MAC PDU has fallen below one of the reporting thresholds, and if so, calculates the total amount of delay-critical data associated with the reporting threshold. In step 308, the UE transmits a DSR MAC CE to the BS containing multiple entries of delay state information associated with the reporting threshold for the LCG. Such a DSR MAC CE is also called a Multiple Entry DSR MAC CE.
[0029] Figure 4 shows an exemplary scenario 400 of the format of the DSR MAC CE according to the implementation of the present disclosure. As shown in Figure 4, the DSR MAC CE may hold delay state information for a plurality of LCGs, each of which has a corresponding LCG that indicates the existence of delay state information for that LCG (i.e., that this LCG has delay state information to report). i Field (for example, LCG) i It has =1). For example, LCG has the corresponding LCG i If the field value is 1, it is considered an available LCG, or the corresponding LCG iIf the value of the field is 0, it is not considered an available LCG. In particular, the LCH delay state information may include a plurality of entries of delay state information, each of which is associated with one of the reporting thresholds. Specifically, the delay state information (i.e., an entry of delay state information) associated with the reporting threshold may include a buffer size table (BT) field, an extension (EXT) field, and a pair of a remaining time field and a buffer size field, and may be reported in two consecutive octets. That is, the DSR MAC CE may have a plurality of pairs of a remaining time field and a buffer size field for the LCG. The EXT field (which was previously reserved bits but is now reused as an extension field) indicates whether there is an additional pair of a remaining time field and a buffer size field in a subsequent entry for the same LCG, that is, whether the next pair of the remaining time field and the buffer size field belongs to the same LCG as the current pair. For example, the EXT field may include 1 bit, and the 1 bit is set to 1 to indicate that there is an additional pair of a remaining time field and a buffer size field in a subsequent entry for the same LCG, or is set to 0 to indicate that there is no additional field in a subsequent entry for the same LCG. The delay state information of different LCGs may be reported in ascending order within the DSR MAC CE based on the LCG i field indicating whether there is delay state information of the LCG i If it exists, it may be reported in ascending order within the DSR MAC CE based on the LCG
[0030] FIG. 5 shows an exemplary scenario 500 of the content of the DSR MAC CE according to an implementation of the present disclosure. As shown in FIG. 5, the available LCG may be identified based on the LCG i field in octet 1. That is, among LCG0 to LCG7, LCG0, LCG2, and LCG5 are the available LCGs (i.e., LCG i(LCG = 1). First, the fields BT1, remaining time 1, and buffer size 1 belong to LCG0, and because the EXT field in octet 2 is 1, the fields BT2, remaining time 2, and buffer size 2 also belong to LCG0. Next, because the EXT field in octet 4 is 0 and LCG2 is the next available LCG after LCG0, the fields BT3, remaining time 3, and buffer size 3 belong to LCG2. Subsequently, because the EXT field in octet 6 is 0 and LCG5 is the next available LCG after LCG2, the fields BT4, remaining time 4, and buffer size 4 belong to LCG5. Finally, because the EXT field in octet 8 is 1, the fields BT5, remaining time 5, and buffer size 5 belong to LCG5. Furthermore, since the EXT field in octet 10 is 0, and there is no LCG available after LCG5, it can be determined that this DSR MAC CE does not have any further pairs of delay information.
[0031] Alternatively, in some implementations, the EXT field may be used to indicate whether the next pair of remaining time and buffer size fields belongs to the next available LCG. To illustrate such an alternative implementation, consider scenario 500: the fields BT1, remaining time 1, and buffer size 1 belong to LCG0, while the fields BT2, remaining time 2, and buffer size 2 belong to LCG2, since the EXT field in octet 2 is 1 and LCG2 is the next available LCG after LCG0. Next, the fields BT3, remaining time 3, and buffer size 3, and BT4, remaining time 4, and buffer size 4 also belong to LCG2, since both the EXT fields in octet 4 and octet 6 are 0. Then, the fields BT5, remaining time 5, and buffer size 5 belong to LCG5, since the EXT field in octet 8 is 1 and LCG5 is the next available LCG after LCG2.
[0032] Alternatively, in some implementations, the EXT field may be used to indicate whether the current pair of the remaining time field and buffer size field belongs to the same LCG as the preceding pair. Figure 6 shows an exemplary scenario 600 of the contents of a DSR MAC CE according to an implementation of the present disclosure. In the first example, if the value of the EXT field remains the same (as the EXT field in the preceding entry), the current pair of the remaining time field and buffer size field belongs to the same LCG as the preceding pair; or, if the value of the EXT field changes (for example, compared to the EXT field in the preceding entry), the current pair of the remaining time field and buffer size field belongs to the next available LCG. Similar to the first example in scenario 600, the fields BT1, remaining time 1, and buffer size 1 belong to LCG0, while the fields BT2, remaining time 2, and buffer size 2 belong to LCG2 because the EXT field in octet 4 is 0, which is different from the EXT field in octet 2, and the next available LCG after LCG0 is LCG2. Next, since the EXT field in octet 6 is the same as the EXT field in octet 4 (0), the fields BT3, remaining time 3, and buffer size 3 also belong to LCG2. Subsequently, since the EXT field in octet 8 is different from the EXT field in octet 6 (1), and because the next available LCG after LCG2 is LCG3, the fields BT4, remaining time 4, and buffer size 4 belong to LCG3. Subsequently, since the EXT field in octet 10 is the same as the EXT field in octet 8 (1), the fields BT5, remaining time 5, and buffer size 5 also belong to LCG3. Note that since the fields BT1, remaining time 1, and buffer size 1 always belong to the first available LCG, the value of the first EXT field (i.e., the EXT field in octet 2) may be set to 1 or 0.
[0033] In the second example, the (absolute) value of the EXT field is used to indicate whether the current pair of the remaining time field and buffer size field belongs to the same LCG as the preceding pair. For example, if EXT=0, the current pair of the remaining time field and buffer size field belongs to the same LCG as the preceding pair, and if EXT=1, the current pair of the remaining time field and buffer size field belongs to the next available LCG. Similar to the second example in Scenario 600, the fields BT1, remaining time 1, and buffer size 1 belong to LCG0, and since both the EXT fields in octet 4 and octet 6 are 0, the fields BT2, remaining time 2, and buffer size 2, and BT3, remaining time 3, and buffer size 3 also belong to LCG0. Next, since the EXT field in octet 8 is 1, and the next available LCG after LCG0 is LCG2, the fields BT4, remaining time 4, and buffer size 4 belong to LCG2. Next, since the EXT field in octet 10 is 1, and the next available LCG after LCG2 is LCG3, the fields BT5, remaining time 5, and buffer size 5 belong to LCG3. Alternatively, in another example, if the EXT field is 1, the current pair of remaining time field and buffer size field belongs to the same LCG as the preceding pair, and if the EXT field is 0, the current pair of remaining time field and buffer size field belongs to the next available LCG. Note that since the fields BT1, remaining time 1, and buffer size 1 always belong to the first available LCG, the value of the first EXT field (i.e., the EXT field in octet 2) may be set to 1, 0, or a reserved value.
[0034] In some implementations, multiple pairs of delay information in an LCG may be grouped based on reporting thresholds configured by the network via RRC messages. For example, if an LCG consists of more than one reporting threshold, delay state information associated with different reporting thresholds within the LCG may be reported sequentially in ascending order based on the reporting threshold values. For example, if the network configures two reporting thresholds for an LCG via MAC-CellGroupConfig IE, the UE may report two corresponding pairs of remaining time fields and buffer size fields for this LCG.
[0035] In some implementations, multiple pairs of delay information in the LCG may be grouped based on PDU sets. For example, if there are four PDU sets in the LCG, the UE may report four corresponding pairs of the remaining time field and buffer size field for the LCG.
[0036] In some implementations, multiple pairs of delay information in the LCG may be grouped based on PDU set importance. For example, if there are three PDU set importance levels among the data in the LCG, the UE may report three corresponding pairs of the remaining time field and buffer size field for the LCG.
[0037] In some implementations, the reserved bit R in the DSR MAC CE (as shown in Figure 1) may be used to indicate the PDU set importance of the corresponding delay information. In one example, if the R field is set to 1, the corresponding pairs of the remaining time field and buffer size field belong to a high-importance PDU set, and if the R field is set to 0, the corresponding pairs of the remaining time field and buffer size field belong to a low-importance PDU set. In another example, if the R field is set to 0, the corresponding pairs of the remaining time field and buffer size field belong to a low-importance PDU set, and if the R field is set to 1, the corresponding pairs of the remaining time field and buffer size field belong to a high-importance PDU set. (Example implementation)
[0038] Figure 7 shows an exemplary communication system 700 having an exemplary communication device 710 and an exemplary network device 720 as an implementation of the present disclosure. Each of the communication device 710 and the network device 720 may perform various functions for implementing the schemes, techniques, processes, and methods described herein relating to improved DSR in mobile communications, including the scenarios / schemes described above and processes 800 and 900 described below.
[0039] The communication device 710 may be part of an electronic device that may be a dual-steer device including one or more UEs, such as a portable or mobile device, a wearable device, a wireless communication device, or a computing device. For example, the communication device 710 may be implemented in a smartphone, a smartwatch, a personal digital assistant, an electronic control unit (ECU) in a vehicle, a digital camera, or a computing device such as a tablet computer, laptop computer, or notebook computer. The communication device 710 may also be part of a machine-type device that may be an IoT, NB-IoT, eMTC, or IIoT UE, such as a fixed or stationary device, a home device, a roadside unit (RSU), a wired communication device, or a computing device. For example, the communication device 710 may be implemented in a smart thermostat, a smart refrigerator, a smart door lock, a wireless speaker, or a home control center. Alternatively, the communication device 710 may be implemented in the form of one or more integrated circuit (IC) chips, such as, for example, one or more single-core processors, one or more multi-core processors, one or more reduced instruction set computing (RISC) processors, or one or more composite instruction set computing (CISC) processors. The communication device 710 may include, for example, at least some of those components shown in Figure 7, such as processor 712. The communication device 710 may further include one or more other components not related to the proposed scheme of this disclosure (e.g., an internal power supply, a display device, and / or a user interface device), and such components of the communication device 710 are therefore not shown in Figure 7 and are not described below for simplicity and brevity.
[0040] The network device 720 may be part of an electronic device that can be a network node such as a satellite, BS, small cell, router, or gateway in a 4G / 5G / B5G / 6G, NR, IoT, NB-IoT, or IIoT network. Alternatively, the network device 720 may be implemented in the form of one or more IC chips, such as one or more single-core processors, one or more multi-core processors, or one or more RISC or CISC processors, for example, but not limited to these. The network device 720 may include at least some of those components shown in Figure 7, such as a processor 722. The network device 720 may further include one or more other components not related to the proposed scheme of this disclosure (e.g., an internal power supply, a display device, and / or a user interface device), and such components of the network device 720 are therefore not shown in Figure 7 and not described below for simplicity and brevity.
[0041] In one embodiment, each of processors 712 and 722 may be implemented as one or more single-core processors, one or more multi-core processors, or one or more CISC processors. That is, although the singular form “processor” is used herein to refer to processors 712 and 722, each of processors 712 and 722 may include multiple processors in some implementations of this disclosure and a single processor in other implementations. In another embodiment, each of processors 712 and 722 may be implemented as hardware (and optionally, firmware) with electronic components including, for example, one or more transistors, one or more diodes, one or more capacitors, one or more resistors, one or more inductors, one or more memristors, and / or one or more varactors, configured and arranged to serve a particular purpose of this disclosure. In other words, in at least some implementations, each of the processors 712 and 722 is an application-specific machine specifically designed, deployed, and configured to perform specific tasks in devices (represented, for example, by the communication device 710) and network nodes (represented, for example, by the network device 720) according to various implementations of the present disclosure.
[0042] In some implementations, the communication device 710 may also include a transceiver 716 coupled to the processor 712 and capable of wirelessly transmitting and receiving data. In some implementations, the transceiver 716 may be capable of wirelessly communicating with different types of UEs and / or wireless networks of different RATs. In some implementations, the transceiver 716 may be equipped with multiple antenna ports (not shown), such as four antenna ports. That is, the transceiver 716 may be equipped with multiple transmitting antennas and multiple receiving antennas for multi-input multiple-output (MIMO) wireless communication. In some implementations, the network device 720 may also include a transceiver 726 coupled to the processor 722. The transceiver 726 may include a transceiver capable of wirelessly transmitting and receiving data. In some implementations, the transceiver 726 may be capable of wirelessly communicating with different types of UEs of different RATs. In some implementations, the transceiver 726 may be equipped with multiple antenna ports (not shown), such as four antenna ports. In other words, the transceiver 726 may be equipped with multiple transmitting antennas and multiple receiving antennas for MIMO wireless communication.
[0043] In some implementations, the communication device 710 may further include a memory 714 coupled to a processor 712 and accessible by the processor 712, in which data can be stored. In some implementations, the network device 720 may further include a memory 724 coupled to a processor 722 and accessible by the processor 722, in which data can be stored. Each of the memories 714 and 724 may include a certain type of random access memory (RAM), such as dynamic RAM (DRAM), static RAM (SRAM), thyristor RAM (T-RAM), and / or zero-capacitor RAM (Z-RAM). Alternatively or additionally, each of the memories 714 and 724 may include a certain type of read-only memory (ROM), such as mask ROM, programmable ROM (PROM), erasable programmable ROM (EPROM), and / or electrically erasable programmable ROM (EEPROM). Alternatively, or additionally, each of memory 714 and memory 724 may include certain types of non-volatile random-access memory (NVRAM), such as flash memory, solid-state memory, ferroelectric RAM (FeRAM), magnetoresistive RAM (MRAM), and / or phase-change memory.
[0044] Each of the communication device 710 and the network device 720 may be a communication entity capable of communicating with each other using the various schemes proposed in this disclosure. For illustrative purposes, without limitation, a description of the capabilities of the communication device 710 as an UE and the network device 720 as a network node (e.g., BS) is provided below with respect to processes 800 and 900. (Example process)
[0045] Figure 8 shows an exemplary process 800 according to an implementation of the present disclosure. Process 800 may be an exemplary implementation of the above scenario / method, whether in part or in whole, with respect to improved DSR in mobile communications. Process 800 may represent an embodiment of the implementation of features of the communication device 710. Process 800 may include one or more operations, actions or functions, as indicated by one or more of blocks 810 to 830. The various blocks of process 800 are shown as separate blocks, but may be divided into additional blocks, combined into fewer blocks, or deleted depending on the desired implementation. Furthermore, the blocks of process 800 may be executed in the order shown in Figure 8, or alternatively, in a different order. Process 800 may be implemented by or from the communication device 710 or any suitable UE or machine-type device. For illustrative purposes only and without limitation of scope, process 800 is described below in the context of the communication device 710 as a UE and the network device 720 as a network node (e.g., a BS such as a gNB). Process 800 may start in block 810.
[0046] In block 810, process 800 may involve the processor 712 of communication device 710 receiving a configuration from network device 720 via transceiver 716, where the configuration includes a remaining time threshold for triggering DSR processing for one or more logical channels in LCG. Process 800 may proceed from block 810 to block 820.
[0047] In block 820, process 800 may involve processor 712 triggering DSR processing based on a remaining time threshold. Process 800 may then proceed from block 820 to block 830.
[0048] In block 830, process 800 transmits a DSR MAC CE to network device 720 via transceiver 716 in response to processor 712 triggering DSR processing, wherein the DSR MAC CE includes a plurality of entries of delay state information for LCG, each of which may include a pair of remaining time field and buffer size field, and an EXT field indicating whether an additional pair of remaining time field and buffer size field exists for LCG in a subsequent entry.
[0049] In some implementations, the configuration may further include multiple reporting thresholds for remaining time to report LCG delay state information, with each of the multiple entries for delay state information being associated with one of the multiple reporting thresholds.
[0050] In some implementations, for each of the multiple entries in the delay status information, the remaining time field may indicate the shortest remaining time among all PDCP SDUs that have not been transmitted in any MAC PDU and are associated with one of the multiple reporting thresholds (i.e., the reporting threshold to which the current entry is associated), and the buffer size field may indicate the total amount of delay reporting data associated with one of the multiple reporting thresholds.
[0051] In some implementations, the configuration may further include a DSR reporting threshold list containing multiple reporting thresholds.
[0052] In some implementations, the EXT field may contain one bit, which is set to 1 to indicate that an additional pair of remaining time and buffer size fields exists for the same LCG in a subsequent entry, or to 0 to indicate that no additional fields exist for the same LCG in a subsequent entry.
[0053] In some implementations, each of the multiple entries in the LCG's delayed state information may be reported as two consecutive octets of the DSR MAC CE.
[0054] In some implementations, multiple entries in LCG delay state information may be reported sequentially in ascending order based on the values of multiple reporting thresholds.
[0055] In some implementations, delay state information for different LCGs may be included in the DSR MAC CE in ascending order based on the LCG field corresponding to the different LCG, and each LCG field may indicate whether delay state information for one LCG exists.
[0056] In some implementations, the configuration may be received within the MAC-CellGroupConfig IE of the RRC signaling.
[0057] In some implementations, each of the multiple entries in the LCG's delay state information may include a BT field, and the EXT field may be positioned between the BT field and the pair of remaining time field and buffer size field.
[0058] In some implementations, DSR processing may be triggered when at least one of the one or more logical channels in the LCG holds data whose associated PDCP discard timer's remaining time is shorter than the remaining time threshold.
[0059] Figure 9 shows an exemplary process 900 according to an implementation of the present disclosure. Process 900 may be an exemplary implementation of the above scenario / method, whether in part or in whole, with respect to improved DSR in mobile communications. Process 900 may represent an embodiment of the implementation of features of network device 720. Process 900 may include one or more operations, actions or functions, as indicated by one or more of blocks 910 to 920. The various blocks of process 900 are shown as separate blocks, but may be divided into additional blocks, combined into fewer blocks, or deleted, depending on the desired implementation. Furthermore, the blocks of process 900 may be executed in the order shown in Figure 9, or alternatively, in a different order. Process 900 may be implemented by or in network device 720 and any variation thereof. For illustrative purposes only, and without limitation of scope, process 900 is described below in the context of communication device 710 as UE and network device 720 as network node (e.g., BS such as gNB). Process 900 may start in block 910.
[0060] In block 910, process 900 may involve the processor 722 of network device 720 transmitting a configuration to communication device 710 via transceiver 726, where the configuration includes a remaining time threshold for triggering DSR processing for one or more logical channels in LCG. Process 900 may proceed from block 910 to block 920.
[0061] In block 920, process 900 includes the processor 722 receiving a DSR MAC CE from the communication device 710 via the transceiver 726 during DSR processing, wherein the DSR MAC CE includes a plurality of entries of delay state information for LCG, each of which may include a pair of remaining time field and buffer size field, and an EXT field indicating whether an additional pair of remaining time field and buffer size field exists for LCG in a subsequent entry.
[0062] In some implementations, the configuration may further include multiple reporting thresholds for remaining time to report LCG delay state information, with each of the multiple entries for delay state information being associated with one of the multiple reporting thresholds.
[0063] In some implementations, for each of the multiple entries in the delay status information, the remaining time field may indicate the shortest remaining time among all PDCP SDUs that have not been transmitted in any MAC PDU and are associated with one of the multiple reporting thresholds (i.e., the reporting threshold to which the current entry is associated), and the buffer size field may indicate the total amount of delay reporting data associated with one of the multiple reporting thresholds.
[0064] In some implementations, the configuration may further include a DSR reporting threshold list containing multiple reporting thresholds.
[0065] In some implementations, the EXT field may contain one bit, which is set to 1 to indicate that an additional pair of remaining time and buffer size fields exists for the same LCG in a subsequent entry, or to 0 to indicate that no additional fields exist for the same LCG in a subsequent entry.
[0066] In some implementations, each of the multiple entries in the LCG's delayed state information may be reported as two consecutive octets of the DSR MAC CE.
[0067] In some implementations, multiple entries in LCG delay state information may be reported sequentially in ascending order based on the values of multiple reporting thresholds.
[0068] In some implementations, delay state information for different LCGs may be included in the DSR MAC CE in ascending order based on the LCG field corresponding to the different LCG, and each LCG field may indicate whether delay state information for one LCG exists.
[0069] In some implementations, the configuration may be transmitted within the MAC-CellGroupConfig IE of RRC signaling.
[0070] In some implementations, each of the multiple entries in the LCG's delay state information may include a BT field, and the EXT field may be positioned between the BT field and the pair of remaining time field and buffer size field.
[0071] In some implementations, DSR processing may be triggered by the communication device 710 when at least one of the one or more logical channels in the LCG holds data whose associated PDCP discard timer remaining time is shorter than the remaining time threshold.
[0072] Considering the embodiments described above, it is noteworthy that applying the method of this disclosure improves DSR processing by enabling the DSR MAC CE to include multiple entries of delay state information for LCGs, and the DSR MAC CE to include an extension field indicating whether an additional pair of remaining time fields and buffer size fields exists for the same LCG in a subsequent entry. In other words, the extension field indicates whether the next entry of delay state information (i.e., the next pair of remaining time fields and buffer size fields) belongs to the same LCG as the current entry (i.e., the current pair of remaining time fields and buffer size fields). Accordingly, the improved DSR processing may report more detailed information on delay-critical data (e.g., distribution of remaining times) to improve the efficiency and effectiveness of scheduling UL data and resources. (postscript)
[0073] From the foregoing, it will be understood that various implementations of the Disclosure are described herein for illustrative purposes only and can be modified in various ways without departing from the scope and spirit of the Disclosure. Accordingly, the various implementations disclosed herein are not intended to limit the true scope and spirit as set forth by the following claims.
Claims
1. A transceiver that communicates wirelessly with a network node during operation; and A processor is communicatively coupled to the aforementioned transceiver, thereby executing procedures during operation. Equipped with, The above procedure is, A procedure for receiving a configuration from the network node via the transceiver, wherein the configuration includes a remaining time threshold for triggering delayed status reporting (DSR) processing for one or more logical channels in a logical channel group (LCG); A procedure for triggering the DSR process based on the remaining time threshold; and A procedure for transmitting a DSR media access control (MAC) control element (CE) to the network node via the transceiver in response to triggering the DSR processing, wherein the DSR MAC CE includes a plurality of entries of delay state information for the LCG, each of which includes a pair of remaining time fields and buffer size fields, and an extension (EXT) field indicating whether an additional pair of the remaining time fields and buffer size fields exists for the LCG in a subsequent entry. including, Device.
2. The apparatus according to claim 1, wherein the configuration further includes a plurality of reporting thresholds for remaining time to report the delay state information of the LCG, each of the plurality of entries of the delay state information is associated with one of the plurality of reporting thresholds, and the configuration further includes a DSR reporting threshold list comprising the plurality of reporting thresholds.
3. The apparatus according to claim 2, wherein for each of the plurality of entries in the delay state information, the remaining time field indicates the shortest remaining time among all Packet Data Convergence Protocol (PDCP) service data units (SDUs) that are not transmitted in any MAC protocol data unit (PDU) and are associated with one of the plurality of reporting thresholds, and the buffer size field indicates the total amount of delay reporting data associated with one of the plurality of reporting thresholds.
4. The apparatus according to claim 1, wherein the EXT field includes one bit, which is set to 1 to indicate that the additional pair of the remaining time field and the buffer size field exists for the same LCG in the subsequent entry, or is set to 0 to indicate that the additional field does not exist for the same LCG in the subsequent entry.
5. The apparatus according to claim 2, wherein each of the plurality of entries of the delay state information of the LCG is reported in two consecutive octets of the DSR MAC CE, and the plurality of entries of the delay state information of the LCG are reported sequentially in ascending order based on the values of the plurality of reporting thresholds.
6. The apparatus according to claim 1, wherein the delay state information of different LCGs is included in the DSR MAC CE in ascending order based on the LCG fields corresponding to the different LCGs, and each of the LCG fields indicates whether the delay state information of one LCG exists.
7. The apparatus according to claim 1, wherein the configuration is received within the MAC-CellGroupConfig information element (IE) of the radio resource control (RRC) signaling.
8. The apparatus according to any one of claims 1 to 7, wherein each of the plurality of entries in the delay state information of the LCG includes a buffer size table (BT) field, and the EXT field is positioned between the BT field and the pair of the remaining time field and the buffer size field.
9. A transceiver that communicates wirelessly with the device during operation; and A processor is communicatively coupled to the aforementioned transceiver, thereby executing procedures during operation. Equipped with, The above procedure is, A procedure for transmitting a configuration to the device via the transceiver, wherein the configuration includes a remaining time threshold for triggering delayed state reporting (DSR) processing for one or more logical channels in a logical channel group (LCG); and A step in the DSR processing to receive a DSR media access control (MAC) control element (CE) from the device via the transceiver, wherein the DSR MAC CE includes a plurality of entries of delay state information of the LCG, each of which includes a pair of remaining time field and buffer size field, and an extension (EXT) field indicating whether an additional pair of the remaining time field and buffer size field exists for the LCG in a subsequent entry. including, Network node.
10. The network node according to claim 9, wherein the configuration further includes a plurality of reporting thresholds for remaining time to report the delay state information of the LCG, each of the plurality of entries of the delay state information is associated with one of the plurality of reporting thresholds, and the configuration further includes a DSR reporting threshold list comprising the plurality of reporting thresholds.
11. The network node according to claim 10, wherein for each of the plurality of entries in the delay state information, the remaining time field indicates the shortest remaining time among all Packet Data Convergence Protocol (PDCP) service data units (SDUs) that have not been transmitted in any MAC protocol data unit (PDU) and are associated with one of the plurality of reporting thresholds, and the buffer size field indicates the total amount of delay reporting data associated with one of the plurality of reporting thresholds.
12. The network node according to claim 9, wherein the EXT field includes one bit, which is set to 1 to indicate that the additional pair of the remaining time field and the buffer size field exists for the same LCG in the subsequent entry, or is set to 0 to indicate that the additional field does not exist for the same LCG in the subsequent entry.
13. The network node according to claim 10, wherein each of the plurality of entries of the delay state information of the LCG is reported in two consecutive octets of the DSR MAC CE, and the plurality of entries of the delay state information of the LCG are reported sequentially in ascending order based on the values of the plurality of reporting thresholds.
14. The network node according to claim 9, wherein the delay state information of different LCGs is included in the DSR MAC CE in ascending order based on the LCG fields corresponding to the different LCGs, and each of the LCG fields indicates whether the delay state information of one LCG exists.
15. The configuration is transmitted within the MAC-CellGroupConfig information element (IE) of the radio resource control (RRC) signaling, and each of the plurality of entries of the delay state information of the LCG includes a buffer size table (BT) field, and the EXT field is positioned between the BT field and the pair of the remaining time field and the buffer size field, according to any one of claims 9 to 14.