Semiconductor equipment

Abstract

To suppress the reduction in the area of ​​the main cell region even when a temperature-sensitive diode is installed. [Solution] The semiconductor device 10, which is a SiCMOSFET, comprises a main cell 18A provided on a semiconductor substrate 30, an insulating film 39 covering the main cell 18A, an emitter electrode 21 laminated on the insulating film 39, a temperature-sensing diode having a first electrode and a second electrode for detecting temperature, and an anode electrode pad for connecting the first electrode to the outside. The emitter electrode 21 has an emitter electrode pad 11 that is electrically connected to the second electrode in the region to which a first conductive member for connecting the emitter electrode 21 to the outside is joined, and a cathode electrode pad 12 provided at a position adjacent to the emitter electrode pad 11. Viewed from the z direction, the main cell 18A is provided in both the region RE overlapping with the emitter electrode pad 11 and the region RK overlapping with the cathode electrode pad 12 of the semiconductor substrate 30.

Description

[Technical Field]

[0001] This disclosure relates to semiconductor devices. [Background technology]

[0002] For example, switching elements such as IGBTs (Insulated Gate Bipolar Transistors) used in automotive inverter devices tend to generate heat because they rapidly switch between supplying and interrupting current. Therefore, to prevent the temperature of the switching element from exceeding the operating range, the switching element may be equipped with a temperature-sensitive diode configured to detect the temperature of the switching element (see, for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2017-103272

[0004] [overview] Incidentally, when a temperature-sensitive diode is mounted on a switching element, it becomes necessary to provide space in the switching element to bring the anode and cathode of the temperature-sensitive diode outside the diode. This reduces the area of ​​the switching element where the transistor is formed.

[0005] A semiconductor device according to one aspect of the present disclosure comprises a semiconductor layer, a cell provided on the semiconductor layer, an insulating film covering the cell, a main electrode portion laminated on the insulating film, a temperature-sensing diode for detecting temperature and having a first electrode and a second electrode, and a diode connection electrode for connecting the first electrode to the outside, wherein the main electrode portion has a first region to which a first conductive member for connecting the main electrode portion to the outside is joined and electrically connected to the second electrode, and a second region that is a different region from the first region when viewed in the thickness direction of the semiconductor layer and is provided at a position adjacent to the first region, and the cell is a SiCMOSFET provided in both a first semiconductor region overlapping with the first region and a second semiconductor region overlapping with the second region of the semiconductor layer when viewed in the thickness direction of the semiconductor layer. [Brief explanation of the drawing]

[0006] [Figure 1] Figure 1 is a plan view of a semiconductor device according to the first embodiment. [Figure 2] Figure 2 is a plan view of the semiconductor device shown in Figure 1 with the protective insulating film removed. [Figure 3] Figure 3 is a schematic plan view showing the main cell region, outer peripheral region, and intermediate region of the semiconductor device shown in Figure 2. [Figure 4] Figure 4 is a plan view of the semiconductor device shown in Figure 1 with a conductive member attached. [Figure 5] Figure 5 is a schematic cross-sectional view showing a portion of the main cell region's cross-sectional structure. [Figure 6] Figure 6 is a schematic cross-sectional view showing the cross-sectional structure of parts of both the main cell region and the intermediate region. [Figure 7] Figure 7 is a schematic circuit diagram of the semiconductor device according to the first embodiment. [Figure 8] Figure 8 is a schematic plan view of a temperature-sensitive diode and a protection diode mounted on a semiconductor device. [Figure 9] Figure 9 is a schematic plan view showing the temperature-sensing diode and protection diode in Figure 8 with the wiring connected. [Figure 10] Figure 10 is a cross-sectional view taken along line 10-10 of the temperature-sensitive diode in Figure 9. [Figure 11] Figure 11 is a schematic plan view showing the positional relationship between the through-wiring and the temperature-sensitive diode among the wirings connected to the temperature-sensitive diode in Figure 9. [Figure 12] Figure 12 is a cross-sectional view taken along line 12-12 of the protection diode in Figure 9. [Figure 13] Figure 13 is a cross-sectional view taken along line 13-13 of the protection diode in Figure 9. [Figure 14] Figure 14 is a plan view of a semiconductor device of a comparative example. [Figure 15] Figure 15 is a cross-sectional view taken along line 15-15 of the semiconductor device in Figure 14. [Figure 16] Figure 16 is a plan view of a semiconductor device of the second embodiment. [Figure 17] Figure 17 is a plan view of a state in which a conductive member is joined to the semiconductor device in Figure 16. [Figure 18] Figure 18 is a schematic plan view of a temperature-sensitive diode and a protection diode mounted on a semiconductor device of the third embodiment. [Figure 19] Figure 19 is a schematic plan view of a state in which wirings are connected to the temperature-sensitive diode and the protection diode in Figure 18. [Figure 20] Figure 20 is a cross-sectional view taken along line 20-20 of the temperature-sensitive diode in Figure 19. [Figure 21] Figure 21 is a cross-sectional view taken along line 21-21 of the protection diode in Figure 19. [Figure 22] Figure 22 is a schematic plan view of a diode cell of a temperature-sensitive diode of a modification example. [Figure 23] Figure 23 is a schematic plan view of a diode cell of a temperature-sensitive diode of a modification example. [Figure 24] Figure 24 is a schematic plan view of a diode cell of a temperature-sensitive diode of a modification example. [Figure 25] Figure 25 is a schematic plan view of a diode cell of a temperature-sensitive diode of a modification example. [Figure 26] Figure 26 is a schematic plan view of the diode cell of the modified temperature-sensing diode. [Figure 27] Figure 27 is a schematic plan view showing the modified example with wiring connected to the temperature-sensing diode and protection diode. [Figure 28] Figure 28 is a plan view showing the modified temperature-sensing diode with the wiring connected.

[0007] [Detailed explanation] The embodiments of the semiconductor device will be described below with reference to the drawings. The embodiments shown below are examples of configurations and methods for realizing the technical concept, and the materials, shapes, structures, arrangements, dimensions, etc. of each component are not limited to those described below.

[0008] [First Embodiment] The semiconductor device 10 of the first embodiment will be described with reference to Figures 1 to 11. As shown in Figure 1, the semiconductor device 10 is a trench-gate type IGBT (Insulated Gate Bipolar Transistor) equipped with a temperature-sensitive diode 40P for detecting the temperature of the semiconductor device 10. This semiconductor device 10 is used, for example, as a switching element in an in-vehicle inverter device. In this case, a current of, for example, 5A to 1000A flows through the semiconductor device 10.

[0009] The semiconductor device 10 is formed, for example, in the shape of a rectangular flat plate. The semiconductor device 10 has a main surface 10s, a back surface 10r (see Figure 5) facing the opposite side of the main surface 10s, and four side surfaces 10a to 10d formed between the main surface 10s and the back surface 10r. The side surfaces 10a to 10d are, for example, surfaces that connect the main surface 10s and the back surface 10r, and are perpendicular to both the main surface 10s and the back surface 10r. The main surface 10s is formed, for example, in the shape of a square. In this embodiment, the length of one side of the main surface 10s is about 11 mm. That is, the chip size of the semiconductor device 10 in this embodiment is 11 mm.

[0010] In the following description, the direction in which the main surface 10s and the back surface 10r of the device face is referred to as the "z-direction." The z-direction can also be said to be the height direction of the semiconductor device 10. Two mutually orthogonal directions that are perpendicular to the z-direction are referred to as the "x-direction" and the "y-direction." In this embodiment, the side surfaces 10a and 10b of the device constitute both end surfaces in the x-direction of the semiconductor device 10, and the side surfaces 10c and 10d of the device constitute both end surfaces in the y-direction of the semiconductor device 10.

[0011] Figure 2 shows the electrode configuration of the semiconductor device 10. As shown in Figure 2, the semiconductor device 10 includes an emitter electrode 21, an anode electrode 22, a gate electrode 23, and a current sense electrode 24. Here, the emitter electrode 21 corresponds to the "main electrode section," and the anode electrode 22 corresponds to the "connecting electrode for the diode."

[0012] Furthermore, the semiconductor device 10 includes a gate finger 26 electrically connected to the gate electrode 23. The gate finger 26 is for quickly supplying the current supplied to the gate electrode 23 to the main cell in the portion of the emitter electrode 21 that is far from the gate electrode 23. Also, as shown in Figures 5 and 7, the semiconductor device 10 includes a collector electrode 27. In this embodiment, the collector electrode 27 is formed over the entire surface of the back surface 10r of the device. Note that in Figures 1, 3, and 4, the gate finger 26 is omitted for convenience.

[0013] Viewed from the z-direction, the emitter electrode 21 is formed over most of the main surface 10s of the device. The anode electrode 22, gate electrode 23, and current sense electrode 24 are each located in the electrode placement region 10ce at both ends of the main surface 10s in the y-direction, closer to the side surface 10c of the device. These electrodes 22-24 are aligned with each other in the y-direction and spaced apart from each other in the x-direction.

[0014] The emitter electrode 21 has electrode housing portions 21aa, 21ab, a diode arrangement portion 21b, and a pair of gate finger housing portions 21d. The electrode housings 21aa and 21ab are provided at the ends of the emitter electrode 21 in the y-direction that are closer to the device side surface 10c. Electrode housing 21aa is the portion that houses the anode electrode 22 and the gate electrode 23, and has a concave shape. Electrode housing 21ab is the portion that houses the current sense electrode 24, and has a concave shape. Electrode housing 21aa is positioned closer to the device side surface 10a than electrode housing 21ab in the x-direction.

[0015] The anode electrode 22, gate electrode 23, and current sense electrode 24 housed in the electrode housings 21aa and 21ab are arranged to be aligned with each other in the y-direction and spaced apart from each other in the x-direction. In this embodiment, the anode electrode 22, gate electrode 23, and current sense electrode 24 are arranged in the order of anode electrode 22, gate electrode 23, and current sense electrode 24 as you move from the device side surface 10a to the device side surface 10b in the x-direction.

[0016] In the emitter electrode 21, the portion of the concave shape that constitutes the electrode housing portion 21aa that is closer to the side surface 10a of the device, in other words, the portion of the emitter electrode 21 adjacent to the anode electrode 22 in the x direction, has a protruding portion 21e that protrudes toward the anode electrode 22.

[0017] The portion of the emitter electrode 21 between the electrode housing portion 21aa and the electrode housing portion 21ab in the x-direction constitutes the emitter sense region 21f, which forms the emitter sense electrode pad 16 described later. The emitter sense region 21f constitutes a part of the electrode housing portion 21aa and a part of the electrode housing portion 21ab, respectively.

[0018] The diode arrangement section 21b includes the portion where the temperature-sensitive diode 40P is arranged and is connected to the electrode housing section 21aa. The portion of the diode arrangement section 21b where the temperature-sensitive diode 40P is arranged is located approximately in the center of the emitter electrode 21 in the x and y directions. Therefore, it can also be said that the temperature-sensitive diode 40P is located approximately in the center of the emitter electrode 21 in the x and y directions. Furthermore, as shown in Figure 2, it can also be said that the temperature-sensitive diode 40P is located approximately in the center of the main surface 10s of the device in the x and y directions.

[0019] The diode arrangement area 21b is the portion where the emitter electrode 21 is not formed. The portion of the diode arrangement area 21b where the temperature-sensitive diode 40P is placed is formed in a rectangular shape when viewed from the z direction. The emitter electrode 21 is formed to surround the temperature-sensitive diode 40P in order to constitute the diode arrangement area 21b. For this reason, it can be said that the emitter electrode 21 has an adjacent region 21P (the region of the emitter electrode 21 enclosed by the dashed line in Figure 2) adjacent to the temperature-sensitive diode 40P. The adjacent region 21P is the region surrounding the diode arrangement area 21b. In this embodiment, the adjacent region 21P is formed to surround the entire area of ​​the temperature-sensitive diode 40P near the device sides 10a, 10b, and 10d, and a part of the area near the device side 10c. In other words, the adjacent region 21P has the entire area of ​​the temperature-sensitive diode 40P near the device sides 10a, 10b, and 10d, and a part of the area near the device side 10c, and an adjacent portion.

[0020] The diode arrangement section 21b extends in the y-direction from the portion of the diode arrangement section 21b where the temperature-sensitive diode 40P is arranged to the electrode housing section 21aa, thereby connecting to the electrode housing section 21aa.

[0021] A pair of gate finger housings 21d are distributed on both sides of the diode arrangement 21b in the x-direction. One gate finger housing 21d extends from the electrode housing 21aa along the y-direction, and the other gate finger housing 21d extends from the electrode housing 21ab along the y-direction. A portion of the gate finger 26 is arranged in each gate finger housing 21d.

[0022] Each gate finger housing portion 21d extends along the y-direction from the electrode housing portions 21aa and 21ab of the emitter electrode 21. The tip of each gate finger housing portion 21d is positioned closer to the electrode housing portions 21aa and 21ab than the end of the emitter electrode 21 in the y-direction that is closer to the device side surface 10d.

[0023] The gate finger 26 surrounds the emitter electrode 21 and extends both within a pair of gate finger housings 21d and within the diode arrangement section 21b. The gate finger 26 within the diode arrangement section 21b is formed to surround the temperature-sensitive diode 40P and the protection diode 40Q. The gate finger 26 has a surface-side wiring and an internal wiring connected to the surface-side wiring. The surface-side wiring is made of, for example, a metallic material, and the internal wiring is made of, for example, polysilicon. The surface-side wiring is made of, for example, an AlCu-containing material (an alloy of aluminum and copper) and is formed in the z-direction at the same position as the emitter electrode 21 and each electrode 22-24. The internal wiring is located closer to the back surface 10r of the device than the surface-side wiring in the z-direction.

[0024] Gate fingers 26A are provided between the diode arrangement section 21b and the pair of gate finger housing sections 21d and the end of the emitter electrode 21 in the y-direction that is closer to the side surface 10d of the device. The gate fingers 26A have internal wiring connected to the internal wiring of the gate fingers 26. On the other hand, the gate fingers 26A do not have surface-side wiring. Therefore, when viewed from the z-direction, the gate fingers 26A are positioned closer to the back surface 10r of the device than the emitter electrode 21, at a position where they overlap with the emitter electrode 21.

[0025] As shown in Figure 1, a protective insulating film 17 is provided on the main surface 10s of the device so as to cover each electrode 21 to 24. The protective insulating film 17 is an organic protective film that protects the semiconductor device 10, and is formed of a material including, for example, polyimide (PI).

[0026] The protective insulating film 17 is provided with first to sixth openings 17A to 17F that expose each electrode 21 to 24. Each electrode 21 to 24 exposed by the first to sixth openings 17A to 17F constitutes a pad for conductive material from outside the semiconductor device 10 to join. Such pads include an emitter electrode pad 11, a cathode electrode pad 12, an anode electrode pad 13, a gate electrode pad 14, a current sense electrode pad 15, and an emitter sense electrode pad 16.

[0027] The first to sixth openings 17A to 17F provided in the protective insulating film 17 are spaced apart from each other when viewed from the z direction. The emitter electrode pad 11 is the portion of the emitter electrode 21 exposed through the first opening 17A, and constitutes the emitter of the IGBT. As shown in Figure 1, the first opening 17A opens up most of the emitter electrode 21. The first opening 17A opens up the portion of the emitter electrode 21 that is closer to the device side 10d than the electrode housing portions 21aa and 21ab. More specifically, the protective insulating film 17 is provided at positions that overlap with the pair of gate finger housing portions 21d and at positions that overlap with the diode arrangement portion 21b and the gate finger 26A, respectively, when viewed from the z direction.

[0028] As shown in Figure 4, the emitter electrode pad 11 is joined to the first conductive member CB by a conductive bonding material such as solder. The first conductive member CB is, for example, a clip and is formed by press-forming a flat metal plate. As the metal material constituting the first conductive member CB, for example, Cu (copper) or Al (aluminum) can be used. Thus, in this embodiment, the emitter electrode pad 11 corresponds to the "first bonding region". The first bonding region occupies most of the emitter electrode 21 and can also be said to be the part of the emitter electrode 21 that is closer to the device side 10d than the electrode housing portions 21aa and 21ab. The emitter electrode pad 11 is provided with a diode arrangement portion 21b. In other words, the first bonding region, which is the emitter electrode pad 11, includes the adjacent region 21P.

[0029] As shown in Figure 1, the cathode electrode pad 12 is the portion of the emitter electrode 21 exposed from the second opening 17B, and constitutes the cathode of the temperature-sensitive diode 40P. As shown in Figure 2, the second opening 17B opens the end of the emitter electrode 21 that is closer to the device side surface 10a and the device side surface 10c. The second opening 17B opens a part of the protruding portion 21e of the emitter electrode 21. In other words, the second opening 17B opens the portion of the emitter electrode 21 that is adjacent to the anode electrode 22 with a gap in the x direction. The second opening 17B is located adjacent to the first opening 17A with a gap in the y direction. That is, the cathode electrode pad 12 can also be said to be located adjacent to the emitter electrode pad 11 with a gap in the y direction.

[0030] The cathode electrode pad 12 is positioned closer to the side surface 10c of the device than to the center in the y-direction of the main surface 10s of the device. The cathode electrode pad 12 is adjacent to the anode electrode 22 in the x-direction. The cathode electrode pad 12 and the anode electrode 22 are positioned side by side along the side surface 10c of the device when viewed from the z-direction.

[0031] As shown in Figure 4, a second conductive member CWA is bonded to the cathode electrode pad 12. The second conductive member CWA is, for example, a bonding wire formed by a wire bonding apparatus. The second conductive member CWA is composed of, for example, Al, Cu, Au (gold), etc. Thus, in this embodiment, the cathode electrode pad 12 corresponds to the "second bonding region". Since the cathode electrode pad 12 is located in a different region from the emitter electrode pad 11, it can also be said that the second bonding region is located in a different region from the first bonding region. In this way, the emitter electrode 21 has both a first bonding region and a second bonding region.

[0032] As shown in Figure 1, the first opening 17A and the second opening 17B of the protective insulating film 17 are spaced apart from each other, so the protective insulating film 17 exists between the first opening 17A and the second opening 17B. In other words, the protective insulating film 17 has a partition wall region 17a that separates the first opening 17A and the second opening 17B. In this embodiment, the partition wall region 17a has a first wall portion that separates the first opening 17A and the second opening 17B in the x direction, and a second wall portion that separates the first opening 17A and the second opening 17B in the y direction. Furthermore, since the third openings 17C to 17F and the first opening 17A are spaced apart from each other, the protective insulating film 17 exists between the third openings 17C to 17F and the first opening 17A.

[0033] In the semiconductor device 10 configured in this way, as shown in Figure 7, when the first conductive member CB is bonded to the emitter electrode pad 11 and the second conductive member CWA is bonded to the cathode electrode pad 12, the conductive bonding material such as solder between the first conductive member CB and the emitter electrode pad 11 is prevented from penetrating the cathode electrode pad 12 by the partition region 17a. Similarly, the conductive bonding material is prevented from penetrating the anode electrode pad 13, gate electrode pad 14, current sense electrode pad 15, and emitter sense electrode pad 16, respectively.

[0034] As shown in Figure 1, the anode electrode pad 13 is the portion of the anode electrode 22 exposed from the third opening 17C, and constitutes the anode of the temperature-sensitive diode 40P. The third opening 17C is formed in a rectangular shape that is slightly smaller than the anode electrode 22 when viewed from the z direction. A third conductive member CWB is bonded to the anode electrode pad 13.

[0035] The gate electrode pad 14 is the portion of the gate electrode 23 exposed from the fourth opening 17D, and constitutes the gate of the IGBT. The fourth opening 17D is formed in a rectangular shape, slightly smaller than the gate electrode 23 when viewed from the z direction. A fourth conductive member CWC is bonded to the gate electrode pad 14.

[0036] The current sense electrode pad 15 is the portion of the current sense electrode 24 exposed from the fifth opening 17E, and constitutes a terminal for extracting information for detecting the current flowing through the IGBT to the outside. The fifth opening 17E is formed in a rectangular shape that is slightly smaller than the current sense electrode 24 when viewed from the z direction. The fifth conductive member CWD is bonded to the current sense electrode pad 15.

[0037] The emitter sense electrode pad 16 is the portion of the emitter electrode 21 exposed from the sixth opening 17F. The sixth opening 17F is formed in a rectangular shape, slightly smaller than the emitter sense region 21f when viewed from the z direction. The sixth conductive member CWE is bonded to the emitter sense electrode pad 16.

[0038] The third to sixth conductive members CWB, CWC, CWD, and CWE are each made of the same material as the second conductive member CWA, and are, for example, bonding wires formed by a wire bonding apparatus.

[0039] The gate finger 26 extends from the gate electrode 23 toward the device side 10a and device side 10d. A portion of the gate finger 26 extends in the y-direction toward the gate finger housing 21d, bypassing the anode electrode 22 and passing closer to the device side 10c. Another portion of the gate finger 26 extends from the gate electrode 23 toward the device side 10b and device side 10d. More specifically, another portion of the gate finger 26 extends in the y-direction toward the gate finger housing 21d, bypassing the emitter sense region 21f and passing closer to the device side 10c.

[0040] As shown in Figure 3, when viewed from the z direction, the semiconductor device 10 has a main cell region 18 on which the main cell 18A (see Figure 6) is formed, an outer peripheral region 19 surrounding the main cell region 18, and an intermediate region 20 surrounded by the main cell region 18 and the outer peripheral region 19.

[0041] The main cell region 18 is formed over most of the main surface 10s of the apparatus. In this embodiment, the main cell region 18 is formed in a region that overlaps with the emitter electrode 21 when viewed from the z direction. It can also be said that the main cell region 18 is formed in a region that overlaps with both the emitter electrode pad 11 and the cathode electrode pad 12 (see Figure 1 for both). On the other hand, even though the main cell region 18 overlaps with the emitter electrode 21, it is not formed in a position that overlaps with each gate finger 26A (see Figure 2) in the z direction. In other words, the main cell region 18 is divided into four regions by each gate finger 26A. The four main cell regions 18 are spaced apart from each other in the x direction. Of the four main cell regions 18, the main cell region 18 closest to the apparatus side surface 10a constitutes a region that overlaps with both the emitter electrode pad 11 and the cathode electrode pad 12.

[0042] The outer peripheral region 19 is a region where a termination structure is provided to improve the dielectric strength of the semiconductor device 10. An example of a termination structure includes a guard ring surrounding the main cell region 18. The main cell 18A (see Figure 5) is not formed in the outer peripheral region 19.

[0043] The intermediate region 20 is the region that overlaps with the anode electrode 22, gate electrode 23, and current sense electrode 24 when viewed from the z direction. The intermediate region 20 is the region outside the main cell region 18, in other words, the region where the main cell 18A is not formed.

[0044] Figure 5 shows an example of the cross-sectional structure of the semiconductor device 10 in the main cell region 18. As shown in Figure 5, the semiconductor device 10 includes a semiconductor substrate 30. The semiconductor substrate 30 is, for example, n - It is formed from a material containing silicon (Si) of a specific type. The semiconductor substrate 30 has a thickness of, for example, 50 μm to 200 μm.

[0045] The semiconductor substrate 30 has a substrate surface 30s and a substrate back surface 30r that face opposite each other in the z direction. In other words, the z direction can also be said to be the thickness direction of the semiconductor substrate 30. In this embodiment, the semiconductor substrate 30 corresponds to a "semiconductor layer". Therefore, the z direction corresponds to the thickness direction of the semiconductor layer. Thus, "viewed from the z direction" has the same meaning as "viewed from the thickness direction of the semiconductor layer".

[0046] The semiconductor substrate 30 is arranged in order from the back surface 30r of the substrate toward the front surface 30s of the substrate, p + A collector layer 31 of type n, a buffer layer 32 of type n, and n - The substrate has a structure in which a drift layer 33 of a certain type is stacked. A collector electrode 27 is formed on the back surface 30r of the substrate. The collector electrode 27 is formed over almost the entire surface of the back surface 30r of the substrate. The side of the collector electrode 27 opposite to the collector layer 31 constitutes the back surface 10r of the semiconductor device 10.

[0047] For the p-type dopant in the collector layer 31, for example, boron (B) and aluminum (Al) are used. The dopant concentration in the collector layer 31 is, for example, 1 × 10⁻⁶. 15 cm -3 The above 2 x 10 19 cm-3 The following is true.

[0048] As the n-type dopant for the buffer layer 32 and the drift layer 33, for example, N (nitrogen), P (phosphorus), As (arsenic), etc. are used. The dopant concentration of the buffer layer 32 is, for example, 1×10 15 cm -3 or more and 5×10 17 cm -3 or less. The dopant concentration of the drift layer 33 is lower than that of the buffer layer 32, for example, 1×10 13 cm -3 or more and 5×10 14 cm -3 or less.

[0049] On the surface of the drift layer 33, that is, on the substrate surface 30s, a p-type base region 34 is formed. The base region 34 is formed over substantially the entire surface of the substrate surface 30s. The dopant concentration of the base region 34 is, for example, 1×10 16 cm -3 or more and 1×10 18 cm -3 or less. The depth of the base region 34 from the substrate surface 30s is, for example, 1.0 μm or more and 3.0 μm or less.

[0050] On the surface of the base region 34 (substrate surface 30s) in the main cell region 18, a plurality of trenches 35 are arranged side by side. Each trench 35 extends, for example, along the y direction and is arranged at intervals in the x direction. As a result, it is partitioned into stripe-shaped main cells 18A. The interval between adjacent trenches 35 in the x direction (the center-to-center distance of the trenches 35) is, for example, 1.5 μm or more and 7.0 μm or less. The width of each trench 35 (the dimension of the trench 35 in the x direction) is, for example, 0.5 μm or more and 3.0 μm or less. Each trench 35 penetrates the base region 34 in the z direction and extends to the middle of the drift layer 33. Note that each trench 35 may be formed in a lattice pattern so as to partition the matrix-shaped main cells 18A.

[0051] On the surface (substrate surface 30s) of the base region 34 in the main cell region 18, n + An emitter region 36 of type 1 is formed. The emitter region 36 is located on both sides of the trench 35 in the x-direction. In other words, the emitter region 36 can be said to be located on both sides of the trench 35 in the arrangement direction of the trench 35 within the base region 34. Therefore, between adjacent trenches 35 in the x-direction, two emitter regions 36 are arranged with a gap between them in the x-direction. The depth of each emitter region 36 is, for example, 0.2 μm to 0.6 μm. Also, the dopant concentration of each emitter region 36 is higher than that of the base region 34, for example, 1 × 10⁻¹⁶. 19 cm -3 The above 5 x 10 20 cm -3 The following applies:

[0052] On the surface (substrate surface 30s) of the base region 34 in the main cell region 18, p + A base contact region 37 of type 37 is formed. The base contact region 37 is located adjacent to the emitter region 36 in the x-direction. That is, the base contact region 37 is located between the x-direction of two emitter regions 36 that are located between adjacent trenches 35 in the x-direction. Each base contact region 37 may be formed deeper than the emitter region 36. The depth of each base contact region 37 is, for example, 0.2 μm or more and 1.6 μm or less. Also, the dopant concentration of each base contact region 37 is higher than that of the base region 34, for example, 5 × 10⁻¹⁶. 18 cm -3 The above 1 x 10 20 cm -3 The following applies:

[0053] An insulating film 38 is integrally formed on both the inner surface of each trench 35 and the substrate surface 30s. The insulating film 38 is made of, for example, silicon oxide (SiO2). The thickness of the insulating film 38 is, for example, 1100 Å to 1300 Å.

[0054] An electrode material, such as polysilicon, is embedded in each trench 35 via an insulating film 38. The electrode material embedded in each trench 35 is electrically connected to either the gate electrode 23 (gate finger 26) or the emitter electrode 21. In other words, the electrode material embedded in each trench 35 forms a gate trench 23A and an emitter trench 21A. In this embodiment, gate trenches 23A and emitter trenches 21A are alternately provided in the arrangement direction of the multiple trenches 35. In this embodiment, both the gate trenches 23A and emitter trenches 21A are embedded up to the open end of each trench 35.

[0055] An intermediate insulating film 39 is formed on an insulating film 38 provided on the substrate surface 30s. The intermediate insulating film 39 has, for example, SiO2. The emitter electrode 21 is formed on the intermediate insulating film 39. In other words, the intermediate insulating film 39 is an interlayer insulating film that fills the space between the emitter electrode 21 and the gate trench 23A. It can also be said that the intermediate insulating film 39 is an interlayer insulating film that fills the space between the emitter electrode 21 and the emitter trench 21A. The thickness of the intermediate insulating film 39 is 3000 Å or more and 15000 Å or less. In this embodiment, the insulating film 38 and the intermediate insulating film 39 correspond to "insulating films".

[0056] The insulating film 38 and the intermediate insulating film 39 are provided with a plurality of contact holes 39a that penetrate both the insulating film 38 and the intermediate insulating film 39 in the z direction. The contact holes 39a are positioned to overlap with the base contact region 37 when viewed from the z direction. The emitter electrode 21 is connected to the base contact region 37 via the contact holes 39a.

[0057] Figure 6 shows the cross-sectional structure of the semiconductor device 10 in the main cell region 18, specifically in a portion of the emitter electrode pad 11 and the cathode electrode pad 12, and in the intermediate region 20, specifically in the anode electrode 22.

[0058] As shown in Figure 6, since the cathode electrode pad 12 is composed of the emitter electrode 21, the region RK directly below the cathode electrode pad 12 in the semiconductor substrate 30 can also be designated as the main cell region 18. Furthermore, the region RM directly below the area between the first aperture 17A and the second aperture 17B in the semiconductor substrate 30 can also be designated as the main cell region 18. For this reason, as shown in Figure 6, main cells 18A are provided in both region RK and region RM. In other words, when viewed from the z direction, main cells 18A are provided in the region RE overlapping with the emitter electrode pad 11, the region RK overlapping with the cathode electrode pad 12 in the semiconductor substrate 30, and the region RM overlapping with the area between the first aperture 17A and the second aperture 17B. Here, region RE corresponds to the "first semiconductor region," and region RK corresponds to the "second semiconductor region."

[0059] Furthermore, emitter regions 36 are not formed on either side in the x-direction of the trench 35A, which is located in the portion of region RK adjacent to the intermediate region 20. For example, an emitter trench 21A is formed in the trench 35A.

[0060] On the other hand, since the intermediate region 20 is a region outside the main cell region 18, the main cell 18A is not formed there. A base region 34 is formed directly beneath the intermediate region 20. The depth of the base region 34 in the intermediate region 20 is greater than the depth of the base region 34 in the main cell region 18. More specifically, the depth of the base region 34 in the intermediate region 20 is greater than the depth of the trench 35A(35).

[0061] The circuit configuration of the semiconductor device 10 described above is shown in Figure 7. In the semiconductor device 10, the emitter electrode 21 also serves as the cathode electrode. As shown in Figure 7, the cathode of the temperature-sensitive diode 40P is electrically connected to the emitter of the IGBT within the semiconductor device 10.

[0062] As shown in Figure 7, in this embodiment, the semiconductor device 10 includes a protection diode 40Q connected in antiparallel to the temperature-sensitive diode 40P. The protection diode 40Q is a diode for protecting the temperature-sensitive diode 40P. The anode of the protection diode 40Q is electrically connected to both the emitter of the IGBT and the cathode of the temperature-sensitive diode 40P within the semiconductor device 10.

[0063] (Configuration of temperature-sensitive diode and protection diode) Referring to Figures 8 to 13, an example of a detailed configuration of the temperature-sensitive diode 40P and the protection diode 40Q will be described.

[0064] Figure 8 schematically shows the planar structure of the temperature-sensitive diode 40P and the protection diode 40Q, and Figure 9 shows the structure of the wiring connected to the temperature-sensitive diode 40P and the protection diode 40Q in Figure 8. Figure 10 schematically shows the cross-sectional structure of the temperature-sensitive diode 40P, and Figure 12 schematically shows the cross-sectional structure of the protection diode 40Q. Figure 13 schematically shows the cross-sectional structure of the temperature-sensitive diode 40P, the protection diode 40Q, the gate finger 26, etc. Also, Figure 11 shows an example of the arrangement of the wiring and the through-wiring connecting the above wiring to the temperature-sensitive diode 40P.

[0065] As shown in Figures 10 and 12, the semiconductor device 10 includes a thin-film diode semiconductor layer 43 on which a temperature-sensitive diode 40P and a protection diode 40Q are provided. The diode semiconductor layer 43 is made of, for example, polysilicon. The diode semiconductor layer 43 is formed in a rectangular shape when viewed from the z direction. In this embodiment, the shape of the diode semiconductor layer 43 when viewed from the z direction is square.

[0066] The diode semiconductor layer 43 is formed on the surface 38Aa of the insulating film 38A formed on the substrate surface 30s. The insulating film 38A is an insulating film formed integrally with the insulating film 38. In other words, the insulating film 38A constitutes a part of the insulating film 38. On the other hand, unlike the insulating film 38, the insulating film 38A has the function of insulating the diode semiconductor layer 43 from the semiconductor substrate 30. For this reason, the insulating film 38 and the insulating film 38A may be formed separately.

[0067] As shown in Figure 8, the temperature-sensitive diode 40P includes a plurality of diode cells (four in this embodiment). For convenience, the plurality of diode cells are referred to as the "first diode cell 40A", "second diode cell 40B", "third diode cell 40C", and "fourth diode cell 40D". The first to fourth diode cells 40A to 40D are formed by a diode semiconductor layer 43. In this embodiment, the first to fourth diode cells 40A to 40D are arranged in a line when viewed from the z direction. In this embodiment, the first to fourth diode cells 40A to 40D are arranged in a line in the y direction. More specifically, the first to fourth diode cells 40A to 40D are aligned with each other in the x direction and spaced apart from each other in the y direction. The first to fourth diode cells 40A to 40D are arranged in the order of first diode cell 40A, second diode cell 40B, third diode cell 40C, and fourth diode cell 40D as you move from the device side 10d to the device side 10c (see Figure 2) in the y direction. It can also be said that the first to fourth diode cells 40A to 40D are arranged in the order of first diode cell 40A, second diode cell 40B, third diode cell 40C, and fourth diode cell 40D as you move from the temperature-sensitive diode 40P to each electrode pad 12 to 16 in the y direction.

[0068] Diode cells 40A to 40D, numbered 1 through 4, have the same configuration, shape, and size. Therefore, the configuration of diode cell 40A will be described in detail below, and the configurations of diode cells 40B to 40D will be omitted.

[0069] The first diode cell 40A is composed of a first semiconductor region 44P of a first conductivity type and a second semiconductor region 45P of a second conductivity type. The first conductivity type is, for example, p-type, and the second conductivity type is, for example, n-type. In one example, the external shape of the first diode cell 40A viewed from the z-direction is a rectangle. In this embodiment, the external shape of the first diode cell 40A viewed from the z-direction is a square. Here, in this embodiment, the first semiconductor region 44P corresponds to the "semiconductor region for the first diode," and the second semiconductor region 45P corresponds to the "semiconductor region for the second diode."

[0070] The first semiconductor region 44P is located in the center of the first diode cell 40A in the x and y directions. In this embodiment, the shape of the first semiconductor region 44P as viewed from the z direction is circular. Therefore, the first semiconductor region 44P has a circumferential surface 44Pa.

[0071] For the first semiconductor region 44P, p-type dopants such as B and Al are used. The dopant concentration in the first semiconductor region 44P is, for example, 1 × 10⁻⁶. 18 cm -3 The above 1 x 10 20 cm -3 The following applies:

[0072] A first length-measuring pattern 46P is formed in the first semiconductor region 44P for measuring the length of the first semiconductor region 44P (for example, the diameter of the first semiconductor region 44P). The first length-measuring pattern 46P is formed at the center of the first semiconductor region 44P. When viewed from the z direction, the shape of the first length-measuring pattern 46P is rectangular, with the y direction being the longer side and the x direction being the shorter side.

[0073] The first measurement pattern 46P has a pattern of multiple parallel strip-shaped straight lines. The dopant concentration in the region where the first measurement pattern 46P is formed is lower than the dopant concentration in other regions of the first semiconductor region 44P. In this embodiment, the first measurement pattern 46P is provided as a non-doped layer.

[0074] Viewed from the z-direction, the second semiconductor region 45P is formed in an annular shape surrounding the first semiconductor region 44P. The second semiconductor region 45P is joined to the first semiconductor region 44P. The second semiconductor region 45P has an inner circumferential surface 45Pa that is joined to the circumferential surface 44Pa of the first semiconductor region 44P over its entire circumference.

[0075] The external shape of the second semiconductor region 45P constitutes the external shape of the first diode cell 40A. In other words, the external shape of the second semiconductor region 45P as viewed from the z direction is, for example, a rectangle, and in this embodiment, it is a square. It can also be said that the second semiconductor region 45P has an outer surface 45Pb that is formed in a rectangular shape when viewed from the z direction.

[0076] For the n-type dopant in the second semiconductor region 45P, for example, N, P, As, etc., are used. The dopant concentration in the second semiconductor region 45P is, for example, 1 × 10⁻⁶. 18 cm -3 The above 5 x 10 20 cm -3 The following applies:

[0077] A second length-measuring pattern 47P is formed in the second semiconductor region 45P for measuring the length of the second semiconductor region 45P (for example, the length of the outer shape of the second semiconductor region 45P in the x-direction or the length of the outer shape in the y-direction). The second length-measuring pattern 47P is formed at one of the four corners of the second semiconductor region 45P. When viewed from the z-direction, the shape of the second length-measuring pattern 47P is rectangular, with the y-direction being the longer side and the x-direction being the shorter side. In this embodiment, the size of the second length-measuring pattern 47P is equal to the size of the first length-measuring pattern 46P.

[0078] The second measurement pattern 47P has a pattern of multiple parallel strip-shaped straight lines. The dopant concentration in the region where the second measurement pattern 47P is formed is lower than the dopant concentration in other regions of the second semiconductor region 45P. In this embodiment, the second measurement pattern 47P is provided as a non-doped layer.

[0079] The protection diode 40Q includes a plurality of (four in this embodiment) protection diode cells. For convenience, these plurality of protection diode cells are referred to as the "first protection diode cell 40E," the "second protection diode cell 40F," the "third protection diode cell 40G," and the "fourth protection diode cell 40H." The first to fourth protection diode cells 40E to 40H are formed by a diode semiconductor layer 43.

[0080] The first to fourth protection diode cells 40E to 40H are arranged in a row when viewed from the z direction. In this embodiment, the first to fourth protection diode cells 40E to 40H are arranged in a row in the y direction. More specifically, the first to fourth protection diode cells 40E to 40H are arranged aligned with each other in the x direction and spaced apart from each other in the y direction. The first to fourth protection diode cells 40E to 40H are arranged in the order of first protection diode cell 40E, second protection diode cell 40F, third protection diode cell 40G, and fourth protection diode cell 40H as you move from the device side 10c to the device side 10d in the y direction. It can also be said that the first to fourth protection diode cells 40E to 40H are arranged in the y-direction from each electrode pad 12 to 16 toward the protection diode 40Q in the order of first protection diode cell 40E, second protection diode cell 40F, third protection diode cell 40G, and fourth protection diode cell 40H.

[0081] The temperature-sensitive diode 40P and the protection diode 40Q are aligned in the y-direction and spaced apart from each other in the x-direction. More specifically, the first diode cell 40A and the fourth protection diode cell 40H are arranged opposite each other in the x-direction, the second diode cell 40B and the third protection diode cell 40G are arranged opposite each other in the x-direction, the third diode cell 40C and the second protection diode cell 40F are arranged opposite each other in the x-direction, and the fourth diode cell 40D and the first protection diode cell 40E are arranged opposite each other in the x-direction.

[0082] The protection diode 40Q is positioned closer to the side 10a of the device (see Figure 2) relative to the temperature-sensing diode 40P. In other words, the temperature-sensing diode 40P is positioned closer to the side 10b of the device (see Figure 2) relative to the protection diode 40Q.

[0083] The first to fourth protection diode cells 40E to 40H have the same configuration, shape, and size as the first diode cell 40A. Therefore, the following will only describe the general configuration of the first protection diode cell 40E, and omit the description of the configurations of the second to fourth protection diode cells 40F to 40H.

[0084] The first protection diode cell 40E is composed of a first semiconductor region 44Q of a first conductivity type (p-type) and a second semiconductor region 45Q of a second conductivity type (n-type). The first semiconductor region 44Q has a circumferential surface 44Qa, and the second semiconductor region 45Q has an inner circumferential surface 45Qa that is bonded to the circumferential surface 44Qa of the first semiconductor region 44Q over its entire circumference. The second semiconductor region 45Q has an outer surface 45Qb that constitutes the outer shape of the first protection diode cell 40E. The outer surface 45Qb is formed in a square shape when viewed from the z direction. The p-type dopant concentration of the first semiconductor region 44Q is the same as that of the first semiconductor region 44P of the first diode cell 40A, and the n-type dopant concentration of the second semiconductor region 45Q is the same as that of the second semiconductor region 45P of the first diode cell 40A.

[0085] A first measuring pattern 46Q is formed in the first semiconductor region 44Q for measuring the length of the first semiconductor region 44Q (for example, the diameter of the first semiconductor region 44P). The first measuring pattern 46Q is formed at the center of the first semiconductor region 44Q. The external shape, pattern, and dopant concentration of the first measuring pattern 46P are the same as those of the first measuring pattern 46P.

[0086] A second length-measuring pattern 47Q is formed in the second semiconductor region 45Q for measuring the length of the second semiconductor region 45Q (for example, the length of the outer shape in the x-direction or the length of the outer shape in the y-direction). The second length-measuring pattern 47Q is formed at one of the four corners of the second semiconductor region 45Q. The outer shape, pattern, and dopant concentration of the second length-measuring pattern 47Q are the same as those of the second length-measuring pattern 47P.

[0087] As shown in Figure 9, a first wiring lead-out area 21ba and a second wiring lead-out area 21bb are provided at both ends in the y direction of the diode arrangement section 21b, which accommodates both the temperature-sensing diode 40P and the protection diode 40Q.

[0088] The first wiring lead-out region 21ba is a region formed at the end of the diode arrangement portion 21b in the y-direction that is closer to the electrode housing portion 21aa. In other words, the first wiring lead-out region 21ba is a region of the diode arrangement portion 21b that is connected to the electrode housing portion 21aa. The second wiring lead-out region 21bb is a region formed at the end of the diode arrangement portion 21b in the y-direction that is further away from the electrode housing portion 21aa. The second wiring lead-out region 21bb is adjacent to the adjacent region 21P in the y-direction.

[0089] The temperature-sensitive diode 40P and the protection diode 40Q are located between the first wiring lead-out region 21ba and the second wiring lead-out region 21bb in the y-direction. Therefore, it can be said that the fourth diode cell 40D is located closer to the first wiring lead-out region 21ba, and the first diode cell 40A is located closer to the second wiring lead-out region 21bb. Similarly, it can be said that the first protection diode cell 40E is located closer to the first wiring lead-out region 21ba, and the fourth protection diode cell 40H is located closer to the second wiring lead-out region 21bb.

[0090] Thus, in this embodiment, the first wiring lead-out region 21ba is the region in the y-direction between the temperature-sensing diode 40P and the protection diode 40Q and the electrode housing region 21aa within the diode arrangement region 21b. The second wiring lead-out region 21bb is the region in the y-direction between the temperature-sensing diode 40P and the protection diode 40Q and the adjacent region 21P within the diode arrangement region 21b.

[0091] As shown in Figures 10 and 12, the semiconductor layer 43 for the diode is covered by an intermediate insulating film 39. The surface 39b of the intermediate insulating film 39 is provided with wiring 50 for the temperature-sensing diode that is electrically connected to the temperature-sensing diode 40P, and wiring 60 for the protection diode that is electrically connected to the protection diode 40Q. Here, the surface 39b of the intermediate insulating film 39 is the surface facing the same side as the substrate surface 30s of the semiconductor substrate 30. In this embodiment, the wiring 50 for the temperature-sensing diode corresponds to "wiring electrically connected to the semiconductor region for the first diode and the semiconductor region for the second diode".

[0092] As shown in Figure 9, the first to fourth diode cells 40A to 40D are connected in series with each other by a temperature-sensitive diode wiring 50. The temperature-sensitive diode wiring 50 includes the first to fifth wirings 51 to 55. The first to fifth wirings 51 to 55 are aligned with each other in the x-direction and spaced apart from each other in the y-direction. In other words, the first to fifth wirings 51 to 55 are aligned with each other in the short-side direction of the temperature-sensitive diode 40P and spaced apart from each other in the longitudinal direction of the temperature-sensitive diode 40P. The first wiring 51 and the fifth wiring 55 are distributed at both ends of the temperature-sensitive diode 40P in the longitudinal direction (y-direction). The second to fourth wirings 52 to 54 are located between the first wiring 51 and the fifth wiring 55 in the y-direction. The second to fourth wirings 52 to 54 are insulated from both the first wiring 51 and the fifth wiring 55, respectively.

[0093] Thus, in this embodiment, the first diode cell 40A corresponds to the "first terminal cell," and the fourth diode cell 40D corresponds to the "second terminal cell." The first wiring 51 corresponds to the "first terminal wiring," and the fifth wiring 55 corresponds to the "second terminal wiring."

[0094] The thermosensing diode 40P has a first electrode 41P which serves as the anode electrode and a second electrode 42P which serves as the cathode electrode. The first electrode 41P and the second electrode 42P are distributed at both ends of the thermosensing diode 40P in the longitudinal direction (y direction). As shown in Figure 9, the first electrode 41P is provided at the end of the thermosensing diode 40P that is closer to the second wiring lead-out region 21bb. The second electrode 42P is provided at the end of the thermosensing diode 40P that is closer to the first wiring lead-out region 21ba. In other words, the first electrode 41P is provided at the end of the thermosensing diode 40P that is farther from each electrode pad 12 to 16, and the second electrode 42P is provided at the end of the thermosensing diode 40P that is closer to each electrode pad 12 to 16.

[0095] The first wiring 51 is electrically connected to the first semiconductor region 44P of the first diode cell 40A and is a wiring for supplying current from outside the temperature-sensitive diode 40P to the first diode cell 40A. The first wiring 51 has a first region connection portion 51A provided at a position that overlaps with the first semiconductor region 44P of the first diode cell 40A when viewed from the z direction, and a first extension portion 51B extending from the first region connection portion 51A to the outside of the first semiconductor region 44P of the first diode cell 40A. In this embodiment, the first region connection portion 51A and the first extension portion 51B are integrated. The first extension portion 51B constitutes the first electrode 41P of the temperature-sensitive diode 40P. Here, in this embodiment, the first region connection portion 51A corresponds to the "first end connection portion," and the first extension portion 51B corresponds to the "first end extension portion."

[0096] The shape of the first region connection portion 51A, as viewed from the z direction, is circular. In this embodiment, the center of the first region connection portion 51A coincides with the center of the first semiconductor region 44P. The diameter of the first region connection portion 51A is slightly smaller than the diameter of the first semiconductor region 44P. Note that the diameter of the first region connection portion 51A can be arbitrarily changed, and may, for example, be greater than or equal to the diameter of the first semiconductor region 44P.

[0097] The first extension 51B extends from the first region connection 51A toward the opposite side from the second wiring 52. Therefore, when viewed from the z direction, the first extension 51B is formed to overlap with the second semiconductor region 45P of the first diode cell 40A.

[0098] The second wiring 52 is for connecting the first diode cell 40A and the second diode cell 40B in series. The second wiring 52 electrically connects the second semiconductor region 45P of the first diode cell 40A and the first semiconductor region 44P of the second diode cell 40B. The second wiring 52 is formed to span between the first diode cell 40A and the second diode cell 40B.

[0099] The second wiring 52 includes the first part 56, the second part 57, and the connecting part 58. In this embodiment, the first part 56, the second part 57, and the connecting part 58 are integrated.

[0100] The first part 56 is positioned so as to overlap with the second semiconductor region 45P of the first diode cell 40A when viewed from the z direction, and is electrically connected to the second semiconductor region 45P of the first diode cell 40A. The shape of the first part 56 when viewed from the z direction is an open ring that surrounds the first semiconductor region 44P of the first diode cell 40A and has a gap in a part of the circumferential direction of the first semiconductor region 44P of the first diode cell 40A. The shape of the first part 56 when viewed from the z direction can also be described as an open ring that surrounds the first region connection portion 51A of the first wiring 51 and has a gap so as not to come into contact with the first extension portion 51B.

[0101] The second part 57 is positioned so as to overlap with the first semiconductor region 44P of the second diode cell 40B when viewed from the z direction, and is electrically connected to the first semiconductor region 44P of the second diode cell 40B. The shape of the second part 57 when viewed from the z direction is circular. In this embodiment, the second part 57 has the same shape as the first region connection part 51A.

[0102] The connecting part 58 connects the first part 56 and the second part 57. The connecting part 58 extends in the y direction. The third wiring 53 is for connecting the second diode cell 40B and the third diode cell 40C in series. The third wiring 53 electrically connects the second semiconductor region 45P of the second diode cell 40B and the first semiconductor region 44P of the third diode cell 40C. The third wiring 53 is formed to span between the second diode cell 40B and the third diode cell 40C.

[0103] Since the third wiring 53 has the same shape as the second wiring 52, a detailed description of its shape is omitted. The first part 56 of the third wiring 53 is located in a position that overlaps with the second semiconductor region 45P of the second diode cell 40B when viewed from the z direction, and is electrically connected to the second semiconductor region 45P of the second diode cell 40B. The second part 57 of the third wiring 53 is located in a position that overlaps with the first semiconductor region 44P of the third diode cell 40C when viewed from the z direction, and is electrically connected to the first semiconductor region 44P of the third diode cell 40C.

[0104] The fourth wiring 54 is for connecting the third diode cell 40C and the fourth diode cell 40D in series. The fourth wiring 54 electrically connects the second semiconductor region 45P of the third diode cell 40C and the first semiconductor region 44P of the fourth diode cell 40D. The fourth wiring 54 is formed to span between the third diode cell 40C and the fourth diode cell 40D.

[0105] Since the fourth wiring 54 has the same shape as the second wiring 52, a detailed description of its shape is omitted. The first part 56 of the fourth wiring 54 is located in a position that overlaps with the second semiconductor region 45P of the third diode cell 40C when viewed from the z direction, and is electrically connected to the second semiconductor region 45P of the third diode cell 40C. The second part 57 of the fourth wiring 54 is located in a position that overlaps with the first semiconductor region 44P of the fourth diode cell 40D when viewed from the z direction, and is electrically connected to the first semiconductor region 44P of the fourth diode cell 40D.

[0106] The fifth wiring 55 is electrically connected to the second semiconductor region 45P of the fourth diode cell 40D and is a wiring for supplying the current flowing through the temperature-sensitive diode 40P to the outside of the temperature-sensitive diode 40P. The fifth wiring 55 has a fifth region connection portion 55A provided at a position overlapping with the first semiconductor region 44P of the fourth diode cell 40D when viewed from the z direction, and a fifth extension portion 55B extending from the fifth region connection portion 55A to the outside of the first semiconductor region 44P of the fourth diode cell 40D. In this embodiment, the fifth region connection portion 55A and the fifth extension portion 55B are integrated. The fifth extension portion 55B constitutes the second electrode 42P of the temperature-sensitive diode 40P. Here, in this embodiment, the fifth region connection portion 55A corresponds to the "second end connection portion," and the fifth extension portion 55B corresponds to the "second end extension portion."

[0107] Viewed from the z-direction, the fifth region connection portion 55A is formed as an open annular shape that surrounds the first semiconductor region 44P of the fourth diode cell 40D and has a gap in a part of the circumferential direction of the first semiconductor region 44P. Viewed from the z-direction, it can also be said that the fifth region connection portion 55A is formed as an open annular shape that surrounds the second part of the fourth wiring 54 that is electrically connected to the first semiconductor region 44P and has a gap that allows it to contact the connecting part of the fourth wiring 54. In this embodiment, the fifth region connection portion 55A has the same shape as the first part 56 of the second wiring 52.

[0108] The fifth extension 55B extends from the fifth region connection 55A toward the opposite side from the first wiring 51. In this embodiment, the length of the fifth extension 55B is shorter than the length of the first extension 51B.

[0109] As shown in Figure 10, the semiconductor device 10 is provided with first to eighth through-wirings 81P to 88P as through-wirings that penetrate the intermediate insulating film 39. The first to eighth through-wirings 81P to 88P are for individually connecting the first to fifth wirings 51 to 55 and the diode cells 40A to 40D. For convenience, Figure 10 schematically shows the connection structure between the first to fifth wirings 51 to 55 and the diode cells 40A to 40D using the first to eighth through-wirings 81P to 88P. Therefore, the placement and number of the first to eighth through-wirings 81P to 88P are not limited to the placement and number of the first to eighth through-wirings 81P to 88P shown in Figure 10.

[0110] The first through-wiring 81P is a wiring that connects the first semiconductor region 44P of the first diode cell 40A to the first wiring 51. As a result, the first semiconductor region 44P of the first diode cell 40A is electrically connected to the first electrode 41P of the temperature-sensitive diode 40P. When viewed from the z direction, the first through-wiring 81P is positioned to overlap with both the first semiconductor region 44P and the first wiring 51 of the first diode cell 40A.

[0111] The second through-wiring 82P is a wiring that connects the second semiconductor region 45P of the first diode cell 40A to the second wiring 52. When viewed from the z direction, the second through-wiring 82P is positioned to overlap with both the second semiconductor region 45P and the second wiring 52 of the first diode cell 40A.

[0112] The third through-hole wiring 83P is a wiring that connects the first semiconductor region 44P of the second diode cell 40B to the second wiring 52. When viewed from the z direction, the third through-hole wiring 83P is positioned to overlap with both the first semiconductor region 44P and the second wiring 52 of the second diode cell 40B.

[0113] In this way, the second semiconductor region 45P of the first diode cell 40A and the first semiconductor region 44P of the second diode cell 40B are connected through the second through-wiring 82P, the second wiring 52, and the third through-wiring 83P.

[0114] The fourth through-wiring 84P is a wiring that connects the second semiconductor region 45P of the second diode cell 40B to the third wiring 53. When viewed from the z direction, the fourth through-wiring 84P is positioned to overlap with both the second semiconductor region 45P and the third wiring 53 of the second diode cell 40B.

[0115] The fifth through-wiring 85P is a wiring that connects the first semiconductor region 44P of the third diode cell 40C to the third wiring 53. When viewed from the z direction, the fifth through-wiring 85P is positioned to overlap with both the first semiconductor region 44P and the third wiring 53 of the third diode cell 40C.

[0116] In this way, the second semiconductor region 45P of the second diode cell 40B and the first semiconductor region 44P of the third diode cell 40C are connected through the fourth through-wiring 84P, the third wiring 53, and the fifth through-wiring 85P.

[0117] The sixth through-wiring 86P is a wiring that connects the second semiconductor region 45P of the third diode cell 40C to the fourth wiring 54. When viewed from the z direction, the sixth through-wiring 86P is positioned to overlap with both the second semiconductor region 45P and the fourth wiring 54 of the third diode cell 40C.

[0118] The seventh through-wiring 87P is a wiring that connects the first semiconductor region 44P of the fourth diode cell 40D to the fourth wiring 54. When viewed from the z direction, the seventh through-wiring 87P is positioned to overlap with both the first semiconductor region 44P and the fourth wiring 54 of the fourth diode cell 40D.

[0119] In this way, the second semiconductor region 45P of the third diode cell 40C and the first semiconductor region 44P of the fourth diode cell 40D are connected through the sixth through-wiring 86P, the fourth wiring 54, and the seventh through-wiring 87P.

[0120] The eighth through-wiring 88P connects the second semiconductor region 45P of the fourth diode cell 40D to the fifth wiring 55. This electrically connects the second semiconductor region 45P of the fourth diode cell 40D to the second electrode 42P of the temperature-sensitive diode 40P. Viewed from the z-direction, the eighth through-wiring 88P is positioned to overlap with both the second semiconductor region 45P and the fifth wiring 55 of the fourth diode cell 40D. Note that multiple through-wirings 81P to 88P may be provided.

[0121] Figure 11 shows an example of the arrangement configuration for each diode cell 40A, 40B in the first to fourth through-wirings 81P to 84P and for the first to third through-wirings 51 to 53. The arrangement for the fifth to eighth through-wirings 85P to 88P is the same as for the first to fourth through-wirings 81P to 84P.

[0122] The first through-wiring 81P is positioned so as to overlap with the outer periphery of the first semiconductor region 44P of the first diode cell 40A when viewed from the z direction. In other words, the first through-wiring 81P is positioned so as to overlap with the outer periphery of the first wiring 51 when viewed from the z direction. For this reason, the first through-wiring 81P is positioned differently from the first length-measuring pattern 46P of the first diode cell 40A. Multiple first through-wirings 81P are provided. The shape of each first through-wiring 81P when viewed from the z direction is annular. Multiple first through-wirings 81P are arranged concentrically. In this embodiment, each first through-wiring 81P is provided so as to be concentric with the first semiconductor region 44P (first wiring 51).

[0123] The second through-wiring 82P is positioned to overlap with the outer periphery of the first part 56 of the second wiring 52. The second through-wiring 82P is positioned differently from the second length-measuring pattern 47P of the first diode cell 40A. Multiple second through-wirings 82P are provided.

[0124] The third through-wiring 83P is positioned to overlap with the outer periphery of the first semiconductor region 44P of the second diode cell 40B. In other words, the third through-wiring 83P is positioned to overlap with the outer periphery of the second part 57 of the second wiring 52. The third through-wiring 83P is positioned differently from the first length-measuring pattern 46P of the second diode cell 40B. Multiple third through-wirings 83P are provided. The shape and number of each third through-wiring 83P are the same as those of the first through-wiring 81P.

[0125] The fourth through-wiring 84P is positioned to overlap with the outer periphery of the first part 56 of the third wiring 53. The fourth through-wiring 84P is positioned differently from the second length-measuring pattern 47P of the second diode cell 40B. Multiple fourth through-wirings 84P are provided. The shape of each fourth through-wiring 84P and its position relative to the first part 56 of the third wiring 53 are the same as the shape of each second through-wiring 82P and its position relative to the first part 56 of the second wiring 52.

[0126] As shown in Figure 9, the first to fourth protection diode cells 40E to 40H are connected in series with each other by protection diode wiring 60. Protection diode wiring 60 includes the first to fifth wirings 61 to 65. The first to fifth wirings 61 to 65 are aligned with each other in the x-direction and spaced apart from each other in the y-direction. In other words, the first to fifth wirings 61 to 65 are aligned with each other in the short-direction of the protection diode 40Q and spaced apart from each other in the longitudinal direction of the protection diode 40Q. The first wiring 61 and the fifth wiring 65 are distributed at both ends of the protection diode 40Q in the longitudinal direction (y-direction). The second to fourth wirings 62 to 64 are located between the first wiring 61 and the fifth wiring 65 in the y-direction. The second to fourth wirings 62 to 64 are insulated from both the first wiring 61 and the fifth wiring 65.

[0127] The protection diode 40Q has a first electrode 41Q which serves as the anode electrode and a second electrode 42Q which serves as the cathode electrode. The first electrode 41Q and the second electrode 42Q are distributed at both ends of the protection diode 40Q in the longitudinal direction (y direction). As shown in Figure 9, the first electrode 41Q is provided at the end of the protection diode 40Q that is closer to the first wiring lead-out area 21ba. The second electrode 42Q is provided at the end of the protection diode 40Q that is closer to the second wiring lead-out area 21bb. In other words, the first electrode 41Q is provided at the end of the protection diode 40Q that is closer to each electrode pad 12-16 (see Figure 1), and the second electrode 42Q is provided at the end of the protection diode 40Q that is further away from each electrode pad 12-16.

[0128] The first wiring 61 is electrically connected to the second semiconductor region 45Q of the fourth protection diode cell 40H and is a wiring for supplying current from outside the protection diode 40Q to the fourth protection diode cell 40H. The first wiring 61 has a first region connection portion 61A provided at a position overlapping with the second semiconductor region 45Q of the fourth protection diode cell 40H when viewed from the z direction, and a first extension portion 61B extending from the first region connection portion 61A to the outside of the second semiconductor region 45Q of the fourth protection diode cell 40H. In this embodiment, the first region connection portion 61A and the first extension portion 61B are integrated. The first extension portion 61B constitutes the second electrode 42Q of the protection diode 40Q. Also, when viewed from the x direction, the first wiring 61 is positioned at a position overlapping with the first wiring 51. Viewed from the z direction, the fifth region connection portion 55A is formed as an open ring that surrounds the first semiconductor region 44P of the fourth protection diode cell 40H and has a gap in a part of the circumferential direction of the first semiconductor region 44P.

[0129] The first extension 61B extends from the first region connection 61A toward the opposite side from the second wiring 62. Viewed from the z direction, the first extension 61B is formed to overlap with the second semiconductor region 45Q of the fourth protection diode cell 40H.

[0130] The second wiring 62 is for connecting the fourth protection diode cell 40H and the third protection diode cell 40G in series. The second wiring 62 electrically connects the second semiconductor region 45Q of the fourth protection diode cell 40H and the first semiconductor region 44Q of the third protection diode cell 40G. The second wiring 62 is formed to span between the fourth protection diode cell 40H and the third protection diode cell 40G.

[0131] The second wiring 62 includes the first part 66, the second part 67, and the connecting part 68. In this embodiment, the first part 66, the second part 67, and the connecting part 68 are integrated. The shape of the second wiring 62 is the same as the shape of the second wiring 52. The shape of the second wiring 62 is rotated 180° relative to the second wiring 52.

[0132] The first part 66 is positioned so as to overlap with the second semiconductor region 45Q of the third protection diode cell 40G when viewed from the z direction, and is electrically connected to the second semiconductor region 45Q of the third protection diode cell 40G. The shape of the first part 66 when viewed from the z direction is an open annular shape that surrounds the first semiconductor region 44Q of the third protection diode cell 40G and has a gap in a part of the circumferential direction of the first semiconductor region 44Q of the third protection diode cell 40G. In this embodiment, the first part 66 has the same shape as the first part 56 of the second wiring 52.

[0133] The second part 67 is positioned so as to overlap with the first semiconductor region 44Q of the fourth protection diode cell 40H when viewed from the z direction, and is electrically connected to the first semiconductor region 44Q of the fourth protection diode cell 40H. The shape of the second part 67 when viewed from the z direction is circular. In this embodiment, the second part 67 has the same shape as the second part 57 of the second wiring 52.

[0134] The connecting part 68 connects the first part 66 and the second part 67. The connecting part 68 extends in the y direction. In this embodiment, the connecting part 68 has the same shape as the connecting part 58 of the second wiring 52.

[0135] The third wiring 63 is for connecting the third protection diode cell 40G and the second protection diode cell 40F in series. The third wiring 63 electrically connects the first semiconductor region 44Q of the third protection diode cell 40G and the second semiconductor region 45Q of the second protection diode cell 40F. The third wiring 63 is formed to span between the third protection diode cell 40G and the second protection diode cell 40F.

[0136] Since the third wiring 63 has the same shape as the second wiring 62, a detailed description of its shape is omitted. The first part 66 of the third wiring 63 is located in a position that overlaps with the second semiconductor region 45Q of the second protection diode cell 40F when viewed from the z direction, and is electrically connected to the second semiconductor region 45Q of the second protection diode cell 40F. The second part 67 of the third wiring 63 is located in a position that overlaps with the first semiconductor region 44Q of the third protection diode cell 40G when viewed from the z direction, and is electrically connected to the first semiconductor region 44Q of the third protection diode cell 40G.

[0137] The fourth wiring 64 is for connecting the second protection diode cell 40F and the first protection diode cell 40E in series. The fourth wiring 64 electrically connects the first semiconductor region 44Q of the second protection diode cell 40F and the second semiconductor region 45Q of the first protection diode cell 40E. The fourth wiring 64 is formed to span between the second protection diode cell 40F and the first protection diode cell 40E.

[0138] Since the fourth wiring 64 has the same shape as the second wiring 62, a detailed description of its shape is omitted. The first part 66 of the fourth wiring 64 is located in a position that overlaps with the second semiconductor region 45Q of the first protection diode cell 40E when viewed from the z direction, and is electrically connected to the second semiconductor region 45Q of the first protection diode cell 40E. The second part 67 of the fourth wiring 64 is located in a position that overlaps with the first semiconductor region 44Q of the second protection diode cell 40F when viewed from the z direction, and is electrically connected to the first semiconductor region 44Q of the second protection diode cell 40F.

[0139] The fifth wiring 65 is electrically connected to the first semiconductor region 44Q of the first protection diode cell 40E and is a wiring that supplies the current flowing through the protection diode 40Q to the outside of the protection diode 40Q. The fifth wiring 65 has a fifth region connection portion 65A provided at a position that overlaps with the first semiconductor region 44Q of the first protection diode cell 40E when viewed from the z direction, and a fifth extension portion 65B extending from the fifth region connection portion 65A to the outside of the first semiconductor region 44Q of the first protection diode cell 40E. In this embodiment, the fifth region connection portion 65A and the fifth extension portion 65B are integrated. The fifth extension portion 65B constitutes the first electrode 41Q of the protection diode 40Q. Also, when viewed from the x direction, the fifth wiring 65 is positioned to overlap with the fifth wiring 55.

[0140] The shape of the fifth region connection portion 65A, as viewed from the z direction, is circular. In this embodiment, the center of the fifth region connection portion 65A coincides with the center of the first semiconductor region 44Q of the first protection diode cell 40E. The diameter of the fifth region connection portion 65A is slightly smaller than the diameter of the first semiconductor region 44Q. Note that the diameter of the fifth region connection portion 65A can be arbitrarily changed and may be, for example, greater than or equal to the diameter of the first semiconductor region 44Q.

[0141] The fifth extension 65B extends from the fifth region connection 65A toward the opposite side from the fourth wiring 64. In this embodiment, the length of the fifth extension 65B is shorter than the length of the first extension 61B.

[0142] Furthermore, as shown in Figures 9 and 12, the semiconductor device 10 is provided with first to eighth through-wirings 81Q to 88Q as through-wirings that penetrate the intermediate insulating film 39. The first to eighth through-wirings 81Q to 88Q are for individually connecting the first to fifth wirings 61 to 65 and the protection diode cells 40E to 40H. Figure 12 schematically shows the connection structure between the first to fifth wirings 61 to 65 and the protection diode cells 40E to 40H using the first to eighth through-wirings 81Q to 88Q. Therefore, the placement and number of the first to eighth through-wirings 81Q to 88Q are not limited to the placement and number of the first to eighth through-wirings 81Q to 88Q shown in Figure 12.

[0143] The first through-wiring 81Q is a wiring that connects the second semiconductor region 45Q of the fourth protection diode cell 40H to the first wiring 61. As a result, the second semiconductor region 45Q of the fourth protection diode cell 40H is electrically connected to the second electrode 42Q of the protection diode 40Q. Viewed from the z direction, the first through-wiring 81Q is positioned to overlap with both the second semiconductor region 45Q of the fourth protection diode cell 40H and the first wiring 61. Note that there may be multiple first through-wirings 81Q. That is, when viewed from the z direction, multiple first through-wirings 81Q may be positioned spaced apart from each other at positions that overlap with both the second semiconductor region 45Q of the fourth protection diode cell 40H and the first region connection portion 61A of the first wiring 61.

[0144] The second through-hole wiring 82Q connects the first semiconductor region 44Q of the fourth protection diode cell 40H to the second wiring 62. Viewed from the z direction, the second through-hole wiring 82Q is positioned to overlap with both the second semiconductor region 45Q of the fourth protection diode cell 40H and the second wiring 62.

[0145] The third through-hole wiring 83Q connects the second semiconductor region 45Q of the third protection diode cell 40G to the second wiring 62. When viewed from the z direction, the third through-hole wiring 83Q is positioned to overlap with both the second semiconductor region 45Q and the second wiring 62 of the third protection diode cell 40G.

[0146] In this way, the first semiconductor region 44Q of the fourth protection diode cell 40H and the second semiconductor region 45Q of the third protection diode cell 40G are connected through the second through-wiring 82Q, the second wiring 62, and the third through-wiring 83Q.

[0147] The fourth through-wiring 84Q is a wiring that connects the first semiconductor region 44Q of the third protection diode cell 40G to the third wiring 63. When viewed from the z direction, the fourth through-wiring 84Q is positioned to overlap with both the first semiconductor region 44Q and the third wiring 63 of the third protection diode cell 40G.

[0148] The fifth through-wiring 85Q is a wiring that connects the second semiconductor region 45Q of the second protection diode cell 40F to the third wiring 63. When viewed from the z direction, the fifth through-wiring 85Q is positioned to overlap with both the second semiconductor region 45Q and the third wiring 63 of the second protection diode cell 40F.

[0149] In this way, the first semiconductor region 44Q of the third protection diode cell 40G and the second semiconductor region 45Q of the second protection diode cell 40F are connected through the fourth through-wiring 84Q, the third wiring 63, and the fifth through-wiring 85Q.

[0150] The sixth through-wiring 86Q is a wiring that connects the first semiconductor region 44Q and the fourth wiring 64 of the second protection diode cell 40F. When viewed from the z direction, the sixth through-wiring 86Q is positioned to overlap with both the first semiconductor region 44Q and the fourth wiring 64 of the second protection diode cell 40F.

[0151] The seventh through-wiring 87Q is a wiring that connects the second semiconductor region 45Q of the first protection diode cell 40E to the fourth wiring 64. When viewed from the z direction, the seventh through-wiring 87Q is positioned to overlap with both the second semiconductor region 45Q and the fourth wiring 64 of the first protection diode cell 40E.

[0152] In this way, the first semiconductor region 44Q of the second protection diode cell 40F and the second semiconductor region 45Q of the first protection diode cell 40E are connected through the sixth through-wiring 86Q, the fourth wiring 64, and the seventh through-wiring 87Q.

[0153] The eighth through-wiring 88Q is a wiring that connects the first semiconductor region 44Q of the first protection diode cell 40E to the fifth wiring 65. As a result, the first semiconductor region 44Q of the first protection diode cell 40E is electrically connected to the first electrode 41Q of the protection diode 40Q. Viewed from the z direction, the eighth through-wiring 88Q is positioned to overlap with both the first semiconductor region 44Q and the fifth wiring 65 of the first protection diode cell 40E. Note that there may be multiple first to eighth through-wirings 81Q to 88Q. In this case, the arrangement configuration of the first to eighth through-wirings 81Q to 88Q is the same as, for example, the arrangement configuration of the first to fourth through-wirings 81P to 84P shown in Figure 11.

[0154] As shown in Figure 9, the semiconductor device 10 has a first connection line 71 and a second connection line 72. The first connection line 71 is a wire that connects the first electrode 41P of the temperature-sensitive diode 40P and the second electrode 42Q of the protection diode 40Q to the anode electrode 22. The second connection line 72 is a wire that connects the second electrode 42P of the temperature-sensitive diode 40P and the first electrode 41Q of the protection diode 40Q to the emitter electrode 21. Therefore, the second connection line 72 corresponds to the "connection wire for the second electrode".

[0155] The first connecting wire 71 is connected to both the first wiring 51 and the first wiring 61. More specifically, the first connecting wire 71 is connected to both the first extension 51B of the first wiring 51 and the first extension 61B of the first wiring 61. The first connecting wire 71 is connected to the anode electrode 22 through the first wiring lead-out region 21ba. Therefore, the first connecting wire 71 corresponds to the "connecting wire for the first electrode".

[0156] The second connecting wire 72 is connected to both the fifth wiring 55 and the fifth wiring 65. More specifically, the second connecting wire 72 is connected to both the fifth extension 55B of the fifth wiring 55 and the fifth extension 65B of the fifth wiring 65. The second connecting wire 72 is connected to the emitter electrode 21 through the second wiring lead area 21bb.

[0157] Figure 13 schematically shows the arrangement of the second diode cell 40B of the temperature-sensitive diode 40P, the third protection diode cell 40G of the protection diode 40Q, the second wiring 52, 62, the third wiring 53, 63, the third through-wiring 83P, 83Q, the fourth through-wiring 84P, 84Q, the two gate fingers 26, the first connecting wire 71, and the second connecting wire 72. Therefore, the placement and number of the third through-wiring 83P, 83Q and the fourth through-wiring 84P, 84Q are not limited to the placement and number of the third through-wiring 83P, 83Q and the fourth through-wiring 84P, 84Q shown in Figure 13.

[0158] As shown in Figures 9 and 13, two gate fingers 26, 26P and 26Q, are provided within the diode arrangement portion 21b of the emitter electrode 21. When viewed from the z direction, the gate fingers 26P and 26Q are formed to surround both the temperature-sensitive diode 40P and the protection diode 40Q as a single unit. The tips of each gate finger 26P and 26Q are positioned opposite each other with a gap in the x direction in the second wiring lead-out region 21bb. Between the x-directions of the tips of these gate fingers 26P and 26Q, a second connecting wire 72 extends in the y direction and is connected to the emitter electrode 21.

[0159] The gate finger 26P is positioned on the opposite side of the temperature-sensitive diode 40P from the protection diode 40Q. A first connecting wire 71 is positioned between the gate finger 26P and the temperature-sensitive diode 40P in the x-direction. As shown in Figure 13, both the internal wiring 26Pa of the gate finger 26P and the diode semiconductor layer 43 of the temperature-sensitive diode 40P are formed on the surface 38a of the insulating film 38. In other words, the internal wiring 26Pa and the diode semiconductor layer 43 are positioned at the same location in the z-direction. The first connecting wire 71, the surface-side wiring 26Pb of the gate finger 26P, the second wiring 52, and the third wiring 53 are each formed on the surface 39b of the intermediate insulating film 39. In other words, the first connecting wire 71, the surface-side wiring 26Pb of the gate finger 26P, the second wiring 52, and the third wiring 53 are positioned at the same location in the z-direction. Furthermore, the first connection line 71, the surface-side wiring 26Pb of the gate finger 26P, the second wiring 52, and the third wiring 53 are each positioned differently from the internal wiring 26Pa and the diode semiconductor layer 43 in the z-direction. In this embodiment, the first connection line 71, the surface-side wiring 26Pb of the gate finger 26P, the second wiring 52, and the third wiring 53 are each positioned further from the semiconductor substrate 30 than the internal wiring 26Pa and the diode semiconductor layer 43 in the z-direction.

[0160] As shown in Figure 9, the gate finger 26Q is positioned on the opposite side of the temperature-sensitive diode 40P from the protection diode 40Q. A second connecting line 72 is positioned between the gate finger 26Q and the protection diode 40Q in the x-direction. As shown in Figure 13, both the internal wiring 26Qa of the gate finger 26Q and the diode semiconductor layer 43 of the protection diode 40Q are formed on the surface 38a of the insulating film 38. That is, the internal wiring 26Qa and the diode semiconductor layer 43 are positioned at the same location in the z-direction. Also, the second connecting line 72, the surface-side wiring 26Qb of the gate finger 26Q, the second wiring 62, and the third wiring 63 are positioned at the same location relative to each other in the z-direction. Furthermore, the second connecting line 72, the surface-side wiring 26Qb of the gate finger 26Q, the second wiring 62, and the third wiring 63 are each positioned at different locations in the z-direction from the internal wiring 26Qa and the diode semiconductor layer 43. In this embodiment, the second connecting line 72, the surface-side wiring 26Qb of the gate finger 26Q, the second wiring 62, and the third wiring 63 are each positioned further from the semiconductor substrate 30 in the z-direction than the internal wiring 26Qa and the semiconductor layer 43 for the diode.

[0161] As shown in Figure 2, in this embodiment, the adjacent region 21P is formed to surround both the temperature-sensitive diode 40P and the protection diode 40Q. The adjacent region 21P is the region that constitutes the diode arrangement portion 21b of the emitter electrode 21 (emitter electrode pad 11) that surrounds both the temperature-sensitive diode 40P and the protection diode 40Q. For this reason, the adjacent region 21P has a portion that is adjacent in the y direction to the second wiring lead-out region 21bb (see Figure 9).

[0162] As shown in Figure 9, the second electrode 42P (cathode) of the temperature-sensitive diode 40P is connected to the adjacent region 21P by the second connecting line 72. In other words, the second electrode 42P of the temperature-sensitive diode 40P is electrically connected to the emitter electrode 21. Thus, the emitter electrode 21 also serves as the cathode electrode of the temperature-sensitive diode 40P. Furthermore, the first electrode 41Q (anode) of the protection diode 40Q is also connected to the adjacent region 21P by the second connecting line 72. In other words, the first electrode 41Q of the protection diode 40Q is electrically connected to the emitter electrode 21. Thus, the emitter electrode 21 also serves as the anode electrode of the protection diode 40Q.

[0163] (Operation of the first embodiment) The operation of the semiconductor device 10 of this embodiment will now be described. Figure 14 is a plan view of the comparative semiconductor device 10X, and Figure 15 is a cross-sectional view of the semiconductor device 10X of Figure 14 along line 15-15. The comparative semiconductor device 10X has a configuration in which the second electrode 42P of the temperature-sensitive diode 40P is not electrically connected to the emitter electrode 21.

[0164] As shown in Figure 14, the comparative example semiconductor device 10X has a cathode electrode 28X and an emitter electrode 21RX formed separately. The cathode electrode 28X is positioned spaced apart from the emitter electrode 21RX. The cathode electrode 28X is positioned between the emitter electrode 21RX and the anode electrode 22 in the x-direction. Although not shown, the second electrode 42P of the temperature-sensitive diode 40P is electrically connected to the cathode electrode 28X.

[0165] As shown in Figure 15, in the comparative example semiconductor device 10X, the cathode electrode 28X is insulated from the emitter electrode 21RX. Therefore, when viewed from the z direction, the region RX of the semiconductor substrate 30 that overlaps with the cathode electrode 28X cannot make contact with the emitter electrode 21RX. For this reason, a main cell cannot be formed in region RX.

[0166] On the other hand, in the semiconductor device 10 of this embodiment, the emitter electrode 21 and the second electrode 42P of the temperature-sensitive diode 40P are electrically connected, so the emitter electrode 21 can constitute the cathode electrode pad 12. Therefore, the emitter electrode 21 can also serve as the cathode electrode 28X of the semiconductor device 10X of the comparative example. In other words, in this embodiment, the semiconductor device 10 has an emitter electrode 21 in which the emitter electrode 21RX and the cathode electrode 28X are integrated. As a result, as shown in Figure 6, the region RK of the semiconductor substrate 30 that overlaps with the cathode electrode pad 12 can make contact with the emitter electrode 21. Therefore, a main cell 18A can be formed in region RK.

[0167] Furthermore, in general, in a thermosensing diode, as the junction area between the p-type first semiconductor region and the n-type second semiconductor region increases, the amount of current flowing from the first semiconductor region to the second semiconductor region increases, thus improving the temperature detection accuracy of the thermosensing diode.

[0168] In a typical diode configuration, for example, a rectangular first semiconductor region and a rectangular second semiconductor region are joined adjacent to each other when viewed from the z direction, so the junction surface is linear when viewed from the z direction. Therefore, the length of the junction surface between the first and second semiconductor regions when viewed from the z direction is equal to the length of the side of the diode that is perpendicular to the alignment direction of the first and second semiconductor regions when viewed from the z direction.

[0169] On the other hand, in this embodiment, as shown in Figure 8, the temperature-sensitive diode 40P has a p-type first semiconductor region 44P having a circular circumferential surface 44Pa, and an n-type second semiconductor region 45P having an inner circumferential surface 45Pa that is joined to the circumferential surface 44Pa. In this embodiment, the inner circumferential surface 45Pa is joined to the circumferential surface 44Pa over its entire circumference. That is, when viewed from the z direction, the junction surface between the first semiconductor region 44P and the second semiconductor region 45P is circular. Therefore, if the outer shape of the first semiconductor region 44P is made larger, the length of the junction surface between the first semiconductor region 44P and the second semiconductor region 45P when viewed from the z direction (the length of the circumferential surface 44Pa of the first semiconductor region 44P when viewed from the z direction) becomes longer than the length of one side of the outer surface 45Pb of the second semiconductor region 45P. Thus, the junction area between the first semiconductor region 44P and the second semiconductor region 45P can be made larger compared to a general diode.

[0170] (Effects of the first embodiment) The semiconductor device 10 of this embodiment provides the following advantages. (1-1) The semiconductor device 10 comprises a semiconductor substrate 30, a main cell 18A provided on the semiconductor substrate 30, an intermediate insulating film 39 covering the main cell 18A, an emitter electrode 21 laminated on the intermediate insulating film 39, a temperature-sensing diode 40P having a first electrode 41P and a second electrode 42P for detecting temperature, and an anode electrode 22 for connecting the first electrode 41P to the outside. The emitter electrode 21 has an emitter electrode pad 11 as a first junction region to which a first conductive member CB for connecting the emitter electrode 21 to the outside is joined and which is electrically joined to the second electrode 42P, and a cathode electrode pad 12 as a second junction region to which a second conductive member CWA for connecting the second electrode 42P to the outside is joined. Viewed from the z direction, the main cell 18A is provided in both the region RE (first semiconductor region) that overlaps with the emitter electrode pad 11 and the region RK (second semiconductor region) that overlaps with the cathode electrode pad 12 of the semiconductor substrate 30.

[0171] This configuration allows for an expansion of the area where the main cell 18A is formed. Therefore, for the same size semiconductor device, the number of main cells 18A in the semiconductor device 10 can be increased, thereby reducing the on-resistance of the semiconductor device 10. Furthermore, by maintaining the area where the main cell 18A is formed while eliminating the area where the cathode electrode 28X is formed, the semiconductor device 10 can be miniaturized while suppressing an increase in its on-resistance. As a result, the cost of the semiconductor device 10 can be reduced.

[0172] (1-2) The emitter electrode pad 11 includes an adjacent region 21P formed to surround the temperature-sensitive diode 40P. The temperature-sensitive diode 40P is located in the diode arrangement portion 21b surrounded by the adjacent region 21P. The second electrode 42P of the temperature-sensitive diode 40P is connected to the adjacent region 21P.

[0173] This configuration allows for a shorter wiring length connecting the second electrode 42P of the temperature-sensitive diode 40P to the adjacent region 21P. Therefore, it is possible to reduce the impact of noise caused by this wiring on the temperature-sensitive diode 40P.

[0174] (1-3) The cathode electrode pad 12 and the anode electrode pad 13 are arranged side by side along the electrode placement region 10ce on the semiconductor substrate 30. With this configuration, the cathode electrode pad 12 and the anode electrode pad 13 are located together, making it easier to join conductive materials to these pads 12 and 13 in sequence.

[0175] (1-4) The semiconductor device 10 is provided with a protective insulating film 17 that covers the emitter electrode 21. The protective insulating film 17 has a first opening 17A that exposes the emitter electrode pad 11 and a second opening 17B that exposes the cathode electrode pad 12. The protective insulating film 17 has a partition wall region 17a that separates the first opening 17A and the second opening 17B.

[0176] With this configuration, since a protective insulating film 17 (partition region 17a) exists between the first opening 17A and the second opening 17B, for example, when the first conductive member CB is joined to the emitter electrode pad 11 with a conductive bonding material such as solder, it is possible to suppress the conductive bonding material from entering the second opening 17B.

[0177] (1-5) The temperature-sensitive diode 40P has multiple diode cells 40A to 40D. The multiple diode cells 40A to 40D are connected in series with each other. This configuration allows for a larger temperature coefficient for the thermosensitive diode 40P. Therefore, the accuracy of temperature detection by the thermosensitive diode 40P can be improved.

[0178] (1-6) The semiconductor device 10 is equipped with a protection diode 40Q connected in antiparallel to the temperature-sensitive diode 40P. This configuration makes it possible to reduce the effects of surges on the temperature-sensitive diode 40P.

[0179] (1-7) The temperature-sensitive diode 40P has diode cells 40A to 40D, each composed of a first semiconductor region 44P of a first conductivity type formed on the surface 38a of the insulating film 38 and a second semiconductor region 45P of a second conductivity type formed on the surface 38a of the insulating film 38. The second semiconductor region 45P is formed in an annular shape surrounding the first semiconductor region 44P. The inner circumferential surface 45Pa of the second semiconductor region 45P is joined to the first semiconductor region 44P.

[0180] With this configuration, compared to a configuration in which the first semiconductor region and the second semiconductor region are joined on one surface, the junction area between the first semiconductor region 44P and the second semiconductor region 45P is increased, which allows for a larger temperature coefficient of the temperature-sensitive diode 40P. Therefore, the accuracy of temperature detection by the temperature-sensitive diode 40P can be improved.

[0181] (1-8) The shape of the first semiconductor region 44P as viewed from the z direction is circular. The second semiconductor region 45P has an inner surface 45Pa that is joined to the circumferential surface 44Pa of the first semiconductor region 44P over its entire circumference.

[0182] With this configuration, since there are no corners on the junction surface formed by the circumferential surface 44Pa of the first semiconductor region 44P and the inner circumferential surface 45Pa of the second semiconductor region 45P, it is possible to suppress the concentration of current density flowing from the first semiconductor region 44P to the second semiconductor region 45P.

[0183] (1-9) A first length-measuring pattern 46P is provided in the first semiconductor region 44P of the first diode cell 40A, and a second length-measuring pattern 47P is provided in the second semiconductor region 45P. With this configuration, the dimensions of the first semiconductor region 44P can be calculated by measuring the first length-measuring pattern 46P, and the dimensions of the second semiconductor region 45P can be calculated by measuring the second length-measuring pattern 47P. Thus, the dimensions of the first semiconductor region 44P and the second semiconductor region 45P, which are relatively large, can be obtained without directly measuring their dimensions. The same effect can be obtained for the second to fourth diode cells 40B to 40D and the first to fourth protection diode cells 40E to 40H.

[0184] (1-10) The first through-hole wiring 81P is connected to a position in the first semiconductor region 44P of the first diode cell 40A that is different from the first length-measuring pattern 46P. The second through-hole wiring 82P is connected to a position in the second semiconductor region 45P of the first diode cell 40A that is different from the second length-measuring pattern 47P.

[0185] With this configuration, since the first through-wiring 81P is connected to a different position within the first semiconductor region 44P from the first measurement pattern 46P, which is an undoped layer, it is possible to suppress an increase in resistance between the first through-wiring 81P and the first semiconductor region 44P. Also, since the second through-wiring 82P is connected to a different position within the second semiconductor region 45P from the second measurement pattern 47P, which is an undoped layer, it is possible to suppress an increase in resistance between the second through-wiring 82P and the second semiconductor region 45P. Similar effects can be obtained for the third to eighth through-wirings 83P to 88P and the first to eighth through-wirings 81Q to 88Q.

[0186] [Second Embodiment] The semiconductor device 10 of the second embodiment will be described with reference to Figures 16 and 17. The semiconductor device 10 of this embodiment has a different electrode pad configuration compared to the semiconductor device 10 of the first embodiment. In the following description, the configuration that differs from the semiconductor device 10 of the first embodiment will be described in detail, and the same reference numerals will be used for components common to the semiconductor device 10 of the first embodiment, and their descriptions will be omitted.

[0187] As shown in Figure 16, the semiconductor device 10 of this embodiment differs from the first embodiment in that an opening 17G is provided in place of the first opening 17A and the second opening 17B (see Figure 1) of the protective insulating film 17. In other words, the opening 17G is an opening that integrates the first opening 17A and the second opening 17B by omitting the partition wall region 17a (see Figure 1) of the protective insulating film 17. The opening 17G can also be said to be an opening that exposes the emitter electrode pad 11, the cathode electrode pad 12, and the region between the emitter electrode pad 11 and the cathode electrode pad 12. In this embodiment, the portion of the emitter electrode 21 exposed by the opening 17G is divided into a first junction region RA and a second junction region RB.

[0188] The first junction region RA is the portion of the emitter electrode 21 closer to the side surface 10d of the device than each electrode 22-24, and is the region to which the first conductive member CB for connecting the emitter electrode 21 to the outside is joined. The first junction region RA is formed over most of the emitter electrode 21, in other words, over most of the portion of the emitter electrode 21 exposed by the opening 17G.

[0189] The second junction region RB is the region that includes the cathode electrode pad 12 and constitutes the end of the opening 17G in the y-direction that is closer to the side surface 10c of the device. Therefore, the second junction region RB is the region to which the second conductive member CWA for connecting the second electrode 42P of the temperature-sensitive diode 40P to the outside is joined. The second junction region RB is located adjacent to the anode electrode 22 in the x-direction.

[0190] As shown in Figure 17, the first conductive member CB is joined to the first bonding region RA by a conductive bonding material such as solder. The second conductive member CWA is joined to the second bonding region RB by a wire bonding apparatus.

[0191] (Effects of the second embodiment) According to the semiconductor device 10 of this embodiment, in addition to the effects of (1-1) to (1-3) and (1-5) to (1-11) of the first embodiment, the following effects can be obtained.

[0192] (2-1) The protective insulating film 17 has an opening 17G that exposes both the first junction region RA and the second junction region RB. With this configuration, the area of ​​the emitter electrode 21 exposed from the protective insulating film 17 is increased, thus improving heat dissipation.

[0193] [Third Embodiment] Referring to Figures 18 to 21, the semiconductor device 10 of the third embodiment will be described. The semiconductor device 10 of this embodiment differs from the semiconductor device 10 of the first embodiment in the configuration of the temperature-sensitive diode 40P. In the following description, the configuration that differs from the semiconductor device 10 of the first embodiment will be described in detail, and the same reference numerals will be used for components common to the semiconductor device 10 of the first embodiment, and their descriptions will be omitted.

[0194] Figure 18 is a schematic plan view showing the configuration of the temperature-sensitive diode 40P and the protection diode 40Q of the third embodiment. Figure 19 is a schematic plan view showing the wiring to the temperature-sensitive diode 40P and the protection diode 40Q in Figure 18. Figure 20 is a cross-sectional structure of the temperature-sensitive diode 40P and the wiring cut along line 20-20 in Figure 19, schematically showing the connection structure between the temperature-sensitive diode 40P and the wiring. Figure 21 is a cross-sectional structure of the protection diode 40Q and the wiring cut along line 21-21 in Figure 19, schematically showing the connection structure between the protection diode 40Q and the wiring.

[0195] As shown in Figure 18, the semiconductor device 10, similar to the first embodiment, includes a diode semiconductor layer 90 formed on the surface 38Aa of the insulating film 38A formed on the substrate surface 30s.

[0196] The semiconductor device 10 includes a temperature-sensitive diode 100 having a plurality of diode cells and a protection diode 110 having a plurality of protection diode cells. The protection diode 110 is connected in antiparallel to the temperature-sensitive diode 100, as in the first embodiment. The temperature-sensitive diode 100 and the protection diode 110 are provided as separate diode semiconductor layers 90.

[0197] The temperature-sensitive diode 100 and the protection diode 110 are arranged so that they are aligned in the y-direction and spaced apart in the x-direction. In this embodiment, the temperature-sensitive diode 100 has four diode cells, the first to fourth diode cells 100A to 100D, which are connected in series with each other. Each diode cell 100A to 100D is formed in a single diode semiconductor layer 90.

[0198] The first diode cell 100A is composed of a first semiconductor region 101 of a first conductivity type and a second semiconductor region 102 of a second conductivity type. In this embodiment, the first conductivity type is p-type and the second conductivity type is n-type. The second semiconductor region 102 is formed in an annular shape surrounding the first semiconductor region 101. In this embodiment, the shape of the first semiconductor region 101 as viewed from the z direction is circular. The second semiconductor region 102 is an annular shape having an inner circumferential surface 102a that is joined to the circumferential surface 101a of the first semiconductor region 101 over its entire circumference.

[0199] The second diode cell 100B is provided separately from the first diode cell 100A. The second diode cell 100B is composed of a third semiconductor region 103 of the first conductivity type and a fourth semiconductor region 104 of the second conductivity type.

[0200] The third semiconductor region 103 is formed in an annular shape surrounding the second semiconductor region 102. The third semiconductor region 103 is an annular shape having an inner surface 103a that is joined to the outer surface 102b of the second semiconductor region 102 over its entire circumference. The width of the third semiconductor region 103 (the dimension between the inner surface 103a and the outer surface 103b in the radial direction of the third semiconductor region 103) is less than or equal to the width of the second semiconductor region 102 (the dimension between the inner surface 102a and the outer surface 102b in the radial direction of the second semiconductor region 102). In this embodiment, the width of the third semiconductor region 103 is smaller than the width of the second semiconductor region 102.

[0201] The fourth semiconductor region 104 is formed in an annular shape surrounding the third semiconductor region 103. The fourth semiconductor region 104 is an annular shape having an inner surface 104a joined to the outer surface 103b of the third semiconductor region 103 over its entire circumference. The width of the fourth semiconductor region 104 (the dimension between the inner surface 104a and the outer surface 104b in the radial direction of the fourth semiconductor region 104) is greater than or equal to the width of the third semiconductor region 103. In this embodiment, the width of the fourth semiconductor region 104 is greater than the width of the third semiconductor region 103 and equal to the width of the second semiconductor region 102.

[0202] The third diode cell 100C is provided separately from both the first diode cell 100A and the second diode cell 100B. The third diode cell 100C is composed of a fifth semiconductor region 105 of the first conductivity type and a sixth semiconductor region 106 of the second conductivity type.

[0203] The fifth semiconductor region 105 is formed in an annular shape surrounding the fourth semiconductor region 104. The fifth semiconductor region 105 is an annular shape having an inner surface 105a joined to the outer surface 104b of the fourth semiconductor region 104 over its entire circumference. The width of the fifth semiconductor region 105 (the dimension between the inner surface 105a and the outer surface 105b in the radial direction of the fifth semiconductor region 105) is less than or equal to the width of the fourth semiconductor region 104. In this embodiment, the width of the fifth semiconductor region 105 is smaller than the width of the fourth semiconductor region 104 and equal to the width of the third semiconductor region 103.

[0204] The sixth semiconductor region 106 is formed in an annular shape surrounding the fifth semiconductor region 105. The sixth semiconductor region 106 is an annular shape having an inner circumferential surface 106a joined to the outer circumferential surface 105b of the fifth semiconductor region 105 over its entire circumference. The width of the sixth semiconductor region 106 (the dimension between the inner circumferential surface 106a and the outer circumferential surface 106b in the radial direction of the sixth semiconductor region 106) is greater than or equal to the width of the fifth semiconductor region 105. In this embodiment, the width of the sixth semiconductor region 106 is greater than the width of the fifth semiconductor region 105 and equal to the width of the fourth semiconductor region 104.

[0205] The fourth diode cell 100D is provided separately from the first to third diode cells 100A to 100C. The fourth diode cell 100D is composed of a seventh semiconductor region 107 of the first conductivity type and an eighth semiconductor region 108 of the second conductivity type.

[0206] The seventh semiconductor region 107 is formed in an annular shape surrounding the sixth semiconductor region 106. The sixth semiconductor region 106 is an annular shape having an inner surface 107a joined to the outer surface 105b of the fifth semiconductor region 105 over its entire circumference. The width of the seventh semiconductor region 107 (the dimension between the inner surface 107a and the outer surface 107b in the radial direction of the seventh semiconductor region 107) is less than or equal to the width of the sixth semiconductor region 106. In this embodiment, the width of the seventh semiconductor region 107 is smaller than the width of the sixth semiconductor region 106 and equal to the width of the fifth semiconductor region 105.

[0207] The eighth semiconductor region 108 is formed in an annular shape surrounding the seventh semiconductor region 107. The eighth semiconductor region 108 has an inner surface 108a that is bonded to the outer surface 107b of the seventh semiconductor region 107 over its entire circumference. The outer shape of the eighth semiconductor region 108, as viewed from the z direction, is rectangular.

[0208] As shown in Figure 18, when viewed from the z direction, the first to eighth semiconductor regions 101 to 108 are arranged concentrically. In other words, the first to fourth diode cells 100A to 100D can also be said to be arranged concentrically. Furthermore, when viewed from the z direction, the temperature-sensitive diode 100 has a configuration in which first conductivity type semiconductor regions and second conductivity type semiconductor regions are arranged alternately in the radial direction.

[0209] In this embodiment, the protection diode 110 has four protection diode cells, the first to fourth protection diode cells 110A to 110D, which are connected in series with each other. As shown in Figure 18, the configuration of the protection diode 110 is the same as that of the temperature-sensitive diode 100.

[0210] The first protection diode cell 110A is composed of a first semiconductor region 111 of a first conductivity type and a second semiconductor region 112 of a second conductivity type. The second semiconductor region 112 is formed in an annular shape surrounding the first semiconductor region 111. The shape of the first semiconductor region 111 as viewed from the z direction is circular, and the second semiconductor region 112 is an annular shape having an inner circumferential surface 112a that is joined to the circumferential surface 111a of the first semiconductor region 111 over its entire circumference.

[0211] The second protection diode cell 110B is composed of a third semiconductor region 113 of the first conductivity type and a fourth semiconductor region 114 of the second conductivity type. The third semiconductor region 113 is an annular shape having an inner surface 113a joined to the outer surface 112b of the second semiconductor region 112 over its entire circumference. The fourth semiconductor region 114 is an annular shape having an inner surface 114a joined to the outer surface 113b of the third semiconductor region 113 over its entire circumference.

[0212] The third protection diode cell 110C is composed of a fifth semiconductor region 115 of the first conductivity type and a sixth semiconductor region 116 of the second conductivity type. The fifth semiconductor region 115 is an annular shape having an inner surface 115a joined to the outer surface 114b of the fourth semiconductor region 114 over its entire circumference. The sixth semiconductor region 116 is an annular shape having an inner surface 116a joined to the outer surface 115b of the fifth semiconductor region 115 over its entire circumference.

[0213] The fourth protection diode cell 110D is composed of a seventh semiconductor region 117 of the first conductivity type and an eighth semiconductor region 118 of the second conductivity type. The seventh semiconductor region 117 is an annular shape having an inner surface 117a joined to the outer surface 116b of the sixth semiconductor region 116 over its entire circumference. The eighth semiconductor region 118 is an annular shape having an inner surface 118a joined to the outer surface 117b of the seventh semiconductor region 117 over its entire circumference.

[0214] As shown in Figure 20, both the temperature-sensitive diode 100 and the protection diode 110 are covered by an intermediate insulating film 39, similar to the first embodiment. The surface 39b of the intermediate insulating film 39 is provided with first to fifth wirings 121 to 125 electrically connected to the temperature-sensitive diode 100, and first to fifth wirings 131 to 135 electrically connected to the protection diode 110. The intermediate insulating film 39 is also provided with first to eighth through-wirings 126A to 126H that penetrate the intermediate insulating film 39 in the z direction and are connected to the temperature-sensitive diode 100, and first to eighth through-wirings 136A to 136H that penetrate the intermediate insulating film 39 in the z direction and are connected to the protection diode 110. In other words, the semiconductor device 10 of this embodiment comprises an intermediate insulating film 39, first to fifth wirings 121 to 125 and 131 to 135 formed on the surface 39b of the intermediate insulating film 39, and first to eighth through-wirings 126A to 126H and 136A to 136H that penetrate the intermediate insulating film 39. Each of the wirings 121 to 125 is electrically connected to the temperature-sensitive diode 100 via each of the through-wirings 126A to 126H. Each of the wirings 131 to 135 is electrically connected to the protection diode 110 via each of the through-wirings 136A to 136H.

[0215] First, let's explain the wiring configuration of the temperature-sensitive diode 100. As shown in Figure 19, the first to fifth wires 121 to 125 are spaced apart from each other in the y-direction. It can also be said that the first to fifth wires 121 to 125 are spaced apart from each other in the short-side direction of the temperature-sensitive diode 100. In the short-side direction (y-direction) of the temperature-sensitive diode 100, the second to fourth wires 122 to 124 are positioned between the first wire 121 and the fifth wire 125. The second to fourth wires 122 to 124 are arranged in the order of second wire 122, third wire 123, and fourth wire 124 as you move from the first wire 121 toward the fifth wire 125. The first to fifth wires 121 to 125 are insulated from each other.

[0216] The thermosensing diode 100 has a first electrode 100M which serves as the anode electrode and a second electrode 100N which serves as the cathode electrode. The first electrode 100M and the second electrode 100N are distributed at both ends of the thermosensing diode 100 in the y-direction. The first electrode 100M is provided at the end of the thermosensing diode 100 that is furthest from each electrode pad 12-16 (see Figure 1), and the second electrode 100N is provided at the end of the thermosensing diode 100 that is closer to each electrode pad 12-16.

[0217] The first wiring 121 is electrically connected to the first semiconductor region 101 of the first diode cell 100A and is a wiring for supplying current from outside the temperature-sensitive diode 100 to the first diode cell 100A. The first wiring 121 has a first region connection portion 121A and a first extension portion 121B. In this embodiment, the first region connection portion 121A and the first extension portion 121B are integrated.

[0218] The first region connection portion 121A is positioned so as to overlap with the first semiconductor region 101 of the first diode cell 100A when viewed from the z direction. The first region connection portion 121A is formed in a shape corresponding to the shape of the first semiconductor region 101 when viewed from the z direction. In this embodiment, since the shape of the first semiconductor region 101 when viewed from the z direction is circular, the shape of the first region connection portion 121A when viewed from the z direction is also circular. In this embodiment, the diameter of the first region connection portion 121A is slightly smaller than the diameter of the first semiconductor region 101. Note that the diameter of the first region connection portion 121A can be arbitrarily changed, and may be, for example, greater than or equal to the diameter of the first semiconductor region 101.

[0219] The first extension 121B extends from the first region connection 121A toward the outside of the first semiconductor region 101. The first extension 121B extends to the outside of the temperature-sensitive diode 100. In this embodiment, the first extension 121B extends from the first region connection 121A toward the opposite side from the second wiring 122. The first extension 121B constitutes the first electrode 100M of the temperature-sensitive diode 100.

[0220] As shown in Figure 20, the first region connection portion 121A is connected to the first semiconductor region 101 by the first through-wiring 126A. In other words, the first through-wiring 126A is a wiring that connects the first region connection portion 121A and the first semiconductor region 101. The first through-wiring 126A is positioned so as to overlap both the first region connection portion 121A and the first semiconductor region 101 when viewed from the z direction.

[0221] As shown in Figure 19, the second wiring 122 is formed in an open annular shape with a gap that surrounds the first region connection portion 121A and does not come into contact with the first extension portion 121B when viewed from the z direction. In this embodiment, the second wiring 122, when viewed from the z direction, is formed in an arc shape that opens toward the first wiring 121. When viewed from the z direction, the second wiring 122 is positioned to overlap both the second semiconductor region 102 of the first diode cell 100A and the third semiconductor region 103 of the second diode cell 100B. When viewed from the z direction, it can also be said that the second wiring 122 is positioned to straddle the junction surface between the second semiconductor region 102 and the third semiconductor region 103. Here, the junction surface between the second semiconductor region 102 and the third semiconductor region 103 is composed of the outer peripheral surface 102b of the second semiconductor region 102 and the inner peripheral surface 103a of the third semiconductor region 103, as shown in Figure 18.

[0222] As shown in Figure 20, the second wiring 122 is connected to the second semiconductor region 102 of the first diode cell 100A by the second through-wiring 126B. In other words, the second through-wiring 126B is a wiring that connects the second wiring 122 and the second semiconductor region 102. When viewed from the z direction, the second through-wiring 126B is positioned so as to overlap with both the second wiring 122 and the second semiconductor region 102.

[0223] Furthermore, the second wiring 122 is connected to the third semiconductor region 103 of the second diode cell 100B by the third through-wiring 126C. In other words, the third through-wiring 126C is a wiring that connects the second wiring 122 and the third semiconductor region 103. When viewed from the z direction, the third through-wiring 126C is positioned so as to overlap with both the second wiring 122 and the third semiconductor region 103.

[0224] Thus, the second semiconductor region 102 of the first diode cell 100A and the third semiconductor region 103 of the second diode cell 100B are electrically connected by the second wiring 122, the second through-wiring 126B, and the third through-wiring 126C. For this reason, the second wiring 122, the second through-wiring 126B, and the third through-wiring 126C can also be said to be wiring that connects the first diode cell 100A and the second diode cell 100B in series.

[0225] As shown in Figure 19, the third wiring 123 is formed in an open annular shape that surrounds the second wiring 122 and has a gap in part when viewed from the z direction. In this embodiment, the third wiring 123, when viewed from the z direction, is formed in an arc shape that opens toward the second wiring 122. When viewed from the z direction, the third wiring 123 is provided in a position that overlaps with the fourth semiconductor region 104 of the second diode cell 100B. In this embodiment, the third wiring 123 is provided in a position that overlaps with both the fourth semiconductor region 104 and the fifth semiconductor region 105 of the third diode cell 100C. The third wiring 123 is arranged to straddle the junction surface between the fourth semiconductor region 104 and the fifth semiconductor region 105. Here, the junction surface between the fourth semiconductor region 104 and the fifth semiconductor region 105 is composed of the outer peripheral surface 104b of the fourth semiconductor region 104 and the inner peripheral surface 105a of the fifth semiconductor region 105, as shown in Figure 18.

[0226] As shown in Figure 20, the third wiring 123 is connected to the fourth semiconductor region 104 of the second diode cell 100B by the fourth through-wiring 126D. In other words, the fourth through-wiring 126D is a wiring that connects the third wiring 123 and the fourth semiconductor region 104. When viewed from the z direction, the fourth through-wiring 126D is positioned so as to overlap with both the third wiring 123 and the fourth semiconductor region 104.

[0227] Furthermore, the third wiring 123 is connected to the fifth semiconductor region 105 of the third diode cell 100C by the fifth through-wiring 126E. In other words, the fifth through-wiring 126E is a wiring that connects the third wiring 123 and the fifth semiconductor region 105. When viewed from the z direction, the fifth through-wiring 126E is positioned so as to overlap with both the third wiring 123 and the fifth semiconductor region 105.

[0228] Thus, the fourth semiconductor region 104 of the second diode cell 100B and the fifth semiconductor region 105 of the third diode cell 100C are electrically connected by the third wiring 123, the fourth through-wiring 126D, and the fifth through-wiring 126E. For this reason, the third wiring 123, the fourth through-wiring 126D, and the fifth through-wiring 126E can also be said to be wiring that connects the second diode cell 100B and the third diode cell 100C in series.

[0229] As shown in Figure 19, the fourth wiring 124 is formed as an open annular shape that surrounds the third wiring 123 and has a gap in part when viewed from the z direction. In this embodiment, the fourth wiring 124, when viewed from the z direction, is formed as an arc shape that opens toward the third wiring 123. When viewed from the z direction, the fourth wiring 124 is provided in a position that overlaps with both the sixth semiconductor region 106 of the third diode cell 100C and the seventh semiconductor region 107 of the fourth diode cell 100D. When viewed from the z direction, the fourth wiring 124 is arranged to straddle the junction surface between the sixth semiconductor region 106 and the seventh semiconductor region 107. Here, the junction surface between the sixth semiconductor region 106 and the seventh semiconductor region 107 is composed of the outer peripheral surface 106b of the sixth semiconductor region 106 and the inner peripheral surface 107a of the seventh semiconductor region 107, as shown in Figure 18.

[0230] As shown in Figure 20, the fourth wiring 124 is connected to the sixth semiconductor region 106 of the third diode cell 100C by the sixth through-wiring 126F. In other words, the sixth through-wiring 126F is a wiring that connects the fourth wiring 124 and the sixth semiconductor region 106. When viewed from the z direction, the sixth through-wiring 126F is positioned so as to overlap with both the fourth wiring 124 and the sixth semiconductor region 106.

[0231] Furthermore, the fourth wiring 124 is connected to the seventh semiconductor region 107 of the fourth diode cell 100D by the seventh through-wiring 126G. In other words, the seventh through-wiring 126G is a wiring that connects the fourth wiring 124 and the seventh semiconductor region 107. When viewed from the z direction, the seventh through-wiring 126G is positioned so as to overlap with both the fourth wiring 124 and the seventh semiconductor region 107.

[0232] Thus, the sixth semiconductor region 106 of the third diode cell 100C and the seventh semiconductor region 107 of the fourth diode cell 100D are electrically connected by the fourth wiring 124, the sixth through-wiring 126F, and the seventh through-wiring 126G. For this reason, the fourth wiring 124, the sixth through-wiring 126F, and the seventh through-wiring 126G can also be said to be wiring that connects the third diode cell 100C and the fourth diode cell 100D in series.

[0233] As shown in Figure 19, the fifth wiring 125 is a wiring that is electrically connected to the eighth semiconductor region 108 of the fourth diode cell 100D. In other words, the fifth wiring 125 is a wiring that electrically connects the second electrode 100N of the temperature-sensitive diode 100 to the eighth semiconductor region 108 of the fourth diode cell 100D.

[0234] Viewed from the z-direction, the fifth wiring 125 has a fifth region connection portion 125A and a fifth extension portion 125B. In this embodiment, the fifth region connection portion 125A and the fifth extension portion 125B are integrated.

[0235] The fifth region connection portion 125A is positioned so as to overlap with the eighth semiconductor region 108 of the fourth diode cell 100D when viewed from the z direction. The fifth region connection portion 125A is formed in an annular shape, surrounding the seventh semiconductor region 107 of the fourth diode cell 100D and having a gap in part when viewed from the z direction.

[0236] The fifth extension 125B extends from the fifth region connection 125A toward the outside of the seventh semiconductor region 107. The fifth extension 125B extends to the outside of the temperature-sensitive diode 100. In this embodiment, the fifth extension 125B extends from the fifth region connection 125A toward the opposite side from the first wiring 121.

[0237] As shown in Figure 20, the fifth region connection 125A is connected to the seventh semiconductor region 107 by the eighth through-wiring 126H. In other words, the eighth through-wiring 126H is a wiring that connects the fifth region connection 125A and the seventh semiconductor region 107. When viewed from the z direction, the eighth through-wiring 126H is positioned so as to overlap with both the fifth region connection 125A and the seventh semiconductor region 107.

[0238] Multiple second to eighth through-wirings 126B to 126H may be provided. Multiple second through-wirings 126B are arranged spaced apart from each other. In one example, multiple second through-wirings 126B are arranged spaced apart from each other in the circumferential direction of the second semiconductor region 102. Multiple third through-wirings 126C are arranged spaced apart from each other. In one example, multiple third through-wirings 126C are arranged spaced apart from each other in the circumferential direction of the third semiconductor region 103. Multiple fourth through-wirings 126D are arranged spaced apart from each other. In one example, multiple fourth through-wirings 126D are arranged spaced apart from each other in the circumferential direction of the fourth semiconductor region 104. Multiple fifth through-wirings 126E are arranged spaced apart from each other. In one example, multiple fifth through-wirings 126E are arranged spaced apart from each other in the circumferential direction of the fifth semiconductor region 105. Multiple sixth through-wirings 126F are arranged spaced apart from each other. In one example, multiple sixth through-wirings 126F are spaced apart from each other in the circumferential direction of the sixth semiconductor region 106. Multiple seventh through-wirings 126G are spaced apart from each other. In one example, multiple seventh through-wirings 126G are spaced apart from each other in the circumferential direction of the seventh semiconductor region 107. Multiple eighth through-wirings 126H are spaced apart from each other. In one example, multiple eighth through-wirings 126H are spaced apart from each other in the circumferential direction of the eighth semiconductor region 108.

[0239] Next, the wiring configuration of the protection diode 110 will be described. The protection diode 110 has a first electrode 110M which serves as the anode electrode and a second electrode 110N which serves as the cathode electrode. The first electrode 110M and the second electrode 110N are distributed at both ends of the protection diode 110 in the y-direction. The first electrode 110M is provided at the end of the protection diode 110 that is closer to each electrode pad 12-16 (see Figure 1), and the second electrode 110N is provided at the end of the protection diode 110 that is further away from each electrode pad 12-16.

[0240] As shown in Figure 19, the configuration of the first to fifth wirings 131 to 135 and each through-wiring 136A to 136H is the same as the configuration of the first to fifth wirings 121 to 125 and each through-wiring 126A to 126H. Since the protection diode 110 is connected in antiparallel to the temperature-sensitive diode 100, the arrangement of the first to fifth wirings 131 to 135 relative to the protection diode 110 is a 180° rotation of the arrangement of the first to fifth wirings 121 to 125 relative to the temperature-sensitive diode 100. The following describes the general configuration of the first to fifth wirings 131 to 135 and each through-wiring 136A to 136H.

[0241] As shown in Figure 21, the first wiring 131 is positioned so as to overlap with the eighth semiconductor region 118 of the fourth protection diode cell 110D when viewed from the z direction, and is electrically connected to the eighth semiconductor region 118 via the first through-wiring 136A. Thus, the first through-wiring 136A is a wiring that connects the first wiring 131 and the eighth semiconductor region 118, and is positioned so as to overlap with both the first wiring 131 and the eighth semiconductor region 118 when viewed from the z direction. The first wiring 131 is positioned so as to overlap with the eighth semiconductor region 118 when viewed from the z direction, and has a first region connection portion 131A to which the first through-wiring 136A is connected, and a first extension portion 131B that extends from the first region connection portion 131A to the opposite side from the second wiring 132. The first extension portion 131B constitutes the second electrode 110N of the protection diode 110.

[0242] As shown in Figure 19, the second wiring 132 is positioned so as to overlap with both the seventh semiconductor region 117 of the fourth protection diode cell 110D and the sixth semiconductor region 116 of the third protection diode cell 110C when viewed from the z direction. As shown in Figure 21, the second wiring 132 is electrically connected to the seventh semiconductor region 117 via the second through-wiring 136B and to the sixth semiconductor region 116 via the third through-wiring 136C. Thus, the second through-wiring 136B is a wiring that connects the second wiring 132 and the seventh semiconductor region 117, and is positioned so as to overlap with both the second wiring 132 and the seventh semiconductor region 117 when viewed from the z direction. The third through-wiring 136C is a wiring that connects the second wiring 132 and the sixth semiconductor region 116, and is positioned so as to overlap with both the second wiring 132 and the sixth semiconductor region 116 when viewed from the z direction. In this way, the first protection diode cell 110A and the second protection diode cell 110B are connected in series by the second wiring 132, the second through-wiring 136B, and the third through-wiring 136C.

[0243] As shown in Figure 19, the third wiring 133 is positioned so as to overlap with both the fifth semiconductor region 115 of the third protection diode cell 110C and the fourth semiconductor region 114 of the second protection diode cell 110B when viewed from the z direction. As shown in Figure 21, the third wiring 133 is electrically connected to the fifth semiconductor region 115 via the fourth through-wiring 136D and to the fourth semiconductor region 114 via the fifth through-wiring 136E. Thus, the fourth through-wiring 136D is a wiring that connects the third wiring 133 and the fifth semiconductor region 115, and is positioned so as to overlap with both the third wiring 133 and the fifth semiconductor region 115 when viewed from the z direction. The fifth through-wiring 136E is a wiring that connects the third wiring 133 and the fourth semiconductor region 114, and is positioned so as to overlap with both the third wiring 133 and the fourth semiconductor region 114 when viewed from the z direction. In this way, the second protection diode cell 110B and the third protection diode cell 110C are connected in series by the third wiring 133, the fourth through wiring 136D, and the fifth through wiring 136E.

[0244] As shown in Figure 19, the fourth wiring 134 is positioned so as to overlap with both the third semiconductor region 113 of the second protection diode cell 110B and the second semiconductor region 112 of the first protection diode cell 110A when viewed from the z direction. As shown in Figure 21, the fourth wiring 134 is electrically connected to the third semiconductor region 113 via the sixth through-wiring 136F and electrically connected to the second semiconductor region 112 via the seventh through-wiring 136G. Thus, the sixth through-wiring 136F is a wiring that connects the fourth wiring 134 and the third semiconductor region 113, and is positioned so as to overlap with both the fourth wiring 134 and the third semiconductor region 113 when viewed from the z direction. The seventh through-wiring 136G is a wiring that connects the fourth wiring 134 and the second semiconductor region 112, and is positioned so as to overlap with both the fourth wiring 134 and the second semiconductor region 112 when viewed from the z direction. In this way, the first protection diode cell 110A and the second protection diode cell 110B are connected in series by the fourth wiring 134, the sixth through-wiring 136F, and the seventh through-wiring 136G.

[0245] As shown in Figure 21, the fifth wiring 135 is positioned so as to overlap with the first semiconductor region 111 of the first protection diode cell 110A when viewed from the z direction, and is electrically connected to the first semiconductor region 111 via the eighth through-wiring 136H. Thus, the eighth through-wiring 136H is a wiring that connects the fifth wiring 135 and the first semiconductor region 111, and is positioned so as to overlap with both the fifth wiring 135 and the first semiconductor region 111 when viewed from the z direction. As shown in Figure 19, the fifth wiring 135 is positioned so as to overlap with the first semiconductor region 111 when viewed from the z direction, and has a fifth region connection part 135A to which the eighth through-wiring 136H is connected, and a fifth extension part 135B that extends from the fifth region connection part 135A to the opposite side from the fourth wiring 134. The fifth extension part 135B constitutes the first electrode 110M of the protection diode 110. Furthermore, multiple through-wiring connections 136B to 136H may be provided for each of the second to eighth connections.

[0246] As shown in Figure 19, the semiconductor device 10 has a first connection line 141 and a second connection line 142. The first connection line 141 is a wire that connects the first electrode 100M of the temperature-sensitive diode 100 and the second electrode 110N of the protection diode 110 to the anode electrode 22. The second connection line 142 is a wire that connects the second electrode 100N of the temperature-sensitive diode 100 and the first electrode 100M of the protection diode 110 to the emitter electrode 21.

[0247] The first connecting wire 141 is connected to both the first wiring 121 and the first wiring 131. More specifically, the first connecting wire 141 is connected to both the first extension 121B of the first wiring 121 and the first extension 131B of the first wiring 131. Although not shown, the first connecting wire 141 is connected to the anode electrode 22 through the first wiring lead-out region 21ba, similar to the first connecting wire 71 in the first embodiment.

[0248] The second connecting wire 142 is connected to both the fifth wiring 125 and the fifth wiring 135. More specifically, the second connecting wire 142 is connected to both the fifth extension 125B of the fifth wiring 125 and the fifth extension 135B of the fifth wiring 135. Although not shown, the second connecting wire 142 is connected to the adjacent region 21P of the emitter electrode 21 through the second wiring lead-out region 21bb.

[0249] (Effects of the third embodiment) According to the semiconductor device 10 of this embodiment, in addition to the effects of the first embodiment, the following effects can be obtained.

[0250] (3-1) The temperature-sensitive diode 100 includes a first diode cell 100A and a second diode cell 100B provided separately from the first diode cell 100A. The first diode cell 100A has a first semiconductor region 101 of a first conductivity type and a second semiconductor region 102 of a second conductivity type, and the second diode cell 100B has a third semiconductor region 103 of a first conductivity type and a fourth semiconductor region 104 of a second conductivity type. The second semiconductor region 102 is formed in an annular shape surrounding the first semiconductor region 101 and has an inner circumferential surface 102a joined to the circumferential surface 101a of the first semiconductor region 101. The third semiconductor region 103 is formed in an annular shape surrounding the second semiconductor region 102 and has an inner circumferential surface 103a joined to the outer circumferential surface 102b of the second semiconductor region 102. The fourth semiconductor region 104 is formed in an annular shape surrounding the third semiconductor region 103 and has an inner circumferential surface 104a bonded to the outer circumferential surface 103b of the third semiconductor region 103.

[0251] This configuration allows for an increase in the junction area between adjacent semiconductor regions among the first to fourth semiconductor regions 101 to 104, while also reducing the space required for the placement of the first diode cell 100A and the second diode cell 100B. Therefore, it is possible to improve the accuracy of temperature detection by the temperature-sensitive diode 100 and to miniaturize the temperature-sensitive diode 100.

[0252] (3-2) The annular first to fourth semiconductor regions 101 to 104 are arranged concentrically. With this configuration, the density of the current flowing from the first semiconductor region 101 to the fourth semiconductor region 104 tends to be uniform in the circumferential direction of the first semiconductor region 101.

[0253] [Example of changes] The embodiments described above are illustrative of possible forms of the semiconductor device according to this disclosure and are not intended to limit its form. The semiconductor device according to this disclosure may take forms different from those illustrated in the embodiments described above. One example is a form in which some of the configurations of the embodiments described above are replaced, modified, or omitted, or a form in which new configurations are added to the embodiments described above. Furthermore, the following modifications can be combined with each other as long as they do not contradict each other technically. In the following modifications, parts common to the embodiments described above are denoted by the same reference numerals as in the embodiments described above, and their descriptions are omitted.

[0254] In the first embodiment, the shape of the first semiconductor region 44P of each diode cell 40A to 40D of the temperature-sensitive diode 40P can be arbitrarily changed. The shape of the first semiconductor region 44P can be changed, for example, as shown in Figures 22 to 25. Similarly, the shape of each protection diode cell 40E to 40H of the protection diode 40Q can also be changed.

[0255] As shown in Figure 22, the shape of the first semiconductor region 44P as viewed from the z direction is a rectangle. That is, the first semiconductor region 44P has a rectangular outer surface 44Pc as viewed from the z direction. In this case, the second semiconductor region 45P has an inner surface 45Pc that is joined to the outer surface 44Pc of the first semiconductor region 44PC around its entire circumference. Also, the second semiconductor region 45P has an outer surface 45Pb that is formed in a rectangular shape as viewed from the z direction, similar to the first embodiment. In the example shown in Figure 20, each side of the outer surface 44Pc of the first semiconductor region 44PC and each side of the outer surface 45Pb of the second semiconductor region 45PC that corresponds to each side of the outer surface 44Pc are parallel to each other.

[0256] As shown in FIG. 23, the shape of the first semiconductor region 44P viewed from the z direction is a rectangle, and each corner 44Pd is curved. That is, the outer surface 44Pc of the first semiconductor region 44P has each curved corner 44Pd. In this case, each corner 45Pd of the inner surface 45Pc of the second semiconductor region 45P is curved corresponding to each corner 44Pd of the first semiconductor region 44P. Thereby, the inner surface 45Pc of the second semiconductor region 45P is joined to the outer surface 44Pc of the first semiconductor region 44P over the entire circumference.

[0257] As shown in FIG. 24, the shape of the first semiconductor region 44P viewed from the z direction is a rectangle. Further, when viewed from the z direction, each side constituting the outer surface 44Pc of the first semiconductor region 44P is inclined with respect to each side constituting the outer surface 45Pb of the second semiconductor region 45P.

[0258] As shown in FIG. 25, the outer shape of the second semiconductor region 45P is not limited to a square and may be a rectangle. Even in this case, the shape of the first semiconductor region 44P can be arbitrarily changed. In one example, as shown in FIG. 25, the shape of the first semiconductor region 44P viewed from the z direction is an ellipse.

[0259] · In the third embodiment, the shapes of the first to eighth semiconductor regions 101 to 108 of the respective diode cells 100A to 100D of the temperature-sensitive diode 100 can be arbitrarily changed. In one example, as shown in FIG. 26, each of the semiconductor regions 101 to 108 may be a rectangle when viewed from the z direction, and each corner of each rectangle may be curved.

[0260] · In the first and second embodiments, as shown in FIG. 27, instead of the configuration in which the second connection line 72 passes through the second wiring lead-out region 21bb, it may be configured to pass through the first wiring lead-out region 21ba. That is, both the first connection line 71 and the second connection line 72 may be configured to pass through the first wiring lead-out region 21ba. In this case, for example, the second electrode 42P of the temperature-sensitive diode 40P may not be connected to the adjacent region 21P of the emitter electrode 21.

[0261] In the first and second embodiments, the arrangement of the first to fourth diode cells 40A to 40D of the temperature-sensitive diode 40P can be arbitrarily changed. For example, the first to fourth diode cells 40A to 40D may be arranged in a row in the x direction. The first to fourth diode cells 40A to 40D may be arranged such that pairs of first and second diode cells 40A and 40B adjacent in the y direction and pairs of third and fourth diode cells 40C and 40D adjacent in the y direction are adjacent in the x direction.

[0262] In the first and second embodiments, the arrangement of the first to fourth protection diode cells 40E to 40H of the protection diode 40Q can be arbitrarily changed. For example, the first to fourth protection diode cells 40E to 40H may be arranged in a row in the x direction. The first to fourth protection diode cells 40E to 40H may be arranged such that pairs of first and second protection diode cells 40E, 40F adjacent in the y direction and pairs of third and fourth protection diode cells 40G, 40H adjacent in the y direction are adjacent in the x direction.

[0263] In each embodiment, the number of diode cells in the temperature-sensitive diodes 40P,100 can be arbitrarily changed. The number of diode cells in the temperature-sensitive diodes 40P,100 may be 2, 3, or 5 or more.

[0264] In each embodiment, the number of protection diode cells in the protection diodes 40Q and 110 can be arbitrarily changed. The number of protection diode cells in the protection diodes 40Q and 110 may be 2, 3, or 5 or more.

[0265] In each embodiment, the temperature-sensitive diode 40P,100 may have one diode cell. In one example, as shown in Figure 28, the temperature-sensitive diode 40P has a first diode cell 40A. In this case, the semiconductor device 10 includes a first wiring 151 and a second wiring 152 formed on the surface 39b (see Figure 10) of the intermediate insulating film 39 covering the temperature-sensitive diode 40P, and a first through-wiring 161 and a second through-wiring 162 penetrating the intermediate insulating film 39.

[0266] The first wiring 151 is a wiring that is electrically connected to the first semiconductor region 44P of the first diode cell 40A by the first through wiring 161. The first wiring 151 has a first region connection portion 153 located in a position that overlaps with the first semiconductor region 44P when viewed from the z direction, and a first extension portion 154 extending from the first region connection portion 153 toward the outside of the first semiconductor region 44P. The first region connection portion 153 is formed to correspond to the shape of the first semiconductor region 44P when viewed from the z direction. In the illustrated example, the shape of the first region connection portion 153 when viewed from the z direction is circular. The first extension portion 154 extends from the first region connection portion 153 toward the opposite side from the second wiring 152. The first extension portion 154 constitutes the first electrode 41P of the temperature-sensitive diode 40P.

[0267] The first through-wiring 161 is a wiring that connects the first wiring 151 and the first semiconductor region 44P. In the illustrated example, the first through-wiring 161 is positioned so as to overlap both the first region connection portion 153 and the first semiconductor region 44P when viewed from the z direction. The shape of the first through-wiring 161 when viewed from the z direction is circular. The first through-wiring 161 is positioned on the outer periphery of the first semiconductor region 44P. In the illustrated example, there are multiple (two) first through-wirings 161. The number of first through-wirings 161 can be arbitrarily changed; for example, there may be only one. The first through-wiring 161 is positioned differently from the first length-measuring pattern 46P of the first diode cell 40A.

[0268] The second wiring 152 is electrically connected to the second semiconductor region 45P of the first diode cell 40A by the second through-wiring 162. The second wiring 152 is insulated from the first wiring 151. The second wiring 152 has a second region connection portion 155 located in a position that overlaps with the second semiconductor region 45P when viewed from the z direction, and a second extension portion 156 extending from the second region connection portion 155 toward the outside of the second semiconductor region 45P. The second region connection portion 155 is formed as an open annular shape that surrounds a part of the first region connection portion 153 when viewed from the z direction, and has a gap so as not to come into contact with the first extension portion 154. The second extension portion 156 extends from the second region connection portion 155 toward the opposite side from the first wiring 151. The second extension portion 156 constitutes the second electrode 42P of the temperature-sensitive diode 40P.

[0269] The second through-wiring 162 is a wiring that connects the second wiring 152 and the second semiconductor region 45P. In the illustrated example, the second through-wiring 162 is positioned so as to overlap both the second region connection portion 155 and the second semiconductor region 45P when viewed from the z direction. Note that multiple second through-wirings 162 may be provided. The second through-wiring 162 is positioned differently from the second length-measuring pattern 47P of the first diode cell 40A.

[0270] In each embodiment, the range of the adjacent region 21P is not limited to the region of the emitter electrode 21 enclosed by the dashed line in Figure 2, but can be arbitrarily changed. The adjacent region 21P is any region of the emitter electrode 21 that is adjacent to the temperature-sensitive diode 40P. For example, the adjacent region 21P may consist of a region of the emitter electrode 21 that is adjacent to the temperature-sensitive diode 40P on one side in the x-direction, or it may consist of a region of the emitter electrode 21 that is adjacent to the temperature-sensitive diode 40P on one side in the y-direction. In other words, the adjacent region 21P is any region that is adjacent to a part of the temperature-sensitive diode 40P.

[0271] In each embodiment, the protection diodes 40Q and 110 may be omitted from the semiconductor device 10. In each embodiment, the current sense electrode 24 may be omitted. Also, at least one of the current sense electrode pad 15 and the emitter sense electrode pad 16 may be omitted.

[0272] In each embodiment, the protective insulating film 17 may be omitted. In each embodiment, the semiconductor device 10 may include a cathode electrode provided separately from the emitter electrode 21. The second electrode 42P(100N) of the temperature-sensitive diode 40P(100) is electrically connected to the cathode electrode. The first electrode 41Q(110M) of the protection diode 40Q(11) is also electrically connected to the cathode electrode.

[0273] In each embodiment, the semiconductor device 10 is embodied as an IGBT, but it is not limited to this, and the semiconductor device 10 may be a SiCMOSFET (metal-oxide-semiconductor field-effect transistor) or a SiMOSFET.

[0274] As used in this disclosure, the term “on / above” includes the meanings of “on / above” and “above / beyond” unless the context clearly indicates otherwise. Therefore, the expression “A is formed on B” is intended to mean that in this embodiment, A may be in contact with B and directly positioned on B, but as a modified example, A may be positioned above B without contacting B. In other words, the term “on / above” does not preclude structures in which other members are formed between A and B.

[0275] The z-direction used in this disclosure does not necessarily have to be vertical, nor does it have to coincide perfectly with the vertical. Therefore, the various structures described herein are not limited to the z-direction "up" and "down" being the same as the z-direction "up" and "down" being the same as the vertical. For example, the x-direction may be vertical, or the y-direction may be vertical.

[0276] The description "at least one of A and B" in this specification should be understood to mean "only A, or only B, or both A and B". [Appendix] The technical ideas that can be grasped from the above embodiments and the above modification examples are described below. The reference numerals of the components of the embodiments corresponding to the components described in each appendix are shown in parentheses. The reference numerals are shown as examples for the assistance of understanding, and the components described in each appendix should not be limited to the components indicated by the reference numerals.

[0277] (Appendix A1) A semiconductor layer (30), A cell (18A) provided in the semiconductor layer (30), Insulating films (38, 39) covering the cell (18A), A main electrode portion (21) laminated on the insulating films (38, 39), A temperature-sensitive diode (40P) for detecting temperature, having a first electrode (41P) and a second electrode (42P), A connection electrode for diode (22) for connecting the first electrode (41P) to the outside, The main electrode portion (21) Is a region where a first conductive member (CB) for connecting the main electrode portion (21) to the outside is joined, and is a first joining region (11) electrically connected to the second electrode (42P), As viewed from the thickness direction (z direction) of the semiconductor layer (30), it is provided in a region different from the first joining region (11), and has a second joining region (12) to which a second conductive member (CWA) for connecting the second electrode (42P) to the outside is joined, As viewed from the thickness direction (z direction) of the semiconductor layer (30), the cell (18A) is provided in both a first semiconductor region (RE) overlapping the first joining region (11) and a second semiconductor region (RK) overlapping the second joining region (12) of the semiconductor layer (30) A semiconductor device.

[0278] (Appendix A2) The first junction region (11) includes an adjacent region (21P) adjacent to a part of the temperature-sensitive diode (40P) when viewed from the thickness direction (z direction) of the semiconductor layer (30), The device includes a second electrode connection wiring (72) that connects the second electrode (42P) to the adjacent region (21P). The semiconductor device described in Appendix A1.

[0279] (Note A3) The wiring outlet region (21ba) is located adjacent to the temperature-sensing diode (40P) and at a different position from the adjacent region (21P), The first electrode connection wiring (71), which is connected to the first electrode (41P), is connected to the diode connection electrode (22) through the wiring lead-out region (21ba). Semiconductor equipment as described in Appendix A2.

[0280] (Note A4) When viewed from the thickness direction (z direction) of the semiconductor layer (30), the cell (18A) is not formed in the region of the semiconductor layer (30) that overlaps with the diode connecting electrode (22). A semiconductor device as described in any one of the appendices A1 to A3.

[0281] (Note A5) When viewed from the thickness direction (z direction) of the semiconductor layer (30), the semiconductor layer (30) is formed in a rectangular shape. Viewed from the thickness direction (z direction) of the semiconductor layer (30), the second junction region (12) and the diode connection electrode (22) are arranged side by side along one side of the semiconductor layer (30). A semiconductor device as described in any one of the appendices A1 to A4.

[0282] (Note A6) Viewed from the thickness direction (z direction) of the semiconductor layer (30), the diode connection electrode (22) is positioned closer to the temperature-sensitive diode (40P) with respect to the second junction region (12). Semiconductor equipment as described in Appendix A5.

[0283] (Note A7) The semiconductor device (10) includes a protective insulating film (17) that covers the main electrode portion (21), The protective insulating film (17) is A first opening (17A) that exposes the first joining region (11), A second opening (17B) that exposes the second joining region (12), A partition wall region (17a) is positioned to separate the first opening (17A) and the second opening (17B), It has A semiconductor device as described in any one of the appendices A1 to A6.

[0284] (Note A8) The semiconductor device (10) includes a protective insulating film (17) that covers the main electrode portion (21), The protective insulating film (17) has an opening (17G) that exposes the first bonding region (11) and the second bonding region (12) in a state of communication with each other. A semiconductor device as described in any one of the appendices A1 to A6.

[0285] (Note A9) The aforementioned cell is the main cell (18A), The temperature-sensitive diode (40P) comprises diode cells (40A to 40D) formed on the surface (38a) of the insulating film (38). The aforementioned diode cells (40A~40D) are Semiconductor region (44P) for the first diode of the first conductivity type, The semiconductor region for the second diode (45P) is formed in an annular shape surrounding the semiconductor region for the first diode (44P), and has a second conductivity type semiconductor region for the second diode (45P). A semiconductor device as described in any one of the appendices A1 to A8.

[0286] (Note A10) The semiconductor device (10) is An intermediate insulating film (39) covering the temperature-sensitive diode (40P), The intermediate insulating film (39) is formed on the surface (39b) and comprises wiring (51-55) electrically connected to the semiconductor region for the first diode (44P) and the semiconductor region for the second diode (45P). The semiconductor device described in Appendix A9.

[0287] (Note A11) Multiple diode cells (40A to 40D) are provided. The aforementioned plurality of diode cells (40A to 40D) are connected in series with each other. The semiconductor device described in Appendix A9 or A10.

[0288] (Note A12) The plurality of diode cells (40A to 40D) are arranged in a line when viewed from the thickness direction (z direction) of the semiconductor layer (30). The semiconductor device described in Appendix A11.

[0289] (Note A13) The semiconductor device (10) includes a protection diode (40Q) connected in antiparallel to the temperature-sensing diode (40P). A semiconductor device as described in any one of the appendices A1 to A12.

[0290] (Note A14) The semiconductor device (10) is an IGBT, The main electrode portion is an emitter electrode (21), The first electrode (41P) is the anode electrode, The second electrode (42P) is the cathode electrode. A semiconductor device as described in any one of the appendices A1 to A13.

[0291] (Note A15) The semiconductor device (10) is a SiCMOSFET, The main electrode portion (21) is a source electrode, The first electrode (41P) is the anode electrode, The second electrode (42P) is the cathode electrode. A semiconductor device as described in any one of the appendices A1 to A13.

[0292] (Note B1) Semiconductor layer (30), An insulating film (38,39) formed on the surface (30s) of the semiconductor layer (30), A main cell region (18) having a main cell (18A) provided in the semiconductor layer (30), A temperature-sensitive diode (40P) for detecting temperature is provided in a region separate from the main cell region (18), The temperature-sensitive diode (40P) has a diode cell (40A~40D) composed of a first semiconductor region (44P) of a first conductivity type formed in thin film form on the surface (38a) of the insulating film (38), and a second semiconductor region (45P) of a second conductivity type formed in thin film form on the surface (38a) of the insulating film (38). The second semiconductor region (45P) is formed in a ring shape surrounding the first semiconductor region (44P). The inner surface (45Pa) of the second semiconductor region (45P) is joined to the first semiconductor region (44P) in this semiconductor device.

[0293] (Note B2) The shape of the first semiconductor region (44P) as viewed from the thickness direction (z direction) of the semiconductor layer (30) is circular. The aforementioned second semiconductor region (45P) is The inner surface (45Pa) is bonded to the circumferential surface (44Pa) of the first semiconductor region (44P) over its entire circumference, The semiconductor layer (30) has an outer surface (45Pb) that is formed in a rectangular shape when viewed from the thickness direction (z direction). The semiconductor device described in Appendix B1.

[0294] (Note B3) The shape of the first semiconductor region (44P) as viewed from the thickness direction (z direction) of the semiconductor layer (30) is a rectangle. The aforementioned second semiconductor region (45P) is The inner surface (45Pa) is bonded over the entire surface to the outer surface (44Pa) of the first semiconductor region (44P), The semiconductor layer (30) has an outer surface (45Pb) that is formed in a rectangular shape when viewed from the thickness direction (z direction). The semiconductor device described in Appendix B1.

[0295] (Note B4) When viewed from the thickness direction (z direction) of the semiconductor layer (30), each corner (44Pd) of the first semiconductor region (44P) is curved. The corners (45Pd) of the inner surface (45Pa) of the second semiconductor region (45P) are curved in accordance with each corner (44Pd) of the first semiconductor region (44P) so as to be in contact with each of those corners (44Pd). Semiconductor equipment as described in Appendix B3.

[0296] (Note B5) Viewed from the thickness direction (z direction) of the semiconductor layer (30), each edge of the first semiconductor region (44P) is inclined with respect to each edge constituting the outer surface (45Pb) of the second semiconductor region (45P). Semiconductor equipment as described in Appendix B3.

[0297] (Note B6) The semiconductor device (10) is An intermediate insulating film (39) covering the temperature-sensitive diode (40P), The first wiring (51) and the second wiring (52) formed on the surface (39b) of the intermediate insulating film (39), A first through-wire (81P) penetrates the intermediate insulating film (39) and connects the first wiring (51) and the first semiconductor region (44P), The system includes a second through-wiring (82P) that penetrates the intermediate insulating film (39) and connects the second wiring (52) and the second semiconductor region (45P). A semiconductor device as described in any one of the appendices B1 to B5.

[0298] (Note B7) The first wiring (51) has a first region connection portion (51A) provided at a position overlapping with the first semiconductor region (44P) when viewed from the thickness direction (z direction) of the semiconductor layer (30), and a first extension portion (51B) extending from the first region connection portion (51A) toward the outside of the first semiconductor region (44P), The second wiring (52) has a second region connection portion (52A) provided at a position overlapping with the second semiconductor region (45P) when viewed from the thickness direction (z direction) of the semiconductor layer (30), and a second extension portion (52B) extending from the second region connection portion (52A) toward the outside of the second semiconductor region (45P). The semiconductor device described in Appendix B6.

[0299] (Note B8) The second region connection portion (52A), when viewed from the thickness direction (z direction) of the semiconductor layer (30), surrounds a part of the first region connection portion (51A) and is formed as an open annular shape with a gap so as not to come into contact with the first extension portion (51B). Semiconductor device as described in Appendix B7.

[0300] (Note B9) The temperature-sensing diode (40P) has a plurality of diode cells (40A to 40D) arranged in one direction and connected in series with each other. A semiconductor device as described in any one of the appendices B1 to B5.

[0301] (Note B10) The plurality of diode cells (40A to 40D) include a first diode cell (40A) and a second diode cell (40B) adjacent to each other in the direction of the arrangement of the plurality of diode cells (40A to 40D), The semiconductor device (10) is An intermediate insulating film (39) covering the temperature-sensitive diode (40P), A first wiring (51) is formed on the surface (39b) of the intermediate insulating film (39) and connected to the first semiconductor region (44P) of the first diode cell (40A), The intermediate insulating film (39) includes a second wiring (52) formed on the surface (39b) and insulated from the first wiring (51), The second wiring (52) electrically connects the second semiconductor region (45P) of the first diode cell (40A) and the first semiconductor region (44P) of the second diode cell (40B). The semiconductor device described in Appendix B9.

[0302] (Note B11) The second wiring (52) is, Viewed from the thickness direction (z direction) of the semiconductor layer (30), the first part (56) is provided at a position overlapping with the second semiconductor region (45P) of the first diode cell (40A) and is electrically connected to the second semiconductor region (45P) of the first diode cell (40A), Viewed from the thickness direction (z direction) of the semiconductor layer (30), the second part (57) is provided at a position overlapping with the first semiconductor region (44P) of the second diode cell (40B) and is electrically connected to the first semiconductor region (44P) of the second diode cell (40B), Includes a connecting part (58) that connects the first part (56) and the second part (57). The semiconductor device described in Appendix B10.

[0303] (Note B12) In the diode arrangement portion (21b) where the temperature-sensing diode (40P) is arranged, a first wiring lead-out region (21ba) and a second wiring lead-out region (21bb) are provided at both ends in the arrangement direction. The plurality of diode cells (40A to 40D) include a first end cell (40A) and a second end cell (40D) provided at both ends in the direction of arrangement, The first end cell (40A) is positioned closer to the second wiring lead-out area (21bb), The second terminal cell (40B) is positioned closer to the first wiring lead-out area (21ba), The semiconductor device (10) is An intermediate insulating film (39) covering the temperature-sensitive diode (40P), A first end wiring (51) formed on the surface (39b) of the intermediate insulating film (39), having a first end connection portion (51A) provided at a position overlapping with the first semiconductor region (44P) of the first end cell (40A) when viewed from the thickness direction (z direction) of the semiconductor layer (30), and a first end extension portion (51B) extending from the first end connection portion (51A) to the outside of the first semiconductor region (44P) of the first end cell (40A) and constituting the first electrode (41P) of the temperature-sensitive diode (40P), A first connecting wire (71) is connected to the first end extension (51B) and passes through the first wiring outlet area (21ba), A second end wiring (55) formed on the surface (39b) of the intermediate insulating film (39), having a second end connection portion (55A) provided at a position overlapping with the first semiconductor region (44P) of the second end cell (40D) when viewed from the thickness direction (z direction) of the semiconductor layer (30), and a second end extension portion (55B) extending from the second end connection portion (55A) to the outside of the first semiconductor region (44P) of the second end cell (40D) and constituting the second electrode (42P) of the temperature-sensitive diode (40P), The device comprises a second connecting wire (72) connected to the second end extension (55B) and passing through the second wiring outlet area (21bb). The semiconductor device described in Appendix B10 or B11.

[0304] (Note B13) The diode cell is the first diode cell (40A), The temperature-sensitive diode (40P) has a second diode cell (40B) provided separately from the first diode cell (40A), The second diode cell (40B) is composed of a third semiconductor region (103) of a first conductivity type formed as a thin film on the surface (38a) of the insulating film (38), and a fourth semiconductor region (104) of a second conductivity type formed as a thin film on the surface (38a) of the insulating film (38). The third semiconductor region (103) is formed in an annular shape surrounding the second semiconductor region (102), and has an inner surface (103a) bonded to the outer surface (102b) of the second semiconductor region (102). The fourth semiconductor region (104) is formed in an annular shape surrounding the third semiconductor region (103) and has an inner surface (104a) bonded to the outer surface (103b) of the third semiconductor region (103). The semiconductor device described in Appendix B1.

[0305] (Note B14) The semiconductor device (10) is An intermediate insulating film (39) covering the temperature-sensitive diode (40P), A first wiring (121) is formed on the surface (39b) of the intermediate insulating film (39) and is provided in a position that overlaps with the first semiconductor region (101), A second wiring (122) is formed on the surface (39b) of the intermediate insulating film (39) and is provided in a position that overlaps with both the second semiconductor region (102) and the third semiconductor region (103), A third wiring (103) is formed on the surface (39b) of the intermediate insulating film (39) and is provided in a position that overlaps with the fourth semiconductor region (104), A first through-wire (126A) penetrates the intermediate insulating film (39) and connects the first wiring (121) and the first semiconductor region (101), A second through-wiring (126B) penetrates the intermediate insulating film (39) and connects the second wiring (122) and the second semiconductor region (102), A third through-wire (126C) penetrates the intermediate insulating film (39) and connects the second wiring (122) and the third semiconductor region (103), The system includes a fourth through-wiring (126D) that penetrates the intermediate insulating film (39) and connects the third wiring (123) and the fourth semiconductor region (104). Semiconductor device as described in Appendix B13.

[0306] (Note B15) The first wiring (121) has a first region connection portion (121A) and a first extension portion (121B), The first region connection portion (121A) is provided in a position that overlaps with the first semiconductor region (101) when viewed from the thickness direction (z direction) of the semiconductor layer (30), and is connected to the first through-wiring (126A). The first extension (121B) extends from the first region connection (121A) toward the outside of the first semiconductor region (101), The second wiring (122), when viewed from the thickness direction (z direction) of the semiconductor layer (30), is formed in an open annular shape that surrounds a part of the first region connection portion (121A) and has a gap so as not to come into contact with the first extension portion (121B). The third wiring (123) is provided at a spaced position radially outward from the second wiring (122) when viewed from the thickness direction (z direction) of the semiconductor layer (30), and is formed in an open annular shape with a gap so as not to come into contact with the first extension (121B). The semiconductor device described in Appendix B14.

[0307] (Note B16) The shape of the first semiconductor region (101) as viewed from the thickness direction (z direction) of the semiconductor layer (30) is circular. The second semiconductor region (102) is an annular shape having an inner surface (102a) that is joined to the circumferential surface (101a) of the first semiconductor region (101) over its entire circumference. The third semiconductor region (103) is formed in an annular shape surrounding the second semiconductor region (102), and has an inner circumferential surface (103a) that is joined to the outer circumferential surface (102b) of the second semiconductor region (102) over its entire circumference. The fourth semiconductor region (104) is formed in an annular shape surrounding the third semiconductor region (103), and has an inner circumferential surface (104a) that is joined to the outer circumferential surface (103b) of the third semiconductor region (103) over its entire circumference. When viewed from the thickness direction (z direction) of the semiconductor layer (30), the first semiconductor region (101), the second semiconductor region (102), the third semiconductor region (103), and the fourth semiconductor region (104) are arranged in a concentric manner. A semiconductor device as described in any one of the appendices B13 to B15.

[0308] (Note B17) The semiconductor device (10) includes a protection diode (40Q) connected in antiparallel to the temperature-sensitive diode (40P). A semiconductor device as described in any one of the appendices B1 to B16. [Explanation of Symbols]

[0309] 10...Semiconductor device, 10ce...Edge, 11...Emitter electrode pad (first junction region), 12...Cathode electrode pad (second junction region), 17...Protective insulating film, 17A...First opening, 17B...Second opening, 17G...Opening, 17a...Partition region, 18...Main cell region (cell region), 18A...Main cell (cell), 21...Emitter electrode (main electrode part), 21P...Adjacent region, 21b...Diode placement area, 21ba...First wiring lead-out region, 21bb...Second wiring lead-out region, 22...Anode electrode (connecting electrode for diode), 30...Semiconductor substrate (semiconductor layer), 30s...Base Plate surface (semiconductor layer surface), 38...insulating film, 38A...insulating film, 38Aa...surface, 39...intermediate insulating film, 39b...surface, 40P...temperature-sensitive diode, 40A...first diode cell (first end cell), 40B...second diode cell, 40C...third diode cell, 40D...fourth diode cell (second end cell), 40Q...protection diode, 41P...first electrode, 42P...second electrode, 44P...first semiconductor region, 44Pa...circumferential surface, 44Pc...outer surface, 44Pd...corner, 45P...second semiconductor region, 45Pa...inner circumferential surface, 45Pb...outer surface, 45Pc...inner surface, 50..., 51...first Wiring, 51A...First area connection (first end connection), 51B...First extension (first end extension), 52...Second wiring, 53...Third wiring, 55...Fifth wiring, 55A...Fifth area connection (second end connection), 55B...Fifth extension (second end extension), 56...First part, 57...Second part, 58...Connection part, 71...First connection wire (connection wiring for first electrode), 72...Second connection wire (connection wiring for second electrode), 81P...First through-wire, 82P...Second through-wire, 83P...Third through-wire, 84P...Fourth through-wire, 100...Temperature-sensitive diode, 100A...First diode cell (diode cell), 100B...Second diode cell, 100M...First electrode, 100N...Second electrode, 101...First semiconductor region, 101a...Circumferential surface, 102...Second semiconductor region, 102a...Inner circumferential surface, 102b...Outer circumferential surface, 103...Third semiconductor region, 103a...Inner circumferential surface, 103b...Outer circumferential surface, 104...Fourth semiconductor region, 104a...Inner circumferential surface, 104b...Outer circumferential surface, 110...Protection diode, 121...First wiring, 121A...First region connection part, 121B...First extension part, 122...Second wiring, 123...Third wiring, 124...Fourth wiring, 125...Fifth wiring, 125A...Fifth region connection part, 125B...Fifth extension part,126A…First through-wiring, 126B…Second through-wiring, 126C…Third through-wiring, 126D…Fourth through-wiring, 141…First connection line, 142…Second connection line, 151…First wiring, 152…Second wiring, 153…First region connection, 154…First extension, 155…Second region connection, 156…Second extension, 161…First through-wiring, 162…Second through-wiring, CB…First conductive member, CWA…Second conductive member, RA…First junction region, RB…Second junction region, RE…Region (First semiconductor region), RK…Region (Second semiconductor region).

Claims

1. Semiconductor layer, A cell provided in the semiconductor layer, An insulating film covering the cell, The main electrode portion is laminated on the insulating film, A device for detecting temperature, comprising a temperature-sensitive diode having a first electrode and a second electrode, A diode connection electrode for connecting the Series 1 electrode to the outside, Equipped with, The main electrode section is A region to which a first conductive member for connecting the main electrode portion to the outside is joined, comprising a first region electrically connected to the second electrode, The semiconductor layer has a second region, which is a region different from the first region and is located adjacent to the first region, as viewed from the thickness direction of the semiconductor layer. Viewed from the thickness direction of the semiconductor layer, the cell is provided in both the first semiconductor region overlapping with the first region and the second semiconductor region overlapping with the second region of the semiconductor layer. A semiconductor device that is a SiCMOSFET.

2. The first region includes an adjacent region adjacent to a part of the temperature-sensitive diode when viewed from the thickness direction of the semiconductor layer, The device includes a connecting wire for the second electrode that connects the second electrode to the adjacent region. The semiconductor device according to claim 1.

3. The wiring outlet region is located adjacent to the temperature-sensing diode and at a position different from the adjacent region, The connection wiring for the first electrode, which is connected to the first electrode, is connected to the diode connection electrode through the wiring lead-out region. The semiconductor device according to claim 2.

4. Viewed from the thickness direction of the semiconductor layer, the cell is not formed in the region of the semiconductor layer that overlaps with the diode connection electrode. The semiconductor device according to any one of claims 1 to 3.

5. Viewed from the thickness direction of the semiconductor layer, the semiconductor layer is formed in a rectangular shape. Viewed from the thickness direction of the semiconductor layer, the second region and the diode connection electrode are arranged side by side along one side of the semiconductor layer. A semiconductor device according to any one of claims 1 to 4.

6. Viewed from the thickness direction of the semiconductor layer, the diode connection electrode is positioned closer to the temperature-sensitive diode with respect to the second region. The semiconductor device according to claim 5.

7. The semiconductor device includes a protective insulating film covering the main electrode portion, The protective insulating film is A first opening that exposes the first region, A second opening that exposes the second region, A partition wall region is arranged to separate the first opening and the second opening, It has A semiconductor device according to any one of claims 1 to 6.

8. The semiconductor device includes a protective insulating film covering the main electrode portion, The protective insulating film has openings that expose the first region, the second region, and the region between the first region and the second region. A semiconductor device according to any one of claims 1 to 6.

9. The aforementioned cell is the main cell, The temperature-sensitive diode comprises a diode cell formed on the surface of the insulating film, The diode cell is A semiconductor region for the first diode of the first conductivity type, The semiconductor region for the second diode is formed in an annular shape surrounding the semiconductor region for the first diode and has a second conductivity type semiconductor region for the second diode. A semiconductor device according to any one of claims 1 to 8.

10. The aforementioned semiconductor device is An intermediate insulating film covering the temperature-sensitive diode, The intermediate insulating film comprises wiring formed on the surface of the intermediate insulating film and electrically connected to the semiconductor region for the first diode and the semiconductor region for the second diode. The semiconductor device according to claim 9.

11. Multiple diode cells are provided, The plurality of diode cells are connected in series with each other. The semiconductor device according to claim 9 or 10.

12. The plurality of diode cells are arranged in a line when viewed from the thickness direction of the semiconductor layer. The semiconductor device according to claim 11.

13. The semiconductor device includes a protection diode connected in antiparallel to the temperature-sensing diode. A semiconductor device according to any one of claims 1 to 12.

14. The main electrode section is a source electrode, The first electrode is an anode electrode, The second electrode is a cathode electrode. A semiconductor device according to any one of claims 1 to 13.

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