Multi-chip modules and electronic control devices

Abstract

Even when a power supply circuit for inter-chip communication is provided outside the multi-chip module, it is possible to suppress the deterioration of the EMC of the electronic control unit on which the multi-chip module is installed. [Solution] The system comprises at least two or more chips 100 and a module board 104 for mounting on an ECU via module terminals. The chips 100 perform inter-chip communication, and the power for inter-chip communication is supplied to the chips 100 from a power supply IC located on the ECU board 20, which is outside the module, via a power supply terminal among the module terminals. The module board 104 is provided with at least one OPC 105 connected to the power supply terminal, and the power supply path from the power supply terminal to the chips 100 passes through the OPC 105.

Description

Technical Field

[0001] The present disclosure relates to a multi-chip module and an electronic control device.

Background Art

[0002] An electronic control device including a multi-chip module in which a plurality of semiconductor chips are integrated into one package is known. For example, Patent Document 1 discloses a multi-chip module having a communication path connected to a communication terminal and a power supply circuit on a module substrate. The communication terminal is a semiconductor element having a communication interface function, and the power supply circuit supplies power to the semiconductor element.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When aiming for further miniaturization of a multi-chip module (hereinafter, MCM) as disclosed in Patent Document 1, it is conceivable to provide a power supply circuit as a communication I / O power supply for supplying power to a communication interface circuit outside the MCM. In this case, for a communication I / O power supply that does not handle a large current like a core power supply, there is no technical idea of providing a bypass capacitor in the MCM to cope with voltage changes. Therefore, the bypass capacitor is also provided outside the MCM.

[0005] As described above, placing the communication I / O power supply for inter-chip communication in an MCM outside the MCM can easily worsen EMC (Electromagnetic Compatibility). The details are as follows: When noise from inter-chip communication is superimposed on a high-impedance region outside the MCM, it becomes difficult for the noise to return to the noise source even through a bypass capacitor outside the MCM. For example, if noise from inter-chip communication is superimposed on the communication I / O power supply outside the MCM, the noise will leak out of the MCM. Even if there is a bypass capacitor outside the MCM, the noise that leaks out does not return to the MCM (the noise source) because the MCM terminals have high impedance, and the noise spreads throughout the entire electronic control unit. This leads to a deterioration of the EMC of the electronic control unit. This problem is more likely to occur as inter-chip communication speeds increase, for example, to the GHz order.

[0006] One objective of this disclosure is to provide a multichip module and an electronic control unit that can suppress the deterioration of the EMC of the electronic control unit on which the multichip module is installed, even when a power supply circuit for interchip communication is provided outside the multichip module. [Means for solving the problem]

[0007] The above objectives are achieved by a combination of features described in the independent claims, and the subordinate claims provide further advantageous specific examples of the disclosure. The reference numerals in parentheses in the claims indicate correspondences with specific means described in the embodiments described later as one aspect, and do not limit the technical scope of this disclosure.

[0008] To achieve the above objective, the multi-chip module of this disclosure is a multi-chip module mounted on an electronic control unit (1,2) via module terminals (106), comprising at least two or more chips (100,101,102,103) and a module board (104) on which the chips are provided for mounting on the electronic control unit via module terminals, wherein the chips perform inter-chip communication, which is communication between chips, and the chips receive power for inter-chip communication from a power supply circuit (30) provided on an electronic control unit board (20), which is an electronic control unit board outside the module, via power supply terminals (161,162,163,164) among the module terminals, wherein the module board is provided with at least one or more bypass capacitors (105,151,152,153) for the power supply terminals, and the power supply path from the power supply terminals to the chips passes through the bypass capacitors.

[0009] Furthermore, in order to achieve the above objective, the electronic control device of this disclosure is an electronic control device that includes a multi-chip module (10, 11, 12, 13) mounted on an electronic control device board (20), which is the board of the device, via a module terminal (106). The multi-chip module comprises a plurality of chips (100, 101, 102, 103), at least two of each, and a module board (104) on which the chips are provided for mounting on the electronic control device via the module terminal. The chips perform inter-chip communication, which is communication between chips. The chips receive power for inter-chip communication from a power supply circuit (30) provided on the electronic control device board, which is outside the multi-chip module, via power supply terminals (161, 162, 163, 164) among the module terminals. The module board is provided with at least one bypass capacitor (105, 151, 152, 153) for the power supply terminals, and the power supply path from the power supply terminals to the chips passes through the bypass capacitors.

[0010] According to these findings, at least one bypass capacitor will be provided on the module board of the multi-chip module for the power supply terminals that supply power for inter-chip communication from an external power supply circuit to the chips. Therefore, this bypass capacitor will make it difficult for noise from inter-chip communication to leak out of the multi-chip module. Consequently, it will be possible to suppress the spread of noise from inter-chip communication throughout the entire electronic control unit on which the multi-chip module is mounted. As a result, even if a power supply circuit for inter-chip communication is provided outside the multi-chip module, it will be possible to suppress the deterioration of the EMC of the electronic control unit on which the multi-chip module is mounted. [Brief explanation of the drawing]

[0011] [Figure 1] This is a schematic diagram showing an example of the general configuration of the ECU according to Embodiment 1. [Figure 2] This is an example of a top view of the MCM according to Embodiment 1. [Figure 3] This is an example of a view of the MCM according to Embodiment 1 from below. [Figure 4] This is an example of a side view of the MCM according to Embodiment 1. [Figure 5] This is a circuit block diagram showing an example of the configuration of the ECU according to Embodiment 1. [Figure 6] This is an example of a top view of the MCM according to Embodiment 2. [Figure 7] This is an example of a view of the MCM according to Embodiment 2 from below. [Figure 8] This is an example of a side view of the MCM according to Embodiment 2. [Figure 9] This is a circuit block diagram showing an example of the configuration of the ECU according to Embodiment 2. [Figure 10] This is an example of a top view of the MCM according to Embodiment 3. [Figure 11] This is an example of a view of the MCM according to Embodiment 3 from below. [Figure 12]It is a cross-sectional view taken along line XII-XII of FIGS. 10 and 11. [Figure 13] It is a circuit block diagram showing an example of the configuration of the ECU according to Embodiment 3. [Figure 14] It is an example of a top view of the MCM according to Embodiment 4. [Figure 15] It is an example of a bottom view of the MCM according to Embodiment 4. [Figure 16] It is a cross-sectional view taken along line XVI-XVI of FIGS. 14 and 15. [Figure 17] It is a circuit block diagram showing an example of the configuration of the ECU according to Embodiment 4. [Figure 18] It is a schematic diagram showing an example of the schematic configuration of the ECU according to Embodiment 5. [Figure 19] It is a circuit block diagram showing an example of the configuration of the ECU according to Embodiment 5.

Modes for Carrying Out the Invention

[0012] Referring to the drawings, a plurality of embodiments for disclosure will be described. For the sake of convenience of explanation, among the plurality of embodiments, parts having the same functions as those shown in the figures used in the previous explanations may be denoted by the same reference numerals, and the explanations thereof may be omitted. For parts denoted by the same reference numerals, the explanations in other embodiments can be referred to.

[0013] (Embodiment 1) <Schematic Configuration of ECU1> Hereinafter, this embodiment will be described with reference to the drawings. The ECU (Electronic Control Unit) 1 is an electronic control device that electronically controls various systems of an automobile. As shown in FIG. 1, the ECU 1 includes a multi-chip module (MCM) 10, an ECU board 20, and a power supply IC (Integrated Circuit) 30. In FIG. 1, an example of the ECU 1 in which one MCM 10 is mounted on the ECU board 20 is shown, but it is not necessarily limited to this. For example, the ECU 1 may be one in which a plurality of MCMs 10 are mounted on the ECU board 20. Also, on the ECU board 20, circuit elements and connectors different from the MCM 10 and the power supply IC 30 may be mounted.

[0014] The MCM 10 is a module in which a plurality of chips 100 are integrated into one package. The MCM 10 may be a SiP (System in Package). The MCM 10 may be, for example, a chiplet architecture. The configuration of the MCM 10 will be described later. The ECU board 20 is the board of the ECU 1. The ECU board 20 corresponds to the electronic control device board. The ECU board 20 is a wiring board in which a plurality of wirings mainly composed of conductive members are provided on an insulating board such as resin or ceramics, for example. The ECU board 20 has an insulating base material, a resist, and a conductor, etc. The insulating base material is formed using an electrical insulating material such as resin. The resist is a so-called solder resist. The conductor is disposed on the insulating base material. At least a part of the conductor constitutes a circuit. The conductor has a wiring. The wiring is formed, for example, by patterning a metal foil. The conductor may have, for example, via conductors.

[0015] The power supply IC 30 is an integrated circuit for supplying power to the chips 100 of the MCM 10. The power supply IC 30 corresponds to the power supply circuit. The power supply IC 30 may supply power to the MCM 10 via, for example, the pattern wiring of the ECU board 20.

[0016] <Schematic Configuration of MCM10> Next, we will explain the general configuration of the MCM10 using Figures 2 to 4. Figures 2 and 3 are plan views showing an example of the MCM10. Figure 2 is an example of a top view of the MCM10. Figure 3 is an example of a bottom view of the MCM10. Figure 4 is an example of a side view of the MCM10. Hereafter, the thickness direction of the module substrate 104 will be referred to as the Z direction. One direction perpendicular to the Z direction will be referred to as the X direction. The direction perpendicular to both the Z and X directions will be referred to as the Y direction. In Figures 2 to 4, the ECU substrate 20 is also shown for reference, although it is not a component of the MCM10. Hereafter, of the surfaces of the module substrate 104, the side facing the ECU substrate 20 will be referred to as the bottom surface, and the opposite side will be referred to as the top surface.

[0017] As shown in Figures 2 to 4, the MCM10 comprises a chip 100, a module board 104, an on-package capacitor (hereinafter referred to as OPC) 105, and module terminals 106. The MCM10 comprises multiple chips 100. In other words, the MCM10 is a multi-chip device. In this embodiment, we will continue the explanation using the example of the MCM10 having three chips. As shown in Figures 2 to 4, the MCM10 comprises three chips 100: chip A101, chip B102, and chip C103. Hereafter, when referring to the multiple chips 100 separately, they will be referred to as chip A101, chip B102, and chip C103.

[0018] The module substrate 104 is a wiring substrate in which multiple wirings mainly composed of conductive material are provided on an insulating substrate, such as resin or ceramics. The module substrate 104, like the ECU substrate 20, has an insulating substrate, a resist, and a conductor. The module substrate 104 may also be a multilayer substrate including three or more conductive layers. Multiple chips 100 are provided on the module substrate 104. In the example of this embodiment, as shown in Figures 2 to 4, chips A101, B102, and C103 are provided on the upper surface of the module substrate 104. The module substrate 104 is mounted on the ECU 1 via module terminals 106. In other words, the MCM 10 is mounted on the ECU 1 via module terminals 106.

[0019] Chip 100 is a semiconductor chip. Chip 100 is provided on the surface of the module substrate 104, as shown in Figure 2. Chip 100 is provided on the upper surface of the module substrate 104, as shown in Figure 2. Chip 100 has the function of performing communication between chips 100 (hereinafter referred to as inter-chip communication). It is preferable that Chip 100 performs communication according to a high-speed communication I / F as inter-chip communication. In other words, it is preferable that Chip 100 performs high-speed communication as inter-chip communication. This is because the configuration of this disclosure is suitable for suppressing the deterioration of EMC of ECU1, which becomes more pronounced with high-speed communication. High-speed communication between chips 100 may be performed within the module substrate 104, for example, in accordance with the PCI Express® standard. Chip 100 may have I / O for performing high-speed communication. As shown in Figure 2, Chip A101 has high-speed communication I / O 1011. Chip B102 has high-speed communication I / O 1021. Chip C103 has a high-speed communication I / O 1031.

[0020] Module terminal 106 is a terminal provided on the module board 104. Module terminal 106 is used for the electrical connection between the MCM 10 and the pattern wiring of the ECU board 20. As shown in Figures 3 and 4, module terminal 106 is provided on the lower surface of the module board 104. Module terminal 106 is connected to the pattern wiring on the upper surface of the module board 104, for example, via via conductors of the module board 104. In addition to functional terminals, module terminal 106 includes power supply terminals 161, 162, 163, and 164. Power supply terminals 161 to 164 are module terminals 106 for supplying power to the MCM 10 for inter-chip communication. Chip 100 is supplied with power for inter-chip communication from the power supply IC 30 via power supply terminals 161 to 164. Chip 100 and power supply terminals 161 to 164 are electrically connected via via conductors and pattern wiring. Power terminals 161-164 and power IC 30 are electrically connected via the pattern wiring of the ECU board 20 when the MCM 10 is mounted on the ECU board 20. This path connecting the chip 100 and the power IC corresponds to the power supply path. The power supply path can also be called a power line.

[0021] Power terminal 161 is used to supply power to chip A101 for inter-chip communication from chip A101 to chip B102. More specifically, power terminal 161 is used to supply power to high-speed communication I / O 1011 for inter-chip communication from chip A101 to chip B102. Power terminal 162 is used to supply power to chip B102 for inter-chip communication from chip B102 to chip A101. More specifically, power terminal 162 is used to supply power to high-speed communication I / O 1021 for inter-chip communication from chip B102 to chip A101. Power terminal 163 is used to supply power to chip A101 for inter-chip communication from chip A101 to chip C103. More specifically, power terminal 163 is used to supply power to high-speed communication I / O 1011 for inter-chip communication from chip A101 to chip C103. Power terminal 164 is used to supply power to chip C103 for inter-chip communication from chip C103 to chip A101. More specifically, power terminal 164 is used to supply power to high-speed communication I / O 1031 for inter-chip communication from chip C103 to chip A101.

[0022] OPC105 is a bypass capacitor provided on the module board 104. A bypass capacitor is a capacitor that diverts high-frequency noise entering the power supply path to ground. In this embodiment, as shown in Figure 2, one OPC105 is provided on the upper side of the module board 104. OPC105 is provided on the power supply path from power terminals 161 to 164 to the chip 100. In other words, the power supply path from power terminals 161 to 164 to the chip 100 passes through OPC105. In this example, the power supply path from power terminal 161 to the high-speed communication I / O 1011, the power supply path from power terminal 162 to the high-speed communication I / O 1021, the power supply path from power terminal 163 to the high-speed communication I / O 1011, and the power supply path from power terminal 164 to the high-speed communication I / O 1031 are provided so as to pass through one OPC105.

[0023] With the above configuration, one bypass capacitor, OPC105, is provided on the module board 104 for power terminals 161 to 164. Therefore, this OPC105 makes it difficult for noise from inter-chip communication to leak out of the MCM10. Consequently, it becomes possible to suppress the spread of noise from inter-chip communication throughout the ECU1. As a result, even if a power supply IC30 for inter-chip communication is provided outside the MCM10, it becomes possible to suppress the deterioration of the EMC of the ECU1 on which the MCM10 is installed.

[0024] The OPC105 is preferably located in a region of the module substrate 104 that is sandwiched between the regions where multiple chips 100 are each placed, within a region obtained by dividing the substrate surface in the direction of expansion. For example, as shown in Figure 2, the OPC105 is preferably located in a region on the module substrate 104 that is sandwiched between multiple chips 100. In the example in Figure 2, the OPC105 is located in a region on the module substrate 104 that is sandwiched between chips A101, B102, and C103. This makes it possible to place a bypass capacitor in a region where noise from high-speed inter-chip communication is likely to be superimposed, and near the high-speed communication I / O 1011, 1021, and 1023. As a result, it is possible to suppress noise from inter-chip communication from flowing out of the MCM10 and to easily improve the PI (Power Integrity) characteristics.

[0025] In the configuration of Embodiment 1, the number of chips 100 provided on the module board 104 is greater than the number of OPCs 105 provided on the module board 104. Specifically, there is one OPC 105 for every three chips 100. In such a configuration, it is preferable to do the following: It is preferable to position the power terminals 161 to 164 such that the wiring length from the power terminals 161 to 164 to the OPC 105 is shorter than the wiring length from the OPC 105 to the chip 100. Specifically, this can be achieved by concentrating the power terminals 161 to 164 near the OPC 105, as shown in Figure 3. ChA in Figure 3 shows the area on the top side where chip A101 is located. ChB in Figure 3 shows the area on the top side where chip B102 is located. ChC in Figure 3 shows the area on the top side where chip C103 is located. Co in Figure 3 shows the area on the top side where OPC 105 is located.

[0026] This makes it easier to supply power to multiple chips 100 via the OPC105. Furthermore, it facilitates feedback of inter-chip communication noise from power terminals 161-164 via the OPC105 before noise leaks out. By concentrating power terminals 161-164 in one location, these effects can be achieved even with only one OPC105 on the module board 104. Additionally, reducing the number of OPC105s on the module board 104 increases the design flexibility of the MCM10.

[0027] <Schematic configuration of the circuit block of ECU1 according to Embodiment 1> Next, with reference to FIG. 5, the schematic configuration of the circuit blocks of the ECU 1 according to Embodiment 1 will be described. FIG. 5 is a circuit block diagram showing an example of the configuration of the ECU 1 according to Embodiment 1. As described above, the power supply IC 30 is provided outside the MCM 10 in the ECU 1. The MCM 10 is provided with chip A 101, chip B 102, and chip C 103, which perform inter-chip communication with each other. FIG. 5 shows an example of the circuit of the power supply path that supplies power from the power supply IC 30 to the chip 100 for this inter-chip communication. Hereinafter, the power supply path that supplies power from the power supply IC 30 to the chip 100 for this inter-chip communication will be simply referred to as the power supply path. Note that since FIG. 5 is a circuit block diagram, the two paths of the power supply terminals 161 and 163 having the same potential for chip A 101 are represented by a single line.

[0028] As shown in FIG. 5, in the circuit of the power supply path, bypass capacitors 41 and 42 are provided outside the MCM 10. Also, in the circuit of the power supply path, an OPC 105 is provided inside the MCM 10. As shown in FIG. 5, all of the power supply paths from the power supply IC 30 to chip A 101, chip B 102, and chip C 103 pass through this OPC 105 inside the MCM 10. By this OPC 105 inside the MCM 10, noise in the inter-chip communication of any of chip A 101, chip B 102, and chip C 103 can be suppressed from flowing out of the MCM 10.

[0029] (Embodiment 2) Not limited to the configuration of the foregoing embodiment, the following configuration of Embodiment 2 may also be used. Hereinafter, an example of the configuration of Embodiment 2 will be described with reference to the drawings. The ECU 1 of Embodiment 2 is the same as the ECU 1 of Embodiment 1 except that some parts are different. Hereinafter, these different points will be described. The ECU 1 of Embodiment 2 includes an MCM 11 instead of the MCM 10.

[0030] <Schematic Configuration of MCM11> Next, we will explain the general configuration of the MCM11 using Figures 6 to 8. Figures 6 and 7 are plan views showing an example of the MCM11. Figure 6 is an example of a top view of the MCM11. Figure 7 is an example of a bottom view of the MCM11. Figure 8 is an example of a side view of the MCM11. Figures 6 to 8 also show the ECU board 20 for reference, although it is not a component included in the MCM11.

[0031] As shown in Figures 6 to 8, the MCM11 comprises a chip 100, a module board 104, an OPC 105, and module terminals 106. The MCM11 is similar to the MCM10 of Embodiment 1, except that the number of OPCs 105 and the arrangement of power terminals 161 to 164 are different. These differences will be explained below.

[0032] In Embodiment 2, multiple OPCs 105 are provided on the module board 104. In this embodiment, as shown in Figure 6, three OPCs 105 are provided on the upper side of the module board 104. Hereinafter, when these three OPCs 105 are distinguished, they will be referred to as OPC151, OPC152, and OPC153. OPCs 151 to 153 are provided on the power supply path from power terminals 161 to 164 to the chip 100. That is, the power supply path from power terminals 161 to 164 to the chip 100 passes through OPCs 151 to 153. In this example, the power supply path from power terminal 161 to the high-speed communication I / O 1011, and the power supply path from power terminal 163 to the high-speed communication I / O 1011 are provided to pass through OPC 151. The power supply path from power terminal 162 to the high-speed communication I / O 1021 is provided to pass through OPC 152. The power supply path from the power terminal 163 to the high-speed communication I / O 1031 is provided via the OPC 153. CoA in Figure 7 shows the area on the top side where the OPC 151 is located. CoB in Figure 7 shows the area on the top side where the OPC 152 is located. CoC in Figure 7 shows the area on the top side where the OPC 153 is located.

[0033] Even with the above configuration, bypass capacitors OPC151-153 are provided on the module board 104 for power terminals 161-164. Therefore, these OPC151-153 make it difficult for noise from inter-chip communication to leak out of the MCM11. Consequently, even if a power supply IC30 for inter-chip communication is provided outside the MCM11, it is possible to suppress the deterioration of the EMC of the ECU1 on which the MCM11 is installed.

[0034] OPCs 151 to 153 are preferably provided in an area on the module board 104 sandwiched between multiple chips 100, as shown in Figure 6. In the example in Figure 6, OPC 151 is provided in an area on the module board 104 sandwiched between chips A 101, B 102, and C 103. OPC 152 is provided in an area on the module board 104 sandwiched between chips A 101 and B 102. OPC 153 is provided in an area on the module board 104 sandwiched between chips A 101 and C 103. This also makes it possible to place bypass capacitors in an area where noise from high-speed inter-chip communication is likely to be superimposed, and near high-speed communication I / Os 1011, 1021, and 1023. As a result, noise from inter-chip communication is suppressed from flowing out of the MCM 11, and the PI characteristics are made easier to improve.

[0035] In the configuration of Embodiment 2, the number of chips 100 provided on the module board 104 is less than or equal to the number of OPCs 105 provided on the module board 104. Specifically, there are three chips 100 and three OPCs 105. In such a configuration, the following should be done: Power terminals 161 to 164 should be distributed among the multiple chips 100 according to the number of chips 100. Specifically, as shown in Figure 7, power terminals 161 to 164 should be distributed near each chip 100. In the example in Figure 7, power terminals 161 and 163 are located near chip A 101. Power terminal 162 is located near chip B 102. Power terminal 163 is located near chip C 103.

[0036] If at least one OPC105 can be placed for each of the multiple chips, then even if the power terminals 161 to 164 are distributed among the chips, it becomes possible to suppress the outflow of noise from inter-chip communication in each OPC105. Therefore, in a configuration like that of Embodiment 2, the power terminals 161 to 164 can be distributed among the multiple chips 100 according to the number of chips 100.

[0037] <Schematic configuration of the circuit block of ECU1 according to Embodiment 2> Next, the schematic configuration of the circuit block of the ECU1 according to Embodiment 2 will be described using Figure 9. Figure 9 is a circuit block diagram showing an example of the configuration of the ECU1 according to Embodiment 2. The configuration shown in Figure 9 is the same as the configuration shown in Figure 5, except for a few differences. These differences will be explained below.

[0038] As shown in Figure 9, in the power supply circuit, a bypass capacitor 41 is provided outside the MCM11. In addition, in the power supply circuit, OPC151, 152, and 153 are provided as OPC105 inside the MCM11. As shown in Figure 9, all power supply paths from the power supply IC 30 to chips A101, B102, and C103 pass through OPC105 inside the MCM11. The power supply path from the power supply IC 30 to chip A101 passes through OPC151. The power supply path from the power supply IC 30 to chip B102 passes through OPC152. The power supply path from the power supply IC 30 to chip C103 passes through OPC153. The OPCs 151, 152, and 153 within the MCM11 prevent noise from inter-chip communication between chips A101, B102, and C103 from leaking into the MCM11.

[0039] (Embodiment 3) Not limited to the configuration of the foregoing embodiment, the configuration of Embodiment 3 below may also be adopted. Hereinafter, an example of the configuration of Embodiment 3 will be described with reference to the drawings. The ECU 1 of Embodiment 3 is the same as the ECU 1 of Embodiment 1 except that a part thereof is different. Hereinafter, this difference will be described. The ECU 1 of Embodiment 3 includes an MCM 12 instead of the MCM 10.

[0040] <Schematic Configuration of MCM12> Subsequently, the schematic configuration of the MCM 12 will be described with reference to FIGS. 10 to 12. FIGS. 10 and 11 are plan views showing an example of the MCM 12. FIG. 10 is an example of a top view of the MCM 12. FIG. 11 is an example of a bottom view of the MCM 12. FIG. 12 is a cross-sectional view taken along the line XII-XII of FIGS. 10 and 11. In FIGS. 10 to 12, the ECU board 20 is also shown for reference, although it is not a component included in the MCM 12.

[0041] As shown in FIGS. 10 to 12, the MCM 12 includes a chip 100, a module board 104, an OPC 105, and module terminals 106. The MCM 11 is the same as the MCM 10 of Embodiment 1 except that the arrangement of the OPC 105 and the arrangement of the power supply terminals 161 to 164 are different. Hereinafter, this difference will be described.

[0042] In Embodiment 3, one OPC 105 is provided on the module board 104. In this embodiment, as shown in FIG. 11, the OPC 105 is provided on the lower surface side of the module board 104. That is, the OPC 105 is provided on the surface of the module board 104 opposite to the surface on which the plurality of chips 100 are provided, and on the surface on which the module terminals 106 are provided. The OPC 105 is also provided on the power supply path from the power supply terminals 161 to 164 to the chip 100. In the example of this embodiment, the power supply paths from the power supply terminal 161 to the high-speed communication I / O 1011, from the power supply terminal 162 to the high-speed communication I / O 1021, from the power supply terminal 163 to the high-speed communication I / O 1011, and from the power supply terminal 164 to the high-speed communication I / O 1031 are provided to pass through one OPC 105.

[0043] Even with the above configuration, a bypass capacitor, OPC105, is provided on the module board 104 for power terminals 161-164. Therefore, this OPC105 makes it difficult for noise from inter-chip communication to leak out of the MCM12. Consequently, even if a power supply IC 30 for inter-chip communication is provided outside the MCM12, it is possible to suppress the deterioration of the EMC of the ECU1 on which the MCM12 is located.

[0044] Furthermore, with the above configuration, the OPC 105 is provided on the side of the module board 104 opposite to the side on which the chip 100 is provided, thus improving the design flexibility of the side on which the chip 100 is provided. For example, the design flexibility of the wiring leads from each chip 100 is improved. This makes it possible to reduce the number of layers in the module board 104, and thus reduce costs.

[0045] The OPC105 is preferably located in a region between the regions where multiple chips 100 are arranged, within a region obtained by dividing the module substrate 104 in the direction of expanding the substrate surface, as shown in Figure 11. For example, in the example in Figure 11, the OPC105 is located in a region on the lower surface of the module substrate 104, between the regions ChA, ChB, and ChC, where chips A101, B102, and C103 are arranged on the upper surface. This also makes it possible to place a bypass capacitor in a region where noise from high-speed inter-chip communication is likely to be superimposed, and near the high-speed communication I / O 1011, 1021, and 1023. As a result, it is possible to suppress the outflow of noise from inter-chip communication to the MCM12 and to easily improve the PI characteristics.

[0046] In the configuration of Embodiment 3, the number of chips 100 provided on the module board 104 is greater than the number of OPCs 105 provided on the module board 104. In this configuration, as described in Embodiment 1, it is preferable to position the power terminals 161 to 164 such that the wiring length from the power terminals 161 to 164 to the OPC 105 is shorter than the wiring length from the OPC 105 to the chip 100. Specifically, this can be achieved by concentrating the power terminals 161 to 164 near the OPC 105, as shown in Figure 11. This makes it possible to produce the same effects as described in Embodiment 1.

[0047] <Schematic configuration of the circuit block of ECU1 according to Embodiment 3> Next, the schematic configuration of the circuit block of the ECU1 according to Embodiment 3 will be described using Figure 13. Figure 13 is a circuit block diagram showing an example of the configuration of the ECU1 according to Embodiment 3. The circuit block of the ECU1 according to Embodiment 3 is the same as the circuit block of the ECU1 according to Embodiment 1. Embodiment 3 differs from Embodiment 1 in that the OPC 105 is placed on the lower side of the module board 104 instead of the upper side. However, since the OPC 105 is provided on the module board 104 as in Embodiment 1, the circuit block of the ECU1 is the same as in Embodiment 1.

[0048] In Embodiment 3, a configuration is shown in which one OPC 105 is provided on the lower side of the module substrate 104, but this is not necessarily the only configuration. For example, it may be combined with the configuration of Embodiment 2 to provide multiple OPC 105s on the lower side of the module substrate 104.

[0049] (Embodiment 4) The configuration is not limited to the embodiment described above, but may also be that of the following embodiment 4. Below, an example of the configuration of embodiment 4 will be explained with reference to a diagram. The ECU1 of embodiment 4 is the same as the ECU1 of embodiment 1, except for a few differences. These differences will be explained below. The ECU1 of embodiment 4 includes an MCM13 instead of an MCM10.

[0050] <Schematic Configuration of MCM13> Subsequently, the schematic configuration of MCM13 will be described with reference to FIGS. 14 to 16. FIGS. 14 and 15 are plan views showing an example of MCM13. FIG. 14 is an example of a top view of MCM13. FIG. 15 is an example of a bottom view of MCM13. FIG. 16 is a cross-sectional view taken along line XVI-XVI of FIGS. 14 and 15. In FIGS. 14 to 16, although not a component included in MCM13, ECU board 20 is also shown for reference.

[0051] As shown in FIGS. 14 to 16, MCM13 includes chip 100, module substrate 104, OPC 105, and module terminal 106. MCM13 is the same as MCM10 of Embodiment 1 except for the arrangement of OPC 105 and the arrangement of power supply terminals 161 to 164. The differences will be described below.

[0052] In Embodiment 4, one OPC 105 is provided on module substrate 104. In this embodiment, as shown in FIG. 16, OPC 105 is provided inside module substrate 104. As this OPC 105, a thin film capacitor is used. That is, in Embodiment 4, a thin film capacitor is provided as a bypass capacitor in an internal layer of module substrate 104. This OPC 105 is also provided on the power supply path from power supply terminals 161 to 164 to chip 100. Also in the example of this embodiment, the power supply paths from power supply terminal 161 to high-speed communication I / O 1011, from power supply terminal 162 to high-speed communication I / O 1021, from power supply terminal 163 to high-speed communication I / O 1011, and from power supply terminal 164 to high-speed communication I / O 1031 are provided to pass through one OPC 105.

[0053] Even with the above configuration, a bypass capacitor, OPC105, is provided on the module board 104 for power terminals 161-164. Therefore, this OPC105 makes it difficult for noise from inter-chip communication to leak out of the MCM13. Consequently, even if a power supply IC 30 for inter-chip communication is provided outside the MCM13, it is possible to suppress the deterioration of the EMC of the ECU1 on which the MCM13 is installed. Furthermore, with the above configuration, since the OPC105 is provided inside the module board 104, the design freedom of the surface on which the chips 100 are installed is improved. For example, the design freedom of wiring leads from each chip 100 is improved.

[0054] The OPC105 is preferably located in a region between the regions where multiple chips 100 are arranged, within a region obtained by dividing the module substrate 104 in the direction of expanding the substrate surface, as shown in Figure 15. For example, in the example in Figure 15, the OPC105 is located in a region within the module substrate 104 between ChA, ChB, and ChC, which are regions on the upper surface where chips A101, B102, and C103 are arranged, respectively. Co in Figure 15 indicates the region within the module substrate 104 where the OPC151 is located. With the above configuration, it becomes possible to place a bypass capacitor in a region where noise from inter-chip high-speed communication is likely to be superimposed, and near the high-speed communication I / O 1011, 1021, and 1023. As a result, it is possible to suppress the outflow of noise from inter-chip communication to the MCM13 and to easily improve the PI characteristics.

[0055] In the configuration of Embodiment 4, the number of the plurality of chips 100 provided on the module substrate 104 is larger than the number of OPCs 105 provided on the module substrate 104. In such a case, as described in Embodiment 1, it is preferable that the power supply terminals 161 to 164 are arranged at positions where the wiring length from the power supply terminals 161 to 164 to the OPC 105 is shorter than the wiring length from the OPC 105 to the chip 100. Specifically, as shown in FIG. 15, this can be achieved by providing the power supply terminals 161 to 164 concentrated in the vicinity of the OPC 105. According to this, it becomes possible to produce the same effect as described in Embodiment 1.

[0056] <Schematic configuration of the circuit block of the ECU 1 according to Embodiment 4> Subsequently, with reference to FIG. 17, the schematic configuration of the circuit block of the ECU 1 according to Embodiment 4 will be described. FIG. 17 is a circuit block diagram showing an example of the configuration of the ECU 1 according to Embodiment 4. The circuit block of the ECU 1 according to Embodiment 4 is the same as the circuit block of the ECU 1 according to Embodiment 1. In Embodiment 4, it is different from Embodiment 1 in that the OPC 105 is arranged inside the module substrate 104 instead of on the upper surface side of the module substrate 104. However, since the point that the OPC 105 is provided on the module substrate 104 is the same as in Embodiment 1, the circuit block of the ECU 1 is the same as in Embodiment 1.

[0057] In Embodiment 4, although the configuration in which one OPC 105 is provided in the module substrate 104 is shown, it is not necessarily limited to this. For example, in combination with the configuration of Embodiment 2, a configuration in which a plurality of OPCs 105 are provided in the module substrate 104 may be adopted.

[0058] (Embodiment 5) Not limited to the configurations of the foregoing embodiments, the following configuration of Embodiment 5 may also be adopted. Hereinafter, an example of the configuration of Embodiment 5 will be described with reference to the drawings.

[0059] <Schematic configuration of the ECU 2> The embodiment will now be described with reference to the drawings. As shown in Figure 18, the ECU2 includes the MCM10, the ECU board 20, the power supply IC30, and the IC50. The ECU2 is the same as the ECU1 of Embodiment 1, except for a few differences. These differences will be described below. The ECU2 includes the IC50. The IC50 is a different IC from the power supply IC30. The IC50 is located outside the MCM10 and is mounted on the ECU board 20. The IC50 has the function of communicating with the chip C103 of the MCM10. The MCM10 is the same as the MCM10 of Embodiment 1, except that the chip C103 communicates with the IC50.

[0060] <Schematic configuration of the circuit block of ECU1 according to Embodiment 5> Next, the schematic configuration of the circuit block of the ECU2 according to Embodiment 5 will be described using Figure 19. Figure 19 is a circuit block diagram showing an example of the configuration of the ECU2 according to Embodiment 5. The power supply IC 30 is located outside the MCM 10 of the ECU2. Chips A101, B102, and C103 are provided in the MCM 10, and they communicate with each other. IC 50 is located outside the MCM 10 of the ECU2 as described above, and communicates with chip C103 to the module's external network. Figure 19 shows an example of a power supply circuit that supplies power from the power supply IC 30 to chip 100 for this inter-chip communication and module external network communication. Note that, as Figure 19 is a circuit block diagram, the two paths for power terminals 161 and 163, which are at the same potential for chip A101, are represented by a single line.

[0061] As shown in Figure 19, bypass capacitors 41, 42, and 43 are provided outside the MCM10 in the power supply circuit for inter-chip communication. Also, a bypass capacitor 44 is provided outside the MCM10 in the power supply circuit for external module communication. The circuit inside the MCM10 is the same as that described in Embodiment 1. In Embodiment 5, a filter 60 for the power supply path from the power IC 30 to the power terminal 164 (i.e., for the power line) is provided on the ECU board 20. In other words, the filter 60 is provided outside the MCM10. Also, a bypass capacitor 44 is provided outside the MCM10 in the power supply circuit for external module communication.

[0062] Filter 60 should be a filter that removes at least one of the noise output from the power supply IC 30 and the frequency of external module communication. An LC filter, RC filter, ferrite bead, etc., can be used as filter 60.

[0063] According to the configuration of Embodiment 5, similar to Embodiments 1 to 4, the provision of the OPC 105 on the module board 104 makes it difficult for noise from inter-chip communication to leak out of the MCM 10. Furthermore, by providing the filter 60 outside the MCM 10 on the ECU board 20, it becomes possible to suppress the inflow of noise into the MCM 10 from outside the MCM 10. For example, the inflow of noise output from the power supply IC 30 into the MCM 10 can be suppressed by the filter 60. As another example, it becomes possible to suppress the leakage of noise into the MCM 10 from external module communication. This makes it easy to improve the PI characteristics while suppressing the deterioration of both EMI (Electromagnetic Interference) and EMS (Electromagnetic Susceptibility). Note that Embodiment 5 may also be combined with the configurations of Embodiments 2 to 4.

[0064] (Embodiment 6) In the embodiment described above, a configuration was shown in which three chips 100 are provided as multiple chips 100 in MCM 10, 11, 12, and 13, but this is not necessarily the only configuration. For example, if there are two or more multiple chips, a configuration other than three chips 100 may be provided in MCM 10, 11, 12, and 13.

[0065] This disclosure is not limited to the embodiments described above, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of this disclosure. [Explanation of symbols]

[0066] 1,2 ECU (Electronic Control Unit), 10,11,12,13 MCM (Multi-Chip Module), 20 ECU board (Electronic Control Unit board), 30 Power IC (Power supply circuit), 60 Filter, 100 Chip, 101 Chip A (Chip), 102 Chip B (Chip), 103 Chip C (Chip), 104 Module board, 105,151,152,153 OPC (Bypass Capacitor), 106 Module terminal, 161,162,163,164 Power terminal

Claims

1. A multi-chip module mounted on an electronic control unit (1, 2) via a module terminal (106), Multiple chips (100, 101, 102, 103) consisting of at least two or more, The system includes a module board (104) on which the chip is provided, for mounting on the electronic control device via the module terminals, The aforementioned chip performs inter-chip communication, which is communication between chips. The chip receives power for inter-chip communication from a power supply circuit (30) located on an electronic control device board (20), which is the board of the electronic control device, outside of its own module, via power supply terminals (161, 162, 163, 164) among the module terminals. The module board is provided with at least one bypass capacitor (105, 151, 152, 153) for the power supply terminals. The power supply path from the power terminal to the chip is a multi-chip module that passes through the bypass capacitor.

2. A multichip module according to claim 1, The bypass capacitor is provided in a multi-chip module in a region of the module board that is divided in the direction in which the board surface expands, and is sandwiched between the regions where the multiple chips are each arranged.

3. A multichip module according to claim 1, The bypass capacitor is provided on the multi-chip module, on the side of the module substrate opposite to the side on which the multiple chips are provided, and on the side on which the module terminals are provided.

4. A multichip module according to claim 1, The bypass capacitor is a thin-film capacitor provided within the module substrate of the multi-chip module.

5. A multichip module according to any one of claims 1 to 4, The number of chips provided on the module board is greater than the number of bypass capacitors provided on the module board, The power supply terminal is located in a multi-chip module where the wiring length from the power supply terminal to the bypass capacitor is shorter than the wiring length from the bypass capacitor to the chip.

6. A multichip module according to any one of claims 1 to 4, The number of chips provided on the module board is less than or equal to the number of bypass capacitors provided on the module board, The power terminals are arranged in a multi-chip module, distributed among multiple chips according to the number of chips.

7. An electronic control device including multi-chip modules (10, 11, 12, 13) mounted on an electronic control device board (20), which is the board of the device, via module terminals (106), The aforementioned multi-chip module is Multiple chips (100, 101, 102, 103) consisting of at least two or more, The system includes a module board (104) on which the chip is provided, for mounting on the electronic control device via the module terminals, The aforementioned chip performs inter-chip communication, which is communication between chips. The chip receives power for inter-chip communication from a power supply circuit (30) located on the electronic control unit board, outside the multi-chip module, via power supply terminals (161, 162, 163, 164) among the module terminals. The module board is provided with at least one bypass capacitor (105, 151, 152, 153) for the power supply terminals. The power supply path from the power terminal to the chip is an electronic control device that passes through the bypass capacitor.

8. The electronic control device according to claim 7, An electronic control device in which a filter (60) for the power line from the power supply circuit to the power supply terminal is provided on the electronic control device board.

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