Antenna device using coplanar waveguide interconnects between RF components

Abstract

This invention provides a compact antenna device that offers high reliability, high efficiency during transmission, and improved noise performance during reception. [Solution] The antenna device 100 includes an antenna substrate 130 having a first surface 143 and an opposing second surface 133, the second surface having an antenna ground plane 135. The antenna element 125 is located on the first surface of the antenna substrate. A first RF component 110 is mounted on the second surface of the antenna substrate and includes an RF circuit for adjusting signals to communicate with the antenna element. A second RF component 120 is mounted on the second surface of the antenna substrate. A coplanar waveguide interconnect 150 couples the first RF component to the second RF component and includes a central conductor 135a and first and second ground conductors on either side of the central conductor. The central conductor has a profile within the opening 141 of the antenna ground plane.

Description

Technical Field

[0001] The present disclosure generally relates to an interconnection structure between RF components in an antenna device and an antenna array integrated into a distributed radio frequency integrated circuit (RFIC) chip.

Background Art

[0002] In small antenna arrays, various applications have been found at microwave and millimeter-wave frequencies in aircraft, satellites, vehicles, watercraft, and base stations for general land communication. Such antenna arrays typically include microstrip patch radiating elements driven by a phase shift beamforming circuit to generate a phased array for beam steering. It is often desirable for the entire antenna system, including the antenna array and the beamforming circuit, to be thin and occupy minimal space.

[0003] A monolithic antenna array can be understood as an antenna array composed of antenna elements integrated with a small-sized radio frequency (RF) integrated circuit chip (RFIC) (e.g., a monolithic microwave integrated circuit (MMIC)). The monolithic antenna array may have a sandwich-type configuration in which the antenna elements are disposed in an exterior component layer and the RFIC is distributed over the entire effective antenna aperture in a proximity parallel component layer behind the antenna element layer. The RFIC may include a transmitting RF power amplifier (PA), a receiving low-noise amplifier (LNA), and / or an active phase shifter for beam steering. By dispersing the PA / LNA / phase shifter in this way, it is possible to achieve high reliability compared to a non-distributed IC design, as well as improved transmission efficiency and / or noise performance during reception.

Summary of the Invention

[0004] In one aspect of the present disclosure, the antenna device includes an antenna substrate having a first surface and an opposing second surface, the second surface having an antenna ground plane. An antenna element is located on the first surface of the antenna substrate. A first RF component is mounted on the second surface of the antenna substrate and includes an RF circuit for regulating signals communicated with the antenna element. A second RF component is mounted on the second surface of the antenna substrate. A coplanar waveguide (CPW) interconnect connects the first RF component to the second RF component and includes a central conductor and first and second ground conductors on either side of the central conductor. The central conductor has a profile within an opening in the antenna ground plane.

[0005] The central conductor and the first and second ground conductors may be formed in the same layer as the antenna ground plane within the antenna substrate.

[0006] The first RF component may be an RFIC chip in which the RF circuit includes a beamforming circuit that includes at least one amplifier and at least one phase shifter.

[0007] The antenna substrate may further include a redistribution layer (RDL) region between the antenna ground plane and a second surface to provide DC voltage and / or control signals to the RFIC chip, the RDL region including an insulating layer that is joined to the antenna ground plane.

[0008] Embodiments of a phased array antenna may include an antenna substrate having a first surface and an opposing second surface, the antenna substrate including an antenna ground plane on the second surface. Multiple antenna elements forming an antenna array are disposed on the first surface of the antenna substrate. Multiple RFIC chips are mounted on the second surface of the antenna substrate, each including a beamforming circuit for beam steering by adjusting signals communicated to at least one of the antenna elements through at least one of a plurality of first openings in the antenna ground plane. A combiner / divider component is disposed between the RFIC chips and mounted on the second surface of the antenna substrate. The combiner / divider component includes a portion of a beamforming network (BFN) including a plurality of combiner / divider conductors. Multiple coplanar waveguide (CPW) interconnects each couple one of the combiner / divider conductors to one of the RFIC chips, each including a central conductor and first and second ground conductors on either side of the central conductor. Each central conductor has a profile within one of a plurality of second openings in the antenna ground plane. [Brief explanation of the drawing]

[0009] The above and other aspects and features of the disclosed technology will become more apparent from the following detailed description, together with the accompanying drawings in which similar reference letters indicate similar elements or features. Different elements of the same or similar kind may be distinguished by adding a reference label with an underline / dash and a second label that distinguishes them within the same / similar elements (e.g., _1, _2), or by directly adding a reference label with a second label. However, if a given description uses only a first reference label, this label is applicable to any of the same / similar elements having the same first reference label, regardless of the second label. Elements and features may not be drawn to scale in the drawings.

[0010] [Figure 1A] Figure 1A is a cross-sectional view of an antenna device according to one embodiment, illustrating an exemplary CPW interconnect between the RFIC chip and RF components of the antenna device. [Figure 1B] Figure 1B is a plan view of the upper portion of the antenna substrate of the antenna device along line 1B-1B in Figure 1A, and shows an exemplary CPW interconnect. [Figure 1C] Figure 1C is a plan view of a portion of the antenna device along line 1C-1C in Figure 1A, showing exemplary electrical contacts of the RFIC chip and RF components related to the CPW interconnect. [Figure 1D] Figure 1D is a cross-sectional view along line 1D-1D in Figure 1B, showing the first ground-signal-ground (GSG) transition section connecting the CPW interconnect to the RFIC chip. [Figure 1E] Figure 1E is a cross-sectional view along line 1E-1E in Figure 1B, showing the second (GSG) transition section connecting the CPW interconnect to the RF component. [Figure 2A] Figure 2A is a cross-sectional view of an antenna device according to one embodiment, depicting another exemplary CPW interconnect within an antenna substrate having a redistribution layer (RDL). [Figure 2B] Figure 2B is a cross-sectional view of a portion of the antenna device along line 2B-2B in Figure 2A, showing an exemplary CPW interconnect. [Figure 2C] Figure 2C is a cross-sectional view of a portion of the antenna device along line 2C-2C in Figure 2B, showing the first GSG transition portion of the exemplary CPW interconnect. [Figure 2D] Figure 2D is a cross-sectional view of a portion of the antenna device along line 2D-2D in Figure 2B, showing the second GSG transition portion of the exemplary CPW interconnect. [Figure 3] Figure 3 is a cross-sectional view of an antenna device according to one embodiment, illustrating a further example of a CPW interconnect formed at least partially within the RDL region of the antenna substrate. [Figure 4A] Figure 4A is a cross-sectional view of an exemplary configuration of a portion of the antenna device along line 4-4 in Figure 3. [Figure 4B] Figure 4B is a cross-sectional view of another exemplary configuration of a portion of the antenna device along line 4-4 in Figure 3. [Figure 5A]Figure 5A is a cross-sectional view along the line 5A-5A in Figure 4A. [Figure 5B] Figure 5B is a cross-sectional view along the line 5B-5B in Figure 4B. [Figure 6A] Figure 6A is a top view of an active array antenna device according to one embodiment. [Figure 6B] Figure 6B is an end view of the active array antenna device as seen from direction 6B in Figure 6A. [Figure 7A] Figure 7A is a schematic diagram of a beamforming circuit in any of the exemplary antenna devices. [Figure 7B] Figure 7B is a schematic diagram of the beamforming circuit in any of the exemplary antenna devices. [Figure 7C] Figure 7C is a schematic diagram of a beamforming circuit in any of the exemplary antenna devices. [Figure 8] Figure 8 is a schematic diagram illustrating the beamforming network in any of the antenna devices. [Figure 9] Figure 9 is a flowchart illustrating an exemplary method for manufacturing an antenna device according to one embodiment. [Modes for carrying out the invention]

[0011] For explanatory purposes, the following description is provided with reference to the accompanying drawings to assist in a comprehensive understanding of certain exemplary embodiments of the technology disclosed herein. The description includes various specific details to help those skilled in the art understand the technology, but these details should be considered merely illustrative. For the purposes of simplification and clarification, descriptions of well-known functions and structures may be omitted where their inclusion would obscure the understanding of the technology by those skilled in the art.

[0012] FIG. 1A is a cross-sectional view of an antenna device 100 according to an embodiment. The antenna device 100 (the "antenna 100") includes at least one first RF component ("RFC") 110, at least one second RFC 120, an antenna substrate 130, and at least one antenna element 125. The antenna substrate 130 may have a lower (first) surface 143 to which the antenna element 125 is attached, and an upper surface 133 to which both the first RFC 110 and the second RFC 120 are attached. The antenna substrate 130 may be composed of a dielectric slab 138 integrated with an antenna ground plane 135 positioned on the upper surface 133 of the antenna substrate 130.

[0013] The first and second RFCs 110 and 120 each include RF circuits 118 and 128, respectively, to adjust the RF signals passing through them. Depending on the type of RFC, such adjustments may be passive or active. A passive RFC may be a transmit line component having fixed insertion loss and phase characteristics, such as a combiner / divider or connector. An active RFC may be an RF integrated circuit (RFIC) chip including one or more amplifiers and / or one or more phase shifters to provide controllable insertion loss or gain / controllable insertion phase. In this specification, an active RF circuit may be referred to as a beamforming circuit. In the example in Figure 1A and other examples below, the first RFC 110 is exemplified as an RFIC chip, and RF circuit 118 is exemplified as a beamforming circuit that adjusts the signal being communicated to the antenna element 125 through a first aperture 131 in the ground plane 135. (Hereafter, in describing this example, the first RFC110 may be referred to as the RFIC chip 110 or simply "RFIC110", and the RF circuit 118 may be referred to as the beamforming circuit 118.) Vias 155 extending through the dielectric 138 and the first aperture 131 may function as probe feeds coupling the antenna element 125 to the beamforming circuit 118. In other embodiments where the first RFC110 is a passive RFC, the RF circuit 118 therein may be coupled to the antenna element 125 directly or indirectly via intervening RF components (not shown) in the same manner as in Figure 1A.

[0014] The second RF component 120 may include passive and / or active RF circuits 128 printed in or on a dielectric and / or semiconductor substrate 121. An example of the second RFC120 is a combiner / divider network. If the antenna 100 is embodied as an active array having a plurality of antenna elements 125 and a plurality of RFIC chips 110 distributed across the effective aperture of the antenna 100, such a combiner / divider network of the second RFC120 may each have a plurality of combiner / divider conductors (sometimes referred to herein as “branch arms”) coupled to one of the RFIC chips 110. This example will be discussed later in relation to Figure 6. Other examples of the second RFC120 include an RF amplifier chip and a digital chip.

[0015] Figure 1B is a cross-sectional view along line 1B-1B in Figure 1A and corresponds to a plan view of the upper portion of the antenna substrate 130. Referring to Figures 1A-1B, the coplanar waveguide (CPW) interconnect 150 couples the first RFC 110 to the second RFC 120, completing the electrical connection between RF circuit 118 and RF circuit 128. The CPW interconnect 150 is formed by a central conductor 135a and first and second ground conductors 135b, 135c on either side of the central conductor 135a. Each of the central conductor 135a and the ground conductors 135b, 135c is a portion of the ground plane 135. The central conductor 135a may be a rectangular strip disposed within a second opening 141 of the ground plane 135. The upper and lower peripheral portions of the second opening 141 separate the central conductor 135a from the first and second ground conductors 135b and 135c, respectively. The left and right peripheral portions of the second opening 141 separate the central conductor 135a from the adjacent left and right regions of the ground plane 135. (Note that in Figure 1A, for clarity, the distal portions of the ground plane 135 in the regions of openings 131 and 141 are omitted.) Thus, the central conductor 135a is in the form of an island relative to the peripheral portion of the ground plane 135, and is electrically insulated from there by the insulating material or void within the second opening 141. Note that, since the central conductor 135a has a periphery within the second opening 141, it can be described as having a profile within the second opening 141. As used herein, the profile of a central conductor within an opening in the ground plane refers to the fact that the periphery of the central conductor is partially or completely enclosed by the opening when the central conductor and the opening are projected onto different planes parallel to the ground plane. In Figure 1A, the central conductor 135a is formed in the same layer as the ground plane 135. Therefore, the profile of the central conductor 135a is located within the second opening 141 of the ground plane, as is the case when both are projected onto different planes that are parallel to the ground plane 135. In other embodiments described below, the central conductor of the CPW interconnect is slightly offset from the opening in the z direction (perpendicular to the ground plane).In those embodiments, the profile of the center conductor is within the aperture of the ground plane, because when the periphery of the center conductor is projected onto different planes where the aperture and the center conductor are parallel to the ground plane, it is partially or completely surrounded by the aperture. For example, in FIG. 3 described later, the center conductor 308a of the CPW transition is slightly vertically offset from the second aperture 441 of the ground plane, and it is understood that the center conductor 308a has a profile within the second aperture 441.

[0016] The first and second ground conductors 135b and 135c may be defined as portions of the ground conductor 135 with a width W1 sufficient to contain an electromagnetic (EM) field propagating between the RFIC chip 110 and the second RFC 120. For example, portions of the ground plane 135 above and below the ground conductors 135b and 135c (exceeding the width W1 in the y direction) may be used for other CPW interconnects between the first RFC 110 and the second RFC 120.

[0017] By providing the CPW interconnect 150 as part of the antenna ground plane 135, i.e., as part of the same metal layer as the ground plane 135 in the thickness direction (z direction), the antenna substrate 130 may be formed from a single dielectric layer 138. Thus, the antenna substrate 130 may be referred to as a “single RF layer” substrate, where “single RF layer” may be understood as the layer between the antenna element 125 and the ground plane 135. (In other embodiments described below, a thin control signal / DC signal layer is provided above the ground plane 135, and the antenna substrate in these embodiments may also be characterized as a single RF layer substrate.) By configuring the antenna substrate 130 as a single RF layer substrate, it is not necessary to provide an RF redistribution layer having an additional metal layer (transmit line layer) at a distance below (z direction) the upper surface 133 of the antenna substrate 130 above the buried antenna ground plane. Such an additional RF distribution layer would typically include an insulating layer between the buried ground plane and the transmit line layer, and another insulating layer above the transmit line layer. Therefore, the antenna substrate would otherwise be formed as a complex double RF layer substrate, but this result is avoided in this embodiment. On the other hand, the single RF layer substrate of this embodiment facilitates the manufacture of the antenna device and enables a thinner antenna substrate 130 by avoiding the need for an additional insulating layer of the double RF layer substrate.

[0018] The ground plane 135 may be formed on the dielectric 138 by depositing a layer of conductive material using any preferred technique. The first and second openings 131 and 141 may be formed on the ground plane 135, for example, by not depositing conductive material in the region of the openings during the formation of the ground plane layer. The openings 131 and 141 may be filled with an insulating material, for example, the same material as the dielectric 138. Alternatively, no insulating material may be used such that the openings 131 and 141 each form annular cavities recessed from the upper surface 133.

[0019] Figure 1C is a plan view of a portion of antenna 100 along line 1C-1C in Figure 1A, showing exemplary electrical contacts of the RFIC chip 110 and the second RFC 120 associated with the CPW interconnect 150. Figures 1D and 1E are cross-sectional views along lines 1D-1D and 1E-1E in Figure 1B, respectively. Referring collectively to Figures 1A-1E, the first ground-signal-ground (GSG) transition section 190_1 may connect the first end of the CPW interconnect 150 to the RFIC chip 110 at points p1, p2, and p4. The second GSG transition section 190_2 may connect the second opposing end of the CPW interconnect 150 to the second RFC 120 at points p2, p6, and p5. The first GSG transition section 190_1 may include an RF contact pad ("signal contact") 182 of the RFIC chip 110, first and second ground contact pads ("ground contacts") 197 and 199 of the RFIC chip 110 located on either side of the signal contact 182, and an electrical connection joint 176 connecting the contacts 182, 197, and 199 to points p1, p4, and p3 of conductors 135a, 135c, and 135b, respectively. The second GSG transition section 190_2 may include a signal contact 184 of the second RFC 120, third and fourth ground contacts 196 and 195 of the second RFC 120 located on either side of the signal contact 184, and a conductive joint 176 connecting the contacts 184, 196, and 195 to points p5, p2, and p6 of conductors 135a, 135c, and 135b, respectively. Examples of conductive joints 176 include solder balls, gold bumps, copper columns with solder caps, thermal compression bonds, and conductive epoxy. A surface finish metal layer (not shown), such as electroless nickel-palladium immersion gold (ENEPIG), may be present between any of the contact pads conductively bonded to the connecting joint 176, helping the liquefiable metal (e.g., solder) of the connecting joint 176 to adhere to the contact pads. An underfill material 162 may surround at least some of the connecting joints 176 to provide mechanical support to the connecting joints, thereby improving their reliability. Typically, the underfill material 162 may be a mixture consisting mainly of amorphous fused silica.

[0020] To allow RF signal energy to flow freely from the beamforming circuit 118 to the antenna element 125, additional GSG transitions may be provided at connection points p8, p9, and p10 to connect via 155 and the grounding points of the grounding plane 135 on either side of via 155 to the respective contacts of the RFIC chip 110. For this purpose, one end of via 155 is electrically connected to the antenna element 125, while the opposite end is connected at point p10 to the signal contact 186 of the RFIC chip 110 via a conductive joint 176. The grounding points p8 and p9 of the grounding plane 135 on either side of via 155 flanking the first opening 131 may be connected to ground contacts 192 and 194, respectively, through their respective joints 176. The contacts 186, 192, and 194 (hereinafter referred to as "antenna element contacts") are coupled to the input portion of the beamforming circuit 118, such as the input circuit node of the receiving amplifier or the output circuit node of the transmitting amplifier. Contacts 182, 197, and 199 ("CPW interconnect contacts") are coupled to the output portion of the beamforming circuit 118, such as a phase shifter or filter. The structure and type of the transition between the beamforming circuit 118 and each of the antenna element contacts and CPW interconnect contacts depends on whether the beamforming circuit 118 is formed in a microstrip transmission line or in a CPW transmission line, and whether the RFIC chip 110 is connected in a "flip-chip" configuration with respect to the antenna substrate 130. When the beamforming circuit 118 is formed in a microstrip transmission line, the RFIC chip 110 may be referred to as the "microstrip chip," and when it is formed in a CPW transmission line, the RFIC chip 110 may be referred to as the "CPW chip."

[0021] When the RFIC chip 110 is materialized as a microstrip chip, the transition section 115_1 from the CPW to the microstrip may be coupled between the antenna element contacts and the input portion of the beamforming circuit 118. Similarly, the transition section 115_2 from the CPW to the microstrip may be coupled between the output portion of the beamforming circuit 118 and the CPW interconnect contacts. If the RFIC chip 110 is also connected to the antenna substrate 130 in a flip-chip configuration, the active die side of the RFIC chip 110 is close to the lower surface 113 and faces the antenna substrate 130. For example, the doping region and metallization of the beamforming circuit transistors, as well as the combiner / divider conductors (if present), are located within the active region.

[0022] In the case of a microstrip chip, the microstrip ground plane of the RFIC chip 110 may be located on the upper surface 114, and “ground vias” (not shown) may extend from each of the ground contacts 192, 194, 197, and 199 through the material 112 to the microstrip ground plane. The signal conductors of the microstrip transmission line may be located within the active region so that short or direct connections can be made between the signal conductors and each of the signal contacts 186 and 182. Conversely, if the RFIC chip 110 is connected to the antenna substrate 130 in a non-flip-chip configuration, the active die side and the microstrip signal conductors may be on the upper surface 114, and the microstrip ground plane may be located on the lower surface 113. In this case, short or direct connections can be made between the microstrip ground plane and each of the ground contacts 192, 194, 197, and 199, and “signal vias” may extend from each of the signal contacts 186 and 182 to the microstrip signal conductors.

[0023] When the RFIC chip 110 is embodied as a CPW chip (with transition sections 115_1 and 115_2 omitted) and arranged as a flip chip, the active die side of the beamforming circuit 118 and the CPW transmit lines may be on the lower surface 113, resulting in short or direct connections between each point of the central conductor of the CPW transmit line and each of the signal contacts 182 and 186, and between each of the ground conductors of the CPW transmit line and the ground contacts 192, 194, 197, and 199. When the CPW chip is connected in a non-flip-chip configuration, the active die side and the CPW transmit lines are on the upper surface 114. In this scenario, ground vias extending through material 111 may connect each of the ground contacts to each ground point of the CPW transmit line, and signal vias may connect signal contacts 182 and 186 to each point of the central conductor of the CPW transmit line.

[0024] Similarly, the type of transition between the contacts 184, 195, and 196 of the second RFC120 and the RF circuit 128 depends on the type of transmit line of the RF component 120 and whether the signal conductor of the second RFC120 is located on the lower surface 123 or upper surface 124 of the second RFC120. For example, the transition 115_3 from CPW to microstrip may be coupled between the contacts and the RF circuit 128 when the RF circuit 128 is formed with the microstrip transmit line. It should be noted that the second RFC120 may further include one or more additional contacts 168 which can be bonded to the upper surface 133 of the antenna substrate 130 by a joint 176 at point p7. The contacts 168 may provide further mechanical support for the connection of the second RFC120 and / or may be other RF contacts electrically coupled to another RFIC chip 110.

[0025] In antenna 100 and other embodiments described below, each antenna element 125 may be a microstrip patch antenna element printed on an antenna substrate 130. Other types of antenna elements, such as dipoles or monopoles, may be substituted. When embodied as a microstrip patch, the antenna elements 125 may have any preferred shape, such as circular, square, rectangular, or elliptical, and may be fed and configured in a manner sufficient to achieve the desired polarization, e.g., circular, linear, or elliptical. The number of antenna elements 125, their type, size, shape, spacing between elements, and their feeding mechanism may vary from embodiment to embodiment according to the performance objectives of this application. For example, the following example of antenna 600 (Figure 6) is shown with eight antenna elements 125, but a typical embodiment for achieving a narrow antenna beam may include hundreds or thousands of antenna elements 125. In another example, each antenna element 125 is fed by two offset vias 155 using different circular polarization feeding methods. In other embodiments, an electromagnetic feeding mechanism is used instead of via 155, and each antenna element 125 is excited from its respective feeding point with near-field energy.

[0026] In antenna 100 and other embodiments described below, the antenna may be configured to operate over a millimeter (mm) wave frequency band, generally defined as a band in the range of 30 GHz to 300 GHz. In other cases, antenna 100 operates in the microwave range of approximately 1 GHz to 30 GHz, or the sub-microwave range of less than 1 GHz, where the RF signal represents a signal of any frequency from less than 1 GHz to 300 GHz. Note that an RFIC 110 configured to operate at microwave or millimeter-wave frequencies is often called a monolithic microwave integrated circuit (MMIC) and is typically made of a III-V semiconductor material such as indium phosphate (InP) or gallium arsenide (GaAs), or other material such as silicon-germanium (SiGe).

[0027] Figure 2A is a cross-sectional view of an antenna device 100' according to another embodiment. The antenna device ("antenna") 100' differs from the antenna 100 described above by comprising an antenna substrate 130' having a thin redistribution layer (RDL) region 220 above the ground plane 135. Similar to the CPW interconnect 150 described above, the CPW interconnect 350 for coupling the RFIC chip 110 to the second RFC 120 may be formed by a portion of the ground plane 135 and an opening 141 in the ground plane 135. Although Figure 2A shows a single RFIC chip 110 and a single second RFC 120, the antenna 110' may include a plurality of RFICs 110, each having one or more CPW interconnects 350 for coupling to one or more second RFCs 120.

[0028] The RDL region 220 may include, in order from the upper surface 133 of the antenna substrate 130' toward the ground plane 135, a first insulating layer 302, a first conductive layer 304, a second insulating layer 306, a second conductive layer 308, and a third insulating layer 310. In other embodiments, the RDL region 220 has a single conductive layer or three or more conductive layers, along with a number of insulating layers as is appropriate in each case. The first and second conductive layers 304, 308 may be patterned to form signal lines used to transfer DC and / or control signals to the RFIC chip 110 (and a second RFC 120 if it contains active circuitry). The conductive layers 304 and 308 are made of metal or other conductive material. Openings such as 391, 392, 393 may be formed in the conductive layers 304 and 308, for example, by not depositing conductive material in the area of ​​the opening during the formation of each layer. Similarly, the first opening 131 and the second opening 141 may be formed in the same manner within the ground plane 135 layer. Various openings may be filled with insulating material. Vias 155 traverse openings 131, 392, and 393 and are insulated from the conductive layers 304, 308, and 135 by the insulating material.

[0029] Each of the layers 302, 304, etc., within the layer region 220 may be at least an order of magnitude thinner than the dielectric 138. For example, each of these layers may have a thickness of about 2 to 10 μm (in the z direction), while the dielectric 138 may have a thickness of about 250 μm. The first and second conductive layers 304 and 308 each have a width of about 12 μm and can form signal / ground lines in the xy plane that are spaced apart from each other by about 12 μm. Each of the layers 304 and 308 may be etched or otherwise patterned to form tens, hundreds, or thousands of signal and ground lines in a typical embodiment of the antenna 100'. However, in other embodiments (such as the embodiments in Figures 1A to 1E), the layer RDL region 220 is omitted, in which case the bias voltage and signal are wired to the RFIC 110 by other means.

[0030] In an active array embodiment, the RFIC chip 110 may have tens or more than 100 electrical contacts, such as 357, 367, on its lower surface. These contacts may receive bias voltage and / or control signals from signal lines formed in the first and second conductive layers 304 and 308 through interconnection with conductive joints 176. For example, an opening may be fabricated in the first insulating layer 302 to expose the signal lines of the first conductive layer 304 in order to form an interconnection for connecting the signal lines formed in the first conductive layer 304 to the electrical contacts 357, and a conductive well 387 may be formed within the opening. The opening in the first insulating layer 302 may be fabricated by placing a resist material on layer 304 at the position of the subsequent opening, and then depositing the insulating material of the insulating layer 302 in the area excluding the resist material. A contact pad 330 may be formed on the well 387, and a conductive joint 176 formed by a heating / cooling process may connect the contact pad 330 to the contact 357. Alternatively, the contact pad 330 may be omitted, and the conductive joint 176 may be conductively bonded directly to the well 387.

[0031] Similarly, openings may be formed in each of the first insulating layer 302, the first conductive layer 304, and the second insulating layer 306 to form interconnections for connecting signal lines formed in the second conductive layer 308 to electrical contacts 367. The process of forming the openings may similarly involve placing resist material at the location of subsequent openings, one layer at a time, while the corresponding layer material is being deposited. Additional insulating material (e.g., the same material as that of insulating layers 302 and 306) may be deposited in an annular region around the opening 391 of the first conductive layer 304. This material prevents short circuits with subsequent conductive wells 377 formed by deposition in cavities created by the series of openings. Contact pads 330 may be formed on the conductive wells 377. Conductive joints 176 connect the electrical contacts 367 to the contact pads 330, or, if the contact pads 330 are omitted, connect the electrical contacts 367 directly to the conductive wells 377.

[0032] Figure 2B is a cross-sectional view of a portion of antenna 100' along line 2B-2B in Figure 2A. Figures 2C and 2D are cross-sectional views along lines 2C-2C and 2D-2D in Figure 2B, respectively. Referring collectively to Figures 2A-2D, the CPW interconnect 350 may have the same or similar layout as the CPW interconnect 150 described above within the ground plane 135. Thus, the CPW interconnect 350 may have a central conductor 135a in the form of an island surrounded by an opening 141, and first and second ground conductors 135b, 135c extending longitudinally on both sides of the central conductor 135a. The first GSG transition section 390_1 may connect the first end of the CPW interconnect 350 to the RFIC 110, and the second GSG transition section 390_2 may connect the opposing ends of the CPW interconnect 350 to the RF component 120. The first GSG transition 390_1 may include conductive wells 372a, 372b, and 372c, each connected to the contact pads 182, 197, and 199 of the RFIC chip 110 through their respective conductive joints 176 and contact pads 330. The second GSG transition 390_2 may include conductive wells 373a, 373b, and 373c, each connected to the contact pads 184, 196, and 195 of the RF component 120 through their respective conductive joints 176 and contact pads 330. The conductive wells 372a-372c and 373a-373c may each be formed in a similar manner to the conductive well 377 by a process that forms additional openings through the second conductive layer 308 and the third insulating layer 310, exposing the surface of the ground plane 135. Additional insulating material may be deposited in the annular regions surrounding each opening of the second conductive layer 308 to prevent short circuits with the subsequently formed conductive wells 372a-372c and 373a-373c. Other embodiments of antenna 100' may be similar to those described above for antenna 100. Note here that, for the same reasons as described above for antenna 100, the central conductor 135a in Figures 2A and 2B has a profile within the second opening 141.

[0033] Figure 3 is a cross-sectional view of 100'' of an antenna device according to another embodiment. Antenna 100'' differs from antenna 100'' of Figures 2A-2D by providing a CPW interconnect 450 at least partially formed within the RDL region 220. For this purpose, the CPW interconnect 450 may include a central conductor 308a, which is a portion of the conductive layer 308, in the form of an island insulated from other surrounding areas of the conductive layer 308 by a frame-shaped opening 442 of the conductive layer 308. Furthermore, a rectangular opening 441 is formed within the ground plane 135 in the region directly below the central conductor 308a. The opening 441 prevents the ground plane 135 from interfering with the signal field propagating through the CPW interconnect 450. The central conductor 308a can be described as having a profile within the second opening 441, since the central conductor 308a has an in-xy plane periphery that enters the xy space of the second opening 441. In other words, as described above, the projected profile of the central conductor 308a fits within the second opening 441. Alternatively, when viewed from a distal point in the z-direction along the axis passing through the center of the central conductor 308a (as shown in Figure 4A), the central conductor 308a appears as an island within the second opening 441.

[0034] Figure 4A is a cross-sectional view of an exemplary configuration of a portion of antenna 100 along line 4-4 in Figure 3. Figure 5A is a cross-sectional view along line 4-4 in Figure 4A, with some distal elements removed for clarity. In this embodiment, the CPW interconnect 450a is an example of the CPW interconnect 450 in Figure 3. Here, the CPW interconnect 450a may include a central conductor 308a and first and second ground conductors 308b and 308c, all of which are portions of the conductive layer 308. The conductive well 472a may connect the central conductor 308a to the RF contact 182 through a contact pad 330 and a conductive joint 176. The conductive well 472a may be formed by the same type of process as the conductive well 377 described above. Conductive wells 472b and 472c of the same type may connect the ground conductors 308b and 308c to the ground contacts 197 and 199, respectively. Therefore, the conductive wells 472a to 472c form a GSG transition between the first end of the CPW interconnect 450a and the RFIC chip 110. Similar or identical GSG transitions may be provided by the conductive wells 473a, 473b, and 473c to couple the opposing ends of the CPW interconnect 450a to the contacts 184, 195, and 196 of the RF component 120.

[0035] Figure 4B is a cross-sectional view of another exemplary configuration of a portion of antenna 100'' along line 4-4 in Figure 3, with some intervening features removed for clarity. Figure 5B is a cross-sectional view along line 4-4 in Figure 4B, with some distal elements removed for clarity. In this embodiment, the CPW interconnect 450b is an example of the CPW interconnect 450 in Figure 3. Here, the CPW interconnect 450b may include a central conductor 308a and first and second ground conductors 135b and 135c. Thus, the central conductor of the CPW interconnect 450b is the CPW The ground conductor of the interconnect 450b lies in a different depth layer of the antenna substrate 130' than the ground conductor. Nevertheless, although the central conductor 308a and the ground conductors 135a and 135b are not exactly coplanar, the difference in depth between layer 308 and the ground plane layer 135 is very small, so no significant performance degradation occurs, and the CPW interconnect 450b still operates effectively as a coplanar transmission line. Furthermore, since the opening 441 is formed in the ground plane 135 directly below the central conductor 308a, the ground plane 135 does not interfere with the signal field propagating across the CPW interconnect 450b.

[0036] The conductive well 472a connects the central conductor 308a to the RF contact 182 through the contact pad 330 and the conductive joint 176. The deeper conductive wells 372b and 372c connect the ground conductors 135b and 135c to the ground contacts 197 and 199, respectively. Thus, the conductive wells 472a, 372b, and 372c form a GSG transition from the first end of the CPW interconnect 450b to the RFIC chip 110. Similar or identical GSG transitions may be provided by the conductive wells 473a, 373b, and 373c to connect the opposing ends of the CPW interconnect 450b to the contacts 184, 195, and 196 of the second RFC 120.

[0037] Figure 6A is a top view of an active antenna array device ("antenna array") 600 according to one embodiment. Figure 6B is an end view of the antenna array 600 as seen from direction 6B in Figure 6A. The antenna array 600 including the RDL region 220 is an example of either the antenna 100' or 100'' described above. However, a similar layout and connection scheme may be applied to antenna arrays without an RDL region, such as the antenna 100 in Figures 1A-1E.

[0038] The antenna array 600 includes a plurality of K RFIC chips 110_1 to 110_K and a combiner / divider component 120a, which is an example of a second RFC 120. A plurality of N antenna elements 125_1 to 125_N forming a planar array 622 may be arranged on the lower surface 143 of the antenna substrate 130'. Each RFIC chip 110 may be coupled to a plurality of M antenna elements 125 (M=2 in the illustrated example) through M beamforming circuit (BFC) units 618_1 to 618_M. The integer values ​​of K, M, and N may differ from embodiment to embodiment depending on the application. In Figure 6A, an example of a “small array” with K=4, N=8, and M=2 is shown and explained for simplification of understanding.

[0039] The combiner / divider component ("combiner / divider") 120a is coupled to each of the RFIC chips 110 through their respective CPW interconnects 350 (or 450). Details "A" indicate, for example, that the central conductor 135a and ground conductors 135b, 135c of the CPW interconnect extend across the gap between the RFIC chip 110_j and the combiner / divider 120a. The combiner / divider 120a is shown to have a coplanar waveguide on its upper surface and to include a signal conductor 680_s and first and second ground conductors 680_g1 and 680_g2 on either side of each signal conductor 680_s. The RFIC chip 110 is shown as a microstrip type chip having a microstrip signal conductor 651 on its upper surface facing outward from the antenna substrate 130' (arranged in a "non-flip-chip" configuration) and a microstrip ground plane (not shown) on the lower surface or at an intermediate level of the chip. For example, Figure 6B shows that at least one via 630 extending perpendicularly through the RFIC 110 in the z direction may couple the first end of the CPW interconnect 350 to the signal conductor 651. The second end of the CPW interconnect 350 may be coupled to the CPW transmit line of the combiner / divider 120a through a plurality of vias 640 extending through the dielectric 121.

[0040] Alternatively, a CPW-type RFIC chip 110 and / or a microstrip combiner / divider 120a is used, and / or the RFIC chip 110 is connected as a flip chip having a signal conductor 651 positioned on the lower surface of the RF chip 110.

[0041] Each CPW conductor of the combiner / divider 120a may be coupled at K positions to the K signal conductors 651 of the RFIC chips 110_1 to 110_K through K CPW interconnects 350. Each of the K positions of the signal conductors 680_s may be referred to as the combiner / divider conductor of the combiner / divider 120a. Each RFIC chip 110 is also shown to include two beamforming circuit (BFC) units 618_1 and 618_2, which together with a 2:1 combiner / divider 653 and signal lines 651 may collectively form the beamforming circuit 118 of the RFIC chip 110 described above. Other embodiments use a single BFC unit 618 or three or more BFC units 618.

[0042] The combiner / divider 120a may include 2:1 RF couplers 620_1, 620_2, and 620_3, such as Wilkinson or hybrid couplers, to form a K:1 combiner / divider as a whole. An exemplary material for the dielectric substrate 121 of the combiner / divider 120a is alumina. In a transmit line or large element array, the combiner / divider 120a may consist of multiple sections of alumina to facilitate manufacturing, particularly in handling brittle alumina substrates. The RF circuits of the multiple sections of alumina may be interconnected by a CPW interconnector 350 or by an alternative connection scheme.

[0043] Each BFC unit 618 includes an amplifier and / or a phase shifter for adjusting the transmit and / or receive signals provided to / from the antenna element 125. If the RFIC chip 110 is distributed across the effective aperture of the antenna array 600, and each is coupled to one or more antenna elements 125, the antenna 600 may be understood as an active antenna array. In embodiments where each BFC unit 618 includes a phase shifter(s) for dynamic phase shifting of the signal, the antenna array 600 functions as a phased array. In such a phased array embodiment, the beam formed by the antenna 600 is steered to a desired beam directivity angle set primarily according to the phase shift of the phase shifter. Additional amplitude adjustments within the RFIC 110 may also be included to adjust the antenna pattern. In any case, the antenna 600 may be configured as a transmit antenna system, a receive antenna system, or both a transmit and receive antenna system.

[0044] The connector 670 may be mounted on the side or on the top and may be connected to the signal conductor 680_s. In the transmission direction, the input RF transmission signal is applied to the connector 670 and divided into K transmission signals by the coupler 620, and each of the K divided transmission signals is applied to the RFIC chips 110_1 to 110_K. (A schematic diagram of the signal flow is shown in Figure 8 below.) If the RFIC 110 includes a plurality of M BFC units 618, the RFIC 110 may further include an M:1 combiner / divider 653, which divides the divided transmission signal into M further divided signals, each of which is applied to one of the BFC units 618. When adjusted by the BFC units 618, the adjusted signals are “element signals” that can each be applied to one of the antenna elements 125.

[0045] A reverse signal flow occurs in the receiving direction, and the element signals are received from antenna element 125 by BFC unit 618 and adjusted (and typically filtered) by a receiving amplifier and / or phase shifter. The adjusted received signals pass through combiners / dividers 153 and 120A to generate a combined received signal at connector 170. Note that the beamforming network (BFN) can be thought of as encompassing the entire signal path between signal connector 670 and antenna elements 125_1 to 125_N. In the BFN, a single input transmit signal is divided into N element signals, and / or the N element signals received from antenna element 125 are combined into a single combined received signal.

[0046] Figures 6A and 6B show, as an example, two antenna elements 125_1 and 125_2 coupled to each RFIC 110. In other examples, each RFIC chip 110 is coupled to a single antenna element 125, or to three or more antenna elements 125. Antenna 600 is also shown to include additional chips 160_1 and 160_2, such as serial peripheral interface (SPI) chips. Chip 160 may function to provide DC signals and / or control signals to RFIC chip 110 through signal lines such as 304_1, 308_1, formed by patterning conductive layers 304 and 308 of the RDL region 220, respectively. The DC signals may bias an amplifier and / or control the switching state of switches in BFC units 618_1, 618_2. The control signals may control the phase shift of a phase shifter in a BFC unit.

[0047] Figure 7A shows an exemplary beamforming circuit for a BFC unit 618_i (i=any integer from 1 to M) configured for the receiving path (antenna receiving direction) of the RFIC chip 110. The BFC unit 618_i may include a front-end receiving circuit coupled between the input side 886 (coupled to antenna element 125) and the output side 882 (coupled to the CPW interconnect 350, either directly or through the combiner / divider 653). The receiving circuit may include a low-noise amplifier (LNA) 502 connected in series, a receiving path phase shifter 504, and a bandpass filter 506. The LNA 502 and the phase shifter 504 may receive bias / control voltages from vias / signal lines (not shown) within the RFIC chip 110 extending from electrical contacts such as 357, 367 (seen in Figures 2A and 3).

[0048] Figure 7B illustrates an exemplary beamforming circuit of a BFC unit 618_i configured for the transmit path (antenna transmit direction) of the RFIC chip 110. Here, the front-end circuit within the BFC unit 618_i may include a power amplifier (PA) 51 connected in series between the input side 886 and the output side 882, a transmit path phase shifter 514, and a bandpass filter 516. The PA 512 and the phase shifter 514 may also receive bias / control voltages from vias / signal lines (not shown) within the RFIC chip 110 extending from electrical contacts such as 357, 367.

[0049] Figure 7C shows an exemplary beamforming circuit of a BFC unit 618_i configured for both the receive and transmit paths of the RFIC chip 110. In this case, the BFC unit 618_i includes a first transmit / receive (T / R) circuit 532 having an input port connected to the input side 886, and a second T / R circuit 534 having an input port connected to the output side 882. The receive path, including an LNA 502 and a phase shifter 504, may be connected between the first output ports of the T / R circuits 532 and 534. The transmit path, including a phase shifter 514 and a PA 512, may be connected between the second output ports of the T / R circuits 532 and 534. Each of the T / R circuits 532 and 534 may include a bandpass filter and / or switches to allow both the transmit and receive path signals to pass from the input port to their respective output ports. In some examples, different frequency bands are used for the transmit and receive signals, and bandpass filtering is sufficient to provide isolation between the paths. Time-division multiplexing-based switching can provide further or alternative isolation between paths.

[0050] Figure 8 is a schematic diagram showing an exemplary beamforming network (BFN) 800 within an antenna array 600. The BFN 800 may include a K:1 combiner / divider 880 and KRFIC chips 110_1 to 110_K, each having MBFC units 618_1 to 618_M (for example, having one of the circuit configurations in Figures 7A to 7C) and an M:1 combiner / divider 840. The K:1 combiner / divider 880 may be formed by a combiner / divider component 120a and may have an input port at circuit point t. A CPW interconnect 350 (alternatively, 150 or 450) couples each of the K outputs 896 of the K:1 combiner / divider 880 to the respective inputs 893 of the M:1 combiner 840. Each RFIC chip 110 may be coupled to M antenna elements such as 125_1 to 125_M. Therefore, there may be N antenna elements 125_1 to 125_N, where N = M × K. As mentioned above, the number N can be several hundred or several thousand for a typical antenna 600 designed to form a narrow antenna beam.

[0051] Figure 9 is a flowchart of an exemplary method 900 for manufacturing an antenna 600. The illustrated sequence of operations can be changed as desired. In method 900, the antenna substrate 130' may be formed from a wafer, and vias 155 may be formed therein by drilling holes and filling them with a conductive material by a process such as electroplating (S902). The antenna elements 125 and the ground plane 135 may then be printed on the lower and upper surfaces of the antenna substrate, respectively (S904). The CPW interconnect 350 may be formed during this process step in the manner described above. Subsequently, the RDL region 220 may be formed on the ground plane on the antenna substrate 130' (S906). As described above, conductive wells for the GSG transition, e.g., conductive wells 372, 373, 472, 473, and the CPW interconnect 450 may be formed during this process step.

[0052] The RFIC chip 110 is separately manufactured by beamforming circuit 118, vias (if necessary), RF contact pads and ground contact pads, and other electrical contacts such as 357, 367 (S908). The second RFC 120 may be separately formed in a BFN combiner / divider (S910). The conductive joint 176 may first be bonded to the RF contacts 186, 182, and other electrical contacts of the RFIC chip 110, and / or to the catch pad / other contacts on the upper surface of the antenna substrate 130' (S912). The RFIC chip 110, other IC chips 160, and the second RFC 120 may be placed on the antenna substrate 130' (S914). A heating / cooling cycle may be performed to melt and cool the solder or other conductive material of the conductive joint 176 and conductively bond the RFIC chip, other IC chips, and the second RFC 120 to the antenna substrate (S916).

[0053] In the embodiments of the antenna device described above, the provision of a CPW interconnect formed in conjunction with the ground plane aperture enables the use of a single RF layer antenna substrate and its associated advantages. Simulations have shown that a second aperture in the ground plane (e.g., 141, 441) for the CPW transition has minimal impact on antenna performance.

[0054] While the technologies described herein are shown and explained with reference to exemplary embodiments, those skilled in the art will understand that various modifications of form and detail may be made therein without departing from the spirit and scope of the subject matter defined by the following claims and their equivalents.

Claims

1. Antenna device (100, 100', 100'', 600), An antenna substrate (130, 130') having a first surface (143) and an opposing second surface (133), wherein the second surface includes an antenna ground plane (135), The antenna element (125) on the first surface of the antenna substrate, A first RF component (110) is attached to the second surface of the antenna substrate and includes a radio frequency (RF) circuit (118) for adjusting the signal communicated with the antenna element, A second RF component (120) is attached to the second surface of the antenna substrate, Antenna device (100, 100', 100'', 600) comprising a coplanar waveguide (CPW) interconnect (150, 350, 450) having a central conductor (135a, 308a) and first and second ground conductors (135b, 135c) on both sides of the central conductor, wherein the central conductor has a profile within the opening (141) of the antenna ground plane.

2. The antenna device (100, 100', 600) according to claim 1, wherein the central conductor and the antenna ground plane are located in the same layer of the antenna substrate.

3. The antenna device (100, 100', 600) according to claim 2, wherein the first grounding conductor is a first region of the antenna grounding plane (135b) on the first side of the opening (141), and the second grounding conductor is formed by a second region of the antenna grounding plane (135c) on the second side of the opening opposite the first side.

4. The opening in the ground plane is a second opening in the ground plane, The antenna device (100, 100', 100'', 600) according to any one of claims 1 to 3, wherein the signal is communicated between the RF circuit and the antenna element through a first opening (131) of the antenna ground plane.

5. The antenna device (100', 100'', 600) according to claim 1, wherein the antenna substrate further comprises a redistribution layer (RDL) region (220) between the antenna ground plane (135) and the second surface (133).

6. The antenna device (100', 100'', 600) according to claim 5, wherein the central conductor (308a) is located within the conductive layer (308) of the RDL region.

7. The first grounding conductor is the first region (135b) of the antenna grounding plane on the first side of the second opening, The antenna device (100") according to claim 6, wherein the second grounding conductor is a second region (135c) of the antenna grounding plane on the second side of the second opening facing the first side.

8. The central conductor is located within the first conductive region (308a) of the first conductive layer (308) of the RDL region. The antenna device (100") according to claim 6, wherein the first and second grounding conductors are located within the second and third conductive regions (308b, 308c) of the second conductive layer (308) of the RDL region, respectively.

9. The antenna device (100'', 600'', according to claim 8, wherein the first and second grounding conductors are located within the same conductive layer (308) in the RDL region as the central conductor.

10. Antenna device (100, 100', 100'', 600) according to any one of claims 1 to 9, wherein the second RF component comprises a portion of a beamforming network (800), the portion of the beamforming network (800) divides an input transmission signal into a plurality of divided transmission signals, each provided to one of a plurality of RFIC chips (110_1 to 110_k) attached to the antenna substrate, and / or receives a plurality of received signals from the plurality of RFIC chips, synthesizes the received signals to form an output signal, and each of the plurality of RFIC chips is connected to the second RF component by its respective CPW interconnect.

11. Antenna device (100, 100', 100'', 600) according to any one of claims 1 to 10, wherein the opening in the ground plane is a second opening, the antenna substrate includes a via (155) formed within the antenna substrate and extending through the first opening (131) in the antenna ground plane, the via couples a first RF contact (186) of the first RF component (110) to the antenna element (125), and the first RF contact is coupled to the input point of the RF circuit (118).

12. The lower surface of the first RF component is attached to the second surface of the antenna substrate through a plurality of electrical connection joints (176). The first electrical connection joint (176) of the aforementioned electrical connection joints connects the first RF contact (186) to the via (155), The second electrical connection joint (176) of the aforementioned electrical connection joints connects the second RF contact (182) of the first RF component to the central conductor (135a) of the CPW interconnect, and the second RF contact is connected to the output point of the RF circuit. The antenna device (100, 100', 100'', 600) according to claim 11, wherein a third electrical connection joint (176) among the electrical connection joints connects the ground contact (197) of the first RF component to the antenna ground plane (135).

13. The antenna device (100, 100', 100'', 600) according to claim 12, wherein the third electrical connection joint connects the ground contact to a region on one side of the second opening, and the fourth electrical connection joint of the electrical connection joints connects another ground contact (199) of the first RF component to the antenna ground plane on the opposing side of the second opening.

14. The second RF component is A dielectric substrate (121) having a lower surface (123) attached to the second surface (133) of the antenna substrate, An antenna device (100, 100', 100'', 600) according to any one of claims 1 to 14, comprising: a CPW transmission line (680) formed on the upper surface of the dielectric substrate and coupled to a CPW interconnect (350) through a plurality of vias (640) formed through the dielectric substrate.

15. The antenna device (100, 100', 100'', 600) according to any one of claims 1 to 14, wherein the RF circuit of the first RF component is formed within a microstrip transmission line.

16. The antenna device (100, 100', 100'', 600) according to any one of claims 1 to 14, wherein the RF circuit of the first RF component is formed in a CPW transmission line.

17. The antenna device (100, 100', 100'', 600) according to any one of claims 1 to 16, wherein the RF circuit includes a beamforming circuit comprising at least one of a transmitting amplifier (512), a receiving amplifier (502), and a phase shifter (506, 516) for adjusting the signal communicated between the first RF component and the antenna element.

18. A phased array antenna (600), An antenna substrate (130, 130') having a first surface (143) and an opposing second surface (133), wherein the second surface includes an antenna ground plane (135), A plurality of antenna elements (125_1 to 125_N) are formed on the first surface of the antenna substrate, forming an antenna array (622), A plurality of radio frequency integrated circuit (RFIC) chips (110_1 to 110_K) mounted on the second surface of the antenna substrate, each including a beamforming circuit (618_1 to 618_M) for beam shaping by adjusting a signal communicated with at least one of the antenna elements through at least one of a plurality of first openings of the antenna ground plane, wherein the beamforming circuit constitutes a first part of a beamforming network (BFN), and the plurality of RFIC chips (110_1 to 110_K), A combiner / divider component (120a) coupled between the RFIC chips and attached to the second surface of the antenna substrate, which is a second part of the BFN and includes a plurality of combiner / divider conductors (680), A phased array antenna (600) comprising a plurality of coplanar waveguide (CPW) interconnects (350, 450), each of which connects one of the combiner / divider conductors to one of the RFIC chips, and comprises a central conductor (680_s) and first and second ground conductors (680_g1, 680_g2) on both sides of the central conductor, wherein the central conductor has a profile within one of a plurality of second openings (141) of the antenna ground plane.

19. The phased array antenna (600) according to claim 18, wherein the central conductor of each of the CPW interconnection sections and the antenna ground plane are located in the same layer of the antenna substrate.

20. The phased array antenna (600) according to claim 19, wherein for each of the CPW interconnection sections, the first grounding conductor is a first region (135b) of the antenna grounding plane on the first side of each second opening, and the second grounding conductor is a second region (135c) of the antenna grounding plane on the second side of each second opening facing the first side.

21. The phased array antenna (600) according to claim 18, wherein the antenna substrate further comprises a redistribution layer (RDL) region (220) having a plurality of conductive lines (306, 308) between the antenna ground plane and the second surface.

22. The phased array antenna (600) according to claim 21, wherein, for each of the CPW interconnection sections, the central conductor (308a) is located within the conductive layer (308) of the RDL region.

23. For each of the aforementioned CPW interconnection sections, The first grounding conductor is the first region (135b) of the antenna grounding plane on the first side of the second opening, The phased array antenna (600) according to claim 22, wherein the second grounding conductor is a second region (135c) of the antenna grounding plane on the second side of the second opening facing the first side.

24. For each of the aforementioned CPW interconnection sections, The central conductor is located within the first conductive region (308a) of the first conductive layer (308) of the RDL region. The phased array antenna (600) according to claim 22, wherein the first and second grounding conductors are located within the second and third conductive regions (308b, 308c) of the second conductive layer (308) of the RDL region, respectively.

25. The phased array antenna (600) according to claim 24, wherein the first and second grounding conductors are formed within the same conductive layer (308) in the RDL region as the central conductor.

26. A phased array antenna (600) according to any one of claims 18 to 25, wherein the antenna substrate includes a plurality of vias (155) formed within the antenna substrate and each extending through one of the first openings of the antenna ground plane, each of which couples a first RF contact (186) of one of the RFIC chips to one of the antenna elements, and each of the first RF contacts is coupled to the input point of the beamforming circuit (118) of one of the RFIC chips.

27. Each of the lower surfaces of the RFIC chips is attached to the second surface of the antenna substrate through a plurality of electrical connection joints (176). For each RFIC chip of the aforementioned RFIC chip, The first electrical connection joint (176) of the aforementioned electrical connection joints connects the first RF contact (186) to the via (155), The second electrical connection joint (176) of the aforementioned electrical connection joints connects the second RF contact (182) of the RFIC chip to one of the central conductors (135a) of the CPW interconnection section, and the second RF contact is connected to the output point of the beamforming circuit of the RFIC chip. The phased array antenna (600) according to claim 26, wherein a third electrical connection joint (176) among the electrical connection joints connects the ground contact (197) of the RFIC chip to the antenna ground plane (135).

28. The phased array antenna (600) according to claim 27, wherein the third electrical connection joint of the electrical connection joints connects the ground contact to a region on one side of the second opening, and the fourth electrical connection joint of the electrical connection joints connects another ground contact (199) of the RFIC chip to the antenna ground plane on the opposing side of the second opening.

29. The aforementioned combiner / divider component, A dielectric substrate (121) having a lower surface (123) attached to the second surface (133) of the antenna substrate, A phased array antenna (600) according to any one of claims 18 to 28, comprising: a CPW transmission line (680) formed on the upper surface of the dielectric substrate and coupled to each of the CPW interconnection sections (350) through a plurality of vias (640) formed through the dielectric substrate.

30. The phased array antenna (600) according to any one of claims 18 to 31, wherein each of the RFIC chips is formed within a microstrip transmission line.

31. The phased array antenna (600) according to any one of claims 18 to 31, wherein each of the RFIC chips is formed within the CPW transmission line.

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