Indication device

Abstract

The present invention provides a display device having a novel material and a transistor made from the novel material. [Solution] The material is a composite oxide having at least two regions, one of which contains In, Zn, and element M1 (element M1 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, or Cu), and the other region contains In, Zn, and element M2 (element M2 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, or Cu). When the composite oxide is analyzed by energy-dispersive X-ray spectroscopy, element M1 in the first region is detected in smaller amounts than element M2 in the second region, and the peripheral area of ​​the first region is observed to be blurred by mapping analysis in energy-dispersive X-ray spectroscopy.

Description

[Technical Field]

[0001] This invention relates to a product, a method, or a method of manufacturing; or to a process, a machine , relating to manufacture or composition of matter. In particular One aspect of the present invention relates to a metal oxide, or a method for producing said metal oxide. Or, One aspect of the present invention relates to a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, an energy storage device, and a memory device. This relates to the placement, driving methods thereof, or manufacturing methods thereof.

[0002] In this specification, a semiconductor device is defined as a device that can function by utilizing semiconductor properties. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. This is one embodiment of a semiconductor device. Imaging device, display device, liquid crystal display device, light-emitting device, electrical Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices are semi- It may have a conductive device. [Background technology]

[0003] A technique for fabricating transistors using In-Ga-Zn metal oxides has been disclosed. (See, for example, Patent Document 1).

[0004] Furthermore, Non-Patent Document 1 describes In-Zn oxide and In-G as the active layer of a transistor. Structures with a two-layer stack of metal oxides, including α-Zn oxide, are being investigated. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2007-96055 [Non-patent literature]

[0006] [Non-Patent Document 1] John F. Wager, "Oxide TFTs: A Progress Report", Information Display 1 / 16, SID 2016, Jan / Feb 2016, Vol.32,No.1, p.16-21 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] Non-patent document 1 describes a channel-protected bottom-gate transistor, The active layer of the sta consists of a two-layer stack of indium zinc oxide and IGZO, and the channel is By setting the film thickness of the formed indium zinc oxide to 10 nm, a high field-effect mobility is achieved. μ = 62 cm 2 V -1 s -1 ) is achieved. On the other hand, one of the transistor characteristics is The S value (Subthreshold Swing, also called SS) is 0.41V / deca de is large. Also, one of the characteristics of a transistor is the threshold voltage (also called Vth). The voltage is -2.9V, which is the so-called normally-on transistor characteristic.

[0008] In view of the above-mentioned problems, one aspect of the present invention aims to provide a novel metal oxide. Alternatively, one aspect of the present invention aims to provide good electrical characteristics to a semiconductor device. Alternatively, one of the objectives is to provide highly reliable semiconductor devices. Alternatively, new One of the objectives is to provide a semiconductor device with a standard configuration, or a display device with a novel configuration. One of the objectives is to provide [this].

[0009] Furthermore, the description of these problems does not preclude the existence of other problems. The approach does not need to solve all of these problems. This will become clear from the description in the specification, drawings, claims, etc., and the specification, drawings It is possible to extract other issues from the descriptions in the surfaces, claims, etc. [Means for solving the problem]

[0010] One aspect of the present invention is a composite oxide having at least two regions, one of which is In, Zn, and element M1 (where M1 is Al, Ga, Si, B, Y, Ti, Fe, N) i, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, or C One or more of u are included, and the other one of the regions is In, Zn, and element M 2 (Element M2 is Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, L a, Ce, Nd, Hf, Ta, W, Mg, V, Be, or Cu, one of these, When a complex oxide containing multiple elements was analyzed by energy-dispersive X-ray spectroscopy, the aforementioned element In the region containing element M1, element M1 is greater than element M2 in the region containing element M2. , detected in small quantities, and by mapping analysis in energy-dispersive X-ray spectroscopy, the original The peripheral area of ​​the region containing elementary M1 is observed to be blurred.

[0011] In the above embodiment, the two regions each independently have minute grains.

[0012] Furthermore, in the above embodiment, the size of the microparticles is between 0.5 nm and 3 nm.

[0013] Furthermore, one aspect of the present invention relates to the composite oxide described above, and a gate, source, and drain, The composite oxide has the characteristic of being used as the channel region of a transistor. It is a transistor. [Effects of the Invention]

[0014] According to one aspect of the present invention, a novel metal oxide can be provided. Or, according to one aspect of the present invention Depending on the embodiment, good electrical characteristics can be imparted to the semiconductor device. Or, high reliability can be achieved. We can provide semiconductor devices. Or, we can provide semiconductor devices with novel configurations. This is possible. Alternatively, a display device with a novel configuration can be provided.

[0015] Furthermore, the description of these effects does not preclude the existence of other effects. The embodiment does not necessarily have to have all of these effects. Furthermore, other effects are... This will become clear from the description in the specification, drawings, claims, etc., and the specification, drawings Furthermore, it is possible to extract other effects from the descriptions in the claims and other documents. [Brief explanation of the drawing]

[0016] [Figure 1] Conceptual diagram of the composition of metal oxides. [Figure 2] A schematic diagram illustrating a transistor and the distribution of energy levels within the transistor. [Figure 3] A diagram illustrating a schematic band diagram model for a transistor. [Figure 4] A diagram illustrating a schematic band diagram model for a transistor. [Figure 5] A diagram illustrating a schematic band diagram model for a transistor. [Figure 6] Top view and cross-sectional view illustrating a semiconductor device. [Figure 7] Top view and cross-sectional view illustrating a semiconductor device. [Figure 8] A cross-sectional view illustrating a semiconductor device. [Figure 9] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 10] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 11] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 12] Top view and cross-sectional view illustrating a semiconductor device. [Figure 13] Top view and cross-sectional view illustrating a semiconductor device. [Figure 14] Top view and cross-sectional view illustrating a semiconductor device. [Figure 15] Top view and cross-sectional view illustrating a semiconductor device. [Figure 16] A diagram illustrating the range of atomic ratios of metal oxides according to the present invention. [Figure 17] A diagram illustrating an example of a display panel configuration. [Figure 18] A diagram illustrating an example of a display panel configuration. [Figure 19] A diagram illustrating the model of the metal oxide and its density of states in this embodiment. [Figure 20] A diagram illustrating the local structure and density of states of the metal oxide model with added impurities in this embodiment. [Figure 21] A diagram illustrating the local structure and density of states of the metal oxide model with added impurities in this embodiment. [Figure 22] A diagram illustrating the local structure and density of states of the metal oxide model with added impurities in this embodiment. [Figure 23] A diagram illustrating the measurement results of the XRD spectrum of the sample according to the example. [Figure 24] A diagram illustrating the cross-sectional TEM image and electron diffraction pattern of a sample according to the example. [Figure 25] A diagram illustrating the planar TEM image, cross-sectional TEM image, and electron diffraction pattern of a sample according to the example. [Figure 26] A diagram illustrating a planar TEM image of a sample according to the example and its image analysis results. [Figure 27] A diagram illustrating how to derive the rotation angle of a hexagon. [Figure 28] A diagram explaining how to create a Voronoi diagram. [Figure 29] A diagram illustrating the number and proportion of Voronoi region shapes in the example. [Figure 30] A diagram illustrating the planar TEM image, cross-sectional TEM image, and EDX mapping of a sample according to the example. [Figure 31] A diagram illustrating the EDX mapping of the sample in the example. [Figure 32] Graph of the Id-Vg characteristics of the sample used in the example. [Figure 33] Graphs showing the Id-Vg characteristics of the sample used in the example before and after +GBT stress. [Figure 34] A diagram illustrating the Id-Vg and Id-Vd characteristics of a transistor. [Figure 35] A diagram illustrating the Id-Vg characteristics and mobility curves (linear and saturated) calculated from GCA. [Figure 36] A diagram illustrating the cross-sectional TEM image and electron diffraction pattern of a sample according to the example. [Figure 37] A diagram illustrating a planar TEM image of a sample according to the example and its image analysis results. [Figure 38] A diagram illustrating the number and proportion of Voronoi region shapes in the example. [Figure 39] A diagram illustrating the planar TEM image, cross-sectional TEM image, and EDX mapping of a sample according to the example. [Figure 40] A diagram illustrating the EDX mapping of the sample in the example. [Figure 41] A diagram illustrating the planar TEM image, cross-sectional TEM image, and EDX mapping of a sample according to the example. [Figure 42] Graph of the Id-Vg characteristics of the sample used in the example. [Figure 43]A diagram illustrating the cross-sectional TEM image, EDX mapping, and atomic ratio of the sample used in the example. [Figure 44] A diagram illustrating the planar TEM image, EDX mapping, and atomic ratio of the sample in the example. [Figure 45] A diagram illustrating the Id-Vg characteristics. [Figure 46] A diagram illustrating the Id-Vg characteristics. [Figure 47] A diagram illustrating the calculation results of the interface state density. [Figure 48] A diagram illustrating the Id-Vg characteristics. [Figure 49] A diagram illustrating the calculation results of defect level density. [Figure 50] A diagram illustrating the calculation results of defect level density. [Figure 51] A diagram illustrating the Id-Vg characteristics of a transistor. [Figure 52] A diagram illustrating the proportion of each atom based on the XPS measurement results of the sample used in the example. [Modes for carrying out the invention]

[0017] The embodiments will be described below with reference to the drawings. However, the embodiments may differ in many ways. It is possible to implement it in any manner, and without deviating from its purpose and scope, its form and Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention is The following descriptions of embodiments are not to be interpreted as being limited to the following.

[0018] Furthermore, in drawings, the size, layer thickness, or area may be exaggerated for clarity. There is a possibility of compatibility. Therefore, it is not necessarily limited to that scale. Note that the drawing is modeled after an ideal example. This is expressed mathematically and is not limited to the shapes or values ​​shown in the drawings.

[0019] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" used in this specification refer to the combination of constituent elements. This is added to avoid ambiguity and does not mean that the number is limited.

[0020] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The relationships are used for convenience in explaining them with reference to the diagrams. Also, the positional relationships between the components are shown. This changes appropriately depending on the direction in which each configuration is described. Therefore, as described in the specification... It's not limited to specific words or phrases; it can be appropriately rephrased depending on the situation.

[0021] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a channel region, and current flows between the source and drain through the channel region. It is possible to do so. In this specification, the channel region is defined as the region where current is the main current. It refers to the region in which something flows.

[0022] Furthermore, the source and drain functions may vary depending on whether transistors with different polarities are used, or the circuit dynamics may change. In the process, the direction of the current may change, causing the order to be reversed. Therefore, this specification In written documents, the terms "source" and "drain" may be used interchangeably. .

[0023] Furthermore, in this specification, "electrically connected" means "having some kind of electrical effect." This includes cases where the connection is made via ". Here, "something that has some electrical effect" The term "connection" is not particularly limited as long as it enables the exchange of electrical signals between connected objects. For example, "things that have some kind of electrical effect" include electrodes and wiring, as well as transistors. These include switching elements, resistive elements, inductors, capacitors, and various other functional elements. This includes elements such as [specific components].

[0024] Furthermore, in this specification, a silicon oxidizride film is defined as having a composition that contains more oxygen than nitrogen. This refers to a film with a high content of nitrogen, and silicon nitride film, in terms of its composition, has more nitrogen than oxygen. This refers to a membrane with a high content of [the substance].

[0025] Furthermore, in this specification and other documents, when describing the structure of the invention using drawings, the same thing may be referred to as The same symbol may be used across different drawings.

[0026] Furthermore, in this specification, "parallel" means that two lines are at an angle of -10° or more and 10° or less. This refers to a state in which the elements are positioned. Therefore, it also includes cases where the angle is between -5° and 5°. "Approximately parallel" means that two lines are positioned at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" means that two lines are positioned at an angle of 80° to 100°. This refers to a state where the angle is perpendicular. Therefore, it also includes cases where the angle is between 85° and 95°. It also refers to "approximately perpendicular." This refers to a state in which two straight lines are positioned at an angle between 60° and 120°.

[0027] Furthermore, in this specification, the terms "membrane" and "layer" may be used interchangeably depending on the context. These terms can be interchanged. For example, the term "conductive layer" can be replaced with "conductive film." In some cases, it may be possible to change the terminology to "insulating film". Alternatively, for example, the term "insulating film" could be used. In some cases, it may be possible to change the term to "insulating layer."

[0028] Even when described as "semiconductor," for example, if its conductivity is sufficiently low, it may be regarded as an "insulator." and may have such characteristics. Also, the boundary between "semiconductor" and "insulator" is ambiguous and may not be strictly distinguishable. Therefore, the "semiconductor" described in this specification may be rephrased as an "insulator" in some cases. Similarly, the "insulator" described in this specification may be rephrased as a "semiconductor" in some cases.

[0029] Note that, for this specification and the like, "In:Ga:Zn = 4:2:3 or in the vicinity thereof" means that when In is 4 with respect to the total number of atoms, Ga is 1 or more and 3 or less (1 ≤ Ga ≤ 3), and Zn is 2 or more and 4 or less (2 ≤ Zn ≤ 4). Also, "In:Ga:Zn = 5:1:6 or in the vicinity thereof" means that when In is 5 with respect to the total number of atoms, Ga is greater than 0.1 and 2 or less (0 .1 < Ga ≤ 2), and Zn is 5 or more and 7 or less (5 ≤ Zn ≤ 7). Also, "In:Ga:Zn = 1:1:1 or in the vicinity thereof" means that when In is 1 with respect to the total number of atoms, Ga is greater than 0.1 and 2 or less (0.1 < Ga ≤ 2), and Zn is greater than 0.1 and 2 or less (0.1 < Zn ≤ 2). . a:Zn = 1:1:1 or in the vicinity thereof" means that when In is 1 with respect to the total number of atoms, G a is greater than 0.1 and 2 or less (0.1 < Ga ≤ 2), and Zn is greater than 0.1 and 2 or less down (0.1 < Zn ≤ 2).

[0030] (Embodiment 1) In this embodiment, a composite oxide, which is one aspect of the present invention, will be described. Note that the composite oxide is an oxide having a CAC (Cloud - Aligned Composite) structure. As the composite oxide, for example, there is a metal oxide having a plurality of metal elements.

[0031] Note that in this specification, when the composite oxide, which is one aspect of the present invention, has the function of a semiconductor, it is defined as CAC - OS (Oxide Semiconductor). ​​​​

[0032] Also, CAC-OS or CAC-metal oxide may be referred to as a matrix composite (matrix composite) or a metal matrix composite (metal m atrix composite).

[0033] The composite oxide of one aspect of the present invention preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition to these, an element M (the element M is selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon , titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium , neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) may be included.

[0034] Also, the composite oxide of one aspect of the present invention preferably has nitrogen. Specifically, in the composite oxide of one aspect of the present invention, the nitrogen concentration obtained by SIMS is 1×10 ato 16 ms / cm 3 or more, preferably 1×10 17 atoms / cm 3 or more and 2×10 22 ato ms / cm 3 or less. When nitrogen is added to the composite oxide, the band gap tends to become narrower and the conductivity tends to improve. Therefore, in this specification, etc., the composite oxide of one aspect of the present invention includes composite oxides to which nitrogen or the like is added. Also, a composite oxide having nitrogen may be referred to as a metal oxynitride.

[0035] Here, we consider the case where the composite oxide contains indium, element M, and zinc. The terms representing the atomic ratios of indium, element M, and zinc in the oxide are [In], [ Let M and Zn be the two elements.

[0036] <Composition of composite oxides> Figure 1 shows a conceptual diagram of a metal oxide, which is a composite oxide having a CAC structure according to the present invention.

[0037] CAC-OS refers to a type of metal oxide in which the elements constituting the metal oxide are unevenly distributed, as shown in Figure 1, for example. This forms regions 001 and 002, each mainly composed of each element, and each region mixes. , it is formed in a mosaic pattern. In other words, the elements that make up the metal oxide are 0.5 nm or larger than 10 A composition of materials that are unevenly distributed with a size of 3 nm or less, preferably 3 nm or less, or close to that size. Yes. In the following, in metal oxides, one or more metal elements are unevenly distributed. The region having the metal element is 0.5 nm or more and 10 nm or less, preferably 3 nm or less. A mixture of similar or nearly identical sizes is also called a mosaic or patchy appearance.

[0038] For example, an In-M-Zn oxide having a CAC structure is an indium oxide (hereinafter referred to as In O X1 (Let X1 be a real number greater than 0.) ), or indium zinc oxide (hereinafter, In X2 Zn Y2 O Z2 (Let X2, Y2, and Z2 be real numbers greater than 0.) The material separates into oxides containing element M, etc., resulting in a mosaic pattern. InO X1 , or In X2 Zn Y2 O Z2However, the structure distributed within the membrane (hereinafter referred to as cloud-like) Also known as...) In this specification, separated InO X1 , or In X2 Z n Y2 O Z2 A small amount of gallium (Ga) may be mixed in, resulting in a solid solution state.

[0039] In other words, a metal oxide according to one aspect of the present invention is In oxide, In-M oxide, M oxide, A small number of M-Zn oxides, In-Zn oxides, and In-M-Zn oxides were selected from among them. It has at least two or more oxides or materials.

[0040] Typically, the metal oxides in one aspect of the present invention are In oxide, In-Zn oxide, and In-A l-Zn oxide, In-Ga-Zn oxide, In-Y-Zn oxide, In-Cu-Zn acid In-V-Zn oxide, In-Be-Zn oxide, In-B-Zn oxide, In- Si-Zn oxide, In-Ti-Zn oxide, In-Fe-Zn oxide, In-Ni-Z n oxide, In-Ge-Zn oxide, In-Zr-Zn oxide, In-Mo-Zn oxide In-La-Zn oxide, In-Ce-Zn oxide, In-Nd-Zn oxide, In- Hf-Zn oxide, In-Ta-Zn oxide, In-W-Zn oxide, and In-Mg- It comprises at least two selected from Zn oxides. That is, one aspect of the present invention Metal oxides can also be described as composite metal oxides, which have multiple materials or components.

[0041] Here, we assume that the concept shown in Figure 1 is an In-M-Zn oxide having a CAC structure. In that case, region 001 is a region mainly composed of oxides containing element M, and region 002 is In X 2ZnY2 O Z2 , or InO X1 It can be said that this is a region whose main component is . At this time, A region in which an oxide containing element M is the main component, and In X2 Zn Y2 O Z2 , or InO X1 but The region containing the main component and the region containing at least Zn are indistinct around the edges (Bokete) Because of this, it may not always be possible to observe clear boundaries between them.

[0042] In other words, In-M-Zn oxides having a CAC structure are mainly composed of oxides containing the element M. The region and In X2 Zn Y2 O Z2 , or InO X1 The region in which is the main component is mixed It is a metal oxide. Therefore, metal oxides are sometimes referred to as composite metal oxides. In this specification, for example, the atomic ratio of In to element M in region 002 is, Region 002 is greater than the atomic ratio of In to element M in region 001. Compared to that, assume the concentration of In is high.

[0043] Note that metal oxides having a CAC structure do not include a laminated structure of two or more films with different compositions. Let's assume that this does not happen. For example, a two-layer film consisting mainly of In and mainly of Ga. This structure does not include the following.

[0044] Specifically, CAC-OS in In-Ga-Zn oxide (Note that within CAC-OS In-Ga-Zn oxide may also be specifically referred to as CAC-IGZO. In In-Ga-Zn oxide, CAC-OS is InO X1 , or In X2 Z n Y2 O Z2 Then, the material separates into oxides containing gallium, etc., resulting in a mosaic pattern. and a mosaic-like InO X1 , or In X2 Zn Y2 O Z2 Metal acids that are cloud-like It's a monster.

[0045] In other words, CAC-OS in In-Ga-Zn oxide is mainly composed of gallium-containing oxides. The region is divided into minutes and In X2 Zn Y2 O Z2 , or InO X1 The region in which is the main component is It is a composite metal oxide with a mixed composition. Furthermore, a gallium-containing oxide is the main component. The region and In X2 Zn Y2 O Z2 , or InO X1 The region in which is the main component is the surrounding region. Because the edges are indistinct (blurred), a clear boundary may not be observable.

[0046] For example, in the conceptual diagram shown in Figure 1, region 001 is mainly composed of an oxide containing gallium. This corresponds to a region, and region 002 is In X2 Zn Y2 O Z2 , or InO X1 Its main component is This corresponds to a region. A region mainly composed of gallium-containing oxides, and In X2 Zn Y2 O Z 2, or InO X1 The regions that mainly consist of these may each be referred to as nanoparticles. Nanoparticles have a particle diameter of 0.5 nm to 10 nm, typically between 1 nm and 2 nm. Furthermore, because the surrounding area of ​​the above nanoparticles is unclear (blurred), a clear boundary is required. This may not be observable in some cases.

[0047] The sizes of regions 001 and 002 were determined by energy-dispersive X-ray spectroscopy (EDX). Using EnergyDispersiveX-rayspectroscopy It can be evaluated using the obtained EDX mapping. For example, region 001 is E In DX mapping, the diameter of region 001 is 0.5 nm to 10 nm, or 3 nm. It may be observed at m or less. Also, the main component is observed from the center to the periphery of the region. The density of elements gradually decreases. For example, the elemental concentrations shown in EDX mapping ( As the amount (also called abundance) decreases from the center to the periphery, the EDX matrix in the cross-sectional photograph shows In ping, the peripheral areas of the region are observed to be indistinct (blurred). For example, InO X1 In regions where is the main component, In atoms are distributed from the center to the periphery. It gradually decreases, and instead, the amount of Zn atoms increases, X2 Zn Y2 O Z2 is the main It gradually changes into a region that is a component. Therefore, in EDX mapping, GaO X3 The peripheral areas of the region where this is the main component appear blurred.

[0048] Therefore, in region 001 or region 002 of the In-Ga-Zn oxide, [I When n is set to 1, [Ga] and [Zn] are not limited to integers. That is, region 001 , or region 002 has an unclear peripheral area, and in region 001 and region 002 However, since a concentration distribution of each metal element is present, if [In] is set to 1, then [Ga] and [Zn] is not necessarily an integer. Therefore, I have region 001 and region 002. In n-Ga-Zn oxide as well, when [In] is set to 1, [Ga] and [Zn] are This is not limited to integers.

[0049] Here, In-M-Zn oxide is, for example, InM m Zn n O p It can be expressed in the following format. If so, the region 001 of the composite oxide according to one aspect of the present invention is InM m1 Zn n1 O p1 , can be expressed as. Similarly, the region 00 of the composite oxide according to one aspect of the present invention 2 is InM m2 Zn n2 O p2 It can be expressed as follows. Note that the above m, n, p, m1, n1, p1, m2, n2, and p2 are either integers or non-integers.

[0050] Therefore, in this specification, etc., InM m Zn n O p InM m1 Zn n1 O p1、 Or In M m2 Zn n2 O p2 In-M-Zn oxides represented by this formula are called InMZnO-based oxides. In some cases, InMZnO-based oxides are defined as having a stoichiometric ratio where In is set to 1. M and Zn can be integers or non-integers. Also, within the region, the value of the stoichiometric ratio is This includes cases where there is variation.

[0051] Furthermore, the crystal structure of In-Ga-Zn oxide having a CAC configuration is not particularly limited. Furthermore, even if regions 001 and 002 each have different crystal structures... good.

[0052] Here, in-Ga-Zn-O metal oxides are sometimes referred to as IGZO, but IGZO This is a common name and can refer to a single compound consisting of In, Ga, Zn, and O. - An example of a Ga-Zn-O type metal oxide is a crystalline compound. The compounds have single-crystal structures, polycrystalline structures, or CAAC (c-axis aligned) structures. It has a crystalline structure. Note that the CAAC structure is a structure of multiple IGZOs. A layered crystal structure in which nanocrystals have c-axis orientation and are linked without orientation in the ab-plane. That is the case.

[0053] On the other hand, in CAC-OS in In-Ga-Zn oxides, the crystal structure is a secondary factor. In this specification, CAC-IGZO is defined as containing In, Ga, Zn, and O. In metal oxides, there are multiple regions with Ga as the main component and multiple regions with In as the main component. It can be defined as a metal oxide in which these are randomly dispersed in a mosaic-like manner. can.

[0054] For example, in the conceptual diagram shown in Figure 1, region 001 corresponds to a region whose main component is Ga, Region 002 corresponds to the region where In is the main component. Note that the region where Ga is the main component, and I The regions with n as the main component may each be called nanoparticles. These nanoparticles are particles The diameter is between 0.5 nm and 10 nm, typically 3 nm or less. Furthermore, the above nanoparticles are Because the peripheral areas are unclear (blurred), a clear boundary may not be observable.

[0055] The crystallinity of CAC-OS in In-Ga-Zn oxide is evaluated by electron diffraction. It is possible. For example, in an electron diffraction pattern image, regions with high brightness are observed in a ring shape. Also, multiple spots may be observed in the ring-shaped region.

[0056] From the above, the CAC-OS in In-Ga-Zn oxide has a structure different from that of the IGZO compound in which metal elements are uniformly distributed, and has properties different from those of the IGZO compound. That is, the CAC-OS in In-Ga-Zn oxide is separated into regions mainly composed of oxides containing gallium and regions mainly composed of In Zn O X2 Zn Y2 O Z2 or InO X1 and has a structure in which the regions with each element as the main component are mosaic-like. Here, the regions mainly composed of In

[0057] Zn X2 Zn Y2 O Z2 or InO X1 are regions with higher conductivity compared to the regions mainly composed of oxides containing gallium. That is, In X2 Zn Y2 O Z2 X1 or InO X2 exhibit conductivity as an oxide semiconductor when carriers flow through the regions mainly composed of them. Therefore, when the regions mainly composed of In Zn Y2 O Z2 or InO X1 are distributed in a cloud shape in the oxide semiconductor, high field-effect mobility (μ) can be realized. Note that the regions mainly composed of In X2 Zn Y2 O Z2 or InO X 1 can be said to be a semiconductor region close to the properties of a conductor.​​

[0058] On the other hand, in regions where oxides containing gallium are the main component, X2 Zn Y2 O Z2 ,Also is InO X1 Compared to regions where gallium is the main component, this region has higher insulating properties. Regions containing oxides and other materials as the main components are distributed within the oxide semiconductor, causing leakage current. This suppresses current flow and enables smooth switching operation. a Ga b Zn c O d etc. The region where this is the main component can be described as a semiconductor region, which has properties similar to those of an insulator.

[0059] Therefore, when CAC-OS in In-Ga-Zn oxide is used in semiconductor devices, Insulation caused by oxides containing um, and In X2 Zn Y2 O Z2 , or InO X1 The conductivity resulting from this works in a complementary manner, resulting in a high on-current (I on ), high electricity Field effect mobility (μ) and low off-current (I off This can be achieved.

[0060] Furthermore, semiconductor devices using CAC-OS in In-Ga-Zn oxide exhibit high reliability. Therefore, CAC-OS in In-Ga-Zn oxide is used in displays and other applications. It is ideal for a variety of semiconductor devices.

[0061] <Transistors containing metal oxides> Next, we will explain the case where the above metal oxides are used as semiconductors in transistors.

[0062] By using the above metal oxide as a semiconductor in a transistor, a transistor with high field-effect mobility and high switching characteristics can be realized. Also, a transistor with high reliability can be realized. Moreover, a transistor with high reliability can be realized.

[0063] FIG. 2(A) is a schematic diagram of a transistor using the above metal oxide in the channel region. In FIG. 2(A), the transistor has a source, a drain, a first gate, a second gate, a first gate insulating portion, a second gate insulating portion, and a channel portion. The transistor can control the resistance of the channel portion according to the potential applied to the gate. That is, conduction (the transistor is in the on state) or non-conduction (the transistor is in the off state) between the source and the drain can be controlled by the potential applied to the first gate or the second gate.

[0064] Here, the channel portion has a CAC-OS in which a region 001 having a first bandgap and a region 002 having a second bandgap are in a cloud shape. Note that the first bandgap is larger than the second bandgap.

[0065] For example, the case of using an In-Ga-Zn oxide having a CAC structure as the CAC-OS of the channel portion will be described. The In-Ga-Zn oxide having a CAC structure has a region 0 01 as a region having a higher Ga concentration than region 002, In Ga a Ga b Zn c O d as the main component, and a region 002 as a region having a higher In concentration than region 001, In Zn X2 Zn Y2 O Z2 , or InO X1 The material separates into regions where it is the main component, resulting in a mosaic-like appearance. In a Ga b Zn c O d And, InO X1 , or In X2 Zn Y2 O Z2 However, distributed within the membrane This configuration (cloud-based) is as described above. a Ga b Zn c O d Region 00 whose main component is 1 is In X2 Zn Y2 O Z2 , or InO X1 Larger than region 002, which is the main component. It has a large band gap.

[0066] Here, the conduction model of the transistor shown in Figure 2(A) having a CAC-OS in the channel portion. This will be explained. Figure 2(B) shows the source and drain of the transistor shown in Figure 2(A) and This is a schematic diagram illustrating the distribution of energy levels between them. Also, Figure 2(C) is a schematic diagram illustrating the distribution of energy levels between them. In the transistor shown in (A), the conduction band diagram is shown on the solid line indicated by X-X'. In each conduction band diagram, the solid line represents the energy at the lower end of the conduction band. f in The dashed line shown represents the energy of the pseudo-Fermi level of the electron. Also, here, the first Gate As the gate voltage, a negative voltage is applied between the gate and the source, and between the source and the drain. Drain voltage (V) d A value of >0 is being applied.

[0067] When a negative gate voltage is applied to the transistor shown in Figure 2(A), the result is shown in Figure 2(B). Thus, between the source and the drain, the energy C of the lower end of the conduction band originating from region 001 is B 001 And the energy CB at the lower end of the conduction band originating from region 002. 002 And, is formed Here, since the first band gap is larger than the second band gap, the lower end of the conduction band is reached. Energy CB 001 The potential barrier at this point is the energy CB at the lower end of the conduction band. 00 It is greater than the potential barrier of 2. In other words, the maximum potential barrier in the channel region. The maximum value is the value that originates from region 001. Therefore, CAC-OS is used in the channel section. This allows for the suppression of leakage current and the creation of a transistor with high switching characteristics.

[0068] Furthermore, as shown in Figure 2(C), the region 001 having the first band gap is the second band gap Since the band gap is relatively wider than in region 002 which has a band gap, the first band The Ec end of region 001 having a band gap is the same as the Ec end of region 002 having a second band gap. It can be located at a relatively higher position than the Ec end.

[0069] For example, the component in region 001 having a first band gap is In-Ga-Zn oxide ( In:Ga:Zn = 1:1:1 (atomic ratio), and the region has a second band gap. Let's assume that the component of region 002 is In-Zn oxide (In:Zn = 2:3 [atomic ratio]). Determined. In this case, the first band gap is 3.3 eV or near that, and the second The band gap is 2.4 eV or close to it. The values ​​obtained by measuring the single film of each material with an ellipsometer are used.

[0070] In the case of the above assumption, the difference between the first band gap and the second band gap is 0.9 eV That is. In one aspect of the present invention, the difference between the first band gap and the second band gap should be at least 0.1 eV or more. However, since the energy position of the valence band top derived from the region 001 having the first band gap and the energy position of the valence band top derived from the region 002 having the second band gap may be different, the difference between the first band gap and the second band gap is preferably 0.3 eV or more, and more preferably 0.4 eV or more.

[0071] Also, in the case of the above assumption, when carriers flow in the CAC-OS, the second band gap that is, carriers flow due to In-Zn oxide with a narrow band At this time, carriers overflow from the second band gap to the first band gap, that is, to the In-Ga-Zn oxide side with a wide band In other words, In-Zn oxide with a narrow band is more likely to generate carriers, and these carriers move to In-Ga-Zn oxide with a wide band

[0072] Note that in the metal oxide forming the channel portion, the region 001 and the region 002 are in a mosaic shape, and the region 001 and the region 002 are unevenly distributed. Therefore, the conduction band diagram on the solid line indicated by X-X' is an example

[0073] Basically, as shown in Fig. 3(A), it is sufficient that a band in which the region 002 is sandwiched by the region 001 is formed Or it is sufficient that a band in which the region 001 is sandwiched by the region 002 is formed

[0074] ​​​​​​ Furthermore, in actual CAC-OS, there is a region 001 having a first band gap and a second band gap At the junction with region 002 which has a gap, fluctuations occur in the aggregation morphology and composition of the region. Therefore, as shown in Figures 3(B) and 3(C), the band is discontinuous. However, it can also change continuously. That is, carriers can flow through CAC-OS. In other words, when this happens, the first band gap and the second band gap are linked. good.

[0075] Figure 4 shows the transistor shown in Figure 2(A) in the direction indicated by X-X', as shown in Figure 2(B). A schematic band diagram model corresponding to the schematic diagram is shown. Note that a voltage is applied to the first gate. When applying the voltage, the same voltage is simultaneously applied to the second gate. Figure 4(A) shows the second gate. Gate voltage V g As such, a positive voltage (V) is applied between the gate and the source. g Apply >0) This shows the ON state. Figure 4(B) shows the first gate voltage V g Apply i (V g This indicates the state (=0). Figure 4(C) shows the first gate voltage V g As such, gate and so A negative voltage (V) is applied between the terminal and the terminal. g This indicates the state where a value of <0) is applied (OFF State). In the channel section, the dashed line represents the energy at the lower end of the conduction band when no voltage is applied. The solid line shows the energy at the lower end of the conduction band when a voltage is applied. f The dashed line indicated by the arrow represents the energy of the pseudo-Fermi level of the electron.

[0076] A transistor having CAC-OS in its channel region has a first bandgap region. Region 001 and region 002, which has a second band gap, interact electrically. In other words, a region 001 having a first band gap and a region having a second band gap Region 002 and region 002 function complementaryly.

[0077] In other words, as shown in Figure 4(A), when a forward voltage is applied, the conduction band of region 002 and In comparison, the conduction band in region 001 is lower. Therefore, not only the conduction band in region 002, but also It is thought that a large on-current can be obtained because carriers also flow in the conduction band of region 001. On the other hand, as shown in Figures 4(B) and 4(C), when a reverse voltage is applied... As the conduction bands of region 001 and region 002 rise, the flow between source and drain The current is expected to become extremely small.

[0078] Also, in Figure 5, along the solid line X-X' of the transistor shown in Figure 2(A), A schematic band diagram model corresponding to the schematic diagram shown in C) is shown. Note that the first gauge When applying voltage to the first electrode, the same voltage is simultaneously applied to the second gate electrode. (See diagram) 5(A) has the first gate voltage V g As such, a positive voltage (V) is applied between the gate and the source. g Figure 5(B) shows the state when a voltage >0 is applied (ON State). Pressure V g Do not apply (V g This indicates the state (=0). Figure 5(C) shows the first gate voltage V g and Then, a negative voltage (V) is applied between the gate and the source. g State with <0) applied (OFF S This shows the energy (tate). In the channel region, the solid line represents the energy at the lower end of the conduction band. Also, E fThe dashed line shown indicates the energy of the pseudo-Fermi level of the electron. Here, region 0 Let ΔEc be the energy difference between the energy at the lower end of the conduction band in region 01 and the energy at the lower end of the conduction band in region 002. Furthermore, ΔEc(Vg=0) is when no voltage is applied (V g ΔEc in state =0, ΔEc( Vg>0) is the voltage (V) that turns the transistor ON. g Δ when >0) is applied Ec, ΔEc (Vg < 0) are negative voltages (V g This refers to ΔEc when a value <0) is applied. It refers to.

[0079] As shown in Figure 5(A), the potential (V) required to turn on the transistor is g >0) is the first G When applied to the terminal, ΔEc(Vg>0) < ΔEc(Vg=0). Therefore, the Ec terminal The region 002, which has a low second band gap, becomes the main conduction path, and when electrons flow... At the same time, electrons also flow into region 001 which has the first band gap. Therefore, In the ON state of the sta, high current driving force, i.e., large ON current and high field effect transfer, is observed. You can obtain a degree.

[0080] On the other hand, as shown in Figures 5(B) and 5(C), the first gate has a threshold voltage below Voltage (V) g By applying a voltage (≤0), the region 001 having the first band gap becomes dielectric Since it behaves as a body (insulator), the conduction path in region 001 is blocked. Also, the second Region 002 having a band gap is adjacent to region 001 having a first band gap. Therefore, the region 001 having the first band gap has a second band gap in addition to itself. It electrically interacts with region 002 having a band gap, and has a second band gap This blocks even the conduction paths within region 002. As a result, the entire channel becomes non-conductive. Therefore, the transistor is in the off state. Thus, ΔEc(Vg=0)<ΔEc(Vg<0) Yes.

[0081] Therefore, by using CAC-OS in the transistor, during the operation of the transistor, for example, When a potential difference occurs between the gate and the source or drain, the gate and the source or This can reduce or prevent leakage current between the drain and the circuit.

[0082] Furthermore, it is preferable to use a metal oxide with a low carrier density for the transistor. Metal oxides that are highly intrinsic or substantially high-purity intrinsic have few carrier sources, so Carrier density can be reduced. Also, it is high-purity intrinsic or substantially high-purity intrinsic. Because metal oxides have a low defect level density, their trap level density can also be low.

[0083] Furthermore, the time required for charges trapped in the trap levels of metal oxides to disappear is long. It can sometimes behave as if it were a fixed charge. Therefore, gold with a high trap level density Transistors in which a channel region is formed in a specific oxide may exhibit unstable electrical properties. ru.

[0084] Therefore, in order to stabilize the electrical characteristics of the transistor, the impurity concentration in the metal oxide must be reduced. Reducing it is effective. Also, in order to reduce the impurity concentration in metal oxides, nearby It is also preferable to reduce the concentration of impurities in the film. Examples of impurities include hydrogen, alkali metals, Examples include alkaline earth metals, iron, nickel, and silicon.

[0085] Here, we will explain the effects of various impurities in metal oxides.

[0086] In metal oxides, if silicon or carbon, which are among the Group 14 elements, are present, metal oxidation Defect levels are formed in materials. Therefore, the concentration of silicon and carbon in metal oxides And the concentration of silicon and carbon near the interface with the metal oxide (Secondary Ion Mass Spectrometry (SIMS)) (Obtained by Secondary Ion Mass Spectrometry) (Concentration) 2 × 10 18 atoms / cm 3 The following is preferably 2 × 10 17 atom / cm 3 The following applies:

[0087] Furthermore, if the metal oxide contains alkali metals or alkaline earth metals, it forms defect levels. And, it may generate carriers. Therefore, alkali metals or alkaline earth metals are included. Transistors using metal oxides tend to exhibit normally-on characteristics. Therefore, it is preferable to reduce the concentration of alkali metals or alkaline earth metals in metal oxides. Specifically, alkali metals or alkaline earths in metal oxides obtained by SIMS. The concentration of metals is 1 × 10 18 atoms / cm 3 The following is preferably 2 × 10 16 ato ms / cm 3 The following applies:

[0088] Furthermore, the hydrogen contained in metal oxides reacts with the oxygen bonded to the metal atoms to form water, Oxygen deficiency (V o This may form an oxygen deficiency (V o ) When hydrogen enters, In some cases, electrons are generated. Also, some of the hydrogen combines with the metal atom and oxygen. They can combine and generate electrons, which are carriers. Therefore, metals that contain hydrogen. Transistors using oxides tend to exhibit normally-on characteristics. Therefore, metal oxides... It is preferable that the amount of hydrogen inside be reduced as much as possible. Specifically, in metal oxides The hydrogen concentration obtained by SIMS is 1 × 10⁻⁶ 20 atoms / cm 3 Less than, preferably is 1 x 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Less than.

[0089] Furthermore, oxygen vacancies in metal oxides (V o ) reduces by introducing oxygen into the metal oxide. This is possible. In other words, oxygen vacancies in metal oxides (V o ) by supplying oxygen , oxygen deficiency (V o ) disappears. Therefore, by diffusing oxygen into the metal oxide, Langista oxygen deficiency (V o This can reduce the risk and improve reliability.

[0090] Furthermore, as a method for introducing oxygen into a metal oxide, for example, by bringing the oxygen into contact with the metal oxide, It is possible to create an oxide containing more oxygen than the oxygen that satisfies the target composition. In other words, oxidation Substances have a region where oxygen is present in excess of the stoichiometric composition (hereinafter also referred to as the excess oxygen region). It is preferable that a ) is formed. In particular, when a metal oxide is used in the transistor, By providing an oxide having an excess oxygen region in the underlayer or interlayer near the lampistor, This can reduce oxygen deficiency in transistors and improve reliability.

[0091] By using metal oxides with sufficiently reduced impurities in the channel region of the transistor, It is possible to impart specific electrical characteristics.

[0092] <Method for forming metal oxide films> The following describes an example of a method for forming metal oxide films.

[0093] The temperature at which the metal oxide film is deposited is preferably above room temperature and below 140°C. Note that "room temperature" refers not only to the temperature when no temperature control is performed, but also to the temperature when temperature control is performed, such as by cooling the circuit board. This includes cases where...

[0094] Furthermore, sputtering gases include noble gases (typically argon), oxygen, and a mixture of noble gases and oxygen. A mixed gas is used as appropriate. In the case of a mixed gas, the proportion of oxygen gas in the total film-forming gas is 0%. The percentage should be 30% or less, preferably 5% to 20%.

[0095] Furthermore, if oxygen is included as the sputtering gas, the metal oxide film will form simultaneously with the underlying film. By adding oxygen, an excess oxygen region can be created. In addition, high purity sputtering gas Temperature adjustment is also necessary. For example, oxygen gas and argon gas used as sputtering gases The dew point is -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower. Preferably, a gas purified to below -120°C is used so that moisture and other substances are removed from the metal oxide. It is possible to prevent it from being absorbed as much as possible.

[0096] Furthermore, when depositing metal oxide films using the sputtering method, the chatter in the sputtering apparatus The chamber is a cryopump designed to remove as much water and other impurities as possible from the metal oxide. Using an adsorption-type vacuum pump like the one shown, a high vacuum (5 × 10) is achieved. -7 Pa to 1 × 10 -4 P It is preferable to exhaust the gas (to a certain extent). Alternatively, a turbomolecular pump and a cold trap can be used. Combined, this prevents gases, especially those containing carbon or hydrogen, from flowing back into the chamber from the exhaust system. It is preferable to keep it that way.

[0097] Furthermore, an In-Ga-Zn metal oxide target can be used as the target. For example, [In]:[Ga]:[Zn]=4:2:4.1[atomic ratio], or [In ]:[Ga]:[Zn]=5:1:7[atomic ratio], or the atomic ratio of a nearby value. It is preferable to use a metal oxide target.

[0098] Furthermore, in a sputtering apparatus, the target may be rotated or moved. Example For example, by oscillating the magnet unit up and down and / or left and right during film formation, The composite metal oxide of the present invention can be formed. For example, the target can be set to 0.1 Hz or Beats (rhythm, beat, pulse, frequency, period, or cycle, etc.) above 1kHz You can replace it.) You can rotate or oscillate it. Alternatively, the magnet unit can be set to 0. The beat should be oscillating between 1Hz and 1kHz.

[0099] For example, as a sputtering gas, a noble gas with an oxygen gas ratio of about 10%, and oxygen Using a gas mixture, with a substrate temperature of 130°C, the mixture ratio [In]:[Ga]:[Zn]=4:2:4 A film is deposited while oscillating an In-Ga-Zn metal oxide target with an atomic ratio of 0.1. This allows for the formation of the metal oxide of the present invention.

[0100] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments or other examples. They can be used in combination.

[0101] (Embodiment 2) In this embodiment, a semiconductor device and a method for manufacturing a semiconductor device according to one aspect of the present invention are shown in Figure This will be explained with reference to Figures 6 through 15.

[0102] <2-1. Example of Semiconductor Device Configuration 1> Figure 6(A) is a top view of a transistor 100, which is a semiconductor device according to one aspect of the present invention. Figure 6(B) corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown in Figure 6(A). Figure 6(C) corresponds to a cross-sectional view of the section between the dashed-dotted line Y1 and Y2 shown in Figure 6(A). In addition, in Figure 6(A), to avoid complexity, the transistor 100 Some of the components (such as the insulating film that functions as a gate insulating film) are omitted from the diagram. The direction of the dashed line X1-X2 is the channel length direction, and the direction of the dashed line Y1-Y2 is the channel width direction. It is sometimes referred to as such. Furthermore, in the top view of the transistor, in subsequent drawings as well... Similar to Figure 6(A), some components may be omitted in the illustration.

[0103] The transistor 100 shown in Figures 6(A), (B), and (C) is a so-called top-gate structure transistor. He is a star.

[0104] The transistor 100 has an insulating film 104 on the substrate 102 and a metal oxide 1 on the insulating film 104. 08, an insulating film 110 on the metal oxide 108, a conductive film 112 on the insulating film 110, and an insulating film It comprises a film 104, a metal oxide 108, and an insulating film 116 on a conductive film 112.

[0105] Furthermore, the metal oxide 108 has a region where the conductive film 112 is superimposed via the insulating film 110. For example, metal oxide 108 is composed of In and M (where M is Al, Ga, Y, or Sn), It is preferable to have Zn.

[0106] Furthermore, the metal oxide 108 is in a region where the conductive film 112 is not superimposed and where the insulating film 116 is in contact. In this region, there is a region 108n. Region 108n is where the metal oxide 108 described earlier is This is an n-type region. Note that region 108n is in contact with the insulating film 116, and the insulating film 116 is... It contains nitrogen or hydrogen. Therefore, nitrogen or hydrogen in the insulating film 116 is present in region 108n. When added, the carrier density increases, resulting in an n-type configuration.

[0107] Furthermore, it is preferable that metal oxide 108 has a region where the atomic ratio of In is greater than the atomic ratio of M. For example, the ratio of the number of atoms of In, M, and Zn in metal oxide 108 is In:M It is preferable to have a neighborhood of Zn = 4:2:3.

[0108] Note that the metal oxide 108 is not limited to the above composition. For example, the composition of metal oxide 108 is I The ratio of the number of atoms of n, M, and Zn may be in the vicinity of In:M:Zn = 5:1:6. In this context, "neighborhood" means that when In is 5, M is between 0.5 and 1.5, and Zn is between 5 and 7. Includes the following.

[0109] Metal oxide 108 has a region where the atomic ratio of In is greater than the atomic ratio of M, which means that The field-effect mobility of transistor 100 can be increased. Specifically, transistor 1 The field effect mobility of 00 is 10 cm 2 / V s More preferably, transistor 10 The field effect mobility at 0 is 30 cm. 2 / V s It becomes possible to exceed this.

[0110] For example, a transistor with high field-effect mobility as described above can be used as a gate driver to generate a gate signal. By using it in Iba, it is possible to provide a display device with a narrow bezel (also called a narrow bezel). Furthermore, the transistors with high field-effect mobility mentioned above are used to transmit signals from the signal lines of the display device. The source driver that supplies the number (especially the output of the shift register that the source driver has) By using it in a demultiplexer connected to a terminal, the number of wires connected to the display device is reduced. It is possible to provide a display device that does not have a display function.

[0111] On the other hand, metal oxide 108 has a region where the atomic ratio of In is greater than the atomic ratio of M. However, if the crystallinity of metal oxide 108 is high, the field-effect mobility may be low.

[0112] The crystallinity of metal oxide 108 can be determined, for example, by X-ray diffraction (XRD). Analysis is performed using (iffraction), or by using a transmission electron microscope (TEM:Tr The analysis is performed using an Electron Microscope. It can be analyzed using [this method].

[0113] First, we will explain the oxygen vacancies that can be formed in metal oxide 108.

[0114] The oxygen vacancies formed in metal oxide 108 are problematic because they affect transistor characteristics. For example, when an oxygen vacancy is formed in the metal oxide 108, hydrogen is bonded to the oxygen vacancy. And it becomes a carrier source. When a carrier source is generated in metal oxide 108, the metal Variations in the electrical characteristics of transistor 100 having oxide 108, typically the threshold voltage A shift occurs. Therefore, in metal oxide 108, a smaller oxygen vacancy is preferable. It's nice.

[0115] Therefore, in one embodiment of the present invention, the insulating film near the metal oxide 108, specifically, the metal An insulating film 110 formed above the oxide 108 and formed below the metal oxide 108 Either one or both of the insulating film 104 contain excess oxygen. Oxygen or excess acid from either or both of 4 and the insulating film 110 to the metal oxide 108 By moving elements, it becomes possible to reduce oxygen vacancies in metal oxides.

[0116] Impurities such as hydrogen or water mixed into metal oxide 108 affect transistor characteristics. This becomes a problem because it provides hydrogen or moisture. The fewer impurities it contains, the better.

[0117] Furthermore, metal oxide 108 is selected from metal oxides with low impurity concentrations and low defect level densities. By using this method, it is possible to fabricate transistors with excellent electrical characteristics, which is preferable. Here, high-purity intrinsic purity refers to a product with a low impurity concentration and a low defect level density (low oxygen deficiency). Alternatively, it is called substantially high-purity intrinsic. High-purity intrinsic or substantially high-purity intrinsic metal oxides. Because the material has few carrier sources, the carrier density can be lowered. In transistors where a channel region is formed in a metal oxide, the threshold voltage becomes negative. It rarely exhibits electrical properties (also known as normally-on). Furthermore, it is highly pure and intrinsic or real. High-purity, intrinsic metal oxides have a low defect level density, and therefore a low trap level density. In some cases, this may occur. Also, metal oxides that are of high purity intrinsic or substantially high purity intrinsic are The current is extremely low, and the channel width is 1 × 10⁻¹⁰ 6 This is an element with a channel length of 10 μm in μm. However, the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V. In this case, the off-current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1 × 10⁻⁶. - 13 It is possible to obtain the characteristic of being A or less.

[0118] Furthermore, as shown in Figures 6(A), (B), and (C), the transistor 100 is located on the insulating film 116. Through the insulating film 118 and the opening 141a provided in the insulating films 116 and 118, region 10 A conductive film 120a electrically connected to 8n, and openings provided in insulating films 116 and 118 It has a conductive film 120b that is electrically connected to region 108n via 141b, That's good too.

[0119] In this specification, etc., insulating film 104 is referred to as the first insulating film, and insulating film 110 as the second insulating film. The film, insulating film 116 will be referred to as the third insulating film, and insulating film 118 will be referred to as the fourth insulating film. In some cases, the conductive film 112 functions as a gate electrode, and the conductive film 120a The first electrode functions as a source electrode, and the conductive film 120b functions as a drain electrode. do.

[0120] Furthermore, the insulating film 110 also functions as a gate insulating film. It has an excess oxygen region. The insulating film 110 has an excess oxygen region, in the metal oxide 108 This allows for the supply of excess oxygen. Therefore, an oxygen deficiency that may form in metal oxide 108 can be prevented. Since losses can be compensated for by excess oxygen, a highly reliable semiconductor device can be provided. It is possible.

[0121] Furthermore, in order to supply excess oxygen to the metal oxide 108, below the metal oxide 108 Excess oxygen may be supplied to the insulating film 104 that is formed. In this case, the insulating film 104 contains The excess oxygen can also be supplied to region 10⁸n. This increases the resistance in region 108n, which is undesirable. On the other hand, on the metal oxide 108 By having an insulating film 110 formed in the same way that contains excess oxygen, the conductive film 112 is superimposed on it. This makes it possible to selectively supply excess oxygen only to the desired region.

[0122] <2-2. Components of Semiconductor Devices> Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0123] [substrate] There are no major restrictions on the material of the substrate 102, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, saffron A wire substrate or the like may be used as the substrate 102. Alternatively, silicon or silicon carbide may be used as the material. Single-crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor groups such as silicon germanium It is also possible to use boards, SOI substrates, etc., and semiconductor elements are provided on these substrates. The resulting material may be used as substrate 102. In that case, 6th generation (1500mm x 1850mm), 7th generation (1870mm x 2200 mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800 By using large-area substrates such as the 10th generation (2950mm x 3400mm), A type of display device can be manufactured.

[0124] Furthermore, a flexible substrate is used as the substrate 102, and the transistor 100 is directly mounted on the flexible substrate. Alternatively, a release layer may be provided between the substrate 102 and the transistor 100. The delamination layer is separated from the substrate 102 after the semiconductor device has been partially or completely completed on it. It can be separated and transferred to another substrate. In this case, the transistor 100 is heat resistant. It can be transferred to substrates with inferior properties or flexible substrates.

[0125] [First insulating film] The insulating film 104 can be deposited using sputtering, CVD, vapor deposition, or pulsed laser deposition (P It can be formed using appropriate methods such as LD, printing, and coating. Also, insulating film 104 and For example, oxide insulating films or nitride insulating films can be formed by forming a single layer or multiple layers. Yes, it is possible. Furthermore, in order to improve the interfacial properties with the metal oxide 108, in the insulating film 104 It is preferable that at least the region in contact with the metal oxide 108 be formed with an oxide insulating film. Furthermore, by using an oxide insulating film that releases oxygen upon heating as the insulating film 104, the heating treatment This principle makes it possible to transfer oxygen contained in the insulating film 104 to the metal oxide 108. ru.

[0126] The thickness of the insulating film 104 is 50 nm or more, or 100 nm to 3000 nm, or It can be set to between 200 nm and 1000 nm. By increasing the thickness of the insulating film 104, This can increase the amount of oxygen released from the insulating film 104, and also the insulating film 104 and the metal oxide To reduce the interface state at the interface with 108, and the oxygen vacancies contained in the metal oxide 108. It is possible to do so.

[0127] For example, silicon oxide, silicon oxide nitride, silicon nitride, silicon nitride Silicon, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn oxide Any such material can be used, and it can be provided in a single layer or in a multilayer structure. In this embodiment, insulating film 1 As 04, a laminated structure of silicon nitride film and silicon oxidizide film is used. The insulating film 104 is used in a laminated structure, with a silicon nitride film on the lower layer and a silicon oxidizide film on the upper layer. By using a recon film, oxygen can be efficiently introduced into the metal oxide 108.

[0128] [Conductive film] A conductive film 112 functions as a gate electrode, a conductive film 120a functions as a source electrode, The conductive film 120b that functions as a rain electrode contains chromium (Cr), copper (Cu), and aluminum. Aluminum (Al), Gold (Au), Silver (Ag), Zinc (Zn), Molybdenum (Mo), Tungsten Talc (Ta), Titanium (Ti), Tungsten (W), Manganese (Mn), Nickel (N) i) A metallic element selected from iron (Fe), cobalt (Co), or the aforementioned metallic elements They are formed using alloys as components, or alloys combining the aforementioned metal elements. It is possible.

[0129] Furthermore, conductive films 112, 120a, and 120b contain an oxide (In) having indium and tin. -Sn oxide), an oxide containing indium and tungsten (In-W oxide), Oxides containing zinc, tungsten, and zinc (In-W-Zn oxide), indium and Oxides containing titanium (In-Ti oxide), oxides containing indium, titanium, and tin Indium-Ti-Sn oxide, an oxide containing indium and zinc (In-Zn oxide) ), an oxide containing indium, tin, and silicon (In-Sn-Si oxide), indiu Oxide conductors such as oxides containing gallium, zinc, and zinc (In-Ga-Zn oxide) Metal oxides can also be applied.

[0130] Here, we will explain oxide conductors. In this specification, etc., oxide conductors are referred to as OC( It may also be called an Oxide Conductor. Examples of oxide conductors include: When an oxygen vacancy is formed in a metal oxide and hydrogen is added to the oxygen vacancy, a donor zone forms near the conduction band. A galvanic site is formed. As a result, the metal oxide becomes highly conductive and turns into a conductor. Metal oxides that have been treated can be called oxide conductors. Generally, metal oxides are energy - Due to its large gap, it is transparent to visible light. On the other hand, oxide conductors are conductive It is a metal oxide having a donor level near the band. Therefore, oxide conductors have a donor level The effect of absorption depending on the position is small, and it has light transmittance to visible light comparable to that of metal oxides.

[0131] In particular, when the above-mentioned oxide conductor is used for the conductive film 112, excess oxygen is added to the insulating film 110. It is preferable because it allows for this.

[0132] Furthermore, conductive films 112, 120a, and 120b contain a Cu-X alloy film (where X is Mn, Ni, C). r, Fe, Co, Mo, Ta, or Ti may be used. A Cu-X alloy film is used. This allows for processing using a wet etching process, thus reducing manufacturing costs. It becomes Noh.

[0133] Furthermore, conductive films 112, 120a, and 120b contain titanium in particular, among the aforementioned metal elements. It contains one or more selected from tungsten, tantalum, and molybdenum. This is preferable. In particular, the conductive films 112, 120a, and 120b are tantalum nitride films. It is preferable to use the following. The tantalum nitride film is conductive and is resistant to copper or hydrogen. Furthermore, it has high barrier properties. In addition, the tantalum nitride film releases hydrogen from itself. Because the amount is small, the conductive film in contact with the metal oxide 108, or the conductive film in the vicinity of the metal oxide 108 It can be suitably used as such.

[0134] Furthermore, the conductive films 112, 120a, and 120b can be formed by electroless plating. Materials that can be formed by this electroless plating method include, for example, Cu, Ni, Al, and A. Use one or more of the following: u, Sn, Co, Ag, and Pd. This is possible. In particular, using Cu or Ag can lower the resistance of the conductive film. Therefore, it is suitable.

[0135] [Second insulating film] The insulating film 110 that functions as the gate insulating film of transistor 100 is plasma chemical Vapor-phase deposition (PECVD: Plasma Enhanced Chemical Vapor Deposition) By methods such as deposition or deposition, sputtering, etc., silicon oxide film, oxidation Silicon nitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, HAF oxide nium film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film , magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film (one of these) An insulating layer including the above can be used. The insulating film 110 can be a two-layer laminated structure or a three-layer The above-described layered structure may also be used.

[0136] Furthermore, an insulating material is in contact with the metal oxide 108, which functions as the channel region of transistor 100. The film 110 is preferably an oxide insulating film and contains an excess of oxygen in a stoichiometric composition. It is more preferable to have a region (excess oxygen region). In other words, the insulating film 110 is The insulating film is capable of releasing oxygen. Furthermore, an excess oxygen region is provided in the insulating film 110. To do this, for example, an insulating film 110 is formed under an oxygen atmosphere, or the insulating film after film formation 1 10 can be heat-treated in an oxygen atmosphere.

[0137] Furthermore, when hafnium oxide is used as the insulating film 110, the following effects are obtained. Fnium has a higher dielectric constant compared to silicon oxide and silicon oxide nitride. Therefore, acid Compared to the case using silicon dioxide, the thickness of the insulating film 110 can be increased, thus tunnel electricity This can reduce leakage current due to current. In other words, transistors with low off-current Furthermore, hafnium oxide having a crystalline structure can achieve an amorphous structure. It has a higher relative permittivity compared to hafnium oxide. Therefore, it has a small off-current. To use a lunger, it is preferable to use hafnium oxide having a crystalline structure. Examples of crystal structures include monoclinic and cubic systems. However, in one embodiment of the present invention... This is not limited to these.

[0138] Furthermore, the insulating film 110 preferably has few defects, and typically, electron spin resonance ( The signal observed in ESR (Electron Spin Resonance) is small. It is preferable to have none. For example, as mentioned above, E is observed when the g value is 2.001. The 'center' is cited. Note that the E' center is caused by dangling bonds of silicon. The insulating film 110 has a spin density originating from the E' center of 3 × 10⁻¹⁰. 17 spin s / cm 3 The following is preferably 5 × 10 16 spins / cm 3 The following is a silicon oxide film Alternatively, a silicon oxide nitride film can be used.

[0139] [Metal oxides] As the metal oxide 108, the metal oxides shown above can be used.

[0140] <Atomic ratio> The metal according to the present invention is described below using Figures 16(A), 16(B), and 16(C). This section describes the preferred range of atomic ratios of indium, element M, and zinc in oxides. Figures 16(A), 16(B), and 16(C) show the atomic ratio of oxygen. It will not be listed. Also, the number of atoms of indium, element M, and zinc in the metal oxide. Let the terms of the ratio be [In], [M], and [Zn].

[0141] In Figures 16(A), 16(B), and 16(C), the dashed line represents [In]:[M] The line where the atomic ratio of Zn is (-1≦α≦1) is [ ] In]:[M]:[Zn]=(1+α):(1-α):2 is the line where the atomic ratio is [I The line [In]:[M]:[Zn]=(1+α):(1-α):3 represents the atomic ratio. The line where the atomic ratio of ]:[M]:[Zn]=(1+α):(1-α):4, and [ This represents a line where the atomic ratio of In]:[M]:[Zn]=(1+α):(1-α):5. .

[0142] Furthermore, the dashed line represents the atomic ratio [In]:[M]:[Zn]=5:1:β (β≧0). The line where the atomic ratio is [In]:[M]:[Zn]=2:1:β, [In] The line where the atomic ratio of :[M]:[Zn]=1:1:β is [In]:[M]:[Zn] The atomic ratio is 1:2:β, and the atoms are [In]:[M]:[Zn]=1:3:β. Lines that represent numerical ratios, and lines that represent atomic ratios of [In]:[M]:[Zn]=1:4:β. It represents "in".

[0143] Also, as shown in Figures 16(A), 16(B), and 16(C), [In]:[M]:[ Metal oxides with an atomic ratio of Zn = 0:2:1, and values ​​near that, exhibit a spinel-type crystal structure. It is easy to construct.

[0144] Furthermore, multiple phases may coexist within a metal oxide (e.g., two-phase coexistence, three-phase coexistence). For example... If the atomic ratio is in the vicinity of [In]:[M]:[Zn]=0:2:1, then spinel Two phases, one with a crystalline structure and the other with a layered crystalline structure, tend to coexist. Also, the atomic ratio is [In]:[ When M]:[Zn]=1:0:0, the crystal structure is of the Bixbyte type and layered Two phases with a crystalline structure are likely to coexist. When multiple phases coexist in a metal oxide, different crystals may be present. Grain boundaries may be formed between the structural elements.

[0145] Region A shown in Figure 16(A) is the region containing indium, element M, and zinc in the metal oxide. An example of a preferred range for the atomic ratio is shown.

[0146] By increasing the indium content of the metal oxide, the carrier mobility of the metal oxide (electrical) can be improved. The molecular mobility can be increased. Therefore, metal oxides with a high indium content are Compared to metal oxides with a low dium content, it exhibits higher carrier mobility.

[0147] On the other hand, when the content of indium and zinc in the metal oxide decreases, the carrier mobility decreases. Therefore, the atomic ratio is [In]:[M]:[Zn]=0:1:0 and in its vicinity. When the value is such that (for example, region C shown in Figure 16(C)), the insulating properties are high.

[0148] Therefore, the metal oxide according to one embodiment of the present invention has high carrier mobility, region A in Figure 16(A) It is preferable to have the atomic ratio shown in [the formula].

[0149] In particular, in region B shown in Figure 16(B), the carrier mobility is high and reliability is high compared to region A. High-quality metal oxides can be obtained.

[0150] Furthermore, region B is defined as 4.1 from [In]:[M]:[Zn]=4:2:3, and its neighbors. Includes values. Neighboring values ​​include, for example, [In]:[M]:[Zn]=5:3:4. Furthermore, region B is [In]:[M]:[Zn]=5:1:6, and its neighboring values, [In]:[M]:[Zn] = 5:1:7, and its neighboring values.

[0151] Furthermore, the properties of metal oxides are not uniquely determined by the atomic ratio. However, the properties of metal oxides may differ depending on the formation conditions. For example, metal oxide When depositing a film using a sputtering device, the atomic ratio deviates from the target atomic ratio. A film is formed. Also, depending on the substrate temperature during film formation, the film may be formed from more [Zn] than the target. The [Zn] content may be small. Therefore, the region shown in the diagram is where the metal oxide exhibits certain properties. This region exhibits an atomic ratio that tends to have a certain characteristic, and the boundaries between region A and region C are not strictly defined. .

[0152] Furthermore, if metal oxide 108 is In-M-Zn oxide, the sputtering target and Therefore, it is preferable to use a target containing polycrystalline In-M-Zn oxide. The atomic ratio of the metal oxide 108 to be filmed is the same as the gold contained in the sputtering target mentioned above. This includes variations of plus or minus 40% in the atomic ratio of the group elements. For example, in metal oxide 108 The composition of the sputtering target is In:Ga:Zn=4:2:4.1 [atomic ratio] In this case, the composition of the metal oxide 108 to be deposited is In:Ga:Zn=4:2:3[number of atoms] The ratio may be in the vicinity of [ ]. Also, the sputtering target used for metal oxide 108 When the composition of the film is In:Ga:Zn=5:1:7 [atomic ratio], the metal oxide film that is deposited is 1 The composition of 08 may be close to In:Ga:Zn = 5:1:6 [atomic ratio].

[0153] Furthermore, the metal oxide 108 has an energy gap of 2 eV or more, preferably 2.5 eV or less. Above. In this way, by using metal oxides with a wide energy gap, transient The off-current of the STA100 can be reduced.

[0154] Furthermore, it is preferable that the metal oxide 108 has a non-single-crystal structure. A non-single-crystal structure is, for example, This includes CAAC-OS, polycrystalline structure, microcrystalline structure, or amorphous structure, as described later. Non-single crystal In terms of structure, amorphous structures have the highest defect level density.

[0155] [Third insulating film] The insulating film 116 contains nitrogen or hydrogen. Examples of insulating films 116 include nitride insulating films. Examples include films. Examples of nitride insulating films include silicon nitride, silicon nitride oxide, and silicon oxide nitride. It can be formed using silicon or the like. The hydrogen concentration contained in the insulating film 116 is 1 × 1 0 22 atoms / cm 3 It is preferable that the above is true. Also, the insulating film 116 is a metal oxide 1 It is in contact with region 108n of 08. Therefore, impurities in region 108n that are in contact with the insulating film 116. The concentration of a substance (e.g., hydrogen) increases, which can raise the carrier density in region 10⁸n. .

[0156] [Fourth insulating film] As the insulating film 118, an oxide insulating film can be used. A laminated film of an oxide insulating film and a nitride insulating film can be used. For example, silicon oxide, silicon oxide nitride, silicon nitride oxide, aluminum oxide, acid Hafnium oxide, gallium oxide, or Ga-Zn oxide can be used.

[0157] Furthermore, the insulating film 118 functions as a barrier film against external elements such as hydrogen and water. It is preferable.

[0158] The thickness of the insulating film 118 is 30 nm to 500 nm, or 100 nm to 400 nm. The following is possible:

[0159] <2-3. Transistor Configuration Example 2> Next, regarding a configuration different from the transistors shown in Figures 6(A), 6(B), and 6(C), see Figure 7(A)( We will explain using B)(C).

[0160] Figure 7(A) is a top view of transistor 150, and Figure 7(B) is the same as Figure 7(A) but with a dashed line. Figure 7(C) is a cross-sectional view between X1 and X2, and Figure 7(A) is a cross-sectional view between the dashed line Y1 and Y2. That is the case.

[0161] The transistor 150 shown in Figures 7(A), (B), and (C) is connected to the conductive film 106 on the substrate 102, Insulating film 104 on conductive film 106, metal oxide 108 on insulating film 104, and metal oxide 1 The insulating film 110 on 08, the conductive film 112 on the insulating film 110, the insulating film 104, and the metal oxide It comprises 108 and an insulating film 116 on the conductive film 112.

[0162] Furthermore, the metal oxide 108 is the same as the transistor 100 shown in Figures 6(A), (B), and (C). This is the configuration. As shown in Figures 7(A), (B), and (C), transistor 150 is the same as the transistor shown earlier. In addition to the configuration of the sta 100, it also has a conductive film 106 and an opening 143.

[0163] The opening 143 is provided in the insulating films 104 and 110. The conductive film 106 is provided in the opening 1 The conductive film 112 is electrically connected via 43. Therefore, the conductive film 106 and conductive film 1 The same potential is applied to 12. Note that without providing the opening 143, the conductive film 106 and the conductor A different potential may be applied to the film 112. Alternatively, the conductive film may be provided without the opening 143. 106 may be used as a light-shielding film. For example, the conductive film 106 may be formed from a light-shielding material. By doing so, the light from below that irradiates the second region can be suppressed.

[0164] Furthermore, when the transistor 150 is configured, the conductive film 106 is the first gate electrode (bottom The conductive film 112 functions as a second gate electrode (also called a toe electrode), and the conductive film 112 has the function of a second gate electrode (toe electrode). It functions as a gate electrode (also called a gate electrode). In addition, the insulating film 104 is the first gate insulating The insulating film 110 functions as a border film and also functions as a second gate insulating film.

[0165] The conductive film 106 is made of the same material as the conductive films 112, 120a, and 120b described above. It is possible to have resistance. In particular, by forming the conductive film 106 with a copper-containing material, the resistance can be reduced. It is preferable because it can be made lower. For example, the conductive film 106 is a titanium nitride film, tang nitride A laminated structure is provided in which a copper film is provided on a tal film or tungsten film, and conductive films 120a, 120 b is a laminated structure in which a copper film is provided on a titanium nitride film, a tantalum nitride film, or a tungsten film. This is preferable. In this case, the transistor 150 is the pixel transistor and drive of the display device. By using it in either or both of the dynamic transistors, conductive film 106 and conductive film 120 Parasitic capacitance generated between a and the conductive film 106 and the conductive film 120b This can be made lower. Therefore, conductive film 106, conductive film 120a, and conductive film 12 0b is used as the first gate electrode, source electrode, and drain electrode of transistor 150. In addition to being used, wiring for power supply, signal supply, or connection of the display device. It can also be used for lines, etc.

[0166] Thus, the transistor 150 shown in Figures 7(A), 7(B), and 7(C) is the same as the transistor explained earlier. Unlike ZISTA 100, it has conductive films that function as gate electrodes above and below the metal oxide 108. The structure is as follows. As shown in transistor 150, a semiconductor device according to one aspect of the present invention includes Multiple gates may be provided.

[0167] Furthermore, as shown in Figures 7(B) and 7(C), the metal oxide 108 is used as the first gate electrode. The conductive film 106 that can perform certain functions and the conductive film 112 that functions as a second gate electrode are each opposite each other. It is positioned so as to be sandwiched between two conductive films that function as gate electrodes.

[0168] Furthermore, the length of the conductive film 112 in the channel width direction is equal to the length of the metal oxide 108 in the channel width direction. The entire channel width direction of the metal oxide 108 is longer than that, with the insulating film 110 in between. It is covered with an insulating film 112. Also, the conductive film 112 and the conductive film 106 are separated by an insulating film 104, and Since the metal oxide 108 is connected at the opening 143 provided in the insulating film 110, One side of the channel in the channel width direction faces the conductive film 112 with the insulating film 110 in between. .

[0169] In other words, the conductive film 106 and the conductive film 112 are openings provided in the insulating films 104 and 110. The region connected in part 143 and located outside the side end of the metal oxide 108 To possess.

[0170] With this configuration, the metal oxide 108 contained in the transistor 150 is Conductive film 106 that functions as gate electrode 1 and conductive film that functions as gate electrode 2 It can be electrically surrounded by an electric field of 112. Like transistor 150, The electric fields of the first and second gate electrodes create a channel region in the metal acid. The transistor device structure that electrically surrounds monster 108 is called Surrounded c This can be called a channel (S-channel) structure.

[0171] Since transistor 150 has an S-channel structure, the conductive film 106 or conductive The film 112 effectively applies an electric field to the metal oxide 108 to induce a channel. This improves the current drive capability of transistor 150, resulting in high on-current characteristics. It becomes possible to obtain this. Also, because the on-current can be increased, the transistor It becomes possible to miniaturize 150. Also, transistor 150 is metal oxide 108 Because it has a structure surrounded by conductive film 106 and conductive film 112, the transient This can increase the mechanical strength of the Ta150.

[0172] Furthermore, in the channel width direction of transistor 150, the opening 143 of metal oxide 108 An opening different from opening 143 may be formed on the side where opening 143 is not formed.

[0173] Furthermore, as shown in transistor 150, the transistor exists with a semiconductor film in between. When there is a pair of gate electrodes, one gate electrode receives signal A, and the other gate electrode receives signal A. A fixed potential Vb may be applied to the poles. Also, signal A is applied to one terminal electrode, and the other... A signal B may be applied to the gate electrode. Also, a fixed potential Va may be applied to one of the gate electrodes. A fixed potential Vb may be applied to the other terminal terminal.

[0174] Signal A is, for example, a signal used to control a conduction or non-conduction state. Signal A is, This is a digital signal that takes two types of potentials: potential V1 or potential V2 (where V1 > V2). It is also possible to set potential V1 as the high power supply potential and potential V2 as the low power supply potential. Yes. Signal A may be an analog signal.

[0175] A fixed potential Vb is, for example, a potential used to control the threshold voltage VthA of a transistor. Yes. The fixed potential Vb may be potential V1 or potential V2. In this case, the fixed potential It is preferable that there is no need to provide a separate potential generation circuit for generating Vb. The fixed potential Vb is The potential may be different from potential V1 or potential V2. Lower the fixed potential Vb. Therefore, the threshold voltage VthA can be increased in some cases. As a result, the gate-source voltage V Reduces drain current when gs is 0V, and reduces leakage current in circuits with transistors. It may be possible to reduce it. For example, the fixed potential Vb may be lower than the low power supply potential. On the other hand, In some cases, the threshold voltage VthA can be lowered by increasing the fixed potential Vb. As a result, the gate-source voltage Vgs improves the drain current when the power supply potential is high, and traction In some cases, the operating speed of a circuit with an inverter can be improved. For example, by lowering the fixed potential Vb to a low voltage. It may be set higher than the source potential.

[0176] Signal B is, for example, a signal used to control a conduction or non-conduction state. Signal B is, This is a digital signal that takes two types of potentials: potential V3 or potential V4 (where V3 > V4). It is also possible to set potential V3 as the high power supply potential and potential V4 as the low power supply potential. Signal B may be an analog signal.

[0177] If both signal A and signal B are digital signals, then signal B will have the same digital value as signal A. It may also be a single signal. In this case, the on-current of the transistor is increased, and the transistor has In some cases, the operating speed of the circuit can be improved. At this time, the potential V1 and the electric current in signal A Potential V2 may be different from potentials V3 and V4 in signal B. For example, signal The gate insulator corresponding to the gate to which signal B is input corresponds to the gate to which signal A is input If it is thicker than the gate insulating film, the potential amplitude of signal B (V3-V4) is the same as the potential amplitude of signal A ( It is also acceptable to make it larger than V1-V2). Doing so may affect the conduction state or non-conductivity of the transistor. To make the influence of signal A on the conduction state equal to the influence of signal B. It may be possible.

[0178] If both signal A and signal B are digital signals, signal B will have a different digital value from signal A. It may also be a signal that has signals. In this case, the control of the transistor is separately determined by signal A and signal B. This can be done and may enable higher functionality. For example, if the transistor is n-cell In the case of a channel type, only when signal A is at potential V1 and signal B is at potential V3 When a conduction state occurs, or when signal A is at potential V2 and signal B is at potential V4 When it is in a non-conductive state, a single transistor can perform functions such as NAND gates and NOR gates. This can sometimes be achieved. Also, signal B is a signal for controlling the threshold voltage VthA. This may also be the case. For example, signal B is the period during which the circuit with the transistor is operating, The signal may have a different potential during the period when the circuit is not operating. Signal B is the circuit The signals may have different potentials depending on the operating mode. In this case, signal B is more than signal A. The electrical potential may not switch very frequently.

[0179] If both signal A and signal B are analog signals, then signal B is an analog signal with the same potential as signal A. The signal, an analog signal obtained by multiplying the potential of signal A by a constant, or the potential of signal A added by a constant. Alternatively, a subtracted analog signal may also be used. In this case, the on-current of the transistor is Furthermore, it may be possible to improve the operating speed of circuits containing transistors. Signal B is equal to Signal A A different analog signal may also be used. In this case, the control of the transistor is controlled by signal A and signal B This can sometimes be done separately, potentially leading to higher functionality.

[0180] Signal A may be a digital signal and signal B may be an analog signal. Or, signal A may be an analog signal. It is an analog signal, and signal B may be a digital signal.

[0181] When a fixed potential is applied to both gate electrodes of a transistor, the transistor is treated as a resistive element and In some cases, they can function as equivalent elements. For example, a transistor can function as an n-channel In the case of a type 1, increasing (or decreasing) the fixed potential Va or fixed potential Vb will cause a transient In some cases, the effective resistance of the sta can be lowered (or raised). Fixed potential Va and fixed potential By increasing (or decreasing) both Vb, it is possible to obtain the result using a transistor with only one gate. In some cases, an effective resistance lower (or higher) than the effective resistance obtained may be achieved.

[0182] The other configurations of transistor 150 are the same as those of transistor 100 shown above. , it produces a similar effect.

[0183] Furthermore, an insulating film may be formed on the transistor 150. Figure 7(A)(B)(C) The transistor 150 shown in the diagram is insulated on conductive films 120a, 120b, and insulating film 118. It has a film 122.

[0184] The insulating film 122 has the function of flattening irregularities caused by transistors, etc. 122 can be an insulating material and is formed using an inorganic or organic material. Inorganic materials include silicon oxide films, silicon oxide nitride films, silicon nitride oxide films, silicon nitride films. Examples include aluminum oxide films, aluminum nitride films, etc. Examples include photosensitive resin materials such as acrylic resin or polyimide resin.

[0185] <2-4. Transistor Configuration Example 3> Next, Figure 8 shows a configuration different from the transistor 150 shown in Figures 7(A), 7(B), and 7(C). I will use it to explain.

[0186] Figures 8(A) and 8(B) are cross-sectional views of transistor 160. The top view is the same as that of transistor 150 shown in Figure 7(A), therefore, the explanation here will not be provided. (This part is omitted.)

[0187] The transistor 160 shown in Figures 8(A) and 8(B) has a layered structure of conductive film 112. The shape, and the shape of the insulating film 110, are different from those of the transistor 150.

[0188] The conductive film 112 of transistor 160 consists of a conductive film 112_1 on the insulating film 110 and a conductive film 1 It has a conductive film 112_2 on 12_1, and for example, as the conductive film 112_1, By using a conductive film, excess oxygen can be added to the insulating film 110. The material conductive film can be formed using the sputtering method in an atmosphere containing oxygen gas. Furthermore, the above oxide conductive film may include, for example, an oxide having indium and tin, tung Oxides containing sten and indium, oxides containing tungsten, indium and zinc A substance, an oxide having titanium and indium, an oxide having titanium, indium and tin, Oxides containing indium and zinc, oxides containing silicon, indium and tin, Examples include oxides containing zinc, gallium, and zinc.

[0189] Furthermore, as shown in Figure 8(B), in the opening 143, the conductive film 112_2 and the conductive film 1 06 is connected. When forming the opening 143, a conductive film which will become the conductive film 112_1 is formed. After this, the shape shown in Figure 8(B) can be achieved by forming the opening 143. When an oxide conductive film is applied to conductive film 112_1, conductive film 112_2 and conductive film 106 By configuring the connection between the conductive film 112 and the conductive film 106, the connection resistance between them can be reduced. It is possible.

[0190] Furthermore, the conductive film 112 and insulating film 110 of transistor 160 have a tapered shape. Specifically, the lower end of the conductive film 112 is formed outside the upper end of the conductive film 112. Furthermore, the lower end of the insulating film 110 is formed outside the upper end of the insulating film 110. The lower end of the conductive film 112 is formed at approximately the same position as the upper end of the insulating film 110.

[0191] By making the conductive film 112 and insulating film 110 of the transistor 160 tapered, Compared to the case where the conductive film 112 and insulating film 110 of the converter 160 are rectangular, the insulating film 116 It is preferable because it can improve coverage.

[0192] The other configurations of transistor 160 are the same as those of transistor 150 shown above. , it produces a similar effect.

[0193] <2-5. Method for Manufacturing Semiconductor Devices> Next, regarding an example of the method for fabricating the transistor 150 shown in Figure 7(A),(B), and(C), This will be explained using Figures 9 to 11. Figures 9 to 11 show the method for fabricating transistor 150. These are cross-sectional views in the channel length direction and channel width direction illustrating the law.

[0194] First, a conductive film 106 is formed on the substrate 102. Next, on the substrate 102 and the conductive film 106 An insulating film 104 is formed, and a metal oxide film is formed on the insulating film 104. Then, the metal oxide film is formed. By processing the material film into island-like structures, metal oxide 108a is formed (see Figure 9(A)).

[0195] The conductive film 106 can be formed by selecting the material described above. In this embodiment, For the conductive film 106, a 50 nm thick tungsten film was produced using a sputtering apparatus. A laminated film is formed consisting of a film and a copper film with a thickness of 400 nm.

[0196] The processing method for the conductive film that will become the conductive film 106 is a wet etching method and a dry etching method. Either one or both of the etching methods may be used. In this embodiment, wet etching is used. After etching the copper film using the etching method, the tungsten film was etched using the dry etching method. The conductive film is processed by chipping to form the conductive film 106.

[0197] The insulating film 104 can be deposited using sputtering, CVD, vapor deposition, or pulsed laser deposition (P It can be formed using appropriate methods such as LD (Luminography), printing, and coating. For insulating film 104, a silicon nitride film with a thickness of 400 nm is produced using a PECVD apparatus, A silicon oxide-nitride film with a thickness of 50 nm is formed.

[0198] Alternatively, oxygen may be added to the insulating film 104 after it has been formed. The oxygen added can be oxygen radicals, oxygen atoms, oxygen atom ions, oxygen molecular ions, etc. There are also methods of addition, such as ion doping, ion implantation, and plasma treatment. These are some examples. In addition, after forming a film that suppresses oxygen desorption on the insulating film 104, through the film Oxygen may be added to the insulating film 104.

[0199] As membranes that suppress the desorption of oxygen as described above, indium, zinc, gallium, tin, and aluminum are used. chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten It can be formed using a conductive film or semiconductor film having 1 or more of the ions.

[0200] Furthermore, when adding oxygen during plasma processing, the oxygen is excited with microwaves, resulting in high-density oxygen. By generating plasma, the amount of oxygen added to the insulating film 104 can be increased.

[0201] Furthermore, when forming the metal oxide 108a, an inert gas (for example, helium) is added to the oxygen gas. A mixture of gases (such as argon gas and xenon gas) may be used. The proportion of oxygen gas in the total film-forming gas when forming a (hereinafter also referred to as the oxygen flow rate ratio) and Therefore, the percentage is 0% or more and 30% or less, preferably 5% or more and 20% or less.

[0202] Furthermore, the conditions for forming the metal oxide 108a are preferably such that the substrate temperature is between room temperature and 180°C. Alternatively, the substrate temperature should be set to above room temperature and below 140°C. Setting the plate temperature to, for example, above room temperature but below 140°C is preferable as it increases productivity.

[0203] Furthermore, the thickness of the metal oxide 108a is 3 nm to 200 nm, preferably 3 nm. The wavelength should be between m and 100 nm, and more preferably between 3 nm and 60 nm.

[0204] Furthermore, a large glass substrate (for example, a 6th to 10th generation) is used as the substrate 102. In this case, the substrate temperature when depositing the metal oxide 108a was set to 200°C or higher and 300°C or lower. In some cases, the substrate 102 may deform (become warped or bent). Therefore, large glass substrates When using this method, the substrate temperature during film formation of the metal oxide 108a should be above room temperature and 200°C. By keeping the temperature below ℃, deformation of the glass substrate can be suppressed.

[0205] Furthermore, it is necessary to increase the purity of the sputtering gas. For example, as The oxygen gas or argon gas used has a dew point of -40°C or lower, preferably -80°C or lower. Preferably, a gas purified to -100°C or lower, more preferably to -120°C or lower, is used. This helps to prevent moisture and other substances from being absorbed into the metal oxide as much as possible.

[0206] Furthermore, when depositing metal oxide films using the sputtering method, the chatter in the sputtering apparatus The chamber is a cryopump designed to remove as much water and other impurities as possible from the metal oxide. Using an adsorption-type vacuum pump like the one shown, a high vacuum (5 × 10) can be achieved.-7 Pa to 1 × 10 -4 It is preferable to exhaust the air to approximately Pa. In particular, when the sputtering device is in standby mode. , partial pressure of gas molecules equivalent to H2O in the chamber (gas molecules equivalent to m / z=18) to 1 × 10 -4 Pa or less, preferably 5 × 10 -5 It is preferable to keep it below Pa.

[0207] In this embodiment, the conditions for forming the metal oxide 108a are as follows.

[0208] The formation conditions for metal oxide 108a were determined using an In-Ga-Zn metal oxide target. It is formed by the puttering method. Also, the substrate temperature and oxygen during the formation of the metal oxide 108a are important. The flow rate ratio can be set as appropriate. Also, the pressure inside the chamber is set to 0.6 Pa. 2500W of AC power is supplied to the metal oxide target installed inside the sputtering apparatus. This process forms an oxide film.

[0209] Furthermore, to process the deposited metal oxide film into metal oxide 108a, wet etching is required. Either the method or the dry etching method, or both, may be used.

[0210] Furthermore, after forming the metal oxide 108a, heat treatment is performed to dehydrogenate the metal oxide 108a. Dehydration or chemical treatment may be performed. The heat treatment temperature is typically 150°C or higher to reduce substrate strain. It is below 0.5°C, or between 250°C and 450°C, or between 300°C and 450°C.

[0211] Heat treatment is performed using noble gases such as helium, neon, argon, xenon, krypton, or nitrogen. This can be carried out in an inert atmosphere containing an element. Alternatively, heating in an inert atmosphere followed by an oxygen atmosphere It may also be heated in an atmosphere. Note that the above inert atmosphere and oxygen atmosphere may contain hydrogen, water, etc. It is preferable that there be no such thing. The processing time should be between 3 minutes and 24 hours.

[0212] The heat treatment can be carried out using an electric furnace, an RTA device, etc. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate, but only for a short period of time. Processing time can be reduced.

[0213] This involves forming a metal oxide film while heating it, or performing a heat treatment after forming a metal oxide. Therefore, in metal oxides, the hydrogen concentration obtained by SIMS is 5 × 10 19 atoms / cm 3 The following, or 1 × 10 19 atoms / cm 3 Below, 5 x 10 18 atom / cm 3 The following, or 1 × 10 18 atoms / cm 3 The following, or 5 x 10 17 Atom s / cm 3 The following, or 1 × 10 16 atoms / cm 3 The following is possible:

[0214] Next, insulating film 110_0 is formed on insulating film 104 and metal oxide 108a. (Figure 9) See B).

[0215] As the insulating film 110_0, a silicon oxide film or a silicon oxide nitride film is used in plasma chemistry Formed using a vapor deposition apparatus (also known as a PECVD apparatus or simply a plasma CVD apparatus). This is possible. In this case, the raw material gases include a silicon-containing sedimentary gas and an oxidizing gas. It is preferable to use a silicon-containing material. Typical examples of silicon-containing sedimentary gases include silane and disin. Examples include ores, trisilanes, and silane fluorides. Oxidizing gases include oxygen, ozone, and carbon dioxide. Examples include nitrogen dioxide and nitrogen dioxide.

[0216] Furthermore, as the insulating film 110_0, the flow rate of the oxidizing gas is 20 times the flow rate of the sedimenting gas. The ratio should be less than 100 times, or between 40 and 80 times, and the pressure inside the processing chamber should be 100 Pa. By using a PECVD apparatus with a pressure of less than 50 Pa or less, nitrogen oxides with fewer defects can be produced. A silicon dioxide film can be formed.

[0217] Furthermore, as insulating film 110_0, it was placed in the vacuum-evacuated processing chamber of the PECVD apparatus. The substrate is kept at a temperature between 280°C and 400°C, and the raw material gas is introduced into the processing chamber. The pressure should be between 20 Pa and 250 Pa, more preferably between 100 Pa and 250 Pa. By supplying high-frequency power to electrodes installed in the processing chamber, the dense oxide is processed. A silicon oxide film or silicon oxidizide film can be formed.

[0218] Alternatively, the insulating film 110_0 may be formed using a microwave-based PECVD method. Microwaves refer to the frequency range from 300 MHz to 300 GHz. Microwaves are used for electron heating. The degree is low, and the electron energy is small. Also, the supplied power is used to accelerate electrons. The proportion of molecules that can be dissociated is small, and it can be used for the dissociation and ionization of a larger number of molecules. It is possible to excite a high-density plasma (high-density plasma). Therefore, the film-forming surface and This allows for the formation of an insulating film 110_0 with minimal plasma damage to the deposits and fewer defects. can.

[0219] Furthermore, the insulating film 110_0 can be formed using a CVD method with organic silane gas. Yes. As an organic silane gas, ethyl silicate (TEOS: chemical formula Si(OC2H5)4) , tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetra Siloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), Hex methyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), Silicon-containing compounds such as risdimethylaminosilane (SiH(N(CH3)2)3) It can be used. By using the CVD method with organic silane gas, a highly insulating material can be obtained. A border film 110_0 can be formed.

[0220] In this embodiment, as the insulating film 110_0, a PECVD apparatus was used to create an acid film with a thickness of 100 nm. A silicon nitride film is formed.

[0221] Next, a mask is formed on the insulating film 110_0 at a desired position by lithography, and then... By etching the edge film 110_0 and a portion of the insulating film 104, the conductive film 106 is reached. An opening 143 is formed (see Figure 9(C)).

[0222] The method for forming the opening 143 is either a wet etching method or a dry etching method. Either one or both may be used. In this embodiment, a dry etching method is used. Next, an opening 143 is formed.

[0223] Next, a conductive film 112 is applied to the conductive film 106 and insulating film 110_0 so as to cover the opening 143. _0 is formed. Also, if a metal oxide film is used as the conductive film 112_0, Oxygen may be added to the insulating film 110_0 during the formation of film 112_0 (Figure 9(D)). reference).

[0224] In Figure 9(D), the oxygen added to the insulating film 110_0 is schematically represented by an arrow. Furthermore, by forming a conductive film 112_0 so as to cover the opening 143, the conductive film 106 and the conductive film 112_0 are electrically connected.

[0225] When a metal oxide film is used as the conductive film 112_0, the method for forming the conductive film 112_0 is as follows. It is preferable to use the sputtering method and form the material in an atmosphere containing oxygen gas during the formation process. By forming the conductive film 112_0 in an atmosphere containing oxygen gas during formation, the insulating film 110_ Oxygen can be suitably added to 0. The method for forming the conductive film 112_0 is as follows: However, the method is not limited to sputtering; other methods, such as ALD (Advanced Laser Development), may also be used.

[0226] In this embodiment, the conductive film 112_0 is made using the sputtering method, and the film thickness is IGZO film, which is a 100nm In-Ga-Zn oxide (In:Ga:Zn=4:2:4 A film of 0.1 (atomic ratio) is formed. Also, before the formation of the conductive film 112_0, or the conductive film 112 After the formation of _0, an oxygen-adding treatment may be performed in the insulating film 110_0. The method is similar to the oxygen addition treatment that can be performed after the formation of the insulating film 104. Yes.

[0227] Next, a mask 140 is formed on the conductive film 112_0 at a desired position by a lithography process. (See Figure 10(A)).

[0228] Next, etching is performed on the mask 140 to create the conductive film 112_0 and the insulating film 110_ Process 0. Also, after processing the conductive film 112_0 and the insulating film 110_0, mask 140 Remove the island-shaped conductive film. By processing the conductive film 112_0 and the insulating film 110_0, the island-shaped conductive film is removed. Layers 112 and island-shaped insulating films 110 are formed (see Figure 10(B)).

[0229] In this embodiment, a dry etching method is used to etch the conductive film 112_0 and the insulating film 1 Process 10_0.

[0230] Furthermore, when processing the conductive film 112_0 and the insulating film 110_0, the conductive film 112 is superimposed. The film thickness of the metal oxide 108a in the region may become thinner. Alternatively, the conductive film 112_0, And when processing the insulating film 110_0, the insulating film 10 in the region where the metal oxide 108a is not superimposed The film thickness of 4 may become thinner. Also, processing of the conductive film 112_0 and the insulating film 110_0. During this process, an etchant or etching gas (e.g., chlorine) is used to remove metal oxide 108a The elements added thereto, or the constituent elements of the conductive film 112_0 or insulating film 110_0, are metals. It may be added to oxide 108.

[0231] Next, an insulating film 116 is formed on the insulating film 104, the metal oxide 108, and the conductive film 112. Furthermore, by forming the insulating film 116, one of the metal oxides 108a in contact with the insulating film 116 The part becomes region 108n. Here, the metal oxide 108a superimposed on the conductive film 112 is gold Let it be group oxide 108. (See Figure 10(C)).

[0232] The insulating film 116 can be formed by selecting the material described above. In this embodiment For the insulating film 116, a PECVD apparatus was used to create a 100 nm thick silicon nitride oxide film. A film is formed. Furthermore, during the formation of the silicon nitride oxide film, plasma treatment and The two steps, including the film treatment, are performed at a temperature of 220°C. The plasma treatment is performed before film formation. To the chang, argon gas at a flow rate of 100 sccm and nitrogen gas at a flow rate of 1000 sccm were used. It is introduced into the bar, the pressure inside the chamber is set to 40 Pa, and an RF power supply (27.12 MHz) is used. A power supply of 1000W is provided. In addition, for the film deposition process, a flow rate of 50 sccm of silane gas is used. Then, nitrogen gas at a flow rate of 5000 sccm and ammonia gas at a flow rate of 100 sccm are used. It is introduced into the chamber, the pressure inside the chamber is set to 100 Pa, and the RF power supply (27.12 MHz) is connected. 1000W of power is supplied to z).

[0233] By using a silicon nitride film as the insulating film 116, the region in contact with the insulating film 116 Nitrogen or hydrogen in the silicon nitride film can be supplied to O8n. By setting the temperature during the formation of 116 to the above temperature, excess oxygen contained in the insulating film 110 is removed. It can suppress the release of substances into the body.

[0234] Next, an insulating film 118 is formed on the insulating film 116 (see Figure 11(A)).

[0235] The insulating film 118 can be formed by selecting the material described above. In this embodiment For the insulating film 118, a PECVD apparatus was used to create a 300 nm thick silicon oxide nitride film. It forms a film.

[0236] Next, a mask is formed on the insulating film 118 by lithography at the desired position, and then the insulating film 1 By etching 18 and a portion of the insulating film 116, an opening 14 reaches region 108n. Forms 1a and 141b (see Figure 11(B)).

[0237] Methods for etching insulating film 118 and insulating film 116 include wet etching and Either or both of the dry etching method may be used. The insulating film 118 and insulating film 116 are processed using a dry etching method.

[0238] Next, a conductive material is placed on region 108n and insulating film 118 so as to cover the openings 141a and 141b. Conductive films 120a and 120b are formed by creating a film and then processing the conductive film into a desired shape. (See Figure 11(C)).

[0239] The conductive films 120a and 120b can be formed by selecting the materials described above. In the application method, a sputtering apparatus was used to form conductive films 120a and 120b, and the thickness A laminated film is formed consisting of a 50 nm thick tungsten film and a 400 nm thick copper film.

[0240] Furthermore, the processing method for the conductive films 120a and 120b is wet etching. Either the method or the dry etching method, or both, may be used. After etching the copper film using the wet etching method, the tang is then etched using the dry etching method. The conductive film is processed by etching the stainless steel film to form conductive films 120a and 120b. .

[0241] Next, the insulating film 122 is formed by covering the conductive films 120a, 120b and the insulating film 118. .

[0242] Through the above process, the transistor 150 shown in Figures 7(A), 7(B), and 7(C) can be fabricated. can.

[0243] The films that make up transistor 150 (insulating film, metal oxide film, conductive film, etc.) are as follows: In addition to the formation methods described above, sputtering, chemical vapor deposition (CVD), vacuum deposition, and pulvature are also used. It can be formed using laser deposition (PLD) or ALD. Alternatively, it can be applied by coating. It can be formed by methods such as sputtering and printing. Methods for film formation include sputtering and plasma deposition. While PECVD (penetrating vapor deposition) is a typical method, thermal CVD can also be used. Examples of thermal CVD methods and Another method is metal-organic chemical vapor deposition (MOCVD).

[0244] Thermal CVD is a method in which the chamber is subjected to atmospheric pressure or reduced pressure, and the raw material gas and oxidizer are simultaneously processed. The film is formed by sending the material into a chamber, reacting it near or on the substrate, and depositing it onto the substrate. Thus, since thermal CVD is a film deposition method that does not generate plasma, It has the advantage of not generating defects through damage.

[0245] Thermal CVD methods such as MOCVD can process the conductive films, insulating films, metal oxide films, and other films described above. It can be formed.

[0246] For example, when forming a hafnium oxide film using a film deposition apparatus that utilizes ALD, the solvent and Liquids containing hafnium precursors (such as hafnium alkoxide or tetrakisdimethylamide) Fnium (TDMAH, Hf[N(CH3)2]4) and tetrakis (ethylmethylamide) (The raw material gas is a vaporized hafnium amide such as hafnium, and ozone is used as an oxidizer.) Two types of gases (O3) are used.

[0247] Furthermore, when forming an aluminum oxide film using a film deposition apparatus that utilizes ALD, the solvent and Liquid containing an aluminum precursor (trimethylaluminum (TMA, Al(CH3)3)) Two types of gases are used: a raw material gas obtained by vaporizing (etc.) and H2O as an oxidizing agent. Examples include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum Minium tris(2,2,6,6-tetramethyl-3,5-heptanedione), etc. be.

[0248] Furthermore, when forming a silicon oxide film using a film deposition apparatus that utilizes ALD, hexachromate Rodisilane is adsorbed onto the film-forming surface, supplying radicals of oxidizing gases (O2, nitrous oxide). Then, it reacts with the adsorbed material.

[0249] Furthermore, when depositing a tungsten film using an ALD-based film deposition apparatus, WF6 gas is used. Then, B2H6 gas is introduced sequentially to form an initial tungsten film, and subsequently, WF6 gas and H2 A tungsten film is formed using gas. Note that SiH4 gas is used instead of B2H6 gas. You may use it.

[0250] Furthermore, metal oxides, such as In-Ga-Zn-O films, can be formed using a film deposition apparatus that utilizes ALD. When forming a film, an In-O layer is formed using In(CH3)3 gas and O3 gas, and then... Then, a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then Zn(CH3) 3) Form a ZnO layer using gas 2 and O3 gas. Note that the order of these layers is as shown in this example. It is not limited to these. In addition, these gases can be used to create In-Ga-O layers, In-Zn-O layers, and Ga- A mixed compound layer, such as a Zn-O layer, may be formed. Alternatively, an inert gas such as Ar may be used instead of O3 gas. H2O gas obtained by bubbling water with a volatile gas can be used, but O3 gas that does not contain H can be used. It is preferable to use "su".

[0251] <2-6. Transistor Configuration Example 4> Figure 12(A) is a top view of transistor 300A, and Figure 12(B) is a top view of Figure 12(A). This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown, and Figure 12(C) is the same as Figure 12 This corresponds to the cross-sectional view of the section between the dashed line Y1 and Y2 shown in (A). Note that Figure 12( In A), to avoid complexity, some of the components of transistor 300A ( The insulating film (which functions as a gate insulating film, etc.) is omitted from the diagram. Also, the dashed line X1- The X2 direction is sometimes referred to as the channel length direction, and the Y1-Y2 direction (marked with a dashed line) is sometimes referred to as the channel width direction. Yes. Furthermore, in the top view of the transistor, the same applies to Figure 12(A) in subsequent drawings. As shown, sometimes some of the components are omitted when illustrating.

[0252] The transistor 300A shown in Figure 12 has a conductive film 304 on the substrate 302 and the substrate 302 and The insulating film 306 on the conductive film 304, the insulating film 307 on the insulating film 306, and the insulating film 307 Metal oxide 308, conductive film 312a on metal oxide 308, and conductive film on metal oxide 308 It has an electrical film 312b and, more specifically, a conductive film 31 on transistor 300A. Insulating films 314, 316, and 318 are located on 2a, 312b, and the metal oxide 308. It will be established.

[0253] Furthermore, in transistor 300A, insulating films 306 and 307 are... The insulating films 314, 316, and 318 function as gate insulating films, and transistor 3 It functions as a protective insulating film for transistor 00A. Also, in transistor 300A, conductive Film 304 functions as a gate electrode, and conductive film 312a functions as a source electrode. The conductive film 312b has the ability to function as a drain electrode.

[0254] In this specification, etc., insulating films 306 and 307 are referred to as the first insulating film, and insulating films 314 and 3 16 may be referred to as the second insulating film, and insulating film 318 as the third insulating film.

[0255] The transistor 300A shown in Figure 12 has a channel-etched transistor structure. A metal oxide according to one aspect of the invention can be suitably used in channel etch type transistors. Cut.

[0256] <2-7. Transistor Configuration Example 5> Figure 13(A) is a top view of transistor 300B, and Figure 13(B) is a top view of Figure 13(A). This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown, and Figure 13(C) is Figure 13 This corresponds to the cross-sectional view of the section between the dashed line Y1 and Y2 shown in (A).

[0257] The transistor 300B shown in Figure 13 has a conductive film 304 on the substrate 302 and the substrate 302 and The insulating film 306 on the conductive film 304, the insulating film 307 on the insulating film 306, and the insulating film 307 Metal oxide 308, insulating film 314 on metal oxide 308, insulating film 3 on insulating film 314 16 and metal oxide through the opening 341a provided in the insulating film 314 and insulating film 316 A conductive film 312a electrically connected to 308, and provided on insulating film 314 and insulating film 316 A conductive film 312b is electrically connected to the metal oxide 308 through an opening 341b. It has. Also, on transistor 300B, more specifically, conductive films 312a, 312b, and An insulating film 318 is provided on the insulating film 316.

[0258] Furthermore, in transistor 300B, insulating films 306 and 307 are... The insulating films 314 and 316 function as gate insulating films, protecting the metal oxide 308. Having the function of an insulating film, insulating film 318 serves as a protective insulating film for transistor 300B. It has the function of. In addition, in transistor 300B, the conductive film 304 is the gate electrode and The conductive film 312a has the function of a source electrode, and the conductive film 312b It functions as a drain electrode.

[0259] In the transistor 300A shown in Figure 12, it had a channel etch type structure. Furthermore, the transistor 300B shown in Figure 13(A)(B)(C) has a channel-protected structure. Yes. A metal oxide according to one aspect of the present invention is also suitably used in channel-protected transistors. It is possible.

[0260] <2-8. Transistor Configuration Example 6> Figure 14(A) is a top view of transistor 300C, and Figure 14(B) is a top view of Figure 14(A). This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown, and Figure 14(C) is Figure 14 This corresponds to the cross-sectional view of the section between the dashed line Y1 and Y2 shown in (A).

[0261] The transistor 300C shown in Figure 14 is the same as the transistor 3 shown in Figure 13(A),(B),(C). The shapes of 00B and insulating films 314 and 316 are different. Specifically, transistor 300C The insulating films 314 and 316 are arranged in an island-like manner on the channel region of the metal oxide 308. The other configurations are the same as those of the 300B transistor.

[0262] <2-9. Transistor Configuration Example 7> Figure 15(A) is a top view of transistor 300D, and Figure 15(B) is a top view of Figure 15(A). This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown, and Figure 15(C) is the same as Figure 15 This corresponds to the cross-sectional view of the section between the dashed line Y1 and Y2 shown in (A).

[0263] The transistor 300D shown in Figure 15 has a conductive film 304 on the substrate 302 and the substrate 302 and The insulating film 306 on the conductive film 304, the insulating film 307 on the insulating film 306, and the insulating film 307 Metal oxide 308, conductive film 312a on metal oxide 308, and conductive film on metal oxide 308 The conductive film 312b, the metal oxide 308, and the insulating film 314 on the conductive films 312a and 312b , insulating film 316 on insulating film 314, insulating film 318 on insulating film 316, insulating film 318 It has conductive films 320a and 320b.

[0264] Furthermore, in transistor 300D, insulating films 306 and 307 are... The insulating films 314, 316, and 318 function as the first gate insulating film, and the transient It functions as the second gate insulating film of transistor 300D. In this configuration, conductive film 304 functions as the first gate electrode, and conductive film 320a functions as the first gate electrode. It functions as a second gate electrode, and the conductive film 320b is a pixel electrode used in a display device. It has the function of being a source electrode. Furthermore, the conductive film 312a has the function of a source electrode, and the conductive film 312b functions as a drain electrode.

[0265] Furthermore, as shown in Figure 15(C), the conductive film 320b consists of insulating films 306, 307, 314, 3 In the openings 342b and 342c provided in 16 and 318, the conductive film 304 is connected Therefore, conductive film 320b and conductive film 304 are given the same potential.

[0266] In addition, in transistor 300D, openings 342b and 342c are provided, and a conductive film 32 The example given illustrates a configuration for connecting 0b and the conductive film 304, but it is not limited to this. For example, Only one of the openings, either opening 342b or opening 342c, is formed, and the conductive film 32 A configuration that connects 0b and the conductive film 304, or without providing openings 342b and 342c. Alternatively, the conductive film 320b and the conductive film 304 may be configured without connection. In the configuration where b and conductive film 304 are not connected, conductive film 320b and conductive film 304 are not connected. They can each be given a different electrical potential.

[0267] Furthermore, the conductive film 320b provides openings 342a in the insulating films 314, 316, and 318. It is connected to the conductive film 312b via this.

[0268] Furthermore, transistor 300D has the S-channel structure described earlier.

[0269] This embodiment can be appropriately combined with other embodiments described herein, at least in part. They can be implemented together.

[0270] (Embodiment 3) In this embodiment, it is used in the display unit of a display device using a semiconductor device according to one aspect of the present invention. An example of a display panel capable of doing so will be explained using Figures 17 and 18. Examples are provided below. The display panel has both a reflective liquid crystal element and a light-emitting element, and has both a transmission mode and a reflective mode. This is a display panel capable of displaying both types of information. Oxides, and transistors having said metal oxides, are transistors of pixels in a display device. Or a driver that drives the display device, or an LSI that supplies data to the display device, etc. It can be used suitably.

[0271] <Example of display panel configuration> Figure 17 is a schematic perspective view of a display panel 600 according to one embodiment of the present invention. The display panel 600 is The substrate 651 and substrate 661 are bonded together. In Figure 17, substrate 661 is This is indicated by a dashed line.

[0272] The display panel 600 has a display unit 662, a circuit 659, wiring 666, etc. For example, the circuit 659, wiring 666, and conductive film 663 which functions as a pixel electrode are provided. Figure 17 shows an example where IC673 and FPC672 are mounted on substrate 651. This indicates that the configuration shown in Figure 17 consists of the display panel 600, the FPC672, and the IC. It can also be described as a display module having 673.

[0273] Circuit 659 can be a circuit that functions, for example, as a scan line driving circuit.

[0274] Wiring 666 has the function of supplying signals and power to the display unit 662 and circuit 659. The power and frequency are input to wiring 666 from an external source via FPC672 or from IC673. .

[0275] Furthermore, in Figure 17, the substrate 651 is connected using the COG (Chip On Glass) method, etc. This shows an example where IC673 is provided. IC673 is used, for example, in the scan line driving circuit, Alternatively, an IC that functions as a signal line drive circuit can be applied. When it includes a circuit that functions as a scan line drive circuit and a signal line drive circuit, or when the scan line drive circuit External circuits are provided to function as roads and signal line drive circuits, and the display panel is connected via the FPC672. When inputting signals to drive the 600, for example, a configuration without IC673 is used. This is also good. Furthermore, the IC673 can be used with COF (Chip On Film) or similar methods, FP It could also be implemented in C672.

[0276] Figure 17 shows a magnified view of a part of the display unit 662. The display unit 662 has multiple displays. The conductive film 663 of the element is arranged in a matrix. It has a reflective function and functions as a reflective electrode for the liquid crystal element 640, which will be described later.

[0277] Furthermore, as shown in Figure 17, the conductive film 663 has an opening. Moreover, the base is greater than the conductive film 663. The plate 651 side has a light-emitting element 660. Light from the light-emitting element 660 opens the conductive film 663. It is ejected towards the substrate 661 through the opening.

[0278] <Example of cross-sectional configuration> Figure 18 shows a portion of the area including the FPC672 and circuit 659 of the display panel illustrated in Figure 17. When a portion of the region including the and a portion of the region including the display unit 662 are cut, the cross-sections are Here is an example.

[0279] The display panel has an insulating film 620 between substrate 651 and substrate 661. Between the insulating film 620, there is a light-emitting element 660, transistor 601, transistor 605, It has a lunger 606, a colored layer 634, etc. Also, between the insulating film 620 and the substrate 661, It has a crystal element 640, a colored layer 631, etc. Also, the substrate 661 and the insulating film 620 are bonded together by an adhesive layer 641. The substrate 651 and the insulating film 620 are bonded via the adhesive layer 642.

[0280] Transistor 606 is electrically connected to the liquid crystal element 640, and transistor 605 emits light. It is electrically connected to element 660. Transistors 605 and 606 are both Since they are formed on the substrate 651 side surface of the insulating film 620, these are formed using the same process It can be manufactured.

[0281] The substrate 661 has a colored layer 631, a light-shielding film 632, an insulating film 621, and a liquid crystal element 640. A conductive film 613, an orientation film 633b, an insulating film 617, etc., which function as conductive electrodes are provided. The insulating film 617 functions as a spacer to maintain the cell gap of the liquid crystal element 640. do.

[0282] On the substrate 651 side of insulating film 620, there are insulating films 681, 682, 683, and insulating film. Insulating layers such as 684 and insulating film 685 are provided. A portion of the insulating film 681 is each trace It functions as a gate insulating layer for the inverter. Insulating film 682, insulating film 683, and insulating film 68 4 is provided covering each transistor. Also, insulating film 685 covers insulating film 684. A feature is provided. The insulating film 684 and insulating film 685 function as planarization layers. In this case, insulating film 682, insulating film 683, and insulating film are used as insulating layers to cover transistors, etc. This example shows the case where there are three layers of film 684, but it is not limited to this and can also be the case with four or more layers. It is fine, it may be a single layer or two layers. Also, the insulating film 684 that functions as a planarizing layer is If it's not necessary, it doesn't need to be provided.

[0283] Furthermore, transistors 601, 605, and 606 are partially G A conductive film 654 that functions as a source, and a conductive film 65 that partially functions as a source or drain. 2. It has a semiconductor film 653. Here, multiple layers obtained by processing the same conductive film are present. They have the same hatching pattern.

[0284] The liquid crystal element 640 is a reflective liquid crystal element. The liquid crystal element 640 consists of a conductive film 635 and a liquid crystal layer 6 12. It has a laminated structure in which conductive films 613 are stacked. Also, the conductive film 635 is on the substrate 651 side. A conductive film 663 that reflects visible light is provided in contact with the opening 655. It has. Furthermore, conductive films 635 and 613 contain a material that transmits visible light. Also, liquid crystal layer An alignment film 633a is provided between 612 and the conductive film 635, and the liquid crystal layer 612 and the conductive film 613 An alignment film 633b is provided in between. Furthermore, a polarizing plate 656 is provided on the outer surface of the substrate 661. It has.

[0285] In the liquid crystal element 640, the conductive film 663 has the function of reflecting visible light, and the conductive film 613 is It has the function of transmitting visible light. Light incident from the substrate 661 side is polarized by the polarizing plate 656. Light is emitted, passes through the conductive film 613 and the liquid crystal layer 612, and is reflected by the conductive film 663. The conductive film 612 and conductive film 613 are passed through again and reach the polarizing plate 656. At this time, conductive film 66 The orientation of the liquid crystal is controlled by the voltage applied between the conductive film 635 and the conductive film 613, and the light Optical modulation can be controlled. That is, the intensity of light emitted through the polarizer 656. This allows for control over the light. Furthermore, light outside of a specific wavelength range is absorbed by the colored layer 631. As a result, the extracted light will, for example, be red in color.

[0286] The light-emitting element 660 is a bottom-emission type light-emitting element. The light-emitting element 660 is an insulating film A laminated structure in which conductive film 643, EL layer 644, and conductive film 645b are stacked in that order from the 620 side. It has a structure. Furthermore, a conductive film 645a is provided covering the conductive film 645b. Conductive film 64 5b contains a material that reflects visible light, and conductive films 643 and 645a transmit visible light. Includes materials. The light emitted by the light-emitting element 660 is transmitted through the colored layer 634, the insulating film 620, and the aperture 655. It is then injected towards the substrate 661 via the conductive film 613, etc.

[0287] Here, as shown in Figure 18, a conductive film 635 that transmits visible light is provided in the aperture 655. It is preferable that this is done so that even in the region that overlaps with the opening 655, the other regions Similarly, because the liquid crystals align, liquid crystal alignment defects occur at the boundaries of these regions, resulting in unintended consequences. This can suppress the leakage of light.

[0288] Here, a linear polarizing plate may be used as the polarizing plate 656 placed on the outer surface of the substrate 661. However, circular polarizers can also be used. Examples of circular polarizers include linear polarizers and 1 / 4 wavelength polarizers. A system with stacked phase difference plates can be used. This suppresses external light reflection. Yes, it is possible. Also, depending on the type of polarizing plate, the cell gap of the liquid crystal element used in the liquid crystal element 640 By adjusting the orientation, drive voltage, etc., the desired contrast can be achieved. stomach.

[0289] Furthermore, an insulating film 647 is provided on the insulating film 646 that covers the edge of the conductive film 643. The edge film 647 acts as a spacer to prevent the insulating film 620 and the substrate 651 from coming into excessively close proximity. It also functions as a shielding mask (metal mask) for the EL layer 644 and conductive film 645a. When forming using ), in order to suppress contact between the shielding mask and the surface to be formed It may also function as a spacer. Note that the insulating film 647 may be omitted if it is not needed. It's fine.

[0290] Either the source or drain of transistor 605 is connected to the light-emitting element 66 via the conductive film 648. It is electrically connected to the conductive film 643 of type 0.

[0291] Either the source or drain of transistor 606 is connected to the conductive film 663 via the connector 607. They are electrically connected. Conductive film 663 and conductive film 635 are provided in contact with each other, and they are electrically connected. They are connected by air. Here, the connection part 607 is connected through an opening provided in the insulating film 620. This is the portion that connects the conductive layers provided on both sides of the insulating film 620.

[0292] A connecting portion 604 is provided in the area where substrates 651 and 661 do not overlap. 604 is electrically connected to FPC672 via connection layer 649. Connection part 604 It has the same configuration as the connection part 607. The upper surface of the connection part 604 is the same as the conductive film 635. The conductive layer obtained by processing the conductive film is exposed. As a result, the connection part 604 and the FPC 672 can be electrically connected via the connecting layer 649.

[0293] A connecting portion 687 is provided in a portion of the area where the adhesive layer 641 is provided. In 7, a conductive layer obtained by processing the same conductive film as conductive film 635 and conductive film 613 A portion is electrically connected by connector 686. Therefore, it is formed on the substrate 661 side. The conductive film 613 receives signals input from the FPC 672 connected to the substrate 651 side. The potential can be supplied via the connection part 687.

[0294] For example, conductive particles can be used as the connector 686. This can be achieved by using a material in which the surface of particles such as organic resin or silica is coated with a metal material. It is possible. Using nickel or gold as the metallic material is preferable because it can reduce contact resistance. Particles coated with two or more metal materials in layers, such as nickel coated with gold, are used. It is preferable that the connecting body 686 be made of a material that is elastically deformable or plastically deformable. It is preferable that this is the case. At this time, the conductive particle connector 686 is as shown in Figure 18. It may take on a shape that is flattened in the vertical direction. This is done so that the connector 686 and the electrical This increases the contact area with the conductive layer being connected, reducing contact resistance and preventing connection failures. This can help prevent malfunctions from occurring.

[0295] It is preferable that the connecting body 686 be positioned so as to be covered by the adhesive layer 641. For example, cured The connector 686 can be dispersed in the previous adhesive layer 641.

[0296] Figure 18 shows an example of circuit 659 in which transistor 601 is provided. .

[0297] Figure 18 shows examples of transistors 601 and 605, in which channels are formed. A configuration is applied in which the semiconductor film 653 is sandwiched between two gates. One of the gates is The other gate is connected to the conductive film 654 via the insulating film 682, which overlaps with the semiconductor film 653. It is composed of 623. With this configuration, the threshold voltage of the transistor The pressure can be controlled. In this case, two gates are connected and the same signal is supplied to them. The transistor may be driven by supplying power to it. Such a transistor may be driven by other transistors. Compared to a DISTRA, it is possible to increase the field-effect mobility and increase the on-current. This makes it possible. As a result, it is possible to create circuits that can be driven at high speed. Furthermore, the circuit section This makes it possible to reduce the occupied area by using transistors with high on-current. So, even if the number of wires increases when the display panel is made larger or higher resolution, each wire This makes it possible to reduce signal delays and suppress display inconsistencies.

[0298] Note that the transistor in circuit 659 and the transistor in display unit 662 are the same. The structure may be any. Also, all the transistors in circuit 659 have the same structure. Alternatively, a combination of transistors with different structures may be used. Also, the display unit 6 The multiple transistors in 62 may all have the same structure, or they may have different structures. The generators may be used in combination.

[0299] At least one of the insulating films 682 and 683 covering each transistor is resistant to water and hydrogen. It is preferable to use a material that does not easily diffuse impurities. That is, insulating film 682 or The insulating film 683 can function as a barrier film. With this configuration, This makes it possible to effectively suppress the diffusion of impurities from the outside into the transistor. This enables the creation of highly reliable display panels.

[0300] On the substrate 661 side, an insulating film 621 is provided covering the colored layer 631 and the light-shielding film 632. The insulating film 621 may also function as a planarization layer. Therefore, since the surface of the conductive film 613 can be made approximately flat, the orientation state of the liquid crystal layer 612 can be made uniform. .

[0301] An example of a method for manufacturing the display panel 600 will be described. For example, a support having a release layer A conductive film 635, a conductive film 663, and an insulating film 620 are formed sequentially on the plate, and then a transient After forming the transistor 605, transistor 606, light-emitting element 660, etc., an adhesive layer 642 is used The substrate 651 and the support substrate are bonded together. Then, the release layer and the insulating film 620, and the release layer and the conductive film are bonded together. The support substrate and the release layer are removed by peeling at each interface of the film 635. Separately, a substrate with a colored layer 631, a light-shielding film 632, a conductive film 613, etc., pre-formed on it. Prepare 661. Then drop liquid crystal onto substrate 651 or substrate 661 and onto adhesive layer 641. By bonding substrates 651 and 661 together, the display panel 600 can be manufactured. Cut.

[0302] As the release layer, a material that causes delamination at the interface between the insulating film 620 and the conductive film 635 is appropriately selected. This is possible. In particular, a layer containing a high-melting-point metal material such as tungsten as a release layer is used. Layers containing an oxide of the metal material are laminated and used, and as the insulating film 620 on the release layer, silica nitride It is preferable to use a layer made by stacking multiple layers of materials such as silicon oxide, silicon nitride, or silicon nitride. Using a high-melting-point metal material for the delamination layer increases the formation temperature of subsequent layers. This makes it possible to reduce the concentration of impurities and realize a highly reliable display panel.

[0303] As the conductive film 635, an oxide or nitride such as a metal oxide or metal nitride is used. Preferably, when using metal oxides, hydrogen, boron, phosphorus, nitrogen, and others. At least one of the impurity concentration and oxygen deficiency amount is present in the semiconductor layer used in the transistor. The material that has been improved in comparison should be used for the conductive film 635.

[0304] <About each component> The following describes each of the components shown above. Note that the functions shown in the previous embodiment are different from those described above. Descriptions of configurations with similar functionality will be omitted.

[0305] [Adhesive layer] The adhesive layer can be a photocuring adhesive such as an ultraviolet-curing type, a reaction-curing adhesive, or a thermosetting adhesive. Various types of curing adhesives, such as anaerobic adhesives, can be used. Poxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide Resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, EV Examples include A (ethylene vinyl acetate) resin. In particular, epoxy resins have high moisture permeability. Low-cost materials are preferred. A two-part resin mixture may also be used. Furthermore, adhesive sheets, etc., may be used. It's okay to be there.

[0306] Furthermore, the above resin may contain a desiccant. For example, an alkaline earth metal oxide (oxidation This method uses substances that adsorb moisture through chemical adsorption, such as calcium or barium oxide. It is possible to absorb moisture through physical adsorption, such as with zeolite or silica gel. A desiccant may be used. If a desiccant is included, impurities such as moisture will penetrate the element. This is preferable because it can suppress the occurrence of certain behaviors and improve the reliability of the display panel.

[0307] Furthermore, by mixing fillers or light-scattering materials with a high refractive index into the above resin, light extraction can be achieved. Efficiency can be improved. For example, titanium dioxide, barium oxide, zeolite, zirconium oxide. Conium and the like can be used.

[0308] [Connection layer] The connecting layer is an anisotropic conductive film (ACF). (Vital Film) and anisotropic conductive paste (ACP: Anisotropic Co You can use inductive pastels, etc.

[0309] [Colored layer] Materials that can be used for the colored layer include metal materials, resin materials, pigments, or dyes. Examples include resin materials.

[0310] [Light blocking layer] Materials that can be used as a light-shielding layer include carbon black, titanium black, and gold. Examples include metal oxides, metal oxides, and composite oxides containing solid solutions of multiple metal oxides. The light-shielding layer is It may be a film containing a resin material, or a thin film of an inorganic material such as a metal. Furthermore, a laminated film containing the material of the colored layer can be used as the light-shielding layer. For example, a light of a certain color A film containing a material used for a colored layer that transmits light, and a material used for a colored layer that transmits light of other colors. A laminated structure with a film containing the material can be used. By using the same material for the colored layer and the light-shielding layer, This is preferable because it allows for the standardization of equipment and simplifies the process.

[0311] The above is a description of each component.

[0312] <Example of manufacturing method> This section describes an example of a method for manufacturing a display panel using a flexible substrate.

[0313] This includes display elements, circuits, wiring, electrodes, optical components such as colored layers and light-shielding layers, and insulating layers, etc. The layers that include these will be collectively called the element layer. For example, the element layer includes display elements and the display In addition to the display elements, there are also wiring that electrically connects to the display elements, and transistors used in pixels and circuits. It may be equipped with an element.

[0314] Furthermore, at the stage when the display element is completed (the manufacturing process is finished), the element layer is supported A material that is flexible and holds its shape will be called a substrate. For example, a substrate may have a thickness This also includes extremely thin films, etc., ranging in thickness from 10 nm to 300 μm.

[0315] A typical method for forming an element layer on a substrate that is flexible and has an insulating surface is as follows: There are two methods listed below. One is to form the element layer directly on the substrate. Another method involves forming an element layer on a support substrate different from the substrate, and then peeling the element layer from the support substrate. This is a method of transferring the element layer onto the substrate. Although not explained in detail here, the two methods described above... In addition to the method, an element layer is formed on a non-flexible substrate, and the substrate is thinned by polishing or the like. Another method is to give it flexibility by doing so.

[0316] If the material constituting the substrate has heat resistance to the heat generated during the device layer formation process, Forming the element layer directly on the substrate is preferable because it simplifies the process. When the element layer is formed with the element fixed to the support substrate, transport within and between devices becomes easier. It is preferable because it makes things easier.

[0317] Furthermore, when using a method in which the element layer is formed on a support substrate and then transferred to the substrate, first the support A release layer and an insulating layer are laminated on the substrate, and an element layer is formed on the insulating layer. Subsequently, a support substrate The element layer is separated from the support substrate and transferred to the substrate. At this time, the interface between the support substrate and the delamination layer, A material should be selected that causes delamination at the interface between the release layer and the insulating layer, or within the release layer itself. In this method, by using heat-resistant materials for the support substrate and release layer, when forming the element layer... This allows for an increase in the upper limit of the temperature required, enabling the formation of an element layer with more reliable elements. Therefore, it is preferable.

[0318] For example, the release layer may include a layer containing a high-melting-point metal material such as tungsten, and an acid of the metal material. Layers containing a compound are stacked and used, and silicon oxide, silicon nitride, as the insulating layer on the release layer. It is preferable to use layers made by stacking multiple silicon oxide nitride, silicon nitride oxide, etc.

[0319] Methods for separating the element layer from the support substrate include applying mechanical force and removing the delamination layer. Examples include chipping or allowing liquid to penetrate the separation interface. Alternatively, the difference in thermal expansion between the two layers forming the delamination interface can be used for heating or cooling. Further peeling may be performed.

[0320] Furthermore, if delamination is possible at the interface between the support substrate and the insulating layer, a delamination layer may not be necessary.

[0321] For example, glass is used as the support substrate, and an organic resin such as polyimide is used as the insulating layer. This can be done by locally heating a portion of the organic resin using laser light or the like, This is caused by physically cutting or penetrating a portion of the organic resin with a sharp object, thereby preventing delamination. A starting point may be formed, and peeling may be performed at the interface between the glass and the organic resin. Alternatively, the above organic resin and Therefore, using photosensitive materials is preferable because it makes it easier to create shapes such as openings. Furthermore, the laser light mentioned above is, for example, light in the wavelength range from visible light to ultraviolet light. Preferably, light with a wavelength of 200 nm or more and 400 nm or less, preferably with a wavelength of 2 Light with wavelengths between 50 nm and 350 nm can be used. In particular, exci with a wavelength of 308 nm is available. Using a male laser is preferable due to its superior productivity. Furthermore, the third high of Nd:YAG lasers... Solid-state UV lasers, such as UV lasers with a wavelength of 355 nm (which are harmonic UV lasers), are also known as semiconductor UV lasers. You may also use (u).

[0322] Alternatively, a heating layer is provided between the support substrate and an insulating layer made of organic resin, and the heating layer is heated. This may cause delamination at the interface between the heating layer and the insulating layer. The heating layer is a layer that allows current to flow. Materials that generate heat when flowing, materials that generate heat when absorbing light, and materials that generate heat when a magnetic field is applied. Various materials can be used, such as materials that generate heat. For example, as a heating layer, Semiconductors, metals, and insulators can be selected and used.

[0323] Furthermore, in the method described above, the insulating layer made of organic resin is used as a substrate after peeling. It is possible.

[0324] The above describes the method for manufacturing a flexible display panel.

[0325] This embodiment can be appropriately combined with other embodiments described herein, at least in part. They can be implemented together.

[0326] (Embodiment 4) This embodiment describes a metal oxide, which is one aspect of the present invention.

[0327] A metal oxide according to one aspect of the present invention is In (indium) and M (where M is Al, Ga, Y, and represents Sn. ) and Zn (zinc) are present. In particular, M is Ga (gallium). This is preferable. In the following explanation, M will be described as Ga.

[0328] Here, silicon (Si) and boron (B) are impurities in the In-Ga-Zn oxide. Alternatively, we will explain the case where carbon (C) is present.

[0329] <Calculation Model and Method> First, a model of the amorphous state of In-Ga-Zn oxide without a reference impurity. Then, a model with one Si atom added to the standard model, and a model with one B atom added. Calculations were performed using the above model, and a model with one additional carbon atom.

[0330] Specifically, the standard crystal model is shown in Figure 19(A): [In]:[Ga]: Model 700 with [Zn]:[O]=1:1:1:4 was used. Note that Model 700 is 1 It was composed of 12 atoms.

[0331] Furthermore, In-M-Zn oxides having a CAC structure are not strictly speaking in an amorphous state. i. On the other hand, In-M-Zn oxides having a CAC structure are In-M-Zn oxides consisting of a CAAC structure It has lower crystallinity than M-Zn oxide. Therefore, the influence of the crystal structure is reduced, and the bonding state is confirmed. For convenience, an amorphous state model was used.

[0332] Furthermore, in Model 700, Si atoms, B atoms, or C atoms are present as impurities. For example, in the interstitial sites of Model 700, one Si atom, one B atom, or one C atom Atoms were arranged. Note that for Model 700, which is composed of 112 atoms, one impurity was added. Added. Therefore, the impurity concentration in the model is approximately 7 × 10 20 [pcs / cm 3 This corresponds to ].

[0333] Figure 20(A) shows that when Si is present as an impurity, one Si atom is equivalent to four other Si atoms. Figure 20 shows local structure 702, extracted from the vicinity of Si in the model bonded to an O atom. (C) is a model in which one Si atom is bonded to three O atoms and one Ga atom. The local structure 704, extracted from the vicinity of Si, is shown.

[0334] When B is present as an impurity, one B atom is bonded to three O atoms in a model Figure 21(A) shows the local structure 706 extracted from the vicinity of the B atom, and the local structure of the vicinity of the B atom from the model. Figure 21(C) shows the local structure 708 extracted from the surrounding area.

[0335] When C is present as an impurity, one C atom is replaced by two O atoms and one Figure 22(A) shows the local structure 710, extracted from the vicinity of the C atom in a model bonded to a Ga atom. From a model in which one carbon atom is bonded to one oxygen atom and one galangal atom, the carbon atom Figure 22(C) shows the local structure 712 extracted from the vicinity.

[0336] The specific calculation details are shown below. Furthermore, the atomic relaxation calculation uses the first-principles electronic state calculation package. -VASP(Vienna ab initio simulation packa The calculation was performed using ge). The calculation conditions are shown in the table below.

[0337] [Table 1]

[0338] <About Density of States> Figure 19(B) shows the density of states diagram in Figure 19(A). Note that Figure 19(B) is a diagram of the fe The Lumi level (the energy of the highest level occupied by electrons) is 0 eV on the horizontal axis. It was adjusted accordingly. From Figure 19(B), electrons occupy up to the upper end of the valence band, and within the gap... We were able to confirm that no such position exists.

[0339] Furthermore, the density of states diagram when one Si atom is added as an impurity is shown in Figure 20(B), and This is shown in Figure 20(D). Note that Figure 20(B) shows the local structure 702 shown in Figure 20(A). The density of states diagram for the case where it is present is shown. Figure 20(D) shows the local structure 704 shown in Figure 20(C). A density of states diagram is shown for cases where [the condition] is present.

[0340] In both Figure 20(B) and Figure 20(D), when Si atoms are introduced, the Fermi level conducts. It was found to be located within the band. Therefore, the Si atoms are located in the In-Ga-Zn oxide. This suggests that carriers are generated (or, in other words, converted to n-type).

[0341] Furthermore, the density of states diagram when one B atom is added as an impurity is shown in Figure 21(B), and This is shown in Figure 21(D). Note that Figure 21(B) shows the local structure 706 shown in Figure 21(A). The density of states diagram for the case where it is present is shown. Figure 21(D) shows the local structure 708 shown in Figure 21(C). A density of states diagram is shown for cases where [the condition] is present.

[0342] In both Figure 21(B) and Figure 21(D), when B atoms are introduced, the Fermi level becomes the conduction band. It was found to be located inside. Therefore, the B atom is located inside the In-Ga-Zn oxide. It was suggested that a rear element is generated (or, to put it another way, n-formed).

[0343] Furthermore, Figure 22(B) shows the density of states diagram when one C atom is added as an impurity, and This is shown in Figure 22(D). Note that Figure 22(B) shows the local structure 710 shown in Figure 22(A). The density of states diagram for this case is shown. Figure 22(D) shows the local structure 712 shown in Figure 22(C). A state density diagram is shown for cases where this is the case.

[0344] In both Figure 22(B) and Figure 22(D), the presence of carbon atoms causes the Fermi level to move into the conduction band. It was found to be located inside. Therefore, the C atom is located inside the In-Ga-Zn oxide. It was suggested that a rear element is generated (or, to put it another way, n-formed).

[0345] This is because the electronegativity of Si and B is closer to that of In, Ga, and Zn than that of O. Si atoms and B atoms exist as cations in In-Ga-Zn oxide. The probability is high. Therefore, it is presumed that carriers will be generated.

[0346] Furthermore, the electronegativity of C is intermediate between that of In, Ga, Zn, and O, so it is compatible with metals and O. Although bonding occurs, it is presumed that it primarily exists as a cation.

[0347] Furthermore, Si, B, and C atoms are more abundant than In, Ga, and Zn atoms. The bond with the O atom is strong. Therefore, when Si, B, and C atoms are mixed in, The O atom that was bonded to the In atom, Ga atom, and Zn atom, is now bonded to the Si atom, B atom, and It is taken away by the carbon atom. Therefore, it is presumed that a deep energy level corresponding to an oxygen deficiency is formed. .

[0348] The configurations and methods shown in this embodiment can be appropriately combined with the configurations and methods shown in other embodiments. They can be used together. [Examples]

[0349] In this example, a metal oxide according to one aspect of the present invention is formed on a substrate using various measurement methods. The results of the measurements performed on this subject will be explained. In this example, sample 1A and test Sample 1B, Sample 1C, Sample 1D, Sample 1E, Sample 1F, Sample 1G, Sample 1H, and Sample 1 I created J.

[0350] <Sample composition and preparation method> In the following, Sample 1A, Sample 1B, Sample 1C, Sample 1D, Sample 1E, according to one embodiment of the present invention, Samples 1F, 1G, 1H, and 1J will be described. Sample 1A to Sample 1 J comprises a substrate and a metal oxide on the substrate.

[0351] Samples 1A to 1J represent the temperature and oxygen flow rate during metal oxide film formation, respectively. The ratios were prepared under different conditions. The table below shows the results of metal oxide film formation in samples 1A to 1J. This shows the temperature and oxygen flow rate ratio.

[0352] [Table 2]

[0353] Next, the method for preparing each sample will be described.

[0354] First, a glass substrate was used as the substrate. Subsequently, using a sputtering apparatus, a 100-nm-thick In-Ga-Zn oxide was formed as a metal oxide on the substrate. The film-forming conditions were such that the pressure inside the chamber was 0.6 Pa, and a metal oxide target (In :Ga:Zn = 4:2:4.1 [atomic ratio]) was used for the target. Also, 2500 W of AC power was supplied to the metal oxide target installed inside the sputtering apparatus to form the metal oxide film.

[0355] Note that, as the conditions for forming the metal oxide film, the film-forming temperature and the oxygen flow rate shown in the above table were used to obtain Samples 1A to 1J.

[0356] Through the above steps, Samples 1A to 1J of this example were prepared.

[0357] <Analysis by X-ray Photoelectron Spectroscopy> In this section, the results of X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectroscopy) measurements performed on Sample 1A, Sample 1D, and Sample 1J will be described. The Quantera SXM manufactured by PHI was used. Also, the conditions were such that the X-ray source was monochromatic Al (1486.6 eV), the detection area was a circular area with a diameter of 100 μm, and the detection depth was 4 nm to 5 nm when the extraction angle was 45°. Also, the measurement spectrum was detected using the In3d5 / 2 peak, Ga3d peak, Zn3p peak, and O1s peak as correction standards respectively. Based on the detected peaks, the ratio of each atom [atomic %] was calculated.

[0358] Fig. 52 shows the results of XPS analysis. The pie chart shown in Fig. 52 was normalized with the atomic ratio of In being 4.

[0359] From Fig. 52, when the atomic ratio of In was normalized to an integer, the atomic ratios of Ga and Zn both did not become integers. That is, it was found that when the atomic ratio of In was normalized to an integer, the atomic ratios of Ga and Zn became non-integers.

[0360] Also, in Sample 1A, Sample 1D, and Sample 1J, the atomic ratio of Ga in the formed metal oxide was found to be smaller than the atomic ratio of Ga in the metal oxide used for the target. For example, in Sample 1J, the atomic ratio of Zn in the formed metal oxide was [Zn]=3.21, which was found to be smaller than the atomic ratio of Zn in the metal oxide used for the target, which is [Zn]=4.1. Also, the atomic ratio of Zn in the formed metal oxide was [Zn]=3.70 in Sample 1A and [Zn =3.62 in Sample 1D, which was found to be smaller. Therefore, in Sample 1J with the highest film formation temperature, a tendency for a lower proportion of Zn in the formed metal oxide was confirmed. This is thought to be due to the volatilization of Zn by heat-assisted film formation.

[0361] <Analysis by X-ray diffraction> In this section, the results of X-ray diffraction (XRD) measurement of the metal oxide on the glass substrate will be described. As the XRD apparatus, D8 ADVANCE manufactured by Bruker was used. Also, the conditions were θ / 2θ scanning by the Out-of-plane method, with a scanning range of 15 deg. to 50 deg. and a step width of 0 deg. .02 degrees, and the scanning speed was set to 3.0 degrees per minute.

[0362] Fig. 23 shows the results of measuring the XRD spectrum using the Out-of-plane method. .

[0363] The XRD spectrum shown in Fig. 23 shows that by increasing the substrate temperature during film formation or increasing the ratio of the oxygen gas flow rate during film formation, the peak intensity near 2θ = 31° increases. Also, the peak near 2θ = 31° is derived from a crystalline IGZO compound (also referred to as CAAC-IGZO) oriented with its c-axis in a direction substantially perpendicular to the formed surface or the upper surface. It has been found that. Furthermore, in the XRD spectrum shown in Fig. 23, no distinct peak appeared as the substrate temperature during film formation was lower or the oxygen gas flow rate ratio was smaller. Therefore, it was found that in samples with a low substrate temperature during film formation or a small oxygen gas flow rate ratio, no orientation in the a-b plane direction and the c-axis direction of the measurement region was observed. It has been found that. .

[0364] Also, in this section, the results of observing and analyzing Sample 1A, Sample 1D, and Sample 1J using HAADF (High-Angle Annular Dark Field)-STEM (Scanning Transmission Electron Microscope) will be described (hereinafter, the images obtained by HAADF-STEM are also referred to as TEM images). Furthermore, in this section, Sample 1A, Sample 1D, and Sample 1J were irradiated with an electron beam having a probe diameter of 1 nm. It has been found that. .

[0365] <TEM Image and Electron Diffraction> In this section, the results of observing and analyzing Sample 1A, Sample 1D, and Sample 1J using HAADF (High-Angle Annular Dark Field)-STEM (Scanning Transmission Electron Microscope) will be described (hereinafter, the images obtained by HAADF-STEM are also referred to as TEM images). e Annular Dark Field)-STEM(Scanning Tran smission Electron Microscope) will be described (hereinafter, the images obtained by HAADF-STEM are also referred to as TEM images). 析した結果について説明する(以下、HAADF-STEMによって取得した像は、TE M像ともいう。)。

[0366] Also, in this section, Sample 1A, Sample 1D, and Sample 1J were irradiated with an electron beam having a probe diameter of 1 nm. By irradiating with a nanobeam electron beam, an electron diffraction pattern was obtained. I will explain about that.

[0367] Planar TEM images were observed using spherical aberration correction. Furthermore, HAADF-STE was used. M-images were captured using the JEM-ARM200F atomic resolution analytical electron microscope manufactured by JEOL Ltd. The procedure was performed by irradiating the sample with an electron beam having an acceleration voltage of 200 kV and a beam diameter of approximately 0.1 nmφ.

[0368] Furthermore, the electron diffraction pattern was observed from the 0-second position to the 35-second position while irradiating with an electron beam. This was done while moving at a constant speed.

[0369] Figure 24(A) shows a cross-sectional TEM image of sample 1A, and Figure 24(B) shows the electron diffraction pattern of sample 1A. The results obtained are shown. Figure 24(C) shows a cross-sectional TEM image of sample 1D, and Figure 24(D) shows the sample The results of obtaining the electron diffraction pattern of 1D are shown. Figure 24(E) shows the cross-sectional TEM image of sample 1J. Figure 24(F) shows the electron diffraction pattern obtained for sample 1J.

[0370] Here, for example, for CAAC-OS having InGaZnO4 crystals, parallel to the sample plane When an electron beam with a probe diameter of 300 nm is incident on the InGaZnO4 crystal, (009 It has been observed that diffraction patterns containing spots originating from the ) plane can be seen. CAAC-OS has c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the surface to be formed or the upper surface. It can be seen that... On the other hand, for the same sample, a probe with a diameter of 300 nm perpendicular to the sample surface... When an electron beam is incident on it, a ring-shaped diffraction pattern is observed. In other words, CAAC-O S shows that the a-axis and b-axis do not have orientation.

[0371] Furthermore, metal oxides having microcrystalline structures (especially when they have functions equivalent to semiconductors, nano Let it be a crystalline oxide semiconductor. Hereafter, n This is called c-OS. ) Use an electron beam with a large probe diameter (e.g., 50 nm or more). When electron diffraction is performed, a diffraction pattern resembling a halo pattern is observed. Also, when microcrystals are... For metal oxides containing these materials, an electron beam with a small probe diameter (e.g., less than 50 nm) is used. When electron diffraction is performed, bright spots are observed. Also, in metals with microcrystalline structures... When nanobeam electron diffraction is performed on oxides, a ring-shaped region of high brightness is observed. In some cases, a region may be observed. Furthermore, in some cases, multiple bright spots may be observed within a ring-shaped region. ru.

[0372] As shown in Figure 24(A), the cross-sectional TEM observation results of sample 1A revealed that it contains microcrystals (nano A crystal (hereinafter also referred to as nc) was observed. Also, as shown in Figure 24(B) The electron diffraction pattern results for sample 1A showed high brightness in a circular (ring-shaped) pattern. A wide area was observed. Additionally, multiple spots were observed within a ring-shaped region.

[0373] As shown in Figure 24(C), sample 1D exhibits a CAAC structure, and the results of cross-sectional TEM observation show that it has a CAAC structure. Microcrystals were observed. Also, as shown in Figure 24(D), electron diffraction patterns were observed for sample 1D. The results of the turn showed that a region of high brightness was observed in a circular (ring-shaped) pattern. Multiple spots were observed in the ring-shaped region. In addition, spots originating from the (009) plane were observed. A slight diffraction pattern was also observed.

[0374] On the other hand, sample 1J, as shown in Figure 24(E), has a CAAC structure, as determined by cross-sectional TEM observation. A clearly visible layered arrangement was observed in sample 1J. The electron diffraction pattern results clearly show spots originating from the (009) plane. Ta.

[0375] Furthermore, the features observed in the cross-sectional TEM images and planar TEM images described above are in the metal. This represents a one-sided view of the structure of oxides.

[0376] Next, sample 1A was illuminated with an electron beam with a probe diameter of 1 nm (also called a nanobeam electron beam). Figure 25 shows the results of obtaining the electron diffraction pattern by irradiating the device.

[0377] In the planar TEM image of sample 1A shown in Figure 25(A), black dots a1, a2, and a3 The electron diffraction patterns shown at black dots a4 and a5 were observed. The observation of the electron beam involves moving it at a constant speed from the 0-second position to the 35-second position while irradiating it with an electron beam. The results for sunspot a1 are shown in Figure 25(C), and the results for sunspot a2 are shown in Figure 25(D). The results for sunspot a3 are shown in Figure 25(E), the results for sunspot a4 are shown in Figure 25(F), and the results for sunspot a5 are shown in Figure 25(E). This is shown in 25(G).

[0378] From Figures 25(C), 25(D), 25(E), 25(F), and 25(G), A ring-shaped region of high brightness was observed. Additionally, multiple spots were observed within this ring-shaped region. Done.

[0379] Furthermore, in the cross-sectional TEM image of sample 1A shown in Figure 25(B), black dots b1, b2, and black Observe the electron diffraction patterns shown at points b3, b4, and b5. Result for b1 The results of the black dot b1 are shown in FIG. 25(H), the results of the black dot b2 are shown in FIG. 25(I), the results of the black dot b3 are shown in FIG. 25(J), the results of the black dot b4 are shown in FIG. 25(K), and the results of the black dot b5 are shown in FIG. 25(L).

[0380] From FIGS. 25(H), FIGS. 25(I), FIGS. 25(J), FIGS. 25(K), and FIGS. 25(L), a region with high brightness was observed in a ring shape. Also, a plurality of spots were observed in the ring-shaped region was observed.

[0381] That is, it was found that Sample 1A has an nc structure and clearly different properties from both the amorphous metal oxide and the single-crystal structure metal oxide.

[0382] From the above, the electron diffraction patterns of Sample 1A and Sample 1D have a region with high brightness in a ring shape and a plurality of bright spots in the ring region. Therefore, it was found that Sample 1A is a metal oxide showing polycrystals and has no orientation in the planar direction and the cross-sectional direction direction. Also, it was found that Sample 1D is a mixture of an nc structure and a CAAC structure was found. was found.

[0383] On the other hand, the electron diffraction pattern of Sample 1J has spots resulting from the (009) plane of the InGaZnO4 crystal Therefore, it was found that Sample 1J has c-axis orientation and the c-axis is oriented in a direction substantially perpendicular to the formed surface or the upper surface.

[0384] <Image analysis of TEM image> In this section, the results of observing and analyzing Samples 1A, 1C, 1D, 1F, and 1G by HAADF-ST EM will be described.

[0385] This section describes the results of image analysis of planar TEM images. Note that planar TEM images are obtained using spherical emission control. Observations were made using the difference correction function. Note that a JEOL Ltd. atomic TEM was used to acquire the planar TEM images. Using a high-resolution analytical electron microscope JEM-ARM200F, with an acceleration voltage of 200kV and a beam diameter... The procedure was performed by irradiating with an electron beam of approximately 0.1 nm in diameter.

[0386] Figure 26 shows the planar arrangement of sample 1A, sample 1C, sample 1D, sample 1F, sample 1G, and sample 1J. These are images obtained by image processing of planar TEM images and surface TEM images. Note that the table in Figure 26 is... The left figure shows a planar TEM image, and the right figure shows the image obtained by image processing the planar TEM image from the left figure.

[0387] This section describes image processing and image analysis methods. First, as an image processing method, as shown in Figure 26... The planar TEM image is converted to a Fast Fourier Transform (FFT). An FFT image was obtained by processing it using ORM. Next, the obtained FFT image was processed at 2.8nm. - 1 from 5.0nm -1 The masking process was performed while leaving the specified range. Next, the masked FFT was processed. The image is transformed using the Inverse Fast Fourier Transform (IFFT). The FFT filtered image was obtained by performing a ransform (processing).

[0388] As part of the image analysis, grid points were first extracted from the FFT filtered image. The extraction of grid points was performed as follows: The following procedure was followed: First, a process was performed to remove noise from the FFT filtered image. As a noise reduction process, the brightness in the radius range of 0.05 nm is averaged by the following formula. It became smooth.

[0389]

number

[0390] Here, S_Int(x,y) represents the smoothed brightness at coordinate (x,y), and r is This indicates the distance between coordinates (x,y) and coordinates (x',y'), where Int(x',y') is the distance between coordinates ( The brightness at x', y') is shown. Note that when r is 0, r was treated as 1 in the calculation.

[0391] Next, a search for lattice points was performed. The condition for a lattice point was all candidate lattice points within a radius of 0.22 nm. The coordinates with higher brightness were selected. Here, candidate grid points were extracted. Note that the radius is 0.22 Within the nm range, the frequency of false detections of grid points due to noise can be reduced. In TEM images, there is a constant distance between lattice points, so there are two or more lattices within a radius of 0.22 nm. It is unlikely that a dot is included.

[0392] Next, using the extracted grid point candidates as the center, extract the coordinates with the highest brightness within a radius of 0.22 nm. The grid point candidates were updated. The extraction of grid point candidates was repeated until no new grid point candidates appeared. The coordinates at that point were identified as grid points. Similarly, 0.22 nm from the identified grid points. By identifying new grid points at positions further away, grid points can be identified across the entire range. The determination was made. The multiple lattice points obtained are collectively called a lattice point group.

[0393] Next, regarding the method for deriving the angles of the hexagonal grid from the extracted grid point cloud, see Figure 27(A). Schematic diagrams shown in Figures 27(B) and 27(C), and flowcharts shown in Figure 27(D) Let's explain using a grid. First, define a reference grid point, and then define the six nearest grid points to it. The wires were then connected to form a hexagonal lattice (see Figures 27(A) and 27(D), step S101). Subsequently, the average distance from the reference grid point, which is the center point of the hexagonal grid, to each grid point, which is a vertex, is calculated. The average value R was derived. The calculated R was used as the distance to each vertex, and a regular six-point grid was formed with the reference grid point as the center. A polygon was formed (see Figure 27(D) step S102). At this time, each vertex of the regular hexagon The distances to the nearest neighboring grid point are distance d1, distance d2, distance d3, and distance d4 respectively. Let distances d5 and d6 be distances d5 and d6 (see Figures 27(B) and 27(D), step S103). Next, rotate the regular hexagon from 0° to 60° in 0.1° increments around its center point. The average displacement between the rotated regular hexagon and the hexagonal grid [D=(d1+d2+d3+d4+d5+d The mean deviation D was calculated (see Figure 27(D) step S104). We found the rotation angle θ of the regular hexagon when the value is minimized, and used it as the angle of the hexagonal grid (Figure 27(C) ), Figure 27(D) Step S105).

[0394] Next, within the observation range of the planar TEM image, the proportion of hexagonal grid angles that are 30° is highest. It was adjusted to be less. Here, the average value of the angles of the hexagonal grid in a radius of 1 nm. The following was calculated. Subsequently, the planar TEM image obtained through image processing was used to determine the hexagonal grid of the region. The angle was represented by color or shade. The image obtained by image processing is shown in Figure 26, which is a planar TEM image. The planar TEM image shown in Figure 26 is analyzed using the method described above, and according to the angle of the hexagonal grid... This is an image showing varying shades of gray. In other words, the image obtained by image processing a planar TEM image is the FF of the planar TEM image. In the T-filtered image, by color-coding specific wavenumber regions, each specific wavenumber region This is an image in which the orientation of the grid points has been extracted.

[0395] As shown in Figure 26, in samples 1A and 1D where nc is observed, the orientation of the hexagons is random. It was found that they are distributed in a mosaic pattern. Furthermore, a layered structure was observed in the cross-sectional TEM image. In sample 1J, regions where the hexagons are oriented in the same direction exist over a wide area of ​​several tens of nanometers. It was found that they were present. Sample 1D had random mosaic-like ncs and the same as sample 1J. It was found that there are regions where the direction is observed over a wide area.

[0396] Furthermore, as shown in Figure 26, the lower the substrate temperature during film formation, or the smaller the oxygen gas flow rate ratio, Areas where the orientation of the hexagons is random and distributed in a mosaic pattern tend to appear. I found out.

[0397] In this way, by performing image analysis on planar TEM images, the hexagonal grid of CAAC-OS can be analyzed. This makes it possible to evaluate boundaries where the angle changes.

[0398] Next, a Voronoi diagram was created from the grid point cloud of sample 1A. The Voronoi diagram shows the region containing the grid point cloud. This is a diagram divided into regions. Each grid point is closest to the region surrounding it. , the schematic diagrams shown in Figures 28(A), 28(B), 28(C), and 28(D), and The flowchart shown in Figure 28(E) will be used to explain in detail how to create a Voronoi diagram. .

[0399] First, the grid point cloud was extracted using the method shown in Figure 27 (Figures 28(A) and 28 (E) See step S111. Next, adjacent grid points were connected by line segments (Figure 28(B). See also Figure 28(E) step S112. Next, draw the perpendicular bisectors of each line segment. (See Figures 28(C) and 28(E), step S113.) Next, the three perpendicular bisectors The points where the lines intersect were extracted (see Figure 28(E) step S114). These points are called Voronoi points. Next, adjacent Voronoi points are connected by line segments (Figures 28(D) and 28(E)). See step S115.) At this point, the polygonal region enclosed by the line segments is called the Voronoi region. Using the above method, we were able to create a Voronoi diagram.

[0400] Figure 29 shows the results for samples 1A, 1C, 1D, 1F, 1G, and 1J. This shows the proportion of Voronoi regions whose shape is either a quadrilateral, a nonagon, or a octagon. The number of Voronoi regions in each sample that are either quadrangular, nonagonal, or octagonal in shape is shown. The table shows the proportion of each sample whose Voronoi region is either a quadrangular, nonagonal, or nonagonal.

[0401] As shown in Figure 29, sample 1J, which has high crystallinity, shows a high proportion of hexagons, while sample 1A, which has low crystallinity, shows a high proportion of hexagons. It was confirmed that the proportion of hexagons tends to decrease. The ratio of hexagons in sample 1D is: The value was between that of sample 1J and sample 1A. Therefore, as shown in Figure 29, due to the difference in film deposition conditions, gold It was confirmed that the crystalline states of the group oxides differed significantly.

[0402] Therefore, as shown in Figure 29, the lower the substrate temperature during film formation, or the smaller the oxygen gas flow rate ratio, It was confirmed that crystallization was low and the proportion of hexagons tended to be low.

[0403] <Elemental analysis> This section discusses energy-dispersive X-ray spectroscopy (EDX). Using X-ray spectroscopy, EDX mapping was acquired and evaluated. The results of the elemental analysis of sample 1A will be explained. Specifically, the elemental analysis instrument used is the JED- Energy Dispersive X-ray Spectrometer manufactured by JEOL Ltd. A 2300T thermometer will be used. A Si drift detector will be used to detect the X-rays emitted from the sample. Yes, they are.

[0404] In EDX measurement, electron beam irradiation is performed on each point in the analyte region of the sample, and the resulting reaction The energy and frequency of characteristic X-rays from the material are measured, and the corresponding EDX spectrum is obtained. In this example, the peaks in the EDX spectrum at each point are identified as the electron transition of the In atom to the L shell, and G Electron transitions of a atom to the K shell, electron transitions of Zn atom to the K shell, and electron transitions of O atom to the K shell The atoms are assigned to each point, and the ratio of each atom at each point is calculated. This is then used to analyze the sample's target area. By performing this process, we can obtain an EDX mapping that shows the distribution of the ratios of each atom. can.

[0405] Figure 30 shows TEM images of the cross-section and planar view of sample 1A, as well as EDX mapping. This is shown. Note that in EDX mapping, the more elements measured within a given range, the brighter the area becomes. The proportion of elements was shown by varying the brightness, with the darker the color, the lower the amount of each element. Also, the ED shown in Figure 30 The X-mapping magnification was set to 7.2 million times.

[0406] Figure 30(A) is a cross-sectional TEM image, and Figure 30(E) is a planar TEM image. Figure 30(B) is a cross-section. Figure 30(F) shows the EDX mapping of In atoms in a plane. The ratio of In atoms to all atoms in the EDX mapping shown in (B) is 9.28 to The range was set to 33.74 [atomic%]. The EDX mapping shown in Figure 30(F) The ratio of In atoms to the total number of atoms is between 12.97 and 38.01 [atomic%]. This was defined as the range.

[0407] Furthermore, Figure 30(C) shows the cross-sectional view, and Figure 30(G) shows the EDX mapping of Ga atoms in a planar view. This is the result. Furthermore, the Ga element for all atoms in the EDX mapping shown in Figure 30(C) is... The proportion of offspring was set to a range of 1.18 to 18.64 [atomic%]. (See Figure 30(G)) The ratio of Ga atoms to total atoms in EDX mapping is between 1.72 and 19.82. The range was defined as [atomic%].

[0408] Furthermore, Figure 30(D) shows the EDX mapping of Zn atoms in a cross-section, and Figure 30(H) shows the EDX mapping of Zn atoms in a plane. This is the result. Furthermore, the Zn atoms relative to all atoms in the EDX mapping shown in Figure 30(D) are... The proportion of offspring was set to a range of 6.69 to 24.99 [atomic%]. (See Figure 30(H)) The ratio of Zn atoms to total atoms in EDX mapping is between 9.29 and 28.32. The range was defined as [atomic%].

[0409] Figures 30(A), 30(B), 30(C), and 30(D) show the results for sample 1A. The same area is shown in the cross-section. Figures 30(E), 30(F), 30(G), Figure 30(H) shows the same region in the plane of sample 1A.

[0410] Figure 31 shows a cross-sectional view of sample 1A and a magnified view of the EDX mapping in the planar view. Figure 31(A) is an enlarged view of a portion of Figure 30(B). Figure 31(B) is an enlarged view of Figure 30( This is an enlarged view of a part of C). Figure 31(C) is an enlarged view of a part of Figure 30(D). Figure 31(D) is an enlarged view of a portion of Figure 30(F). Figure 31(E) is an enlarged view of Figure 30 This is a magnified view of a part of (G). Figure 31(F) is a magnified view of a part of Figure 30(H). be.

[0411] In the EDX mapping shown in Figures 31(A), 31(B), and 31(C), the image is... A relative distribution of light and dark is observed, and in sample 1A, each atom exists with a distribution. The offspring was confirmed. Here, the solid lines shown in Figures 31(A), 31(B), and 31(C) We focused on the areas enclosed by the square and the areas enclosed by the dashed lines.

[0412] In Figure 31(A), the area enclosed by the solid line contains a relatively large number of bright areas, while the area enclosed by the dashed line... It was confirmed that it contains many relatively dark areas. Also, in Figure 31(B), the area enclosed by the solid line The area enclosed by the dashed line contains a relatively large number of dark areas, while the area enclosed by the dashed line contains a relatively large number of bright areas. It was confirmed that this was possible.

[0413] In other words, the area enclosed by the solid line is a region with a relatively high concentration of In atoms, while the area enclosed by the dashed line is a region with a relatively high concentration of In atoms. It was confirmed that this is a region with relatively few offspring. Here, in Figure 31(C), the area is enclosed by a solid line. Within this range, the lower region is a relatively bright region, and the upper region is a relatively dark region. It was confirmed that it is within the region. Therefore, the area enclosed by the solid line is In X2 Zn Y2 O Z2 ,Also is InO X1 It was found that these are the main components of the region.

[0414] Furthermore, the area enclosed by the solid line is a region with relatively few Ga atoms, while the area enclosed by the dashed line is a region with relatively few Ga atoms. It was confirmed that this is an area with a relatively high number of children. In Figure 31(C), the area enclosed by the dashed line is The region on the left is a relatively dark region, and the region on the right is a relatively bright region. It was confirmed that this is the case. Therefore, the area enclosed by the dashed line is GaO X3, or Ga X4 Zn Y4 O Z4 It was found that these are the main components of the region.

[0415] Similarly, the EDX mapping shown in Figures 31(D), 31(E), and 31(F) However, I focused on the areas enclosed by solid lines and dashed lines.

[0416] In Figure 31(D), the area enclosed by the solid line contains a relatively large number of bright areas, while the area enclosed by the dashed line... It was confirmed that it contains many relatively dark areas. Also, in Figure 31(E), the area enclosed by the solid line The area enclosed by the dashed line contains a relatively large number of dark areas, while the area enclosed by the dashed line contains a relatively large number of bright areas. It was confirmed that this was possible.

[0417] In other words, the area enclosed by the solid line is a region where In atoms are relatively abundant and Ga atoms are relatively few. It was confirmed that it is a certain region. Here, in Figure 31(F), within the area enclosed by the solid line, It has been confirmed that the lower region is a relatively dark region, and the upper region is a relatively bright region. Confirmed. Therefore, the area enclosed by the solid line is In X2 Zn Y2 O Z2 , or InO X1 etc. It was found that this region is the main component.

[0418] Furthermore, the area enclosed by the dashed line is a region with relatively few In atoms and relatively many Ga atoms. It was confirmed that it was a region. In Figure 31(F), the area enclosed by the dashed line is the region on the right. It can be confirmed that the area to the left is a relatively dark region, and the area to the left is a relatively bright region. Therefore, the area enclosed by the dashed line is GaO X3 , or Ga X4 Zn Y4 O Z4etc. It was determined that it was a certain region.

[0419] Furthermore, as shown in Figure 31, the distribution of In atoms is relatively more uniform than that of Ga atoms. InO X1 The region in which is the main component is In X2 Zn Y2 O Z2 Through the region in which is the main component , they appear to be formed by being interconnected with each other. In this way, X2 Zn Y2 O Z2 , or InO X1 It is presumed that the region whose main component is formed in a cloud-like manner. Cut.

[0420] Thus, GaO X3 The region in which is the main component, and In X2 Zn Y2 O Z2 , or InO X1 In-Ga-Zn oxide has a structure in which regions with a main component are unevenly distributed and mixed. The material can be referred to as CAC-IGZO.

[0421] Also, in Figure 31, GaO X3 The region in which is the main component, and In X2 Zn Y2 O Z2 , or InO X1 The size of the region where is the main component is 0.5 nm to 10 nm, or Observed at wavelengths between 1 nm and 3 nm.

[0422] Based on the above, CAC-IGZO has a different structure from IGZO compounds in which metal elements are uniformly distributed. It was found to be a compound with properties different from IGZO compounds. In other words, CAC-IG ZO is GaO X3 Regions where such are the main components, and InX2 Zn Y2 O Z2 , or InO X1 Regions where one element is the main component and regions where each element is the main component are phase-separated from each other, forming a mosaic-like structure. It was confirmed that it has the following structure.

[0423] Therefore, when CAC-IGZO is used as a semiconductor device, GaO X3 Properties resulting from the above In X2 Zn Y2 O Z2 , or InO X1 The properties resulting from this act in a complementary manner. As a result, high on-current (I on ), high field-effect mobility (μ), and low off-current ( I off It is expected that this will be realized. In addition, semiconductor devices using CAC-IGZO It is highly reliable. Therefore, CAC-IGZO is suitable for a variety of applications, including displays. It is ideal for semiconductor devices.

[0424] This embodiment is at least part of other embodiments described herein, or other embodiments. It can be implemented in combination with the examples as appropriate. [Examples]

[0425] In this embodiment, a transistor 150 having a metal oxide 108, which is one aspect of the present invention, is provided. The samples were fabricated and subjected to electrical properties and reliability tests. In this example, metal oxide 1 was used. As transistor 150 having 08, sample 2A, sample 2B, sample 2C, sample 2D, Nine types of transistors were fabricated using material 2E, sample 2F, sample 2G, sample 2H, and sample 2J. Ta.

[0426] <Sample composition and preparation method> In the following, Sample 2A, Sample 2B, Sample 2C, Sample 2D, Sample 2E, according to one embodiment of the present invention, Samples 2F, 2G, 2H, and 2J will be described. Samples 2A to 2 As J, the structure of Figure 6 is formed by the manufacturing method described in Embodiment 2 and Figures 9 to 11. A transistor 150 having the following characteristics was fabricated.

[0427] Furthermore, samples 2A to 2J each represent the temperature during film formation of metal oxide 108 and the acid The raw flow rate ratios were prepared under different conditions. The table below shows the metal oxide formation in samples 2A to 2J. The temperature and oxygen flow rate ratio during membrane formation are shown.

[0428] [Table 3]

[0429] Each sample was prepared using the method described in Embodiment 2. In the 10⁸ film deposition process, the target is a metal oxide target (In:Ga:Zn= A ratio of 4:2:4.1 (atomic ratio) was used.

[0430] Note that the channel length of transistor 150 is 2 μm and the channel width is 3 μm (hereinafter, L / W = (Also called 2 / 3 μm), or channel length is 2 μm and channel width is 50 μm (hereinafter, L / (Also known as W = 2 / 50 μm)

[0431] <Electrical characteristics of transistors> Next, the Id of the transistor (L / W=2 / 3μm) of the above-prepared samples 2A to 2J -Vg characteristics were measured. The measurement conditions for the transistor's Id-Vg characteristics were as follows: The voltage applied to the conductive film 112 which functions as the gate electrode (hereinafter referred to as the gate voltage (Vg) and (Also known as), and the voltage applied to the conductive film 106 which functions as the second gate electrode (hereinafter referred to as b The gate voltage (also called Vbg) is measured in 0.25V steps from -10V to +10V. The voltage was applied using a pump. Also, the voltage applied to the conductive film 120a, which functions as the source electrode (hereinafter, Source voltage (V s The current (also known as ) is set to 0V (comm), and the conduction functioning as the drain electrode is... The voltage applied to the film 120b (hereinafter also referred to as the drain voltage (Vd)) is set to 0.1V and I set it to 20V.

[0432] [Transistor Id-Vg characteristics] Here, we will explain the drain current-gate voltage characteristics (Id-Vg characteristics) of a transistor. Figure 34(A) illustrates an example of the Id-Vg characteristics of a transistor. In Figure 34(A), for ease of understanding, the active layer of the transistor is made of polycrystalline silica. This assumes the use of a controller. Also, in Figure 34(A), the vertical axis is Id and the horizontal axis is V These represent g respectively.

[0433] As shown in Figure 34(A), the Id-Vg characteristics can be broadly divided into three regions. The first region is called the OFF region, and the second region is called the subthreshold. The subthreshold region and the third region are the ON region. They are referred to as (rigion) and respectively. Also, between the subthreshold region and the ON region The gate voltage at the boundary is called the threshold voltage (Vth).

[0434] Transistor characteristics include the drain current in the off-region (also called off-current or Ioff). It is desirable for the (u) to be low and the drain current in the ON region (also called ON current or Ion) to be high. It is important to note that the on-current of a transistor is often measured using field-effect mobility as an indicator. Details of the field-effect mobility will be described later.

[0435] Furthermore, in order to drive the transistor at a low voltage, the Id in the subthreshold region is -A steep slope in the Vg characteristic is desirable. Id-Vg characteristics in the subthreshold region. As an indicator representing the magnitude of change, SS (subthreshold swing) It is also called the S value. The S value is expressed by the following formula (2).

[0436]

number

[0437] The S value is the value required for the drain current to change by an order of magnitude in the subthreshold region. This is the minimum value of the change in voltage. The smaller the S value, the smaller the on-off switching operation. It can be done steeply.

[0438] [Transistor Id-Vd characteristics] Next, we will explain the drain current-drain voltage characteristics (Id-Vd characteristics) of a transistor. Figure 34(B) illustrates an example of the Id-Vd characteristics of a transistor. In Figure 34(B), the vertical axis represents Id and the horizontal axis represents Vd.

[0439] As shown in Figure 34(B), the ON region can be further divided into two regions. The first region The first region is called the linear region, and the second region is called the saturated region. These are referred to as the linear region and the drain current. It increases in a parabolic shape as the voltage rises. On the other hand, in the saturation region, the drain voltage changes. The drain current does not change significantly. Note that, analogous to a vacuum tube, the linear region may sometimes be referred to as the triode region, and the saturation region may sometimes be referred to as the pentode region, respectively.

[0440] Also, the linear region may sometimes refer to a state where Vg is large with respect to Vd (Vd < Vg). Also, the saturation region may sometimes refer to a state where Vd is large with respect to Vg (Vg < Vd). However, in reality, it is necessary to consider the threshold voltage of the transistor. Therefore, a state where the difference between Vg and the threshold voltage of the transistor is large with respect to Vd (Vd < Vg - Vt h) may sometimes be regarded as the linear region. Similarly, a state where the value obtained by subtracting the threshold voltage of the transistor from Vg is small with respect to Vd (Vg - Vth < Vd) may sometimes be regarded as the saturation region.

[0441] In the Id-Vd characteristics of a transistor, a characteristic where the current in the saturation region is constant is sometimes expressed as " good saturation." The goodness of the saturation of a transistor is particularly important in applications to organic EL displays. For example, by using a transistor with good saturation in the transistor of a pixel of an organic EL display, even if the drain voltage changes, the change in the brightness of the pixel can be suppressed.

[0442] [Analysis Model of Drain Current] Next, an analysis model of the drain current will be described. As an analysis model of the drain current, an analytical expression of the drain current based on the Gradual channel approximation (GCA) is known. Based on GCA, the drain current of a transistor is expressed by the following equation (3).

[0443] [Equation]] ​​

[0444] In equation (3), the upper part is the equation for the drain current in the linear region, and the lower part is the equation for the drain current in the saturation region. This is the formula for the drain current. In formula (3), Id is the drain current and μ is the active layer. Mobility, L is the channel length of the transistor, W is the channel width of the transistor, Cox is the gateway. Vg is the gate voltage, Vd is the drain voltage, and Vth is the threshold voltage of the transistor. These represent the following, respectively.

[0445] [Field effect mobility] Next, we will explain field-effect mobility. As an indicator of the current-driving force of a transistor, the electric field... Effective mobility is used. As mentioned above, the on-region of a transistor consists of a linear region and a saturation region. It is divided into regions. Based on the characteristics of each region, the drain current analysis formula based on GCA is used. The field-effect mobility of a transistor can be calculated. Linear mobility and saturation mobility, respectively. Linear mobility is called tion mobility. Linear mobility is expressed by the following equation (4), The sum mobility is expressed by the following equation (5).

[0446]

number

[0447]

number

[0448] In this specification, the curves calculated from equations (4) and (5) are referred to as mobility curves. Figure 35 shows the mobility curve calculated from the analytical formula for drain current based on GCA. Furthermore, Figure 35 shows the Id-Vg characteristics at Vd=10V when GCA is enabled, The linear mobility and saturated mobility curves are shown superimposed on each other.

[0449] In Figure 35, the Id-Vg characteristics were calculated from the drain current analysis formula based on GCA. The shape of the mobility curve provides clues to understanding the internal workings of a transistor. .

[0450] Figure 32 shows the Id-Vg characteristic results and field effect mobility for samples 2A to 2J, respectively. The solid line shows Id when Vd is 20V, and the dashed line shows Id when Vd is 0.1V. The dashed line also indicates the field-effect mobility. In Figure 32, the first vertical axis is Id[A] The second vertical axis represents the field effect mobility (μFE [cm²]). 2 / V s ]) with the horizontal axis being Vg[V], These are expressed separately. Furthermore, the field-effect mobility is calculated from the value measured with Vd set to 20V. did.

[0451] As shown in Figure 32, the characteristics of samples 2A to 2J are as follows: On current (I on ), electric field effect transfer It was confirmed that the mobility, particularly the field effect mobility in the saturation region, differed. Regarding the shape of mobility, the value of the maximum saturation mobility and the field effect of the rise characteristics near 0V are considered. It was found that the shape of the fruit's mobility varied significantly.

[0452] As shown in Figure 32, the lower the substrate temperature during film formation, or the smaller the oxygen flow rate ratio during film formation, the higher the temperature. Ionic current (I on It was found that the rise time around 0V is not It was confirmed that the slope was consistently steep. In particular, in sample 2A, the maximum value of the field-effect mobility was 70 cm 2 / V s It was confirmed that it showed a value approaching that level.

[0453] <Gate Bias - Thermal Stress Test (GBT Test)> Next, the transistors (L / W=2 / 50μm) of samples 2A to 2J that were fabricated as described above are used. In contrast, a reliability assessment was conducted. The GBT test was used for the reliability assessment.

[0454] The GBT test conditions in this embodiment are as follows: conductive film 112, which functions as the first gate electrode, and The voltage applied to the conductive film 106 which functions as the second gate electrode, (hereinafter referred to as gate voltage) (Vg) is set to ±30V, and the conductive film 120a and the dot function as source electrodes. The voltage applied to the conductive film 120b that functions as a rain electrode (hereinafter These are the drain voltage (Vd) and source voltage (V) respectively. s ) is called ) 0V (COMMON ) was set. In addition, the stress temperature was set to 60°C and the stress application time to 1 hour, and the measurement environment was set to DA In two environments: a work environment and a light-illuminated environment (illuminated with approximately 10,000 lux of light from a white LED). They each did so.

[0455] In other words, the conductive film 120a, which functions as the source electrode of transistor 150, and the drain electrode The conductive film 120b, which functions as a electrode, is at the same potential, and the conductive film that functions as the first gate electrode The conductive film 106, which functions as the second gate electrode, has a source electrode. The conductive film 120a and the conductive film 120b, which functions as a drain electrode, are kept at a different potential from each other. Time (1 hour in this case) was applied.

[0456] Furthermore, the conductive film 112 functions as the first gate electrode and the second gate electrode functions as The potential applied to the conductive film 106 is the potential applied to the conductive film 120a, which functions as the source electrode, and the drain electrode. Positive stress was defined as a condition where the potential was higher than that of the conductive film 120b, which functions as a electrode. A conductive film 112 that functions as a first gate electrode and a conductive film that functions as a second gate electrode The potential applied to film 106 is used to configure conductive film 120a and drain electrode, which function as source electrodes. Negative stress was defined as a case where the potential was lower than that of the conductive film 120b that functions. In conjunction with the measurement environment, plus GBT (dark), minus GBT (dark), plus G Reliability evaluations were conducted under a total of four conditions: BT (light irradiation) and negative GBT (light irradiation). .

[0457] Furthermore, Plus GBT (Dark) is PBTS (Positive Bias Temper As for ature stress, it is described below. Also, negative GBT (dark) NBTS (Negative Bias Temperature Stress) This is done by adding GBT (photoirradiation) to PBITS (Positive Bias Illu (Degree Temperature Stress) is used. Minus GBT ( (Light irradiation) is NBITS (Negative Bias Illumination Technology) (Paper stress)

[0458] The GBT test results for samples 2A to 2J are shown in Figure 33. Also, in Figure 33, the vertical axis is This shows the change in the threshold voltage (ΔVth) of the transistor.

[0459] As shown in Figure 33, the transistors in samples 2A to 2J are suitable for GBT testing. Furthermore, the change in threshold voltage (ΔVth) was within ±3V. Therefore, sample 2 It can be seen that the transistors in A to sample 2J have high reliability.

[0460] Therefore, even IGZO films with low crystallinity can have defects similar to highly crystallinity IGZO films. It is presumed that a membrane with low particle density is being formed.

[0461] This embodiment is at least part of other embodiments described herein, or other embodiments. It can be implemented in combination with the examples as appropriate. [Examples]

[0462] In this example, a metal oxide according to one aspect of the present invention is formed on a substrate using various measurement methods. The results of the measurements performed on this subject will be explained. In this example, sample 3A and the test Sample 3D and sample 3J were prepared.

[0463] <Sample composition and preparation method> The following describes Sample 3A, Sample 3D, and Sample 3J according to one embodiment of the present invention. Samples 3A, 3D, and 3J each comprise a substrate and a metal oxide on the substrate.

[0464] Furthermore, the temperature during film formation of the metal oxide in samples 3A, 3D, and 3J was determined separately. Samples were prepared under different conditions for oxygen flow rate ratios. The table below shows the results for Sample 3A, Sample 3D, and Sample 3A. This shows the temperature and oxygen flow rate ratio during metal oxide film formation in J.

[0465] [Table 4]

[0466] Next, we will explain the method for preparing each sample.

[0467] First, a glass substrate was used as the substrate. Subsequently, using a sputtering apparatus, on the substrate a 100-nm-thick In-Ga-Zn metal oxide was formed as the metal oxide. The film-forming conditions were such that the pressure inside the chamber was 0.6 Pa, and for the target, a metal oxide target ( In:Ga:Zn = 1:1:1.2 [atomic ratio]) was used. Also, by supplying 2500 W of AC power to the metal oxide target installed inside the sputtering apparatus, the metal oxide was formed into a film.

[0468] Note that as the conditions for forming the metal oxide film, the film-forming temperature and oxygen flow rate ratio shown in the above table were used to obtain Samples 3A, 3D, and 3J.

[0469] Through the above steps, Samples 3A, 3D, and 3J of this example were fabricated.

[0470] <TEM Image and Electron Diffraction> In this section, the results of observing and analyzing Samples 3A, 3D, and 3J by TEM will be described.

[0471] Also, in this section, the results of obtaining electron diffraction patterns by irradiating Samples 3A, 3D, and 3J with an electron beam (also referred to as a nano-beam electron beam) with a probe diameter of 1 nm will be described.

[0472] Note that the planar TEM image was observed using the spherical aberration correction function. Also, for taking the HAADF-STEM image, a JEOL JEM-ARM200F atomic-resolution analytical electron microscope manufactured by JEOL Ltd. was used, and an electron beam with an acceleration voltage of 200 kV and a beam diameter of approximately 0.1 nmφ was irradiated.

[0473] Furthermore, the electron diffraction pattern was observed from the 0-second position to the 35-second position while irradiating with an electron beam. This was done while moving at a constant speed.

[0474] Figure 36(A) shows a cross-sectional TEM image of sample 3A, and Figure 36(B) shows the electron diffraction pattern of sample 3A. The results obtained are shown. Figure 36(C) shows a cross-sectional TEM image of the sample 3D, and Figure 36(D) shows the sample The results of acquiring the 3D electron diffraction pattern are shown. Figure 36(E) shows the cross-sectional TEM image of sample 3J. Figure 36(F) shows the electron diffraction pattern obtained for sample 3J.

[0475] As shown in Figure 36(A), microcrystals were observed in sample 3A based on cross-sectional TEM observation results. Furthermore, as shown in Figure 36(B), the electron diffraction pattern result for sample 3A is circular. A ring-shaped region of high brightness was observed, appearing as if drawing a picture. Furthermore, multiple ring-shaped regions were observed. A spot was observed.

[0476] As shown in Figure 36(C), the 3D sample has a CAAC structure, and the results of cross-sectional TEM observation show that it has a CAAC structure. Microcrystals were observed. Also, as shown in Figure 36(D), electron diffraction patterns were observed on sample 3D. The results of the turn showed that a region of high brightness was observed in a circular (ring-shaped) pattern. Multiple spots were observed in the ring-shaped region. In addition, spots originating from the (009) plane were observed. A slight diffraction pattern was also observed.

[0477] On the other hand, as shown in Figure 36(E), sample 3J has a CAAC structure, as determined by cross-sectional TEM observation. A clearly visible layered arrangement was observed in sample 3J. The resulting electron diffraction pattern includes a diffraction pattern that contains spots originating from the (009) plane. A n was seen.

[0478] In addition, the features observed in the cross-sectional TEM image and the plan-view TEM image as described above only partially capture the structure of the metal oxide.

[0479] From the above, the electron diffraction patterns of Sample 3A and Sample 3D have regions of high brightness in a ring shape and have a plurality of bright spots in the ring region. Therefore, Sample 3A and Sample 3D have an electron diffraction pattern that is a metal oxide with microcrystals and has no orientation in the plane direction and the cross-sectional direction. Also, it was found that Sample 3D is a mixed material of an nc structure and a CAAC structure.

[0480] On the other hand, the electron diffraction pattern of Sample 3J has spots due to the (009) plane of the InGaZnO4 crystal. Therefore, it was found that Sample 3J has c-axis orientation and the c-axis is oriented in a direction substantially perpendicular to the formed surface or the upper surface.

[0481] <Image Analysis of TEM Image> In this section, the results of observing and analyzing Samples 3A, Sample 3D, and Sample 3J by HAADF-STEM will be described.

[0482] The results of the image analysis of the plan-view TEM image will be described. The plan-view TEM image was observed using a spherical aberration correction function. For the shooting of the plan-view TEM image, an atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. was used, and an electron beam with an acceleration voltage of 200 kV and a beam diameter of about 0.1 nmφ was irradiated.

[0483] Figure 37(A) is the plan-view TEM image of Sample 3A, and Figure 37(B) is the plan-view TEM image of Sample 3A ​​​​​​​The processed images are shown. Figure 37(C) is a planar TEM image of the 3D sample, and Figure 37(D) is a trial Figure 37(E) shows a processed planar TEM image of sample 3D. Figure 37(F) shows an image obtained by image processing of a planar TEM image of sample 3J.

[0484] Furthermore, the planar TEM images shown in Figures 37(B), 37(D), and 37(F) were processed. The resulting images were obtained by performing planar TEM imaging as shown in Figures 37(A), 37(C), and 37(E). This image was analyzed using the method described in Example 1, and shows the grayscale corresponding to the angle of the hexagonal grid. In other words, the image obtained by image processing a planar TEM image is the same as the FFT filtered image of the planar TEM image. By dividing a specific wavenumber region and applying varying shades to that region, the color of each specific wavenumber region is determined. This is an image showing the orientation of the child dots.

[0485] As shown in Figure 37, in samples 3A and 3D where nc is observed, the orientation of the hexagons is random. It was found that they are distributed in a mosaic pattern. Furthermore, a layered structure was observed in the cross-sectional TEM image. In sample 3J, regions where the hexagons are oriented in the same direction exist over a wide area of ​​several tens of nanometers. It was found that it was present. Sample 3D had a random mosaic-like nc, and the same as sample 3J. It was found that there are regions where the direction is observed over a wide area.

[0486] Furthermore, as shown in Figure 37, the lower the substrate temperature during film formation, or the smaller the oxygen gas flow rate ratio, Areas where the orientation of the hexagons is random and distributed in a mosaic pattern tend to appear. I found out.

[0487] In this way, by performing image analysis on planar TEM images, the hexagonal grid of CAAC-OS can be analyzed. This makes it possible to evaluate boundaries where the angle changes.

[0488] Next, a Voronoi diagram was created from the grid point cloud of sample 3A. Note that the Voronoi diagram was created using the method described in Example 1. It was obtained using the method described.

[0489] In Figure 38(A), sample 3A is shown; in Figure 38(B), sample 3D is shown; and in Figure 38(C), sample 3J is shown. This shows the proportion of Voronoi regions whose shape is either a quadrilateral, a nonagon, or a octagon. The number of Voronoi regions in each sample whose shape is either a quadrilateral, a nonagon, or a octagon is also shown. The table shows the proportion of each sample whose Voronoi region is either a quadrangular, nonagonal, or nonagonal.

[0490] As shown in Figure 38, sample 3J, which has high crystallinity, shows a higher proportion of hexagons, while sample 3A, which has low crystallinity, shows a higher proportion of hexagons. It was confirmed that the proportion of hexagons tends to decrease. The ratio of hexagons in the 3D sample is: The value was between that of sample 3J and sample 3A. Therefore, as shown in Figure 38, the difference in film deposition conditions resulted in gold It was confirmed that the crystalline states of the group oxides differed significantly.

[0491] Therefore, as shown in Figure 38, the lower the substrate temperature during film formation, or the smaller the oxygen gas flow rate ratio, It was confirmed that crystallization was low and the proportion of hexagons tended to be low.

[0492] <Elemental analysis> This section discusses energy-dispersive X-ray spectroscopy (EDX). Using X-ray spectroscopy, EDX mapping was acquired and evaluated. The results of the elemental analysis of sample 3A will be explained. Specifically, the elemental analysis instrument used is the JED- Energy Dispersive X-ray Spectrometer manufactured by JEOL Ltd. A 2300T thermometer will be used. A Si drift detector will be used to detect the X-rays emitted from the sample. Yes, they are.

[0493] In EDX measurement, electron beam irradiation is performed on each point in the analyte region of the sample, and the resulting reaction The energy and frequency of characteristic X-rays from the material are measured, and the corresponding EDX spectrum is obtained. In this example, the peaks in the EDX spectrum at each point are identified as the electron transition of the In atom to the L shell, and G Electron transitions of a atom to the K shell, electron transitions of Zn atom to the K shell, and electron transitions of O atom to the K shell The atoms are assigned to each point, and the ratio of each atom at each point is calculated. This is then used to analyze the sample's target area. By performing this process, we can obtain an EDX mapping that shows the distribution of the ratios of each atom. can.

[0494] Figure 39 shows the TEM image in cross-section and plan view of sample 3A, as well as the EDX mapping. This is shown. Note that in EDX mapping, the more elements measured within a range, the brighter the area becomes. The proportion of elements was indicated by light and dark, with the darker the lighter the element, as the amount of an element decreases. Also, the ED shown in Figure 39 The X-mapping magnification was set to 7.2 million times.

[0495] Figure 39(A) is a cross-sectional TEM image, and Figure 39(E) is a planar TEM image. Figure 39(B) is a cross-section. Figure 39(F) shows the EDX mapping of In atoms in a plane. The ratio of In atoms to all atoms in the EDX mapping shown in (B) is 8.64 to The range was set to 34.91 [atomic%]. The EDX mapping shown in Figure 39(F) The ratio of In atoms to the total number of atoms is in the range of 5.76 to 34.69 [atomic%]. It was enclosed.

[0496] Furthermore, Figure 39(C) shows the cross-sectional view, and Figure 39(G) shows the EDX mapping of Ga atoms in a planar view. This is the result. Furthermore, the Ga element for all atoms in the EDX mapping shown in Figure 39(C) is... The proportion of offspring was set to a range of 2.45 to 25.22 [atomic%]. (See Figure 39(G)) The ratio of Ga atoms to total atoms in EDX mapping is between 1.29 and 27.64. The range was defined as [atomic%].

[0497] Furthermore, Figure 39(D) shows the EDX mapping of Zn atoms in a cross-section, and Figure 39(H) shows the EDX mapping of Zn atoms in a plane. This is the result. Furthermore, the Zn atoms relative to all atoms in the EDX mapping shown in Figure 39(D) are... The proportion of offspring was set to a range of 5.05 to 23.47 [atomic%]. (See Figure 39(H)) The ratio of Zn atoms to total atoms in EDX mapping is between 3.69 and 27.86. The range was defined as [atomic%].

[0498] Figures 39(A), 39(B), 39(C), and 39(D) show the results for sample 3A. The same area is shown in the cross-section. Figures 39(E), 39(F), 39(G), Figure 39(H) shows the same region in the plane of sample 3A.

[0499] Figure 40 shows a magnified view of the EDX mapping in the cross-section of sample 3A. Figure 40(A Figure 40(B) is an enlarged view of a portion of Figure 39(C). This is an enlarged view. Figure 40(C) is an enlarged view of a portion of Figure 39(D).

[0500] In the EDX mapping shown in Figures 40(A), 40(B), and 40(C), the image is... A relative distribution of light and dark is observed, and in sample 3A, each atom appears to exist in a distributed manner. The offspring was confirmed. Here, the solid lines shown in Figures 40(A), 40(B), and 40(C) We focused on the areas enclosed by the square and the areas enclosed by the dashed lines.

[0501] In Figure 40(A), the area enclosed by the solid line contains a relatively large number of dark areas, while the area enclosed by the dashed line contains It was confirmed that it contains many relatively bright areas. Also, in Figure 40(B), the area enclosed by the solid line The area enclosed by the dashed line contains a relatively large number of bright areas, while the area enclosed by the dashed line contains a relatively large number of dark areas. It was confirmed that this was possible.

[0502] In other words, the area enclosed by the solid line is a region with a relatively high concentration of In atoms, while the area enclosed by the dashed line is a region with a relatively high concentration of In atoms. It was confirmed that this is a region with relatively few offspring. Here, in Figure 40(C), the area is enclosed by a solid line. Within this range, the upper region is a relatively bright region, and the lower region is a relatively dark region. It was confirmed that it is within the region. Therefore, the area enclosed by the solid line is In X2 Zn Y2 O Z2 ,Also is InO X1 It was found that these are the main components of the region.

[0503] Furthermore, the area enclosed by the solid line is a region with relatively few Ga atoms, while the area enclosed by the dashed line is a region with relatively few Ga atoms. It was confirmed that this is an area with a relatively large number of offspring. In the area enclosed by the dashed line at the top of Figure 40(C) In this case, the area on the right is a relatively bright area, and the area on the left is a dark area. Confirmed. Also, in the area enclosed by the dashed line at the bottom of Figure 40(C), the upper left region is relative. It was confirmed that the area was bright, while the lower right area was dark. Therefore, The area enclosed by the line is GaO X3 , or Ga X4 Zn Y4 O Z4 In regions where these are the main components I found out something.

[0504] Furthermore, from Figures 40(A), 40(B), and 40(C), the distribution of In atoms is as follows: It is distributed more uniformly than atoms, InO X1 The region in which is the main component is In X2 Zn Y2 O Z2 It appears that they are formed by being connected to each other through regions where this is the main component. In this way, X2 Zn Y2 O Z2 , or InO X1 The region in which is the main component is It can be inferred that it is formed by spreading out in a loud, swirling pattern.

[0505] Thus, GaO X3 The region in which is the main component, and In X2 Zn Y2 O Z2 , or InO X1 In-Ga-Zn oxide has a structure in which regions with a main component are unevenly distributed and mixed. The material can be referred to as CAC-IGZO.

[0506] Furthermore, in Figures 40(A), 40(B), and 40(C), GaO X3 is the main component The region that is, and In X2 Zn Y2 O Z2 , or InO X1 The region in which is the main component The particles were observed at wavelengths between 0.5 nm and 10 nm, or between 1 nm and 3 nm.

[0507] On the other hand, Figure 41 shows the TEM image in cross-section and plan view of sample 3J, and the EDX map. This shows the mapping. Note that in EDX mapping, the more elements measured within a given range, the brighter the result becomes. The proportion of elements was indicated by light and dark, with the darker the light, the less of the element being measured. Also shown in Figure 41. The EDX mapping magnification was set to 7.2 million times.

[0508] Figure 41(A) is a cross-sectional TEM image, and Figure 41(E) is a planar TEM image. Figure 41(B) is a cross-section. Figure 41(F) shows the EDX mapping of In atoms in a plane. The ratio of In atoms to all atoms in the EDX mapping shown in (B) is 9.70 to The range was set to 40.47 [atomic%]. The EDX mapping shown in Figure 41(F) The ratio of In atoms to the total number of atoms is in the range of 9.16 to 35.76 [atomic%]. It was enclosed.

[0509] Furthermore, Figure 41(C) shows the cross-sectional view, and Figure 41(G) shows the EDX mapping of Ga atoms in a planar view. This is the result. Furthermore, the Ga element for all atoms in the EDX mapping shown in Figure 41(C) The proportion of offspring was set to a range of 8.23 ​​to 31.95 [atomic%]. (See Figure 41(G)) The ratio of Ga atoms to total atoms in EDX mapping is between 8.21 and 28.86. The range was defined as [atomic%].

[0510] Furthermore, Figure 41(D) shows the EDX mapping of Zn atoms in a cross-section, and Figure 41(H) shows the EDX mapping of Zn atoms in a plane. This is the result. Furthermore, the Zn atoms relative to all atoms in the EDX mapping shown in Figure 41(D) The proportion of offspring was set to a range of 5.37 to 25.92 [atomic%]. (See Figure 41(H)) The ratio of Zn atoms to total atoms in EDX mapping is between 7.86 and 24.36. The range was defined as [atomic%].

[0511] Figures 41(A), 41(B), 41(C), and 41(D) show the results for sample 3J. The same area is shown in the cross-section. Figures 41(E), 41(F), 41(G), Figure 41(H) shows the same region in the plane of sample 3J.

[0512] Figure 41(A) clearly shows a group of crystals that have grown laterally, and Figure 41(E) shows a hexagonal Crystals with a 120° angle in a nul structure were observed.

[0513] EDX mapping of In atoms and Zn atoms shown in Figures 41(B) and 41(D). Upon observation, as indicated by the white lines, a series of bright spots with high luminosity were observed. Also, in Figures 41(F) and 41(H), the angle between these lines is approximately 120°. It has the characteristic of a hexagonal structure, as shown in Figures 41(B) and 41(D), and Figure 41(A). The same layered arrangement was observed. Also, as shown in Figures 41(C) and 41(G), These trends were not observed for Ga atoms.

[0514] Furthermore, the resolution of EDX is generally affected by the presence or absence of regularity in the atomic arrangement. When the atom arrangement is regular, the atoms are aligned in a straight line with respect to the direction of the incident beam, Incident electrons channel and propagate. Therefore, atomic columns can be separated. On the other hand, atomic distribution If the regularity of the rows is low, the atomic rows fluctuate with respect to the direction of the incident beam, so the incident electrons It expands without channeling. In other words, the spatial resolution deteriorates, and the resulting image is blurry. It may be observed in a certain state.

[0515] In other words, because CAAC does not have as high a crystallinity as single crystals, the beam spreads, and EDX The ping method did not have the same resolution as HAADF-STEM, and it is thought that the images were observed in a blurred state. It can be obtained. Also, from Figure 39, the CAC appears with the beam spread out, so each The atoms can be determined to be nanoparticles with a broadened periphery.

[0516] Based on the above, CAC-IGZO has a different structure from IGZO compounds in which metal elements are uniformly distributed. It was found to be a compound with properties different from IGZO compounds. In other words, CAC-IG ZO is GaO X3 Regions where such are the main components, and In X2 Zn Y2 O Z2 , or InO X1 Regions where one element is the main component and regions where each element is the main component are phase-separated from each other, forming a mosaic-like structure. It was confirmed that it has the following structure.

[0517] Therefore, when CAC-IGZO is used in semiconductor devices, GaO X3 Properties resulting from the above In X2 Zn Y2 O Z2 , or InO X1 The properties resulting from this act in a complementary manner. As a result, high on-current (I on ), high field-effect mobility (μ), and low off-current ( It is expected that Ioff will be realized. In addition, semiconductor devices using CAC-IGZO It is highly reliable. Therefore, CAC-IGZO is suitable for a variety of applications, including displays. It is ideal for semiconductor devices.

[0518] This embodiment is at least part of other embodiments described herein, or other embodiments. It can be implemented in combination with the examples as appropriate. [Examples]

[0519] In this embodiment, a transistor 150 having a metal oxide 108, which is one aspect of the present invention, is provided. The samples were fabricated and subjected to electrical properties and reliability tests. In this example, metal oxide 1 was used. As transistor 150 having 08, sample 4A, sample 4B, sample 4C, sample 4D, Nine types of transistors were fabricated: Sample 4E, Sample 4F, Sample 4G, Sample 4H, and Sample 4J. Ta.

[0520] <Sample composition and preparation method> In the following, Sample 4A, Sample 4B, Sample 4C, Sample 4D, Sample 4E, according to one embodiment of the present invention, Samples 4F, 4G, 4H, and 4J will be described. Samples 4A to 4 As J, the structure of Figure 6 is formed by the manufacturing method described in Embodiment 2 and Figures 9 to 11. A transistor 150 having the following characteristics was fabricated.

[0521] Furthermore, samples 4A to 4J each represent the temperature during film formation of metal oxide 108 and the acid The raw flow ratios were prepared under different conditions. The table below shows the metal oxide formation in samples 4A to 4J. The temperature and oxygen flow rate ratio during membrane formation are shown.

[0522] [Table 5]

[0523] Each sample was prepared using the method described in Embodiment 2. In the 10⁸ film deposition process, the target is a metal oxide target (In:Ga:Zn= The ratio of atoms used was 1:1:1.2.

[0524] Note that the channel length of transistor 150 is 2 μm and the channel width is 3 μm (hereinafter, L / W = (Also known as 2 / 3 μm)

[0525] <Transistor Id-Vg characteristics> Next, the Id of the transistor (L / W=2 / 3μm) of the above-prepared samples 4A to 4J -Vg characteristics were measured. The measurement conditions for the transistor's Id-Vg characteristics were as follows: The voltage applied to the conductive film 112 which functions as the gate electrode (hereinafter referred to as the gate voltage (Vg) and (Also known as), and the voltage applied to the conductive film 106 which functions as the second gate electrode (hereinafter referred to as b The gate voltage (also called Vbg) is measured in 0.25V steps from -10V to +10V. The voltage was applied using a pump. Also, the voltage applied to the conductive film 120a, which functions as the source electrode (hereinafter, Source voltage (V s The current (also known as ) is set to 0V (comm), and the conduction functioning as the drain electrode is... The voltage applied to the film 120b (hereinafter also referred to as the drain voltage (Vd)) is set to 0.1V and I set it to 20V.

[0526] Figure 42 shows the Id-Vg characteristic results and field effect mobility for samples 4A to 4J, respectively. The solid line shows Id when Vd is 20V, and the dashed line shows Id when Vd is 0.1V. The dashed line represents the field effect mobility calculated from the value measured with Vd = 20V, while the dotted line represents the field effect mobility calculated from the measured value. This shows the field-effect mobility calculated from the value measured with Vd = 0.1V. See Figure 42. In this graph, the first vertical axis represents Id[A] and the second vertical axis represents the field effect mobility (μFE[cm]). 2 / Vs The horizontal axis represents Vg[V], while the horizontal axis represents Vg[V].

[0527] Figure 42 shows the normally-off characteristics of transistor 150 in samples 4A to 4J. The results were obtained. Also, as shown in Figure 42, the characteristics of samples 4A to 4J are as follows: On current (I on), it was confirmed that the field effect mobility, especially the field effect mobility in the saturation region, is different. In particular, regarding the shape of the field-effect mobility, the value of the maximum saturation mobility and the rise around 0V It was found that the shape of the field-effect mobility in the upward trending characteristics differed significantly.

[0528] As shown in Figure 42, the lower the substrate temperature during film formation, or the smaller the oxygen flow rate ratio during film formation, the lower It was found that the field-effect mobility at Vg was significantly improved. In particular, in sample 4A, The maximum value of the field effect mobility is 40 cm. 2 / V s It was confirmed that it showed values ​​approaching that level at low Vg. High mobility means it is suitable for high-speed operation at low voltage, and the display It was found that this technology has potential applications in various semiconductor devices, including those mentioned above.

[0529] Furthermore, as shown in Figure 42, the values ​​measured with Vd = 20V in the field effect mobility (dashed line) Different behavior was observed when Vd was measured at 0.1V (dotted line). The values ​​measured with Vg as 0V (dashed line) show that the field effect mobility increased as Vg increased. This is thought to be due to the effect of heat generated by the transistor. On the other hand, Vd is 0.1V and In the range where Vg is high, the value measured (dotted line) is calculated using the aforementioned formula (5). The values ​​shown nearly coincided with the ideal saturation mobility curve.

[0530] This embodiment is at least part of other embodiments described herein, or other embodiments. It can be implemented in combination with the examples as appropriate. [Examples]

[0531] In this example, regarding a metal oxide according to one aspect of the present invention deposited on a substrate, energy By using dispersive X-ray spectroscopy (EDX) to acquire and evaluate EDX mapping, Next, we will explain the results of the elemental analysis of the sample. Note that EDX measurement was performed using an elemental analyzer. A JED-2300T energy-dispersive X-ray analyzer manufactured by JEOL Ltd. was used for the analysis. A Si drift detector was used to detect the X-rays emitted from the sample.

[0532] <Sample composition and preparation method> In this embodiment, sample 5A was prepared. Sample 5A consisted of a substrate and a metal oxide on the substrate. , has.

[0533] Next, we will explain the method for preparing the samples.

[0534] First, a glass substrate was used as the substrate. Next, a sputtering apparatus was used on the substrate. A 100 nm thick In-Ga-Zn oxide film was formed as a metal oxide. The film deposition conditions were as follows: The pressure inside the chamber is set to 0.6 Pa, and the sputtering gas is A at a flow rate of 270 sccm. The environment is set to an O2 atmosphere with a flow rate of 30 sccm, and the target is a metal oxide target. (In:Ga:Zn=4:2:4.1 [atomic ratio]) was used. Also, sputtering equipment By supplying 2500W of AC power to the metal oxide target installed inside the device, the metal An oxide film was deposited.

[0535] Sample 5A of this embodiment was prepared through the above steps.

[0536] <Measurement results> In EDX measurement, electron beam irradiation is performed on each point in the analyte region of the sample, and the resulting reaction The energy and frequency of characteristic X-rays from the material are measured, and the corresponding EDX spectrum is obtained. In this example, the peaks in the EDX spectrum at each point are identified as the electron transition of the In atom to the L shell, and G Electron transitions of a atom to the K shell, electron transitions of Zn atom to the K shell, and electron transitions of O atom to the K shell The atoms are assigned to each point, and the ratio of each atom at each point is calculated. This is then used to analyze the sample's target area. By performing this process, we can obtain an EDX mapping that shows the distribution of the ratios of each atom. can.

[0537] Figure 43 shows the measurement results on the cross-section of sample 5A. Figure 43(A) shows the T in the cross-section. EM images, Figure 43(B), and Figure 43(C) show EDX mapping in the cross-section. Furthermore, in EDX mapping, the more elements measured within a given range, the brighter the image becomes. The proportion of elements is shown by varying the brightness, with the lower the amount, the darker the color. Also, the EDX map shown in Figure 43 The Ping magnification was set to 7.2 million times. Note that Figures 43(A), 43(B), and 43( C) shows the same region in the cross-section of sample 5A.

[0538] Figure 43(B) shows the EDX mapping of In atoms in the cross-section. Note that Figure 43(B) The ratio of In atoms to total atoms in the EDX mapping shown is between 12.11 and 40. The range was set to 30 [atomic%]. Also, Figure 43(C) shows the E of Ga atoms in cross-section. This is DX mapping. Note that in the EDX mapping shown in Figure 43(C), all atoms are treated as follows: The ratio of Ga atoms was set to a range of 0.00 to 13.18 [atomic%].

[0539] In the EDX mapping shown in Figures 43(B) and 43(C), relative brightness and darkness are represented in the image. A distribution was observed, and in sample 5A, In atoms and Ga atoms were present in a distributed manner. This was observed. Here, in the range from high brightness to the top 25% in Figure 43(B), black Five regions enclosed by lines (region 901, region 902, region 903, region 904, and region 9 05) was extracted. Also, in the range from high brightness to the top 25% in Figure 43(C), the dashed line indicates The five surrounding regions (region 906, region 907, region 908, region 909, and region 910) ) were extracted. Also, the range from the highest brightness to the top 75% and top 25% in Figure 43(B) was extracted. Furthermore, in the range from the highest brightness in Figure 43(C) to the top 75% and top 25%, the white line The five regions enclosed by (region 911, region 912, region 913, region 914, and region 91 5) was extracted.

[0540] In other words, regions 901 to 905 are regions that contain a relatively large amount of In atoms. Regions 906 to 910 contain a relatively large amount of Ga atoms. Regions 911 through 915 are regions that contain, on average, In atoms and Ga atoms.

[0541] Figure 43(C) shows the regions where Ga atoms are relatively abundant, i.e., the five regions enclosed by dashed lines. Regions 906, 907, 908, 909, and 910 are shown in Figure 43(B). A relatively dark region was observed. In other words, in the region where Ga atoms are relatively abundant, the In atoms are relatively abundant. It could be inferred that the number was relatively small.

[0542] Therefore, the proportions of each element in regions 901 to 915 shown in Figure 43(B) are shown in Figure 43( As shown in D). The area enclosed by the black line (area 901, area 902, area 903, area 904, Region 905) is a region where In atoms are relatively abundant and Ga atoms are relatively scarce. This was found. Also, the area enclosed by the dashed line (area 906, area 907, area 908, area 909 It was confirmed that regions 910) and 910) have relatively few In atoms and many Ga atoms. Done.

[0543] Next, Figure 44 shows the measurement results applied to the plane of sample 5A. Figure 44(A) shows the results applied to the plane. TEM images, Figure 44(B), and Figure 44(C) show EDX mapping in a plane. This is shown. Note that Figures 44(A), 44(B), and 44(C) are taken on the plane of sample 5A. This indicates the same range of area.

[0544] Figure 44(B) shows the EDX mapping of In atoms in a plane. Note that Figure 44(B) The ratio of In atoms to total atoms in the EDX mapping shown is between 12.11 and 43. The range was set to 80 [atomic%]. Also, Figure 44(C) shows the E of a Ga atom in a plane. This is DX mapping. Note that in the EDX mapping shown in Figure 44(C), all atoms are treated as follows: The ratio of Ga atoms was set to a range of 0.00 to 14.83 [atomic%].

[0545] In the EDX mapping shown in Figures 44(B) and 44(C), relative brightness and darkness are represented in the image. A distribution was observed, and in sample 5A, In atoms and Ga atoms were present in a distributed manner. This was observed. Here, in the range from high brightness to the top 25% or more in Figure 44(B) , the five areas enclosed by the black lines (area 921, area 922, area 923, area 924, and territory The region 925) was extracted. In addition, in the range from high brightness to the top 25% or more in Figure 44(C) , five areas enclosed by dashed lines (area 926, area 927, area 928, area 929, and territory The region 930) was extracted. In addition, the top 75% and top 25% from the high-luminance region in Figure 44(B) were extracted. Within the range below, and within the range of the highest brightness in Figure 44(C) from the top 75% to the top 25% The five regions enclosed by white lines (region 931, region 932, region 933, region 934, and Region 935) was extracted.

[0546] First, in Figure 44(C), the regions with a relatively high concentration of Ga atoms are the five areas enclosed by the dashed lines. (Regions 926, 927, 928, 929, and 930) are shown in Figure 44. In B), a relatively dark region was observed. In other words, the region with a relatively high concentration of Ga atoms was the In atom. It could be inferred that the number of children was relatively small.

[0547] Therefore, the proportions of each element in regions 921 to 935 shown in Figure 44(B) are shown in Figure 44( As shown in D). The area enclosed by the black line (area 921, area 922, area 923, area 924, Region 925) is a region where In atoms are relatively abundant and Ga atoms are relatively scarce. This was found. Also, the area enclosed by the dashed line (area 926, area 927, area 928, area 929 It was confirmed that regions 930) and 930) have relatively few In atoms and many Ga atoms. Done.

[0548] From Figures 43(D) and 44(D), the amount of In atoms is 25 atomic% or more and 60 at It was found that the distribution exists in the range of omic% or less. Also, the Ga atom is 3atom It was found that the distribution exists in the range of ic% to 40atomic%.

[0549] Regions with a relatively high concentration of In atoms can be presumed to have relatively high conductivity. On the other hand, regions with a relatively high concentration of Ga atoms... Regions with a relatively high concentration of In atoms can be inferred to have relatively high insulating properties. Therefore, regions with a relatively high concentration of In atoms... When carriers flow through the region, conductivity is achieved, resulting in a high field-effect mobility (μ). It is thought that this has occurred. On the other hand, regions with a relatively high concentration of Ga atoms are distributed within the metal oxide. This is thought to have suppressed leakage current and enabled good switching operation.

[0550] In other words, when a metal oxide having a CAC structure is used in a semiconductor device, the Ga atoms and other elements contribute to the problem. The insulating properties and the conductivity due to the In atoms work complementarily to produce high on- It can be said that we were able to achieve both electric current (Ion) and high field-effect mobility (μ).

[0551] This embodiment is at least part of other embodiments described herein, or other embodiments. It can be implemented in combination with the examples as appropriate. [Examples]

[0552] In this embodiment, a transistor 150 having a metal oxide 108, which is one aspect of the present invention, is provided. The sample was prepared and the defect level density was measured. In this example, metal oxide 108 was used. The transistors 150 possessed are: Sample 6A, Sample 6B, Sample 6C, Sample 6D, Sample 6E Nine types of transistors were fabricated: sample 6F, sample 6G, sample 6H, and sample 6J.

[0553] <Sample composition and preparation method> The following describes samples 6A to 6J according to one aspect of the present invention. Sample 6A, As for sample 6J, prepared by the method described in Embodiment 2 and Figures 9 to 11, A transistor 150 having the structure shown in Figure 6 was fabricated.

[0554] Furthermore, for samples 6A through 6J, the temperature during film formation of metal oxide 108 and The oxygen flow rate ratio was prepared under different conditions. In addition, during the film deposition process of metal oxide 108, As a target, a metal oxide target (In:Ga:Zn=1:1:1.2 [atomic ratio]) ) was used. The table below shows the temperature and acid used during metal oxide film formation for samples 6A to 6J. This shows the raw flow rate ratio.

[0555] [Table 6]

[0556] Each sample was prepared using the method described in Embodiment 2.

[0557] Furthermore, the channel length of transistor 150 is 2 μm, and the channel width is 3 μm (hereinafter, L / W = (Also called 2 / 3 μm), or channel length is 2 μm and channel width is 50 μm (hereinafter, L / (Also known as W = 2 / 50 μm)

[0558] <Evaluation of shallow defect levels using transistor characteristics> [Method for evaluating shallow defect level density] Shallow defect levels (hereinafter also referred to as sDOS) in metal oxides are used when metal oxides are used as semiconductors. It can also be estimated from the electrical characteristics of the transistor. Below, the transistor interface... Evaluate the density of the energy levels, and in addition to the density of those interface energy levels, determine the number of electrons N trapped in the interface energy levels. t rap When considering this, what is the method for predicting the subthreshold leakage current? explain.

[0559] Number of electrons trapped in the interface level: N trap For example, the drain current of a transistor - Measured values ​​of gate voltage (Id-Vg) characteristics and drain current-gate voltage (Id-Vg) characteristics It can be evaluated by comparing it with the calculated value of the sex.

[0560] Figure 45 shows the calculation at source voltage Vs=0V and drain voltage Vd=0.1V. The obtained ideal Id-Vg characteristics and the measured Id-Vg characteristics of the transistor are compared. This is shown. Note that among the transistor measurement results, the drain current Id is easily measured for 1 × 10⁻⁶ -13 Only values ​​greater than or equal to A were plotted.

[0561] Compared to the ideal Id-Vg characteristic calculated, the measured Id-Vg characteristic is different for the gate voltage Vg The change in the drain current Id with respect to the conduction band becomes gradual. This is because the energy at the lower end of the conduction band (E This is thought to be because electrons were trapped in shallow interface levels located near (represented by c). Here, using the Fermi distribution function, we determine that the material is trapped in shallow interface levels (per unit area). Number of electrons (N) per unit energy trap By taking this into consideration, the density of interface levels can be more strictly determined. degree N it It is possible to estimate this.

[0562] First, the interface trap level is used to trap the material using the schematic Id-Vg characteristics shown in Figure 46. Number of electrons N trap This section explains the evaluation method. The dashed line represents the trap state obtained by calculation. It shows an ideal Id-Vg characteristic without any positional differences. Also, in the dashed line, the drain current is Id1 or The change in gate voltage Vg when Id2 changes is ΔV id This is the case. Also, the solid line represents actual measurements. The Id-Vg characteristics are shown. In the solid line, when the drain current changes from Id1 to Id2... The change in the gate voltage Vg is ΔV exLet's assume that the drain currents are Id1 and Id2. The potentials at the target interface are φ it1 , φ it2 Let the change be Δφ it tosu ru.

[0563] In Figure 46, the measured value has a smaller slope than the calculated value, therefore ΔV ex ΔV id twist It can be seen that it is also large. At this time, ΔV ex and ΔV id The difference is that electrons are sent to shallow interface levels. This represents the potential difference required for the trapping to occur. Therefore, it represents the change in charge due to the trapped electrons. amount ΔQ trap This can be expressed by the following equation (6).

[0564]

number

[0565] C tg This represents the combined capacitance of the insulator and semiconductor per unit area. Also, ΔQ trap is a track The number of electrons (per unit area, per unit energy) that are applied is N trap Using equation (7) It can also be expressed as follows. Note that q is the elementary charge.

[0566]

number

[0567] Equation (8) can be obtained by solving equations (6) and (7) simultaneously.

[0568]

number

[0569] Next, the limit Δφ of equation (8)it →By taking 0, we can obtain equation (9).

[0570]

number

[0571] That is, using the ideal Id-Vg characteristics, the measured Id-Vg characteristics, and equation (9), the interface The number of trapped electrons N trap It is possible to estimate the drain current and The relationship with the potential at the interface can be determined by the calculation described above.

[0572] Furthermore, the number of electrons N per unit area and unit energy trap and the density N of the interface levels it is an expression (10) They are in a relationship like this.

[0573]

number

[0574] Here, f(E) is the Fermi distribution function. The N obtained from equation (9) trap Equation (1 By fitting with 0), N it This N is determined. it Devices that have been configured Transfer characteristics including Id < 0.1 pA can be obtained through calculations using a simulator. .

[0575] Next, we apply equation (9) to the measured Id-Vg characteristics shown in Figure 45, and N trap The result extracted The result is shown by a white circle in Figure 47. Here, the vertical axis of Figure 47 is the distance from the lower edge Ec of the semiconductor conduction band. This is the luminal energy Ef. Looking at the dashed line, the maximum value is located just below Ec. (Equation) (10) N itAssuming a tail distribution as shown by equation (11), the non- Always good N trap It can be fitted, and the fitting parameter is the conduction band edge. Trap density N ta = 1.67 × 10 13 cm -2 / eV, characteristic decay energy W ta = 0.105 eV was obtained.

[0576]

number

[0577] Next, the fitting curve of the obtained interface levels is used in calculations using a device simulator. The results of the Id-Vg characteristics, calculated by feedback, are shown in Figure 48(A) and Figure 48(A). This is shown in 48(B). Figure 48(A) shows the cases when the drain voltage Vd is 0.1V and 1.8V. The Id-Vg characteristics obtained by the calculation, and the drain voltage Vd of 0.1V and 1.8V The measured Id-Vg characteristics of the transistor in this case are shown. Also, Figure 48(B) is shown. This is a logarithmic graph of the drain current Id for a 48(A) battery.

[0578] The curve obtained by calculation and the plot of the measured values ​​are in close agreement, and the calculated values ​​and measured values ​​are in close agreement. It can be seen that it has high reproducibility. Therefore, as a method for calculating shallow defect level density Therefore, it can be seen that the above method is quite reasonable.

[0579] [Evaluation results of shallow defect level density] Next, by comparing the measured electrical characteristics with the ideal calculated values ​​based on the method described above, Sample 6A, Sample 6B, Sample 6C, Sample 6D, Sample 6E, Sample 6F, Sample 6G, Sample 6 The density of shallow defect levels in H and sample 6J was measured.

[0580] Figure 49 shows samples 6A, 6B, 6C, 6D, 6E, 6F, 6G, and The results of calculating the average shallow defect level density for material 6H and sample 6J are shown.

[0581] As shown in Figure 49, the smaller the oxygen flow rate ratio during film formation of metal oxide 108, and the film formation The lower the temperature, the lower the peak value of the shallow defect level density in the sample. Understood.

[0582] Thus, samples 6A to 6J have metal oxide films with low defect level density formed on them. It was found to be a ranzista. In particular, metal acids deposited under low temperature and low oxygen flow rate conditions. By using a hydrocarbon film, oxygen permeability is improved, and the amount of oxygen that diffuses during the transistor fabrication process is reduced. As a result of the increase, oxygen deficiencies occur in the metal oxide film and at the interface between the metal oxide film and the insulating film, etc. This is presumably because the defects have been reduced.

[0583] This embodiment is at least part of other embodiments described herein, or other embodiments. It can be implemented in combination with the examples as appropriate. [Examples]

[0584] In this embodiment, a transistor 150 having a metal oxide 108, which is one aspect of the present invention, is provided. The sample was prepared and the defect level density was measured. In this example, metal oxide 108 was used. The transistors 150 possessed are: Sample 7A, Sample 7B, Sample 7C, Sample 7D, Sample 7E Nine types of transistors were fabricated: sample 7F, sample 7G, sample 7H, and sample 7J.

[0585] <Sample composition and preparation method> The following describes samples 7A to 7J according to one aspect of the present invention. Sample 7A, As for sample 7J, prepared by the method described in Embodiment 2 and Figures 9 to 11, A transistor 150 having the structure shown in Figure 6 was fabricated.

[0586] Furthermore, for samples 7A through 7J, the temperature during film formation of metal oxide 108 and The oxygen flow rate ratio was prepared under different conditions. In addition, during the film deposition process of metal oxide 108, As a target, a metal oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) ) was used. The table below shows the temperature and acid used during metal oxide film formation for samples 7A to 7J. This shows the raw flow rate ratio.

[0587] [Table 7]

[0588] Each sample was prepared using the method described in Embodiment 2.

[0589] Furthermore, the channel length of transistor 150 is 2 μm, and the channel width is 3 μm (hereinafter, L / W = (Also called 2 / 3 μm), or channel length is 2 μm and channel width is 50 μm (hereinafter, L / (Also known as W = 2 / 50 μm)

[0590] <Evaluation of shallow defect levels using transistor characteristics> [Method for evaluating shallow defect level density] The shallow defect levels of metal oxide 108 are used in the electrical circuits of a transistor using metal oxide as a semiconductor. The estimation was performed using atmospheric properties. The calculation method was the same as the method described in the previous example. They evaluated the density of the interface states of the transistor, and in addition to that density of interface states, the interface states Number of trapped electrons N trap When considering the subthreshold leak electricity I predicted the flow.

[0591] [Evaluation results of shallow defect level density] Next, by comparing the measured electrical characteristics with the ideal calculated values ​​based on the method described above, Sample 7A, Sample 7B, Sample 7C, Sample 7D, Sample 7E, Sample 7F, Sample 7G, Sample 7 The density of shallow defect levels in H and sample 7J was measured.

[0592] Figure 50 shows samples 7A, 7B, 7C, 7D, 7E, 7F, 7G, and The results of calculating the average shallow defect level density for sample 7H and sample 7J are shown.

[0593] As shown in Figure 50, the smaller the oxygen flow rate ratio during film formation of metal oxide 108, and the film formation The lower the temperature, the lower the peak value of the shallow defect level density in the sample. Understood.

[0594] Thus, samples 7A to 7J have metal oxide films formed on them with a low defect level density. It was found to be a ranzista. In particular, metal acids deposited under low temperature and low oxygen flow rate conditions. By using a hydrocarbon film, oxygen permeability is improved, and the amount of oxygen that diffuses during the transistor fabrication process is reduced. As a result of the increase, oxygen deficiencies occur in the metal oxide film and at the interface between the metal oxide film and the insulating film, etc. This is presumably because the defects have been reduced.

[0595] This embodiment is at least part of other embodiments described herein, or other embodiments. It can be implemented in combination with the examples as appropriate. [Examples]

[0596] In this embodiment, a transistor 150 having a metal oxide 108, which is one aspect of the present invention, is provided. The samples were fabricated and subjected to electrical properties and reliability tests. In this example, metal oxide 1 was used. As transistor 150 having 08, the transistor of sample 8A was fabricated.

[0597] <Sample composition and preparation method> The following describes sample 8A according to one embodiment of the present invention. Sample 8A is an embodiment of By state 2 and the manufacturing method described in Figures 9 to 11, a transistor having the structure of Figure 6 is produced. I manufactured the Ta150.

[0598] The table below shows the temperature and oxygen flow rate ratio during film formation of metal oxide 108 in sample 8A.

[0599] [Table 8]

[0600] Sample 8A was prepared by the method described in Embodiment 2. In the film deposition process of material 108, the target is a metal oxide target (In:Ga:Zn The ratio used was 5:1:7 (atomic ratio).

[0601] The channel length of transistor 150 is 3 μm, and the channel width is 50 μm (hereinafter referred to as L / W). (Also known as =3 / 50μm)

[0602] <Transistor Id-Vg characteristics> Next, the Id-Vg characteristics of the transistor (L / W=3 / 50μm) of sample 8A prepared above. The following was measured. The measurement conditions for the transistor's Id-Vg characteristics were as follows: First gate current The voltage applied to the conductive film 112, which functions as a electrode (hereinafter also referred to as the gate voltage (Vg)), and the voltage applied to the conductive film 106 which functions as the second gate electrode (hereinafter referred to as back gate The voltage (also called Vbg) is applied in steps of 0.25V from -10V to +10V. The voltage applied to the conductive film 120a, which functions as a source electrode (hereinafter referred to as the source electrode) was also determined. Pressure (V s The conductive film 12 (also known as ) is set to 0V (comm) and functions as a drain electrode. The voltage applied to 0b (hereinafter also called drain voltage (Vd)) is set to 0.1V and 20V. did.

[0603] Figure 51 shows the Id-Vg characteristic results and field-effect mobility for sample 8A. (Solid line) The dashed line shows Id when Vd is 20V, and the dashed line shows Id when Vd is 0.1V. This indicates the field-effect mobility. Note that in Figure 51, the first vertical axis is Id[A], and the second vertical axis is is the field effect mobility (μFE[cm 2 / V s The horizontal axis represents Vg[V], while the horizontal axis represents Vg[V]. Furthermore, the field-effect mobility was calculated from the value measured with Vd set to 20V.

[0604] Note that in Figure 51, the upper limit of Id during measurement was set to 1 mA. Under the condition Vd=20V, Vg=7.5V and Id exceeds this upper limit. Therefore, in Figure 51, the field effect mobility estimated from this Id-Vg characteristic is, The range Vg = 7.5V or less is explicitly specified.

[0605] As shown in Figure 51, the transistor fabricated in this embodiment has good electrical characteristics. The characteristics of the transistor shown in Figure 51 are shown in Table 9.

[0606] [Table 9]

[0607] Thus, the transistor fabricated in this embodiment has a field-effect mobility of 100 cm². 2 / Vs It exceeds [value]. This is a high value comparable to transistors using low-temperature polysilicon. Therefore, this can be considered an astonishing characteristic for a transistor using metal oxide 108.

[0608] As shown in Table 9, sample 8A has a transistor gate voltage greater than 0V and less than or equal to 10V. The maximum value of the field effect mobility within the range is 60 cm 2 / Vs or more 150cm 2 / Vs less than A first region, a second region where the threshold voltage is between -1V and 1V, and the S value is The third region is less than 0.3V / decade, and the off-current is 1 × 10⁻⁶ -12 A / cm 2 It has a fourth region which is less than μFE( Expressed as max), the value of the field-effect mobility when the gate voltage of a transistor is 2V is μFE( When expressed as Vg=2V, μFE(max) / μFE(Vg=2V) is greater than or equal to 1 and less than or equal to 2. It is full.

[0609] The characteristics of the transistor described above were obtained by using the metal oxide 108 explained earlier. By using metal oxide 108 in the semiconductor layer of the transistor, carrier mobility is high. It is possible to achieve both functionality and good switching characteristics simultaneously.

[0610] This embodiment is at least part of other embodiments described herein, or other embodiments. It can be implemented in combination with the examples as appropriate. [Explanation of symbols]

[0611] 001 area 002 Area 100 transistors 102 circuit boards 104 Insulating film 106 Conductive film 108 Metal Oxides 108a Metal oxide 108n area 110 Insulating Film 110_0 Insulating film 112 Conductive film 112_0 Conductive film 112_1 Conductive film 112_2 Conductive film 116 Insulating film 118 Insulating Film 120a conductive film 120b Conductive film 122 Insulating film 140 masks 141a opening 141b opening 143 Opening 150 transistors 160 transistors 300A Transistor 300B transistor 300C Transistor 300D Transistor 302 circuit board 304 Conductive film 306 Insulating Film 307 Insulating film 308 Metal Oxides 312a Conductive film 312b Conductive film 314 Insulating Film 316 Insulating film 318 Insulating film 320a conductive film 320b Conductive film 341a opening 341b opening 342a opening 342b opening 342c opening 600 Display Panel 601 Transistors 604 Connection part 605 Transistor 606 transistors 607 Connection part 612 Liquid crystal layer 613 Conductive film 617 Insulating film 620 Insulating film 621 Insulating film 623 Conductive film 631 Colored layer 632 Light-shielding film 633a Orientation film 633b Orientation film 634 Colored layer 635 Conductive film 640 liquid crystal buttons 641 Adhesive layer 642 Adhesive layer 643 Conductive film 644 EL layer 645a Conductive film 645b Conductive film 646 Insulating film 647 Insulating film 648 Conductive film 649 Connecting Layer 651 circuit board 652 Conductive film 653 Semiconductor film 654 Conductive film 655 Aperture 656 Polarizing plate 659 circuits 660 light-emitting elements 661 circuit board 662 Display section 663 Conductive film 666 Wiring 672 FPC 673 IC 681 Insulating film 682 Insulating film 683 Insulating film 684 Insulating film 685 Insulating film 686 connectors 687 Connection part 700 Model 702 Local structure 704 Local structure 706 Local structure 708 Local structure 710 Local structure 712 Local structure 901 area 902 area 903 area 904 area 905 area 906 area 907 area 908 area 909 area 910 area 911 area 912 areas 913 area 914 area 915 area 920 areas 921 area 922 areas 923 areas 924 areas 925 areas 926 areas 927 areas 928 areas 929 areas 930 areas 931 area 932 areas 933 areas 934 areas 935 areas

Claims

1. It has a display unit, The display unit has a transistor, The transistor has a metal oxide film having a channel-forming region, The metal oxide film has a first region and a second region, The first region is a region in which the concentration of In shown in the energy-dispersive X-ray spectroscopy mapping image is higher than that of the second region. The display device is characterized in that the second region is a region in which the concentration of Ga, as shown in the energy-dispersive X-ray spectroscopy mapping image, is higher than that of the first region.

2. It has a display unit, The display unit has a transistor, The transistor has a metal oxide film having a channel-forming region, The metal oxide film has a first region and a second region, The first region is a region in which the concentration of In shown in the energy-dispersive X-ray spectroscopy mapping image is higher than that of the second region. The second region is a region in which the concentration of Ga shown in the energy-dispersive X-ray spectroscopy mapping image is higher than that of the first region. The metal oxide film has a region containing boron, and is used as a display device.

3. In claim 1 or claim 2, The aforementioned metal oxide film is a single layer, and the device is a display device.

4. In any one of claims 1 to 3, The metal oxide film comprises In, Ga, and Zn, and is a display device.

5. In any one of claims 1 to 4, The metal oxide film is a display device having a region in which multiple spots are observed in a ring-shaped area by electron diffraction pattern.

6. In any one of claims 1 to 5, A display device having an oxide insulating film above and below the metal oxide film.

Images