Semiconductor devices and vehicles

Abstract

This prevents product defects caused by the scattering of bonding material used to join the main electrodes of semiconductor devices to metal wiring boards. [Solution] The semiconductor device (1) comprises a semiconductor element (3) in which a plurality of adjacent metal layers (320A, 320B) are exposed on a first surface with an insulating layer (350) in between; a metal wiring board (4) bonded to the plurality of metal layers of the semiconductor element via bonding materials (920A, 920B); and a separation portion (410) located between the semiconductor element and the metal wiring board, having a region that overlaps with the insulating layer (350) in a plan view of the first surface, and separating the plurality of regions that overlap with each of the plurality of metal layers in the metal wiring board.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a vehicle.

Background Art

[0002] In semiconductor devices used in power conversion devices such as inverter devices, there are those in which a main electrode exposed on one surface of a semiconductor element and a metal wiring board are joined by a bonding material such as solder. In some semiconductor elements used in this type of semiconductor device, the exposed surface of the main electrode to be joined to a single metal wiring board is divided into a plurality of regions by an insulating layer (for example, Patent Documents 1 to 3).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0004] When the exposed surface of the main electrode of a semiconductor element to be joined to a single metal wiring board is divided into a plurality of regions by an insulating layer, the molten bonding material between them may scatter during the process of joining the metal wiring board and the main electrode of the semiconductor element and adhere to an unintended location. The bonding material that adheres and remains in an unintended location can cause product defects such as malfunction of the semiconductor device.

[0005] The present invention has been made in view of such points, and one object thereof is to prevent the occurrence of product defects due to scattering of the bonding material used for joining the main electrode of the semiconductor element and the metal wiring board.

Means for Solving the Problems

[0006] A semiconductor device according to one aspect of the present invention comprises a semiconductor element having a plurality of adjacent metal layers exposed on a first surface with an insulating layer in between; a metal wiring board bonded to the plurality of metal layers of the semiconductor element via a bonding material; and a separation portion located between the semiconductor element and the metal wiring board, having a region that overlaps with the insulating layer in a plan view of the first surface, and separating a plurality of regions that overlap with each of the plurality of metal layers on the metal wiring board. [Effects of the Invention]

[0007] According to the present invention, it is possible to prevent product defects caused by the scattering of bonding material used to join the main electrode of a semiconductor device to a metal wiring board. [Brief explanation of the drawing]

[0008] [Figure 1] This is a top view showing an example of the configuration of a semiconductor device according to the first embodiment. [Figure 2] This is a cross-sectional view showing an example of the configuration of a semiconductor device cut along the dashed line A-A' in Figure 1. [Figure 3] Figure 2 is an enlarged partial cross-sectional view of the junction between the semiconductor element and the metal wiring board. [Figure 4] This figure shows an example configuration of an inverter circuit using a semiconductor device according to the first embodiment. [Figure 5] These are a top view (Figure 5A) and a cross-sectional view (Figure 5B) showing examples of the configuration of the top electrodes of a semiconductor device. [Figure 6] Figure 6A shows an example of the planar shape of the insulating layer separating the main electrodes, and Figure 6B shows an example of the planar shape of the separation section of the metal wiring board. [Figure 7] This is a perspective view of the junction between the main electrode of a semiconductor element and a metal wiring board. [Figure 8] This is a cross-sectional view illustrating an example of a method for forming a separation portion of a metal wiring board. [Figure 9] These are a top view (Figure 9A) and a cross-sectional view (Figure 9B) illustrating an example of the bonding procedure between the main electrode of a semiconductor device and a metal wiring board. [Figure 10] This is a top view showing an example of a bridge that occurs when a separation section is not provided in a metal wiring board. [Figure 11] Figure 10 shows a cross-sectional view of the junction between the main electrode of a semiconductor device and a metal wiring board, cut along the dashed line D-D'. [Figure 12] Figure 12A shows an example of the planar shape of the insulating layer separating the main electrodes in a semiconductor device according to the second embodiment, and Figure 12B shows an example of the planar shape of the separation portion of the metal wiring board. [Figure 13] This is a top view illustrating an example of the configuration of the separation portion between the upper electrode of the semiconductor element and the metal wiring board in a semiconductor device according to the third embodiment. [Figure 14] This is a cross-sectional view showing an example of the configuration of a metal wiring board in a semiconductor device according to the fourth embodiment. [Figure 15] This is a cross-sectional view illustrating an example of a bonding procedure between the main electrode of a semiconductor element and a metal wiring board according to the fifth embodiment. [Figure 16] These are cross-sectional views (Figures 16A to 16C) illustrating another example of the configuration of the metal wiring board according to the fifth embodiment. [Figure 17] This is an exploded perspective view illustrating a method for forming a separation portion of a metal wiring board according to the sixth embodiment. [Figure 18] This is a schematic plan view showing an example of a vehicle to which the semiconductor device according to the present invention is applied. [Modes for carrying out the invention]

[0009] The embodiments of the present invention will be described in detail below with reference to the drawings. The X, Y, and Z axes in each of the referenced figures are shown for the purpose of defining planes and directions in the example semiconductor device, etc. The X, Y, and Z axes are orthogonal to each other and form a right-handed system. In the following description, the direction parallel to the X axis will be called the X direction, the direction parallel to the Y axis will be called the Y direction, and the direction parallel to the Z axis will be called the Z direction. Furthermore, when relating the X, Y, and Z directions to the directions of the arrows (positive and negative) on the X, Y, and Z axes shown in the figures, they will be labeled as "positive side" or "negative side."

[0010] In this specification, the Z direction may be referred to as the vertical direction. In this specification, "up" or "above" is intended to be on the positive Z side with respect to a reference surface, member, position, etc., and "down" or "below" is intended to be on the negative Z side with respect to a reference surface, member, position, etc. For example, when it is described that "member B is disposed above member A", member B is disposed on the positive Z side as viewed from member A. Also, when it is described as "the upper surface of member A", that surface is located at the end on the positive Z side of member A and faces the positive Z side. In this specification, "top view" intends a plan view when the target article (e.g., a semiconductor device, etc.) is viewed from the positive Z side. These directions and surfaces are expressions used for convenience of explanation, and depending on the mounting posture of the semiconductor device, etc., the correspondence with the directions of the X-axis, Y-axis, and Z-axis may change. For example, in this specification, the surface facing the wiring board in the semiconductor element is called the lower surface, and the surface on the opposite side of the lower surface is called the upper surface, but it is not limited to this, and the surface facing the wiring board may be called the upper surface, and the surface on the opposite side may be called the lower surface. The lower surface and the upper surface in the semiconductor element may be called side surfaces. Also, the vertical and horizontal ratios in each figure and the size relationships between each member are only schematically represented and do not necessarily match the relationships in an actually manufactured semiconductor device, etc. For convenience of explanation, it is also assumed that the size relationships between each member are exaggeratedly expressed.

[0011] Also, the semiconductor device exemplified in the following description may be applicable to, for example, a power conversion device such as an industrial or vehicle inverter device. For this reason, in the following description, detailed descriptions of the same or similar configurations, functions, operations, manufacturing methods, etc. as those of known semiconductor devices are omitted.

[0012] [First Embodiment] Figure 1 is a top view showing an example of the configuration of a semiconductor device according to the first embodiment. Figure 2 is a cross-sectional view showing an example of the configuration of a semiconductor device cut along the dashed line A-A' in Figure 1. Figure 3 is an enlarged partial cross-sectional view of the joint between the semiconductor element and the metal wiring board in Figure 2. Figure 4 is a diagram showing an example of the configuration of an inverter circuit using the semiconductor device according to the first embodiment. Note that in Figure 2, hatching on the cross-sectional portion of the sealing material 8 that seals the semiconductor element 3, etc., has been omitted.

[0013] The semiconductor device 1 illustrated in Figures 1 to 3 includes a wiring board 2, a semiconductor element 3, a metal wiring board 4, bonding wires 5, a case 6, a cooler 7, and a sealing material 8. The semiconductor device 1 is used, for example, as a circuit component for forming an inverter circuit. As an example, Figure 4 shows a half-bridge inverter circuit 20 formed using two semiconductor devices 1A and 1B. The first semiconductor device 1A and the second semiconductor device 1B in Figure 4 may each be one of the semiconductor devices 1 illustrated in Figures 1 to 3. The semiconductor devices 1A and 1B each include an IGBT (Insulated Gate Bipolar Transistor) element 110, which is a switching element, and a diode element 120 such as an FWD (Free Wheeling Diode) element connected in antiparallel to the IGBT element 110. The semiconductor element 3 illustrated in this specification is an RC (Reverse Conducting)-IGBT element that integrates the IGBT element 110 and the diode element 120. In the half-bridge inverter circuit 20, the emitter terminal 620 of the first semiconductor device 1A and the collector terminal 610 of the second semiconductor device 1B are electrically connected to the intermediate terminal 21.

[0014] The wiring board 2 includes an insulating substrate 200, a first conductive layer 210 provided on the upper surface of the insulating substrate 200, and a second conductive layer 220 provided on the lower surface of the insulating substrate 200. The wiring board 2 may be, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazing) substrate. The wiring board 2 may also be called a wiring board, a laminated substrate, etc.

[0015] The insulating substrate 200 may be a ceramic substrate formed from a ceramic material such as aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), or a composite material of aluminum oxide (Al2O3) and zirconium oxide (ZrO2). The insulating substrate 200 is not limited to a ceramic substrate. The insulating substrate 200 may be, for example, a substrate molded from an insulating resin such as epoxy resin, a substrate impregnated with an insulating resin onto a base material such as glass fiber, or a substrate whose surface is coated with an insulating resin on a flat metal core.

[0016] The first conductive layer 210 is one of the wiring components that electrically connects the lower electrode (first main electrode 310 in Figure 3) of the semiconductor element 3 to the collector terminal 610 of the case 6, but it can also be a heat conduction component that dissipates the heat generated by the semiconductor element 3 to the outside of the semiconductor device 1. The second conductive layer 220 is a heat conduction component that dissipates the heat generated by the semiconductor element 3 to the outside of the semiconductor device 1. The first conductive layer 210 and the second conductive layer 220 are formed using, for example, metal plates or metal foils such as copper or aluminum. The conductive layers in the wiring board 2 may also be called conductor layers, conductor plates, etc.

[0017] The wiring board 2 is placed on the upper surface of the cooler 7, for example, as shown in Figure 2. The second conductive layer 220 of the wiring board 2 and the cooler 7 are joined by a bonding material 900 such as solder. Instead of the bonding material 900, a thermal conductive material such as thermal grease or thermal compound may be used. The cooler 7 is not limited to a specific configuration. For example, the cooler 7 may consist of a flat base member to which the wiring board 2 is joined and a water jacket attached below the base member. The cooler 7 may have fins in the coolant flow path defined by the base member and the water jacket (see Figure 2). The cooler 7 may be any component in the semiconductor device 1. The semiconductor device 1 may also have a thermally conductive member such as a metal plate instead of the cooler 7, and the wiring board 2 may be joined to the upper surface of that member.

[0018] A semiconductor element 3 is arranged on the upper surface of the wiring board 2. The semiconductor element 3 may be the RC-IGBT element described above, and as illustrated in Figure 3, a first main electrode 310 is provided on the lower surface of the semiconductor layer 300. On the upper surface of the semiconductor layer 300, there are second main electrodes 320A and 320B and a runner portion 341 passing between the two second main electrodes 320A and 320B. The runner portion 341 is a conductive layer that can function as the gate of the switching element (IGBT element 110) illustrated in Figure 4, and one end is connected to the gate electrode 340 (see Figures 1 and 5A). When the switching element of the semiconductor element 3 is an IGBT element 110, the first main electrode 310 on the lower side may be called the collector electrode, and the second main electrodes 320A and 320B on the upper side may be called the emitter electrode. The runner portion 341 is positioned on the upper surface of the semiconductor layer 300 via a gate oxide film (insulating film) 330 and is covered with an insulating layer 350. A plating layer 321 is formed on the upper surfaces of the second main electrodes 320A and 320B, and the plating layer 321 on the upper surface of the second main electrode 320A and the plating layer 321 on the upper surface of the second main electrode 320B are separated by an insulating layer 350.

[0019] In the following description, the two second main electrodes 320A and 320B shall, for convenience, include the upper plating layer 321. The semiconductor layer 300 may be formed by diffusing predetermined impurities into a semiconductor substrate so that the semiconductor element 3 operates as a switching element (e.g., an IGBT element 110) and a diode element 120. The switching element formed on the semiconductor element 3 may be a trench structure or a planar structure. The semiconductor substrate may be a silicon substrate, but is not limited to a substrate of a specific semiconductor material. The semiconductor substrate may be a substrate using a wide-bandgap semiconductor, such as a SiC (silicon carbide) substrate or a GaN (gallium nitride) substrate. In the following description, the second main electrodes 320A and 320B provided on the upper surface of the semiconductor element 3 may be referred to as the first pad 320A and the second pad 320B, respectively. In the following description, the first pad 320A and the second pad 320B may, for convenience, include the upper plating layer 321, and the exposed surfaces of the first pad 320A and the second pad 320B may be the upper surfaces of the plating layer 321.

[0020] In the semiconductor device 1 according to this embodiment, the semiconductor element 3 has a first main electrode 310 (see Figure 3) provided on its lower surface, which is bonded to the first conductive layer 210 of the wiring board 2 by a bonding material 910. The first conductive layer 210 of the wiring board 2 is electrically connected to a collector terminal 610 provided on the case 6 via a conductive block 10, which is located outside the area on the upper surface that is bonded to the semiconductor element 3. The conductive block 10 is bonded to the first conductive layer 210 of the wiring board 2 and the inner terminal portion 611 of the collector terminal 610, respectively, by a bonding material (not shown). The conductive block 10 may be integrally formed with the first conductive layer 210 of the wiring board 2. The method of electrically connecting the first conductive layer 210 of the wiring board 2 and the inner terminal portion 611 of the collector terminal 610 is not limited to the method using the conductive block 10. The semiconductor device 1 may, for example, have a shape in which the inner terminal portion 611 of the collector terminal 610 is bent downward, and the inner terminal portion 611 and the first conductive layer 210 of the wiring board 2 are joined together with a bonding material.

[0021] The semiconductor element 3 has a first pad 320A and a second pad 320B on its upper surface, each of which (actually the plating layer 321 on their upper surfaces) is joined to a first joint 400 of the metal wiring board 4 by bonding materials 920A and 920B. The metal wiring board 4 is formed by bending a metal plate such as a copper plate, and has a first joint 400 and a second joint 430. The first joint 400 is the part joined to the first pad 320A and the second pad 320B of the semiconductor element 3, and the second joint 430 is the part joined to the emitter terminal 620 provided on the case 6. The first joint 400 is provided with a separation part 410 that protrudes downward from the lower surface 401 facing the semiconductor element 3 and separates the bonding material 920A on the first pad 320A from the bonding material 920B on the second pad 320B. In the metal wiring board 4 illustrated in Figure 3, the separation portion 410 may be a portion that protrudes below (negative Z-direction) the dashed line that is continuous with the lower surface 401 of the first joint portion 400. The shape and manufacturing method of the separation portion 410 will be described later.

[0022] The semiconductor element 3 has a gate electrode 340 on its upper surface which is electrically connected to a gate terminal 630 provided on the case 6 by a bonding wire 5. The gate electrode 340 of the semiconductor element 3 is connected to one end in the extension direction (Y direction) of a runner portion 341 that passes between the first pad 320A and the second pad 320B, as will be described later with reference to Figure 5A, etc., and for example, a plating layer (not shown) is formed on its upper surface. The plating layer on the upper surface of the gate electrode 340 is exposed on the upper surface of the semiconductor element 3.

[0023] The case 6 of the semiconductor device 1 described above includes a rectangular ring-shaped insulating member 600 surrounding the wiring board 2 in an XY plan view, and a collector terminal 610, an emitter terminal 620, and a gate terminal 630 attached to the insulating member 600. The case 6 is attached to the cooler 7 by adhesive or by fastening with bolts. The hollow portion surrounded by the inner circumferential wall surface 603 of the insulating member 600 is filled with a sealing material 8 that seals the wiring board 2, semiconductor elements 3, and metal wiring board 4, etc. The opening area of ​​the upper surface 601 of the insulating member 600 may be covered with a lid member (not shown). In Figure 2, the outer terminal portion 612 of the collector terminal 610 and the outer terminal portion 622 of the emitter terminal 620, which extend upward from the upper surface 601 of the insulating member 600, may be bent to follow the upper surface 601 of the insulating member 600.

[0024] Figure 5 shows a top view (Figure 5A) and a cross-sectional view (Figure 5B) of an example configuration of the top electrode of a semiconductor device. Figure 6 shows a top view (Figure 6A) of an example of the planar shape of the insulating layer separating the main electrode and a top view (Figure 6B) of an example of the planar shape of the separation portion of the metal wiring board. Figure 7 is a perspective view of the junction between the main electrode of the semiconductor device and the metal wiring board.

[0025] On the upper surface of the semiconductor element 3 on which the IGBT element 110 described above is formed, a first pad 320A and a second pad 320B, which are second main electrodes (emitter electrodes), and a gate electrode 340 are provided, as illustrated in Figures 5A and 5B. The gate electrode 340 is exposed near one edge (the positive edge in the Y direction in Figure 5A) on the upper surface of the semiconductor element 3, which is rectangular in an XY plane view, and is located in the central part in the X direction. The gate electrode 340 includes a runner portion 341 that extends toward the negative edge in the Y direction, and the runner portion 341 is covered by an insulating layer 350. The first pad 320A and the second pad 320B are arranged side by side in the X direction with the runner portion 341 extending in the Y direction in between. The first pad 320A and the second pad 320B are separated on the upper surface of the semiconductor element 3 by the insulating layer 350 that covers the runner portion 341.

[0026] The insulating layer 350 separating the first pad 320A and the second pad 320B may be provided, for example, as shown in Figure 6A, such that it has a wide section (second section) 352 in the central part in the extending direction (Y direction) that is wider than the ends. In contrast, the portion of the runner section 341 passing between the first pad 320A and the second pad 320B may have a dimension (width) in the X direction perpendicular to the extending direction that is constant along the extending direction. In this example, the ends of the first pad 320A and the second pad 320B that extend along the runner section 341 may have a section where the gap with the runner section 341 is a first gap, and a section where the gap is a second gap that is wider than the first gap. The width G12 of the wide section 352 and the width G11 of the first section 351 on the positive Y direction side and the third section 353 on the negative Y direction side are not limited to specific values. For example, the width G11 of the first section 351 and the third section 353 may be 0.166 mm, and the width G12 of the wide section 352 may be 0.520 mm.

[0027] On the lower surface 401 (see Figure 3) of the first joint portion 400 of the metal wiring board 4 that joins the first pad 320A and the second pad 320B of the semiconductor element 3, a separation portion 410 corresponding to the insulating layer 350 when placed on the semiconductor element 3 is provided. If the insulating layer 350 has a wide section 352, the lower surface 401 of the first joint portion 400 of the metal wiring board 4 is provided with a separation portion 410 having a wide section 412 corresponding to the planar shape of the insulating layer 350, as illustrated in Figures 6B and 7. The width G22 of the wide section 412 of the separation portion 410 and the width G12 of the wide section 352 of the insulating layer 350 can be G22 ≥ G12, and it is more preferable that G22 = G12. The width G21 of the first section 411 and the third section 413 of the separation section 410 and the width G11 of the first section 351 and the third section 353 of the insulating layer 350 can be G21 ≥ G11, and it is more preferable that G21 = G11.

[0028] The separation portion 410 of the metal wiring board 4 can be formed, for example, by press working (half punching) using a mold as shown in FIG. 8. The mold includes a die 25, a stripper 26, and a punch 27. In the case of half punching, the punch 27 is pushed into the first joint portion 400 by an amount D2 (<D1) of pushing that does not punch out the flat plate-shaped first joint portion 400 having a thickness D1 sandwiched between the die 25 and the stripper 26. The punch 27 has a substantially identical planar shape of the lower end surface to the planar shape of the separation portion 410 and has a first section, a wide section (second section), and a third section. When the punch 27 is pressed against the upper surface of the first joint portion 400 of the metal wiring board 4 and pushed downward, the portion of the first joint portion 400 where the lower end surface of the punch 27 is in contact is displaced downward and protrudes downward from the lower surface 401 to become the separation portion 410. The separation portion 410 formed by half punching has a tip surface 415 substantially parallel to the lower surface 401 of the first joint portion 400, and a pair of side surfaces 416 and 417 connected to the tip surface 415 and the lower surface 401 of the first joint portion 400 are substantially perpendicular to the lower surface 401 of the first joint portion 400. FIG. 8 shows a portion where the wide section 412 of the separation portion 410 is formed. In the positive Y direction (the back side of the drawing) and the negative Y direction (the front side of the drawing) with respect to the portion illustrated in FIG. 8, first sections 411 and third sections 413 having a smaller width than the wide section 412 are formed. The pushing amount D2 can be set, for example, based on the thicknesses of the bonding materials 920A and 920B that bond the first pads 320A and the second pads 320B of the semiconductor element 3 to the first joint portion 400 of the metal wiring board 4. For example, when the thicknesses of the bonding materials 920A and 920B that can ensure bonding reliability are 0.3 mm, the thickness D1 of the first joint portion 400 of the metal wiring board 4 can be set to 0.5 mm, and the pushing amount D2 can be set to 0.3 mm. When the pushing amount D2 is set to 0.3 mm, the formed separation portion 410 has a height of 0.3 mm from the lower surface 401 of the first joint portion 400. Therefore, for example, as shown in FIG. 3, the bonding materials 920A and 920B can be made to have a predetermined thickness (for example, 0.3 mm) in a state where the tip surface (lower end surface) of the separation portion 410 is in contact with the insulating layer 350.

[0029] Figure 9 shows a top view (Figure 9A) and a cross-sectional view (Figure 9B) illustrating an example of a bonding procedure between the main electrodes of a semiconductor element and a metal wiring board. When bonding the first pad 320A and the second pad 320B of the semiconductor element 3 to the metal wiring board 4, first, bonding materials 920A and 920B are placed on the first pad 320A and the second pad 320B of the semiconductor element 3, as illustrated in Figures 9A and 9B. The bonding materials 920A and 920B to be placed may be solder sheets, each having a planar shape that substantially matches the shape of the overlapping region between the exposed surfaces of the first pad 320A and the second pad 320B (actually the plating layer 321 on their upper surfaces) and the metal wiring board 4. After placing the bonding materials (solder sheets) 920A and 920B, the metal wiring board 4 is positioned so that the first bonding portion 400 is placed on top of the bonding materials 920A and 920B, as illustrated in Figure 9B. At this time, the metal wiring board 4 is positioned such that the separation portion 410 formed in the first joint portion 400 fits between the bonding material 920A and bonding material 920B, and the entire tip surface (lower end surface) 415 of the separation portion 410 is in contact with the upper surface of the insulating layer 350 (see Figure 3). Subsequently, the bonding materials 920A and 920B are heated and melted to bond the first pad 320A and the second pad 320B to the metal wiring board 4. At this time, the bonding material 920A and bonding material 920B are separated by the separation portion 410 of the metal wiring board 4 that is in contact with the insulating layer 350 of the semiconductor element 3. Therefore, it is possible to prevent the formation of a bridge on the insulating layer 350 by the molten bonding material 920A and bonding material 920B. In other words, by using a metal wiring board 4 in which a separation portion 410 is formed at the first joint portion 400, it is possible to prevent the formation of bridges that cause scattering of the bonding material when joining the first pad 320A and the second pad 320B of the semiconductor element 3 to the metal wiring board 4. Note that the bonding materials 920A and 920B for joining the main electrodes (first pad 320A and second pad 320B) of the semiconductor element 3 to the metal wiring board 4 are not limited to solder sheets. The bonding materials 920A and 920B before joining may be paste-type bonding materials such as solder cream or solder paste.

[0030] Figure 10 is a top view showing an example of a bridge that occurs when no separation section is provided in the metal wiring board. Figure 11 is a cross-sectional view of the junction between the main electrode of the semiconductor element and the metal wiring board, cut along the dashed line D-D' in Figure 10.

[0031] The first joint 400X of the metal wiring board 4 illustrated in Figures 10 and 11 differs from the first joint 400 in this embodiment in that it does not have a separation portion 410 on its lower surface 401. When the first joint 400X, which does not have a separation portion 410 on its lower surface 401, is joined to the first pad 320A and the second pad 320B of the semiconductor element 3 with bonding materials 920A and 920B, the first joint 400X and the insulating layer 350 of the semiconductor element 3 are separated. When the first joint 400X and the insulating layer 350 are separated, a portion of the molten bonding material may flow out onto the insulating layer 350 of the semiconductor element 3 or remain there, forming bridges 921 to 923 that connect bonding material 920A and bonding material 920B. As illustrated in Figure 11, bridges 921-923 may come into contact with the first joint 400X of the insulating layer 350 and the metal wiring board 4, creating an externally closed void (closed void) on the insulating layer 350. When the air in the closed void on the insulating layer 350 expands, for example due to heating to melt the bonding material, the pressure of the expanded air pushes bridges 921-923 outwards towards the end of the insulating layer 350 in the extension direction (Y direction) and causes them to scatter. Scattering of bridges 921-923 can also occur, for example, due to a heating process after the bonding process or expansion of the air in the closed void due to gases generated from the insulating layer 350. If the scattered bonding material adheres to and remains on the gate electrode 340, for example, as shown by the dotted line bonding material 925 in Figures 10 and 11, a connection failure between the gate electrode 340 and the bonding wire 5 may occur. Furthermore, if an electrode other than the first pad 320A, the second pad 320B, and the gate electrode 340 is exposed on the upper surface of the semiconductor element 3, a short circuit may occur due to scattered bonding material. In other words, semiconductor devices described in Patent Documents 1 to 3, etc., do not have a portion corresponding to the separation portion 410 on the lower surface 401 of the first bonding portion 400 according to this embodiment, so product defects are likely to occur due to the scattering of bonding material bridges formed on the insulating layer.

[0032] In contrast, the semiconductor device 1 of this embodiment, as described above, can prevent the formation of bridges on the insulating layer 350 by the separation portion 410 provided on the metal wiring board 4, thereby preventing product defects caused by the scattering of bonding material.

[0033] The semiconductor device 1 according to the first embodiment is not limited to a configuration comprising one semiconductor element 3 as described above with reference to Figures 1, 2, and 4. The semiconductor device 1 may be configured to comprise multiple semiconductor elements 3. Each of the multiple semiconductor elements 3 is not limited to having a switching element (e.g., IGBT element 110) and a diode element 120 formed on it. The multiple semiconductor elements may include semiconductor elements on which a switching element (e.g., IGBT element 110) is formed and semiconductor elements on which a diode element 120 is formed. The semiconductor device 1 comprising multiple semiconductor elements 3 may, for example, have the half-bridge inverter circuit 20 shown in Figure 4 formed on it.

[0034] The switching element of semiconductor element 3 is not limited to the IGBT element 110 described above. The switching element may be, for example, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) element, a BJT (Bipolar Junction Transistor) element, etc. When the switching element is a MOSFET element, the main electrode on the lower side of semiconductor element 3 may be called the drain electrode, and the main electrode on the upper side may be called the source electrode. Also, the diode element 120 is not limited to an FWD element. The diode element 120 may be, for example, an SBD (Schottky Barrier Diode) element, a JBS (Junction Barrier Schottky) diode element, an MPS (Merged PN Schottky) diode element, a PN diode element, etc. The substrate (substrate that can become the semiconductor layer 300 in Figures 3, 5B, etc.) on which the switching element such as the IGBT element 110 and the diode element are formed is not limited to a silicon substrate as described above, but may be, for example, a SiC (silicon carbide) substrate, a GaN (gallium nitride) substrate, etc. Furthermore, the switching elements and diode elements formed on the semiconductor element 3 are not limited to a specific structure. For example, the switching element may have a trench structure or a planar structure.

[0035] The electrodes provided on the upper surface of the semiconductor element 3 on which the switching element is formed may include auxiliary electrodes separate from the main electrode (emitter electrode) and gate electrode described above. For example, the auxiliary electrode may be an auxiliary emitter electrode or an auxiliary source electrode electrically connected to the main electrode on the upper surface. The auxiliary emitter electrode or auxiliary source electrode is connected to a drive circuit that generates a control signal to be applied to the gate electrode. The drive circuit uses the emitter potential from the auxiliary emitter electrode or the source potential of the auxiliary source electrode as a reference potential for the control signal potential (gate potential). The auxiliary electrode may be a temperature sense electrode electrically connected to a temperature sense unit that may be included in an inverter device, etc., to measure the temperature of the semiconductor element 3.

[0036] The second joint portion 430 (see Figure 2) in the metal wiring board 4, which is joined to the main electrodes 320A and 320B on the upper surface of the semiconductor element 3, may be joined to the conductive layer of the wiring board 2 instead of joining to the emitter terminal 620 of the case 6. Alternatively, the main electrodes 320A and 320B on the upper surface of the semiconductor element 3 may be joined to the inner terminal portion 621 of the emitter terminal 620 of the case 6 instead of the metal wiring board 4. In this case, a separation portion corresponding to the separation portion 410 of the metal wiring board 4 described above is formed on the surface of the inner terminal portion 621 of the emitter terminal 620 that faces the insulating layer 350 of the semiconductor element 3.

[0037] Furthermore, the semiconductor device to which the metal wiring board 4 described in this embodiment and the following embodiments can be applied is not limited to one equipped with the case 6 illustrated in Figures 1 and 2. The semiconductor device may be, for example, a DIP (Dual Inline Package) manufactured by sealing semiconductor elements 3, etc., using a transfer mold or compression mold with a mold. In this type of semiconductor device, for example, the second joint portion 430 of the metal wiring board 4 may extend to the outside of the device as an outer lead. Moreover, the semiconductor device may have a configuration in which the wiring board 2 and the cooler 7 are integrated, for example, a conductive layer 210 is formed on the upper surface of the cooler 7 via an insulating layer, and the insulating substrate 200 and conductive layer 220 are omitted.

[0038] [Second Embodiment] Figure 12 is a top view (Figure 12A) showing an example of the planar shape of the insulating layer separating the main electrodes in a semiconductor device according to the second embodiment, and a top view (Figure 12B) showing an example of the planar shape of the separation portion of the metal wiring board.

[0039] In this embodiment, variations in the shape of the separation portion 410 formed on the metal wiring board 4 will be described. For simplicity of explanation, the main electrodes (emitter electrodes) on the upper surface of the semiconductor element 3 joined to the metal wiring board 4 are the first pad 320A and the second pad 320B exemplified in the first embodiment (see Figure 6A). That is, the upper surface of the semiconductor element 3 is provided with the first pad 320A and the second pad 320B separated by an insulating layer 350 extending in the Y direction, as exemplified in Figure 12A. The insulating layer 350 has a wide section 352 in the central part of the extending direction (Y direction) in an XY plan view, which is wider (dimension in the X direction) than the first section 351 on one end side and the third section 353 on the other end side in the extending direction. At the first joint 400 of the metal wiring board 4, which is joined to the first pad 320A and the second pad 320B separated by the insulating layer 350 having such a planar shape, a separation portion 410 may be formed, the planar shape of the tip surface of which is a single rectangle. In other words, the separation portion 410 may be formed such that the planar shape of the tip surface is a constant width G22 from one end to the other in the extending direction of the insulating layer 350, as illustrated in Figure 12B. The width G22 of the separation portion 410 is set such that the relationship with the width G12 of the wide section 352 of the insulating layer 350 is G22≧G12, and more preferably G22=G12.

[0040] The separation portion 410 of the metal wiring board 4 according to this embodiment has a simpler shape compared to the separation portion 410 of the first embodiment, and is formed to a size corresponding to the width G12 of the wide section 352 of the insulating layer 350. For this reason, for example, when forming the separation portion 410 by press working, the variation in the shape of the separation portion 410 for each metal wiring board 4 can be reduced. In this embodiment, the case in which the insulating layer 350 of the semiconductor element 3 is provided with a wide section 352 is given as an example, but as illustrated in references 1 and 2, the insulating layer 350 of the semiconductor element 3 may have a constant width from one end to the other in the stretching direction (Y direction).

[0041] [Third Embodiment] Figure 13 is a top view illustrating an example of the configuration of the separation portion between the upper electrode of the semiconductor element and the metal wiring board in a semiconductor device according to the third embodiment.

[0042] This embodiment describes variations in the main electrodes (emitter electrodes) provided on the upper surface of the semiconductor element 3 and the corresponding shapes of the separation portions 410 of the metal wiring board 4. The main electrodes of the semiconductor element 3 joined to a single metal wiring board 4 are not limited to the two main electrodes 320A and 320B described above. For example, four main electrodes 320A to 320D and a gate electrode 340 may be provided on the upper surface of the semiconductor element 3, as shown in Figure 13. The four main electrodes 320A to 320D and the gate electrode 340 each have a plating layer 321 formed on their upper surface, and these plating layers 321 are exposed as part of each electrode. The four main electrodes 320A to 320D illustrated in Figure 13 can all be emitter electrodes of a switching element (e.g., an IGBT element 110), and are separated and arranged in a 2x2 matrix by a cross-shaped insulating layer 350 in an XY plan view. The cross-shaped insulating layer 350 may be an example of an insulating layer in which a first insulating layer extending in a first direction intersects with a second insulating layer extending in a second direction different from the first direction. In another view, the cross-shaped insulating layer 350 may be an example of an insulating layer having a starting region at the center of the cross and first to fourth extending regions extending from the starting region in four different directions. The widths (dimensions in the X direction) G13 of the two extending regions extending in the Y direction from the starting region in the cross-shaped insulating layer 350 and the widths (dimensions in the Y direction) G14 of the two extending regions extending in the X direction are not limited to specific values. The widths G13 of the extending region extending in the Y direction and the widths G14 of the extending region extending in the X direction may be different. The cross-shaped insulating layer 350 may have a wide section 352 as described in the first embodiment.

[0043] The first joint portion 400 of the metal wiring board 4, which is joined to four main electrodes (pads) 320A to 320D separated by a cross-shaped insulating layer 350, has a cross-shaped separation portion 410 in plan view that corresponds to the insulating layer 350. The cross-shaped separation portion 410 may be an example of a separation portion where a first separation portion extending in a first direction intersects with a second separation portion extending in a second direction. From another viewpoint, the cross-shaped separation portion 410 may be an example of a separation portion having a starting region and first to fourth partial protruding regions extending from the starting region in four different directions. The position of the starting region (center of the cross) of the separation portion 410 on the lower surface of the first joint portion 400 of the metal wiring board 4 is set according to the position of the first joint portion 400 which is positioned above the semiconductor element 3 during joining, and the position of the intersection region (starting region which is the center of the cross) in the insulating layer 350. The width G23 of the partial protruding region extending in the Y direction in the separation portion 410 is set such that the relationship with the width G13 of the extending region G13 of the insulating layer 350 extending in the Y direction is G23 ≥ G13, and more preferably G23 = G13. Similarly, the width G24 of the partial protruding region extending in the X direction in the separation portion 410 is set such that the relationship with the width G14 of the extending region G14 of the insulating layer 350 extending in the X direction is G24 ≥ G14, and more preferably G24 = G14.

[0044] The arrangement of the main electrodes on the upper surface of the semiconductor element 3 to be joined to a single metal wiring board 4 is not limited to the 2x2 matrix arrangement exemplified in Figure 13. The arrangement of the main electrodes to be joined to a single metal wiring board 4 may be, for example, an N×M matrix arrangement (where N and M are arbitrary integers, and N=M), or other arrangements. For example, in an N×M matrix arrangement, two adjacent main electrodes separated by an insulating layer may be replaced by one main electrode. For example, the extended region passing between the third main electrode 320C and the fourth main electrode 320D of the cross-shaped insulating layer 350 shown in Figure 13 may be omitted, and the third main electrode 320C and the fourth main electrode 320D may be replaced by one main electrode. In this example, the planar shape of the separation portion 410 is an inverted T shape having a partially protruding region extending in the X direction and a partially protruding region extending from that partially protruding region in the +Y direction.

[0045] [Fourth Embodiment] Figure 14 is a cross-sectional view showing an example of the configuration of a metal wiring board in a semiconductor device according to the fourth embodiment. The cross-section illustrated in Figure 14 corresponds to the cross-section illustrated in Figure 9B (i.e., the cross-section at the position C-C' of the dashed line in Figure 9A).

[0046] This embodiment describes variations in the method for forming a separation portion 410 in the first joint portion 400 of the metal wiring board 4. For simplicity of explanation, the main electrodes (emitter electrodes) on the upper surface of the semiconductor element 3 joined to the metal wiring board 4 are the first pad 320A and the second pad 320B as exemplified in the first embodiment (see Figure 6A). In the first embodiment, a method of forming the separation portion 410 by press working was described as an example of the method of forming the separation portion 410 (see Figure 8). When the separation portion 410 is formed in the first joint portion 400 of the metal wiring board 4 using the method described in the first embodiment, a recess corresponding to the separation portion 410 is formed on the upper surface of the first joint portion 400. However, the method of forming the separation portion 410 is not limited to such a method in which a recess is formed on the upper surface of the first joint portion 400. The method of forming the separation portion 410 may be a method in which the area on the upper surface of the first joint portion 400 corresponding to the separation portion 410 becomes a flat surface, as exemplified in Figure 14. From another perspective, the method for forming the separation portion 410 may be such that the thickness of the portion of the first joint 400 in which the separation portion 410 is formed is greater than the thickness of the portion facing the main electrodes 320A and 320B of the semiconductor element 3. The separation portion 410 of the metal wiring board 4 illustrated in Figure 14 may be a portion that protrudes downward (negative side in the Z direction) from the dashed line that is continuous with the lower surface 401 of the first joint 400. The first joint 400 having such a separation portion 410 can be formed, for example, by thinning the region outside the region of the first joint 400 that is designated as the separation portion 410, in a metal wiring board 4 where the entire first joint 400 has a thickness (D1 + D2) of the portion forming the separation portion 410. The separation portion 410 of the metal wiring board 4 according to this embodiment can be formed, for example, by etching, milling (cutting), etc., with the lower surface of the first joint 400 as the target of processing. Furthermore, the separation portion 410 of the metal wiring board 4 according to this embodiment may be formed by pressing the first joint portion 400 of a single thickness using a lower mold having a recess corresponding to the shape of the separation portion 410 and positioned on the lower surface side of the first joint portion 400, and a flat upper mold positioned on the upper surface side of the first joint portion 400, thereby thinning the area outside the area that will become the separation portion 410.

[0047] When a separation portion 410 is formed in the first joint portion 400 of the metal wiring board 4 using the method described in the first embodiment, a recess corresponding to the separation portion 410 is formed on the upper surface of the first joint portion 400, as described above. When a recess is formed, a portion may be created at the boundary between the region to be joined by the joining materials 920A and 920B in the first joint portion 400 and the separation portion 410 that is thinner than the region to be joined (see Figure 9B). As a result, the first joint portion 400 is prone to deformation in the portion that is thinner than the region to be joined. Deformation of the first joint portion 400 can cause variations in the distance from the upper surface of the main electrode (plating layer 321) of the semiconductor element 3 to the lower surface 401 of the first joint portion 400. As a result, for example, variations in the thickness of the joining materials 920A and 920B for each semiconductor device 1 may lead to greater variations in the joining strength of each semiconductor device 1, potentially increasing the probability of product defects. In contrast, in the metal wiring board 4 of this embodiment, there is no portion at the boundary between the area joined by the joining materials 920A and 920B at the first joint 400 and the separation portion 410 that is thinner than the area being joined. Therefore, in the metal wiring board 4 of this embodiment, the first joint 400 is less prone to deformation, and variations in the thickness of the joining materials 920A and 920B can be prevented from increasing the probability of product defects.

[0048] The planar shape of the separation portion 410 in the metal wiring board 4 according to this embodiment is not limited to a specific shape. The planar shape of the separation portion 410 is acceptable as long as the tip surface 415 contacts the insulating layer 350 of the semiconductor element 3 so that no bridge of the bonding material is formed, or so as to suppress the formation of a bridge of the bonding material. The separation portion 410 may be formed so that its planar shape is a single rectangle, as illustrated in Figure 12B. The separation portion 410 may also be formed so that its planar shape is a cross, as illustrated in Figure 13.

[0049] [Fifth Embodiment] Figure 15 is a cross-sectional view illustrating an example of the bonding procedure between the main electrode of a semiconductor element and a metal wiring board according to the fifth embodiment. Figure 16 is a cross-sectional view (Figures 16A to 16C) illustrating another example of the configuration of the metal wiring board according to the fifth embodiment.

[0050] This embodiment describes variations in the method of joining the main electrodes 320 on the upper surface of the semiconductor element 3 to the first joint portion 400 of the metal wiring board 4. In the embodiment described above, solder sheets are separately placed on each of the main electrodes (first pad 320A and second pad 320B) provided on the upper surface of the semiconductor element 3, and the metal wiring board 4 is positioned so that the separation portion 410 formed in the first joint portion 400 of the metal wiring board 4 is fitted between adjacent solder sheets. However, the method of joining the main electrodes 320A and 320B on the upper surface of the semiconductor element 3 to the first joint portion 400 of the metal wiring board 4 is not limited to this method. For example, the joining material placed on the upper surface of the semiconductor element 3 may be a single solder sheet (joining material 920) including a portion placed on the first pad 320A and a portion placed on the second pad 320B, as shown in Figure 15. When a single solder sheet is placed between the semiconductor element 3 and the metal wiring board 4, after placing the metal wiring board 4 on the solder sheet, the bonding material is melted while applying a pressing load to push the first joint 400 of the metal wiring board 4 toward the semiconductor element 3, for example, from the upper surface of the first joint 400 of the metal wiring board 4. When the bonding material melts, the separation portion 410 of the first joint 400 enters into the molten bonding material layer due to the pressing load applied to the first joint 400, pushing the molten bonding material on the insulating layer 350 onto the first pad 320A and the second pad 320B. As a result, the tip surface 415 of the separation portion 410 of the first joint 400 finally comes into contact with the insulating layer 350 of the semiconductor element 3, preventing the formation of a bonding material bridge on the insulating layer 350 and the occurrence of a closed void.

[0051] Furthermore, as illustrated in Figure 16A, the separation portion 410 of the metal wiring board 4 according to this embodiment may have a taper that narrows toward the tip surface 415 on the side surface 416 along the boundary between the region facing the first pad 320A on the lower surface of the first joint portion 400 and the side surface 417 along the boundary between the region facing the second pad 320B. By tapering the side surfaces 416 and 417 of the separation portion 410, the separation portion 410 can be smoothly pushed into the molten bonding material 920 layer, and the molten bonding material 920 on the insulating layer 350 can be pushed onto the first pad 320A and the second pad 320B. Note that when tapering the side surfaces 416 and 417 of the separation portion 410, the gradient θ of the side surface 416 (and the side surface 417 not shown) in Figure 16B is not limited to a specific value. Alternatively, instead of tapering the sides 416 and 417 of the separation portion 410, the corners where the tip surface 415 and the side surface 416 meet, and the corners where the tip surface 415 and the side surface 417 meet (not shown), may be chamfered, as shown in Figure 16C.

[0052] [Sixth Embodiment] Figure 17 is an exploded perspective view illustrating a method for forming a separation portion of a metal wiring board according to the sixth embodiment.

[0053] This embodiment describes yet another method for forming the separation portion 410 of the metal wiring board 4. In the above-described embodiment, the separation portion 410 of the metal wiring board 4 is formed by press working, etching, or cutting the first joint portion 400, which is a flat plate with uniform thickness. However, the method for forming the separation portion 410 is not limited to such methods. The separation portion 410 may be formed separately from the metal wiring board 4 having the first joint portion 400, which is a flat plate with uniform thickness, as shown in Figure 17, and attached to the lower surface 401 of the first joint portion 400. The separation portion 410 can be formed by well-known methods such as punching. The separation portion 410 is attached to the lower surface 401 of the first joint portion 400 by, for example, a bonding material, brazing material, etc. The separation portion 410 may also be attached to the lower surface 401 of the first joint portion 400 by, for example, ultrasonic bonding.

[0054] Furthermore, if the separation portion 410 is formed separately from the metal wiring board 4, for example, after placing the solder plate and the separation portion 410 on the upper surface of the semiconductor element 3, the metal wiring board 4 with the first joint portion 400 in a flat shape may be placed and the solder plate may be melted. As in this embodiment, the separation portion 410 may be formed as a separate component from the metal wiring board 4 and placed between the insulating layer 350 of the semiconductor element 3 and the metal wiring board 4. In this example, by making the shape of the separation portion 410 such that it has a flat surface in contact with the insulating layer 350 and a flat surface in contact with the lower surface of the first joint portion 400 of the metal wiring board 4, it is possible to prevent the formation of a bridge on the insulating layer 350.

[0055] The semiconductor device 1 of the above-described embodiment is not limited to a specific application, but is particularly suitable for applications requiring high current. For example, the semiconductor device 1 of the above-described embodiment can be applied to a power conversion device such as an inverter device that drives a motor mounted on a vehicle. A vehicle to which the semiconductor device 1 according to the present invention is applied will be described with reference to Figure 18.

[0056] Figure 18 is a schematic plan view showing an example of a vehicle to which the semiconductor device according to the present invention is applied. The vehicle 30 shown in Figure 18 may be, for example, a four-wheeled vehicle equipped with four wheels 31A to 31D. The vehicle 30 may be, for example, an electric vehicle that drives the wheels with a motor or the like, or a hybrid vehicle that uses the power of an internal combustion engine in addition to a motor. Furthermore, the vehicle to which the semiconductor device 1 is applied is not limited to a four-wheeled vehicle, but may also be a two-wheeled vehicle, a railway vehicle, or the like.

[0057] The vehicle 30 includes a drive unit 32 that provides power to the wheels 31A to 31D, and a control device 33 that controls the drive unit 32. The drive unit 32 may consist of, for example, a motor or at least one of an engine and motor hybrid. In a four-wheeled vehicle, the drive unit 32 is not limited to providing power to all four wheels 31A to 31D as illustrated in Figure 18. The drive unit 32 may provide power to either the two wheels referred to as the front wheels or the two wheels referred to as the rear wheels among the four wheels 31A to 31D.

[0058] The control device 33 performs control (e.g., power control) of the drive unit 32. The control device 33 includes the semiconductor device 1 of the embodiment described above. The semiconductor device 1 can be configured to perform power control to the drive unit 32. Although only one semiconductor device 1 is shown in Figure 18, in an actual vehicle 30, multiple semiconductor devices 1 may be used to form an inverter circuit such as the half-bridge inverter circuit 20 described above, referring to Figure 4. The vehicle 30 may also include the semiconductor device 1 of the embodiment described above as a semiconductor device that performs power control different from power control to the drive unit 32 (e.g., control of power supplied to various electrical components).

[0059] The semiconductor device 1 of the above-described embodiment is not limited to inverter devices for vehicles, but can also be applied to inverter devices for elevators, air conditioning systems, industrial pumps, and the like.

[0060] The embodiments of the semiconductor device 1 according to the present invention are not limited to those described above, and may be modified, substituted, or transformed in various ways without departing from the spirit of the technical idea. Furthermore, if the technical idea can be realized in a different way by advances in the technology or by other derived technologies, it may be implemented by that method. Accordingly, the claims cover all embodiments that may fall within the scope of the technical idea.

[0061] The following summarizes the key features of the embodiment described above. The semiconductor device according to the above-described embodiment is characterized by comprising: a semiconductor element having a plurality of adjacent metal layers exposed on a first surface with an insulating layer in between; a metal wiring board bonded to the plurality of metal layers of the semiconductor element via a bonding material; and a separation portion located between the semiconductor element and the metal wiring board, having a region that overlaps with the insulating layer in a plan view of the first surface, and separating the plurality of regions that overlap with each of the plurality of metal layers on the metal wiring board.

[0062] In the semiconductor device according to the above embodiment, the separation portion is a part of the metal wiring board.

[0063] In the semiconductor device according to the above embodiment, the separation portion has a flat surface at its tip, and the flat surface at its tip is in contact with the insulating layer of the semiconductor element.

[0064] In the semiconductor device according to the above embodiment, the separation portion is such that the dimension in the first direction of the region that overlaps with the insulating layer between adjacent metal layers in the first direction on the first surface of the semiconductor element is the same as the dimension in the first direction of the insulating layer.

[0065] In the semiconductor device according to the above embodiment, the plurality of metal layers of the semiconductor element are one of the pair of main electrodes of the switching element.

[0066] In the semiconductor device according to the above embodiment, the control electrode of the switching element is further exposed on the first surface of the semiconductor element, and the insulating layer is connected to the control electrode and covers a runner portion that extends between adjacent metal layers on the first surface.

[0067] In the semiconductor device according to the above embodiment, the insulating layer has, in a plan view of the first surface, a section in which the dimension in the direction perpendicular to the stretching direction is a first width, and a wide space that is wider than the first width.

[0068] In the semiconductor device according to the above embodiment, the separation portion is separate from the metal wiring board and has a flat surface in contact with the insulating layer of the semiconductor element and a flat surface in contact with the metal wiring board.

[0069] The semiconductor device according to the above embodiment further comprises an insulating member that seals the semiconductor element and the metal wiring board.

[0070] The semiconductor device according to the above embodiment further comprises a cooler that is thermally connected to the semiconductor element.

[0071] The vehicle according to the above-described embodiment is equipped with the semiconductor device according to the above-described embodiment. [Industrial applicability]

[0072] As described above, the present invention can prevent product defects caused by the scattering of bonding material used to join the main electrode of a semiconductor element to a metal wiring board, and is particularly useful for application to power conversion devices for vehicles and industrial use that require high currents. [Explanation of symbols]

[0073] 1, 1A, 1B... Semiconductor equipment, 110... IGBT element, 120... Diode element 2... Wiring board, 200... Insulating substrate, 210, 220... Conductive layer, 3...Semiconductor element, 300...Semiconductor layer, 310...First main electrode, 320A...Second main electrode (first pad), 320B...Second main electrode (second pad), 321...Plating layer, 330...Gate oxide film, 340...Gate electrode, 341...Runner portion, 350...Insulating layer, 351...First section, 352...Wide section (second section), 353...Third section 4…Metal wiring board, 400, 400X…First joint, 401…Bottom surface, 410…Separation section, 411…First section, 412…Wide section (second section), 413…Third section, 415…Front surface, 416, 417…Side, 430…Second joint, 5…Bonding wire, 6...Case, 600...Insulating material, 601...Top surface, 603...Inner peripheral wall surface, 610...Collector terminal, 611...Inner terminal section, 612...Outer terminal section, 620...Emitter terminal, 621...Inner terminal section, 622...Outer terminal section, 630...Gate terminal, 7...Cooler, 8...Sealing material, 900, 910, 920A, 920B...Bonding material, 921, 922, 923...Bridge, 925...(Scattered) bonding material 10... Conductive block, 20... Half-bridge inverter circuit, 21 Intermediate terminal, 25...Die, 26...Stripper, 27...Punch 30...Vehicle, 31A~31D...Wheels, 32...Drive unit, 33...Control device

Claims

1. A semiconductor device in which multiple adjacent metal layers are exposed on the first surface, separated by an insulating layer, A metal wiring board bonded to the plurality of metal layers of the semiconductor element via a bonding material, A separation portion is located between the semiconductor element and the metal wiring board, having a region that overlaps with the insulating layer in a plan view of the first surface, and separating a plurality of regions that overlap with each of the plurality of metal layers in the metal wiring board, A semiconductor device equipped with a semiconductor device.

2. The semiconductor device according to claim 1, wherein the separation portion is a part of the metal wiring board.

3. The semiconductor device according to claim 2, wherein the separation portion has a flat surface at its tip, and the flat surface at its tip is in contact with the insulating layer of the semiconductor element.

4. The semiconductor device according to claim 1, wherein the dimension in the first direction of the region in which the separation portion overlaps with the insulating layer between adjacent metal layers in the first direction on the first surface of the semiconductor element is the same as the dimension in the first direction of the insulating layer.

5. The semiconductor device according to claim 1, wherein the plurality of metal layers of the semiconductor element are one of the pair of main electrodes of a switching element.

6. The control electrode of the switching element is further exposed on the first surface of the semiconductor element. The insulating layer is connected to the control electrode and covers a runner portion that extends between adjacent metal layers on the first surface. The semiconductor device according to claim 5.

7. The semiconductor device according to claim 1, wherein the insulating layer has, in a plan view of the first surface, a section in which the dimension in the direction perpendicular to the stretching direction is a first width, and a wide section that is wider than the first width.

8. The semiconductor device according to claim 1, wherein the separation portion is separate from the metal wiring board and has a flat surface in contact with the insulating layer of the semiconductor element and a flat surface in contact with the metal wiring board.

9. The semiconductor device according to claim 1, further comprising an insulating member for sealing the semiconductor element and the metal wiring board.

10. The semiconductor device according to claim 1, further comprising a cooler that is thermally connected to the semiconductor element.

11. A vehicle comprising a semiconductor device according to any one of claims 1 to 10.

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