Indication device
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2026-02-25
- Publication Date
- 2026-06-09
AI Technical Summary
【0042】 本発明の一態様によれば、トランジスタの作製工程におけるフォトリソグラフィ工程を増 加させず、且つ半導体層の劣化を低減することができる。
Smart Images

Figure 2026094259000001_ABST
Abstract
Claims
[Claim 1] A transistor having a gate electrode, a semiconductor layer, a protective layer, a first electrode, and a second electrode, A first wire electrically connected to the gate electrode, A second wire electrically connected to the first electrode, A pixel electrode electrically connected to the aforementioned two electrodes, Capacitive wiring and It has a groove and, The protective layer has a region that is in contact with the upper surface of the semiconductor layer. The semiconductor layer and the protective layer are provided so as to overlap the first wiring, the second wiring, the pixel electrode, and the capacitive wiring. The first electrode is electrically connected to the semiconductor layer at a first opening provided in the protective layer. The second electrode is electrically connected to the semiconductor layer at a second opening provided in the protective layer. The groove portion is provided on the first wiring, crossing in the direction of the line width of the first wiring. The groove portion is provided on the capacitance wiring, crossing in the direction of the line width of the capacitance wiring. The groove portion is provided in a direction parallel to the direction in which the second wiring extends, and extends beyond the end of the pixel electrode, in a display device.