Method for manufacturing a semiconductor substrate, and semiconductor substrate

Abstract

The objective of the invention is to provide an improved solution for realizing semiconductor substrates. [Solution] The present invention relates to a method for manufacturing a semiconductor substrate 100. The method comprises supplying a base substrate 10. The method further comprises growing a first group III nitride semiconductor layer 20 on the base substrate 10 along a growth direction A under a hyperstoichiometric nitrogen supply, wherein the surface 22 of the first group III nitride semiconductor layer 20 includes depressions 24 defined by facets 26 of the first group III nitride semiconductor layer 20 oriented obliquely to the growth direction A. The method further comprises growing a second group III nitride semiconductor layer 30 on the first group III nitride semiconductor layer 20 along the growth direction A, covering the depressions 24. The present invention further relates to a semiconductor substrate 100 preferably manufactured by this method.

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor substrate, and to a semiconductor substrate, preferably a semiconductor substrate manufactured by the method. The semiconductor substrate is preferably used as a template or pseudo-substrate for epitaxially growing other semiconductor structures on it. Accordingly, the present invention is applicable to the fields of manufacturing solar cells, high-performance electronic devices, and / or light-emitting diodes, particularly light-emitting diodes in the red spectral region. [Background technology]

[0002] The manufacture of semiconductor devices based on Group III nitride semiconductors, i.e., compounds of one or more metals belonging to the third main group (group 13) of the periodic table (particularly Al, Ga, In) and nitrogen, generally requires epitaxial growth. Because it is difficult to grow high-quality Group III nitride bulk crystals, most component structures (element structures, constituent structures) in this class of materials are produced by heteroepitaxy on substrates formed of other materials, such as sapphire.

[0003] Conventional methods (approaches) fail to yield satisfactory results, especially with group III nitride semiconductors containing over 30% indium, or require complex mechanical structuring steps or etching processes, which increases manufacturing costs. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] European Patent No. 1673815 [Disclosure of the Invention]

[0005] The object of the present invention is to realize an improved solution for realizing semiconductor substrates, particularly for the epitaxial growth of subsequent group III nitride semiconductor structures, which emit light in the red spectral region. It is desirable that this solution is simpler and / or less expensive than conventional methods and / or eliminates (avoids) the drawbacks of conventional methods. A particularly preferred object of the present invention is to realize a semiconductor substrate having the smoothest possible surface, a low dislocation density on the surface, and / or the highest possible degree of relaxation, which is particularly suitable for the subsequent growth of group III nitride semiconductors having an indium content of more than 30%.

[0006] Summary of the Invention These objectives (problems) can be achieved (solved) by the features described in the independent claims. Advantageous embodiments and applications of the present invention are described in the dependent claims and will be described in more detail below with partial reference to the drawings.

[0007] According to a first independent aspect (viewpoint, feature) of this disclosure, a method for manufacturing a semiconductor substrate is realized (provided).

[0008] This method involves supplying a base substrate. For example, the base substrate may include layers of sapphire, silicon carbide, or silicon, on which layers of GaN or AlN can be grown (e.g., epitaxially). However, in principle, the base substrate may also be a group III nitride single crystal.

[0009] The method further involves growing a first group III nitride semiconductor layer (e.g., an (In,Ga)N semiconductor layer or a GaN semiconductor layer) on a base substrate along the growth direction (e.g., a growth direction oriented perpendicular to the main extension plane (extension surface) of the base substrate) under hyperstoichiometric nitrogen supply (e.g., by molecular beam epitaxy and / or metal-organic gas-phase epitaxy). Thus, the growth of the first group III nitride semiconductor layer can be carried out under "nitrogen-rich" or "metal-poor" conditions. For example, during the growth period of the first group III nitride semiconductor layer (during growth), the ratio of the particle flux of nitrogen species (stickstoffspezies) (e.g., particle flux of nitrogen radicals from a plasma source) to the particle flux (e.g., total particle flux) of metal atoms (e.g., from a metal evaporation (deposition) apparatus) of one group III element used (e.g., Ga in the case of a GaN semiconductor layer) or multiple group III elements used (e.g., In+Ga in the case of an (In,Ga)N semiconductor layer) may be greater than 1.2, preferably greater than 1.4, and particularly preferably greater than 1.6.

[0010] The surface of the first group III nitride semiconductor layer includes a plurality of depressions (e.g., gaps, recesses, and / or trenches) (for example, as a result of hyperstoichiometric nitrogen supply during the growth period), and these depressions are defined (e.g., in at least a plurality of sections) by a plurality of facets of the first group III nitride semiconductor layer that are oriented obliquely to the growth direction (e.g., inclined at an angle of 45° to 10° with respect to the growth direction). Therefore, the surface of the first group III nitride semiconductor layer is preferably not smooth and has a rough or structured appearance. Preferably, each facet plays a role in terminating (ending) dislocations (e.g., linear or through dislocations) in the first group III nitride semiconductor layer. For example, each dislocation may be terminated (or become a source) at each facet (e.g., at least partially). Each facet can, for example, prevent further dislocation propagation in subsequent growth steps.

[0011] The method further includes growing (e.g., epitaxially growing) a second group III nitride semiconductor layer (e.g., an (In,Ga)N semiconductor layer) on the first group III nitride semiconductor layer in the direction of growth (e.g., to form a semiconductor substrate) (e.g., by molecular beam epitaxy and / or organometallic vapor phase epitaxy). For example, after this growth step, the aforementioned surface of the first group III nitride semiconductor layer may be embedded beneath the second group III nitride semiconductor layer and thus located inside the semiconductor substrate. It is preferable that the second group III nitride semiconductor layer is grown in an elastically relaxed state as a result of mechanical interaction with the first group III nitride semiconductor layer. For example, the second group III nitride semiconductor layer may have a lattice constant that is essentially (substantially) corresponding to the lattice constant of the unstrained material, e.g., the lattice constant of the corresponding group III nitride single crystal.

[0012] This makes it possible to advantageously realize a semiconductor substrate with the smoothest possible surface and no defects, which is particularly suitable for the epitaxial growth of Group III nitride semiconductor structures. Compared to other processes, the proposed solution does not require “top-down” structuring or etching. Therefore, this process is particularly simple, effective, time-saving, and economical. By intentionally forming the first Group III nitride semiconductor layer with the roughest possible structure, it is possible to achieve “specified endpoints” (Sollterminierungsstellen: intentionally formed endpoints) for each dislocation, thereby preventing further propagation of dislocations and giving a favorable effect on the surface quality of the second Group III nitride semiconductor layer. Furthermore, the recesses, due to the existing free space (Freiraeume), enable elastic relaxation of the second group III nitride semiconductor layer, particularly through so-called "strain partitioning," which results in the formation of a surface that is as smooth and defect-free as possible. Another particularly advantageous aspect of the solution described herein is that nearly perfect crystal growth can be achieved even with a high indium content in the second group III nitride semiconductor layer. In particular, since the emission color of the (In,Ga)N light-emitting diode is determined by the indium content, different emission colors, especially red, can be produced using the same material system.

[0013] According to a first embodiment, growing a first group III nitride semiconductor layer involves forming a plurality of depressions and / or a plurality of facets. For example, the plurality of depressions and / or a plurality of facets may be formed (e.g., grown) during the growth period of the first group III nitride semiconductor layer (e.g., due to a hyperstoichiometric nitrogen supply). This has the advantage of providing (forming) a corresponding interface for terminating each dislocation.

[0014] According to another aspect, the grown first group-III nitride semiconductor layer may be nanostructured and / or faceted. Preferably, the grown first group-III nitride semiconductor layer does not include a smooth surface (e.g., a smooth surface perpendicular to the growth direction). Thereby, as an advantage, a favorable (positive) influence on the growth of the second group-III nitride semiconductor layer can be exerted.

[0015] According to a first aspect, the grown first group-III nitride semiconductor layer may include a plurality of dislocations (e.g., linear dislocations or threading dislocations) (e.g., due to lattice mismatch between the first group-III nitride semiconductor layer and the base substrate). Preferably, at least some (several) of these dislocations extend (e.g., continuously) or extend between the base substrate and one of the plurality of depressions and / or the plurality of facets. For example, each of the plurality of dislocations may occur (initiate) at an interface with the base substrate (e.g., one interface on the upper surface of the base substrate) and may end (terminate) at one of the plurality of facets. Thereby, as an advantage, a plurality of strains (Verspannungen: strain stress) in the first group-III nitride semiconductor layer can be reduced (relaxed).

[0016] According to another aspect, the first group-III nitride semiconductor layer and / or the second group-III nitride semiconductor layer may be (each) substantially relaxed (strained) and / or may have a lattice constant substantially corresponding to the lattice constant of the corresponding group-III nitride bulk crystal. Thereby, as an advantage, the growth of another semiconductor structure on the semiconductor substrate is promoted.

[0017] According to another aspect, during the growth period of the first group-III nitride semiconductor layer (for example, when the first group-III nitride semiconductor layer is a binary group-III nitride semiconductor layer, such as GaN), the ratio between the particle flux of nitrogen species (for example, nitrogen radicals) (which are, for example, growth-related or reactive) and the particle flux of group-III elements (or the group-III elements used) towards the base substrate, such as Ga, may be greater than 1.2, preferably greater than 1.4, particularly preferably greater than 1.6.

[0018] Alternatively, during the growth period of the first group-III nitride semiconductor layer (for example, when the first group-III nitride semiconductor layer is a ternary group-III nitride semiconductor layer, such as (In,Ga)N), the ratio between the particle flux of nitrogen species (for example, nitrogen radicals) (which are, for example, growth-related or reactive) and the total particle flux of group-III elements (or the group-III elements used) towards the base substrate, such as In + Ga, may be greater than 1.2, preferably greater than 1.4, particularly preferably greater than 1.6. In this context, these nitrogen-rich growth conditions have been found to be particularly advantageous for the formation of the recesses.

[0019] The adjustment of the corresponding particle fluxes, or the adjustment of a supra-stoichiometric (exceeding the stoichiometric ratio) or sub-stoichiometric (less than the stoichiometric ratio) nitrogen supply, can generally be monitored, for example, using appropriate (for example, in-situ) methods. For example, the intensity of the diffracted reflection measured by reflection high-energy electron diffraction (RHEED) can be used to infer the accumulation or build-up of a metal (for example, in the form of metal droplets) on the surface, which, for example, indicates a sub-stoichiometric nitrogen supply. Also, RHEED can be used to detect the roughening (Aufrauen) of the surface during the growth period of the first group-III nitride semiconductor layer, which indicates the presence of a sufficiently supra-stoichiometric nitrogen supply.

[0020] Furthermore, the corresponding particle flux can, in principle, be determined or measured using a flux sensor (e.g., commercially available) based on the detection of ion flux (current) proportional to the total particle flux. Additionally or alternatively, the particle flux can also be determined, measured, or adjusted based on simulations.

[0021] Considering that detecting nitrogen species particle flux in a plasma source with sensors can sometimes be complex, the nitrogen species particle flux can also be calibrated using the growth of a test layer. For example, if there is a significant excess of metal (which limits growth by nitrogen species), a GaN test layer can be grown at the growth temperature at which GaN grows stoichiometrically for a certain period of time at the later base substrate location. Then, the resulting layer thickness, time, and crystal structure of the GaN can be used to draw conclusions (determine) about the respective particle fluxes. By maintaining the operating parameters of the nitrogen source and, accordingly, lowering the temperature of the metal evaporator (Metallverdampfertemperatur) that determines the particle flux, corresponding (suitable) "nitrogen-rich" or "metal-rich" growth conditions can be achieved for the actual growth of a group III nitride semiconductor layer.

[0022] In another embodiment, the growth of the first group III nitride semiconductor layer and the growth of the second group III nitride semiconductor layer can be carried out in an uninterrupted (e.g., continuous and / or consistent) growth process. Therefore, it is preferable that the growth of the first group III nitride semiconductor layer and the growth of the second group III nitride semiconductor layer be carried out immediately (without delay) and / or without intermediate cooling of the base substrate. However, it is preferable that at least one process parameter is changed during a certain (or its) transition period from the growth of the first group III nitride semiconductor layer to the growth of the second group III nitride semiconductor layer. For example, the temperature of the base substrate, the nitrogen supply, and / or the supply of group III elements may be changed. As an example, in one embodiment, the total particle flux of the metal atoms of the Group III element used (e.g., In+Ga in the case of an (In,Ga)N semiconductor layer) can be kept constant, and the particle flux of nitrogen species can be reduced during the transition period between the growth of the first and second Group III nitride semiconductor layers. Therefore, as an advantage, the semiconductor substrate can be manufactured as quickly as possible (in a short time).

[0023] In another embodiment, the first group III nitride semiconductor layer can be grown by molecular beam epitaxy and / or organometallic vapor phase epitaxy.

[0024] Additionally or alternatively, the growth of the second group III nitride semiconductor layer can also be carried out by molecular beam epitaxy and / or organometallic vapor phase epitaxy.

[0025] In another embodiment, the base substrate may contain (for example, exclusively) a group III nitride single crystal (e.g., bulk). The group III nitride single crystal may be a binary group III nitride single crystal (e.g., a GaN single crystal or an AlN single crystal) or a ternary group III nitride single crystal (e.g., an (In,Ga)N single crystal or an (Al,Ga)N single crystal).

[0026] Alternatively, the base substrate may contain (for example, exclusively) sapphire, silicon, or silicon carbide. For example, the base substrate may contain (for example, exclusively) a bulk sapphire single crystal, (for example, exclusively) a bulk silicon single crystal, or (for example) a bulk silicon carbide single crystal. For example, the base substrate may have a thickness of more than 200 μm, preferably more than 400 μm, and / or may be in the shape of a disc or circular disk (wafer) with a diameter of 200 mm (8-inch wafer) or 300 mm (12-inch wafer).

[0027] Alternatively, the base substrate may (for example, exclusively) include a sapphire layer having a group III nitride semiconductor layer (e.g., an AlN or GaN layer) of the base substrate (e.g., a binary or ternary system). The group III nitride semiconductor layer of the base substrate can be grown on the sapphire layer, for example, by hybrid vapor phase epitaxy and / or organometallic vapor phase epitaxy. Preferably, the sapphire layer has a thickness of more than 200 μm, preferably more than 400 μm. In contrast, it is preferable that the group III nitride semiconductor layer of the base substrate has a thickness of less than 10 μm.

[0028] Alternatively, the base substrate may (for example, exclusively) include a silicon layer having a group III nitride semiconductor layer (e.g., an AlN layer or a GaN layer) of the base substrate (e.g., a binary or ternary system). The group III nitride semiconductor layer of the base substrate can be grown on the silicon layer by, for example, hybrid vapor phase epitaxy and / or organometallic vapor phase epitaxy. The silicon layer is preferably thicker than 200 μm, preferably thicker than 400 μm, and / or in the shape of a disc (wafer) with a diameter of 200 mm (8-inch wafer) or 300 mm (12-inch wafer). On the other hand, the group III nitride semiconductor layer of the base substrate is preferably less than 10 μm thick.

[0029] Alternatively, the base substrate may (for example, exclusively) include a silicon carbide layer having a group III nitride semiconductor layer (e.g., an AlN layer or a GaN layer) of the base substrate (e.g., a binary or ternary system). The group III nitride semiconductor layer of the base substrate can be grown on the silicon carbide layer, for example, by hybrid vapor phase epitaxy and / or organometallic vapor phase epitaxy. The silicon carbide layer is preferably thicker than 200 μm, preferably thicker than 400 μm, and / or in the shape of a disc (wafer) with a diameter of 200 mm (8-inch wafer) or 300 mm (12-inch wafer). On the other hand, the group III nitride semiconductor layer of the base substrate is preferably less than 10 μm thick.

[0030] In one embodiment, the first group III nitride semiconductor layer may be a ternary group III nitride semiconductor layer, such as an (In,Ga)N semiconductor layer. However, in principle, the first group III nitride semiconductor layer may be an (Al,Ga)N semiconductor layer.

[0031] In a particularly preferred embodiment, the first group III nitride semiconductor layer may be an (In,Ga)N semiconductor layer, and during the growth period of the first group III nitride semiconductor layer, the ratio of the indium atom particle flux to the total particle flux of indium and gallium atoms on the base substrate is greater than 0.2, preferably greater than 0.3.

[0032] In another embodiment (for example, when the first group III nitride semiconductor layer is a ternary group III nitride semiconductor layer, such as (In,Ga)N or (Al,Ga)N), the growth of the first group III nitride semiconductor layer can be carried out at a base substrate temperature of 400°C to 700°C, preferably 500°C to 600°C. In this context, it has been found that these temperatures are particularly favorable for the formation of facets in the (In,Ga)N semiconductor layer under hyperstoichiometric nitrogen supply.

[0033] In another embodiment (for example, when the first group III nitride semiconductor layer is a ternary group III nitride semiconductor layer, such as (In,Ga)N or (Al,Ga)N), the second group III nitride semiconductor layer may also be a ternary group III nitride semiconductor layer. The second group III nitride semiconductor layer is preferably an (In,Ga)N semiconductor layer, and particularly preferably In x Ga 1-x This is an N semiconductor layer (where the indium content x is between 0.2 and 0.3, i.e., 0.2 ≤ x ≤ 0.3). Therefore, the indium content x should preferably relate to the total metal content, i.e., In + Ga. An advantage is that this makes it possible to achieve a (In,Ga)N surface that is as flat and defect-free as possible, which is particularly advantageous for further growth of the semiconductor structure.

[0034] In another embodiment (for example, when the first group III nitride semiconductor layer is a ternary group III nitride semiconductor layer, such as (In,Ga)N or (Al,Ga)N), the growth of the second group III nitride semiconductor layer can be carried out under quasi-stoichiometric nitrogen supply. Thus, the growth of the second group III nitride semiconductor layer can be carried out under "nitrogen-poor" or "metal-rich" conditions. Consequently, an advantage is that a particularly smooth and defect-free second group III nitride semiconductor layer can be produced.

[0035] In another embodiment, (for example, when the first group III nitride semiconductor layer is a ternary group III nitride semiconductor layer, such as (In,Ga)N or (Al,Ga)N), during the growth period of the second group III nitride semiconductor layer (for example, when the second group III nitride semiconductor layer is (similarly) a ternary group III nitride semiconductor layer, such as (In,Ga)N or (Al,Ga)N), the ratio of the nitrogen species particle flux to the total particle flux of group III elements toward the base substrate (or the total particle flux of group III elements used), such as In+Ga or Al+Ga, is less than 0.9, preferably less than 0.8, and particularly preferably less than 0.7. An advantage is that the second group III nitride semiconductor layer can be made as smooth as possible.

[0036] Alternatively, for example, if the second group III nitride semiconductor layer is a binary group III nitride semiconductor layer, such as GaN or AlN, the ratio of the nitrogen species particle flux to the group III element particle flux (or the group III element particle flux used) on the base substrate, such as Ga or Al, can be less than 0.9, preferably less than 0.8, and particularly preferably less than 0.7. In this case as well, an advantage is that a second group III nitride semiconductor layer that is as smooth as possible can be produced.

[0037] In another embodiment (for example, when the second group III nitride semiconductor layer is a ternary group III nitride semiconductor layer, such as (In,Ga)N or (Al,Ga)N), the growth of the second group III nitride semiconductor layer can be carried out at a base substrate temperature of 400°C to 700°C, preferably 500°C to 600°C, for example, in the case of (In,Ga)N. The inventors have found that these temperatures are particularly advantageous for forming a second group III nitride semiconductor layer that is as smooth and defect-free as possible, especially in the case of quasi-stoichiometric nitrogen supply.

[0038] Alternatively (for example, if the second group III nitride semiconductor layer is a ternary group III nitride semiconductor layer, such as (In,Ga)N or (Al,Ga)N), the growth of the second group III nitride semiconductor layer can be carried out at a base substrate temperature of 700°C to 900°C, preferably 750°C to 850°C, for example, in the case of (Al,Ga)N.

[0039] In another or further embodiment, the first group III nitride semiconductor layer may be a binary group III nitride semiconductor layer, preferably a GaN semiconductor layer. However, in principle, the first group III nitride semiconductor layer may be an AlN semiconductor layer.

[0040] In another embodiment (for example, when the first group III nitride semiconductor layer is a binary group III nitride semiconductor layer, such as GaN or AlN), the growth of the first group III nitride semiconductor layer can be carried out at a base substrate temperature of 600°C to 800°C, preferably 650°C to 750°C, preferably substantially 700°C, in the case of GaN, for example. In this context, it has been found that these temperatures are particularly advantageous for facet formation in the case of hyperstoichiometric nitrogen supply.

[0041] Alternatively (for example, if the first group III nitride semiconductor layer is a binary group III nitride semiconductor layer, such as GaN or AlN), the growth of the first group III nitride semiconductor layer can be carried out at a base substrate temperature of 800°C to 1000°C, preferably 850°C to 950°C, in the case of AlN, for example.

[0042] In another embodiment, several process parameters during the growth period of the first group III nitride semiconductor layer (e.g., base substrate temperature, evaporation rate, N / Ga or N / Al particle flux ratio, etc.) can be selected in such a way that the first group III nitride semiconductor layer undergoes preferably dynamic roughening (e.g., formation of pyramidal structures). Dynamic roughening can be understood as the occurrence of surface irregularities or roughness due to dynamic processes during the (probabilistic) layer growth period, such as when the diffusion length of adsorbed atoms is insufficient for the formation of a smooth surface. The process parameters required for this can be determined by a person skilled in the art through corresponding appropriate growth experiments.

[0043] In another embodiment (for example, when the first group III nitride semiconductor layer is a binary group III nitride semiconductor layer, such as GaN or AlN), the second group III nitride semiconductor layer is a ternary group III nitride semiconductor layer, preferably (In,Ga)N, and particularly preferably In x Ga 1-x N may be (where the In content x is between 0.2 and 0.3, i.e., 0.2 ≤ x ≤ 0.3). Therefore, the first and second group III nitride semiconductor layers may contain different chemical compositions.

[0044] In another embodiment (for example, when the first group III nitride semiconductor layer is a binary group III nitride semiconductor layer, such as GaN or AlN), the growth of the second group III nitride semiconductor layer can be carried out at a base substrate temperature of 600°C to 800°C, preferably 650°C to 750°C, for example, in the case of GaN. The inventors have found that these temperatures are particularly advantageous for forming a second group III nitride semiconductor layer made of GaN that is as smooth and defect-free as possible, especially when growing on a binary first group III nitride semiconductor layer. Alternatively (for example, when the first group III nitride semiconductor layer is a binary group III nitride semiconductor layer, such as GaN or AlN), the growth of the second group III nitride semiconductor layer can be carried out at a base substrate temperature of 800°C and 1000°C, preferably 850°C to 950°C, for example, in the case of AlN.

[0045] In another embodiment (for example, when the first group III nitride semiconductor layer is a binary group III nitride semiconductor layer, such as GaN or AlN), the growth of the second group III nitride semiconductor layer can be carried out in two (e.g., consecutive) stages (phases), where these two stages are also referred to as the first stage and the second stage. Preferably, the first stage is carried out before the second stage.

[0046] In the first stage, the growth of the second group III nitride semiconductor layer can be carried out under hyperstoichiometric nitrogen supply. Thus, the growth of the second group III nitride semiconductor layer can be carried out under "nitrogen-rich" or "metal-poor" conditions. For example, during the growth period of the second group III nitride semiconductor layer, the ratio between the particle flux of nitrogen species and the total particle flux of metal atoms, for example, the total particle flux of the group III elements used (e.g., In+Ga in the case of an (In,Ga)N semiconductor layer), can be greater than 1.2, preferably greater than 1.4, and particularly preferably greater than 1.6.

[0047] However, in the second stage, the growth of the second group III nitride semiconductor layer can be carried out under quasi-stoichiometric nitrogen supply. Thus, the growth of the second group III nitride semiconductor layer can be carried out under "nitrogen-poor" or "metal-rich" conditions. For example, during the growth period of the second group III nitride semiconductor layer, the ratio of the particle flux of nitrogen species to the total particle flux of metal atoms of, for example, the group III element used (e.g., In+Ga in the case of an (In,Ga)N semiconductor layer) can be less than 0.9, preferably less than 0.8, and particularly preferably less than 0.7.

[0048] In a preferred variation (for example, when the first group III nitride semiconductor layer is a binary group III nitride semiconductor layer, such as GaN or AlN), the second group III nitride semiconductor layer is an (In,Ga)N semiconductor layer, and during the growth period of the second group III nitride semiconductor layer during the first stage, the particle flux of indium atoms gradually (e.g., continuously) increases, while the particle flux of gallium atoms remains constant. Thus, the second group III nitride semiconductor layer may include a concentration gradient (e.g., of indium or gallium) along the growth direction. Additionally or alternatively, the second group III nitride semiconductor layer may be In x Ga 1-x It may also be an N semiconductor layer, where the indium content x (or gallium content lx) may change (for example, increase) along the growth direction.

[0049] Additionally or alternatively, during the growth period of the second group III nitride semiconductor layer in the second stage, the particle flux of gallium atoms can be kept constant and the particle flux of indium atoms can be increased so that the total particle flux of indium and gallium atoms, i.e., In+Ga, is greater than the particle flux of nitrogen species. This allows for a transition to “nitrogen-rich” or “metal-poor” conditions during the second stage. In this case as well, the second group III nitride semiconductor layer may include a concentration gradient (e.g., of indium or gallium) along the growth direction, and / or the second group III nitride semiconductor layer may contain In x Ga 1-x It may be an N semiconductor layer, where the indium content x (or gallium content lx) may change (for example, increase) along the growth direction.

[0050] Another independent aspect of this disclosure relates to semiconductor substrates. A semiconductor substrate may function, for example, as a template for growing another semiconductor structure on it in a subsequent epitaxial process. Thus, a semiconductor substrate is also referred to as a semiconductor pseudosubstrate (Halbleiterpseudosubstrat). Preferably, the semiconductor substrate is manufactured according to the methods described herein. Therefore, each feature disclosed above with respect to the method should also be disclosed and claimable with respect to the semiconductor substrate. And vice versa (each feature disclosed with respect to the semiconductor substrate should also be disclosed and claimable with respect to the method).

[0051] The semiconductor substrate includes a base substrate. For example, the base substrate may include layers of sapphire, silicon, and / or silicon carbide. Preferably, the GaN layer is grown on the sapphire, silicon, or silicon carbide layer by, for example, a hybrid vapor phase epitaxy and / or an organometallic vapor phase epitaxy (for example, by epitaxy).

[0052] The semiconductor substrate further includes a first group-III nitride semiconductor layer (e.g., an (In,Ga)N semiconductor layer or a GaN semiconductor layer) grown along a growth direction (e.g., a direction oriented perpendicular to the main extension plane (Haupterstreckungsebene) of the base substrate) on the base substrate (e.g., by molecular beam epitaxy and / or metalorganic vapor phase epitaxy). The first group-III nitride semiconductor layer includes a plurality of depressions defined (begrenzt: bounded) by a plurality of facets of the first group-III nitride semiconductor layer that are oriented obliquely with respect to the growth direction (e.g., at least in a plurality of sections (parts)). It is preferable that a plurality of dislocations (e.g., linear dislocations or through dislocations) in the first group-III nitride semiconductor layer terminate (e.g., at least partially) at the plurality of facets. For example, those dislocations can terminate (or occur (start)) at those facets.

[0053] The semiconductor substrate further includes a second group-III nitride semiconductor layer (e.g., an (In,Ga)N semiconductor layer) grown along the growth direction on the first group-III nitride semiconductor layer (e.g., by molecular beam epitaxy and / or organometallic vapor phase epitaxy). The second group-III nitride semiconductor layer covers the plurality of depressions (e.g., completely). For example, the second group-III nitride semiconductor layer can be a closed group-III nitride semiconductor layer that preferably covers (in the growth direction) the first group-III nitride semiconductor layer or the plurality of depressions thereof completely. It is more preferable that the second group-III nitride semiconductor layer is elastically relaxed by mechanical interaction with the first group-III nitride semiconductor layer.

[0054] According to one aspect, the second group-III nitride semiconductor layer may include a gradient in its chemical composition (e.g., along the growth direction), e.g., an increasing In content towards the surface of the second group-III nitride semiconductor layer. In one embodiment, the second group-III nitride semiconductor layer is, for example, In x Ga 1-xIt may be an N semiconductor layer, where the indium content x (or gallium content lx) may vary (e.g., continuously increase) along the growth direction.

[0055] In another embodiment, the second group III nitride semiconductor layer may comprise a first (e.g., lower) section and a second (e.g., upper) section (e.g., structurally different). For example, the first section may comprise a columnar structure having a plurality of nanocolumns (nanosaeulen) spaced apart from each other and oriented parallel to each other in the growth direction. The plurality of nanocolumns preferably have an aspect ratio of at least 2:1, preferably at least 4:1. In contrast, the second section may comprise, for example, a substantially closed layer perpendicular to the growth direction. For example, the substantially (basically) closed layer may form the surface of the semiconductor substrate and / or be formed planar and / or extend continuously perpendicular to the growth direction over the entire lateral extent (spread) of the base substrate. The first section is preferably positioned between the second section and the base substrate.

[0056] In one embodiment, the semiconductor substrate may include a plurality of cavities located (for example, in the boundary region between a first group III nitride semiconductor layer and a second group III nitride semiconductor layer). These cavities may be completely surrounded by the semiconductor substrate material, and it is preferable that no material is placed in the cavity region. It is preferable that these cavities are formed by a plurality of depressions in the first group III nitride semiconductor layer in at least a plurality of sections (parts). For example, each cavity may be formed in the direction toward the base substrate by one of the plurality of depressions, or may be defined by the first group III nitride semiconductor layer, while each cavity may be defined by the second group III nitride semiconductor layer in the direction opposite to the base substrate.

[0057] In another embodiment, the first group III nitride semiconductor layer and the second group III nitride semiconductor layer may have different chemical compositions and / or different structures. For example, the first group III nitride semiconductor layer may be a binary group III nitride semiconductor layer (e.g., a GaN semiconductor layer), while the second group III nitride semiconductor layer may be a ternary group III nitride semiconductor layer (e.g., an (In,Ga)N semiconductor layer). Additionally or alternatively, both the first and second group III nitride semiconductor layers may be In x Ga 1-x It may be an N semiconductor layer, where the indium content x in the first and second group III nitride semiconductor layers may be different or the same.

[0058] Another independent aspect of this disclosure relates to a light-emitting element (device) (e.g., a light-emitting diode) including a semiconductor substrate as described herein. Accordingly, each feature disclosed above with respect to the semiconductor substrate is intended to be similarly disclosed and claimable with respect to the light-emitting element, and vice versa (each feature disclosed with respect to the light-emitting element should be similarly disclosed and claimable with respect to the semiconductor substrate). The light-emitting element is preferably designed to emit light in the visible region of the electromagnetic spectrum. For this purpose, the light-emitting element may include one or more quantum wells (e.g., multiple quantum wells separated from each other by multiple barrier layers) and / or at least one n-doped layer and one p-doped layer (e.g., a group III nitride semiconductor layer).

[0059] Generally, a group III nitride semiconductor layer can be understood as a single layer containing a compound (verbindung) (chemical compound) of nitrogen and one or more metals from the third main group (group 13) of the periodic table, particularly Al, Ga, and / or In. For example, a group III nitride semiconductor layer is In x Al y Ga 1-x-yN (where 0≦x≦1, 0≦y≦1, x+y≦1) may be included. In principle, the group III nitride semiconductor layer is In x Al y Ga 1-x-y As long as the intrinsic physical properties of the N material are not fundamentally altered, it may contain one or more dopants and / or additional components (e.g., small or trace amounts). For example, In x Al y Ga 1-x-y Some atoms in the N-structured crystal lattice can be substituted with corresponding heterologous atoms (i.e., atoms other than In, Al, Ga, and N).

[0060] Furthermore, the nitrogen species may generally be electronically excited or ionized nitrogen molecules, and / or excited and / or ionized nitrogen atoms (i.e., nitrogen radicals).

[0061] In particular, when using a plasma source, in principle, multiple nitrogen components, including substantially inert components (e.g., N2) that do not contribute to growth, may be present during the growth period of the group III nitride semiconductor layer. Therefore, it is preferable that the nitrogen species particle flux disclosed herein generally refers to nitrogen components that contribute to the growth of the group III nitride semiconductor layer, or nitrogen components that can be incorporated into the respective crystal structure of the growing group III nitride semiconductor layer by corresponding reactions on the surface of the growing group III nitride semiconductor layer. Thus, “nitrogen species” (Stickstoffspezies) can generally be understood to mean nitrogen components related to growth, or reactive nitrogen components, in particular nitrogen radicals and / or electronically excited or ionized nitrogen molecules.

[0062] The preferred embodiments and features of the present invention described above can be combined with each other as needed. Further details and advantages of the present invention are described below with reference to the drawings. [Brief explanation of the drawing]

[0063] [Figure 1] Figure 1 shows a flowchart of a method for manufacturing a semiconductor substrate according to one embodiment. [Figure 2] Figure 2 shows a schematic diagram of each step in a method for manufacturing a semiconductor substrate according to one embodiment. [Figure 3] Figure 3A shows a schematic diagram of a base substrate having a grown first group III nitride semiconductor layer according to one embodiment. Figure 3B shows a scanning electron microscope image of the first group III nitride semiconductor layer grown on the base substrate according to one embodiment. Figure 3C shows a schematic diagram of a semiconductor substrate according to one embodiment. Figure 3D shows an atomic force microscope image of the surface of the semiconductor substrate according to one embodiment. Figure 3E shows a cross-section of the X-ray diffraction pattern of the first group III nitride semiconductor layer grown on the base substrate according to one embodiment. Figure 3F shows a cross-section of the X-ray diffraction pattern of the second group III nitride semiconductor layer of the semiconductor substrate according to one embodiment. [Figure 4] Figure 4 shows a schematic diagram of each step in a method for manufacturing a semiconductor substrate according to another embodiment. [Figure 5] Figure 5A shows a schematic diagram of a base substrate having a grown first group III nitride semiconductor layer according to another embodiment. Figure 5B shows a scanning electron microscope image of the first group III nitride semiconductor layer grown on the base substrate according to another embodiment. Figure 5C shows a magnified portion of the scanning electron microscope image shown in Figure 5B. Figure 5D shows a cross-sectional X-ray diffraction pattern of the second group III nitride semiconductor layer grown on the base substrate according to another embodiment. [Figure 6] Figure 6A shows a schematic diagram of a semiconductor substrate according to another embodiment. Figure 6B shows a schematic detail diagram of the nanocolumns of the second group III nitride semiconductor layer of a semiconductor substrate according to one embodiment. Figure 6C shows an atomic force microscope image of the surface of a semiconductor substrate according to another embodiment. Figure 6D shows a scanning electron microscope image of a semiconductor substrate according to one embodiment (top: surface, bottom: cross-section). [Modes for carrying out the invention]

[0064] The embodiments shown in each figure are at least partially identical to one another, and as a result, similar or identical parts are given the same reference numerals and are described by reference to other embodiments or the descriptions of the figures to avoid repetition.

[0065] Figure 1 shows a flowchart of the method for manufacturing a semiconductor substrate.

[0066] In step S1, a base substrate 10 is supplied. The base substrate 10 may include, for example, a sapphire layer 14, on which an AlN or GaN layer 12 or another (e.g., ternary) group III nitride semiconductor layer may be grown (e.g., by epitaxial method). Alternatively, instead of the sapphire layer 14, the base substrate 10 may include a silicon or silicon carbide layer, on which an AlN or GaN layer 12 or another group III nitride semiconductor layer may be grown (e.g., by epitaxial method). It is preferable that the AlN or GaN layer 12 or other group III nitride semiconductor layer completely covers one side (e.g., the top) of the sapphire layer, silicon layer, or silicon carbide layer. Additionally or alternatively, the AlN or GaN layer 12 or other group III nitride semiconductor layer may be a closed AlN or GaN layer or another closed group III nitride semiconductor layer. The AlN or GaN layer 12 or other group III nitride semiconductor layer may have a thickness of, for example, at least 4 μm. However, in principle, the base substrate can also be formed as a group III nitride single crystal (e.g., binary or ternary) or as a substrate of pure sapphire, silicon, or silicon carbide.

[0067] The base substrate 10 can be, for example, circular and / or wafer-shaped. The base substrate 10 may have a certain thickness and / or a thickness smaller than other dimensions of the base substrate. The base substrate 10 may be flat and / or include a planar shape and / or include a main extending plane, preferably a main extending plane that extends perpendicular to the thickness of the base substrate 10.

[0068] In step S2, the first group III nitride semiconductor layer 20 is grown on the base substrate along the growth direction A. For example, the growth can be carried out by molecular beam epitaxy and / or organometallic vapor phase epitaxy. For example, in the case of a binary first group III nitride semiconductor layer 20, a beam of metal atoms (e.g., Ga atoms) and a beam of nitrogen species, preferably nitrogen radicals, can be oriented and irradiated onto the base substrate 10 from a plasma source. In the case of a ternary first group III nitride semiconductor layer 20, for example, two beams of metal atoms (e.g., a beam of In atoms and a beam of Ga atoms) and a beam of nitrogen species, preferably nitrogen radicals, can be oriented and irradiated onto the base substrate 10 from a plasma source. The growth direction A is preferably oriented perpendicular to the main extending plane of the base substrate 10 and / or along the thickness of the base substrate 10.

[0069] The growth of the first group III nitride semiconductor layer 20 is carried out under a hyperstoichiometric nitrogen supply. For example, during the growth period of the first group III nitride semiconductor layer 20 (during growth), the V / III particle flux ratio may be greater than 1.2, preferably greater than 1.4, and more preferably greater than 1.6. The V / III particle flux ratio can be the ratio of the particle flux of nitrogen species (nitrogen is an element belonging to the main group V (group 15) of the periodic table) to the particle flux of metal atoms of group III of the periodic table. In the case of a binary first group III nitride semiconductor layer 20, the particle flux of metal atoms may include only one type of group III atom (e.g., only Ga or Al), but in the case of a ternary first group III nitride semiconductor layer 20, the particle flux of metal atoms may also include multiple different types of group III atoms (e.g., In and Ga), and is therefore also called the total particle flux. In this context, the particle flux is, for example, 1 cm per second 2 This can be understood as the number of particles colliding with an area.

[0070] During the growth period of the first group III nitride semiconductor layer 20, it is preferable that a plurality of depressions 24 are formed (e.g., spontaneously) on the surface 22 of the first group III nitride semiconductor layer 20 due to hyperstoichiometric nitrogen supply, where the plurality of depressions 24 are defined by a plurality of facets 26 of the first group III nitride semiconductor layer 20 oriented obliquely with respect to the growth direction A. For example, the depressions 24 may be V-shaped, pyramidal, and / or tapered in the direction of the base substrate 10. Thus, the growth of the first group III nitride semiconductor layer 20 may be the growth of a (e.g., at least partially) faceted first group III nitride semiconductor layer 20. For example, the first group III nitride semiconductor layer 20 may be nanostructured and / or faceted. Preferably, the multiple facets 26 serve to terminate multiple dislocations 2 (e.g., linear dislocations or through dislocations) in the first group III nitride semiconductor layer 20. For example, each dislocation 2 may be terminated (or initiated) (e.g., at least partially) in each facet 26. Dislocations 2 may arise due to lattice mismatch between the first group III nitride semiconductor layer 20 and the base substrate. Dislocations 2 may relieve (reduce) strain in the first group III nitride semiconductor layer 20, and thus the first group III nitride semiconductor layer 20 may be (strain) relieved. In this context, each facet 26, or each interface with the recess 24, can become a kind of "predetermined termination point" (intentionally formed termination point) for dislocations 2, blocking them and preventing (suppressing) their further propagation.

[0071] Overall, the grown first group III nitride semiconductor layer 20 may have a thickness of at least 150 nm, preferably at least 200 nm, and particularly preferably at least 250 nm. Additionally or alternatively, the grown first group III nitride semiconductor layer 20 can substantially (basically) completely cover the base substrate and / or extend continuously perpendicular to the growth direction over the entire lateral extent (entire range, entire spread) of the base substrate.

[0072] In step S3, a second group III nitride semiconductor layer 30 is grown on the first group III nitride semiconductor layer 20 along the growth direction A. For example, the growth of the second group III nitride semiconductor layer 30 can be carried out by molecular beam epitaxy and / or organometallic vapor phase epitaxy. It is preferable that the growth of the second group III nitride semiconductor layer 30 is carried out immediately after the growth of the first group III nitride semiconductor layer 20 (step S2), for example, in an uninterrupted continuous growth process within the same plant. However, during the transition period from step S2 to step S3, at least one process parameter, for example, the temperature of the base substrate, the V / III particle flux ratio, and / or the types of group III atoms used can be changed, which will be described in more detail below.

[0073] Preferably, the growth of the second group III nitride semiconductor layer 30 is carried out such that the second group III nitride semiconductor layer 30 covers a plurality of depressions 24 (for example, all of the depressions 24). Therefore, the second group III nitride semiconductor layer 30 may be a closed group III nitride semiconductor layer 30. Accordingly, the previous surface 22 of the first group III nitride semiconductor layer 20 may be embedded beneath the second group III nitride semiconductor layer 30 and therefore may be an interface inside the semiconductor substrate 100. Preferably, the second group III nitride semiconductor layer 30 grows in an elastically relaxed state, resulting from mechanical interaction with the first group III nitride semiconductor layer 20, and / or has few (almost no) dislocations accordingly. The structuring / roughness of the recesses 24 or surface 22 of the first group III nitride semiconductor layer 20 creates empty regions, which the grown group III nitride semiconductor layer 30 can use to reduce (relax) strain, thus enabling the second group III nitride semiconductor layer 30 to grow as smoothly and defect-free as possible. As just one example, the second group III nitride semiconductor layer 30 may ultimately have a thickness of at least 200 nm, preferably at least 500 nm, and once the growth of the second group III nitride semiconductor layer 30 is complete, the semiconductor substrate 100 is complete.

[0074] Figure 2 shows schematic diagrams of each step of a preferred embodiment of the method for manufacturing a semiconductor substrate 100, the individual steps of which are similarly shown in detail in Figures 3A and 3C.

[0075] As explained above, a base substrate 10 having a GaN layer 12 is supplied first (Figure 2: upper diagram). However, in principle, the GaN layer 12 could also be an AlN layer or another (base substrate) group III nitride semiconductor layer.

[0076] Next, a first group III nitride semiconductor layer 20 is grown on the GaN layer 12 of the base substrate 10 along the growth direction A under hyperstoichiometric nitrogen supply (Figure 2: center). In this case, the first group III nitride semiconductor layer is a ternary group III nitride semiconductor layer, i.e., an (In,Ga)N semiconductor layer. It is preferable that its growth be carried out with an N / (In+Ga) particle flux ratio of at least 1.2. Furthermore, during the growth period of the first group III nitride semiconductor layer 20, the ratio between the particle flux of indium atoms and the total particle flux of indium and gallium atoms toward the base substrate or its GaN layer 12 can be greater than 0.2, preferably greater than 0.3. Furthermore, it is preferable that the growth of the first group III nitride semiconductor layer 20 be carried out at a base substrate temperature of 500°C to 600°C.

[0077] As shown in the scanning electron microscope image of the grown first group III nitride semiconductor layer 20 in Figure 3B, the surface 22 of the first group III nitride semiconductor layer 20 contains a structure having depressions 24 that appear as a "network" in the scanning electron microscope image. As shown in Figure 3A, these depressions 24 are formed when dislocations 2, particularly filamentous dislocations, which are defined by a plurality of facets 26 of the first group III nitride semiconductor layer 20 oriented obliquely with respect to the growth direction A, occur in the boundary region with the GaN layer 12 and terminate at open oblique facets 26. Therefore, it is preferable to intentionally make the surface 22 of the first group III nitride semiconductor layer 20 rough rather than smooth in order to, on the one hand, prevent further propagation (expansion) of dislocations 2, and on the other hand, create open spaces that allow for the growth of the second group III nitride semiconductor layer 20 in an elastically relaxed state. As shown in Figure 3E, the X-ray diffraction pattern of the 10⁵ reflection of the first group III nitride semiconductor layer 20 also shows theoretical lines for the fully strained (vollstaendig verspannten) and fully relaxed (vollstaendig entspannten) layers, indicating that the first group III nitride semiconductor layer 20 is already largely (95%) relaxed due to each dislocation 2.

[0078] Next, a second group III nitride semiconductor layer 30 is grown on the first group III nitride semiconductor layer 20 or its rough surface 22 along the growth direction A (Figure 2: bottom figure and Figure 3C). In this case, the second group III nitride semiconductor layer 30 is also a ternary group III nitride semiconductor layer, i.e., an (In,Ga)N semiconductor layer, particularly In x Ga 1-x The first group III nitride semiconductor layer is an N semiconductor layer (where the indium content x = 0.2 to 0.3). The growth of the second group III nitride semiconductor layer 30 is also preferably carried out at a base substrate temperature of 500°C to 600°C. However, in contrast to the growth of the first group III nitride semiconductor layer 20, the growth of the second group III nitride semiconductor layer 30 is carried out under quasi-stoichiometric nitrogen supply conditions. For example, the growth of the second group III nitride semiconductor layer 30 can occur with an N / (In,Ga) particle flux ratio of less than 0.9.

[0079] As shown in the atomic force microscope image of the grown second group III nitride semiconductor layer 30 shown in Figure 3D, the second group III nitride semiconductor layer 30 has a relatively smooth surface with a root mean square (RMS) roughness of less than 2 nm. Furthermore, as can be seen from the 10⁵ reflection X-ray diffraction image of the second group III nitride semiconductor layer 30 shown in Figure 3F, the second group III nitride semiconductor layer 30 is substantially (basically) completely (strained), which is made possible by the empty spaces or depressions 24 of the first group III nitride semiconductor layer 20, as described above. It is preferable that the second group III nitride semiconductor layer 30 forms a layer that covers or closes the depressions 24. Thus, the finished semiconductor substrate may contain a plurality of cavities 4 formed at least partially by a plurality of depressions 24 (see Figure 3C).

[0080] Figure 4 shows a schematic diagram of each step of the method in another preferred embodiment of the method for manufacturing the semiconductor substrate 100, and the individual steps are also shown in detail in Figures 4 and 5A.

[0081] Here again, a base substrate 10 having a GaN layer 12 is supplied first (Figure 4: upper diagram). However, in principle, the GaN layer 12 may be an AlN layer or another (base substrate) group III nitride semiconductor layer.

[0082] Next, a first group III nitride semiconductor layer 20 is grown on the GaN layer 12 of the base substrate 10 under hyperstoichiometric nitrogen supply along the growth direction A (second figure from the top). In this case, the first group III nitride semiconductor layer is a binary group III nitride semiconductor layer, i.e., a GaN semiconductor layer. It is preferable that the growth is carried out with an N / Ga particle flux ratio of at least 1.2. Furthermore, it is preferable that the growth of the first group III nitride semiconductor layer 20 is carried out at a base substrate temperature of 650°C to 750°C, preferably substantially 700°C.

[0083] As shown in the scanning electron microscope image in Figure 5B and the magnified cross-section of the grown first group III nitride semiconductor layer 20 in Figure 5C, the surface 22 of the first group III nitride semiconductor layer 20 includes a structure having depressions 24 that similarly appear "network-like" in the scanning electron microscope image. As shown in Figure 5A, these depressions 24 are defined by a plurality of facets 26 of the first group III nitride semiconductor layer 20 oriented obliquely with respect to the growth direction A. For example, the surface 22 of the first group III nitride semiconductor layer 20 may include a plurality of pointed and / or pyramidal projections 28, each space between them forming a depression 24. As shown in Figure 5A, it is preferable that a plurality of dislocations 2 of the first group III nitride semiconductor layer 20, particularly linear or through dislocations, terminate in these depressions 24 or facets 26. For example, each dislocation 2 may extend between the boundary region with the GaN layer 12 and one of the multiple facets 26 or multiple depressions 24.

[0084] Next, a second group III nitride semiconductor layer 30 is grown on the first group III nitride semiconductor layer 20 or its rough surface 22 along the growth direction A (Figure 4: second from the bottom). In this case, the second group III nitride semiconductor layer 30 is a ternary group III nitride semiconductor layer, i.e., an (In,Ga)N semiconductor layer, particularly In x Ga 1-x This is an N semiconductor layer (where the indium content x is 0.2 to 0.3). Therefore, the first and second group III nitride semiconductor layers 20 and 30 have different chemical compositions in this case.

[0085] The second group III nitride semiconductor layer 30 is preferably grown at a base substrate temperature of 500°C to 600°C, and therefore at a base substrate temperature slightly lower than that of the first group III nitride semiconductor layer 20. As just one example, the gallium atom particle flux is kept constant, and during the transition period from the growth of the first group III nitride semiconductor layer 20 to the growth of the second group III nitride semiconductor layer 30, the indium atom particle flux can be gradually increased (from an initial value of 0) until the desired (as described above) indium-to-gallium ratio is obtained (reached). The growth of the second group III nitride semiconductor layer 30 is also preferably carried out under a hyperstoichiometric nitrogen supply in its initial state. For example, its growth can be carried out with an N / (In+Ga) particle flux ratio of at least 1.2. Again, as shown in detail in Figures 6A and 6B, this grows a columnar structure containing multiple (In,Ga) N nanocolumns 32 spaced apart from each other and oriented parallel to the growth direction A. The nanocolumns 32 may have a changing cross-section along the growth direction A. For example, the cross-section of the nanocolumns 32 may increase along the growth direction A. Furthermore, each nanocolumn 32 may have an indium concentration gradient along the growth direction A, where the indium content preferably increases as the distance from the first group III nitride semiconductor layer 20 increases (see Figure 6B). As can be seen from the X-ray diffraction pattern of the (105) reflectance of the second group III nitride semiconductor layer 30 shown in Figure 5D, this diffraction pattern also depicts theoretical lines for the fully strained and fully relaxed layers, and this columnar structure is substantially (basically) fully relaxed.

[0086] Next, while keeping the gallium atom particle flux constant, it is preferable to further increase the indium atom particle flux until the quasi-stoichiometric nitrogen supply reaches, for example, an N / (In+Ga) particle flux ratio of less than 0.9. Then, under these nitrogen-deficient (low nitrogen) conditions, the second group III nitride semiconductor layer 30 continues to grow, and the layer closes or grows together to form a smooth layer or surface (mean square roughness less than 3 nm), as shown in the atomic force microscope image of the surface in Figure 6C and the scanning electron microscope image of the surface in Figure 6D. Thus, the growth of the second group III nitride semiconductor layer 30 is carried out in two stages (phases): a first stage in which the growth of the second group III nitride semiconductor layer 30 is carried out under hyperstoichiometric nitrogen supply, and a second stage in which the growth of the second group III nitride semiconductor layer 30 is carried out under quasi-stoichiometric nitrogen supply. As already explained, the group III nitride semiconductor layer 30 therefore includes two regions along the growth direction A: a (lower) region having multiple nanocolumns 32 and a (upper) second region having a substantially (basically) closed (In,Ga)N layer perpendicular to the growth direction A. See here for a scanning electron microscope image of the resulting cross-section of the semiconductor substrate 100, shown below in Figure 6D. Due to the overgrowth of the first group III nitride semiconductor layer 20, corresponding cavities 4 may appear from the previous multiple depressions 24 within the semiconductor substrate 100 (see Figure 6A). Calculations from X-ray diffraction measurements (see Figure 5D) indicate that the (upper) closed layer is relaxed by more than 80% (strain), which is made possible by the cavities 4 or depressions 24 of the first group III nitride semiconductor layer 20.

[0087] Although the present invention has been described with reference to specific embodiments, it will be apparent to those skilled in the art that various modifications are possible without departing from the scope of the invention, and that equivalents (means) can be used as substitutes (means). Accordingly, the present invention is not limited to the disclosed embodiments but is intended to encompass all embodiments included in the claims. In particular, the present invention claims protection for the subject matter (structure) and features of the dependent claims independently of the cited claims. Furthermore, it is intended that semiconductor substrates are also protected and claimable independently of the manufacturing methods.

Claims

1. A method for manufacturing a semiconductor substrate (100), To supply the base substrate (10), and A first group III nitride semiconductor layer (20) is grown on the base substrate (10) along the growth direction (A) under hyperstoichiometric nitrogen supply. Includes, The surface (22) of the first group III nitride semiconductor layer (20) includes a recess (24) defined by facets (26) of the first group III nitride semiconductor layer (20) oriented obliquely to the growth direction (A), wherein the facets (26) of the first group III nitride semiconductor layer (20) are preferably formed to terminate dislocations (2). Furthermore, a second group III nitride semiconductor layer (30) is grown on the first group III nitride semiconductor layer (20) along the growth direction (A) to cover the recessed portion (24). Includes, Preferably, the second group III nitride semiconductor layer (30) is grown in an elastically relaxed state resulting from mechanical interaction with the first group III nitride semiconductor layer (20). method.

2. The growth of the first group III nitride semiconductor layer (20) includes forming the recess (24) and / or the facet (26), and / or The grown first group III nitride semiconductor layer (20) is nanostructured and / or faceted and / or contains dislocations (2), preferably dislocations (2) extending between the base substrate (10) and one of the recesses (24). The method according to claim 1.

3. During the growth period of the first group III nitride semiconductor layer (20), the ratio of nitrogen species particle flux, preferably nitrogen radical particle flux, to the group III element particle flux toward the base substrate (10), or the ratio of nitrogen species particle flux, preferably nitrogen radical particle flux, to the total group III element particle flux toward the base substrate (10), is greater than 1.2, preferably greater than 1.4, and particularly preferably greater than 1.

6. The method according to claim 1 or 2.

4. The growth of the first group III nitride semiconductor layer (20) and the growth of the second group III nitride semiconductor layer (30) are carried out in an uninterrupted growth process, preferably in which at least one process parameter is changed during the transition period from the growth of the first group III nitride semiconductor layer (20) to the growth of the second group III nitride semiconductor layer (30). The method according to any one of claims 1 to 3.

5. The growth of the first group III nitride semiconductor layer (20) is carried out by molecular beam epitaxy and / or organometallic vapor phase epitaxy, and / or The second group III nitride semiconductor layer (30) is grown by molecular beam epitaxy and / or organometallic vapor phase epitaxy, and / or The base substrate (10) is Exclusively group III nitride single crystals, or Exclusively, sapphire, silicon or silicon carbide, or Preferably, an epitaxially grown sapphire layer (14) having a base substrate group III nitride semiconductor layer, preferably an AlN or GaN layer (12), or Preferably, an epitaxially grown silicon layer having a base substrate group III nitride semiconductor layer, preferably an AlN or GaN layer (12), or Preferably, an epitaxially grown silicon carbide layer having a base substrate group III nitride semiconductor layer, preferably an AlN or GaN layer (12), It includes, The method according to any one of claims 1 to 4.

6. The method according to any one of claims 1 to 5, wherein the first group III nitride semiconductor layer (20) is a ternary group III nitride semiconductor layer, preferably an (In,Ga)N semiconductor layer.

7. The first group III nitride semiconductor layer (20) is an (In,Ga)N semiconductor layer, and during the growth period of the first group III nitride semiconductor layer (20), the ratio of the indium atom particle flux to the total particle flux of indium and gallium atoms toward the base substrate (10) is greater than 0.2, preferably greater than 0.3, and / or The growth of the first group III nitride semiconductor layer (20) is carried out at a base substrate temperature of 400°C to 700°C, preferably 500°C to 600°C. The method according to claim 6.

8. The second group III nitride semiconductor layer (30) is a ternary group III nitride semiconductor layer, preferably an (In,Ga)N semiconductor layer, and particularly preferably In x Ga 1-x N semiconductor layer (where indium content x is 0.2 to 0.3), and / or The growth of the second group III nitride semiconductor layer (30) is carried out at a base substrate temperature of 400°C to 700°C, preferably 500°C to 600°C, and / or The growth of the second group III nitride semiconductor layer (30) is carried out under a quasi-stoichiometric nitrogen supply, and / or During the growth period of the second group III nitride semiconductor layer (30), the ratio of nitrogen species particle flux, preferably nitrogen radical particle flux, to the group III element particle flux toward the base substrate (10), or the ratio of nitrogen species particle flux, preferably nitrogen radical particle flux, to the total group III element particle flux toward the base substrate (10), is less than 0.9, preferably less than 0.8, and particularly preferably less than 0.

7. The method according to claim 6 or 7.

9. The method according to any one of claims 1 to 5, wherein the first group III nitride semiconductor layer (20) is a binary group III nitride semiconductor layer, preferably a GaN semiconductor layer.

10. The growth of the first group III nitride semiconductor layer (20) is carried out at a base substrate temperature of 600°C to 800°C, preferably 650°C to 750°C, particularly preferably substantially 700°C, or the growth of the first group III nitride semiconductor layer (20) is carried out at a base substrate temperature of 800°C to 1000°C, preferably 850°C to 950°C, and / or Process parameters are selected such that dynamic roughening of the first group III nitride semiconductor layer (20) occurs during the growth period of the first group III nitride semiconductor layer (20). The method according to claim 9.

11. The second group III nitride semiconductor layer (30) is a ternary group III nitride semiconductor layer, preferably (In,Ga)N, and particularly preferably In x Ga 1-x N (where the In content x is 0.2 to 0.3), and / or The growth of the second group III nitride semiconductor layer (30) is carried out at a base substrate temperature of 400°C to 700°C, preferably 500°C to 600°C. The method according to claim 9 or 10.

12. The growth of the second group III nitride semiconductor layer (30) is carried out in two stages. In other words, The first step involves the growth of the second group III nitride semiconductor layer (30) under a hyperstoichiometric nitrogen supply, The second step involves the growth of the second group III nitride semiconductor layer (30) under quasi-stoichiometric nitrogen supply, It is carried out by The method according to any one of claims 9 to 11.

13. The second group III nitride semiconductor layer (30) is an (In,Ga)N semiconductor layer. During the growth period of the second group III nitride semiconductor layer (30) in the first stage, the particle flux of indium atoms gradually increases, while the particle flux of gallium atoms is kept constant, and / or During the growth period of the second group III nitride semiconductor layer (30) in the second stage, the particle flux of gallium atoms is kept constant, and the particle flux of indium atoms increases such that the total particle flux of indium and gallium atoms is greater than the particle flux of nitrogen species, preferably nitrogen radicals. The method according to claim 12.

14. A semiconductor substrate (100), preferably a semiconductor substrate (100) manufactured according to the method described in any one of claims 1 to 13, A base substrate (10), preferably a sapphire layer on which an AlN or GaN layer has been grown, A first group III nitride semiconductor layer (20) grown on the base substrate (10) along a growth direction (A), comprising a recess (24) defined by facets (26) of the first group III nitride semiconductor layer (20) oriented obliquely to the growth direction (A), preferably wherein dislocations (2) in the first group III nitride semiconductor layer (20) terminate at the facets (26), A second group III nitride semiconductor layer (30) grown on the first group III nitride semiconductor layer (20) along the growth direction (A), which covers the recess (24) and is preferably elastically relaxed by mechanical interaction with the first group III nitride semiconductor layer (20), A semiconductor substrate (100) including the semiconductor substrate.

15. The second group III nitride semiconductor layer (30) has a gradient of its chemical composition along the growth direction (A), preferably with increasing In content toward the surface of the second group III nitride semiconductor layer (30), and / or The second group III nitride semiconductor layer (30) includes a first section comprising a columnar structure having a plurality of nanocolumns (32) spaced apart from each other and oriented parallel to each other in the growth direction (A), and / or a second section comprising a substantially closed layer perpendicular to the growth direction (A), and / or The semiconductor substrate (100) includes a cavity (4), which is preferably located in the boundary region between the first group III nitride semiconductor layer (20) and the second group III nitride semiconductor layer (30), and is preferably at least partially formed by the recess (24), and / or The first group III nitride semiconductor layer (20) and the second group III nitride semiconductor layer (30) have different chemical compositions and / or different structures. The semiconductor substrate (100) according to claim 14.

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