Calibration method for calculating the electrical characteristics of semiconductor devices, adjustment semiconductor devices used for calibration, and semiconductor devices.

The calibration method for semiconductor devices with enhanced heat dissipation structures addresses self-heating issues, ensuring accurate electrical characteristic calculations and maintaining circuit performance by adjusting physical constants like carrier mobility.

JP2026098951AActive Publication Date: 2026-06-18NEXCHIP SEMICON CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
NEXCHIP SEMICON CO LTD
Filing Date
2024-12-06
Publication Date
2026-06-18

AI Technical Summary

Technical Problem

Semiconductor devices generate self-heat during current-voltage measurements, leading to temperature-dependent carrier mobility changes and reduced drain current, which complicates accurate calibration of electrical characteristics and degrades circuit performance.

Method used

A calibration method involving a semiconductor device with enhanced heat dissipation structure, including additional wiring sections with more plugs and higher heat dissipation than the target device, is used to improve accuracy by adjusting physical constants like carrier mobility.

Benefits of technology

The method enhances the accuracy of electrical characteristic calculations and maintains circuit performance by minimizing self-heating effects, thereby improving switching speed and overall device reliability.

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Abstract

To provide a calibration method for calculating the electrical characteristics of semiconductor devices that can improve the accuracy of calculating the electrical characteristics of semiconductor devices, a calibration semiconductor device used for calibration, and a semiconductor device that can suppress the degradation of circuit performance. [Solution] The adjustment semiconductor device 2 includes an adjustment main body 20 having substantially the same structure as the target main body 10 and an adjustment wiring section 21 with higher heat dissipation than the target wiring section 11. The adjustment semiconductor device 2 includes a step of determining whether the difference between the measured value of the first electrical characteristics and the calculated value of the first electrical characteristics is within a predetermined tolerance range. If the determination result in the step is within the tolerance range, the adjustment step includes adjusting predetermined physical constants, including carrier mobility, used in a second simulation that calculates the electrical characteristics of the target semiconductor device 1 using the carrier mobility of the adjustment semiconductor device 2.
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