Piezoelectric element, method for manufacturing a piezoelectric element, liquid dispensing head, and liquid dispensing device
The piezoelectric element's tapered and stepped design addresses stress concentration issues, improving insulating layer adhesion and reducing peeling and damage, thereby enhancing durability and reliability.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- CANON KK
- Filing Date
- 2024-12-06
- Publication Date
- 2026-06-18
AI Technical Summary
Existing piezoelectric elements in liquid ejection heads face issues with stress concentration at the ends, leading to peeling and poor coverage of the insulating layer, which can cause delamination and crack formation during operation.
The piezoelectric element design features a tapered longitudinal cross-section with a stepped surface parallel to the lower electrode, having specific angles between the stepped surface and side surfaces to distribute stress and enhance insulating layer adhesion, including a structure with multiple inclined surfaces to increase contact area and reduce gaps.
This design effectively suppresses stress concentration and improves insulating layer coverage, reducing peeling and destruction of the piezoelectric element, enhancing durability and reliability.
Smart Images

Figure 2026099589000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a piezoelectric element, a method for manufacturing the piezoelectric element, a liquid ejection head including the piezoelectric element, and a liquid ejection device.
Background Art
[0002] A piezoelectric body whose shape changes by applying an electric field is applied to various industrial products as a means for moving an object minutely and accurately or a means for vibrating. For example, piezoelectric bodies are used in small speakers, hard disk drives, printers (image recording liquid ejection devices), and the like. Among these, in printers, some employ an energy generating element using a piezoelectric body as an element that generates energy for ejecting droplets from a liquid ejection head. In such a liquid ejection head, a piezoelectric element is formed by a piezoelectric body layer and electrodes (an upper electrode and a lower electrode) that sandwich this layer from above and below. By applying an electric field to the electrodes of this piezoelectric element, the piezoelectric element is driven to eject droplets.
[0003] At this time, the voltage required to sufficiently displace the piezoelectric element is several tens of volts. This voltage is relatively high as a semiconductor device. Therefore, generally, the piezoelectric element used in a liquid ejection head is almost entirely covered with an insulator layer having good dielectric breakdown voltage. However, such an insulator layer may peel off from the piezoelectric body layer during a manufacturing process after the process of forming the insulator layer, or during driving of the piezoelectric element. To suppress such peeling, it is effective to suppress stress concentration at the ends of the piezoelectric element when driving the piezoelectric element. In the method for manufacturing a liquid ejection head described in Patent Document 1, a step is provided on the lower electrode side of the side surface of the piezoelectric body layer of the piezoelectric element to suppress stress concentration at the ends of the piezoelectric element when driving the piezoelectric element. Thus, by providing a step in the piezoelectric body layer, the stress on the insulator layer when driving the piezoelectric element is reduced.
Prior Art Documents
Patent Documents
[0004] [Patent Document 1] Japanese Patent Publication No. 2010-219153 [Overview of the project] [Problems that the invention aims to solve]
[0005] As described in Patent Document 1, when a step is formed on the side surface of the piezoelectric layer, it is possible to suppress the concentration of stress at the end of the piezoelectric layer when the piezoelectric element is driven, and to reduce the stress on the insulating layer formed on the piezoelectric layer. On the other hand, in Patent Document 1, the side surface of the piezoelectric layer has an angle of 75° to 90° that is close to vertical. This is a factor that reduces the coverage of the insulating layer in the process of forming the insulating layer. During the inventor's studies, it was sometimes observed that a gap in which the insulating layer was not formed occurred near the intersection of the side surface of the piezoelectric layer and the upper surface of the step on the lower electrode side of that side surface. Such gaps can cause peeling of the insulating layer, crack formation, etc.
[0006] The objective is to provide a piezoelectric element that suppresses stress concentration at the ends of the piezoelectric element during operation and has excellent coverage of the insulating layer covering the piezoelectric layer. [Means for solving the problem]
[0007] This disclosure relates to a piezoelectric element, comprising a lower electrode, a piezoelectric layer, and an upper electrode provided on a substrate, and an insulating layer covering at least the substrate, the lower electrode, the piezoelectric layer, and the upper electrode, wherein the longitudinal cross-sectional shape of the piezoelectric layer is tapered, with the lower electrode side being wider than the upper electrode side, and the longitudinal side surface of the piezoelectric layer from the upper electrode to the lower electrode has a stepped surface parallel to the lower electrode, a first side surface extending from the stepped surface to the lower electrode, and a second side surface extending from the stepped surface to the upper surface of the piezoelectric layer, wherein the angle θ1 between the stepped surface and the first side surface is greater than 135°, and the angle θ2 between a virtual plane parallel to the lower electrode that extends from the stepped surface inward into the piezoelectric layer and the second side surface is 45° or more and less than 75°. [Effects of the Invention]
[0008] According to this disclosure, it is possible to provide a piezoelectric element that suppresses stress concentration at the edges of the piezoelectric layer when the piezoelectric element is driven, and also has excellent coverage of the insulating layer covering the piezoelectric layer. [Brief explanation of the drawing]
[0009] [Figure 1] Figures 1(a) and 1(b) are schematic diagrams illustrating the structure of an example of a piezoelectric element of this disclosure. [Figure 2] Figures 2(a) and 2(b) are schematic diagrams illustrating the structure of an example of a piezoelectric element of this disclosure. [Figure 3] Figures 3(a) to 3(i) are schematic diagrams illustrating the manufacturing method of the piezoelectric element according to this disclosure. [Figure 4] Figures 4(a) to 4(c) are schematic diagrams illustrating the method for manufacturing the piezoelectric element of this disclosure. [Figure 5] Figures 5(a) and (b) are schematic diagrams illustrating the structure of an example of a piezoelectric element of this disclosure. [Figure 6] Figures 6(a) and (b) are schematic diagrams illustrating another embodiment of the piezoelectric element of the present disclosure. [Figure 7] Figures 7(a) and 7(b) are schematic diagrams showing a liquid dispensing device and a liquid dispensing head using the piezoelectric element of this disclosure. [Figure 8] Figure 8 is a schematic diagram showing the main parts of the piezoelectric element substrate of this disclosure. [Modes for carrying out the invention]
[0010] Embodiments of the piezoelectric element of this disclosure will be described below with reference to the drawings. The embodiments described below are intended to illustrate examples of this disclosure and are not intended to limit the scope of this disclosure. The dimensions, shapes, number, materials, etc. of the various components in the following embodiments can be modified as appropriate within the scope of this disclosure unless otherwise specified.
[0011] This disclosure provides a stepped portion on the side surface of a piezoelectric element, and makes the inclination angle of the side surface closer to the lower electrode than the stepped portion lower than the inclination angle of the side surface closer to the upper electrode than the stepped portion. This structural feature suppresses peeling and destruction of the piezoelectric element, particularly the insulating layer covering its side surface.
[0012] In this disclosure, the long side direction (longitudinal direction) of the piezoelectric element is defined as the X-axis direction, the short side direction (short direction) as the Y-axis direction, and the thickness direction (film thickness direction) as the Z-axis direction. The X-axis direction, Y-axis direction, and Z-axis direction are orthogonal to each other. In this disclosure, the sealing film side of the piezoelectric element is also referred to as the upper side, upper part, top surface, upper layer, etc., and the side opposite to it (substrate side) is also referred to as the lower side, lower part, bottom surface, lower layer, etc. In the drawings of this disclosure, arrows are attached to the X-axis, Y-axis, and Z-axis, and the direction in which the arrows point is indicated as the "+" direction of each axis.
[0013] In this disclosure, a piezoelectric element refers to an element comprising at least a substrate containing an oxide film layer, a piezoelectric layer provided on the substrate, and a lower electrode and an upper electrode formed so as to sandwich the piezoelectric layer. In addition, in this disclosure, for the sake of concise explanation of this disclosure, an insulating layer, an upper electrode pad, a lower electrode pad, signal wiring, common wiring, a sealing film, and a sealing film with recesses provided in part thereof are also referred to as a piezoelectric element. Furthermore, the electrode provided on the lower side (substrate side) of the piezoelectric layer is referred to as the lower electrode, and the electrode provided on the upper side (sealing film side) of the piezoelectric layer is referred to as the upper electrode.
[0014] (A) A first embodiment of a piezoelectric element of the present disclosure The piezoelectric elements of this disclosure will be described with reference to the drawings. The piezoelectric elements described below are examples of the piezoelectric elements of this disclosure and are not intended to limit the piezoelectric elements of this disclosure. Also, please note that the figures used in the following description are schematic diagrams and some parts may be omitted in order to explain the piezoelectric elements of this disclosure. For example, in Figure 1(a), the insulating layer and sealing film are omitted.
[0015] Referring to FIG. 1, a first embodiment of the piezoelectric element of the present disclosure will be described. FIG. 1(a) is a top view of the piezoelectric element 100 in the present disclosure. FIG. 1(b) shows a cross-sectional view taken along the line a-a' in FIG. 1(a). The piezoelectric element 100 includes a lower electrode 102, a piezoelectric layer 104 formed on the upper surface of the lower electrode 102, and an upper electrode 106 formed on the upper surface of the piezoelectric layer 104. The piezoelectric element 100 also has an insulator layer 108. The insulator layer 108 at least covers the upper surface of the upper electrode 106 and the side surface of the piezoelectric layer 104. The insulator layer further covers the portion of the upper surface of the lower electrode 102 where the piezoelectric layer 104 is not formed and the portion of the upper surface of the piezoelectric layer 104 where the upper electrode 106 is not formed. A signal wiring 110 for supplying an operation signal and a common wiring 112 for applying a common potential are provided to the piezoelectric element 100. An upper electrode contact portion 114 is opened in the insulator layer at one end of the piezoelectric element 100 in the longitudinal direction (X-axis direction), and an upper electrode pad 116 is disposed on the upper layer thereof. The upper electrode 106 and the upper electrode pad 116 are electrically connected through the upper electrode contact portion 114. The piezoelectric element 100 has a signal wiring 110, and the signal wiring 110 is electrically connected to the upper electrode 106 of the piezoelectric element 100 through the upper electrode pad 116. The piezoelectric element 100 has an extended region of the lower electrode 102 near the other end in the longitudinal direction facing the upper electrode pad 116. A lower electrode contact portion 118 is opened in the insulator layer on this extended region, and a lower electrode pad 120 is disposed on the upper layer thereof. The lower electrode pad 120 is connected to the lower electrode 102 through the lower electrode contact portion 118, and the common wiring 112 is electrically connected to the lower electrode 102. A sealing film 122 that covers the insulator layer 108, each of the above wirings, and each electrode pad is provided to the piezoelectric element 100 to cover the piezoelectric element. The piezoelectric element 100 can include a base material 124 on the lower electrode side. The base material 124 may have an oxide film 126 between the lower electrode.
[0016] The above elements of the piezoelectric element will be described below. The piezoelectric element of the present disclosure is characterized by the structure of the side surface on the longitudinal side of the piezoelectric layer 104 (hereinafter, also simply referred to as the side surface of the piezoelectric layer in this specification). In the following description, the piezoelectric layer will be described first, and then each element other than the piezoelectric layer will be described. (1) Piezoelectric layer
[0017] The piezoelectric layer 104 is provided on the lower electrode. The piezoelectric layer 104 can be selected from materials such as lead zirconate titanate, barium titanate, lead titanate, lead metaniobate, bismuth titanate, zinc oxide, aluminum nitride, potassium sodium niobate, etc. In the present embodiment, it is preferable to use lead zirconate titanate for the piezoelectric layer 104 because it is easy to obtain a large displacement amount.
[0018] As shown in FIG. 1(b), the piezoelectric element 100 has a tapered shape in which the width in the longitudinal direction increases in the direction (-Z direction, film thickness direction) from the upper electrode side to the lower electrode side on the side surface of the piezoelectric layer 104. Thus, the cross-sectional shape of the piezoelectric layer in the piezoelectric element of the present disclosure has a tapered shape in which the lower electrode side is wider than the upper electrode side in the longitudinal direction.
[0019] FIG. 2(a) is an enlarged view of the 1A region in FIG. 1(b). In FIG. 2(a), the common wiring 112, the lower electrode contact portion 118, the lower electrode pad 120, the sealing film 122, etc. are omitted to avoid complication of the figure. As shown in FIG. 2(a), the piezoelectric layer 104 has a side portion 200. The piezoelectric element of the present disclosure has a stepped portion 202 on the lower electrode side of the side portion 200 of the piezoelectric layer. The stepped portion 202 has a stepped surface 204 parallel to the lower electrode 102 and a first side surface 206 extending from the stepped surface 204 to the lower electrode 102. The first side surface is the side surface of the piezoelectric layer from the stepped surface 204 to the upper surface 210 of the lower electrode. In the present disclosure, the angle formed by the stepped surface 204 and the first side surface 206 is referred to as θ1. The angle θ1 is preferably greater than 135°. In the present disclosure, it is more preferable that θ1 is 140° or more and 160° or less.
[0020] The piezoelectric element 100 of this disclosure has a second side surface 208 extending from the stepped surface 204 to the upper electrode 106. The second side surface 208 is the side surface from the stepped surface 204 to the upper surface 214 of the piezoelectric layer. In this disclosure, the angle between the second side surface 208 of the piezoelectric layer and a virtual plane 212 parallel to the upper surface 210 of the lower electrode (also referred to in this disclosure as a virtual plane parallel to the lower electrode directed from the stepped surface 204 into the interior of the piezoelectric layer) is referred to as θ2. In this disclosure, the angle θ2 is preferably 45° or more and less than 75°, and more preferably 50° or more and 70° or less.
[0021] In the piezoelectric element of this disclosure, the thickness of the insulator layer 108 is preferably thinner than that of the piezoelectric layer, and is thin enough not to hinder the displacement of the piezoelectric element. On the other hand, when the ranges of θ1 and θ2 are within the ranges described above, the angle between the first side surface and the lower electrode becomes lower than θ2, so that the coverage of the insulator layer on the first side surface can be kept good. Furthermore, the structure having a stepped surface 204 allows for a larger surface area of the stepped portion 202 (combined step surface 204 and the first side surface 206), increasing the adhesion area between the stepped portion 202 and the insulator layer. As a result, when the piezoelectric element is driven, peeling and destruction of the insulator layer on the side surface of the piezoelectric layer can be suppressed.
[0022] The side portion 200 of the piezoelectric layer 104 in this disclosure has a stepped portion 202 on the lower electrode 102 side, which distributes the stress when the piezoelectric element is driven and mitigates stress concentration. This improves the durability of the piezoelectric element. If the thickness of the stepped portion 202 is too thin, cracks may occur in the stepped portion 202. That is, if the thickness from the upper surface 210 of the lower electrode to the stepped surface 204 is too thin, the stepped portion 202 may not be able to withstand the stress concentration when the piezoelectric element is displaced, and cracks may occur in the stepped portion 202. For this reason, the thickness from the upper surface 210 of the lower electrode to the stepped surface 204 is preferably one-tenth or more of the thickness of the piezoelectric layer 104 from the upper surface 210 of the lower electrode to the upper surface 214 of the piezoelectric layer. It is more preferably one-tenth or more and one-third or less. If this upper limit of thickness, "one-third or less," is exceeded, the amount of displacement of the piezoelectric element decreases, which is undesirable.
[0023] The piezoelectric element 100 expands and contracts when a high voltage is applied. If there is a gap at the interface between the insulating layer 108 and the piezoelectric layer 104, or if the adhesion between the insulating layer 108 and the piezoelectric layer 104 is insufficient, the insulating layer may delaminate from the piezoelectric layer 108 or be destroyed when the insulating layer expands and contracts. In the piezoelectric element 100 of this disclosure, the angle θ2 between the second side surface 208 and the stepped surface 204 is 45° or more and less than 75°, which is a lower angle compared to the case where this angle is vertical (90°). Therefore, the insulating layer is formed with a uniform density on the upper surface of the stepped surface 204 and the upper surface of the second side surface 208, making it less likely for gaps to occur. Consequently, the piezoelectric element of this disclosure is less prone to delamination of the insulating layer and the piezoelectric layer, and less prone to destruction of the insulating layer. Furthermore, the piezoelectric element of this disclosure not only has a stepped portion 202 on the side surface 200 of the piezoelectric layer, but the angle θ1 between the stepped surface 204 and the first side surface 206 is greater than 135°. As a result, the contact area between the piezoelectric layer 104 and the insulating layer 108 is large, and the adhesion between the insulating layer 108 and the piezoelectric layer 104 is good. Therefore, from this viewpoint as well, peeling of the insulating layer 108 and the piezoelectric layer 104 and damage to the insulating layer are less likely to occur.
[0024] The second side surface 208 may consist of two inclined surfaces 220 and 222, as shown in Figure 2(b). However, the angle θ between inclined surface 220 and the surface 226 that extends from the connection point 224 of inclined surfaces 220 and 222 and is parallel to the upper surface 210 of the lower electrode 21 It is desirable that the angle is 90° or less. This is because θ 21 This is because if the angle exceeds 90°, a void portion is more likely to occur on the second side surface 208 where the insulating layer 108 is not formed.
[0025] In the example shown in Figure 2(b) above, the case where two slopes are provided on the second side surface is shown, but in this disclosure, the second side surface 208 may have two or more slopes. In that case, the number of slopes is not particularly limited, but the number of slopes is preferably n+1 (where n is an integer of 1 or more), and more preferably 1 or more and 8 or less. Furthermore, when there are multiple slopes, the angle between each of the multiple slopes and the plane parallel to the lower electrode 102 is preferably smaller than the similar angle of the preceding slope. Furthermore, when there are multiple slopes, the above angle θ 21 The angles corresponding to each are preferably 90° or less. Furthermore, the angle between multiple adjacent slopes is angle θ. 21 It is preferable that the relationship is similar to the relationship with angle θ2.
[0026] Although the above description illustrates one end of the piezoelectric element, the piezoelectric element of this disclosure has side portions 200 with the same configuration as described above at both ends in the longitudinal direction of the piezoelectric layer.
[0027] (2) Base material The substrate 124 may be a film of a material selected from silicon nitride, silicon, metal, heat-resistant glass, etc., depending on the required mechanical properties, reliability, etc. In this embodiment, when a silicon wafer is used for the substrate 124, the substrate 124 has a silicon oxide film (oxide film) 126 as an insulating layer on the side where the lower electrode 102 is formed.
[0028] (3) Lower electrode The lower electrode 102 is provided on a substrate. The lower electrode 102 may be exposed to high temperatures of several hundred degrees Celsius during the post-formation process. In such cases, it is preferable to use a material with a high melting point as the material for the lower electrode. For example, copper, platinum, gold, chromium, cobalt, titanium, or alloys thereof are preferred materials. Furthermore, when a piezoelectric layer 104 is formed in contact with the upper surface of the lower electrode 102, the lower electrode 102 may also serve as a film that controls the crystal orientation of the piezoelectric layer. In that case, a material having an appropriate crystal structure is appropriately selected for the lower electrode. In this embodiment, for example, when the material of the piezoelectric layer 104 is lead zirconate titanate, it is preferable to use platinum as the lower electrode 102 as a crystal orientation control film.
[0029] (4) Upper electrode The upper electrode 106 is provided on the piezoelectric layer. The upper electrode 106 can be made of any conductive material, and commonly used electrode materials can be used. For example, aluminum, copper, tungsten, titanium, chromium, gold, platinum, or alloys thereof can be used. However, if a material with high internal stress is used for the lower electrode 102, the piezoelectric layer 104 may bend. In this case, the upper electrode 106 can be given an opposite internal stress to counteract the stress of the entire piezoelectric element. Examples of such materials include titanium or tungsten alloys.
[0030] (5) Insulating layer The insulating layer 108 is provided on the upper electrode. Examples of common insulating materials for the insulating layer 108 include silica, silicon nitride, oxynitride, and alumina. Furthermore, the insulating layer 108 may be a laminated film made of two or more materials selected from the above materials. Generally, a high voltage of 30V or more is applied to drive the piezoelectric element 100. For this reason, the material and thickness of the insulating layer 108 are selected considering the breakdown electric field strength. If the thickness of the insulating layer 108 is too thin, leakage will occur due to insufficient dielectric strength. Conversely, if the thickness of the insulating layer 108 is too thick, it will hinder the displacement of the piezoelectric element and reduce the amount of displacement. For this reason, the thickness of the insulating layer 108 is preferably between one-tenth and one-quarter of the thickness of the piezoelectric layer 104. (6) Signal lines and common wiring
[0031] The signal wiring 110 and common wiring 112 can be made of any material commonly used in electrical wiring, without any particular limitations. Examples include aluminum, copper, gold, or alloys thereof. A titanium or chromium film may also be inserted to improve adhesion with the lower layer of the signal wires and common wiring. The piezoelectric element 100 is generally driven by applying a high voltage of 30V or more at a high frequency of several hundred to several thousand Hz. Therefore, it is preferable to form the wiring to have a high slew rate by making the wiring film thickness relatively thick. (7) Encapsulation film
[0032] The sealing film 122 covers the entire piezoelectric element, including the signal wiring 110 and common wiring 112, as well as the upper electrode pad 116 and lower electrode pad 120. It is preferable to use a material for the sealing film 122 that possesses both high insulation and covering properties. Suitable materials for the sealing film include, for example, silica, silicon nitride, and alumina, all of which have high insulation properties. By providing a sealing film, it is possible to suppress the flow of current across the surface of the piezoelectric element in high-humidity environments, thereby suppressing the occurrence of failures.
[0033] According to the piezoelectric element 100 of this disclosure described above, peeling of the insulating layer and the occurrence of cracks can be suppressed.
[0034] (B) Method for manufacturing a piezoelectric element according to a first embodiment of the present disclosure The method for manufacturing the piezoelectric element of the first embodiment described above will be explained below with reference to Figures 3 and 4.
[0035] As shown in Figure 3(a), a substrate 124 is prepared. A silicon thermal oxide film 126 of about 500 nm (hereinafter referred to as oxide film 126) is formed on the upper surface (first surface) of the substrate 124 by a wet oxidation method. The wet oxidation method uses oxygen and hydrogen gas to form the silicon thermal oxide film.
[0036] Next, as shown in Figure 3(b), the lower electrode 102, piezoelectric layer 104, and upper electrode 106 are sequentially formed on the oxide film 126 of the substrate 124. The materials described above can be used for the lower electrode 102. Sputtering and vapor deposition methods can be used to form the lower electrode. For example, a platinum film with a thickness of 110 nm can be formed by sputtering. In the case of sputtering, for example, the film can be formed using Ar gas at a pressure of 0.2 Pa to 1.2 Pa and a DC power of 300 W to 800 W. In order to obtain adhesion between the lower electrode 102 and the oxide film 126, for example, titanium with a thickness of about 15 nm can be formed as an adhesion layer (not shown).
[0037] Next, a piezoelectric layer is formed on the lower electrode 102, for example, by a liquid-phase method (sol-gel method) or a sputtering method. When forming the piezoelectric layer 104 by a liquid-phase method (sol-gel method), first, a sol-gel solution is applied to the substrate by a spin-coating method and dried at a temperature of 200°C to 300°C. Then, the dried substrate is fired at a temperature of 700°C in an O2 atmosphere to crystallize the piezoelectric material. By repeating this process, a piezoelectric layer of the desired thickness can be formed. For example, when forming a lead zirconate titanate layer, the lead zirconate titanate layer can be repeatedly formed using the sol-gel method in a (100) orientation to form the piezoelectric layer 104. On the piezoelectric layer 104, a titanium-tungsten alloy film can be formed as the upper electrode 106 by a sputtering method, vapor deposition method, etc. The conditions for forming the upper electrode by sputtering can be the same as those for the lower electrode.
[0038] Next, as shown in Figure 3(c), a mask 302 is formed by photolithography so that the upper electrode 106 and the piezoelectric layer 104 are arranged in the desired pattern. The upper electrode 106 is dry-etched through the mask to pattern it. Subsequently, the portion of the piezoelectric layer 104 exposed from the mask 302 is thinned by dry etching. For dry etching, processing conditions such as using BCl3 as the etching gas, a pressure of 0.3 Pa, an antenna RF of 400 W, a bias RF of 150 W, and a processing time of 500 seconds can be used. Other dry etching conditions include using C4F8 as the etching gas and etching for 2000 seconds. After processing, the piezoelectric layer has a piezoelectric layer protrusion 304 whose upper surface is covered by the mask 302 and a thin-film portion 306. The side surface of this protrusion 304 corresponds to the second side surface 208 in Figure 2(a). Furthermore, the thin film portion 306 corresponds to the stepped surface 204 in Figure 2(a). The angle θ2 between the plane equal to the stepped surface of the thin film portion 306 formed as described above (the plane parallel to the lower electrode) and the second side surface 208 is preferably 45° or more and less than 75°.
[0039] The thickness of this thin film portion 306 corresponds to the thickness of the stepped portion 202. The thickness of this thin film portion 306, that is, the thickness from the upper surface of the lower electrode 102 to the stepped surface 204, can be controlled by the processing time of the dry etching for thinning. Such control can be appropriately performed by those skilled in the art. For example, the thickness of the thin film portion 306 can be about 300 nm.
[0040] Next, as shown in Figure 3(d), a mask 308 is formed on the protrusion 304 and around the protrusion 304 of the thin film portion 306 by photolithography. The thin film portion 306 is patterned by wet etching. For the etchant, for example, Pure Etch PT204 manufactured by Hayashi Pure Chemical Industries can be used. Specifically, wet etching can be performed using a mixture of NaF and HCl as the etchant. The processing time is appropriately changed depending on the mixing ratio and concentration of NaF and HCl, the method of forming the piezoelectric layer, and the thickness of the stepped portion to be formed. For example, to etch a stepped portion of 300 nm using PT204, which is a mixture of NaF (1%) - HCl (10%), the processing time can be approximately 5 seconds. As a result, a stepped portion 202 made of piezoelectric material is formed around the lower electrode 102 side of the piezoelectric layer protrusion 304. The portion of the thin film portion 306 that was covered by the mask 308 corresponds to the stepped surface 204 in Figure 2(a). In this manufacturing method, wet etching proceeds to the portion exposed from the mask 308 and to the inside of the mask boundary (in the case of Figure 3, in the horizontal direction of the piezoelectric layer, the longitudinal direction of the piezoelectric layer, or the -X direction), and the piezoelectric layer below the mask boundary (directly beneath the mask) can also be removed. The side surface (slope) of the piezoelectric layer formed by such wet etching corresponds to the first side surface 206 (Figure 4(a)).
[0041] Generally, wet etching allows for a lower taper angle when forming slopes compared to dry etching. Therefore, it is possible to form the shape of the stepped portion 202 in this process with good reproducibility (Figure 4)(a).
[0042] Furthermore, both platinum, which is suitably used as the lower electrode 102, and lead zirconate titanate, which is suitably used as the piezoelectric layer, are difficult to etch, making it difficult to achieve a high selectivity ratio in the case of dry etching. As a result, dry etching can lead to over-etching, excessively etching the lower electrode 102 and degrading its electrical properties. In contrast, wet etching makes it easier to achieve a high selectivity ratio between the piezoelectric layer and the lower electrode materials compared to dry etching, thus minimizing etching of the lower electrode 102 due to over-etching.
[0043] The angle θ1 formed between the first side surface 206 and the stepped surface 204 is preferably greater than 135°. The angle θ1 is more preferably between 140° and 160°.
[0044] Furthermore, as shown in Figure 4(b), during dry etching of the piezoelectric layer, etching byproducts may adhere to the etched area, forming a mask 402, resulting in unintended etching residue 404. If the portion exposed from the mask 308 is patterned by wet etching, as in this embodiment, such unintended etching residue can be removed simultaneously (Figure 4(c)). This is an advantage of the manufacturing method of the present disclosure. Note that, unlike dry etching, wet etching proceeds horizontally (longitudinal direction of the piezoelectric layer, -X direction), as described above, and as shown in Figure 4(c), the peripheral portion of the piezoelectric layer directly below the edge of the mask 308 can also be removed.
[0045] Next, as shown in Figure 3(e), a resist pattern (not shown) is formed on the lower electrode 102 using photolithography again so that it forms the desired pattern, and then the lower electrode 102 is patterned by etching.
[0046] Next, as shown in Figure 3(f), an insulating layer 108 is formed over the entire surface of the patterned substrate 124. Although not specifically shown, in this embodiment, the insulating layer 108 may be a laminate having a laminated structure. When the insulating layer 108 has a laminated structure, the procedure for forming the insulating layer 108 can be to first form, for example, an aluminum oxide film using the ALD method (atomic layer deposition method), and then form a silicon oxide film using the CVD method (chemical vapor deposition method). The insulating layer 108 may be formed by a combination of the ALD method and the CVD method, or by the CVD method alone.
[0047] Next, as shown in Figure 3(g), a through-hole leading to the upper electrode 106 and the lower electrode 102 is formed in the insulating layer 108 by photolithography. This through-hole corresponds to the upper electrode contact portion 114 and the lower electrode contact portion 118. This through-hole can be formed by forming a resist pattern (not shown) on the lower electrode and etching it.
[0048] Next, as shown in Figure 3(h), wiring material is formed on the insulating layer 108 by sputtering or the like. Materials such as an aluminum-copper alloy can be used for the wiring material. A resist pattern (not shown) is formed on the insulating layer containing the formed wiring material by photolithography to create a desired pattern, and signal wiring 110 and common wiring 112, as well as upper electrode pads 116 and lower electrode pads 120, are formed by etching.
[0049] Next, as shown in Figure 3(i), a sealing film 122 is formed to cover the insulating layer, each wiring, and each electrode pad. For the sealing film, for example, a silicon nitride film with high moisture resistance can be used and formed to a thickness of 250 nm by the CVD method. Although not shown, after this, an opening is formed in the sealing film 122 above the electrode terminals by resist patterning and etching. Through this opening, each wiring of the signal wiring 110 and common wiring 112 is connected to an actuator drive circuit or device located at the end of these wirings. Voltage is applied from this circuit or device to drive the piezoelectric element of this disclosure.
[0050] The piezoelectric element 100 obtained in this manner will be subjected to a high-temperature, high-humidity bias test to evaluate its durability. Specifically, the piezoelectric element will be held for 200 hours under an environment of 85°C and 85% humidity while a 60V DC voltage is applied. After that, the condition of the piezoelectric element 100 will be checked.
[0051] (C) A second embodiment of the piezoelectric element of the present disclosure A second embodiment of the piezoelectric element of this disclosure will be described with reference to Figures 5 and 6.
[0052] The piezoelectric element of the second embodiment has a plurality of inclined surfaces on the first side surface 206 described in the first embodiment. In the following description, the second embodiment will be specifically described using the case in which the first side surface 206 has a first inclined surface 502 and a second inclined surface 504, as shown in Figures 5(a) and 5(b). The following description is an example for illustrating the second embodiment of the present disclosure and is not intended to limit the piezoelectric elements of the present disclosure.
[0053] Figures 5(a) and 5(b) show partial cross-sectional views of the side portion of the piezoelectric element 100 of this embodiment. The configuration of the second embodiment will be described as shown in Figure 5(a). In the piezoelectric element of the second embodiment, similar to the first embodiment of this disclosure, the piezoelectric layer 104 has a tapered shape in which the longitudinal width increases in the direction from the upper electrode side to the lower electrode side (-Z direction, film thickness direction). In the piezoelectric element of the second embodiment, a stepped portion 202 is formed on the lower electrode side of the side portion 200 of the piezoelectric layer 104. The stepped portion 202 has a stepped surface 204 parallel to the lower electrode 102 and a first side surface 206 extending from the stepped surface 204 to the lower electrode 102. The first side surface is the side surface of the piezoelectric layer from the stepped surface 204 to the upper surface 210 of the lower electrode. In this embodiment, the angle between the stepped surface 204 and the first side surface 206 is referred to as θ1. It is preferable that the angle θ1 is greater than 135°. In this disclosure, it is more preferable that θ1 is between 140° and 160°.
[0054] Figure 5(b) shows a cross-sectional view of the vicinity of the end of the side surface of the piezoelectric layer 104 of this embodiment (part (5A) in Figure 5(a)). (For simplicity, the upper electrode 106 and the insulating layer 108 are omitted in Figure 5(b).) The first side surface 206 has a first inclined surface 502 that is in direct contact with the stepped surface 204, and a second inclined surface 504 that extends from the first inclined surface 502 to the lower electrode 102. The angle θ1 between the stepped surface 204 and the first inclined surface 502 is the same as the θ1 described above, and is preferably greater than 135°, and more preferably between 140° and 160°. In the piezoelectric element 100 of this embodiment, the first side surface 206 has a first inclined surface 502 and a second inclined surface 504. The angle θ4 between the lower electrode 102 and the second inclined surface 504 is preferably 90° or less.
[0055] As described above, in the piezoelectric element 100 of this embodiment, the first side surface 206 has a first inclined surface 502 and a second inclined surface 504. Therefore, the surface area of the first side surface can be increased compared to the piezoelectric element of the first embodiment. Also, if the angle θ4 between the lower electrode 102 and the second inclined surface 504 is greater than the angle θ3 between the first inclined surface 502 and the surface 506 parallel to the upper surface 210 of the lower electrode, the contact area between the piezoelectric layer 104 and the lower electrode 102 becomes smaller. That is, the area (bottom area) of the piezoelectric layer in the piezoelectric element 100 can be reduced.
[0056] In this disclosure, the angle between the first inclined surface 502 and the surface 506 parallel to the upper surface 210 of the lower electrode is defined as θ3. The angle θ3 can also be defined as the angle between the surface obtained by virtually extending the first inclined surface 502 and the upper surface 210 of the lower electrode, as shown in the cross-sectional view of Figure 5(b).
[0057] (D) Method for manufacturing a piezoelectric element according to a second embodiment of the present disclosure The method for manufacturing the piezoelectric element 100 in the second embodiment will be described below.
[0058] The piezoelectric element of this embodiment is the same as that of the first embodiment, except for the process of processing the first side surface 206. Therefore, the following description will focus on the processing of the first side surface 206. The other processing steps are as described in the first embodiment.
[0059] The manufacturing process for the first side surface of this embodiment will be described with reference to Figures 6(a) and 6(b). Figures 6(a) and 6(b) are schematic diagrams of the manufacturing process for the first side surface of the piezoelectric layer 104 in this embodiment.
[0060] As shown in Figure 6(a), a mask 602 is formed by photolithography so that a portion of the end side 604 of the piezoelectric element is exposed on the first side surface 206. Next, the end side 604 of the piezoelectric layer 104 that is exposed from the mask 602 is dry-etched. The processing method for the first side surface in this embodiment is the same as the processing method for forming the first side surface in the first embodiment. The processing conditions for the first side surface can be a pressure of 0.3 Pa, an antenna RF of 400 W, a bias RF of 150 W, and a processing time of 50 seconds. As a result, as shown in Figure 6(b), a first slope 502 on the stepped surface 204 side and a second slope 504, which is a slope from the bottom of the first slope 502 to the lower electrode 102, are formed on the first side surface 206. The angle between the second slope 504 formed in this way and the lower electrode 102 is defined as θ4 (Figure 5(b)). It is preferable that the angle θ4 is greater than the angle θ3 shown in Figure 5(b).
[0061] The piezoelectric element 100 obtained in this manner will be subjected to a high-temperature, high-humidity bias test to evaluate its durability. Specifically, the piezoelectric element will be held for 200 hours under conditions of 85°C and 85% humidity while a 60V DC voltage is applied. After that, the condition of the piezoelectric element 100 will be checked.
[0062] In the above description of the second embodiment, an example was shown in which the first side surface 206 is composed of two slopes, a first slope 502 and a second slope 504. However, in this disclosure, the first side surface 206 may be composed of two or more slopes. In that case, the number of slopes is not particularly limited.
[0063] In this disclosure, if the first side surface 206 includes a plurality of inclined surfaces, it is preferable that the inclined surfaces from the stepped surface 204 to the lower electrode 102 include the (n+1) inclined surfaces from the first inclined surface (where n represents the number of inclined surfaces, and n is an integer of 1 or more, preferably an integer of 1 or more and 5 or less). Furthermore, it is preferable that the angle between each of the plurality of inclined surfaces and the lower electrode 102 or a surface parallel thereto is greater than the corresponding angle of the preceding inclined surface.
[0064] The piezoelectric element of this disclosure described above can suppress delamination and cracking of the insulating layer. Furthermore, it is preferable that the piezoelectric element does not adversely affect the displacement of the piezoelectric element when it is driven. The piezoelectric element of this disclosure can suppress such adverse effects.
[0065] (E) Third Embodiment Referring to Figures 7 and 8, an inkjet printer, which serves as a liquid ejection device to which the piezoelectric element of this disclosure can be applied, will be described.
[0066] Figure 7 is a schematic diagram showing the configuration of the main parts of an inkjet printer as a liquid ejection device to which the piezoelectric element of this disclosure can be applied. Figure 7(a) is an overall diagram showing the overall configuration of the liquid ejection device 700. As shown in Figure 7(a), the liquid ejection device 700 includes a liquid ejection head 702, a carriage that is movable along the scanning direction of the liquid ejection head 702, and a transport mechanism for transporting the medium 704. In the liquid ejection device 700, the liquid ejection head 702 is mounted on a carriage that is movable along the scanning direction, and as the carriage moves in conjunction with the transport of the medium 704, ink can be deposited at a desired position on the medium 704. In this way, the liquid ejection device 700 records an image on the medium 704 by ejecting ink droplets from an ejection port (not shown) corresponding to the nozzle of the liquid ejection head 702. In this embodiment, a serial-type liquid ejection device is shown as an example, but the piezoelectric element of this disclosure can also be applied to a full-line type.
[0067] Figure 7(b) is a perspective view showing the liquid discharge head 702, which is a component of the liquid discharge device 700. As shown in Figure 7(b), the liquid discharge head 702 includes a piezoelectric element substrate 706 having multiple nozzle rows in which multiple nozzles are arranged.
[0068] Figure 8 shows the configuration of the main part of the piezoelectric element substrate 706 of the liquid discharge head 702 of this embodiment. The piezoelectric element substrate 706 has the piezoelectric element 100 of the embodiment described above. The base material 124 described above has an oxide film 126 and a diaphragm 802 formed on it, and has a flow channel forming substrate 804 and a nozzle plate 806, and nozzle holes 808 are formed in the nozzle plate 806. Multiple nozzle holes may be formed. Liquid ink is discharged from the nozzle holes 808. The flow channel forming substrate 804 is provided on the nozzle plate 806, and a pressure chamber 810 is formed by the flow channel forming substrate 804 partitioning the space between the nozzle plate 806 and the diaphragm 802. Although not shown in Figure 8 for simplification, in addition to the pressure chamber 810, various flow channels for ink circulation are formed in the flow channel forming substrate 804. The ink is supplied to the ink flow channel via a tube from an ink tank provided outside the liquid discharge head 702 and inside the liquid discharge device 700. The piezoelectric element 100 is electrically connected to a drive circuit (not shown) and operates based on signals from the drive circuit. The diaphragm 802 deforms due to the movement of the piezoelectric layer 104, changing the internal pressure of the pressure chamber 810, thereby causing ink to be ejected from the nozzle hole 808. [Examples]
[0069] The piezoelectric elements of this disclosure will be described in more detail below with reference to examples.
[0070] (Example 1) This embodiment is an example of a piezoelectric element according to the first embodiment.
[0071] As shown in Figure 3(a), a silicon wafer substrate 124 was prepared, and a silicon thermal oxide film of about 500 nm was formed on the upper surface (first surface) of the substrate 124 by a wet oxidation method using oxygen and hydrogen gas, thereby forming an oxide film 126.
[0072] Next, as shown in Figure 3(b), a lower electrode 102, a piezoelectric layer 104, and an upper electrode 106 were sequentially formed on the upper surface of the substrate 124 on which the oxide film 126 was formed. A platinum film with a thickness of 110 nm was formed as the lower electrode 102 by sputtering. In order to obtain adhesion between the lower electrode 102 and the oxide film 126, a titanium layer with a thickness of 15 nm was formed as an adhesion layer (not shown). A piezoelectric layer 104 with a thickness of 2.1 μm was formed on the lower electrode 102 by repeatedly forming layers of lead zirconate titanate in a (100) orientation using a liquid-phase method (sol-gel method). An alloy film of titanium and tungsten with a thickness of 110 nm was formed as the upper electrode 106 on the piezoelectric layer 104 by sputtering.
[0073] Next, as shown in Figure 3(c), a mask 302 was formed by photolithography so that the upper electrode 106 and the piezoelectric layer 104 would form the desired pattern. Then, the upper electrode 106 was dry-etched to pattern it. Subsequently, the portion of the piezoelectric layer 104 exposed from the mask 302 was thinned by dry etching. For the dry etching process, BCl3 was used as the etching gas, the pressure was 0.3 Pa, the antenna RF was 400 W, the bias RF was 150 W, and the processing time was 500 seconds. After processing, the piezoelectric layer had a convex portion 304 formed by the piezoelectric layer with its upper surface covered by the mask 302, and a thin-film portion 306. The side surface of this convex portion 304 corresponds to the second side surface 208 in Figure 2(a). The angle θ2 between the thin-film portion 306 and the second side surface 208 was 70°.
[0074] The thickness of the thin film portion 306 corresponds to the thickness of the stepped portion 202. The thickness from the upper surface of the lower electrode 102 to the stepped surface 204 can be controlled by the dry etching process time for thinning. In this embodiment, the thickness of the thin film portion 306 was 300 nm.
[0075] Next, as shown in Figure 3(d), a mask 308 was formed around the protrusion 304 and the thin film portion 306 by photolithography. The thin film portion 306 was patterned by wet etching. Pure Etch PT204 manufactured by Hayashi Pure Chemical Industries was used as the etchant. Specifically, PT204, a mixture of NaF (1%) and HCl (10%), was used to etch for approximately 5 seconds, forming a 300 nm stepped portion. This formed a piezoelectric stepped portion 202 around the lower electrode 102 side of the protrusion 304 in the piezoelectric layer. Of the thin film portion 306, the portion covered by the mask 308 corresponds to the stepped surface 204 and the portion covered by the mask 308 in Figure 2(a), and the slope formed on the portion exposed from the mask 308 corresponds to the first side surface 206.
[0076] Generally, compared to dry etching, wet etching allows for a lower taper angle when forming a slope. Therefore, it is possible to form the stepped portion 202 in this embodiment with good reproducibility.
[0077] In this embodiment, the angle θ1 between the first side surface 206 and the stepped surface 204 was 150°.
[0078] Next, as shown in Figure 3(e), a resist pattern (not shown) was formed on the lower electrode 102 using photolithography again to create the desired pattern, and then the lower electrode 102 was patterned by etching.
[0079] Next, as shown in Figure 3(f), an insulating layer 108 was formed on the entire surface of the substrate 124 where the pattern was formed. Although not specifically shown in the figures, in this embodiment, the insulating layer 108 had a laminated structure. The procedure for forming the insulating layer 108 involved first forming a 20 nm thick aluminum oxide film using the ALD method (atomic layer deposition method), and then depositing a 450 nm thick silicon oxide film using the CVD method (chemical vapor deposition method). The insulating layer 108 may be deposited using a combination of the ALD method and the CVD method, or it may be deposited using only the CVD method.
[0080] Next, as shown in Figure 3(g), through-holes leading to the upper electrode 106 and the lower electrode 102 were formed in the insulating layer 108 by photolithography. These through-holes can be formed by creating a resist pattern (not shown) and then etching to form the upper electrode contact portion 114 and the lower electrode contact portion 118.
[0081] Next, as shown in Figure 3(h), a wiring material was deposited on the insulating layer 108 by sputtering. An aluminum-copper alloy was used as the wiring material, with a thickness of 700 nm. A resist pattern (not shown) was formed by photolithography to create the desired pattern. Subsequently, signal wiring 110 and common wiring 112, as well as the upper electrode pad 116 and lower electrode pad 120, were formed by etching.
[0082] Next, as shown in Figure 3(i), a sealing film 122 was formed to cover each wiring and each electrode pad. A highly moisture-resistant silicon nitride film was used for the sealing film and was deposited at a thickness of 250 nm by CVD. Although not shown in the figure, after this, an opening was formed in the sealing film 122 above the electrode terminals by resist patterning and etching. Through this opening, the wiring of the signal wiring 110 and the common wiring 112 were connected to the actuator drive circuit or device located at the ends of these wirings, and voltage was applied from this circuit or device.
[0083] The piezoelectric element 100 obtained in this manner was subjected to a high-temperature, high-humidity bias test to evaluate its durability. Specifically, it was maintained for 200 hours under an environment of 85°C and 85% humidity with a DC voltage of 60V applied. After that, the state of the piezoelectric element 100 was checked, and it was confirmed that there was no destruction or peeling of the insulating layer 108 in the piezoelectric element 100, and that it was maintaining a normal state.
[0084] (Example 2) Example 2 is an example of a piezoelectric element according to a second embodiment of the present disclosure.
[0085] The piezoelectric element 100 in Example 2 can be manufactured using the same method as in Example 1, except that the first side surface 206 is processed into multiple bevels. Therefore, the explanation of the steps other than the process of processing the first side surface 206 will be omitted.
[0086] Figures 6(a) and 6(b) show schematic diagrams of the processing steps for the side wall of the piezoelectric layer 104 in Example 2. As shown in Figure 6(a), a mask 602 was formed by photolithography so that a portion of the end side 604 of the piezoelectric element of the first side surface 206 was exposed. Next, the end side 604 of the piezoelectric layer 104 exposed from the mask 602 was dry etched. The processing conditions for dry etching in Example 2 were a pressure of 0.3 Pa, an antenna RF of 400 W, a bias RF of 150 W, and a processing time of 50 seconds. As a result, as shown in Figure 6(b), a first slope 502 on the stepped surface 204 side and a second slope 504, which is a slope from the bottom of the first slope 502 to the lower electrode 102, were formed on the first side surface 206. The angle θ4 between the second slope 504 thus formed and the lower electrode 102 was 70°.
[0087] To evaluate the durability of the piezoelectric element obtained in this manner, a high-temperature, high-humidity bias test was performed. Specifically, a DC voltage of 60V was applied and maintained for 200 hours in an environment of 85°C and 85% humidity. After that, the state of the piezoelectric element 100 was checked, and it was confirmed that there was no destruction or peeling of the insulating layer 108 in the piezoelectric element 100, and that it was maintaining a normal state.
[0088] (Comparative Example 1) Comparative Example 1 is an example where both angles θ1 and θ2 are outside the scope of this disclosure.
[0089] In this comparative example, a piezoelectric element was fabricated such that θ1 was 110°, θ2 was 80°, the thickness of the piezoelectric layer was 2.1 μm, the thickness of the insulating layer was 450 nm, and the thickness of the stepped surface was 300 nm. The fabrication procedure was the same as in Example 1.
[0090] The durability of the obtained piezoelectric element was evaluated using the same procedure as in Example 1. Durability was evaluated using a high-temperature, high-humidity bias test. Specifically, the piezoelectric element was held for 200 hours under an environment of 85°C and 85% humidity while a DC voltage of 60V was applied. After that, the condition of the piezoelectric element was checked. As a result, cracks and delamination of the insulating layer occurred at the ends of the piezoelectric element, and leakage current was observed between the lower and upper electrodes resulting from this. These cracks occurred particularly near the intersection of the second side surface and the stepped surface. This is thought to be because the insulating layer was not deposited near this intersection, resulting in a void.
[0091] (Comparative Example 2) Comparative Example 2 is an example where only the angle θ1 is outside the scope of this disclosure.
[0092] In this comparative example, a piezoelectric element was fabricated such that θ1 was 110°, θ2 was 70°, the thickness of the piezoelectric layer was 2.1 μm, the thickness of the insulating layer was 450 nm, and the thickness from the electrode surface to the step surface was 300 nm. The fabrication procedure was the same as in Example 1.
[0093] The durability of the obtained piezoelectric element was evaluated using the same procedure as in Example 1. Durability was evaluated using a high-temperature, high-humidity bias test. Specifically, the piezoelectric element was held for 200 hours under an environment of 85°C and 85% humidity while a DC voltage of 60V was applied. After that, the condition of the piezoelectric element was checked. As a result, cracks and delamination of the insulating layer occurred at the ends of the piezoelectric element, and leakage current was observed between the lower electrode and the upper electrode as a result. These cracks occurred particularly near the intersection of the first side surface and the stepped surface. This is thought to be because stress concentration occurred near this intersection due to the displacement during the operation of the piezoelectric element, causing delamination at the interface between the insulating layer and the first side surface.
[0094] (Comparative Example 3) Comparative Example 3 is an example where only the angle θ2 is outside the scope of this disclosure (when the angle is large).
[0095] In this comparative example, a piezoelectric element was fabricated such that the angle θ1 was 150°, θ2 was 80°, the thickness of the piezoelectric layer was 2.1 μm, the thickness of the insulating layer was 450 nm, and the thickness from the lower electrode surface to the step surface was 300 nm. The fabrication procedure was the same as in Example 1.
[0096] The durability of the obtained piezoelectric element was evaluated using the same procedure as in Example 1. Durability was evaluated using a high-temperature, high-humidity bias test. Specifically, the piezoelectric element was held for 200 hours under conditions of 85°C and 85% humidity, with a DC voltage of 60V applied to it. After that, the condition of the piezoelectric element was checked. As a result, delamination of the insulating layer occurred at the ends of the piezoelectric element, and leakage current was observed between the lower and upper electrodes as a result. The above-mentioned delamination of the insulating layer occurred particularly near the intersection of the first side surface and the stepped surface. This is thought to be because the insulating layer was not formed near this intersection, resulting in a void.
[0097] (Comparative Example 4) Comparative Example 4 is an example where only the angle θ2 is outside the scope of this disclosure (when the angle is small).
[0098] In this comparative example, a piezoelectric element was fabricated such that the angle θ1 was 150°, θ2 was 30°, the thickness of the piezoelectric layer was 2.1 μm, the thickness of the insulating layer was 450 nm, and the thickness from the lower electrode surface to the step surface was 300 nm. The fabrication procedure was the same as in Example 1.
[0099] The durability of the obtained piezoelectric elements was evaluated using the same procedure as in Example 1. Durability was evaluated using a high-temperature, high-humidity bias test. Specifically, the piezoelectric elements were subjected to a DC voltage of 60V for 200 hours under conditions of 85°C and 85% humidity. After that, the condition of the piezoelectric elements was checked. As a result, no destruction or peeling of the insulating layer was observed in the piezoelectric elements, and it was confirmed that they maintained a normal state. However, when θ2 was less than 45°, the displacement of the piezoelectric elements during operation decreased by more than 5% compared to when θ2 was 45° or greater. In addition, there is a drawback in that the area on the lower side of the piezoelectric element is larger than the area of the lower electrode.
[0100] As described above, the piezoelectric element of this disclosure can suppress stress concentration at the edges of the piezoelectric layer without affecting the displacement of the piezoelectric element, and the insulating layer covering the piezoelectric element has excellent coverage. [Explanation of Symbols]
[0101] 100 Piezoelectric element 102 Lower electrode 104 Piezoelectric layer 106 Upper electrode 108 Insulator layer 124 Base material
[0102] <<Other Embodiments>> The disclosures described in each of the above embodiments include configurations represented by the following example of a liquid dispensing head.
[0103] <Configuration 1> A piezoelectric element comprising a lower electrode, a piezoelectric layer, and an upper electrode provided on a substrate, and an insulating layer that at least covers the substrate, the lower electrode, the piezoelectric layer, and the upper electrode, The longitudinal cross-sectional shape of the piezoelectric layer is tapered, with the lower electrode side being wider than the upper electrode side. The longitudinal side surface of the piezoelectric layer from the upper electrode to the lower electrode has a stepped surface parallel to the lower electrode, a first side surface extending from the stepped surface to the lower electrode, and a second side surface extending from the stepped surface to the upper surface of the piezoelectric layer. The angle θ1 between the stepped surface and the first side surface is greater than 135°. A piezoelectric element characterized in that the angle θ2 between a virtual plane extending from the stepped surface into the interior of the piezoelectric layer and parallel to the lower electrode, and the second side surface, is 45° or more and less than 75°.
[0104] <Configuration 2> The piezoelectric element according to configuration 1, wherein the insulating layer is a laminate of two or more insulating layers.
[0105] <Structure 3> A piezoelectric element according to configuration 1 or 2, wherein the thickness of the insulating layer is one-tenth or more and one-quarter or less of the thickness of the piezoelectric layer.
[0106] <Structure 4> A piezoelectric element according to any one of configurations 1 to 3, wherein the thickness from the lower electrode to the stepped surface is one-tenth or more of the thickness of the piezoelectric layer.
[0107] <Composition 5> A piezoelectric element according to any one of configurations 1 to 4, wherein the first side surface of the piezoelectric layer has two or more inclined surfaces.
[0108] <Composition 6> A piezoelectric element according to any one of configurations 1 to 5, wherein the second side surface of the piezoelectric layer has two or more inclined surfaces.
[0109] <Composition 7> A liquid dispensing head having a piezoelectric element as described in any one of configurations 1 to 6.
[0110] <Structure 8> A liquid dispensing device having the liquid dispensing head described in configuration 7.
[0111] <Composition 9> A method for manufacturing a piezoelectric element comprising a lower electrode, a piezoelectric layer, and an upper electrode provided on a substrate, and an insulating layer that at least covers the substrate, the lower electrode, the piezoelectric layer, and the upper electrode, (i) A step of forming a lower electrode on a substrate, (ii) A step of forming a piezoelectric layer on the lower electrode, (iii) A step of forming an upper electrode on the piezoelectric layer, (iv) A step of forming a first mask on a part of the upper electrode, dry etching the portion of the upper electrode exposed from the first mask, and patterning the upper electrode to form a portion in which the piezoelectric layer is exposed, (v) A step of dry etching the portion of the piezoelectric layer that is exposed, thinning a part of the piezoelectric layer, and forming a tapered shape on the longitudinal side surface of the piezoelectric layer that extends from the upper electrode to the lower electrode, (vi) A step of forming a second mask on at least the longitudinal side surface of the piezoelectric layer and the portion surrounding the longitudinal side surface of the piezoelectric layer, (vii) The step of removing by wet etching the peripheral portion of the longitudinal side surface of the piezoelectric layer exposed from the second mask and the portion directly below the end of the second mask, thereby forming a stepped surface on the lower electrode side of the side surface of the piezoelectric layer, (viii) A step of forming at least the upper electrode, the side surface of the piezoelectric layer, the stepped surface, and an insulating layer covering the lower electrode, A method for manufacturing a piezoelectric element that includes [a specific component].
[0112] <Composition 10> A method for manufacturing a piezoelectric element according to configuration 9, wherein the longitudinal side surface of the piezoelectric layer from the upper electrode to the lower electrode is formed by steps (iv) to (vii) by which a stepped surface parallel to the lower electrode, a first side surface extending from the stepped surface to the lower electrode, and a second side surface extending from the stepped surface to the upper surface of the piezoelectric layer, the angle θ1 between the stepped surface and the first side surface being greater than 135°, and the angle θ2 between the second side surface and a virtual plane parallel to the lower electrode that extends from the stepped surface inward into the piezoelectric layer is 45° or more and less than 75°.
[0113] <Composition 11> A method for manufacturing a piezoelectric element according to configuration 9 or configuration 10, After step (vii) above, (vii') A step of forming a third mask on a part of the first side surface from the upper electrode of the piezoelectric layer to the stepped surface, the stepped surface, and from the stepped surface to the lower electrode, (vii'') A step of dry etching the portion of the first side surface of the piezoelectric layer that is exposed from the third mask, thereby removing a portion of the first side surface, A method for manufacturing a piezoelectric element further comprising the above.
[0114] <Composition 12> The manufacturing method according to configuration 11, further comprising the step of repeating the steps (vii') and (vii'') multiple times, following the step (vii'').
Claims
1. A piezoelectric element comprising a lower electrode, a piezoelectric layer, and an upper electrode provided on a substrate, and an insulating layer that at least covers the substrate, the lower electrode, the piezoelectric layer, and the upper electrode, The longitudinal cross-sectional shape of the piezoelectric layer is tapered, with the lower electrode side being wider than the upper electrode side. The longitudinal side surface of the piezoelectric layer from the upper electrode to the lower electrode has a stepped surface parallel to the lower electrode, a first side surface extending from the stepped surface to the lower electrode, and a second side surface extending from the stepped surface to the upper surface of the piezoelectric layer. The angle θ between the stepped surface and the first side surface 1 If it is greater than 135°, The angle θ between the virtual plane extending from the stepped surface into the interior of the piezoelectric layer and parallel to the lower electrode, and the second side surface. 2 A piezoelectric element characterized by having a range of 45° or more and less than 75°.
2. The piezoelectric element according to claim 1, wherein the insulating layer is a laminate of two or more insulating layers.
3. The piezoelectric element according to claim 1, wherein the thickness of the insulating layer is one-tenth or more and one-quarter or less of the thickness of the piezoelectric layer.
4. The piezoelectric element according to claim 1, wherein the thickness from the lower electrode to the stepped surface is one-tenth or more of the thickness of the piezoelectric layer.
5. The piezoelectric element according to claim 1, wherein the first side surface of the piezoelectric layer has two or more inclined surfaces.
6. The piezoelectric element according to claim 1, wherein the second side surface of the piezoelectric layer has two or more inclined surfaces.
7. A liquid dispensing head having a piezoelectric element as described in claim 1.
8. A liquid dispensing device having the liquid dispensing head described in claim 7.
9. A method for manufacturing a piezoelectric element comprising a lower electrode, a piezoelectric layer, and an upper electrode provided on a substrate, and an insulating layer that at least covers the substrate, the lower electrode, the piezoelectric layer, and the upper electrode, (i) A step of forming a lower electrode on a substrate, (ii) A step of forming a piezoelectric layer on the lower electrode, (iii) A step of forming an upper electrode on the piezoelectric layer, (iv) A step of forming a first mask on a part of the upper electrode, dry etching the portion of the upper electrode exposed from the first mask, and patterning the upper electrode to form a portion in which the piezoelectric layer is exposed, (v) A step of dry etching the portion of the piezoelectric layer that is exposed, thinning a part of the piezoelectric layer, and forming a tapered shape on the longitudinal side surface of the piezoelectric layer that extends from the upper electrode to the lower electrode, (vi) A step of forming a second mask on at least the longitudinal side surface of the piezoelectric layer and the portion surrounding the longitudinal side surface of the piezoelectric layer, (vii) The step of removing by wet etching the peripheral portion of the longitudinal side surface of the piezoelectric layer exposed from the second mask and the portion directly below the end of the second mask, thereby forming a stepped surface on the lower electrode side of the side surface of the piezoelectric layer, (viiii) A step of forming at least the upper electrode, the side surface of the piezoelectric layer, the stepped surface, and an insulating layer covering the lower electrode, A method for manufacturing a piezoelectric element that includes [a specific component].
10. The longitudinal side surface of the piezoelectric layer from the upper electrode to the lower electrode is formed by steps (iv) to (vii) as follows: a stepped surface parallel to the lower electrode, a first side surface extending from the stepped surface to the lower electrode, and a second side surface extending from the stepped surface to the upper surface of the piezoelectric layer, with the angle θ between the stepped surface and the first side surface. 1 The angle θ is greater than 135° and is the angle between the second side surface and a virtual plane parallel to the lower electrode that points from the stepped surface towards the interior of the piezoelectric layer. 2 A method for manufacturing a piezoelectric element according to claim 9, wherein the angle is 45° or more and less than 75°.
11. A method for manufacturing a piezoelectric element according to claim 9 or 10, After step (vii) above, (vii') A step of forming a third mask on a part of the first side surface from the upper electrode of the piezoelectric layer to the stepped surface, the stepped surface, and from the stepped surface to the lower electrode, (vii'') A step of dry etching the portion of the first side surface of the piezoelectric layer that is exposed from the third mask, thereby removing a portion of the first side surface, A method for manufacturing a piezoelectric element further comprising the above.
12. A method for manufacturing a piezoelectric element according to claim 11, further comprising the step of repeating the steps (vii') and (vii'') multiple times, following the step (vii'').