Power converter, diagnostic system, and diagnostic method

Abstract

This technology provides a simple configuration that enables high-precision detection of abnormalities and damage to power conversion devices. [Solution] A power conversion device 1 comprising power semiconductor modules 3a to 3f having switching elements, comprising gate drive circuits 4a to 4f that drive the switching elements and output feedback signals corresponding to the switching operation of the switching elements, a control unit 13 that outputs a PWM command signal for switching to the gate drive circuits, a logic unit 16 that calculates phase data of the load current waveform, a feedback signal anomaly detection unit 12 that performs a logical determination between the PWM command signal and the feedback signal and stores mismatched time series data, and a parameter calculation unit 15 that converts the mismatched time series data into phase and calculates the degree of damage to the power semiconductor module based on the phase distribution of the degree of mismatch.

Description

Technical Field

[0001] The present invention relates to a power conversion device, a diagnostic system, and a diagnostic method.

Background Art

[0002] In power conversion devices such as motor control for railway vehicles and large industries, or high-capacity frequency conversion devices for power systems, high-voltage and high-current power control is performed using high-capacity power semiconductor devices. If such equipment fails during operation, it may cause system damage and unplanned stoppages, resulting in significant economic losses. Therefore, it is required to prevent damage to the power conversion device and extend its lifespan by detecting deterioration and abnormalities in the power conversion device and notifying relevant personnel of the need for maintenance.

[0003] Power semiconductor modules used for high-capacity power semiconductor devices require functional insulation between module terminals and basic insulation between the base plate and module terminals, and the material and structure of the insulating substrate are designed according to the insulation withstand. Inside the power semiconductor module, insulating encapsulation materials such as silicone gel and polyimide are filled, but the insulation performance deteriorates due to aging deterioration caused by thermal decomposition and moisture absorption, or partial discharge through defects exceeding the detection limit. Therefore, even if the power conversion device is operating within its rated capacity, partial discharge may lead to full-line discharge (insulation breakdown), and the power semiconductor module may be damaged. It is difficult to predict the critical state of insulation failure, and there are individual differences in long-term reliability, so regular maintenance is required, and component replacement is carried out as necessary.

[0004] In high-capacity power conversion devices, due to the problems of work load and inspection cost caused by removing the power semiconductor module from the device, the power semiconductor module is not inspected during normal regular maintenance, and component replacement is carried out during large-scale maintenance such as overhaul or when a malfunction or failure occurs. There are Patent Documents 1 to 4 as technologies for diagnosing partial discharge in the operating state without removing the power semiconductor module from the power conversion device.

[0005] Patent Document 1 describes calculating the junction temperature of a switching element based on a PWM command signal and a feedback signal, and analyzing the state of a power semiconductor module according to the junction temperature calculated by the temperature detection unit and the PWM command signal.

[0006] Patent Document 2 describes a method for diagnosing whether or not there is an abnormality in the gate voltage of a power device by comparing a gate drive signal and a gate voltage detection signal to form a signal loop in the drive path and detection path of the gate voltage.

[0007] Patent Document 3 describes the logic level of the gate input signal for driving a power conversion semiconductor element. The documentation states that the logic level of the gate terminal voltage of the power conversion semiconductor element is compared with the logic level of the gate terminal voltage of the power conversion semiconductor element, and if there is a mismatch, the power conversion semiconductor element is shut off.

[0008] Patent Document 4 describes detecting light emission caused by partial discharge of bonding wires connecting electrodes of semiconductor elements inside a power module to external terminals. [Prior art documents] [Patent Documents]

[0009] [Patent Document 1] Japanese Patent Publication No. 2018-183015 [Patent Document 2] International Publication No. 2021 / 255989 [Patent Document 3] Japanese Patent Publication No. 2003-125588 [Patent Document 4] Japanese Patent Publication No. 2009-036656 [Overview of the project] [Problems that the invention aims to solve]

[0010] To diagnose partial discharge in power semiconductor modules while a power converter is operating, embedding a partial discharge detection sensor inside the semiconductor element presents challenges in terms of cost and reliability. Furthermore, installing a partial discharge detection sensor outside the power converter and measuring the partial discharge signal with an oscilloscope is impractical due to the workload and cost involved.

[0011] The above-mentioned Patent Documents 1 to 4 do not describe any technology for detecting abnormalities or damage to power converters with high accuracy using a simple configuration without providing additional partial discharge sensors.

[0012] Therefore, the present invention aims to provide a technology that can detect abnormalities or damage to power conversion devices with high accuracy using a simple configuration. [Means for solving the problem]

[0013] To solve the above problems, one representative power conversion device of the present invention is a power conversion device equipped with a power semiconductor module having a switching element, comprising: a gate drive circuit that drives the switching element and outputs a feedback signal corresponding to the switching operation of the switching element; a control unit that outputs a PWM command signal for switching to the gate drive circuit; a logic unit that calculates phase data of the load current waveform; a feedback signal anomaly detection unit that performs a logical determination between the PWM command signal and the feedback signal and stores mismatched time series data; and a parameter calculation unit that converts the mismatched time series data into phase and calculates the degree of damage to the power semiconductor module based on the phase distribution of the degree of mismatch. [Effects of the Invention]

[0014] According to the present invention, abnormalities and damage to power conversion devices can be detected with high accuracy using a simple configuration.

[0015] Other issues, configurations, and effects not mentioned above will be clarified by the following description of the embodiments. [Brief explanation of the drawing]

[0016] [Figure 1] It is a block diagram showing an example of the overall configuration of the diagnostic system of the power conversion device of this embodiment. [Figure 2] It is a diagram showing an example of a cross-sectional structure of a part of a power semiconductor module. [Figure 3] It is a block diagram showing an example of the configuration when the diagnostic system of this embodiment is applied to a railway. [Figure 4] It is a flowchart showing an example of logical determination and extraction of an insulation deteriorated element by obtaining a feedback signal in this embodiment. [Figure 5] It is a diagram showing an example of the voltage waveforms of the gate-emitter voltage of a power semiconductor module and the feedback signal. [Figure 6] It is a diagram showing an example of a method for measuring and recording a feedback signal. [Figure 7] It is a diagram showing the logical agreement of a PWM command signal and a feedback signal. [Figure 8] It is a diagram showing two consecutive disagreements between a PWM command signal and a feedback signal. [Figure 9] It is a diagram showing only one disagreement between a PWM command signal and a feedback signal. [Figure 10] It is a diagram for explaining an example of a process of converting time into phase based on current data. [Figure 11] It is a diagram showing an example of the relationship between the phase distribution of disagreement data and the partial discharge state. [Figure 12] It is a diagram showing an example of a GUI.

Embodiments for Carrying Out the Invention

[0017] Hereinafter, embodiments will be described with reference to the drawings.

[0018] Figure 1 is a block diagram showing an example of the overall configuration of the diagnostic system for the power converter in this embodiment. In Figure 1, the diagnostic system mainly consists of a power converter 1, a three-phase motor 2 driven by the power converter 1 as a load, and a graphical user interface (GUI) 9 for monitoring the status of the power converter 1 and the motor 2. The power converter 1 includes a control device 7. Current sensors 8a and 8b are provided between the power converter 1 and the motor 2 to measure the phase current supplied to the motor 2.

[0019] The power converter 1 is a device that converts a DC voltage source 6 into a three-phase AC voltage to control an electric motor 2. The power converter 1 comprises a smoothing capacitor 5, a plurality of power semiconductor modules 3a to 3f, gate drive circuits 4a to 4f, and a control device 7. The gate drive circuits 4a to 4f and the control device 7 are isolated by an insulating element 10 (such as an optically coupled element, a magnetically coupled element, or an electrostatically coupled element). In Figure 1, the gate drive circuits 4a to 4f are located outside the power semiconductor modules 3a to 3f, but they may be built into the power semiconductor modules 3a to 3f.

[0020] Power semiconductor modules 3a to 3f consist of transistors (e.g., IGBTs (Insulated Gate Bipolar Transistors)) and diodes (e.g., PN diodes, Schottky barrier diodes, etc.) connected in antiparallel. To control large currents, multiple small-capacitance semiconductor chips are connected in parallel to the power semiconductor module. Power semiconductor modules 3a to 3f are provided with emitter terminals, collector terminals, and gate terminals.

[0021] In this embodiment, IGBTs (Insulated Gate Bipolar Transistors) are used for the power semiconductor modules 3a to 3f. However, if MOSFETs (Metal Oxide Semiconductor Field-Effect Transistors) are used, the emitter terminal should be read as the source terminal and the collector terminal as the drain terminal.

[0022] Here, we will explain the structure of power semiconductor modules 3a to 3f using Figure 2.

[0023] Figure 2 shows an example of a cross-sectional structure of a power semiconductor module. As shown in Figure 2, inside the power semiconductor module, a semiconductor chip 31 is connected to metal wiring 33 patterned on an insulating substrate 34 by solder (or sintered sinter) 32, emitter bond wire 30a, and gate bond wire 30b. The insulating substrate 34 is connected to a metal base 36 by solder 35. A cooler 38 is attached to the back surface of the metal base 36 using thermal grease 37. The cooler 38 is grounded.

[0024] Silicone rubber is applied around the metal base 36 and bonded to the resin-molded case 301. The case 301 is provided with an emitter terminal 311, a collector terminal 312, and a gate terminal 313, which are connected to the metal wiring 33.

[0025] The case 301 is provided with an opening (not shown), and after the case 301 is bonded to the metal base 36, an insulating sealant 302 such as a gel-like silicone gel or epoxy resin is injected, and the sealant 302 is cured in a high-temperature furnace. During this process, voids 303 and cracks 304 may be formed in the sealant 302.

[0026] Voids 303 and cracks 304 can cause insulation failure and lead to partial discharge; therefore, withstand voltage tests and partial discharge tests are performed during the pre-shipment inspection process at the factory to screen for defects. During screening, a control value is set for partial discharge charge levels below a specified threshold (e.g., 10 pC). However, there is no guarantee that screening can completely eliminate voids and cracks.

[0027] Furthermore, due to their minute shape and location, voids can be difficult to detect during pre-shipment inspections. Additionally, repeated partial discharges can degrade the insulation, eventually leading to a risk of complete discharge.

[0028] On the other hand, since it is time-consuming to remove power semiconductor modules from power converters for inspection, a method of monitoring partial discharge without removing the power semiconductor modules is used. This allows for efficient monitoring of the occurrence of partial discharge during operation.

[0029] Returning to Figure 1, we will now explain the monitoring of partial discharge in the power semiconductor modules 3a to 3f. In Figure 1, the control device 7 consists of a command feedback signal transmission / reception unit 11, a feedback signal abnormality detection unit 12, a control unit 13, a current detection unit 14, a parameter calculation unit 15, and a logic unit 16.

[0030] The control unit 13 transmits a PWM (pulse width modulation) command signal to the command feedback signal transmitting / receiving unit 11 for switching the power semiconductor modules 3a to 3f. The command feedback signal transmitting / receiving unit 11 transmits the PWM command signal received from the control unit 13 to the gate drive circuits 4a to 4f. The gate drive circuits 4a to 4f switch the power semiconductor modules 3a to 3f based on this PWM command signal.

[0031] The gate drive circuits 4a to 4f have preset switch-on reference voltages and switch-off reference voltages. During switching operation, the gate drive circuits 4a to 4f determine the operating state (on or off) by comparing the voltage between the gate and emitter, and transmit the resulting feedback signal (on or off) to the command feedback signal transmitting / receiving unit 11. The command feedback signal transmitting / receiving unit 11 transmits the PWM command signal and the feedback signal to the feedback signal abnormality detection unit 12.

[0032] The feedback signal anomaly detection unit 12 performs a logical check between the PWM command signal and the feedback signal at regular intervals and transmits the result of the check to the parameter calculation unit 15. Specifically, it checks the logical consistency between the PWM command signal transmitted from the command feedback signal transmission / reception unit 11 and the feedback signal, and detects whether any mismatch has occurred.

[0033] The parameter calculation unit 15 classifies the mismatch into a single occurrence and two or more consecutive occurrences (switch malfunction) based on the judgment result transmitted from the feedback signal anomaly detection unit 12.

[0034] If discrepancies occur two or more times in a row, it is highly likely that a serious problem, such as a failure in the power semiconductor modules 3a to 3f, is the cause. Therefore, a system stop signal is sent to the logic unit 16, and upon receiving the system stop signal, the logic unit 16 sends a gate stop signal to the control unit 13. Upon receiving the gate stop signal, the control unit 13 stops outputting the PWM command signal and stops the power converter 1.

[0035] If a mismatch occurs only once, it may be caused by a temporary error, noise, or signal fluctuation. Therefore, the parameter calculation unit 15 temporarily stores the determination result along with the time data as time-series data of the feedback anomaly in the data buffer 150.

[0036] The parameter calculation unit 15 calculates the degree of partial discharge damage and remaining lifespan of power semiconductor modules 3a to 3f by performing a time-phase conversion (described later in Figure 10) based on the time-series data of feedback anomalies stored in the data buffer 150 and the current data received from the logic unit 16 (described later in Figure 11). The parameter calculation unit 15 also transmits this calculation result to the power converter display unit 17 of the power converter 1 and displays it on the GUI 9 outside the power converter 1.

[0037] The user can input operation commands and status monitoring commands for the power converter 1 from the GUI 9 based on the information displayed on the GUI 9 by the parameter calculation unit 15. The operation commands and status monitoring commands input from the GUI 9 are transmitted to the logic unit 16. The parameter calculation unit 15 also displays instructions for replacing the power semiconductor modules 3a to 3f on the power converter display unit 17 and the GUI 9.

[0038] Here, the inventors analyzed the time-series data of the PWM command signal output from the control device 7 of the power converter and the standalone feedback signal. As a result, they found that abnormal signals where the PWM command signal and the feedback signal do not match can be classified into two types: a distribution dependent on the phase of the inverter output current (described later) and a random distribution independent of the phase. They discovered that the random distribution was due to external noise, and the phase-dependent distribution was due to partial discharge pulses. The PWM command signal and feedback signal are acquired on the low-voltage (weak current) side via an insulating element such as a photocoupler, allowing the feedback signal abnormality detection unit to be provided with a simple configuration.

[0039] Furthermore, the inventors focused on monitoring the imbalance in the insulation degradation of individual power semiconductor modules 3a to 3f within the power converter 1. This is because, under normal use within their design life, it is extremely rare for multiple power semiconductor modules 3a to 3f to fail simultaneously; typically, one fails first.

[0040] This embodiment is based on the above-mentioned discoveries and insights, and one aspect of this embodiment relates to a diagnostic system for a power conversion device equipped with a semiconductor device that performs switching operations to conduct and interrupt the main current flowing through the main circuit. This diagnostic system includes a feedback signal anomaly detection unit that performs logical judgment at regular intervals between the on / off command signal and the feedback signal of a transistor and detects a mismatch; a parameter calculation unit that classifies whether the feedback anomaly occurs two or more times consecutively or alone, stores the single feedback anomaly data in a data buffer, and converts time data from the output AC current into phase; and a user interface unit consisting of a display unit and GUI that displays the abnormal module and warns of the module's lifespan based on the calculation results of the parameter calculation unit.

[0041] A preferred example of this diagnostic system is that the feedback signal anomaly detection unit 12 is configured to record the feedback signal during feedback signal acquisition, and to record a feedback signal measurement period (tm) that is shorter than the feedback signal recording period (ts). The feedback signal anomaly detection unit 12 measures the feedback signal during this feedback signal measurement period (tm) and records two values: the high value (FH) and the low value (FL) of the measured value during the feedback signal recording period (ts). If the gate voltage waveform does not change significantly within the feedback signal recording period (ts), the FH and FL of the feedback signal recording period (ts) will match.

[0042] The feedback signal anomaly detection unit 12 performs a logical determination of the feedback signal and the PWM command signal (CMD) when FH and FL match. If the parameter calculation unit 15 detects two or more consecutive mismatches, it sends a system stop signal to the logic unit 16. Upon receiving the system stop signal, the logic unit 16 sends a gate stop signal to the control unit 13. Upon receiving the gate stop signal, the control unit 13 stops the output of the PWM command signal and stops the power converter 1.

[0043] The feedback signal anomaly detection unit 12 stores the feedback mismatch data of FH and FL together with time data in the data buffer 150 of the parameter calculation unit 15. The parameter calculation unit 15 includes a circuit that counts the time-series data stored in the data buffer 150 and converts the current time-series data of the current detection unit 14 into phase. The user interface unit (power converter display unit 17 and GUI9) includes an insulation degradation detection unit (not shown) that detects the insulation degradation of individual semiconductor elements based on the mismatch degree-phase distribution and displays the remaining lifespan of each semiconductor element.

[0044] In this specific example of the diagnostic system, the insulation degradation detection unit may be integrated with the power converter 1, or it may be a separable configuration connected to the power converter 1 by wires, wirelessly, and terminals. Similarly, the user interface unit may be integrated with the current detection unit 14 and the insulation degradation detection unit, or it may be a separable configuration connected to the power converter 1 by wires, wirelessly, and terminals. Because the diagnostic system of this embodiment offers a high degree of configuration flexibility, it is possible, for example, to remotely monitor power converters installed in trains, electric vehicles, offshore wind power generation systems, etc.

[0045] Another aspect of this embodiment is a diagnostic method for a power converter equipped with a semiconductor switching element that performs switching operations to conduct and interrupt the main current. This diagnostic method includes: a first step of acquiring a binary feedback signal of FH and FL based on a PWM command signal (CMD); a second step of acquiring a mismatch between the PWM command signal (CMD) and the feedback signal if FH and FL match, and outputting a system stop command if the mismatch occurs two or more times in a row; and a third step of accumulating the mismatch between FH and FL in a data buffer along with time data, converting the time data into a phase based on the output current, and determining the damage or partial discharge state and remaining life of the semiconductor element.

[0046] In terms of specific configuration, the feedback signal generation circuit (not shown) built into the gate drive circuits 4a to 4f generates switch-on and switch-off feedback signals using a comparator with appropriate reference voltages set for switch-on and switch-off states. The feedback signal generated in the high-voltage system is transferred to the low-voltage system via a photocoupler, and the command feedback signal transmitting / receiving unit 11 acquires the switch-off signal. In actual operation, the pattern of the PWM command signal differs depending on the load state of the power converter 1, and therefore the period of the output current also differs. For this reason, the command feedback signal transmitting / receiving unit 11 also acquires time-series data of the output current corresponding to the PWM command pattern.

[0047] In the feedback signal anomaly detection unit 12, when acquiring the feedback signal, a feedback signal measurement period (tm) shorter than the feedback signal recording period (ts) is set. The feedback signal anomaly detection unit 12 periodically measures the feedback signal at the feedback signal measurement period (tm) and records two values ​​of the measured feedback signal: the high value (FH) and the low value (FL).

[0048] If there is no change in the on / off state of the gate voltage during the feedback signal recording period (ts), the high value FH and the low value FL will coincide. In this case, a logical judgment is made between the feedback signal and the PWM command signal (CMD). If a mismatch occurs two or more times in a row, it is determined that there is a switch malfunction, and the parameter calculation unit 15 sends a system stop signal to the logic unit 16. The logic unit 16, having received the system stop signal, sends a gate stop signal to the control unit 13. The control unit 13, having received the gate stop signal, stops the output of the PWM command signal and stops the power converter 1.

[0049] Furthermore, if a pulsed signal is received during the feedback signal measurement period (tm), FH and FL will not match. In this case, the feedback signal anomaly detection unit 12 stores the mismatch data between FH and FL together with the time data in the data buffer 150 of the parameter calculation unit 15. The parameter calculation unit 15 counts the time-series data and converts the time-series data of the current value from the current detection unit 14 to the phase via the logic unit 16.

[0050] GUI9 diagnoses the insulation degradation and remaining lifespan of individual semiconductor elements based on the mismatch frequency-phase distribution. Furthermore, based on the diagnostic results, GUI9 can extract elements in the individual power semiconductor modules 3a to 3f of the power converter 1 that are showing abnormal damage progression and determine the priority for element replacement.

[0051] Specific examples of switching elements include insulated-gate bipolar transistors (IGBTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs) as power semiconductor elements. Semiconductor materials such as silicon (Si), silicon carbide (SiC), and gallium nitride (GaN) can also be used. Furthermore, a high-capacity semiconductor module, in which small-capacity semiconductor chips are connected in parallel, can be used as a switching element.

[0052] Figure 3 is a block diagram showing an example configuration when the diagnostic system of this embodiment is applied to a railway. In Figure 3, the railway vehicle 20 is connected to the internet 23 via wireless 24. The railway vehicle 20 includes a power converter 1, an electric motor 2, a vehicle information integration system 21, and an antenna 25 for connecting to the internet 23 via wireless 24. The railway vehicle 20, the central monitoring device 22, and the environmental information acquisition unit 18 are interconnected via the internet 23.

[0053] The power converter 1 (such as a VVVF inverter) is installed in the lower part of the railway vehicle 20, and a cooler 38 and a power converter display unit 17 are installed on the outside of the power converter 1. This power converter display unit 17 can notify maintenance workers of the diagnostic results from the diagnostic system. In addition, the power converter display unit 17 allows the location of the semiconductor module where an abnormality has occurred to be identified on the spot, thereby improving the efficiency of maintenance work.

[0054] The central monitoring device 22 monitors the insulation degradation of multiple railway vehicles and manages the information. The central monitoring device 22 enables a reduction in maintenance costs by streamlining the procurement of materials.

[0055] The environmental information acquisition unit 18 acquires weather information (weather, temperature, humidity, etc.) related to the surrounding environment of the railway vehicle 20. Since this information may affect the insulation degradation of the power semiconductor module, the weather information acquired by the environmental information acquisition unit 18 can be used, for example, to predict insulation degradation.

[0056] The vehicle information integration system 21 is a system for monitoring the air conditioning, doors, lighting, etc., inside the vehicle, and is installed in the driver's cab of the railway vehicle 20. The vehicle information integration system 21 may also have a GUI 9. Furthermore, the vehicle information integration system 21 can acquire information on insulation deterioration of other vehicles from the central monitoring device 22 via the internet 23 and display it on the GUI 9. This allows maintenance workers to formulate more efficient maintenance plans.

[0057] As described above, this embodiment enables high-precision detection of abnormalities and damage to power semiconductor modules and related power converters with a simple configuration, thereby preventing malfunctions such as failures with high accuracy. This extends the service life of power semiconductor modules. Furthermore, without processing the power semiconductor elements, the insulation degradation and remaining lifespan of individual power semiconductor modules within the power converter can be measured, and the measurement results can be fed back to maintenance workers to warn them about life-extending measures or component replacement for power semiconductor modules.

[0058] While Figure 3 illustrates an example of applying a power conversion device diagnostic system to railways, the system is not limited to this and can also be applied to offshore wind power generation, for example.

[0059] Next, we will describe the feedback signal anomaly detection unit 12, which measures and records the feedback signal and performs logical determination between the feedback signal and the PWM command signal.

[0060] Figure 4 is a flowchart showing an example of logic determination and insulation degradation element extraction by feedback signal acquisition in this embodiment.

[0061] First, in step S41, the parameter calculation unit 15 receives inputs from the GUI9 for the number of measurement points (L), the feedback signal measurement period (tm), and the feedback signal recording period (ts). The parameter calculation unit 15 also resets the value of the number of times mismatched data is acquired (j) and the value of the number of times the high value of the feedback signal (FH) and the PWM command signal (CMD) are mismatched (i) to 0.

[0062] The number of measurement points (L) represents the number of times mismatch data of the feedback signal is acquired in order to calculate the degree of damage to the power semiconductor module. The number of measurement points (L) can be manually entered from GUI9 or automatically set by the logic unit 16. The logic unit 16 calculates the number of measurement points (L) from the measurement time and the carrier frequency of the power converter 1. For example, if the carrier frequency is 1 kHz, the number of data points for one day is approximately 86 × 10⁶. If the amount of mismatch data is large, the number of measurement points (L) may be divided, and after the analysis in step S54 described below, the acquired data may be deleted and data acquisition may be repeated.

[0063] The feedback signal measurement period (tm) is preferably 1 ns to 2 ns. This is because the partial discharge pulse is several nanoseconds. The feedback signal recording period (ts) is set to 1 μs or less, taking into account the on / off waveform of the gate-emitter voltage and the data recording capacity.

[0064] Next, in step S42, the command feedback signal transceiver 11 acquires a PWM command signal (CMD). The command feedback signal transceiver 11 transmits the PWM command signal to the gate drive circuits 4a to 4f to drive the power semiconductor modules 3a to 3f.

[0065] Next, in step S43, the command feedback signal transmission / reception unit 11 acquires the feedback signals output from the gate drive circuits 4a to 4f. The feedback signal anomaly detection unit 12 measures the feedback signal at the feedback signal measurement period (tm) and acquires the high (FH) and low (FL) values ​​of the feedback signal recording period (ts).

[0066] In step S44, the feedback signal anomaly detection unit 12 compares the high value (FH) and low value (FL) of the feedback signal recording period (ts) and determines whether FL and FH match. If the high value (FH) and low value (FL) of the feedback signal recording period (ts) match in step S44, the process proceeds to step S50, where the feedback signal anomaly detection unit 12 compares the high value (FH) of the feedback signal with the PWM command signal (CMD) and determines whether FH and CMD match.

[0067] If the high value (FH) of the feedback signal and the PWM command signal (CMD) match in step S50, the feedback signal abnormality detection unit 12 determines that the switches of the power semiconductor modules 3a to 3f are normal, resets the value of the number of mismatches (i) between the high value (FH) of the feedback signal and the PWM command signal (CMD) to 0 (step S49), and returns to step S42.

[0068] On the other hand, if FH and CMD do not match in step S50, the feedback signal anomaly detection unit 12 increments the value of the number of mismatches (i) between the high value of the feedback signal (FH) and the PWM command signal (CMD) (step S51) and proceeds to step S52. In step S52, the feedback signal anomaly detection unit 12 determines whether the value of the number of mismatches (i) between the high value of the feedback signal (FH) and the PWM command signal (CMD) is 2.

[0069] If the mismatch count (i) in step S52 is not 2, the mismatch between the high value (FH) of the feedback signal and the PWM command signal (CMD) may be noise, so the process proceeds to step S45. The time-series data of the mismatch is sent to the parameter calculation unit 15 and stored in the data buffer 150.

[0070] On the other hand, if the value of the mismatch count (i) in step S52 is 2, the feedback signal abnormality detection unit 12 determines that there is a switch abnormality in the power semiconductor modules 3a to 3f and proceeds to step S53. In step S53, the parameter calculation unit 15 sends a system stop signal to the logic unit 16, and the logic unit 16, having received the system stop signal, sends a gate stop signal to the control unit 13. The control unit 13, having received the gate stop signal, stops the output of the PWM command signal, stops the power converter 1, and terminates the process.

[0071] On the other hand, if the high (FH) and low (FL) values ​​of the feedback signal recording period (ts) do not match in step S44, the process proceeds to step S45. In step S45, the parameter calculation unit 15 obtains phase data of the phase current waveform (load current waveform) obtained by the logic unit 16 through time-phase conversion of the current data acquired by the current detection unit 14, and adds it to the mismatched data of high (FH) and low (FL). In step S46, the value of the number of times mismatched data has been acquired (j) is incremented.

[0072] In step S47, the parameter calculation unit 15 stores the mismatched high (FH) and low (FL) data as time-series data in the data buffer 150. In step S48, the parameter calculation unit 15 determines whether the value of the number of times mismatched data is acquired (j) is the same as the value of the number of measurement points (L). If the value of the number of times mismatched data is acquired (j) is not the same as the value of the number of measurement points (L) in step S48, the process returns to step S42. On the other hand, if the value of the number of times mismatched data is acquired (j) is the same as the value of the number of measurement points (L) in step S48, the process proceeds to step S54.

[0073] In step S54, the parameter calculation unit 15 analyzes the phase dependence of the frequency of feedback signal mismatch, which will be described later in Figure 11, and calculates the degree of damage to the power semiconductor module. In step S55, the parameter calculation unit 15 determines, based on the analysis results, whether or not it has extracted a degraded element with a high amount of partial discharge noise. Here, the parameter calculation unit 15 determines a power semiconductor module whose degree of damage exceeds a preset reference value as a degraded element. If the parameter calculation unit 15 does not extract a degraded element in step S55, the process returns to step S41.

[0074] On the other hand, if the parameter calculation unit 15 extracts a degraded element in step S55, the process proceeds to step S56. In step S56, the parameter calculation unit 15 displays the extracted degraded element on the power converter display unit 17 or GUI9, which will be described later in Figure 12, and terminates the process.

[0075] Next, we will explain the feedback signal output using Figures 5 and 6.

[0076] Figure 5 shows an example of the gate-emitter voltage and feedback signal voltage waveforms of a power semiconductor module. Figure 5 shows the voltage waveforms during the switching operation of the switch on and switch off.

[0077] In the gate drive circuits 4a to 4f, the switch-on reference voltage 53 (8V in this embodiment) and the switch-off reference voltage 55 (-6V in this embodiment) are preset. The gate drive circuits 4a to 4f compare the switch-on reference voltage 53 and the switch-off reference voltage 55 with the gate-emitter voltage 52 using a comparator.

[0078] As a result of this comparison, gate drive circuits 4a to 4f output a feedback signal of 5V when the gate-emitter voltage 52 exceeds the switch-on reference voltage 53. Also, gate drive circuits 4a to 4f output a feedback signal of 0V when the gate-emitter voltage 52 falls below the switch-off reference voltage 55.

[0079] Figure 6 shows an example of a method for measuring and recording a feedback signal. In Figure 6, the feedback signal recording period (ts) 67 is 1 μs, and the feedback signal measurement period (tm) 68 is 1 ns. Note that the scale of the figure is not precise for ease of viewing.

[0080] The feedback signal anomaly detection unit 12 measures the feedback signal at a feedback signal measurement cycle (tm) 68. FH61 indicates the high value of the measured feedback signal at the feedback signal recording cycle (ts), and FL62 indicates its low value. For example, at the feedback signal recording cycle (ts) 63, the power semiconductor module transitions from off to on, and at the feedback signal recording cycle (ts) 65, the power semiconductor module transitions from on to off. Therefore, at the feedback signal recording cycles (ts) 63 and 65, the value of FH61 is 1 and the value of FL is 0.

[0081] During the feedback signal recording period (ts) 64, the power semiconductor module is ON, so both the FH value and the FL value are 1. During the feedback signal recording period (ts) 66, the power semiconductor module is OFF, so both the FH value and the FL value are 0.

[0082] Thus, during the on / off transition of the power semiconductor module, FH61 and FL62 will be out of sync. However, as described above in Figure 4, since the out-of-sync occurs only once, a logical comparison between the feedback signal and the PWM command signal (CMD) is not performed. Alternatively, a method can be used to mask the feedback signal when the PWM command signal (CMD) transitions, thus avoiding the logical comparison.

[0083] Next, we will explain the method for logically determining the relationship between the PWM command signal and the feedback signal using Figures 7, 8, and 9.

[0084] Figure 7 shows the logical agreement between the PWM command signal and the feedback signal. A circuit delay occurs between the transmission of the PWM command signal (CMDx) 70 from the command / feedback signal transceiver 11 and its reception by the gate drive circuits 4a to 4f. Therefore, to compensate for this delay, a shifted reference PWM command signal (CMD) 71 is generated, and a logical determination is made between the PWM command signal (CMD) 71 and the feedback signals (FH, FL). The feedback signal recording periods (ts) 72, 73, and 74 show that the PWM command signal (CMD) 71 and the feedback signal are in agreement.

[0085] Figure 8 shows an example of two consecutive mismatches between the PWM command signal and the feedback signal. In the feedback signal recording periods (ts) 80 and 81, there are two consecutive mismatches. In this case, it is determined that a switch malfunction has occurred, and in step S53 of Figure 4, the parameter calculation unit 15 sends a system stop signal to the logic unit 16, stopping the power converter 1.

[0086] Figure 9 shows an example of a single mismatch between the PWM command signal and the feedback signal. In the feedback signal recording period (ts) 90, the mismatch occurs only once. This indicates that a pulsed signal with a large voltage amplitude (partial discharge pulse or noise) is superimposed. In this case, step S44 in Figure 4 determines that the FH and FL of the feedback signal are mismatched, and the process proceeds to step S45. When the mismatch occurs only once, the time-series data of the feedback mismatch is stored in the data buffer 150 of the parameter calculation unit 15.

[0087] Based on the current data measured by the current detection unit 14, noise and partial discharge pulses can be separated by time-phase conversion, as described later in Figure 10. This allows the degree of insulation degradation of each power semiconductor module to be estimated from the degree of partial discharge, and the lifespan of the power converter 1 can be extended by warning of the need to replace components in the power semiconductor modules.

[0088] Next, using Figures 10 and 11, we will explain the time-phase conversion method using phase current data, the method for separating partial discharge components from time-series data of feedback mismatch, and the method for estimating the degree of damage and remaining life of power semiconductor modules 3a to 3f.

[0089] Figure 10 illustrates an example of a process that converts time to phase based on current data. In Figure 10, the phase current 100 measured by the current detection unit 14 is stored in the logic unit 16, and time 101 is converted to phase 103 using the rising zero crossing (the time when the current value is 0), for example 104, as a reference. The parameter calculation unit 15 associates the time of the time-series data with feedback mismatch to the phase.

[0090] Figure 11 shows an example of the relationship between the phase distribution of mismatched data and the partial discharge state. Figure 11 shows the phase dependence of the frequency of feedback mismatch. A phase current sine wave 114 is shown as a reference waveform for evaluating the phase distribution of partial discharge noise and external noise relative to the power supply cycle.

[0091] The phase-independent frequency distribution 113 indicates feedback mismatch due to external noise. On the other hand, the phase-dependent frequency distributions 111 and 112, which occur at a constant timing in the power supply cycle, indicate feedback mismatch due to partial discharge noise.

[0092] The parameter calculation unit 15 calculates the damage level as the ratio of the sum of the frequencies of frequency distributions 111 and 112 to the critical frequency 115. The critical frequency 115 is obtained from reliability tests or accelerated tests of power semiconductor modules 3a to 3f. Furthermore, by setting the number of measurement points (L) of mismatched data to a constant value and measuring them periodically, the degradation state can be confirmed from the trend.

[0093] Next, using Figure 12, we will explain an example of detecting an imbalance in damage among multiple power semiconductor modules 3a to 3f within the power converter 1 to prevent system failure.

[0094] Figure 12 shows an example of a GUI. GUI9 displays a degraded element indicator 121 and a lifespan indicator 122, corresponding to each of the power semiconductor modules 3a to 3f provided by the power converter 1.

[0095] GUI9 illuminates the degradation element indicator 121 of power semiconductor modules that have deteriorated and require replacement, based on the degree of damage calculated from the phase distribution of mismatched data. GUI9 determines that replacement is necessary if the degree of damage exceeds a preset standard value. GUI9 also displays the degree of damage 123 on the lifespan indicator 122.

[0096] GUI9 can also be included in the vehicle information integration system 21. Furthermore, by including GUI9 in the central monitoring device 22, it becomes possible to monitor the insulation degradation of power semiconductor modules in multiple railway vehicles, and to optimize maintenance plans.

[0097] As described above, according to this embodiment, by detecting the insulation degradation of the power semiconductor module and comparing the degree of damage with a reference value, it is possible to detect abnormalities and damage to the power semiconductor module and related power converters with high accuracy, thereby preventing malfunctions such as failures with high accuracy. This makes it possible to extend the service life of the power semiconductor module.

[0098] Although embodiments have been described above, the present invention is not limited to the embodiments described above, and various modifications are included. For example, it is possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace parts of the configuration of each embodiment with other configurations. [Explanation of symbols]

[0099] 1. Power converter 2 electric motor 3, 3a, 3b, 3c, 3d, 3e, 3f power semiconductor modules 4a, 4b, 4c, 4d, 4e, 4f Gate drive circuits 5. Smoothing Capacitor 6 DC power supply 7 Control device 8a, 8b Phase current sensors 9 GUI 10 Insulating elements 11 Command Feedback Signal Transceiver Unit 12 Feedback signal anomaly detection unit 13 Control Unit 14 Current detection unit 15. Parameter Calculation Unit 16. Logic Section 17 Power converter display unit 18 Environmental Information Acquisition Department 20 Railway Vehicles 21. Vehicle Information Integration System 22 Central monitoring device 23 Internet 24 Wireless 25 Antennas 30a Emitter Bond Wire 30b Gate Bond Wire 31 Semiconductor chips 32 Solder (or sintered sinter) 33 Metal wiring 34 Insulating substrate 35 solder 36 Metal base 37 Thermal grease 38 Cooler 301 cases 302 Sealing material 303 Void 304 Crack 52 Gate-emitter voltage waveform 53 Switch-on reference voltage 54 Feedback signal 55 Switch-off reference voltage 61 Highest value at the feedback signal recording period 62 Low values ​​during the feedback signal recording period 63 FH and FL during the transition from off to on 64 FH, FL in ON state 65 FH and FL during the transition from ON to OFF 66 FH, FL in OFF state 67 Feedback signal recording period ts 68 Feedback signal measurement period tm 70 PWM command signal 71 PWM command signal for reference 72, 73, 74 Data where the PWM command signal and the feedback signal match. 80. Two consecutive instances of mismatched data. 90 data points with only one mismatch 100 phase current 101 Timeline 103 Phase axis 111, 112 Frequency distributions that occur at regular timings in the power cycle 113 Phase-independent frequency distribution 114 phase current sine wave 115 Critical frequency 121 Display unit for degradation elements 122 Life display section 123 Damage degree display section 150 data buffers

Claims

1. A power conversion device comprising a power semiconductor module having a switching element, A gate drive circuit that drives the switching element and outputs a feedback signal corresponding to the switching operation of the switching element, A control unit that outputs a PWM command signal for switching to the gate drive circuit, A logic unit that calculates the phase data of the load current waveform, A feedback signal anomaly detection unit performs a logical determination between the PWM command signal and the feedback signal and stores the time-series data of any mismatches. A power conversion device comprising a parameter calculation unit that converts the discrepant time-series data into phase and calculates the degree of damage to the power semiconductor module based on the phase distribution of the frequency of the discrepancies.

2. A power conversion device according to claim 1, The parameter calculation unit is a power conversion device that calculates the degree of damage based on the frequency of the phase-dependent frequency distribution.

3. A power conversion device according to claim 1, The gate drive circuit is a power conversion device that generates the feedback signal based on the voltage between the gate and emitter of the switching element.

4. A power conversion device according to claim 1, The system has multiple of the aforementioned power semiconductor modules, The parameter calculation unit is a power conversion device that includes a display unit that displays the degree of damage for each of the plurality of power semiconductor modules.

5. A power conversion device according to claim 4, The system has multiple of the aforementioned power semiconductor modules, The parameter calculation unit is a power conversion device that displays the power semiconductor module whose degree of damage exceeds a preset reference value on the display unit.

6. A power conversion device according to claim 1, The feedback signal anomaly detection unit is a power conversion device that measures the feedback signal at a preset measurement cycle and stores the time-series data of the mismatch when the high and low values ​​of the feedback signal at a preset recording cycle do not match.

7. A power conversion device according to claim 6, The control unit is a power converter that stops outputting the PWM command signal when there is a mismatch between the PWM command signal and the feedback signal two or more times in a row.

8. A diagnostic system comprising a power converter equipped with a power semiconductor module having a switching element, an electric motor controlled by the power converter, and a central monitoring device connected to the power converter, The aforementioned power converter is A gate drive circuit that drives the switching element and outputs a feedback signal corresponding to the switching operation of the switching element, A control unit that outputs a PWM command signal for switching to the gate drive circuit, A logic unit that calculates the phase data of the load current waveform, A feedback signal anomaly detection unit performs a logical determination between the PWM command signal and the feedback signal and stores the time-series data of any mismatches. The system includes a parameter calculation unit that converts the discrepancy time-series data into phase and calculates the degree of damage to the power semiconductor module based on the phase distribution of the frequency of the discrepancies. The central monitoring device is A diagnostic system comprising a display unit that acquires the degree of damage and displays the degree of damage for each of the plurality of power semiconductor modules.

9. A diagnostic method for a power conversion device comprising a power semiconductor module having a switching element, The gate drive circuit drives the switching element and outputs a feedback signal corresponding to the switching operation of the switching element. The control unit outputs a PWM command signal to switch to the gate drive circuit. The logic unit calculates the phase data of the load current waveform. The feedback signal anomaly detection unit performs a logical determination between the PWM command signal and the feedback signal, and stores the time-series data of the mismatch. A diagnostic method that uses a parameter calculation unit to convert the mismatched time-series data into phase and calculates the degree of damage to the power semiconductor module based on the phase distribution of the frequency of the mismatch.

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