Multilayer electronic components

Abstract

This reduces the step difference between the capacitance-forming portion and the margin portion, improving the voltage withstand characteristics and structural stability of the multilayer electronic component. [Solution] A stacked electronic component 100 according to one embodiment of the present invention includes a dielectric layer and internal electrodes 121 that are alternately arranged with respect to the dielectric layer in the thickness direction, and includes a body that includes a first and second surface facing each other in the thickness direction, a third surface 3 and a fourth surface 4 connected to the first and second surfaces and facing each other in the length direction, a fifth surface and a sixth surface connected to the first, second, third and fourth surfaces and facing each other in the width direction, and external electrodes arranged on the third and fourth surfaces, the internal electrodes being arranged apart from the fifth and sixth surfaces with margin portions 114 and 115 in between, and a first dummy electrode 141 including a dielectric housing portion being arranged in the margin portion.

Description

[Technical Field]

[0001] This invention relates to a stacked electronic component. [Background technology]

[0002] Multi-Layered Ceramic Capacitors (MLCCs), a type of multilayer electronic component, are chip-type capacitors mounted on printed circuit boards of various electronic products such as LCDs (Liquid Crystal Displays) and PDPs (Plasma Display Panels), computers, smartphones, and mobile phones, where they play the role of charging or discharging electricity. MLCCs are used as components in a wide range of electronic devices due to their advantages of being small, yet guaranteeing high capacitance, and being easy to mount.

[0003] The body of an MLCC may include a capacitance-forming section where internal electrodes overlap to form capacitance, and a margin section which is the remaining area. However, differences in the number of layers of internal electrodes may cause a step between the capacitance-forming section and the margin section during the bonding and firing process. Such a step may cause the ends of the internal electrodes to break or stretch, potentially reducing the dielectric strength and structural stability of the MLCC. [Overview of the project] [Problems that the invention aims to solve]

[0004] One of several objectives of the present invention is to alleviate the step difference between the capacitance forming portion and the margin portion, thereby improving the voltage withstand characteristics and structural stability of the multilayer electronic component.

[0005] However, the objectives of the present invention are not limited to those described above and can be more easily understood in the process of describing specific embodiments of the present invention. [Means for solving the problem]

[0006] A stacked electronic component according to one embodiment of the present invention includes a dielectric layer and internal electrodes arranged alternately with respect to the dielectric layer in the thickness direction, and comprises a body including first and second surfaces facing each other in the thickness direction, third and fourth surfaces connected to the first and second surfaces and facing each other in the length direction, fifth and sixth surfaces connected to the first, second, third and fourth surfaces and facing each other in the width direction, and external electrodes arranged on the third and fourth surfaces, wherein the internal electrodes are arranged apart from the fifth and sixth surfaces with a margin portion in between, and a first dummy electrode including a dielectric housing portion can be arranged in the margin portion. [Effects of the Invention]

[0007] One of the various effects of the present invention is that it can alleviate the step difference between the capacitance forming portion and the margin portion, thereby improving the voltage withstand characteristics and structural stability of the multilayer electronic component. [Brief explanation of the drawing]

[0008] [Figure 1] This is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention. [Figure 2] This is a schematic cross-sectional view showing a section along the line I-I' in Figure 1. [Figure 3] This is a schematic cross-sectional view showing a section along the line II-II' in Figure 1. [Figure 4a] Figure 1 is a schematic plan view showing the first internal electrode and the first dummy electrode of the stacked electronic component. [Figure 4b] Figure 1 is a schematic plan view showing the second internal electrode and the first dummy electrode of the multilayer electronic component. [Figure 5] This is a schematic cross-sectional view showing a section along the line III-III' in Figure 4a. [Figure 6] This is a magnified view of a portion of Figure 4a. [Figure 7a] This is a schematic plan view showing the first internal electrode, the first dummy electrode, and the second dummy electrode of a stacked electronic component according to another embodiment of the present invention. [Figure 7b]It is a plan view schematically showing a second internal electrode, a first dummy electrode, and a second dummy electrode of a multilayer electronic component according to another embodiment of the present invention. [Figure 8] It is a cross-sectional view schematically showing a cross-section along line IV-IV' of FIG. 7a. [Figure 9] It is a partially enlarged view of FIG. 7a. [Figure 10] It is a partially enlarged view schematically showing region A of FIG. 8. [Figure 11] It is a modification of FIG. 10. [Figure 12a] It is a plan view schematically showing a first internal electrode, a first dummy electrode, and a second dummy electrode of a multilayer electronic component according to another embodiment of the present invention. [Figure 12b] It is a plan view schematically showing a second internal electrode, a first dummy electrode, and a second dummy electrode of a multilayer electronic component according to another embodiment of the present invention. [Figure 13] It is a cross-sectional view schematically showing a cross-section along line V-V' of FIG. 12a. [Figure 14] It is a partially enlarged view of FIG. 12a.

Mode for Carrying Out the Invention

[0009] Hereinafter, embodiments of the present invention will be described with reference to specific embodiments and the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Also, the embodiments of the present invention are provided to more fully explain the present invention to an ordinary technician. Therefore, the shape and size of elements in the drawings can be exaggerated for a clearer explanation, and elements denoted by the same reference numerals in the drawings are the same elements.

[0010] Furthermore, in order to clearly illustrate the present invention in the drawings, parts unrelated to the explanation have been omitted, and the size and thickness of each component shown in the drawings are arbitrarily shown for the convenience of explanation; therefore, the present invention is not necessarily limited to what is shown. Components with the same function within the scope of the same concept are described using the same reference numerals. Moreover, throughout the specification, when a part "includes" a certain component, this does not exclude other components unless otherwise stated, but rather means that it may further include other components.

[0011] In the drawing, the X direction can be defined as the thickness T direction, the Y direction as the length L direction, and the Z direction as the width W direction. In this invention, "thickness" can mean the size in the thickness direction, "length" can mean the size in the length direction, and "width" can mean the size in the width direction.

[0012] Multilayer electronic components Figure 1 is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention; Figure 2 is a schematic cross-sectional view showing a cross section along line I-I' in Figure 1; Figure 3 is a schematic cross-sectional view showing a cross section along line II-II' in Figure 1; Figure 4a is a schematic plan view showing the first internal electrode and the first dummy electrode of the stacked electronic component in Figure 1; Figure 4b is a schematic plan view showing the second internal electrode and the first dummy electrode of the stacked electronic component in Figure 1; Figure 5 is a schematic cross-sectional view showing a cross section along line III-III' in Figure 4a; and Figure 6 is a partially enlarged view of Figure 4a.

[0013] Hereinafter, with reference to Figures 1 to 6, a multilayer electronic component 100 according to one embodiment of the present invention will be described in detail. Furthermore, a multilayer ceramic capacitor will be described as an example of a multilayer electronic component, but the present invention is not limited thereto and can be applied to various multilayer electronic components, such as inductors, piezoelectric elements, varistors, or thermistors.

[0014] The length of the stacked electronic component 100 may be greater than the width and thickness of the stacked electronic component 100, but the present invention is not limited thereto. For example, the length of the stacked electronic component 100 may be less than the width of the stacked electronic component 100. The width of the stacked electronic component 100 may be less than or greater than the thickness of the stacked electronic component 100, and this may vary depending on the target specifications and characteristics of the stacked electronic component 100.

[0015] The length of the stacked electronic component 100 may be, for example, about 0.1 mm to 5.7 mm, the width of the stacked electronic component 100 may be, for example, about 0.05 mm to 5.0 mm, and the thickness of the stacked electronic component 100 may be, for example, about 0.05 mm to 5.0 mm.

[0016] A stacked electronic component 100 according to one embodiment of the present invention may include a main body 110 and external electrodes 131 and 132.

[0017] There are no particular restrictions on the specific shape of the main body 110, but as shown in the figure, the main body 110 can be a hexahedron or a similar shape. Due to the shrinkage of the ceramic powder contained in the main body 110 during the firing process, or due to the polishing process on the corners of the main body 110, the main body 110 may not be a perfectly straight hexahedron, but may have a substantially hexahedron shape.

[0018] The main body 110 may have a first surface 1 and a second surface 2 facing each other in the thickness direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2 and facing each other in the length direction, a fifth surface 5 and a sixth surface 6 connected to the first surface 1, the second surface 2, the third surface 3 and the fourth surface 4 and facing each other in the width direction.

[0019] The main body 110 can include a dielectric layer 111 and internal electrodes 121 and 122 that are alternately arranged with the dielectric layer 111 in the thickness direction. The plurality of dielectric layers 111 forming the main body 110 are in a fired state, and the boundary between adjacent dielectric layers 111 can be integrated so as to be difficult to confirm without using a scanning electron microscope (SEM: Scanning Electron Microscope).

[0020] The dielectric layer 111 can contain, for example, a perovskite-type compound represented by ABO3 as a main component. The perovskite-type compound represented by ABO3 is, for example, BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), CaZrO3, and (Ca 1-x Sr x )(Zr 1-y Ti y )O3 (0 < x ≤ 0.5, 0 < y ≤ 0.5), and can contain one or more of them.

[0021] The average thickness td of the dielectric layer 111 is not particularly limited. The average thickness td of the dielectric layer 111 can be, for example, 0.1 μm to 20 μm, 0.1 μm to 10 μm, 0.1 μm to 5 μm, 0.1 μm to 2 μm, or 0.1 μm to 0.4 μm.

[0022] The main body 110 can include, for example, a capacitance forming portion Ac that forms a capacitance by including a first internal electrode 121 and a second internal electrode 122 that are alternately arranged with the dielectric layer 111 interposed therebetween. The stacking direction of the internal electrodes 121 and 122 may be the thickness direction or the width direction. In the present invention, an embodiment in which the stacking direction of the internal electrodes 121 and 122 is the thickness direction will be described as a reference.

[0023] The first internal electrode 121 is separated from the fourth surface 4 and can be connected to the first external electrode 131 at the third surface 3. The second internal electrode 122 is separated from the third surface 3 and can be connected to the second external electrode 132 at the fourth surface 4.

[0024] The conductive metal contained in the internal electrodes 121 and 122 may be one or more of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti, and alloys thereof, and may more preferably contain Ni, but the present invention is not limited thereto.

[0025] The average thickness te of the internal electrodes 121 and 122 is not particularly limited. The average thickness te of the internal electrodes 121 and 122 may be, for example, 0.1 μm to 3.0 μm, 0.1 μm to 1.0 μm, or 0.1 μm to 0.4 μm.

[0026] The average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be measured by scanning the cross-section of the multilayer electronic component 100 in the length and thickness directions with a scanning electron microscope (SEM) at 10,000x magnification. More specifically, the average thickness td of the dielectric layer 111 can be measured by taking the average value after measuring the thickness at multiple points on one dielectric layer 111, for example, at five points equally spaced in the length direction. Similarly, the average thickness te of the internal electrodes 121 and 122 can be measured by taking the average value after measuring the thickness at multiple points on one internal electrode 121 or 122, for example, at five points equally spaced in the length direction. The five equally spaced points can be specified in the capacitance forming section Ac. On the other hand, if such average value measurements are performed for 10 dielectric layers 111 and 10 internal electrodes 121 and 122, the average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be further generalized.

[0027] The main body 110 may include cover portions 112 and 113 arranged on both sides facing each other in the thickness direction of the capacitance forming portion Ac, and margin portions 114 and 115 arranged on both sides facing each other in the width direction of the capacitance forming portion Ac. The cover portions 112 and 113 and the margin portions 114 and 115 may have a configuration similar to that of the dielectric layer 111, except that they do not include internal electrodes. The internal electrodes 121 and 122 may be arranged spaced apart from the fifth surface 5 and the sixth surface 6, with the margin portions 114 and 115 in between. A first margin portion 114 may be arranged between the internal electrodes 121 and 122 and the fifth surface 5, and a second margin portion 115 may be arranged between the internal electrodes 121 and 122 and the sixth surface 6.

[0028] The average thickness tc of the cover portions 112 and 113 may be, for example, 150 μm or less, 100 μm or less, 30 μm or less, or 20 μm or less. The average thickness tc of the cover portions 112 and 113 may be, for example, 5 μm or more, or 10 μm or more. The average thickness tc of the cover portions 112 and 113 refers to the average thickness of the first cover portion 112 and the second cover portion 113, respectively. The average thickness tc of the cover portions 112 and 113 can be the average value of the thickness measured at five equally spaced points in the longitudinal direction in the cross-section of the stacked electronic component 100 in the longitudinal and thickness directions.

[0029] The average width of the margin portions 114 and 115 is not particularly limited. The average width of the margin portions 114 and 115 may be, for example, 150 μm or less, 100 μm or less, 20 μm or less, or 15 μm or less. The average width of the margin portions 114 and 115 may be, for example, 5 μm or more, or 10 μm or more. The average width of the margin portions 114 and 115 refers to the average width of the first margin portion 114 and the second margin portion 115, respectively. The average width of the margin portions 114 and 115 can be the average value of the widths measured at five points that are equally spaced in the thickness direction in the cross-section of the multilayer electronic component 100 in the width direction and thickness direction.

[0030] External electrodes 131 and 132 can be positioned on the third surface 3 and the fourth surface 4. The first external electrode 131 is positioned on the third surface 3 and can extend over parts of the first surface 1, the second surface 2, the fifth surface 5, and the sixth surface 6. The second external electrode 132 is positioned on the fourth surface 4 and can extend over parts of the first surface 1, the second surface 2, the fifth surface 5, and the sixth surface 6.

[0031] The type and form of the external electrodes 131 and 132 are not particularly limited and may have a multilayer structure. For example, the external electrodes 131 and 132 may include base electrode layers 131a and 132a that come into contact with the internal electrodes 121 and 122, and plating layers 131b and 132b placed on the base electrode layers 131a and 132a.

[0032] The base electrode layers 131a and 132a may include a fired electrode layer containing metal and glass. The metal included in the fired electrode layer may include, for example, Cu, Ni, Pd, Pt, Au, Ag, Pb, and / or alloys containing these. The glass included in the fired electrode layer may include, for example, one or more oxides of Ba, Ca, Zn, Al, B, and Si.

[0033] On the other hand, while the base electrode layers 131a and 132a can be composed solely of fired electrode layers, the present invention is not limited thereto, and the base electrode layers 131a and 132a may include fired electrode layers containing metal and glass, as well as resin electrode layers disposed on the above-mentioned fired electrode layers and containing metal particles and resin.

[0034] The metal particles contained in the resin electrode layer may include one or more spherical particles and flake-shaped particles. The metal particles contained in the resin electrode layer may include, for example, Cu, Ni, Pd, Pt, Au, Ag, Pb, Sn and / or alloys containing these. The resin contained in the resin electrode layer may include, for example, one or more epoxy resin, acrylic resin, and ethylcellulose.

[0035] The plating layers 131b and 132b may include, for example, Ni, Sn, Pd, and / or alloys containing these, and may be formed in multiple layers. The plating layers 131b and 132b may be, for example, a Ni plating layer or a Sn plating layer, and may be in a form in which the Ni plating layer and the Sn plating layer are formed sequentially. The plating layers 131b and 132b may also include multiple Ni plating layers and / or multiple Sn plating layers.

[0036] The drawings illustrate a structure in which the stacked electronic component 100 has two external electrodes 131 and 132, but it is not limited to this, and the number and shape of the external electrodes 131 and 132 can be changed according to the form of the internal electrodes 121 and 122 or other purposes.

[0037] A difference in the number of internal electrodes exists between the capacitance-forming section where the first and second internal electrodes overlap and the margin section where no internal electrodes are placed. This can cause a step to form between the capacitance-forming section and the margin section during the crimping and firing process. Such a step may cause the ends of the internal electrodes in the width direction to bend or stretch, potentially reducing the voltage withstand characteristics and structural stability of the multilayer electronic component.

[0038] In contrast, a stacked electronic component 100 according to one embodiment of the present invention may include first dummy electrodes 141 and 142 arranged in margin portions 114 and 115. By arranging the first dummy electrodes 141 and 142 in margin portions 114 and 115 where internal electrodes 121 and 122 are not arranged, the step difference caused by the difference in the number of stacked internal electrodes 121 and 122 between the capacitance forming portion Ac and the margin portions 114 and 115 can be mitigated, thereby improving the voltage withstand characteristics and structural stability of the stacked electronic component 100.

[0039] According to one embodiment of the present invention, the first dummy electrodes 141 and 142 may include dielectric housing portions 141a and 142a. The dielectric housing portions 141a and 142a can accommodate the dielectric of the margin portions 114 and 115. That is, the dielectric housing portions 141a and 142a may include at least a portion of the margin portions 114 and 115. The first dummy electrodes 141 and 142 can physically fix a portion of the margin portions 114 and 115 located in the dielectric housing portions 141a and 142a, thereby improving the stability of the stacked electronic component 100 against shear stress.

[0040] The shape of the first dummy electrodes 141 and 142 is not particularly limited, but the first dummy electrodes 141 and 142 may include dummy conductor portions 141b and 142b that surround the dielectric housing portions 141a and 142a in the longitudinal and width directions. That is, the first dummy electrodes 141 and 142 may include ring-shaped dummy conductor portions 141b and 142b.

[0041] The cross-sections of the first dummy electrodes 141 and 142 in the longitudinal and width directions may be rectangular, but the present invention is not limited thereto. For example, the cross-sections of the first dummy electrodes 141 and 142 in the longitudinal and width directions may be circular or polygonal, and the first dummy electrodes 141 and 142 may have any shape as long as they can include dielectric housing portions 141a and 142a.

[0042] The cross-sections of the dielectric housing portions 141a and 142a in the longitudinal and width directions may be circular, but the present invention is not limited thereto. For example, the cross-sections of the dielectric housing portions 141a and 142a in the longitudinal and width directions may be polygonal, and the dielectric housing portions 141a and 142a may have any shape as long as they can accommodate a dielectric.

[0043] The first dummy electrodes 141 and 142 can be placed in the first margin portion 114 and the second margin portion 115, respectively. The first dummy electrodes 141 and 142 may be placed, for example, at both ends of the first margin portion 114 and the second margin portion 115 in the longitudinal direction. The first dummy electrodes 141 and 142 may be placed, for example, in the regions of the first margin portion 114 and the second margin portion 115 adjacent to the third surface 3 and the fourth surface 4, respectively. The first internal electrode 121 and the second internal electrode 122 are stacked in the capacitance forming portion Ac, but only the first internal electrode 121 or the second internal electrode 122 may exist on both sides of the main body 110 in the longitudinal direction of the capacitance forming portion Ac (so-called L-margin). As a result, a step difference may occur between the capacitance forming portion Ac and the L-margin due to the difference in the number of stacked internal electrodes 121 and 122.

[0044] When the first dummy electrodes 141 and 142 are positioned at both ends in the longitudinal direction of the first margin portion 114 and the second margin portion 115, respectively, the step difference not only between the capacitance forming portion Ac and the margin portions 114 and 115, but also between the capacitance forming portion Ac and the L-margin can be mitigated, thereby further effectively improving the voltage withstand characteristics and structural stability of the stacked electronic component 100.

[0045] In one embodiment, multiple first dummy electrodes 141 and 142 are arranged in the thickness direction, and they can be positioned offset from adjacent first dummy electrodes 141 and 142 in the thickness direction in a direction perpendicular to the thickness direction. For example, multiple first dummy electrodes 141 and 142 are arranged in the thickness direction, and they can be positioned so as not to overlap adjacent first dummy electrodes 141 and 142 in the thickness direction. For example, a first dummy electrode 141 may be positioned offset from a first dummy electrode 142 in a direction perpendicular to the thickness direction, and a first dummy electrode 141 may be positioned so as not to overlap with a first dummy electrode 142 in the thickness direction.

[0046] In other words, among the multiple first dummy electrodes 141 and 142, those adjacent to each other in the thickness direction can be arranged with a offset in a direction perpendicular to the thickness direction. Among the multiple first dummy electrodes 141 and 142, those adjacent to each other in the thickness direction may be arranged so as not to overlap in the thickness direction.

[0047] When the first dummy electrodes 141 and 142 adjacent to each other in the thickness direction are offset in a direction perpendicular to the thickness direction, and more preferably when the first dummy electrodes 141 and 142 adjacent to each other in the thickness direction do not overlap in the thickness direction, the step difference between the capacitance forming portion Ac and the margin portions 114 and 115 can be effectively mitigated, and the effect of improving stability against shear stress via the dielectric housing portions 141a and 142a can become even more pronounced.

[0048] In one embodiment, there are multiple first dummy electrodes 141, 142, and multiple electrodes can be arranged in the length direction and / or width direction. For example, the stacked electronic component 100 may include dummy patterns DP1, DP2 which include multiple first dummy electrodes 141, 142 arranged in the length direction and / or width direction, positioned at both ends of the margin portions 114, 115 in the length direction.

[0049] Referring to Figures 4a and 4b, the dummy patterns DP1 and DP2 have first dummy electrodes 141 and 142 arranged in a 4×1 (length × width) configuration, but the present invention is not limited thereto. The dummy patterns DP1 and DP2 can include multiple first dummy electrodes 141 and 142 arranged in various configurations, such as 1×2, 2×1, 2×2, 3×1, and 3×2 (length × width).

[0050] The stacked electronic component 100 may include a first dummy pattern DP1 and a second dummy pattern DP2 that are arranged alternately with respect to each other in the thickness direction, and the first dummy pattern DP1 and the second dummy pattern DP2 may be offset from each other in a direction perpendicular to the thickness direction. For example, the first dummy pattern DP1 and the second dummy pattern DP2 may be arranged so as not to overlap each other in the thickness direction. This effectively reduces the step difference between the capacitance forming portion Ac and the margin portions 114 and 115, and effectively improves stability against shear stress.

[0051] Figures 4a and 4b show a structure in which two dummy patterns DP1 and DP2 are arranged in the first margin section 114 and the second margin section 115, respectively, spaced apart in the longitudinal direction. However, the present invention is not limited to this. For example, three or more dummy patterns DP1 and DP2 may be arranged in the first margin section 114 and the second margin section 115, respectively, spaced apart from each other in the longitudinal direction.

[0052] Figure 6 shows a structure in which the longitudinal spacing between multiple first dummy electrodes 141 and 142 is the same as the length of the first dummy electrodes 141 and 142, but the present invention is not limited to this. The longitudinal spacing between multiple first dummy electrodes 141 and 142 may be greater than the length of the first dummy electrodes 141 and 142.

[0053] The conductive metal contained in the first dummy electrodes 141 and 142 may be one or more of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti, and alloys thereof, and more preferably may contain Ni, but the present invention is not limited thereto. The conductive metal contained in the first dummy electrodes 141 and 142 may be the same as or different from the conductive metal contained in the internal electrodes 121 and 122.

[0054] Figure 7a is a schematic plan view showing the first internal electrode, the first dummy electrode, and the second dummy electrode of a stacked electronic component according to another embodiment of the present invention; Figure 7b is a schematic plan view showing the second internal electrode, the first dummy electrode, and the second dummy electrode of a stacked electronic component according to another embodiment of the present invention; Figure 8 is a schematic cross-sectional view showing a section along the line IV-IV' in Figure 7a; Figure 9 is a partially enlarged view of Figure 7a; Figure 10 is a partially enlarged view showing area A in Figure 8; and Figure 11 is a modified example of Figure 10.

[0055] Hereinafter, with reference to Figures 7a to 11, a stacked electronic component 100-1 according to another embodiment of the present invention will be described. For components that are the same as or similar to those of the stacked electronic component 100 described in Figures 1 to 6, the same or similar reference numerals will be used, and redundant explanations will be omitted.

[0056] A stacked electronic component 100-1 according to one embodiment of the present invention may include second dummy electrodes 151 and 152 arranged in margin portions 114 and 115 and overlapping with dielectric housing portions 141a and 142a in the thickness direction. By including first dummy electrodes 141 and 142 and second dummy electrodes 151 and 152, the stacked electronic component 100-1 can reduce the step difference between the capacitance forming portion Ac and the margin portions 114 and 115, and effectively improve the dielectric strength characteristics and structural stability of the stacked electronic component 100.

[0057] In one embodiment, multiple first dummy electrodes 141, 142 and multiple second dummy electrodes 151, 152 are arranged, and at least some of the multiple first dummy electrodes 141, 142 can be alternately arranged in the thickness direction with at least some of the multiple second dummy electrodes 151, 152. That is, the first dummy electrodes 141 and the second dummy electrodes 152 may be alternately arranged in the thickness direction, and the first dummy electrodes 142 and the second dummy electrodes 151 may be alternately arranged in the thickness direction.

[0058] In one embodiment, multiple first dummy electrodes 141, 142 and multiple second dummy electrodes 151, 152 are arranged, and some of the multiple first dummy electrodes 141, 142 can be arranged alternately with some of the multiple second dummy electrodes 151, 152 in the longitudinal direction. For example, the first dummy electrodes 141 and the second dummy electrodes 151 may be arranged alternately in the longitudinal direction, and the first dummy electrodes 142 and the second dummy electrodes 152 may be arranged alternately in the longitudinal direction.

[0059] The stacked electronic component 100-1 may include dummy patterns DP1-1, DP2-1 which are arranged at both ends in the longitudinal direction of the margin portions 114, 115 and include a plurality of first dummy electrodes 141, 142 and second dummy electrodes 151, 152 arranged in the longitudinal direction.

[0060] The stacked electronic component 100-1 may include a first dummy pattern DP1-1 and a second dummy pattern DP2-1 arranged alternately with respect to each other in the thickness direction, wherein the first dummy electrode 141 of the first dummy pattern DP1-1 may overlap with the second dummy electrode 152 of the second dummy pattern DP2-1 in the thickness direction, and the second dummy electrode 151 of the first dummy pattern DP1-1 may overlap with the first dummy electrode 142 of the second dummy pattern DP2-1 in the thickness direction. For example, the first dielectric housing portion 141a may overlap with the second dummy electrode 152 in the thickness direction, and the first dielectric housing portion 142a may overlap with the second dummy electrode 151 in the thickness direction. This effectively mitigates the step difference between the capacitance forming portion Ac and the margin portions 114, 115, and further effectively improves the stability of the stacked electronic component 100-1 against shear stress.

[0061] Referring to Figures 7a and 7b, the dummy patterns DP1-1 and DP2-1 are arranged in an 8×1 (length × width) configuration with first dummy electrodes 141, 142 and second dummy electrodes 151, 152 alternately arranged in the length direction, but the present invention is not limited to this. The dummy patterns DP1-1 and DP2-1 can include multiple first dummy electrodes 141, 142 and second dummy electrodes 151, 152 arranged in various configurations, such as 6×1, 4×1, or 2×1 (length × width direction). However, if the spacing between adjacent dummy patterns DP1-1 and DP2-1 in the length direction becomes excessively narrow, current may flow between external electrodes of different polarities, potentially causing a short circuit. Therefore, it is preferable that the first dummy electrodes 141, 142 and second dummy electrodes 151, 152 are not placed in the central part of the margin portions 114 and 115 in the length direction.

[0062] Here, the longitudinal central portion of the margin portions 114 and 115 can mean the region between two dummy patterns DP1-1 and DP2-1 that are separated in the longitudinal direction. The length of the longitudinal central portion of the margin portion may be greater than the longitudinal distance between the first internal electrode 121 and the fourth surface 4, or the longitudinal distance between the second internal electrode 122 and the third surface 3 (i.e., the length of the L-margin).

[0063] When three or more dummy patterns DP1-1, DP2-1 are arranged in the margin sections 114, 115, spaced apart from each other in the longitudinal direction, the sum of the longitudinal separation distances between the dummy patterns DP1-1, DP2-1 may be greater than the length of the L-margin. For example, when three, four, or five dummy patterns DP1-1, DP2-1 are arranged in the margin sections 114, 115, spaced apart from each other in the longitudinal direction, the sum of the separation distances of two, three, or four may be greater than the length of the L-margin.

[0064] The shape of the second dummy electrodes 151 and 152 is not particularly limited, but referring to Figure 9, the cross-sections in the longitudinal and width directions of the dielectric housing portions 141a and 142a and the second dummy electrodes 151 and 152 may be circular, and the diameter of the dielectric housing portions 141a and 142a may be larger than the diameter of the second dummy electrodes 151 and 152. However, the present invention is not limited thereto, and the cross-sections in the longitudinal and width directions of the dielectric housing portions 141a and 142a and the second dummy electrodes 151 and 152 may be polygonal, or any other shape may be used.

[0065] In one embodiment, the longitudinal and widthwise cross-sections of the second dummy electrodes 151 and 152 may be smaller than the longitudinal and widthwise cross-sections of the dielectric housing portions 141a and 142a, and the entire longitudinal and widthwise cross-sections of the second dummy electrodes 151 and 152 may overlap with the longitudinal and widthwise cross-sections of the dielectric housing portions 141a and 142a in the thickness direction.

[0066] For example, the second dummy electrodes 151 and 152 may have substantially the same shape as the dielectric housings 141a and 142a, and may be smaller in size than the dielectric housings 141a and 142a.

[0067] Referring to Figure 10, the first dummy electrode 142 and the second dummy electrode 151 do not necessarily have to overlap in a direction perpendicular to the thickness direction. However, the present invention is not limited thereto. Due to the difference in the number of stacked internal electrodes between the capacitance forming portion and the margin portion, the margin portion can be compressed in the thickness direction compared to the capacitance forming portion during the crimping and firing process. As a result, as shown in Figure 11, the first dummy electrode 142 and the second dummy electrode 151 can overlap in a direction perpendicular to the thickness direction. That is, a part of the second dummy electrode 151 can be placed in the dielectric housing portion 142a. In this case, a part of the margin portion 114 is sandwiched between the dummy conductor portion 142b of the first dummy electrode 142 and the second dummy electrode 151, which can further effectively improve the stability of the multilayer electronic component against shear stress.

[0068] The conductive metal contained in the second dummy electrodes 151 and 152 may be one or more of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti, and alloys thereof, and more preferably may contain Ni, but the present invention is not limited thereto. The conductive metal contained in the second dummy electrodes 151 and 152 may be the same as or different from the conductive metal contained in the internal electrodes 121 and 122.

[0069] Figure 12a is a schematic plan view showing the first internal electrode, the first dummy electrode, and the second dummy electrode of a stacked electronic component according to another embodiment of the present invention; Figure 12b is a schematic plan view showing the second internal electrode, the first dummy electrode, and the second dummy electrode of a stacked electronic component according to another embodiment of the present invention; Figure 13 is a schematic cross-sectional view showing a cross section along the line V-V' in Figure 12a; and Figure 14 is a partially enlarged view of Figure 12a.

[0070] Hereinafter, with reference to Figures 12a to 14, a stacked electronic component 100-2 according to another embodiment of the present invention will be described. For components identical or similar to those of stacked electronic components 100 and 100-1 described in Figures 1 to 11, the same or similar reference numerals will be used, and redundant explanations will be omitted.

[0071] A stacked electronic component 100-2 according to one embodiment of the present invention may include second dummy electrodes 151 and 152 arranged in margin portions 114 and 115 and overlapping with dielectric housing portions 141a and 142a in the thickness direction. By including first dummy electrodes 141 and 142 and second dummy electrodes 151 and 152, the stacked electronic component 100-2 can mitigate the step difference between the capacitance forming portion Ac and the margin portions 114 and 115, and effectively improve the dielectric strength characteristics and structural stability of the stacked electronic component 100.

[0072] In one embodiment, multiple first dummy electrodes 141, 142 and multiple second dummy electrodes 151, 152 are arranged, and at least some of the multiple first dummy electrodes 141, 142 can be alternately arranged in the thickness direction with at least some of the multiple second dummy electrodes 151, 152. For example, the first dummy electrodes 141 and the second dummy electrodes 152 may be alternately arranged in the thickness direction, and the first dummy electrodes 142 and the second dummy electrodes 151 may be alternately arranged in the thickness direction.

[0073] In one embodiment, multiple first dummy electrodes 141, 142 and second dummy electrodes 151, 152 are arranged, and some of the multiple first dummy electrodes 141, 142 can be arranged alternately with some of the multiple second dummy electrodes 151, 152 in the width direction. For example, the first dummy electrodes 141 and the second dummy electrodes 151 may be arranged alternately in the width direction, and the first dummy electrodes 142 and the second dummy electrodes 152 may be arranged alternately in the width direction.

[0074] More preferably, some of the multiple first dummy electrodes 141, 142 may be arranged alternately with some of the multiple second dummy electrodes 151, 152 in the length and width directions. For example, the first dummy electrodes 141 and the second dummy electrodes 151 may be arranged alternately in the length and width directions, and the first dummy electrodes 142 and the second dummy electrodes 152 may be arranged alternately in the length and width directions.

[0075] The stacked electronic component 100-2 may include dummy patterns DP1-2, DP2-2 which include a plurality of first dummy electrodes 141, 142 and second dummy electrodes 151, 152 arranged in the length direction and / or width direction, positioned at both ends in the length direction of the margin portions 114, 115.

[0076] The stacked electronic component 100-2 may include a first dummy pattern DP1-2 and a second dummy pattern DP2-2 arranged alternately with respect to each other in the thickness direction, wherein the first dummy electrode 141 of the first dummy pattern DP1-2 may overlap with the second dummy electrode 152 of the second dummy pattern DP2-2 in the thickness direction, and the second dummy electrode 151 of the first dummy pattern DP1-2 may overlap with the first dummy electrode 142 of the second dummy pattern DP2-2 in the thickness direction. For example, the first dielectric housing portion 141a may overlap with the second dummy electrode 152 in the thickness direction, and the first dielectric housing portion 142a may overlap with the second dummy electrode 151 in the thickness direction. This effectively mitigates the step difference between the capacitance forming portion Ac and the margin portions 114, 115, and further effectively improves the stability of the stacked electronic component 100-2 against shear stress.

[0077] Referring to Figures 12a and 12b, the dummy patterns DP1-2 and DP2-2 are arranged in a 2x2 (length × width) configuration with first dummy electrodes 141, 142 and second dummy electrodes 151, 152 arranged alternately in the length and width directions, but the present invention is not limited thereto. The dummy patterns DP1-1 and DP2-1 can include multiple first dummy electrodes 141, 142 and second dummy electrodes 151, 152 arranged in various configurations, such as 1x2, 2x1, 3x3, or 4x4 (length × width).

[0078] Dummy patterns DP1-2 and DP2-2 can be placed in areas adjacent to the corners where the third, fifth, and sixth surfaces of the main body meet, and in areas adjacent to the corners where the fourth, fifth, and sixth surfaces of the main body meet. The first dummy electrodes 141 and 142 can be exposed on the outer surface of the main body. For example, the first dummy electrodes 141 and 142 can be exposed on the third and / or fifth surface, the fourth and / or fifth surface, the third and / or sixth surface, or the fourth and / or sixth surface. In this case, the first dummy electrodes 141 and 142 can be in contact with external electrodes, but the present invention is not limited thereto.

[0079] Method for manufacturing a multilayer electronic component Hereinafter, an example of a method for forming the multilayer electronic components 100, 100-1, and 100-2 will be described. However, the manufacturing method of the multilayer electronic components 100, 100-1, and 100-2 is not limited thereto.

[0080] First, ceramic powder for forming the dielectric layer 111 is prepared. The ceramic powder may be a perovskite-type compound powder represented by ABO3. The ceramic powder may include, for example, one or more of BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), CaZrO3, and (Ca 1-x Sr x )(Zr 1-y Ti y )O3 (0 < x ≦ 0.5, 0 < y ≦ 0.5). BaTiO3 powder can be synthesized, for example, by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Examples of the synthesis method of the ceramic powder include a solid-phase method, a sol-gel method, a hydrothermal synthesis method, etc., but the present invention is not limited thereto. Next, after drying and pulverizing the prepared ceramic powder, an organic solvent such as ethanol and a binder such as polyvinyl butyral are mixed to produce a ceramic slurry, and the ceramic slurry is applied and dried on a carrier film to provide a ceramic green sheet.

[0081] Next, an internal electrode pattern and a first dummy electrode pattern are formed on a ceramic green sheet by printing a conductive paste containing metal powder, a binder, an organic solvent, etc., to a predetermined thickness using a screen printing method or gravure printing method. A second dummy electrode pattern may be further formed on the ceramic green sheet. The first dummy electrode pattern and / or the second dummy electrode pattern may be printed on both sides of the internal electrode pattern in the width direction. The first dummy electrode pattern may have a ring shape with an empty space in the center, and the cross-section of the second dummy electrode pattern may be circular. The diameter of the second dummy electrode pattern may be smaller than the diameter of the empty space in the first dummy electrode pattern.

[0082] After peeling the ceramic green sheet printed with the internal electrode pattern and dummy electrode pattern from the carrier film, a predetermined number of layers of ceramic green sheets are laminated and pressed together to form a ceramic laminate. A predetermined number of layers of ceramic green sheets without the internal electrode pattern can be laminated on the upper and lower parts of the ceramic laminate to form cover portions 112 and 113 after firing. On the other hand, during the pressing process, a portion of the ceramic green sheet may be sandwiched in the empty space of the first dummy electrode pattern. Alternatively, a ceramic green sheet may be sandwiched between the first dummy electrode pattern and the second dummy electrode pattern. This can improve the stability of the ceramic laminate against shear stress.

[0083] Subsequently, the ceramic laminate can be cut to a predetermined chip size, and the cut chips can be fired to form the main body 110. The firing can be carried out, for example, in a 1.0%H2 / 99.0%N2 to 3.5%H2 / 96.5%N2 (H2O / H2 / N2 atmosphere) at a temperature of 1000°C to 1400°C for 1 to 3 hours.

[0084] Next, external electrodes 131 and 132 are formed. For example, if the base electrode layers 131a and 132a include a fired electrode layer, the main body 110 can be dipped in a conductive paste for external electrodes containing metal powder, glass frit, binder, and organic solvent, and then the conductive paste for external electrodes can be fired at a temperature of 500°C to 900°C to form a fired electrode layer.

[0085] For example, if the base electrode layers 131a and 132a include a resin electrode layer, the main body can be dipped in a conductive resin composition containing metal powder, resin, binder, and organic solvent, and then cured at a temperature of 250°C to 550°C to form the resin electrode layer.

[0086] Furthermore, electroplating and / or electroless plating can be used to form plating layers 131b and 132b on the underlying electrode layers 131a and 132a.

[0087] The present invention is not limited by the embodiments described above or the accompanying drawings, but is limited by the claims provided herein. Accordingly, various forms of substitution, modification, and alteration are possible by persons with ordinary skill in the art, without departing from the technical idea of ​​the present invention as described in the claims, and these also fall within the scope of the present invention.

[0088] Furthermore, the expression "one embodiment" does not mean that each embodiment is the same as another, but is provided to highlight and explain the unique and distinct characteristics of each embodiment. However, the above-presented embodiments do not preclude their realization in combination with the features of other embodiments. For example, even if a matter described in one embodiment is not described in another embodiment, it can be understood as a description related to the other embodiment, unless there is a description in the other embodiment that contradicts or is contrary to that matter.

[0089] In this invention, "connected" is a concept that includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept that includes both cases where physically connected and cases where not connected. In addition, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, within the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component. [Explanation of symbols]

[0090] 100, 100-1, 100-2: Multilayer electronic components 110: Main unit 111: Dielectric layer 112, 113: Cover section 114, 115: Margin section 121, 122: Internal electrode 131, 132: External electrode 131a, 132a: Base electrode layer 131b, 132b: Plating layer 141, 142: First dummy electrode 141a, 142a: Dielectric housing 141b, 142b: Dummy conductor section DP1, DP2: Dummy patterns

Claims

1. A body comprising a dielectric layer and internal electrodes arranged alternately with the dielectric layer in the thickness direction, and including a first and second surface facing each other in the thickness direction, a third and fourth surface connected to the first and second surfaces and facing each other in the length direction, and a fifth and sixth surface connected to the first, second, third and fourth surfaces and facing each other in the width direction, Includes external electrodes arranged on the third and fourth surfaces, The internal electrodes are arranged so as to be separated from the fifth and sixth surfaces with a margin portion in between. A stacked electronic component in which a first dummy electrode, including a dielectric housing portion, is arranged in the margin portion.

2. The stacked electronic component according to claim 1, comprising a second dummy electrode disposed in the margin portion and overlapping the dielectric housing portion in the thickness direction.

3. The laminated electronic component according to claim 2, wherein a plurality of the first dummy electrodes and the second dummy electrodes are arranged, and at least a portion of the plurality of first dummy electrodes are arranged alternately with at least a portion of the plurality of second dummy electrodes in the thickness direction.

4. The stacked electronic component according to claim 2, wherein a plurality of the first dummy electrodes and the second dummy electrodes are arranged, and a portion of the plurality of first dummy electrodes are arranged alternately with a portion of the plurality of second dummy electrodes in the longitudinal direction.

5. The stacked electronic component according to claim 4, wherein the first dummy electrode and the second dummy electrode are not arranged in the central part of the margin portion in the longitudinal direction.

6. The stacked electronic component according to claim 2, wherein a plurality of the first dummy electrodes and the second dummy electrodes are arranged, and a portion of the plurality of first dummy electrodes are arranged alternately with a portion of the plurality of second dummy electrodes in the width direction.

7. The stacked electronic component according to claim 2, wherein a plurality of the first dummy electrodes and the second dummy electrodes are arranged, and a portion of the plurality of first dummy electrodes are arranged alternately with a portion of the plurality of second dummy electrodes in the length direction and the width direction.

8. The stacked electronic component according to claim 1, wherein the first dummy electrode includes a dummy conductor portion that surrounds the dielectric housing portion in the longitudinal and width directions.

9. The stacked electronic component according to claim 1, wherein the first dummy electrode includes a ring-shaped dummy conductor portion.

10. The laminated electronic component according to claim 1, wherein the dielectric housing portion includes at least a portion of the margin portion.

11. The cross-sections of the dielectric housing and the second dummy electrode in the longitudinal and width directions are circular, respectively. The multilayer electronic component according to claim 2, wherein the diameter of the dielectric housing is larger than the diameter of the second dummy electrode.

12. The stacked electronic component according to claim 11, wherein the cross-section of the first dummy electrode in the length direction and the width direction is rectangular.

13. The cross-sections of the second dummy electrode in the length direction and the width direction are smaller than the cross-sections of the dielectric housing portion in the length direction and the width direction. The stacked electronic component according to claim 2, wherein the entire cross-section of the second dummy electrode in the length direction and the width direction overlaps with the cross-section of the dielectric housing in the length direction and the width direction in the thickness direction.

14. The stacked electronic component according to claim 2, wherein the second dummy electrode has substantially the same shape as the dielectric housing and is smaller in size than the dielectric housing.

15. The stacked electronic component according to any one of claims 1 to 14, wherein a plurality of first dummy electrodes are arranged in the thickness direction, and are offset from adjacent first dummy electrodes in the thickness direction in a direction perpendicular to the thickness direction.

16. The stacked electronic component according to any one of claims 1 to 14, wherein a plurality of first dummy electrodes are arranged in the thickness direction and are arranged so as not to overlap with adjacent first dummy electrodes in the thickness direction.

17. The stacked electronic component according to any one of claims 1 to 14, wherein the first dummy electrodes are a plurality and are arranged in the length direction and / or width direction.

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