Balancer for electric double-layer capacitors

Abstract

This invention provides an electric double-layer capacitor balancer that maximizes charging energy efficiency by controlling the current flowing through two electric double-layer capacitors to be the same. [Solution] The present invention relates to an electric double layer capacitor balancer for balancing the current flowing through a first electric double layer capacitor and a second electric double layer capacitor, which are sequentially connected in series between a power line and a common line, such that the current flowing through them is the same. The present invention discloses an electric double layer capacitor balancer comprising a first resistor, a second resistor and a third resistor sequentially connected in series between a power line and a common line, a first transistor whose base terminal is electrically connected between the first resistor and the second resistor and connected in parallel with the first electric double layer capacitor, and a second transistor connected in series with the first transistor, whose base terminal is electrically connected between the second resistor and the third resistor and connected in parallel with the second electric double layer capacitor.

Description

Technical Field

[0001] Various embodiments of the present invention relate to a balancer for an electric double layer capacitor.

Background Art

[0002] An electric double layer capacitor (EDLC) has the advantage of having a large capacitance due to its structural characteristics, but has the disadvantage of a low rated voltage. Therefore, when the voltage required for practical use is significantly higher than the rated voltage of the electric double layer capacitor, an electric double layer capacitor module is configured by connecting a large number of EDLC cells in series and used.

[0003] A plurality of electric double layer capacitor cells constituting an electric double layer capacitor module will have a difference in the charging voltage of each electric double layer capacitor cell due to the dispersion of capacitance and leakage current. And when the electric double layer capacitor module is charged at the maximum voltage, some electric double layer capacitor cells with small capacitance may be damaged by exceeding the rated voltage. And since the individual electric double layer capacitor cells have different leakage currents which are their inherent parameters, a cell with a small leakage current connected in series with a cell with a large leakage current may have its charging voltage increase over time and eventually exceed the rated voltage and be damaged.

[0004] Thus, a method for solving the problem caused by the characteristic dispersion (unbalance) of electric double layer capacitor cells in an electric double layer capacitor module in which a large number of electric double layer capacitor cells are connected in series can be to apply a passive balancer or an active balancer.

[0005] The passive balancer adds shunt resistors R1 and R2 in parallel with the electric double layer capacitors C1 and C2 as shown in FIG. 1, and allows shunt currents IB1 and IB2 much larger than the leakage current to flow through the shunt resistors to prevent the imbalance of the charging voltage caused by the leakage currents IL1 and IL2, but there is a problem that power loss occurs due to the shunt current and the charging energy efficiency decreases.

[0006] An active balancer, as shown in Figure 2, uses an operational amplifier (OP-AMP) to control the charging voltage so that it is always maintained at half the supply voltage. While an active balancer has the advantage of always maintaining the same charging voltage for electric double-layer capacitors C1 and C2, it is sensitive to even slight imbalances in charging voltage, and has the problem of reduced charging energy efficiency due to repeated charging and discharging. [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] The present invention provides an electric double-layer capacitor balancer that can maximize charging energy efficiency by controlling the currents flowing through two electric double-layer capacitor circuits (IC1 and IC2 flowing through Q1 and Q2) to be the same, while allowing a deviation in the charging voltages of the two electric double-layer capacitors within a range where it does not pose a problem.

[0008] Furthermore, the present invention provides an electric double-layer capacitor balancer that can improve safety by changing the operating points of two transistors in response to changes in ambient temperature, thereby automatically correcting the rated voltage of the electric double-layer capacitor that has changed due to the change in ambient temperature.

[0009] Furthermore, the present invention provides an electric double-layer capacitor balancer that enables balancing based on the difference in capacitance and leakage current between two electric double-layer capacitors, while simultaneously improving energy efficiency. [Means for solving the problem]

[0010] An electric double-layer capacitor balancer according to an embodiment of the present invention is an electric double-layer capacitor balancer for balancing the current flowing through a first electric double-layer capacitor and a second electric double-layer capacitor, which are sequentially connected in series between a power line and a common line, so that the current flowing through them is the same, and may include a first resistor, a second resistor and a third resistor sequentially connected in series between the power line and the common line, a first transistor whose base terminal is electrically connected between the first resistor and the second resistor and connected in parallel with the first electric double-layer capacitor, and a second transistor connected in series with the first transistor, whose base terminal is electrically connected between the second resistor and the third resistor and connected in parallel with the second double-layer capacitor.

[0011] The first resistor may have its first terminal electrically connected to the power line, the collector of the first transistor, and the first terminal of the first electric double-layer capacitor, and its second terminal electrically connected to the first terminal of the second resistor and the base of the first transistor.

[0012] The second resistor may have its first terminal electrically connected to the second terminal of the first resistor and to the base of the first transistor, and its second terminal electrically connected to the first terminal of the third resistor and to the base of the second transistor.

[0013] The third resistor may have its first terminal electrically connected to the second terminal of the second resistor and the base of the second transistor, and its second terminal electrically connected to the common line, the collector of the second transistor, and the second terminal of the second electric double-layer capacitor.

[0014] The first transistor may be an NPN type transistor, and the second transistor may be a PNP type transistor.

[0015] The base of the first transistor may be electrically connected to the second terminal of the first resistor and the first terminal of the second resistor, the collector may be electrically connected to the power line, the first terminal of the first resistor and the first terminal of the first electric double layer capacitor, and the emitter may be electrically connected to the emitter of the second transistor, the second terminal of the first electric double layer capacitor and the first terminal of the second electric double layer capacitor.

[0016] The second transistor may have its base electrically connected to the second terminal of the second resistor and the first terminal of the third resistor, its collector electrically connected to the common line, the second terminal of the third resistor and the second terminal of the second electric double layer capacitor, and its emitter electrically connected to the emitter of the first transistor, the second terminal of the first electric double layer capacitor and the first terminal of the second electric double layer capacitor.

[0017] The magnitudes of the first resistor, the second resistor, and the third resistor may be set by the sum of the magnitude of the power supply voltage, which is the voltage supplied through the power supply line and the common line, and the rated voltages of the first electric double layer capacitor and the second electric double layer capacitor.

[0018] The smaller the second resistor is compared to the first resistor and the third resistor, the smaller the first transistor current (collector current of the first transistor) and the second transistor current (collector current of the second transistor) are, thereby reducing energy loss. The larger the second resistor is compared to the first resistor and the third resistor, the larger the first transistor current and the second transistor current are, thereby reducing the deviation in the charging voltages of the first electric double layer capacitor and the second electric double layer capacitor.

[0019] The second transistor can operate if the first leakage current, which is the leakage current of the first electric double-layer capacitor, is greater than the second leakage current, which is the leakage current of the second electric double-layer capacitor.

[0020] The first transistor can operate if the second leakage current, which is the leakage current of the second electric double-layer capacitor, is even larger than the first leakage current, which is the leakage current of the first electric double-layer capacitor.

[0021] If the capacitance of the first electric double layer capacitor is even smaller than the capacitance of the second electric double layer capacitor, the first electric double layer capacitor will be discharged by the difference between the first transistor current (collector current of the first transistor) and the second transistor current (collector current of the second transistor), and the second electric double layer capacitor will be charged, so that the second voltage, which is the voltage between the first electric double layer capacitor and the second electric double layer capacitor, can be half of the power supply voltage, which is the voltage supplied through the power line and the common line.

[0022] If the capacitance of the second electric double layer capacitor is even smaller than the capacitance of the first electric double layer capacitor, the first electric double layer capacitor will be charged by the difference between the first transistor current, which is the collector current of the first transistor, and the second transistor current, which is the collector current of the second transistor, and the second electric double layer capacitor will be discharged, so that the second voltage, which is the voltage between the first electric double layer capacitor and the second electric double layer capacitor, can be half of the power supply voltage, which is the voltage supplied through the power line and the common line. [Effects of the Invention]

[0023] An electric double-layer capacitor balancer according to one embodiment of the present invention can maximize charging energy efficiency by controlling the current flowing through the two electric double-layer capacitor circuits to be the same, while allowing a deviation in the charging voltage of the two electric double-layer capacitors within a range where it does not cause problems.

[0024] In addition, a balancer for an electric double layer capacitor according to an embodiment of the present invention can improve safety by automatically correcting the rated voltage of the electric double layer capacitor that has changed with respect to a change in ambient temperature, in which the operating points of two transistors are changed according to the change in ambient temperature. A balancer for an electric double layer capacitor is provided.

[0025] In addition, a balancer for an electric double layer capacitor according to an embodiment of the present invention can perform balancing based on the difference in capacitance and the difference in leakage current between two electric double layer capacitors, and at the same time can improve energy efficiency.

Brief Description of the Drawings

[0026] [Figure 1] FIG. 12 is an example of a circuit diagram illustrating a passive balancer for an electric double layer capacitor. [Figure 2] FIG. 15 is an example of a circuit diagram illustrating an active balancer for an electric double layer capacitor. [Figure 3] FIG. 18 is a circuit diagram illustrating a balancer for an electric double layer capacitor according to the present invention.

Modes for Carrying Out the Invention

[0027] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0028] Embodiments of the present invention are provided to more fully explain the present invention to those having ordinary knowledge in the relevant technical field. The following embodiments can be modified in various different forms, and the scope of the present invention is not limited to the following embodiments. On the contrary, these embodiments are provided to make this disclosure more faithful and complete and to fully convey the idea of the present invention to those skilled in the art.

[0029] Furthermore, in the following drawings, the thickness and size of each layer are exaggerated for illustrative purposes and clarity, and the same reference numeral in the drawings refers to the same element. As used herein, the term "and / or" includes any one or all combinations of the items listed. Also herein, "connected" means not only when member A and member B are directly connected, but also when member A and member B are indirectly connected with member C interposed between them.

[0030] The terms used herein are used to describe specific embodiments and are not intended to limit the invention. As used herein, a singular form can include multiple forms unless explicitly stated otherwise in context. Also, as used herein, “comprise” and / or “comprising” specify the presence of the shapes, figures, stages, actions, members, elements and / or groups thereof mentioned, and do not exclude the presence or addition of one or more other shapes, figures, actions, members, elements and / or groups thereof.

[0031] In this specification, terms such as "first," "second," etc., are used to describe various members, parts, regions, layers, and / or parts, but it is obvious that these members, parts, regions, layers, and / or parts should not be limited by these terms. These terms are used solely to distinguish one member, part, region, layer, or part from another region, layer, or part. Accordingly, the first member, part, region, layer, or part detailed below can refer to the second member, part, region, layer, or part without departing from the teachings of the present invention.

[0032] Space-related terms such as "beneath," "below," "lower," "above," and "upper" are used in the drawings to facilitate understanding of one element or feature and another. Such space-related terms are for facilitating understanding of the invention in the various process states or uses of the invention, and are not intended to limit the invention. For example, if an element or feature in the drawing is inverted, an element described as "beneath" or "below" becomes "above" or "on top." Therefore, "below" is a concept that encompasses "above" or "below."

[0033] Preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that persons with ordinary skill in the art to which the present invention pertains can fully implement the present invention.

[0034] Hereinafter, the same reference numerals are used for parts having similar configurations and operations throughout the specification. Furthermore, when a part is described as being electrically coupled to another part, this includes not only direct coupling but also coupling through other elements in between.

[0035] Figure 3 shows a circuit diagram illustrating an electric double-layer capacitor balancer according to the present invention. As shown in Figure 3, the electric double-layer capacitor balancer 100 can include a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, and a third resistor R3. The electric double-layer capacitor balancer 100 can also be electrically connected to the power line VCC and the common line COMMON to receive the power supply voltage. Such an electric double-layer capacitor balancer 100 can balance the currents flowing through the two electric double-layer capacitor circuits C1 and C2 so that they are the same, while allowing deviations in the charging voltages of the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2 connected in series within a range that does not cause problems.

[0036] Here, the first resistor R1, the second resistor R2, and the third resistor R3 are connected in series with each other, and the power supply voltage can be distributed according to the magnitude of the resistance.

[0037] Below, we will first explain the individual component relationships within the balancer 100 of the electric double-layer capacitor.

[0038] The power line VCC can be electrically connected to the first terminal 1 of the first resistor R1, the collector C of the first transistor Q1, and the first terminal 1 of the first electric double-layer capacitor C1. The common line COMMON can be electrically connected to the second terminal 2 of the third resistor R3, the collector C of the second transistor Q2, and the second terminal 2 of the second electric double-layer capacitor C2.

[0039] The first resistor R1 may include a first terminal 1 and a second terminal 2. The first terminal 1 of the first resistor R1 may be electrically connected to the power line VCC, the collector C of the first transistor Q1, and the first terminal 1 of the first electric double-layer capacitor C1. The second terminal 2 of the first resistor R1 may be electrically connected to the first terminal 1 of the second resistor R2 and the base B of the first transistor Q1.

[0040] The second resistor R2 may include a first terminal 1 and a second terminal 2. The first terminal 1 of the second resistor R2 may be electrically connected to the second terminal 2 of the first resistor R1 and to the base B of the first transistor Q1. The second terminal 2 of the second resistor R2 may be electrically connected to the first terminal 1 of the third resistor R3 and to the base B of the second transistor Q2.

[0041] The third resistor R3 may include a first terminal 1 and a second terminal 2. The first terminal 1 of the third resistor R3 may be electrically connected to the second terminal 2 of the second resistor R2 and the base B of the second transistor Q2. The second terminal 2 of the third resistor R3 may be electrically connected to the common line COMMON, the collector C of the second transistor Q2, and the second terminal 2 of the second electric double-layer capacitor C2.

[0042] The first transistor Q1 may be an NPN transistor, comprising a base B, a collector C, and an emitter E. The base B of the first transistor Q1 may be electrically connected to the second terminal 2 of the first resistor R1 and the first terminal 1 of the second resistor R2. The collector C of the first transistor Q1 may be electrically connected to the power line VCC, the first terminal 1 of the first resistor R1, and the first terminal 1 of the first electric double-layer capacitor C1. The emitter E of the first transistor Q1 may be electrically connected to the emitter E of the second transistor Q2, the second terminal 2 of the first electric double-layer capacitor C1, and the first terminal 1 of the second electric double-layer capacitor C2.

[0043] The second transistor Q2 may be a PNP transistor, comprising a base B, a collector C, and an emitter E. The base B of the second transistor Q2 may be electrically connected to the second terminal 2 of the second resistor R2 and the first terminal 1 of the third resistor R3. The collector C of the second transistor Q2 may be electrically connected to the common line COMMON, the second terminal 2 of the third resistor R3, and the second terminal 2 of the second electric double-layer capacitor C2. The emitter E of the second transistor Q2 may be electrically connected to the emitter E of the first transistor Q1, the second terminal 2 of the first electric double-layer capacitor C1, and the first terminal 1 of the second electric double-layer capacitor C2.

[0044] The first electric double-layer capacitor C1 may include a first terminal 1 and a second terminal 2. The first terminal 1 of the first electric double-layer capacitor C1 may be electrically connected to the power line VCC, the first terminal 1 of the first resistor R1, and the collector C of the first transistor Q1. The second terminal 2 of the first electric double-layer capacitor C1 may be electrically connected to the emitter E of the first transistor Q1, the emitter E of the second transistor Q2, and the first terminal 1 of the second electric double-layer capacitor C2.

[0045] The second electric double-layer capacitor C2 may include a first terminal 1 and a second terminal 2. The first terminal 1 of the second electric double-layer capacitor C2 may be electrically connected to the emitter E of the first transistor Q1, the emitter E of the second transistor Q2, and the second terminal 2 of the first electric double-layer capacitor C1. The second terminal 2 of the second electric double-layer capacitor C2 may be electrically connected to the common line COMMON, the second terminal 2 of the third resistor R3, and the collector C of the second transistor Q2.

[0046] Such an electric double-layer capacitor balancer 100 can maximize charging energy efficiency by controlling the currents flowing through the two electric double-layer capacitor circuits C1 and C2 to be the same, while allowing deviations in the charging voltages of the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2 within a range where this does not cause problems. Furthermore, since the voltage VBE between the base B and emitter E of semiconductor transistors Q1 and Q2 has a negative temperature coefficient characteristic, this can be used to compensate for the decrease in rated voltage withstand voltage due to changes in ambient temperature. Such transistors Q1 and Q2 may be bipolar junction transistors (BJT). In addition, the relationship between the voltage VBE between the base B and emitter E and the current IC at the collector C of transistors Q1 and Q2 can be defined as shown in mathematical equation 1 below.

[0047]

number

[0048] Here, Is is the saturated current of the base B and emitter E junction of transistors Q1 and Q2, and VBE can be the forward voltage between the base B and emitter E. Also, k can be the Boltzmann constant, t can be the absolute temperature, and q can be the elementary charge. Furthermore, VT is the thermal voltage and can be kt / q. When the absolute temperature (t) is 300K (27℃), the thermal voltage VT can be approximately 26mV.

[0049] The collector current IC of such transistors Q1 and Q2 can increase tenfold for every approximately 60mV increase in the forward voltage VBE between the base and emitter. Also, for every 1°C increase in temperature, the forward voltage VBE between the base and emitter can decrease by approximately 2mV. As the ambient temperature rises, the balancer 100 of such electric double-layer capacitors will lower the operating points of transistors Q1 and Q2 by approximately 2mV / °C, thereby automatically compensating for the changes in the rated voltages of electric double-layer capacitors C1 and C2 caused by the change in ambient temperature and improving safety.

[0050] In the following, the voltage at the base B of the first transistor Q1 will be referred to as the first voltage V1, the voltage between the emitter E of the first transistor Q1 and the emitter E of the second transistor Q2 will be referred to as the second voltage V2, and the voltage at the base B of the second transistor Q2 will be referred to as the third voltage V3.

[0051] Here, the operating point of the first transistor Q1 or the second transistor Q2 can be determined by the second voltage V2, which is the voltage at the connection point between the first electric double layer capacitor C1 and the second electric double layer capacitor C2. That is, the connection point between the emitter E of the first transistor Q1 and the emitter E of the second transistor Q2 is directly connected to the connection point between the first electric double layer capacitor C1 and the second electric double layer capacitor C2, and the first transistor Q1 or the second transistor Q2 can operate by detecting the second voltage V2, which is the voltage at the connection point between the first electric double layer capacitor C1 and the second electric double layer capacitor C2.

[0052] In the balancer 100 of the electric double-layer capacitor, the values ​​of the first resistor R1 and the third resistor R3 may be the same. In this case, the difference between the power supply voltage (the voltage between the power supply line VCC and the common line COMMON) and the first voltage V1 may be the same as the third voltage V3. That is, when the first resistor R1 and the third resistor R3 are the same, the sum of the first voltage V1 and the third voltage V3, plus the second resistor voltage VR2 (the voltage between the first terminal 1 and the second terminal 2 of the second resistor R2), may be equal to the magnitude of the power supply voltage. Here, the second resistor voltage VR2 may be arbitrarily set.

[0053] The magnitudes of the first voltage V1 and the third voltage V3 can be set by adjusting the magnitudes of the first resistor R1, the second resistor R2, and the third resistor R3. Here, the values ​​of the first resistor R1 and the third resistor R3 may be the same. Also, the second resistor R2 may be set according to the ratio of the rated voltages of the electric double-layer capacitors C1 and C2 to the power supply voltage.

[0054] For example, if the power supply voltage is low and there is sufficient margin between the rated voltages of the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2, the value of the second resistor R2 can be made smaller than that of the first resistor R1 and the third resistor R3 to lower the operating points of the first transistor Q1 and the second transistor Q2. This reduces the collector current IC1 of the first transistor Q1 and the collector current IC2 of the second transistor Q2 in the equilibrium state, thereby minimizing energy loss.

[0055] As another example, if the power supply voltage is high and there is little margin between the rated voltages of the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2, the value of the second resistor R2 can be increased compared to the first resistor R1 and the third resistor R3 to raise the operating points of the first transistor Q1 and the second transistor Q2. This reduces the tolerance range for the deviation in the charging voltage of the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2, instead of increasing the first transistor current IC1 and the second transistor current IC2 in the equilibrium state.

[0056] Furthermore, if the capacitances of the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2 are the same, the leakage currents of the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2 are the same, and the characteristics of the first transistor Q1 and the second transistor Q2 are also the same, then the first transistor current IC1 and the second transistor current IC2 will be the same, and therefore balancing may not be required.

[0057] In other words, if the characteristics of the first transistor Q1 and the second transistor Q2 are identical, and the first leakage current IL1 (leakage current of the first electric double-layer capacitor C1) and the second leakage current IL2 (leakage current of the second electric double-layer capacitor C2) are identical, then the sum of the first transistor current IC1 and the first leakage current IL1 can be equal to the sum of the second transistor current IC2 and the second leakage current IL2. Furthermore, the second voltage V2 can be half of the power supply voltage to achieve balance.

[0058] Furthermore, if the first resistor R1 and the third resistor R3 are the same, the characteristics of the first transistor Q1 and the second transistor Q2 are the same, the first leakage current IL1 and the second leakage current IL2 are the same, and the capacitances of the first electric double layer capacitor C1 and the second electric double layer capacitor C2 are the same, then the second voltage V2 will not only balance the system by being half the power supply voltage, but the first transistor current IC1 and the second transistor current IC2 will also be the same, so the current flowing from the first transistor Q1 and the second transistor Q2 to the first electric double layer capacitor C1 and the second electric double layer capacitor C2 may be zero.

[0059] Under these conditions, the balancer 100 of the electric double-layer capacitor can be designed such that the sum of the first resistance current IR1 (current through the first resistor R1) and the first transistor current IC1 is less than the specified value of the first leakage current IL1, and the sum of the third resistance current IR2 (current through the third resistor R3) and the second transistor current IC2 is less than the specified value of the second leakage current IL2, thereby minimizing energy loss.

[0060] The following describes the case where the balancer 100 of the electric double-layer capacitor has a difference in capacitance between the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2.

[0061] If the capacitance of the first electric double-layer capacitor C1 is greater than that of the second electric double-layer capacitor C2, the charging voltage of the first electric double-layer capacitor C1 will be higher than that of the second electric double-layer capacitor C2. As a result, the second voltage V2 will be higher than half of the power supply voltage. This requires the first electric double-layer capacitor C1 to be charged further and the second electric double-layer capacitor C2 to be discharged further, thereby balancing the charging voltage generated by the difference in capacitance between the two electric double-layer capacitors C1 and C2.

[0062] In other words, if the capacitance of the first electric double-layer capacitor C1 is even larger than the capacitance of the second electric double-layer capacitor C2, the second voltage V2 will be higher. As a result, the difference between the second voltage V2 and the third voltage V3 will be larger than the difference between the first voltage V1 and the second voltage V2. Consequently, the second transistor current IC2 will be even greater than the first transistor current IC1, and the second electric double-layer capacitor C2 will be discharged by the difference between the second transistor current IC2 and the first transistor current IC1, while the first electric double-layer capacitor C1 will be charged additionally, causing the second voltage V2 to rise and potentially become half of the power supply voltage.

[0063] In this case, the relationship between the current of the second transistor IC2 and the current of the first transistor IC1 can be as shown in mathematical equation 2.

[0064]

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[0065] Here, the thermal voltage VT is the same constant value as in mathematical equation 1. Mathematical equation 2 reduces the deviation in charging voltage due to the difference in capacitance between the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2, and also reduces the second transistor current IC2, so that the second voltage V2 becomes half of the power supply voltage, and the second transistor current IC2 and the first transistor current IC1 can become the same.

[0066] As another example, if the capacitance of the first electric double-layer capacitor C1 is even smaller than that of the second electric double-layer capacitor C2, and the second voltage V2 is lower than half of the power supply voltage, then it is necessary to charge the second electric double-layer capacitor C2 and discharge the first electric double-layer capacitor C1 to balance the voltage deviation caused by the difference in capacitance between the two.

[0067] In other words, since the capacitance of the first electric double-layer capacitor C1 is even smaller than the capacitance of the second electric double-layer capacitor C2, the second voltage V2 becomes lower. As a result, the difference between the first voltage V1 and the second voltage V2 becomes larger than the difference between the second voltage V2 and the third voltage V3. Consequently, the second transistor current IC2 becomes even smaller than the first transistor current IC1. Therefore, the first electric double-layer capacitor C1 is additionally discharged by the difference between the first transistor current IC1 and the second transistor current IC2, and the second electric double-layer capacitor C2 is additionally charged, causing the second voltage V2 to rise and potentially become half of the power supply voltage.

[0068] In this case, the relationship between the current of the first transistor IC1 and the current of the second transistor IC2 can be as shown in mathematical equation 3.

[0069]

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[0070] Here, the thermal voltage VT is the same constant value as in mathematical equation 1. According to mathematical equation 3, the deviation in charging voltage due to the difference in capacitance between the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2 is reduced, and the first transistor current IC1 also decreases, so that the second voltage V2 becomes half of the power supply voltage, and the first transistor current IC1 and the second transistor current IC2 can become the same.

[0071] The imbalance in charging voltage caused by the capacitance difference between the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2 has the characteristic that once it is balanced by the electric double-layer capacitor balancer 100, it does not pose any further problem in subsequent repeated charging and discharging cycles.

[0072] In the following, we will explain the case where the balancer 100 of an electric double-layer capacitor has the same capacitance as the first electric double-layer capacitor C1 and the second electric double-layer capacitor C2, but with a deviation in leakage current. If the balancer 100 of an electric double-layer capacitor has the same first leakage current IL1 and the same second leakage current IL2, and the characteristics of the first transistor Q1 and the second transistor Q2 are the same, then the first transistor current IC1 and the second transistor current IC2 are the same, and this value can be defined as the reference current ICx.

[0073] If the second leakage current IL2 is even larger than the first leakage current IL1, the second voltage V2 will be lower than half of the power supply voltage. Here, the second voltage V2 may decrease continuously in proportion to the passage of time. As the second voltage V2 decreases due to the difference between the second leakage current IL2 and the first leakage current IL1, the difference between the first voltage V1 and the second voltage V2 increases, and the difference between the second voltage V2 and the third voltage V3 decreases. As a result, the first transistor current IC1 increases and the second transistor current IC2 decreases, so that the sum of the first leakage current IL1 and the first transistor current IC1 flowing through the first electric double-layer capacitor C1 is equal to the sum of the second leakage current IL2 and the second transistor current IC2 flowing through the second electric double-layer capacitor C2, thus balancing the currents.

[0074] Here, the first transistor current IC1 and the second transistor current IC2 can be defined as shown in mathematical equation 4.

[0075]

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[0076] Of course, the thermal voltage VT here is the same constant value as in mathematical equation 1. In this case, the unbalanced value of the second voltage V2 necessary for correcting the leakage current can be as shown in mathematical equation 5, and while tolerating this voltage imbalance, the sum of the first transistor current IC1 and the first leakage current IL1 and the sum of the second transistor current IC2 and the second leakage current IL2 can be balanced with each other.

[0077]

number

[0078] Of course, the thermal voltage VT here is the same constant value as in mathematical equation 1.

[0079] For example, if the first transistor current IC1 is 100 times the reference current ICx, the second voltage V2 will be (VS / 2)-120mV, and the second transistor current IC2 may be the reference current ICx / 100. In other words, if the second leakage current IL2 is even larger than the first leakage current IL1, the first transistor current IC1 can be additionally passed through the first transistor Q1 so that its sum with the first leakage current IL1 is the same as the sum of the second leakage current IL2 (which is the leakage current of the second electric double-layer capacitor C2) and the second transistor current IC2.

[0080] If the first leakage current IL1 is even larger than the second leakage current IL2, the second voltage V2 will be higher than half of the power supply voltage, and the second voltage V2 may increase steadily in proportion to the passage of time. As the difference between the first leakage current IL1 and the second leakage current IL2 increases the second voltage V2, the difference between the first voltage V1 and the second voltage V2 decreases, and the difference between the second voltage V2 and the third voltage V3 increases. This increases the second transistor current IC2 and decreases the first transistor current IC1, so that the sum of the first leakage current IL1 and the first transistor current IC1 flowing through the first electric double-layer capacitor C1 is equal to the sum of the second leakage current IL2 and the second transistor current IC12 flowing through the second electric double-layer capacitor C2.

[0081] Here, the first transistor current IC1 and the second transistor current IC2 can be defined as shown in mathematical equation 6.

[0082]

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[0083] Of course, the thermal voltage VT here is a constant value, just like in equation 1. In this case, the imbalance value of the second voltage V2 necessary for correcting the leakage current can be as shown in equation 7, and while tolerating that voltage imbalance, the sum of the first transistor current IC1 and the first leakage current IL1 and the sum of the second transistor current IC2 and the second leakage current IL2 will balance each other.

[0084]

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[0085] Of course, the thermal voltage VT here is the same constant value as in mathematical equation 1.

[0086] For example, if the second transistor current IC2 is 100 times the reference current ICx, the second voltage V2 will be approximately (VS / 2) + 120mV, and the first transistor current IC1 may be the reference current ICx / 100. In other words, if the first leakage current IL1 is even larger than the second leakage current IL2, the second transistor current IC2 will flow additionally through the second transistor Q2, and the sum of the second leakage current IL2 and IC2 can be made to be the same as the sum of the first leakage current IL1 (which is the leakage current of the first electric double-layer capacitor C1) and the first transistor current IC1.

[0087] The above description is merely one embodiment for implementing the balancer for electric double-layer capacitors according to the present invention. The present invention is not limited to the above embodiments, and the technical spirit of the present invention can be extended to the extent that anyone with ordinary skill in the art to which the invention belongs can make various modifications without departing from the spirit of the invention, as claimed in the following claims.

Claims

1. In an electric double-layer capacitor balancer for balancing the current flowing through a first electric double-layer capacitor and a second electric double-layer capacitor, which are sequentially connected in series between a power line and a common line, A first resistor, a second resistor, and a third resistor are sequentially connected in series between the power line and the common line; A first transistor whose base terminal is electrically connected between the first resistor and the second resistor, and which is connected in parallel with the first electric double-layer capacitor; and A balancer for an electric double layer capacitor, comprising a second transistor connected in series with the first transistor, with its base terminal electrically connected between the second resistor and the third resistor, and connected in parallel with the second electric double layer capacitor.

2. The first resistor has its first terminal electrically connected to the power line, the collector of the first transistor, and the first terminal of the first electric double-layer capacitor. A balancer for an electric double-layer capacitor according to claim 1, wherein the second terminal is electrically connected to the first terminal of the second resistor and the base of the first transistor.

3. The first terminal of the second resistor is electrically connected to the second terminal of the first resistor and to the base of the first transistor. A balancer for an electric double-layer capacitor according to claim 1, wherein the second terminal is electrically connected to the first terminal of the third resistor and the base of the second transistor.

4. The third resistor has its first terminal electrically connected to the second terminal of the second resistor and the base of the second transistor. The balancer for an electric double layer capacitor according to claim 1, wherein the second terminal is electrically connected to the common line, the collector of the second transistor, and the second terminal of the second electric double layer capacitor.

5. The balancer for an electric double-layer capacitor according to claim 1, wherein the first transistor is an NPN type transistor and the second transistor is a PNP type transistor.

6. The base of the first transistor is electrically connected to the second terminal of the first resistor and the first terminal of the second resistor. The collector is electrically connected to the power line, the first terminal of the first resistor, and the first terminal of the first electric double-layer capacitor. The balancer for an electric double layer capacitor according to claim 5, wherein the emitter is electrically connected to the emitter of the second transistor, the second terminal of the first electric double layer capacitor, and the first terminal of the second electric double layer capacitor.

7. The base of the second transistor is electrically connected to the second terminal of the second resistor and the first terminal of the third resistor. The collector is electrically connected to the common line, the second terminal of the third resistor, and the second terminal of the second electric double-layer capacitor. The balancer for electric double layer capacitors according to claim 5, wherein the emitter is electrically connected to the emitter of the first transistor, the second terminal of the first electric double layer capacitor, and the first terminal of the second electric double layer capacitor.

8. The balancer for electric double-layer capacitors according to claim 1, wherein the magnitudes of the first resistor, the second resistor, and the third resistor can be set by the magnitude of the power supply voltage, which is the voltage supplied through the power supply line and the common line, and the sum of the rated voltages of the first electric double-layer capacitor and the second electric double-layer capacitor.

9. The smaller the second resistor is compared to the first resistor and the third resistor, the smaller the first transistor current (collector current of the first transistor) and the second transistor current (collector current of the second transistor) become, thereby reducing energy loss. The balancer for electric double layer capacitors according to claim 8, wherein the larger the second resistor is compared to the first resistor and the third resistor, the greater the first transistor current and the second transistor current increase, thereby reducing the deviation in the charging voltages of the first electric double layer capacitor and the second electric double layer capacitor.

10. The balancer for electric double layer capacitors according to claim 1, wherein the second transistor operates when the first leakage current, which is the leakage current of the first electric double layer capacitor, is greater than the second leakage current, which is the leakage current of the second electric double layer capacitor.

11. The balancer for an electric double layer capacitor according to claim 1, wherein the first transistor operates when the second leakage current, which is the leakage current of the second electric double layer capacitor, is greater than the first leakage current, which is the leakage current of the first electric double layer capacitor.

12. If the capacitance of the first electric double-layer capacitor is even smaller than the capacitance of the second electric double-layer capacitor, The first electric double-layer capacitor is discharged by the difference between the first transistor current (collector current of the first transistor) and the second transistor current (collector current of the second transistor), and the second electric double-layer capacitor is charged. The balancer for electric double-layer capacitors according to claim 6, wherein the second voltage, which is the voltage between the first electric double-layer capacitor and the second electric double-layer capacitor, is half of the power supply voltage, which is the voltage supplied through the power line and the common line.

13. If the capacitance of the second electric double-layer capacitor is even smaller than the capacitance of the first electric double-layer capacitor, The first electric double-layer capacitor is charged by the difference between the first transistor current, which is the collector current of the first transistor, and the second transistor current, which is the collector current of the second transistor, and the second electric double-layer capacitor is discharged. The balancer for electric double-layer capacitors according to claim 6, wherein the second voltage, which is the voltage between the first electric double-layer capacitor and the second electric double-layer capacitor, is half of the power supply voltage, which is the voltage supplied through the power line and the common line.

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