VCSEL element and method for manufacturing the same

Abstract

Conventional indium phosphide (InP) VCSEL devices require post-processing steps such as packaging and wire bonding, which complicates the overall process and leads to increased costs. [Solution] The present invention provides a method for manufacturing a VCSEL element comprising the following steps: Prepare an InP substrate and form an epitaxial structure having a top surface and a bottom surface on the InP substrate. Form a first platform on the epitaxial structure. Form a wet oxide layer within the first platform. Remove the InP substrate. Form a second platform on the epitaxial structure and create a gap between the second platform and the first platform. Form an insulating layer on the epitaxial structure. Form an N-type electrode and a P-type electrode on the epitaxial structure. The N-type electrode is located on the bottom surface of the epitaxial structure. The P-type electrode extends from the top surface of the epitaxial structure along the side wall to the bottom surface.

Description

Technical Field

[0001] The present invention relates to a VCSEL device and a method for manufacturing the same, and more particularly to a VCSEL device and a method for manufacturing the same that simplify the post-process and improve the heat dissipation efficiency.

Background Art

[0002] A laser diode has the characteristics of being small in volume and capable of emitting high-intensity laser light, and is widely applied in fields such as optical transmission, medical treatment, 3D sensing, and 3C products. Laser diodes are classified into two main types: vertical-cavity surface-emitting lasers (VCSELs) and edge-emitting lasers (EELs) according to the differences in the epitaxial direction, laser light resonance, and emission direction. VCSEL devices have higher optical purity and lower energy consumption than EEL devices, and are currently the main technology in the field of laser diodes.

[0003] Taking a conventional indium phosphide (InP) VCSEL device as an example, its overall structure is a vertical platform structure, which is useful for the execution of each process. However, conventional InP VCSEL devices require processes such as packaging and wire bonding in the post-process, making the overall process complicated and resulting in increased costs. After packaging and wire bonding, the volume and area of the InP VCSEL device increase, which is disadvantageous for heat dissipation and likely to cause device failures.

[0004] Therefore, how to design a VCSEL device and a method for manufacturing the same that can improve the above problems is an issue worthy of research.

Summary of the Invention

[0005] An object of the present invention is to provide a method for manufacturing a VCSEL device that simplifies the post-process and improves the heat dissipation efficiency.

[0006] To achieve the above objective, the present invention provides a method for manufacturing a VCSEL element, comprising the steps of: preparing an indium phosphide substrate; performing an epitaxial step to form an epitaxial structure on the indium phosphide substrate having a top surface and a bottom surface, and including an N-type gallium indium arsenide layer, an N-type distributed Bragg reflective layer, an emissive layer, a P-type distributed Bragg reflective layer, and a P-type gallium indium arsenide layer in order from the bottom surface to the portion adjacent to the indium phosphide substrate; performing a first platform formation step to form a first platform from the top surface of the epitaxial structure; performing a wet oxidation step to form a wet oxide layer within the first platform; removing the indium phosphide substrate; performing a second platform formation step to form a second platform from the top surface of the epitaxial structure and to form a gap between the second platform and the first platform; performing a deposition step to form an insulating layer on the epitaxial structure; and performing a metallization step to form an N-type electrode and a P-type electrode on the epitaxial structure. The N-type electrode is located at the bottom of the epitaxial structure, while the P-type electrode extends from the top surface of the epitaxial structure along the side wall to the bottom.

[0007] In embodiments of the present invention, the wet oxide layer is formed within a P-type distributed Bragg reflective layer and is adjacent to the light-emitting layer.

[0008] In the embodiments of the present invention, the wet oxide layer is manufactured from an aluminum indium arsenide material.

[0009] In embodiments of the present invention, the first platform and the second platform each extend from the top surface to the bottom surface of the epitaxial structure to the light-emitting layer, and the first platform and the second platform are on the same plane in the N-type distributed Bragg reflective layer.

[0010] In embodiments of the present invention, the insulating layer is formed on all surfaces except the bottom surface of the epitaxial structure and the first top surface of the first platform.

[0011] In the embodiment of the present invention, the P-type electrode extends from the first upper surface of the first platform to the gap, the second upper surface of the second platform, and along the side wall of the epitaxial structure to the bottom surface, with a portion of the P-type electrode and the N-type electrode in contact with the bottom surface.

[0012] The present invention further provides a VCSEL element. The VCSEL element of the present invention has an epitaxial structure, an insulating layer, an N-type electrode, and a P-type electrode. The epitaxial structure has a top surface, a bottom surface, a first platform, and a second platform. The epitaxial structure includes, in order from the bottom surface, an N-type gallium indium arsenide layer, an N-type distributed Bragg reflective layer, an emissive layer, a P-type distributed Bragg reflective layer, and a P-type gallium indium arsenide layer. The first platform and the second platform each extend from the top surface toward the bottom surface to the emissive layer. The first platform and the second platform are coplanar in the N-type distributed Bragg reflective layer. A gap is formed between the second platform and the first platform. A wet oxide layer is present within the first platform. [Brief explanation of the drawing]

[0013] [Figure 1] Flowchart of the method for manufacturing the VCSEL element of the present invention [Figure 2] Schematic diagram of each step in the manufacturing method of the VCSEL element of the present invention. [Figure 3] Schematic diagram of the overall structure of the VCSEL element of the present invention [Modes for carrying out the invention]

[0014] Each aspect and embodiment is merely illustrative and not limiting; other aspects and embodiments can be made by a person of ordinary skill after referring to this specification without departing from the scope of the invention. The features and advantages of embodiments of the invention will become more apparent from the following detailed description and claims.

[0015] In this specification, the terms “one” or “one” are used to describe the elements and components described herein. This is for convenience and to give a general meaning to the scope of the invention. Thus, unless otherwise intended, such descriptions are understood to include one or at least one, and the singular form also includes the plural form.

[0016] In this specification, the ordinal numbers "first" and "second" are used primarily to distinguish or refer to identical or similar components or structures, and do not necessarily imply a spatial or temporal order of these components or structures. It should be noted that in certain situations or configurations, ordinal numbers may be used interchangeably without affecting the implementation of the invention.

[0017] In this specification, “includes,” “has,” or other similar terms refer to non-exclusive inclusion. For example, a component or structure containing multiple elements is not limited to the elements listed herein, and may include other elements that are not explicitly listed but are inherent to the component or structure.

[0018] The following refers to Figures 1 and 2. Figure 1 is a flowchart of the method for manufacturing the VCSEL element of the present invention. Figure 2 is a schematic diagram of the structure corresponding to each step in the method for manufacturing the VCSEL element of the present invention. As shown in Figures 1 and 2, the method for manufacturing the VCSEL element of the present invention has the following steps.

[0019] Step S1: Prepare an indium phosphide substrate.

[0020] First, the present invention prepares an indium phosphide (InP) substrate 10. The indium phosphide substrate 10 is a temporary substrate for the VCSEL element 1 of the present invention and is used to support the structure that is subsequently formed.

[0021] Step S2: An epitaxial process is performed to form an epitaxial structure on an indium phosphide substrate.

[0022] After preparing the indium phosphide substrate 10 in step S1, the present invention subsequently performs an epitaxial process such as metal-organic chemical vapor deposition (MOCVD) on the indium phosphide substrate 10 to form an epitaxial structure 20 on the indium phosphide substrate 10. The epitaxial structure 20 has opposing upper surfaces 201 and lower surfaces 202, as well as a plurality of side walls 203 located between the upper surface 201 and the lower surface 202. The lower surface 202 of the epitaxial structure 20 is adjacent to the indium phosphide substrate 10. In embodiments of the present invention, the epitaxial structure 20 includes, in order from the bottom surface 202 adjacent to the indium phosphide substrate 10, an N-type indium gallium arsenide (InGaAs) layer 21, an N-type distributed Bragg reflector (DBR) layer 22, an emissive layer 23, a P-type distributed Bragg reflector layer 24, and a P-type indium gallium arsenide (InGaAs) layer 25. The top surface 201 is located opposite the P-type indium gallium arsenide layer 25. However, the present invention is not limited thereto. The N-type distributed Bragg reflector layer 22 is composed of multiple N-type semiconductor material layers. The P-type distributed Bragg reflector layer 24 is composed of multiple P-type semiconductor material layers. In embodiments of the present invention, the emissive layer 23 is a multiple quantum well (MQW) layer.

[0023] Step S3: The first platform formation step is performed to form the first platform from the upper surface of the epitaxial structure.

[0024] After forming the epitaxial structure 20 in Engineering S2, subsequently, the present invention executes a first platform forming process (such as an etching process) on the epitaxial structure 20 to form a first platform A1 from the upper surface 201 of the epitaxial structure 20. The first platform A1 extends from the upper surface 201 of the epitaxial structure 20 to the light-emitting layer 23 towards the bottom surface 202, forming an independent platform structure. The first platform A1 has a first upper surface A11 and a plurality of first sidewalls A12. Since the horizontal cross-sectional area of the first platform A1 gradually increases from top to bottom, each first sidewall A12 has an inclined wall surface.

[0025] Engineering S4: Execute a wet oxidation process to form a wet oxidation layer within the first platform.

[0026] After forming the first platform A1 in Engineering S3, subsequently, the present invention executes a wet oxidation process on the first platform A1 to form a wet oxidation layer 26 within the first platform A1. In an embodiment of the present invention, the wet oxidation layer 26 is formed within the P-type distributed Bragg reflector layer 24 and is adjacent to the light-emitting layer 23. The wet oxidation layer 26 has an opening region 261. The wet oxidation layer 26 is a confinement layer, which restricts the current to pass only through the opening region 261, and allows the light emitted from the light-emitting layer 23 to be radiated to the outside through the opening region 261 of the wet oxidation layer 26. In an embodiment of the present invention, the wet oxidation layer 26 is fabricated with aluminum indium arsenide (AlInAs) material, but the present invention is not limited thereto.

[0027] Engineering S5: Remove the indium phosphide substrate.

[0028] After forming the wet oxidation layer 26 within the first platform A1 in Engineering S4, subsequently, the present invention removes the indium phosphide substrate 10, leaving the epitaxial structure 20 on which the first platform A1 has already been formed.

[0029] Engineering S6: Execute a second platform forming process to form a second platform from the upper surface of the epitaxial structure.

[0030] After removing the indium phosphide substrate 10 in step S5, the present invention subsequently performs a second platform formation step (e.g., an etching step) on the epitaxial structure 20 to form a second platform A2 from the upper surface 201 of the epitaxial structure 20. The second platform A2 extends from the upper surface 201 of the epitaxial structure 20 toward the bottom surface 202 to the light-emitting layer 23, forming an independent platform structure. The second platform A2 has a second upper surface A21 and a plurality of second side walls A22. Since the horizontal cross-sectional area of ​​the second platform A2 gradually increases from top to bottom, each second side wall A22 becomes an inclined wall surface. Since the first platform A1 and the second platform A2 are independent platform structures, a gap D is formed between the first platform A1 and the second platform A2. The second platform A2 can be considered an extended platform of the first platform A1. In practice, the first platform A1 and the second platform A2 are on the same plane in the N-type distributed Bragg reflective layer 22.

[0031] Furthermore, in the process of forming the second platform A2 in process S6, the outer shape of the first platform A1 can be modified at the same time, and the VCSEL element 1 being manufactured can be cut to conform to the required specifications.

[0032] Step S7: A deposition process is performed to form an insulating layer on the epitaxial structure.

[0033] After forming the second platform A2 in step S6, the present invention subsequently performs a deposition process on the epitaxial structure 20 to form an insulating layer 30 on the epitaxial structure 20. In embodiments of the present invention, the insulating layer 30 is formed on all surfaces except the bottom surface 202 of the epitaxial structure 20 and the first top surface A11 of the first platform A1. In other words, the insulating layer 30 covers a plurality of first side walls A12 of the first platform A1, the second top surface A21 and a plurality of second side walls A22 of the second platform A2, and the side walls 203 of the epitaxial structure 20. In embodiments of the present invention, the insulating layer 30 is manufactured from silicon nitride (SiNx) material, but the present invention is not limited thereto.

[0034] Step S8: A metallization step is performed to form N-type and P-type electrodes in the epitaxial structure.

[0035] After forming the insulating layer 30 in step S7, the present invention subsequently performs a metallization process on the epitaxial structure 20 to form an N-type electrode 40 and a P-type electrode 50 on the epitaxial structure 20. In the embodiment of the present invention, the N-type electrode 40 is located on the bottom surface 202 of the epitaxial structure 20. The P-type electrode 50 extends from the top surface 201 of the epitaxial structure 20 along the side wall 203 to the bottom surface 202. In the embodiment of the present invention, the P-type electrode 50 extends from the first top surface A11 of the first platform A1 along the gap D, the second top surface A21 of the second platform A2, and the side wall 203 of the epitaxial structure 20 to the bottom surface 202. A portion of the P-type electrode 50 and the N-type electrode 40 are in contact with the bottom surface 202. In other words, in the VCSEL element 1 of the present invention, a portion of the P-type electrode 50 and the N-type electrode 40 are placed on the bottom surface 202. Furthermore, the P-type electrode 50 has an opening 51 formed on the first upper surface A11 of the first platform A1. The position of the opening 51 corresponds to the opening region 261 of the wet oxide layer 26. Light emitted from the light-emitting layer 23 passes sequentially through the opening region 261 of the wet oxide layer 26 and the opening 51 of the P-type electrode 50 before being radiated to the outside. In the embodiments of the present invention, the N-type electrode 40 is made of germanium gold (GeAu) material and the P-type electrode 50 is made of titanium / platinum / gold (Ti / Pt / Au) material, but the present invention is not limited thereto.

[0036] Furthermore, as shown in Figure 3, the present invention further provides a VCSEL element 1. The VCSEL element 1 of the present invention is manufactured by the manufacturing method described above. The VCSEL element 1 of the present invention mainly comprises an epitaxial structure 20, an insulating layer 30, an N-type electrode 40, and a P-type electrode 50. The epitaxial structure 20 has a top surface 201, a bottom surface 202, a first platform A1, and a second platform A2. The epitaxial structure 20 includes, in order from the bottom surface 202, an N-type indium gallium arsenide layer 21, an N-type distributed Bragg reflective layer 22, an emissive layer 23, a P-type distributed Bragg reflective layer 24, and a P-type indium gallium arsenide layer 25. The first platform A1 and the second platform A2 extend from the top surface 201 toward the bottom surface 202 to the emissive layer 23. The first platform A1 and the second platform A2 are on the same plane in the N-type distributed Bragg reflective layer 22. A gap is formed between the second platform A2 and the first platform A1. A wet oxidation layer 26 is located within the first platform A1.

[0037] In embodiments of the present invention, the wet oxide layer 26 is formed within the P-type distributed Bragg reflective layer 24 and is adjacent to the light-emitting layer 23.

[0038] In the embodiments of the present invention, the VCSEL element 1 of the present invention can respond to long-wavelength light, such as infrared wavelengths, but the present invention is not limited thereto.

[0039] In summary, the VCSEL element 1 of the present invention emits light from the first platform A1. The luminescence efficiency can be increased by installing the wet oxide layer 26. The second platform A2 functions as an extended structure. The P-type electrode 50 extends from the top surface 201 to the bottom surface 202 of the epitaxial structure 20, realizing an electrode flip-chip structure. Since the bottom surface 202 of the VCSEL element 1 of the present invention has both an N-type electrode 40 and a P-type electrode 50, the VCSEL element 1 can achieve electrical conductivity simply by directly connecting the bottom surface 202 to a device or element, eliminating the need to perform wire bonding or packaging processes on the N-type electrode 40 or P-type electrode 50. Compared to conventional VCSEL elements, the overall volume can be significantly reduced, and manufacturing costs can be lowered. Furthermore, the formation of the second platform A2 increases the contact area between the VCSEL element 1 and the corresponding device or element, improving heat dissipation performance.

[0040] The embodiments described above are illustrative and not intended to limit the embodiments or uses of the present invention. Furthermore, while the embodiments described above show at least one exemplary example, it should be understood that numerous variations of the invention are possible. Also, the embodiments described herein are not intended to limit the claims, uses, or configurations in any way. Rather, the embodiments described above provide a guide for a person of ordinary skill in the art to carry out one or more embodiments. Furthermore, changes can be made to the function and arrangement of the elements without departing from the claims, and the claims include all known and foreseeable equivalents at the time of filing of this patent application. [Explanation of symbols]

[0041] 1 VCSEL element 10 Indium phosphide substrate 20 Epitaxial structure 201 Top surface 202 Bottom 203 Side wall 21. N-type gallium indium arsenide layer 22 N-type distributed Bragg reflective layer 23. Emitting layer 24 P-type distributed Bragg reflective layer 25 P-type gallium indium arsenide layer 26 Wet Oxide Layer 30 Insulating layer 40 N-type electrode 50 P type electrode 51 Aperture A1 Platform 1 A11 1st top surface A12 1st side wall A2 Platform 2 A21 2nd top surface A22 2nd side wall S1~S8 process

Claims

1. A method for manufacturing a VCSEL element, The process of preparing an indium phosphide substrate, A step of performing an epitaxial process to form an epitaxial structure on the indium phosphide substrate having an upper surface and a lower surface, and including an N-type gallium indium arsenide layer, an N-type distributed Bragg reflective layer, an emissive layer, a P-type distributed Bragg reflective layer, and a P-type gallium indium arsenide layer in order from the lower surface to the portion adjacent to the indium phosphide substrate, A step of performing a first platform formation step to form the first platform from the upper surface of the epitaxial structure, A step of performing a wet oxidation process to form a wet oxide layer within the first platform, The step of removing the indium phosphide substrate, The process involves performing a second platform formation step to form a second platform from the upper surface of the epitaxial structure, and forming a gap between the second platform and the first platform. A step of performing a deposition process to form an insulating layer on the epitaxial structure, The process includes a step of performing a metallization step to form an N-type electrode and a P-type electrode on the epitaxial structure, A method for manufacturing a VCSEL element, wherein the N-type electrode is located at the bottom surface of the epitaxial structure, and the P-type electrode extends from the top surface of the epitaxial structure along the side wall to the bottom surface.

2. The method for manufacturing a VCSEL element according to claim 1, characterized in that the wet oxide layer is formed within the P-type distributed Bragg reflective layer and is adjacent to the light-emitting layer.

3. The method for manufacturing a VCSEL element according to claim 1, characterized in that the wet oxide layer is manufactured from an aluminum indium arsenide material.

4. The method for manufacturing a VCSEL element according to claim 1, characterized in that the first platform and the second platform each extend from the top surface to the bottom surface of the epitaxial structure to the light-emitting layer, and the first platform and the second platform are on the same plane in the N-type distributed Bragg reflective layer.

5. The method for manufacturing a VCSEL element according to claim 1, characterized in that the insulating layer is formed on all surfaces except the bottom surface of the epitaxial structure and the first top surface of the first platform.

6. The method for manufacturing a VCSEL element according to claim 1, characterized in that the P-type electrode extends from the first upper surface of the first platform to the bottom surface along the gap, the second upper surface of the second platform, and the side wall of the epitaxial structure, and a part of the P-type electrode and the N-type electrode are in contact with the bottom surface.

7. A VCSEL element having an epitaxial structure, an insulating layer, an N-type electrode, and a P-type electrode, The epitaxial structure has a top surface, a bottom surface, a first platform, and a second platform, and the epitaxial structure includes, in order from the bottom surface, an N-type gallium indium arsenide layer, an N-type distributed Bragg reflective layer, an emissive layer, a P-type distributed Bragg reflective layer, and a P-type gallium indium arsenide layer, the first platform and the second platform each extend from the top surface toward the bottom surface toward the emissive layer, the first platform and the second platform are on the same plane in the N-type distributed Bragg reflective layer, a gap is formed between the second platform and the first platform, and a wet oxide layer is present within the first platform. The insulating layer is formed in the epitaxial structure, The N-type electrode is formed on the bottom surface of the epitaxial structure, The P-type electrode is a VCSEL element that extends from the top surface of the epitaxial structure along the side wall to the bottom surface.

8. The VCSEL element according to claim 7, characterized in that the wet oxide layer is formed within the P-type distributed Bragg reflective layer and is adjacent to the light-emitting layer.

9. The VCSEL element according to claim 7, characterized in that the wet oxide layer is manufactured from an aluminum indium arsenide material.

10. The VCSEL element according to claim 7, characterized in that the insulating layer is formed on all surfaces except the bottom surface of the epitaxial structure and the first top surface of the first platform.

11. The VCSEL element according to claim 7, characterized in that the P-type electrode extends from the first upper surface of the first platform to the bottom surface along the gap, the second upper surface of the second platform, and the side wall of the epitaxial structure, and a part of the P-type electrode and the N-type electrode are in contact with the bottom surface.

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