Semiconductor equipment
The semiconductor device achieves miniaturization and high integration with enhanced memory capacity and reliability by employing a complex conductor-insulator structure and IGZO layers, addressing the challenges of transistor stability and power efficiency.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2026-04-17
- Publication Date
- 2026-07-02
Smart Images

Figure 2026110660000001_ABST
Abstract
Description
[Technical Field]
[0001] One aspect of the present invention relates to transistors, semiconductor devices, and electronic devices. One aspect of the invention relates to a method for manufacturing a semiconductor device. Alternatively, one aspect of the invention relates to a semiconductor device. Regarding EHA and modules.
[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. A device is one form of a semiconductor device. Display devices (liquid crystal display devices, light-emitting display devices, etc.), projection Devices, lighting devices, electro-optical devices, energy storage devices, memory devices, semiconductor circuits, imaging devices, electronic equipment Some devices, such as those mentioned above, can be said to possess semiconductor devices.
[0003] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the present invention relates to a product, method, or method of manufacture. This refers to a process, machine, manufacture, or composition. This concerns (the tar). [Background technology]
[0004] In recent years, the development of semiconductor devices has progressed significantly, with a particularly remarkable advance in the development of LSIs, CPUs, and memory. The CPU is a semiconductor integrated circuit (at least a trace) that is separated from the semiconductor wafer. An assembly of semiconductor elements having a converter and memory, and having electrodes that serve as connection terminals. ru.
[0005] Semiconductor circuits (IC chips) such as LSIs, CPUs, and memory are mounted on circuit boards, such as printers. It is mounted on a circuit board and used as one of the components in various electronic devices.
[0006] Furthermore, a transistor is constructed using a semiconductor thin film formed on a substrate having an insulating surface. The technology is attracting attention. This transistor is used in integrated circuits (ICs) and image display devices (simply display). It is widely applied to electronic devices (also referred to as devices). Applicable to transistors. Silicon-based semiconductor materials are widely known as capable semiconductor thin films, but other materials include Oxide semiconductors are attracting attention.
[0007] Furthermore, transistors using oxide semiconductors have extremely low leakage current in the non-conductive state. It is known to be small. For example, the leakage current of a transistor using an oxide semiconductor is Low-power CPUs and other devices that take advantage of this characteristic have been disclosed (see Patent Document 1). ). Also, for example, the characteristic of low leakage current in transistors using oxide semiconductors. Applications of this technology include the disclosure of memory devices that can retain memory contents over long periods of time. (See Patent Document 2.)
[0008] Furthermore, in recent years, with the miniaturization and weight reduction of electronic devices, the need for even higher density integrated circuits has increased. Demand is increasing. Furthermore, there is a need for improved productivity in semiconductor devices, including integrated circuits. [Prior art documents] [Patent Documents]
[0009] [Patent Document 1] Japanese Patent Publication No. 2012-257187 [Patent Document 2] Japanese Patent Publication No. 2011-151383 [Overview of the project] [Problems that the invention aims to solve]
[0010] One aspect of the present invention aims to provide a semiconductor device that can be miniaturized or highly integrated. One aspect of the present invention is to provide a semiconductor device with a large memory capacity. This is one of the challenges. Alternatively, one aspect of the present invention provides a semiconductor with less variation in transistor characteristics. One of the objectives is to provide a conductive device. Alternatively, one aspect of the present invention provides a device with good reliability. One of the objectives is to provide a semiconductor device. Alternatively, one aspect of the present invention provides a good electrical One of the objectives is to provide a semiconductor device having gas characteristics. Or, one aspect of the present invention One of the objectives of this invention is to provide a semiconductor device with a large on-current. One embodiment of this invention aims to provide a low-power semiconductor device. One aspect of this invention aims to provide a novel semiconductor device.
[0011] Furthermore, the description of these problems does not preclude the existence of other problems. One approach does not require that all of these issues be resolved. The title will become clear from the description in the specification, drawings, claims, etc. It is possible to extract other issues from the descriptions in the drawings, claims, etc. [Means for solving the problem]
[0012] One aspect of the present invention is a first conductor disposed on a substrate and a first conductor in contact with the upper surface of the first conductor. The oxide is arranged, and a second conductor, a third conductor, and a fourth conductor are arranged on the oxide. A conductor and a second to fourth conductor are placed on top of each other, with a first opening and a second opening A first insulator having a mouth formed therein, a second insulator placed inside the first opening, and the second insulator A fifth conductor positioned on the edge, a third insulator positioned in the second opening, and The third conductor is located on the first conductor, and the third conductor is located on the first conductor. They are arranged in a superimposed manner, and the first opening is formed superimposed in the region between the second conductor and the third conductor. The second opening is formed superimposed on the region between the third and fourth conductors. It is a semiconductor device.
[0013] In the above, the device comprises a first capacitive element and a second capacitive element, wherein the first capacitive element is the The second capacitive element is electrically connected to the fourth conductor. This is also acceptable. Furthermore, in the above, the first capacitive element is placed on the second conductor, and the second The capacitive element is preferably placed on the fourth conductor.
[0014] Furthermore, in the above, the first conductor is connected to the wiring provided beneath the first conductor. It is preferable that this be done. Furthermore, in the above, the second insulator is the upper surface of the oxide, The third insulator is in contact with the side surface of the first insulator, and the oxide surface and the side surface of the first insulator are in contact with the side surface of the first insulator. It is preferable that it be in contact with the surface.
[0015] Furthermore, in the above, the oxide is a first oxide and a second oxide on the first oxide. The first oxide and the second oxide are indium and element M (M is gallium). (One or more selected from um, aluminum, yttrium, and tin) and zinc The first oxide has the atomic ratio of indium to element M, and the second oxide has the atomic ratio of indium to element M. It is preferable that the ratio of indium atoms to element M is smaller than the atomic ratio of indium atoms to element M.
[0016] Another aspect of the present invention involves forming a first conductor on a substrate and contacting the upper surface of the first conductor. An oxide film is formed, a first conductive film is formed on the oxide film, and the oxide film and the first conductive film are formed into an island. The material is processed to form an oxide and a second conductor, and the oxide and the second conductor are covered. This forms a first insulator, and a part of the first insulator is removed and superimposed on a second conductor to form the second A second opening is formed, and a second opening is superimposed on the first and second openings. A portion of the conductor is removed to form a third conductor, a fourth conductor, and a fifth conductor. The fourth conductor is arranged superimposed on the first conductor, and the oxide is the third to fifth conductor The region that is not superimposed is exposed and, in contact with the upper surface of the oxide, a first insulating film is formed, and oxygen Microwave processing is performed in an atmosphere containing the first insulating film to deposit a second conductive film on top of the first insulating film. The insulating film and the second conductive film are subjected to CMP treatment until the upper surface of the first insulator is exposed. Therefore, a second insulator and a sixth conductor are formed in the first opening, and the second insulator is formed in the second opening. This is a method for fabricating a semiconductor device that forms three insulators and seven conductors. [Effects of the Invention]
[0017] According to one aspect of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. It is possible. Alternatively, according to one aspect of the present invention, a semiconductor device with a large memory capacity can be provided. It is possible. Alternatively, according to one aspect of the present invention, a semiconductor device with less variation in transistor characteristics is provided. This can provide a reliable semiconductor device. Alternatively, according to one aspect of the present invention, It can be provided. Or, according to one aspect of the present invention, a semiconductor having good electrical properties. An apparatus can be provided. Alternatively, according to one aspect of the present invention, a semiconductor with a high on-current can be provided. An apparatus can be provided. Alternatively, according to one aspect of the present invention, miniaturization or high integration can be performed. A semiconductor device can be provided. Alternatively, according to one aspect of the present invention, a low-power semiconductor device can be provided. A semiconductor device can be provided. Alternatively, according to one aspect of the present invention, a novel semiconductor device can be provided. We can provide a place for you.
[0018] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not need to have all of these effects. Other effects are described in the specification. This will become clear from the description in the drawings, claims, etc., and the specification, drawings, claims From descriptions such as these, it is possible to extract other effects. [Brief explanation of the drawing]
[0019] [Figure 1] Figures 1A, 1B, 1C, and 1D are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 2] Figure 2 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 3] Figure 3A illustrates the classification of IGZO crystal structures. Figure 3B illustrates the XRD spectrum of a CAAC-IGZO film. Figure 3C illustrates the micro-electron diffraction pattern of a CAAC-IGZO film. [Figure 4] Figures 4A, 4B, 4C, and 4D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 5] Figures 5A, 5B, 5C, and 5D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 6] Figures 6A, 6B, 6C, and 6D are a top view and a cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 7] Figures 7A, 7B, 7C, and 7D are a top view and a cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 8] Figures 8A, 8B, 8C, and 8D are a top view and a cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 9] Figures 9A, 9B, 9C, and 9D are a top view and a cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 10] Figures 10A, 10B, 10C, and 10D are a top view and a cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 11] Figures 11A, 11B, 11C, and 11D are a top view and a cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 12] Figures 12A, 12B, 12C, and 12D are a top view and a cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 13] Figure 13 is a top view illustrating a microwave processing apparatus according to one aspect of the present invention. [Figure 14] Figure 14 is a cross-sectional view illustrating a microwave processing apparatus according to one aspect of the present invention. [Figure 15] Figure 15 is a cross-sectional view illustrating a microwave processing apparatus according to one aspect of the present invention. [Figure 16] Figures 16A, 16B, 16C, and 16D are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 17] Figures 17A and 17B are cross-sectional views of a semiconductor device according to one aspect of the present invention. [Figure 18] Figure 18 is a cross-sectional view showing the configuration of a storage device according to one aspect of the present invention. [Figure 19] Figure 19 is a cross-sectional view showing the configuration of a storage device according to one aspect of the present invention. [Figure 20] Figures 20A and 20B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 21]Figure 21 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 22] Figure 22 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 23] Figures 23A and 23B are block diagrams showing an example of the configuration of a storage device according to one aspect of the present invention. [Figure 24] Figures 24A, 24B, and 24C are circuit diagrams showing an example of the configuration of a storage device according to one aspect of the present invention. [Figure 25] Figures 25A and 25B are schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 26] Figures 26A and 26B illustrate an example of an electronic component according to one aspect of the present invention. [Figure 27] Figures 27A and 27B are schematic diagrams of a storage device according to one aspect of the present invention. [Figure 28] Figures 28A, 28B, 28C, 28D, 28E, 28F, 28G, and 28H show an electronic device according to one embodiment of the present invention. [Modes for carrying out the invention]
[0020] The embodiments will be described below with reference to the drawings. However, many embodiments are described. It can be implemented in different ways, without deviating from its purpose and scope. It will be readily apparent to those skilled in the art that the form and details can be varied in various ways. Therefore, the present invention shall not be construed as being limited to the contents described in the following embodiments.
[0021] Furthermore, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. This may be the case. Therefore, it is not necessarily limited to that scale. Note that the drawing is an ideal This is a schematic example and is not limited to the shapes or values shown in the diagram. For example, In the actual manufacturing process, processes such as etching can cause layers and resist masks to be altered as intended. Although there may be some reduction in volume, this may not be reflected in the diagram for the sake of easier understanding. In drawings, the same reference numeral is used for identical parts or parts having similar functions across different drawings. It is used in common, and explanations of its repetition may be omitted. Also, in cases where similar functions are referred to... In some cases, the hatch patterns are the same, and no specific designation is assigned.
[0022] Furthermore, the invention is made easier to understand, especially in top views (also called "plan views") and perspective views. Therefore, the description of some components may be omitted. Also, some hidden lines and other markings may be omitted. The word "included" may be omitted in some cases.
[0023] Furthermore, the ordinal numbers used in this specification, etc., as "1st," "2nd," etc., are used for convenience only. It does not indicate the order of processes or stacking order. Therefore, for example, "the first" should be written as "the second". This can be explained by appropriately replacing it with "of" or "the third of," etc. The ordinal numbers described herein do not correspond to the ordinal numbers used to specify one aspect of the present invention. There are cases where this is the case.
[0024] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the diagram. Also, the positions of the components are shown. The relationships change as appropriate depending on the direction in which each component is described. Therefore, in the specification... The terms explained are not limited to those used in the text; they can be appropriately rephrased depending on the context.
[0025] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The cases disclosed in this specification, etc., include cases where X and Y are directly connected. Therefore, it is limited to predetermined connection relationships, for example, connection relationships shown in a diagram or text. Furthermore, connections other than those shown in the diagram or text are also disclosed in the diagram or text. Let X and Y be the objects (e.g., devices, elements, circuits, wiring, electrodes, terminals). (Conductive film, layer, etc.)
[0026] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the drain region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a region where channels are formed (hereinafter also called the channel-forming region), This design allows current to flow between the source and drain through a flannel-formed region. In this specification, the channel-forming region refers to the region through which electric current primarily flows.
[0027] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.
[0028] Note that channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. When the inverter is ON, the part of the semiconductor through which current flows and the gate electrode overlap each other. In the region or channel-forming region, the source (source region or source electrode) and This refers to the distance between the drain (drain region or drain electrode) and the other element. In a zista, the channel length is not necessarily the same across all regions. That is, one The channel length of the transistor may not be fixed to a single value. Therefore, this specification So, the channel length is any one value, maximum value, minimum value, or This will be the average value.
[0029] Channel width refers to, for example, the top view of a transistor, the semiconductor (or transistor) The region where the gate electrode and the part of the semiconductor through which current flows when the gate electrode is ON overlap each other. Channels in a region or channel-forming region, perpendicular to the channel length direction. This refers to the length of the formation region. Note that in a single transistor, the channel width encompasses the entire region. They do not necessarily take the same value. In other words, the channel width of a single transistor is a single value. It may not be fixed. Therefore, in this specification, the channel width is defined as the channel formation region. This is one of the values, the maximum value, the minimum value, or the average value.
[0030] In this specification, depending on the transistor structure, channel formation may actually occur. The channel width in the region (hereinafter also referred to as the "effective channel width") and the transition The channel width shown in the top view of the stylus (hereinafter also referred to as the "apparent channel width") is as follows. ) and may differ. For example, when the gate electrode covers the side of the semiconductor, the effective ch When the channel width becomes larger than the apparent channel width, and its effect can no longer be ignored. For example, in a transistor that is very small and whose gate electrode covers the side of the semiconductor, the semiconductor In some cases, the proportion of channel-forming regions formed on the sides may increase. In such cases, the apparent The effective channel width will be larger than the channel width shown above.
[0031] In such cases, it can be difficult to estimate the effective channel width through actual measurements. For example, in order to estimate the effective channel width from the design value, the shape of the semiconductor is known. An assumption is necessary. Therefore, if the shape of the semiconductor is not precisely known, the effective It is difficult to accurately measure channel width.
[0032] In this specification, when simply referred to as "channel width," it refers to the apparent channel width. There is. Or, in this specification, when simply referred to as channel width, it means effective channel It can refer to width. Note that it can also refer to channel length, channel width, effective channel width, or apparent width. Channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.
[0033] Furthermore, semiconductor impurities refer to components other than the main components that make up the semiconductor, for example, concentrated Elements with a concentration of less than 0.1 atomic percent are considered impurities. The presence of impurities can, for example, lead to... In some cases, this can lead to an increase in the defect level density of semiconductors or a decrease in crystallinity. If the semiconductor is an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, oxide semiconductors Other components besides the main component include transition metals, such as hydrogen, lithium, sodium, silicon, These include boron, phosphorus, carbon, and nitrogen. Note that water can also function as an impurity. For example, the inclusion of impurities can cause oxygen vacancies (V) in oxide semiconductors. O :oxygen va In some cases, cancy (also known as cancy) may form.
[0034] In this specification, silicon oxidnitride is defined as having a composition that contains more oxygen than nitrogen. It has a high content of [something]. Also, silicon nitride oxide, in terms of its composition, has more oxygen than [something]. It has a high nitrogen content.
[0035] Furthermore, in this specification, the term "insulator" shall be replaced with "insulating film" or "insulating layer." It is possible to replace the term "conductor" with "conductive film" or "conductive layer." This is possible. Also, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.
[0036] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10 degrees or more and 10 degrees or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5 degrees and 5 degrees. Furthermore, "approximately parallel" means that two straight lines are positioned at an angle of -30 degrees or more and 30 degrees or less. It refers to a state or condition. Also, "perpendicular" means that two straight lines are positioned at an angle of 80 degrees or more and 100 degrees or less. This refers to a state in which the temperature is between 85 and 95 degrees. Therefore, it also includes cases between 85 and 95 degrees. "Perpendicular" refers to a state where two straight lines are positioned at an angle between 60 degrees and 120 degrees.
[0037] In this specification, metal oxide refers to metal in a broad sense. It is an oxide. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). . ), oxide semiconductor (also called Oxide Semiconductor or simply OS) They are classified into categories such as . ) For example, when a metal oxide is used in the semiconductor layer of a transistor, The metal oxide in question is sometimes referred to as an oxide semiconductor. Therefore, it is sometimes described as an OS transistor. In such cases, it can be rephrased as a transistor having a metal oxide or oxide semiconductor. It is possible.
[0038] Furthermore, in this specification, normally off means not applying a potential to the gate, or When the gate is given a ground potential, the amount of drape flowing through the transistor per 1 μm of channel width is The current is 1 × 10 at room temperature. -20 A or less, 1 × 10 at 85℃ -18 Below A , or 1 × 10 at 125℃ -16 This means being less than or equal to A.
[0039] (Embodiment 1) In this embodiment, using Figures 1 to 17, a transistor 20 according to one aspect of the present invention An example of a semiconductor device having transistor 0a and transistor 200b, and a method for fabricating the same. I will explain this. Furthermore, in the following, transistors 200a and 200b will be discussed together. It is sometimes referred to as the Transistor 200.
[0040] <Example of semiconductor device configuration> Using Figures 1A to 1D, a semiconductor having transistors 200a and 200b is shown. The configuration of the conductive device will be explained. Figure 1A is a top view of the semiconductor device. Also, Figure 1B is Figure 1D is a cross-sectional view of the semiconductor device. Here, Figure 1B shows the section A1-A2 in Figure 1A. The dashed lines indicate cross-sectional views of transistors 200a and 200b. This is also a cross-sectional view in the channel length direction. Furthermore, Figure 1C is shown in Figure 1A with a dashed line from A3 to A4. This is a cross-sectional view of the indicated area, and is also a cross-sectional view of transistor 200a in the channel width direction. Furthermore, Figure 1D is a cross-sectional view of the area shown by the dashed line A5-A6 in Figure 1A. In the top view, some elements have been omitted for clarity.
[0041] A semiconductor device according to one aspect of the present invention comprises an insulator 212 on a substrate (not shown) and an insulator 212 The insulator 214 above, the transistor 200 on the insulator 214, and the transistor 200 above Insulator 280, insulator 282 on insulator 280, insulator 283 on insulator 282, It has: Insulator 212, Insulator 214, Insulator 280, Insulator 282, and Insulator 2 83 functions as an interlayer film. Also, insulator 212, insulator 214, and transistor A conductor 248 (conductor 24) is embedded between 200a and transistor 200b. 8a and conductor 248b) are provided. Conductor 248 is connected to transistor 200a It is electrically connected to transistor 200b and functions as a plug. It is preferable to provide an insulator 249 in contact with the side surface of the conductor 248 that functions as an insulator.
[0042] [Transistor 200] As shown in Figures 1A to 1D, the transistor 200a is located on the insulator 214. 16 and a conductor 205 (conductor 205a, arranged to be embedded in the insulator 216) Conductors 205b and 205c), on the insulator 216, and on the conductor 205 Insulator 222, insulator 224 on insulator 222, oxide 230a on insulator 224 , oxide 230b on oxide 230a, and oxide 243a and acid on oxide 230b The oxide 243b, the conductor 242a on the oxide 243a, and the conductor 24 on the oxide 243b 2b, an insulator 250 on oxide 230b, and an oxide 230b located on the insulator 250. It has a conductor 260 (conductor 260a and conductor 260b) that overlaps with a part of it.
[0043] Furthermore, as shown in Figures 1A to 1D, the transistor 200b is an insulating material on the insulator 214. Edge body 216 and conductor arranged to be embedded in insulator 214 or insulator 216 205, on the insulator 216, and on the conductor 205, the insulator 222, and on the insulator 222 Insulator 224, oxide 230a on insulator 224, oxide 230 on oxide 230a b, oxide 243b and oxide 243c on oxide 230b, and oxide 243b Conductor 242b, conductor 242c on oxide 243c, and insulator on oxide 230b 250 and a conductor 260 located on the insulator 250 and overlapping with a portion of the oxide 230b, To possess.
[0044] In the following, oxides 230a and 230b will be collectively referred to as oxide 230. In some cases, oxides 243a, 243b, and 243c are grouped together. It is sometimes called oxide 243. Also, conductor 242a, conductor 242b, and conductor Sometimes, 242c is collectively referred to as conductor 242.
[0045] Furthermore, the insulator 224, oxide 230, oxide 243, and conductor 242 are covered, An edge body 275 is provided. Also, as shown in Figures 1B and 1C, the conductor 260 The upper surface is positioned to substantially coincide with the upper surface of the insulator 250 and the upper surface of the insulator 280. The insulator 282 is located on the upper surfaces of the conductor 260 and the insulator 280, and the insulator It touches the top of the 250.
[0046] Here, as shown in Figures 1A to 1D, the transistor 200b sandwiches the conductor 248. And it is located on the opposite side of transistor 200a, and consists of conductor 242 and oxide 243 It has the same structure as transistor 200a, except for one other feature.
[0047] In transistors 200a and 200b, insulator 212, insulator 2 14, Insulator 216, Insulator 222, Insulator 224, Oxide 230a, Oxide 230b, Insulators 275, 280, 282, and 283 are used in common. Meanwhile, conductor 205, insulator 250, and conductor 260 are in transistor 2 It is provided in transistor 00a and transistor 200b, respectively. In 0b, the conductor 205, the insulator 250, and the conductor 260 are transient Since it has the same structure as Sta200a, it is represented by the same reference numeral.
[0048] Furthermore, on the oxide 230, there are conductors 242a to 242c, and oxide 243a The oxide 243c is arranged linearly in the channel length direction (A1-A2 direction). Here, the conductor 242b is arranged superimposed on the conductor 248. The region between the electric body 242a and the conductor 242b, and between the conductor 242b and the conductor 242c Openings are provided superimposed on the region. In each opening, an insulator 25 A conductor 260 is provided, which is arranged on the insulator 250.
[0049] The insulator 280 and the insulator 275 are provided with two openings that reach the oxide 230b. An insulator 250 and a conductor 260 are placed within the opening. In sta 200a, the insulator 250 is on the upper surface of oxide 230b and oxide 243a and The sides of oxide 243b, the sides of conductor 242a and conductor 242b, and insulator 27 It is provided in contact with the side surface of 5 and the side surface of the insulator 280. Also, at transistor 200b Furthermore, the insulator 250 has an upper surface of oxide 230b and oxide 243b and oxide 243c The sides of the conductor 242b and conductor 242c, the sides of the insulator 275, and the insulation It is provided in contact with the side surface of body 280. Also, transistor 200a and transistor 2 In 00b, each conductor 260 is on the top and side surfaces of each insulator 250. It is provided adjacent to it.
[0050] In transistors 200a and 200b, the conductor 260 is The conductor 205 functions as the first gate (also called the top gate) electrode, and the second It functions as a gate (also called a back gate) electrode. Also, in transistor 200a... In transistors 200b and 250, the insulator 250 is the first gate insulator. The insulators 222 and 224 function as second gate insulators.
[0051] Conductor 242a functions as either the source or the drain of transistor 200a. Also, the conductor 242b is the other side of the source or drain of transistor 200a. It functions as either the source or drain of transistor 200b. It is also a conductor. 242c functions as either the source or the drain of transistor 200b. At least a portion of the region of the oxide 230 that overlaps with the conductor 260 is the transistor 200 It functions as a channel formation region for transistor a or transistor 200b.
[0052] Here, Figure 2 shows an enlarged view of the vicinity of the channel formation region in Figure 1B. Furthermore, the oxide 230 forms a region 23 that functions as a channel formation region of the transistor 200a. 2d is provided so as to sandwich region 232d, and the source region of transistor 200a or Regions 232a and 232b function as drain regions, and transistor 200b Region 232e, which functions as a channel-forming region, and region 232b, together with region 232 It is provided so as to sandwich e, and serves as the source region or drain region of transistor 200b. It has a functional region 232c.
[0053] Regions 232d and 232e are superimposed on the conductor 260 in at least part of their respective regions. In other words, region 232d is superimposed on the region between conductor 242a and conductor 242b. Region 232e is provided, superimposed on the region between conductor 242b and conductor 242c. Region 232a is provided superimposed on the conductor 242a, and region 232b It is provided superimposed on the conductor 242b, and region 232c is superimposed on the conductor 242c It is established in this manner.
[0054] Regions 232d and 232e, which function as channel-forming regions, are located in region 232a, Regions 232b and 232c have less oxygen deficiency or lower impurity concentrations. Therefore, it is a high-resistance region with a low carrier concentration. Thus, regions 232d and 232e are It can be said to be type i (true) or substantially type i.
[0055] Regions 232a, 232b, and 232c that function as a source region or a drain region, and region 232c have a high oxygen deficiency or a high concentration of impurities such as hydrogen, nitrogen, and metal elements, resulting in an increased carrier concentration and a low-resistance region. That is, regions 232a, 232b, and 232c are n-type regions with a high carrier concentration and low resistance compared to regions 232d and 232e. Here, the carrier concentration of regions 232d and 232e that function as a channel formation region is preferably 1×10 cm or less, more preferably less than 1×10
[0056] cm or less, even more preferably less than 1×10 18 cm -3 or less, even more preferably less than 1× 17 cm -3 or less, and even more preferably less than 12 cm 16 cm -3 or less, and even more preferably less than 1× 10 13 cm -3 or less, and even more preferably less than 1×10 12 cm -3 or less. There is no particular limitation on the lower limit value of the carrier concentration of regions 232d and 232e that function as a channel formation region. For example, it can be 1×10 cm or less. -9 c m -3 or less.
[0057] In addition, between region 232d and region 232a or region 232b, or between region 232 e and region 232b or region 232c, the carrier concentration is equal to or lower than the carrier concentration of regions 232a, 232b, and 232c, and region 2 region 232b, and region 232c, and region 2 Regions are formed with carrier concentrations equivalent to or higher than those in regions 32d and 232e. It may be. In other words, the region in question is region 232d, or region 232e and region 232 a functions as a junction region with region 232b or region 232c. This junction region is The hydrogen concentration is equivalent to the hydrogen concentration in regions 232a, 232b, and 232c, and It is lower than that, equivalent to or lower than the hydrogen concentration in regions 232d and 232e. The oxygen deficiency may also increase in the junction region, region 232a, region 232 b, and the oxygen deficiency in region 232c is equivalent to or less than that of region 232d and This may be equivalent to, or even greater than, the oxygen deficiency in region 232e.
[0058] Furthermore, in oxide 230, it can sometimes be difficult to clearly detect the boundaries of each region. The concentrations of metallic elements, as well as impurity elements such as hydrogen and nitrogen, detected within each region are Furthermore, the changes may not be limited to gradual changes within each domain, but may also be continuous within each domain. The closer the region is to the channel formation region, the more likely it is to contain metallic elements, as well as hydrogen and nitrogen. It is sufficient if the concentration of impurity elements decreases.
[0059] Here, region 232b is for both transistor 200a and transistor 200b, It functions as either a source region or a drain region, and transistor 200a and transistor It can be said that it is shared by transistor 200b. In this way, transistor 200a The transistor 200b has a structure in which the source and drain are connected in series. .
[0060] Furthermore, as shown in Figures 1B and 1D, the oxide 230 has a duct in region 232b. It is in contact with at least a portion of the upper surface of the electrode 248. In this way, region 232b of the oxide 230 By connecting the conductor 248 to transistors 200a and 200b The electrical resistance between the source or drain and the conductor 248 can be reduced. Since region 232b is formed superimposed on conductor 242b, conductor 242b is conductor 248 It is arranged superimposed on at least a portion of it.
[0061] Furthermore, the conductor 248 is positioned so as to be exposed from the upper surface of the insulator 224. For example, the insulator Formed on 212, insulator 214, insulator 216, insulator 222, and insulator 224 The conductor 248 should be positioned so that it is embedded in the opening. However, some parts are exposed from the insulator 224, and the upper surface of the conductor 248 and the upper surface of the insulator 224 It is preferable that the surfaces approximately coincide.
[0062] Here, the conductor 248 is located below the insulator 212 and includes wiring, electrodes, terminals, and Or, circuit elements (switches, transistors, capacitive elements, inductors, resistors, or dashes) The diodes (such as ions) and transistors 200a and 200b are electrically connected. It functions as a plug for connection. For example, the conductor 248 is below the insulator 212. The configuration should be designed to connect to the existing wiring.
[0063] For example, transistor 200 is used as a memory cell of a memory device, and the memory cell is used as When placed on a board with peripheral circuits etc., the conductor 248 and the conductor 248 The wiring provided in contact corresponds to the bit line, and the conductor 260 of transistor 200 is a word It corresponds to a line. As shown in Figure 1B, when the conductor 248 is placed under the oxide 230, Compared to when the conductor 248 is provided on the oxide 230, the conductor 248 and conductor 260 The resulting parasitic capacity can be reduced. In other words, in the above memory device, the word line and Parasitic capacitance occurring in the bit line can be reduced. Also, the conductor 248 is oxide 23 When placed below 0, the bit line is different compared to when the conductor 248 is placed on the oxide 230. It can be shortened. Therefore, the parasitic capacitance that occurs in the bit line can be reduced.
[0064] In this way, by reducing the parasitic capacitance of the bit lines of the above memory device, the memory cell This makes it possible to reduce the design value of the capacitance required for the capacitive element. Because the elements can be miniaturized, the above-mentioned memory device can be miniaturized or highly integrated. It is possible.
[0065] Also, wiring, electrodes, terminals, or circuit elements (swee (Twitches, transistors, capacitive elements, inductors, resistors, or diodes, etc.) At least a portion of it is preferably superimposed with the oxide 230. This allows transistor 2 00, to reduce the area occupied by the above wiring, electrodes, terminals, or circuit elements in a top view. Therefore, the semiconductor device according to this embodiment can be miniaturized or highly integrated. Cut.
[0066] Furthermore, in Figures 1A, 1B, and 1D, the conductor 248 is in contact with the lower surface of region 232b. Although the present invention is configured to include such a feature, it is not limited to this. For example, region 232a Alternatively, the conductor 248 may be provided in contact with the lower surface, or the conductor may be provided in contact with the lower surface of region 232c. A configuration including an electrical unit 248 is also possible.
[0067] The transistor 200 is formed in the oxide 230, which includes a channel formation region, and functions as a semiconductor. It is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor). Oxide 230 This consists of an oxide 230a placed on top of an insulator 224, and an oxide 230a placed on top of the oxide 230a It is preferable to have oxide 230b.
[0068] Furthermore, metal oxides that function as semiconductors have a band gap of 2 eV or more, preferably It is preferable to use gold with a band gap of 2.5 eV or higher. By using a specific oxide, the off-current of the transistor can be reduced. By using a metal oxide with a large top, the off-current of transistor 200 can be reduced. This can be done. By reducing the off-current of transistor 200 in this way, transistor 2 When 00 is used as the memory cell of a storage device, the stored contents can be retained for a long period of time. This is possible. In other words, the storage device does not require a refresh operation, or The refresh operation can be performed very infrequently. This also reduces the power consumption of the storage device. The force can be significantly reduced.
[0069] For example, In-M-Zn, which has indium, element M, and zinc as oxide 230. Oxides (elements M include aluminum, gallium, yttrium, tin, copper, vanadium, and beryllium) Rium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, ra Tantalum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium It is preferable to use one or more metal oxides selected from, for example, oxidative oxides. For material 230, In-Ga-Zn oxide can be used, and tin Oxides with added components may also be used. In addition, as oxide 230, In-Ga oxide, In -Zn oxide and indium oxide may also be used.
[0070] The above metal oxides can be deposited on a substrate using methods such as sputtering. So, the transistor 200 is superimposed on top of peripheral circuits such as the drive circuit formed on the silicon substrate. Therefore, transistor 200 can be used as a memory cell of the memory device. If this is the case, it will increase the area occupied by the memory cell array that can be installed on a single chip. This allows for an increase in the storage capacity of the memory device. Furthermore, the above metal oxide By stacking multiple materials and forming a thin film, memory cell arrays can be stacked and arranged. This allows for the integration and arrangement of cells without increasing the occupied area of the memory cell array. This is possible. In other words, the stacked structure of the memory cell array (hereinafter referred to as a 3D cell array) It is possible to construct a memory cell with high integration capacity. We can provide large semiconductor devices.
[0071] Furthermore, semiconductor devices using the above-mentioned metal oxides, particularly In-Ga-Zn oxide, function normally. The operating temperature range for the conductive device is -40°C to 190°C, and the heat resistance is not Always good. This is Phase Change Memory (PCM). Heat resistance (-40℃ to 150℃), Resistive random-access memory (ReRAM: Resist The heat resistance of Random Access Memory (above -40℃, 125°C) Below ℃, magnetoresistive random-access memory (MRAM) Compared with the heat resistance (-40°C to 105°C) of m Access Memory, etc. Even so, it has good heat resistance.
[0072] Here, the atomic ratio of In to element M in the metal oxide used for oxide 230b However, the atomic ratio of In to element M in the metal oxide used in oxide 230a is larger It is preferable.
[0073] By placing oxide 230a below oxide 230b, below oxide 230a This suppresses the diffusion of impurities and oxygen from the formed structure to oxide 230b. It is possible.
[0074] However, the oxide 230 is limited to a configuration in which two layers of oxide 230a and oxide 230b are stacked. It is not possible to provide a single layer or a laminated structure of three or more layers of oxide 230b. Alternatively, the oxide 230a and oxide 230b may each have a layered structure. It may have. For example, oxide 230 is composed of a single layer of oxide 230b, and region 232b The configuration may also be such that the oxide 230 is more easily formed up to the bottom surface.
[0075] Furthermore, oxides 230a and 230b have a common element other than oxygen (main component By (reducing this to a certain amount), the defect level density at the interface between oxide 230a and oxide 230b is low. This can be done. The defect level density at the interface between oxide 230a and oxide 230b can be reduced. Because this can be achieved, the influence of interfacial scattering on carrier conduction is small, resulting in a high on-current. You can obtain this.
[0076] It is preferable that each of the oxides 230b has crystalline properties. In particular, oxides 230b and CAAC-OS(c-axis aligned crystalline ox It is preferable to use an IDE semiconductor.
[0077] CAAC-OS has a highly crystalline, dense structure, and is free from impurities and defects (for example, Oxygen deficiency (V O It is a metal oxide with few (etc.). In particular, after the formation of the metal oxide, Heat treatment is performed at a temperature that does not cause polycrystalline oxide (for example, between 400°C and 600°C). This allows CAAC-OS to have a more crystalline and dense structure. By doing so, the density of CAAC-OS is increased, and impurities in the CAAC-OS are removed. This can further reduce the diffusion of oxygen.
[0078] On the other hand, CAAC-OS is difficult to identify clear grain boundaries, so it is difficult to identify grain boundaries. It can be said that a decrease in electron mobility due to CAAC-OS is less likely to occur. Metal oxides have stable physical properties. Therefore, metal oxides containing CAAC-OS are It is heat-resistant and highly reliable.
[0079] In transistors using oxide semiconductors, the region in the oxide semiconductor where the channel is formed... The presence of impurities and oxygen deficiencies can easily lead to variations in electrical properties and reduced reliability. Yes. Also, hydrogen near the oxygen vacancy can fill the oxygen vacancy, creating a defect (hereinafter referred to as V). O Let's call it H. In some cases, this can occur. ) and even when no voltage is applied to the gate electrode of the transistor. In some cases, electron carriers are generated. This can lead to the formation of channels in oxide semiconductors. If the region being treated contains an oxygen vacancy, the transistor exhibits normally-on characteristics (gate current). This characteristic allows a channel to exist and current to flow through the transistor even without applying voltage to the electrodes. Therefore, in the region where channels are formed in oxide semiconductors, impurities and oxygen deficiencies are present. Loss, and V O It is preferable that the amount of H is reduced as much as possible. In other words, the amount of H in the oxide is reduced as much as possible. The region in which a channel is formed in a conductor is where a voltage is applied to the gate electrode of a transistor. In the absence of this substance, the carrier concentration is reduced, and it is type i (true) or substantially type i. This is preferable.
[0080] In contrast, near the oxide semiconductor, oxygen that is desorbed by heating (hereinafter referred to as excess oxygen) In some cases, an insulator containing ( ) is provided and heat treatment is performed, which can cause oxide semiconductors to be released from the insulator. It supplies oxygen to the body, prevents oxygen deficiency, and V O H can be reduced. However, the source region When an excess amount of oxygen is supplied to the region or drain region, the on current of transistor 200 This may cause a decrease in the source region, or a decrease in field-effect mobility. Furthermore, the source region Alternatively, the oxygen supplied to the drain region varies within the substrate surface, resulting in a transistor. This will result in variations in the characteristics of semiconductor devices.
[0081] Therefore, in the oxide semiconductor, the region 232d that functions as a channel-forming region Region 232e is preferred to have reduced carrier concentration and be type i or substantially type i. However, regions 232a and 232b function as source or drain regions. Region 232c preferably has a high carrier concentration and is n-type. In other words, oxide. Oxygen vacancies in semiconductor regions 232d and 232e, and V O Reduce H, region 23 Ensure that an excessive amount of oxygen is not supplied to regions 2a, 232b, and 232c. It is preferable.
[0082] Therefore, in this embodiment, a conductor 242a, a conductor 242b, and an oxide 230b are placed on top of each other. With the conductive material 242c in place, microwave treatment is performed in an oxygen-containing atmosphere, and region 2 Oxygen deficiency in regions 32d and 232e, and V O We aim to reduce H. Here, microwave The process involves, for example, using a device with a power supply that generates high-density plasma using microwaves. This refers to the process of removing something.
[0083] By performing microwave processing in an oxygen-containing atmosphere, microwaves or high frequencies such as RF are produced. By using this method, oxygen gas can be converted into plasma, and this oxygen plasma can be applied. By irradiating regions 232d and 232e with microwaves or high-frequency waves such as RF, It is also possible that, due to the action of plasma, microwaves, etc., regions 232d and 232e V O By cleaving H and removing hydrogen H from regions 232d and 232e, oxygen deficiency V is achieved. O It can be supplemented with oxygen. In other words, in regions 232d and 232e, V O H → H + V O The following reaction occurs, and the hydrogen concentrations in regions 232d and 232e change It can be reduced. Therefore, the oxygen deficiency in regions 232d and 232e, and V O This can reduce H and lower the carrier concentration.
[0084] Furthermore, when performing microwave processing in an oxygen-containing atmosphere, high frequencies such as microwaves or RF are used. The effects of waves, oxygen plasma, etc., affect conductors 242a, conductor 242b, and conductor 242 It is shielded by c and does not extend to regions 232a, 232b, and 232c. The oxygen plasma is provided covering the oxide 230b and the conductor 242. This can be reduced by the insulators 275 and 280. During the microwave processing, in regions 232a, 232b, and 232c, V O Low H Since neither a decrease nor an excess of oxygen supply occurs, a decrease in carrier concentration can be prevented. ru.
[0085] In this way, oxygen vacancies are selectively created in regions 232d and 232e of the oxide semiconductor. , and V O By removing H, regions 232d and 232e are of type i or substantially of type i. This can be done. Furthermore, region 232 functions as a source region or drain region. This suppresses the supply of excess oxygen to regions a, 232b, and 232c, and maintains the n-type. This allows for the suppression of fluctuations in the electrical characteristics of transistor 200, and the substrate This can suppress variations in the electrical characteristics of transistor 200 within the plane. 232b becomes a low-resistance n-type region, which allows it to form good contact with the conductor 248. It is possible.
[0086] By adopting the above configuration, we can provide a semiconductor device with less variation in transistor characteristics. It can be provided. Furthermore, it can provide a semiconductor device with good electrical characteristics. Furthermore, it is possible to provide semiconductor devices with good reliability.
[0087] In Figure 1, etc., the side surface of the opening into which the conductor 260 etc. is embedded is made of oxide 230b Including the grooves, the shape is roughly perpendicular to the surface on which oxide 230b is formed, but in this embodiment The form is not limited to this. For example, the bottom of the opening has a gently curved surface, U The shape may be U-shaped. Also, for example, the side surface of the opening may be the surface to which oxide 230b is formed. It may be inclined relative to that.
[0088] Furthermore, as shown in Figure 1C, in a cross-sectional view of transistor 200 in the channel width direction, A curved surface may be present between the side surface of oxide 230b and the top surface of oxide 230b. The edges of the side surface and the edges of the top surface may be curved (hereinafter also referred to as rounded). .
[0089] The radius of curvature on the above curved surface is greater than 0 nm, and the oxide 2 in the region overlapping with conductor 242. A thickness smaller than 30b, or smaller than half the length of the region that does not have the curved surface. This is preferable. Specifically, the radius of curvature of the curved surface is greater than 0 nm and less than or equal to 20 nm. Preferably, the wavelength is 1 nm to 15 nm, and more preferably 2 nm to 10 nm. By adopting this shape, the oxide 230b of the insulator 250 and conductor 260 is formed. This can improve the coverage.
[0090] It is preferable that the oxide 230 has a laminated structure of multiple oxide layers with different chemical compositions. . Specifically, in the metal oxide used for the oxide 230a, the atomic ratio of the element M to the metal element that is the main component is preferably greater than the atomic ratio of the element M to the metal element that is the main component in the metal oxide used for the oxide 230b. Also, in the metal oxide used for the oxide 230a, the atomic ratio of the element M to In is preferably greater than the atomic ratio of the element M to In in the metal oxide used for the oxide 230b. Further, in the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is preferably greater than the atomic ratio of In to the element M in the metal oxide used for the oxide 230a.
[0091] Also, the oxide 230b is preferably an oxide having crystallinity such as CAAC-OS. An oxide having crystallinity such as CAAC-OS has few impurities and defects (such as oxygen deficiencies) and has a highly crystalline and dense structure. Therefore, it is possible to suppress the extraction of oxygen from the oxide 230b by the source electrode or the drain electrode. As a result, even when heat treatment is performed, it is possible to reduce the extraction of oxygen from the oxide 230b, so the transistor 200 is stable against a high temperature (so-called thermal budget) in the manufacturing process.
[0092] Here, at the junction of the oxide 230a and the oxide 230b, the lower end of the conduction band changes smoothly. In other words, it can be said that the lower end of the conduction band at the junction of the oxide 230a and the oxide 230b changes continuously or is continuously joined. To achieve this, it is preferable to lower the density of defect levels in the mixed layer formed at the interface between the oxide 230a and the oxide 230b.
[0093] Specifically, oxide 230a and oxide 230b share a common element as their main component, in addition to oxygen. By having this, a mixed layer with a low defect level density can be formed. For example, oxide 2 If 30b is In-M-Zn oxide, then oxide 230a is In-M-Zn oxide, Even when using M-Zn oxide, oxide of element M, In-Zn oxide, indium oxide, etc. good.
[0094] Specifically, for oxide 230a, In:M:Zn = 1:3:4 [atomic ratio] or This refers to the composition in its vicinity, or In:M:Zn=1:1:0.5 [atomic ratio] or its vicinity. A metal oxide with a similar composition can be used. Also, as oxide 230b, In:M:Zn = A composition of 1:1:1 [atomic ratio] or close to it, or In:M:Zn=4:2:3 [ A metal oxide with an atomic ratio of [amount] or a composition close to it should be used. Note that "composition close to" means , including a range of ±30% of the desired atomic ratio. Also, gallium is used as element M. It is preferable.
[0095] Furthermore, when depositing metal oxides by sputtering, the above atomic ratio is used for the deposition of the film. Not limited to the atomic ratio of the metal oxides, the sputtering target used for depositing metal oxide films The atomic ratio of the set may also be acceptable.
[0096] By configuring oxide 230a and oxide 230b as described above, oxide 230a and acid The defect level density at the interface with compound 230b can be reduced. Therefore, the interface dispersion The influence of disturbances on carrier conduction is reduced, and transistor 200 has a large on current. Higher frequency characteristics can be obtained.
[0097] At least one of insulator 212, insulator 214, insulator 275, insulator 282, and insulator 283 functions preferably as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from the substrate side or from above the transistor 200 into the transistor 200. Therefore, it is preferable to use an insulating material for at least one of insulator 212, insulator 214, insulator 275, insulator 282, and insulator 283 that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms (i.e., the above impurities are difficult to permeate). Or, it is preferable to use an insulating material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (i.e., the above oxygen is difficult to permeate). Note that in this specification, a barrier insulating film refers to an insulating film having barrier properties. In this specification, barrier properties refer to a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability). Or, it refers to a function of capturing and fixing a corresponding substance (also referred to as gettering). As insulator 212, insulator 214, insulator 275, insulator 282, and insulator 283, for example, aluminum oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon oxynitride can be used. For example, it is preferable to use silicon nitride, which has higher hydrogen barrier properties, as insulator 212 and insulator 283. Also, for example, as insulator 214, insulator 275, and insulator 282, it is preferable to use an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (i.e., the above oxygen is difficult to permeate). Note that in this specification, a barrier insulating film refers to an insulating film having barrier properties. In this specification, barrier properties refer to a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability). Or, it refers to a function of capturing and fixing a corresponding substance (also referred to as gettering).
[0098] Note that in this specification, a barrier insulating film refers to an insulating film having barrier properties. In this specification, barrier properties refer to a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability). Or, it refers to a function of capturing and fixing a corresponding substance (also referred to as gettering). Note that in this specification, a barrier insulating film refers to an insulating film having barrier properties. In this specification, barrier properties refer to a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability). Or, it refers to a function of capturing and fixing a corresponding substance (also referred to as gettering).
[0099] As insulator 212, insulator 214, insulator 275, insulator 282, and insulator 283, for example, aluminum oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon oxynitride can be used. For example, it is preferable to use silicon nitride, which has higher hydrogen barrier properties, as insulator 212 and insulator 283. Also, for example, as insulator 214, insulator 275, and insulator 282, it is preferable to use an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (i.e., the above oxygen is difficult to permeate).<00As 282, it has high hydrogen capture and hydrogen fixation capabilities, and high oxygen barrier properties. It is preferable to use luminium or the like. This allows impurities such as water and hydrogen to act as an insulator. 12, and the insulator 214, suppress diffusion from the substrate side to the transistor 200 side. It can be controlled. Alternatively, impurities such as water and hydrogen are located outside the insulator 283. This can suppress diffusion from the interlayer insulating film, etc., towards the transistor 200. Alternatively, oxygen contained in insulator 224, etc., can affect insulator 212 and insulator 214. This can suppress diffusion to the substrate side via the insulator 280, etc. The oxygen being released is prevented from diffusing upwards above the transistor 200 via the insulator 282, etc. It can be controlled. In this way, transistor 200 can be controlled by impurities such as water and hydrogen, and Insulators 212, 214, 275, and insulators having the function of suppressing oxygen diffusion It is preferable to have a structure in which the component is surrounded by 282 and an insulator 283.
[0100] The composition of insulators 212, 214, 275, 282, and 283 The film can be formed, for example, using the sputtering method. The sputtering method uses a deposition gas. Since hydrogen is not required, insulators 212, 214, 275, and 282 are used. , and the hydrogen concentration of the insulator 283 can be reduced. The film deposition method is sputtering. This is not limited to the ring method, but also includes chemical vapor deposition (CVD). Deposition method, Molecular beam epitaxy (MBE) EAM Epitaxy, Pulsed Laser Deposition (PLD) Atomic Layer Deposition (ALD) method, Atomic Layer Deposition (ALD) method The sition method or other methods may be used as appropriate.
[0101] Furthermore, it is preferable to lower the resistivity of insulators 212 and 283. For example, the resistivity of insulator 212 and insulator 283 is approximately 1 × 10⁻⁶. 13 Ωcm By doing so, in the process of using plasma in the semiconductor device manufacturing process, the insulator 212, and The insulator 283 charges up the conductor 205, conductor 242, or conductor 260. This can be mitigated in some cases. The resistivity of insulators 212 and 283 is favorable. Mashiku is 1 x 10 10 Ωcm or more, 1 × 10 15 The density should be less than or equal to Ωcm.
[0102] Furthermore, insulators 216 and 280 have a lower dielectric constant than insulator 214. This is preferable. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance between wirings is reduced. For example, silicon oxide, oxide, silicon oxide can be used as insulator 216 and insulator 280. Silicon nitride, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon Silicon oxide with added carbon and nitrogen, silicon oxide with added carbon and nitrogen, porous silicon oxide You can use reconnaissance or similar methods as appropriate.
[0103] In transistors 200a and 200b, the conductor 205 is an oxide It is positioned to overlap with 230 and conductor 260. Conductor 205 is shown in Figure 1A. As shown, it should be provided extending in the A3-A4 direction. Here, the conductor 205 is the insulator 21 It is preferable to embed it in the opening formed in 6. Alternatively, it may be provided so as to be embedded in the insulator 214.
[0104] The conductor 205 comprises conductor 205a, conductor 205b, and conductor 205c. The conductor 205a is provided in contact with the bottom surface and side wall of the opening. The conductor 205b is It is provided so as to be embedded in a recess formed in the conductor 205a. Here, the conductor 20 The upper surface of 5b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. Conductor 2 05c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is the height of the upper surface of the conductor 205a and the insulator 216 It is approximately the same height as the top surface of conductor 205a and conductor 2. It will be configured to be enclosed within the 05c.
[0105] Here, conductors 205a and 205c are hydrogen atoms, hydrogen molecules, water molecules, and nitrogen atoms. Expansion of impurities such as atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. It is preferable to use a conductive material that has the function of suppressing dispersion. Alternatively, oxygen (for example, Using a conductive material that has the function of suppressing the diffusion of at least one of the following: oxygen atoms, oxygen molecules, etc. It is preferable that they be present.
[0106] Conductive material having the function of reducing hydrogen diffusion in conductor 205a and conductor 205c By using this material, impurities such as hydrogen contained in the conductor 205b are removed from the insulator 224, etc. This prevents diffusion into oxide 230. Also, conductor 205a and By using a conductive material that has the function of suppressing oxygen diffusion in the conductor 205c, This can suppress the oxidation of the conductor 205b, which reduces its conductivity. Examples of conductive materials that have a suppressive function include titanium, titanium nitride, tantalum, and nitrogen. It is preferable to use tantalum oxide, ruthenium oxide, etc. As for the conductive body 205a and the conductive material 205c, if the conductive material is made in a single layer or a multilayer That's fine. For example, titanium nitride can be used for conductors 205a and 205c.
[0107] Furthermore, the conductor 205b is a conductive material mainly composed of tungsten, copper, or aluminum. It is preferable to use a material with properties. For example, tungsten can be used for the conductor 205b. stomach.
[0108] Conductor 205 may function as a second gate electrode. In that case, conductor 20 The potential applied to 5 is changed independently of the potential applied to the conductor 260, without being linked to it. This allows us to control the threshold voltage (Vth) of transistor 200. In particular, By applying a negative potential to the conductor 205, the Vth of transistor 200 can be increased. Therefore, it becomes possible to reduce the off-current. Thus, a negative potential is applied to the conductor 205. When applied, the voltage applied to the conductor 260 is greater than when not applied. The inductive current can be reduced.
[0109] Furthermore, the electrical resistivity of the conductor 205 is set considering the potential applied to the conductor 205. The thickness of the conductor 205 is measured and set to match the electrical resistivity. Also, the insulator 21 The film thickness of 6 will be approximately the same as that of conductor 205. Here, within the limits allowed by the design of conductor 205 It is preferable to reduce the film thickness of the conductor 205 and the insulator 216. By making it thinner, the absolute amount of impurities such as hydrogen contained in the insulator 216 is reduced. This allows for the reduction of the diffusion of the impurity into the oxide 230.
[0110] Furthermore, as shown in Figure 1A, the conductor 205 is made of the conductor 242a of oxide 230 and conductor It is preferable to provide a larger area than the area that does not overlap with the electric body 242b. In particular, as shown in Figure 1C Thus, the conductor 205 intersects with the channel width direction of oxides 230a and 230b. It is preferable that the region outside the cutting edge is also stretched. In other words, oxide 2 On the outer side of the channel width direction of 30, the conductor 205 and the conductor 260 are Preferably, the first gate is superimposed via an insulator. The electric field of the conductor 260, which functions as an electrode, and the conductor 20, which functions as a second gate electrode. The electric field at 5 allows the channel-forming region of the oxide 230 to be electrically surrounded. In this specification, the electric fields of the first gate and the second gate create a channel formation region. The structure of a transistor that electrically surrounds a region is called a surrounded channel. This is called an S-channel structure.
[0111] In this specification, etc., an S-channel transistor refers to a pair of gates. The electric fields of one and the other electrodes electrically surround the channel formation region. This represents the structure of the sta. Furthermore, the S-channel structure disclosed in this specification is a Fin-type structure. It differs from conventional and planar structures. By adopting an S-channel structure, short channels A transistor that is less susceptible to the Nell effect, or in other words, a transistor that is less prone to short-channel effects. It is possible.
[0112] Furthermore, as shown in Figure 1C, the conductor 205 is extended to function as wiring. However, this is not limited to the case where a conductor that functions as wiring is placed beneath the conductor 205. It is also possible to configure it in such a way. Furthermore, the conductor 205 is not necessarily provided one per transistor. There is no need to do so. For example, you can configure it so that the conductor 205 is shared by multiple transistors. stomach.
[0113] Note that the conductor 205 includes conductor 205a, conductor 205b, and conductor 205c. The present invention describes a configuration in which the materials are stacked, but is not limited thereto. Conductor 2 05 may be configured as a single-layer, two-layer, or four-layer or more laminated structure. For example, When the conductor 205 is made into a two-layer laminated structure, the conductor 205c is omitted, and the conductor 205a is The structure should be such that the top surface and the top surface of the conductor 205b coincide.
[0114] The conductor 248, like the conductor 205, consists of a conductor 248a and inside the conductor 248a The configuration may include a conductor 248b that is positioned, and a conductor 248a. Any conductor that can be used in the electric body 205a is acceptable, and impurities such as water or hydrogen are not used. Conductors that reduce the permeation of oxygen are preferred. For example, titanium, titanium nitride, tantalum, Tantalum nitride, ruthenium, ruthenium oxide, etc. can be used. Also, conductor 2 48a can be any conductor that has good adhesion with conductor 248b. Also, conductor 248 For b, any conductor that can be used for conductor 205b is acceptable, such as tungsten. It is preferable to use a conductive material whose main component is copper or aluminum.
[0115] Note that in Figure 1A, the shape of the conductor 248 is shown as circular in a top view, but this is not limited to this. It is not possible. For example, if the conductor 248 is roughly circular in shape, such as an ellipse, when viewed from above, The shape may be a polygon such as a quadrilateral, or a polygon with rounded corners.
[0116] Furthermore, the conductor 248 is configured by stacking conductor 248a and conductor 248b. The present invention is shown, but is not limited thereto. Conductor 248 is a single layer, Alternatively, it may be configured as a laminated structure of three or more layers. For example, similar to the conductor 205c. A conductor similar to conductor 205a is placed between the upper surface of conductor 248b and oxide 230. You may do so.
[0117] Also, insulators 212, 214, 216, 222, and 22 An insulator 249 is provided in contact with the inner wall of the opening 4, and a conductor 2 is provided in contact with the side surface of the insulator 249. 48 is provided. The insulator 249 is used for the diffusion of impurities such as hydrogen and water, and oxygen. It is preferable to use an insulator that reduces noise, for example, silicon nitride, aluminum oxide, An insulator such as silicon nitride can be used. This will allow the insulator 216 to be contained in the insulator. This suppresses the incorporation of impurities such as water and hydrogen into the oxide 230 through the conductor 248. This is possible. In particular, silicon nitride is preferred because it has high barrier properties against hydrogen. This prevents the oxygen contained in the insulator 216 from being absorbed by the conductor 248. However, the above is not limited to a configuration in which the insulator 249 is not provided.
[0118] Insulators 222 and 224 function as gate insulators.
[0119] The insulator 222 suppresses the diffusion of hydrogen (for example, at least one such as a hydrogen atom or hydrogen molecule). It is preferable that it has a function to control oxygen. Also, the insulator 222 is oxygen (for example, oxygen atoms, It is preferable that the function suppresses the diffusion of at least one of the following: oxygen molecules. For example, Insulator 222 suppresses the diffusion of hydrogen and / or oxygen more effectively than insulator 224. It is preferable that it has a function.
[0120] The insulator 222 is made of either or both aluminum and hafnium, which are insulating materials. It is preferable to use an insulator containing an oxide. Suitable insulators include aluminum oxide and hafni oxide. Using oxides containing um, aluminum, and hafnium (hafnium aluminate), etc. It is preferable that such a material is used to form the insulator 222. 2 is the release of oxygen from the oxide 230 to the substrate side, and oxidation from the periphery of the transistor 200. It functions as a layer that suppresses the diffusion of impurities such as hydrogen into material 230. Therefore, insulator 222 By providing this feature, the diffusion of impurities such as hydrogen into the inside of transistor 200 is suppressed. This can suppress the formation of oxygen vacancies in the oxide 230. Also, the conductor 205 is an absolute This suppresses the reaction between the surrounding material 224 and the oxygen present in the oxide 230.
[0121] Alternatively, the above insulator may contain, for example, aluminum oxide, bismuth oxide, or germanium oxide. Niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, oxide Zirconium may be added. Alternatively, these insulators may be nitrided. Also, Insulator 222 is made of silicon oxide, silicon oxide nitride, or silicon nitride. They may be used in stacked form.
[0122] Furthermore, the insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT) (Io3), (Ba,Sr)TiO3 (BST), and other so-called high-k materials are included in the aqueous solution. The edge material may be used in a single layer or in a stacked configuration. As transistors become smaller and more integrated... Thinning the gate insulator can sometimes lead to problems such as leakage current. By using a high-k material as an insulator that functions as a body, the physical film thickness is maintained while... This makes it possible to reduce the gate potential during transistor operation.
[0123] The insulator 224 in contact with the oxide 230 contains excess oxygen (oxygen is removed by heating). Preferably, the insulator 224 may be silicon oxide, silicon oxide nitride, or the like as appropriate. It is sufficient to use it. By providing an oxygen-containing insulator in contact with the oxide 230, the oxide 23 This can reduce oxygen deficiency in transistor 200 and improve its reliability.
[0124] As for the insulator 224, specifically, an oxide material from which some oxygen is removed by heating, or alternatively, Therefore, it is preferable to use an insulating material that has an excess oxygen region. Oxygen is removed by heating. The oxides that are released are TDS (Thermal Desorption Spectroscopy). (copy) Analysis showed that the amount of oxygen molecules removed was 1.0 × 10⁻⁶. 18 molecular / cm² 3 Preferably 1.0 × 10 19molecular / cm² 3 More preferably 2.0×10 19 molecular / cm² 3 Above, or 3.0 × 10 20 molc ules / cm 3 The above describes the oxide film. Note that the surface temperature of the film during the above TDS analysis was The preferred temperature range is between 100°C and 700°C, or between 100°C and 400°C. stomach.
[0125] Furthermore, during the manufacturing process of transistor 200, the surface of oxide 230 is exposed. Therefore, heat treatment is preferable. This heat treatment is, for example, performed at a temperature of 100°C to 600°C. More preferably, the heating should be carried out at a temperature between 350°C and 550°C. Note that the heat treatment is performed using nitrogen gas. Alternatively, an inert gas atmosphere, or an oxidizing gas at 10 ppm or more, 1% or more, The procedure should be carried out in an atmosphere containing 10% or more of the substance. For example, heat treatment is preferably carried out in an oxygen atmosphere. This supplies oxygen to oxide 230, thus eliminating oxygen deficiency (V O This can help reduce ) Furthermore, the heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or After heat treatment in an active gas atmosphere, an oxidizing gas is added at 10 pJ to replenish the desorbed oxygen. The procedure may be carried out in an atmosphere containing 1% or more of the substance, or 10% or more of the substance. Alternatively, an oxidizing gas may be used. After heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more, then continuously The heat treatment may be carried out in a nitrogen gas or inert gas atmosphere.
[0126] Furthermore, by performing an oxygenation treatment on oxide 230, the oxygen deficiencies in oxide 230 are supplied. It is repaired by the oxygen that is used, in other words, "V OThis promotes the reaction "+O → null". Furthermore, the oxygen supplied reacts with the hydrogen remaining in oxide 230. This allows the hydrogen to be removed as H2O (dehydrated). This eliminates oxidation. The hydrogen remaining in substance 230 recombines with the oxygen vacancy and V O Suppresses the formation of H It is possible.
[0127] The insulators 222 and 224 may have a laminated structure of two or more layers. In that case, it is not limited to laminated structures made of the same material, but also applies to laminated structures made of different materials. Good. Also, the insulator 224 may be superimposed with the oxide 230a to form island-like structures. In total, the insulator 275 is in contact with the side surface of the insulator 224 and the top surface of the insulator 222. .
[0128] Oxides 243a, 243b, and 243c are provided on oxide 230b. Oxides 243a, 243b, and 243c are arranged in the A1-A2 direction. They are provided separated from each other, with the conductive material 260 in between.
[0129] Oxide 243 (oxide 243a, oxide 243b, and oxide 243c) is an oxygen permeable It is preferable that the electrode has a function to suppress overheating. An oxide 243 having the function of suppressing oxygen permeation is placed between the electrolytic body 242 and the oxide 230b. By arranging them this way, the electrical resistance between the conductor 242 and the oxide 230b is reduced, which is preferable. It seems so. By using this configuration, the electrical characteristics of transistor 200 and the transistor The reliability of Ta 200 can be improved. Note that between conductor 242 and oxide 230b If the electrical resistance can be sufficiently reduced, a configuration without oxide 243 may be used.
[0130] As oxide 243, a metal oxide containing element M may be used. In particular, element M is A Luminium, gallium, yttrium, or tin may be used. Oxide 243 is an oxide. It is preferable that the concentration of element M is higher than that of substance 230b. Also, as oxide 243, Gallium may be used. Alternatively, metal acids such as In-M-Zn oxide may be used as oxide 243. A compound may also be used. Specifically, in the metal oxide used in oxide 243, with respect to In The atomic ratio of element M in oxide 230b is the element relative to In in the metal oxide used in oxide 230b. It is preferable that the atomic ratio is greater than that of element M. Also, the film thickness of oxide 243 is 0.5 nm or less. Preferably, the wavelength is 5 nm or less, more preferably 1 nm to 3 nm, and even more preferably 1 nm. The wavelength is between m and 2 nm. Furthermore, it is preferable that oxide 243 is crystalline. If 43 is crystalline, the release of oxygen from the oxide 230 can be effectively suppressed. For example, if oxide 243 has a crystalline structure such as hexagonal, then the acid in oxide 230 In some cases, it may be possible to suppress the release of primary substances.
[0131] Conductor 242a is provided in contact with the upper surface of oxide 243a, and conductor 242b is oxide 2 The conductor 242c is provided in contact with the upper surface of 43b and is provided in contact with the upper surface of oxide 243c. It is preferable that conductors 242a, 242b, and 242c are A1 -Arranged in the A2 direction, each is provided spaced apart with a conductor 260 in between. 242a, conductor 242b, and conductor 242c are connected to transistor 200a, respectively. Alternatively, it functions as the source or drain electrode of transistor 200b.
[0132] Conductors 242 (conductors 242a, conductors 242b, and conductors 242c) are as follows: For example, tantalum nitrides, titanium nitrides, molybdenum nitrides, tung Nitrides containing stainless steel, nitrides containing tantalum and aluminum, titanium and aluminum It is preferable to use nitrides containing um. In one embodiment of the present invention, tantalum is Nitride compounds are particularly preferred. For example, ruthenium oxide, ruthenium nitride, strontium Oxides containing thium and ruthenium, oxides containing lanthanum and nickel, etc., may also be used. These materials are conductive materials that are resistant to oxidation, or that maintain their conductivity even when absorbing oxygen. It is preferable because it is a material that can be used.
[0133] Furthermore, the hydrogen contained in oxide 230b, etc., is also present in conductor 242a, conductor 242b, and It may diffuse into conductor 242c. In particular, conductor 242a, conductor 242b, and By using a tantalum-containing nitride in the conductor 242c, the oxide 230b and other materials are contained in The hydrogen readily diffuses into conductors 242a, 242b, and 242c. The diffused hydrogen is absorbed by the nitrogen contained in conductors 242a, 242b, and 242c. It can combine with conductor 242a. It may be absorbed by conductors 242b and 242c.
[0134] Furthermore, the configuration ensures that no curved surface is formed between the side surface of the conductor 242 and the top surface of the conductor 242. This may also be done. By making the conductor 242 in which the curved surface is not formed, as shown in Figure 1D Furthermore, the cross-sectional area of the conductor 242 in the channel width direction can be increased. This increases the conductivity of conductor 242 and increases the on-current of transistor 200. It is possible.
[0135] The insulator 275 covers the insulator 224, oxide 230, oxide 243, and conductor 242. It is provided such that an opening is formed in the region where the insulator 250 and the conductor 260 are provided. The insulator 275 is located on the top surface of the insulator 224, the side surface of the oxide 230, and the oxide 243 It is preferable that the components are provided in contact with the side surface of the conductor 242, the side surface of the conductor 242, and the upper surface of the conductor 242. Furthermore, the insulator 275 can function as a barrier insulating film that suppresses oxygen permeation. It is preferable. Also, insulator 275 is protected from impurities such as water and hydrogen from above, insulator 224, Alternatively, it is preferable that it functions as a barrier insulating film that suppresses diffusion into oxide 230. It is preferable that the insulator 275 has the function of capturing impurities such as hydrogen. Alternatively, an insulator such as aluminum oxide or silicon nitride can be used.
[0136] Within the region sandwiched between insulator 212 and insulator 283, insulator 280 and insulator 224 By providing an insulator 275 that is in contact with the material and has the function of capturing impurities such as hydrogen, Impurities such as hydrogen contained in the insulator 280 and insulator 224 are captured, and the area The amount of hydrogen inside can be kept constant. In this case, as the insulator 275, It is preferable to use aluminum oxide or the like.
[0137] The insulator 250 is provided extending in the A3-A4 direction, as shown in Figure 1A. It functions as a gate insulator for transistors 200a and 200b. In the zista 200a and transistor 200b, the insulator 250 is an oxide, It is preferable to place it in contact with the top and side surfaces of 230b. The insulator 250 is made of silica oxide Silicon oxide nitride, silicon nitride, silicon nitride, silicon oxide with added fluorine Silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, having voids Silicon oxide and silicon nitride can be used. In particular, silicon oxide and silicon nitride Con is preferable because it is stable against heat.
[0138] Insulator 250, like insulator 224, has a concentration of impurities such as water and hydrogen in it. It is preferable that the amount is reduced. The film thickness of the insulator 250 is 1 nm or more and 20 nm or less. It is preferable to do so.
[0139] Note that in Figures 1B and 1C, the insulator 250 is shown as a single layer, but a laminated structure of two or more layers is also shown. It may also be constructed as follows. When the insulator 250 has a two-layer laminated structure, the lower layer of the insulator 250 is added It is formed using an insulator that releases oxygen due to heat, and the upper layer of the insulator 250 allows for oxygen diffusion. It is preferable to form it using an insulator that has a suppressive function. This suppresses the diffusion of oxygen contained in the lower layer of the insulator 250 into the conductor 260. This is possible. In other words, it is possible to suppress the decrease in the amount of oxygen supplied to oxide 230. This makes it possible to suppress the oxidation of the conductor 260 by oxygen contained in the lower layer of the insulator 250. For example, the lower layer of the insulator 250 may be made of a material that can be used for the insulator 250 as described above. The upper layer of the insulator 250 can be provided using the same material as the insulator 222. ru.
[0140] Furthermore, when silicon oxide or silicon oxide nitride is used as the lower layer of the insulator 250, The upper layer of body 250 may be made of an insulating material, which is a high-k material with a high dielectric constant. The gate insulator is constructed with a laminated structure consisting of a lower layer of insulator 250 and an upper layer of insulator 250. A layered structure that is stable against heat and has a high dielectric constant can be created. Therefore, the gate The gate potential applied during transistor operation can be reduced while maintaining the physical thickness of the insulator. This becomes possible. Also, a thin film of equivalent oxide film thickness (EOT) of an insulator that functions as a gate insulator. This makes transformation possible.
[0141] Specifically, the upper layer of insulator 250 is made of hafnium, aluminum, gallium, and Thorium, zirconium, tungsten, titanium, tantalum, nickel, germanium, A metal oxide containing one or more metals selected from magnesium, or an acid Metal oxides that can be used as oxide 230 can be used. In particular, aluminum It is preferable to use an insulator containing oxides of um and / or hafnium. For example, hafnium oxide can be used as the upper layer of insulator 250.
[0142] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 is reduced. Dispersion is suppressed. In other words, the decrease in the amount of oxygen supplied to oxide 230 can be suppressed. Furthermore, the oxidation of the conductor 260 by oxygen in the insulator 250 can be suppressed.
[0143] Furthermore, even if the above metal oxide is configured to function as part of the first gate electrode, Good. For example, a metal oxide that can be used as oxide 230 is the same as the above metal oxide. It can be used in this way. In that case, the conductive material 260a is deposited by sputtering. Therefore, the electrical resistance of the above metal oxide can be reduced to make it a conductor. This is called OC( This can be called an Oxide Conductor electrode.
[0144] Having the above metal oxide, the influence of the electric field from the conductor 260 is not weakened. The on-current of the transistor 200 can be improved. Also, the insulator 250 and the above metal The physical thickness of the group oxide maintains the distance between the conductor 260 and the oxide 230. This makes it possible to suppress the leakage current between the conductor 260 and the oxide 230. Also, By providing a laminated structure of the insulator 250 and the metal oxide, the conductor 260 and the oxide The physical distance between object 230 and the conductor 260, and the electric field strength from the conductor 260 to the oxide 230. This can be easily adjusted as needed.
[0145] The conductor 260 is provided extending in the A3-A4 direction, as shown in Figure 1A. It functions as the first gate electrode of transistor 200a and transistor 200b. In transistor 200a and transistor 200b, the conductor 260 is conductor 26 It is preferable to have 0a and a conductor 260b placed on top of the conductor 260a. For example, the conductor 260a is arranged to enclose the bottom and sides of the conductor 260b. It is preferable that this be done. Also, as shown in Figures 1B and 1C, the upper surface of the conductor 260 , which is roughly in line with the upper surface of the insulator 250. Note that in Figures 1B and 1C, the conductor 260 Although this is shown as a two-layer structure of conductor 260a and conductor 260b, a single-layer structure is also acceptable. Furthermore, it may have a laminated structure of three or more layers.
[0146] Conductor 260a contains hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules. It is preferable to use a conductive material that has the function of suppressing the diffusion of impurities such as copper atoms. Alternatively, a device that inhibits the diffusion of oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable to use a conductive material that has conductivity.
[0147] Furthermore, because the conductor 260a has the function of suppressing oxygen diffusion, the insulator 250 The oxygen contained in the material suppresses the oxidation of the conductor 260b, which reduces its conductivity. Yes, it is possible. Examples of conductive materials that have the function of suppressing oxygen diffusion include titanium and nitride. Titanium, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. are preferred. It's nice.
[0148] Furthermore, since the conductor 260 also functions as wiring, a highly conductive material should be used. This is preferable. For example, the conductor 260b is mainly composed of tungsten, copper, or aluminum. A conductive material can be used. Furthermore, the conductor 260b may also be in a laminated structure. For example, a laminated structure of titanium or titanium nitride and the above-mentioned conductive material may be used.
[0149] Furthermore, in transistor 200, the conductor 260 is formed on an insulator 280 or the like. The conductor 260 is formed in a self-aligning manner to fill the opening. Therefore, the region between conductor 242a and conductor 242b, and conductor 242b and conductor 2 The conductor 260 can be placed in the region between 42c without requiring any alignment.
[0150] Furthermore, as shown in Figure 1C, in the channel width direction of transistor 200, insulator 2 When the bottom surface of 22 is used as a reference, the conductor 260 and the oxide 230b overlap. The height of the bottom surface of the region that does not undergo this process is preferably lower than the height of the bottom surface of oxide 230b. The conductor 260, which functions as a terminal electrode, interacts with the oxide 230b via the insulator 250. By configuring the structure to cover the sides and top surface of the flannel formation region, the electric field of the conductor 260 is controlled by the oxide 2 This makes it easier to apply the effect to the entire channel formation region of 30b. Therefore, the O The current can be increased and the frequency characteristics can be improved. The bottom surface of the insulator 222 is used as the reference. When this is done, the oxides 230a and 230b and the conductor 260 do not overlap. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in the region is 0n m or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, more preferably 5 nm The above must be 20nm or less.
[0151] The insulator 280 is provided on the insulator 275, and the insulator 250 and the conductor 260 are provided. An opening is formed in the area that is to be cut. Also, the upper surface of the insulator 280 is flattened. That's good too.
[0152] The insulator 280, which functions as an interlayer film, preferably has a low dielectric constant. By using the material as an interlayer film, parasitic capacitance occurring between wiring can be reduced. Insulator 28 It is preferable that 0 be provided using a material similar to that of the insulator 216, for example. In particular, oxide Silicon oxide and silicon nitride are preferred because they are thermally stable. In particular, silicon oxide Materials such as silicon oxidnitride and silicon oxide with voids release oxygen upon heating. This is preferable because it allows for the easy formation of a region containing [the specified element].
[0153] Insulator 280, like insulator 224, may have an excess oxygen region or excess oxygen. It is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. For example, insulator 280 contains silicon such as silicon oxide and silicon oxide nitride. Appropriate oxides may be used. An insulator containing excess oxygen is provided in contact with the oxide 230. This reduces oxygen deficiencies in the oxide 230 and improves the reliability of the transistor 200. It is possible.
[0154] The insulator 282 is located on the upper surfaces of the conductor 260 and the insulator 280, and the insulator It is positioned in contact with the top of 250. The insulator 282 allows impurities such as water and hydrogen to enter from above. Preferably, it functions as a barrier insulating film that suppresses diffusion into the insulator 280, and water It is preferable that the insulator 282 has the function of capturing impurities such as oxygen. It is preferable that it functions as a barrier insulating film that suppresses transmission. Examples of insulator 282 include For example, an insulator such as aluminum oxide can be used. Within the enclosed area, it has the function of capturing impurities such as hydrogen when in contact with the insulator 280. By providing the edge body 282, impurities such as hydrogen contained in the insulator 280 are captured, The amount of hydrogen within that region can be kept constant.
[0155] The insulator 283 suppresses the diffusion of impurities such as water and hydrogen from above into the insulator 280. It functions as a barrier insulating film. Insulator 283 is placed on top of insulator 282. The edge material 283 is silicon nitride or silicon nitride oxide, or other silicon-containing nitride It is preferable to use a material. For example, an insulator 283 that is deposited by sputtering. Silicon nitride can be used. By depositing insulator 283 using the sputtering method, density can be increased. It is possible to form a silicon nitride film with high rigidity and resistance to the formation of porosity, etc. Also, an insulator As 283, on top of silicon nitride film deposited by sputtering, further by CVD The deposited silicon nitride films may be stacked.
[0156] <Component materials for semiconductor devices> The following describes the constituent materials that can be used in semiconductor devices.
[0157] <<Substrate>> Examples of substrates for forming the transistor 200 include an insulating substrate, a semiconductor substrate, and A conductive substrate can be used. Examples of insulating substrates include glass substrates, quartz substrates, and Fire substrate, stabilized zirconia substrate (such as yttria-stabilized zirconia substrate), resin substrate There are plates and the like. Also, semiconductor substrates are made of materials such as silicon and germanium. Semiconductor substrates, or silicon carbide, silicon germanium, gallium arsenide, phosphate Examples include compound semiconductor substrates composed of zinc, zinc oxide, and gallium oxide. Furthermore, as mentioned above... A semiconductor substrate having an insulating region inside the semiconductor substrate, for example, SOI (Silicon Examples include on-insulator substrates. Conductive substrates include graphite substrates and metal substrates. These include alloy substrates, conductive resin substrates, etc. Alternatively, substrates containing metal nitrides, metal acids There are substrates containing monoxides, etc. Furthermore, there are substrates on which a conductor or semiconductor is provided on an insulating substrate. A substrate, a semiconductor substrate provided with a conductor or insulator, a conductive substrate provided with a semiconductor or insulator There are substrates with edges provided. Alternatively, substrates on which elements are provided can be used. This may also be done. The elements provided on the substrate may include capacitive elements, resistive elements, switching elements, and light-emitting elements. These include children, memory elements, etc.
[0158] <<Insulator>> Insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, and metal oxides. Examples include metal oxides, metal nitrides, and metal nitride oxides.
[0159] For example, as transistors become smaller and more integrated, the gate insulator can be made thinner. This can lead to problems such as leakage current. By using high-k materials, the physical film thickness is maintained while lowering the voltage during transistor operation. This becomes possible. On the other hand, for the insulator that functions as an interlayer film, a material with a low dielectric constant is used. This reduces parasitic capacitance between wires. Therefore, it is possible to reduce the parasitic capacitance that occurs between wires. Then, you should select the materials.
[0160] Furthermore, insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. Oxides containing aluminum, aluminum, and hafnium, aluminum and hafnium Oxidized nitrides, silicon and hafnium oxides, silicon and hafnium Examples include oxide nitrides containing um, or nitrides containing silicon and hafnium.
[0161] Furthermore, examples of insulators with low dielectric constant include silicon oxide, silicon oxide nitride, and silicon nitride oxide. Silicon oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, Silicon oxide with added carbon and nitrogen, porous silicon oxide, or resins, etc. be.
[0162] Furthermore, transistors using metal oxides suppress the permeation of impurities such as hydrogen and oxygen. By surrounding it with an insulator that has the function of stabilizing the electrical characteristics of the transistor. This is possible. As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, Phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum An insulator containing fluorine, neodymium, hafnium, or tantalum is used in a single layer or in a multilayer structure. That's all that's needed. Specifically, an insulating material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. As a body, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, acid Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, acid Metal oxides such as tantalum oxide, aluminum nitride, silicon nitride, silicon nitride, etc. Metal nitrides can be used.
[0163] Furthermore, the insulator that functions as a gate insulator has regions containing oxygen that is released by heating. It is preferable that the insulator has a region containing oxygen that is desorbed by heating. By creating a structure in which silicon oxide or silicon oxide nitride is in contact with oxide 230, This can compensate for the oxygen deficiency present in 230.
[0164] <<Conductive material>> Examples of conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and crystalline silver. Tun, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Zium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metallic element selected from um, lanthanum, etc., or an alloy containing the aforementioned metallic elements. It is preferable to use an alloy or the like that which combines the above-mentioned metal elements. For example, tantalum nitride Titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use oxides containing lanthanum and nickel. Tantalum, titanium nitride, titanium and aluminum nitrides, tantalum and aluminum Includes nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium oxides Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation, or that absorb oxygen. It is preferable because it is a material that maintains conductivity even when subjected to certain conditions. Furthermore, it does not contain impurity elements such as phosphorus. Highly electrically conductive semiconductors such as polycrystalline silicon and nickel silicides. Silicide may also be used.
[0165] Furthermore, multiple conductive layers formed from the above materials may be stacked and used. For example, as described above. A laminated structure may be formed by combining a material containing a metallic element with a conductive material containing oxygen. Furthermore, a laminate combining the aforementioned metal element-containing material and a nitrogen-containing conductive material is also used. It may also be used as a structure. Furthermore, a material containing the aforementioned metal element, a conductive material containing oxygen, and nitrogen A laminated structure combining conductive materials containing elements may also be used.
[0166] Furthermore, when an oxide is used in the channel formation region of a transistor, the gate electrode and A conductor that functions as such includes a material containing the aforementioned metal element and a conductive material containing oxygen. It is preferable to use a combined laminated structure. In this case, an oxygen-containing conductive material is used. It is preferable to place it on the channel formation region side. A conductive material containing oxygen should be placed on the channel formation region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel-forming region.
[0167] In particular, as a conductor that functions as a gate electrode, it is included in the metal oxide in which the channel is formed. It is preferable to use a conductive material containing metallic elements and oxygen. Conductive materials containing group elements and nitrogen may be used. For example, titanium nitride or titanium nitride. Conductive materials containing nitrogen, such as tin oxide, may also be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, acid Indium oxide containing titanium dioxide, indium tin oxide containing titanium dioxide, indium nitrile Lead oxide and silicon-added indium tin oxide may also be used. Zinc oxide may also be used. By using such a material, channels can be formed. In some cases, hydrogen contained in the metal oxide that is formed can be captured. Or, outside In some cases, it is possible to capture hydrogen that has entered from insulators or other materials.
[0168] <<Metal Oxides>> As oxide 230, a metal oxide (oxide semiconductor) that functions as a semiconductor is used. This is preferable. Below, metal oxides applicable to the oxide 230 according to the present invention will be described. do.
[0169] The metal oxide preferably contains at least indium or zinc. In particular, indium Preferably, it contains aluminum and zinc. In addition, aluminum and gallium It is preferable that it contains yttrium, tin, etc. Also, boron, titanium, iron, nitrile Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Ha One of the following materials is selected from tungsten, tantalum, magnesium, cobalt, etc. It may include multiple species.
[0170] Here, the metal oxide is In-M-Zn oxide, which has indium, element M, and zinc. Let's consider the case where it is a substance. Note that element M is aluminum, gallium, yttrium, and One or more elements selected from among tin. Other elements applicable to element M include: Boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt These are some examples. However, in some cases, it is acceptable to combine multiple of the aforementioned elements as element M. ru.
[0171] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). They are sometimes collectively referred to as metal oxynitrides (metal oxides). Also, metal oxides containing nitrogen are sometimes called metal oxynitrides (metal oxides). It may also be called tal oxynitride.
[0172] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 3A. Figure 3A shows an oxide semiconductor, typically IGZO (containing metal acids such as In, Ga, and Zn). This is a diagram illustrating the classification of the crystal structures of ionized compounds.
[0173] As shown in Figure 3A, oxide semiconductors can be broadly classified into "Amorphous" It is divided into "Crystalline (crystalline)" and "Crystal (crystal)". They are classified as such. Also, among "Amorphous," there are completely amorp It includes hous. Also, within "Crystalline" there is CAAC(c-ax is-aligned crystalline), nc(nanocrystalli ne), and CAC (cloud-aligned composite) are included. excluding single crystal and poly crystal l). Note that the classification of "Crystalline" includes single crystal, Polycrystalline and completely amorphous materials are excluded. Furthermore, within "Crystal," there are single crystals and poly crystals. It contains crystal.
[0174] The structures within the thick frame shown in Figure 3A are "Amorphous" and "Cry It is an intermediate state between "stal (crystal)" and a new boundary region (New crystal This structure belongs to the line phase. In other words, this structure is energetically in It is completely different from the stable "Amorphous" or "Crystal" forms. This can be rephrased as a structure.
[0175] The crystal structure of the film or substrate can be determined by X-ray diffraction (XRD). It can be evaluated using the ion spectrum. Here, "Crystalline GIXD (Grazing-Incidence) of CAAC-IGZO film, which is classified as " The XRD spectrum obtained by the XRD measurement is shown in Figure 3B. Note that the GIXD method is used for thin films. This method is also called the Seemann-Bohlin method. Hereafter, the GIXD measurement shown in Figure 3B will be used. The resulting XRD spectrum will simply be referred to as the XRD spectrum. Note that the CAA shown in Figure 3B The composition of the C-IGZO film is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 3B is 500 nm.
[0176] As shown in Figure 3B, the XRD spectrum of the CAAC-IGZO film clearly shows crystallinity. The peak shown is detected. Specifically, in the XRD spectrum of the CAAC-IGZO film, A peak indicating c-axis orientation is detected near 2θ = 31°. Furthermore, as shown in Figure 3B, The peaks near 2θ = 31° are asymmetrical with respect to the angle at which the peak intensity was detected.
[0177] Furthermore, the crystal structure of the film or substrate is determined by nano-beam diffraction (NBED). Diffraction patterns observed by electron diffraction (extremely small) It can be evaluated by (also called electron diffraction pattern). The folding pattern is shown in Figure 3C. Figure 3C shows an NBED with an electron beam incident parallel to the substrate. This is the diffraction pattern observed by the CAAC-IGZO film shown in Figure 3C. The composition is approximately In:Ga:Zn=4:2:3 [atomic ratio]. Furthermore, micro-electron diffraction... Next, electron diffraction is performed with a probe diameter of 1 nm.
[0178] As shown in Figure 3C, the diffraction pattern of the CAAC-IGZO film shows multiple c-axis orientations. Spots of this nature can be observed.
[0179] <<Oxide semiconductor structure>> Note that oxide semiconductors may be classified differently from those shown in Figure 3A when considering their crystal structure. Yes, there are. For example, oxide semiconductors include single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It can be divided into two parts. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS. And there is nc-OS. In addition, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors and pseudo-non-crystalline oxide semiconductors. crystalline oxide semiconductor (a-like OS: amorphous-like oxide) This includes semiconductors, amorphous oxide semiconductors, and so on.
[0180] Here, we will provide details on the CAAC-OS, nc-OS, and a-like OS mentioned above. Then, I will give an explanation.
[0181] [CAAC-OS] CAAC-OS has multiple crystalline regions, and the c-axis of these crystalline regions is oriented in a specific direction. It is an oriented oxide semiconductor. The specific direction refers to the thickness direction of the CAAC-OS film. , in the direction normal to the surface on which the CAAC-OS film is formed, or in the direction normal to the surface of the CAAC-OS film Yes, there is. Furthermore, a crystalline region is a region in which the atomic arrangement has periodicity. Note that the atomic arrangement is categorized If considered as a child arrangement, a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC- OS has a region in which multiple crystal regions are connected in the ab-plane direction, and this region is strained It may have strain. Note that strain refers to the lattice arrangement in a region where multiple crystal regions are connected. The orientation of the grid arrangement changes between a region with aligned grids and another region with aligned grids. This refers to the location. In other words, CAAC-OS is c-axis oriented and has a clear orientation in the ab-plane direction. It is an oxide semiconductor that does not exist.
[0182] Each of the above multiple crystalline regions is composed of one or more minute crystals (with a maximum diameter of 10 It is composed of crystals smaller than nm. Furthermore, the maximum diameter of the crystalline region is less than 10 nm. If this occurs, the size of the crystalline region may be around several tens of nanometers.
[0183] Also, In-M-Zn oxide (element M is aluminum, gallium, yttrium, sulfite) In one or more types selected from materials such as titanium, CAAC-OS is an indicator. A layer containing um (In) and oxygen (hereinafter referred to as the In layer), and an element M, zinc (Zn), and acid A layered crystalline structure (also called a layered structure) is formed by stacking layers containing an element (hereinafter referred to as (M,Zn) layer). It tends to have (u). Furthermore, indium and element M are mutually substitutable. Therefore The (M,Zn) layer may contain indium. Also, the In layer contains element M. This may occur. Furthermore, the In layer may also contain Zn. This layered structure is, for example, In high-resolution TEM images, it is observed as a grid pattern.
[0184] For example, when structural analysis of a CAAC-OS film is performed using an XRD device, the θ / 2θ scale is obtained. Out-of-plane XRD measurements using the CANR showed two peaks indicating c-axis orientation. It is detected at θ=31° or nearby. Note that the position of the peak indicating c-axis orientation (value of 2θ) ) may vary depending on the type and composition of the metal elements that make up CAAC-OS.
[0185] Furthermore, for example, in the electron diffraction pattern of a CAAC-OS film, multiple bright spots (spots) (T) is observed. Note that one spot and another spot are separated by the incident electron beam that has passed through the sample. With the spot (also called the direct spot) as the center of symmetry, observations are made at point-symmetric positions. It can be done.
[0186] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is a hexagonal lattice. While this is the basic principle, the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. Also, The above distortion may have a grid arrangement such as a pentagon or heptagon. -In OS, clear grain boundaries were confirmed even near the strain. This is not possible. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This indicates that CAAC-OS has a dense arrangement of oxygen atoms in the ab-plane direction. This is because, for example, the substitution of metal atoms changes the bond distance between atoms. This is thought to be because it allows for distortion to be tolerated.
[0187] Furthermore, a crystal structure in which clear grain boundaries can be observed is known as a polycrystalline structure. It is called al). The grain boundaries become recombination centers, where carriers are trapped, and transistors are formed. This is likely to cause a decrease in on-current and a decrease in field-effect mobility. Therefore, CAAC-OS, which does not exhibit visible grain boundaries, has a crystal structure suitable for the semiconductor layer of transistors. It is one of the crystalline oxides that possesses [a certain characteristic]. Note that CAAC-OS requires Zn to be present. A configuration such as the above is preferred. For example, In-Zn oxide and In-Ga-Zn oxide are In It is preferable because it can suppress the generation of grain boundaries more effectively than oxides.
[0188] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less prone to a decrease in electron mobility caused by grain boundaries. Furthermore, the crystallinity of oxide semiconductors can decrease due to impurities and the formation of defects. Because of this, CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies) It can also be said that oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. C-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors expands the degree of freedom in the manufacturing process. It becomes possible to increase the risk.
[0189] [nc-OS] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. In other words, nc-OS is micro It has small crystals. The size of these minute crystals is, for example, between 1 nm and 10 nm. In particular, because they are between 1 nm and 3 nm in size, these minute crystals are also called nanocrystals. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, the entire film... No orientation is observed. Therefore, nc-OS is a-like depending on the analytical method. It can sometimes be indistinguishable from OS or amorphous oxide semiconductors. For example, compared to nc-OS films When performing structural analysis using an XRD device, out-of-pl using θ / 2θ scans is obtained. In ane XRD measurements, no peak indicating crystallinity was detected. Furthermore, for nc-OS films... Furthermore, electron beam blasts using electron beams with probe diameters larger than those of nanocrystals (e.g., 50 nm or more) When diffraction (also called limited-field electron diffraction) is performed, a diffraction pattern similar to a halo pattern is obtained. Observed. On the other hand, compared to the nc-OS film, the size is close to or smaller than that of nanocrystals. Electron diffraction (nanobeam) using electron beams with probe diameters (e.g., 1 nm to 30 nm). Also called electron diffraction, when this is performed, a ring-shaped region centered on the direct spot appears. In some cases, electron diffraction patterns with multiple spots observed may be obtained.
[0190] [a-like OS] a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor. an a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, it has a-like properties. OS has a higher hydrogen concentration in the membrane compared to nc-OS and CAAC-OS.
[0191] <<Oxide Semiconductor Composition>> Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS is a material composition. Regarding achievement.
[0192] [CAC-OS] CAC-OS refers to, for example, metal oxides in which the elements constituting the metal oxide are between 0.5 nm and 10 nm. Below, preferably, a structure of material that is unevenly distributed with a size of 1 nm to 3 nm or near that size. It is formed. Furthermore, in the following, in metal oxides, one or more metal elements are unevenly distributed. The region containing the metal element is 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A mixture of particles smaller than or near a m in size is also called a mosaic or patchy appearance. .
[0193] Furthermore, CAC-OS is a material that separates into a first region and a second region. This results in a zigzag-like structure, where the first region is distributed within the film (hereinafter also referred to as a cloud-like structure). ) In other words, CAC-OS is a mixture of the first region and the second region. It is a composite metal oxide having the following composition.
[0194] Here, I for the metal elements constituting CAC-OS in In-Ga-Zn oxide The atomic ratios of n, Ga, and Zn are given as [In], [Ga], and [Zn] respectively. To be expressed. For example, in CAC-OS in In-Ga-Zn oxide, the first region This is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. That is. Or, for example, in the first region, [In] is greater than [In] in the second region. It is also a region where the [Ga] is large, and the [Ga] is smaller than the [Ga] in the second region. Furthermore, in the second region, [Ga] is greater than [Ga] in the first region, and [I n] is a region where n is smaller than [In] in the first region.
[0195] Specifically, the first region mentioned above mainly consists of indium oxide, indium zinc oxide, etc. This is a region of minutes. Furthermore, the second region mentioned above is gallium oxide, gallium zinc oxide, etc. This is the region in which In is the main component. In other words, the first region described above can be said to be the region in which In is the main component. It can be replaced. Furthermore, the second region described above can be rephrased as the region with Ga as the main component. It is possible.
[0196] Note that a clear boundary may not be observed between the first region and the second region described above. .
[0197] For example, in CAC-OS in In-Ga-Zn oxide, the energy-dispersive X-ray segment Optical method (EDX:Energy Dispersive X-ray spectrosc) EDX mapping obtained using opy revealed the region with In as its main component (the first region) It has a structure in which a region (the second region) and a region mainly composed of Ga are unevenly distributed and mixed. This can be confirmed.
[0198] When CAC-OS is used in a transistor, the conductivity is due to the first region and the second region The insulating properties due to the region work complementarily to enable the switching function (On The function to turn off CAC-OS can be added to it. In other words, CAC-OS and The material has both conductive and insulating properties in parts, and the entire material Then it has the function of a semiconductor. By separating the conductive function and the insulating function, This allows for the maximum enhancement of both functions. Therefore, CAC-OS is used in transistors. This results in a high on-current (I on ), high field-effect mobility (μ), and good switching This enables smooth operation.
[0199] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and C It may have two or more of the following: AC-OS, nc-OS, and CAAC-OS.
[0200] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.
[0201] By using the above oxide semiconductor in a transistor, a transistor with high field-effect mobility is obtained. This can be achieved. Furthermore, highly reliable transistors can be realized.
[0202] A low-carrier-concentration oxide semiconductor is used in the channel formation region of the transistor. This is preferable. For example, the carrier concentration in the channel formation region of the oxide semiconductor is 1 × 10⁻⁶. 18 cm -3 The following is preferable: 1 × 10 17 cm -3 It is preferable to be less than , 1 x 10 16 cm -3 It is even more preferable that it be less than 1 × 10 13 cm -3 less than It is even more preferable that it be 1 × 10 12 cm -3 It is even more preferable that it be less than [a certain value]. Furthermore, when the carrier concentration of the oxide semiconductor film is reduced, the ions in the oxide semiconductor film The solution is to lower the concentration of pure substances and reduce the defect level density. In this specification, the impurity concentration is A low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic. Oxide semiconductors with low nitrile concentration are called high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors. There are cases where this happens.
[0203] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic have a low defect level density. Therefore, the trap level density may also be low.
[0204] Furthermore, the time required for charges trapped in the trap levels of an oxide semiconductor to disappear is... It can behave for a long time, almost like a fixed charge. Therefore, the trap level density is high. Transistors in which a channel formation region is formed in an oxide semiconductor have unstable electrical properties. There are cases where this occurs.
[0205] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is Reducing it is effective. Furthermore, in order to reduce the impurity concentration in oxide semiconductors, It is also preferable to reduce the concentration of impurities in the adjacent membrane. Examples of impurities include hydrogen, nitrogen, and Examples include potassium metals, alkaline earth metals, iron, nickel, and silicon.
[0206] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.
[0207] In oxide semiconductors, if silicon or carbon, which are among the Group 14 elements, are present, oxidation occurs. Defect levels are formed in material semiconductors. Therefore, in the channel formation region of oxide semiconductors... The concentration of silicon and carbon in the oxide semiconductor and the silicon near the interface with the channel formation region The concentration of ions and carbon (Secondary Ion Mass Spectrometry (SIMS)) The concentration obtained by ss Spectrometry is 2 × 10 18 atom / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:
[0208] Furthermore, if alkali metals or alkaline earth metals are present in the oxide semiconductor, defect levels are formed. This can result in the generation of carriers. Therefore, alkali metals or alkaline earth metals may be present. Transistors using oxide semiconductors tend to exhibit normally-on characteristics. Therefore, alkali metals or a in the channel formation region of oxide semiconductors obtained by SIMS The concentration of rutile earth metals is 1 × 10⁻⁶ 18 atoms / cm 3 The following is preferably 2 × 10 1 6 atoms / cm 3 Do the following:
[0209] Furthermore, in oxide semiconductors, when nitrogen is present, electrons, which are carriers, are generated. As the nitrogen concentration increases, it becomes easier to convert to n-type semiconductors. As a result, oxide semiconductors containing nitrogen become semiconductors. The transistor used tends to exhibit normally-on characteristics. Alternatively, oxide semiconductors Furthermore, when nitrogen is present, trap levels may be formed. As a result, transistor The electrical properties of the oxide semiconductor obtained by SIMS may become unstable. The nitrogen concentration in the channel formation region is 5 × 10 19 atoms / cm 3 Less than, preferably 5 x 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:
[0210] Furthermore, the hydrogen contained in oxide semiconductors reacts with the oxygen bonded to the metal atoms to form water. Therefore, an oxygen deficiency may form. When hydrogen enters this oxygen deficiency, the carrier electrons In some cases, a child may be produced. Also, some of the hydrogen combines with the metal atom and oxygen, resulting in a crystal. It can generate electrons that act as carriers. Therefore, an oxide semiconductor containing hydrogen is used. Transistors that have been modified tend to exhibit normally-on characteristics. For this reason, the channels of oxide semiconductors It is preferable that the amount of hydrogen in the hydrogen-forming region be reduced as much as possible. Specifically, In the channel formation region of an oxide semiconductor, the hydrogen concentration obtained by SIMS is 1 × 1 0 20 atoms / cm 3 Less than 5 × 10 19 atoms / cm 3 Less than, Preferably 1 × 10 19 atoms / cm 3 Less than 5 × 10 18 ato ms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.
[0211] Using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor. This allows for the provision of stable electrical characteristics.
[0212] <<Other Semiconductor Materials>> The semiconductor materials that can be used for oxide 230 are not limited to the metal oxides mentioned above. As monster 230, semiconductor materials with a band gap (not zero-gap semiconductors) Conductive materials may be used. For example, semiconductors of elemental silicon, gallium arsenide, etc. Which compound semiconductors, layered materials that function as semiconductors (also known as atomic layer materials, two-dimensional materials, etc.) It is preferable to use materials such as (u) as semiconductor materials. In particular, layered materials that function as semiconductors It is preferable to use this as a semiconductor material.
[0213] Here, in this specification, etc., "layered material" is a general term for a group of materials having a layered crystalline structure. Yes, it exists. Layered crystal structures are formed by layers created by covalent or ionic bonds, such as van der Wa. It is a structure in which layers are attached via weaker bonds than covalent or ionic bonds, such as the Ruhls force. Layered materials have high electrical conductivity within a single layer, meaning they have high two-dimensional electrical conductivity. A material that functions as a semiconductor and has high two-dimensional electrical conductivity is used in the channel formation region. This makes it possible to provide transistors with a large on-current.
[0214] Examples of layered materials include graphene, silicene, and chalcogenides. It is a compound containing chalcogens. Furthermore, chalcogens are a general term for elements belonging to Group 16. It contains oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides. .
[0215] For example, a transition metal chalcogenide that functions as a semiconductor can be used as oxide 230. Preferably, a transition metal chalcogenide applicable as oxide 230 is specified. These include molybdenum sulfide (typically MoS2) and molybdenum selenide (typically MoS2) e2), molybdenum tellurium (typically MoTe2), tungsten sulfide (typically W S2), tungsten selenide (typically WSe2), tungsten tellurium (typically (WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically (HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (alternative) Examples include ZrSe2).
[0216] <Method for fabricating semiconductor devices> Next, Figure 4 shows a method for manufacturing a semiconductor device, which is one embodiment of the present invention, as shown in Figures 1A to 1D. Figures A to 12A, 4B to 12B, 4C to 12C, and 4D to 12D We will explain using this method.
[0217] Figures 4A to 12A each show a top view. Also, Figures 4B to 12B each show This is a cross-sectional view corresponding to the area indicated by the dashed line A1-A2 in Figures 4A to 12A. This is also a cross-sectional view of transistors 200a and 200b in the channel length direction. Furthermore, Figures 4C to 12C are each represented by the dashed line A3-A4 in Figures 4A to 12A. This is a cross-sectional view corresponding to the area indicated, and is a cross-sectional view of transistor 200a in the channel width direction. Also, Figures 4D to 12D are each one of A5-A6 in Figures 4A to 12A. This is a cross-sectional view of the area indicated by the dashed line. Note that in the top views of Figures 4A to 12A, Some elements have been omitted for clarity in the diagram.
[0218] In the following, insulating materials for forming an insulator and conductive materials for forming a conductor are used. Materials, or semiconductor materials for forming semiconductors, are produced by sputtering, CVD, MBE, etc. The film can be deposited using appropriate methods such as the PLD method and ALD method.
[0219] Furthermore, the sputtering method uses a high-frequency power supply for sputtering, which is called RF sputtering. Ring method, DC sputtering method using a DC power supply, and pulsed application of electricity to the electrodes There is a pulsed DC sputtering method that changes the pressure. RF sputtering is mainly used for insulating films. It is used when depositing thin films, and DC sputtering is mainly used when depositing metallic conductive films. It can be used. Also, pulsed DC sputtering is mainly used for oxides, nitrides, carbides, etc. It is used when depositing compounds into films using the reactive sputtering method.
[0220] Furthermore, the CVD method is a type of plasma CVD (PECVD) that utilizes plasma. Enhanced CVD (Enhanced CVD), Thermal CVD (TCVD: Thermal CCVD) which utilizes heat. It can be classified into methods such as the VD method and the photoCVD method which utilizes light. Depending on the source gas used, the process can be metal CVD (MCVD) or organometallic CVD. It can be divided into (MOCVD: Metal Organic CVD) methods.
[0221] Plasma CVD can produce high-quality films at relatively low temperatures. Thermal CVD, on the other hand, is a method that can produce high-quality films at low temperatures. A film deposition method that does not use Zuma, thus minimizing plasma damage to the workpiece. For example, wiring, electrodes, and elements (transistors, capacitive elements, etc.) included in semiconductor devices. ) and others can be charged up by receiving an electric charge from the plasma. In cases where the accumulated charge destroys the wiring, electrodes, and elements contained in the semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. Therefore, the yield of semiconductor devices can be increased. Also, in the thermal CVD method, Because plasma damage does not occur within the film, a film with fewer defects can be obtained.
[0222] Furthermore, in the ALD method, the reaction between the precursor and reactant is carried out using only thermal energy. Thermal ALD (Thermal Altode Discharge) method, using plasma-excited reactants. Methods such as EALD (Plasma Enhanced Alopecia) can be used.
[0223] Furthermore, the ALD method utilizes the self-regulating properties of atoms to deposit atoms layer by layer. This allows for the deposition of extremely thin films, enabling film deposition on structures with high aspect ratios, and pinholes. It enables film formation with fewer defects such as blemishes, enables film formation with excellent coverage, and enables film formation at low temperatures. What are the effects? In the PEALD method, by using plasma, film deposition at lower temperatures is possible. This can be beneficial in some cases. Furthermore, the precursor used in the ALD method contains impurities such as carbon. Some contain [this]. Therefore, films formed by the ALD method are different from films formed by other film formation methods. Compared to a standard film, it may contain more impurities such as carbon. Note that the quantitative determination of impurities is done using X. X-ray Photoelectron Spectros (XPS) This can be done using `copy`.
[0224] CVD and ALD are film deposition methods in which particles emitted from a target or other source are deposited. Unlike other methods, this is a film-forming method in which a film is formed by a reaction on the surface of the object being treated. This film-forming method is less affected by the shape of the workpiece and has good step-level coverage. Furthermore, the ALD method has excellent step coverage and excellent thickness uniformity, thus aspect ratio This method is suitable for coating the surface of high-aperture openings, etc. However, the ALD method is relatively suitable for film formation. Because of its slow rate, it should be used in combination with other film deposition methods that have a faster deposition rate, such as CVD. In some cases, this may be preferable.
[0225] The CVD and ALD methods control the composition of the resulting film by adjusting the flow rate ratio of the source gases. This is possible. For example, in the CVD method and ALD method, the flow rate ratio of the raw material gas can be adjusted as needed. A film with the following composition can be formed. Furthermore, for example, in the CVD method and ALD method, film formation can be performed. By changing the flow rate ratio of the raw material gas while simultaneously depositing a film with a continuously changing composition. This is possible. When forming a film while changing the flow rate ratio of the raw material gas, multiple deposition chambers can be used. Compared to the method of film deposition using a conveyor belt, it eliminates the time required for transport and pressure adjustment, thus reducing the time required for film deposition. The interval can be shortened. Therefore, the productivity of semiconductor devices can be increased. There is.
[0226] First, a substrate (not shown) is prepared, and an insulator 212 is deposited on the substrate (Figure 4A). (See Figure 4D.) The insulator 212 is preferably deposited using the sputtering method. It is possible to use a sputtering method that does not require the use of hydrogen as the film-forming gas, insulator 21 The hydrogen concentration in 2 can be reduced. However, the deposition of the insulator 212 is done by sputtering. This method is not limited to the GRAV method; CVD, MBE, PLD, ALD, etc., may be used as appropriate. That's fine.
[0227] In this embodiment, the insulator 212 is used as the silicon target in an atmosphere containing nitrogen gas. Using this method, silicon nitride is deposited by pulsed DC sputtering. By using the ring method, particle generation due to arcing on the target surface is suppressed. This allows for a more uniform film thickness distribution. Furthermore, by using a pulsed voltage... By doing so, the rise and fall times of the discharge can be made steeper than with high-frequency voltage. This allows for more efficient power supply to the electrodes, improving the sputtering rate and film quality. It is possible.
[0228] By using an insulator that is resistant to the permeability of impurities such as water and hydrogen, such as silicon nitride, This can suppress the diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212. Furthermore, as the insulator 212, an insulator that is impermeable to copper, such as silicon nitride, may be used. Therefore, a diffusive metal such as copper is used in the conductor layer below the insulator 212 (not shown). Even if present, it is possible to suppress the upward diffusion of the metal through the insulator 212.
[0229] Next, an insulator 214 is deposited on the insulator 212 (see Figures 4A to 4D). The deposition of film 214 is preferably carried out using the sputtering method. Hydrogen is used as the deposition gas. By using the sputtering method, which is not strictly necessary, the hydrogen concentration in the insulator 214 can be reduced. This is possible. However, the deposition of the insulator 214 is not limited to the sputtering method. CVD, MBE, PLD, ALD, etc. may be used as appropriate.
[0230] In this embodiment, the insulator 214 is an aluminum target in an atmosphere containing oxygen gas. Using a tweezers, aluminum oxide is deposited using the pulsed DC sputtering method. By using the sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film It is possible to improve quality.
[0231] As the insulator 214, aluminum oxide has high functionality in capturing and fixing hydrogen. By using this method, hydrogen contained in the insulator 216, etc., is captured or fixed, and the hydrogen is oxidized. This prevents it from spreading to object 230.
[0232] Next, an insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. It is preferable to use a sputtering method. Sputtering does not require the use of hydrogen as the film deposition gas. By using this method, the hydrogen concentration in the insulator 216 can be reduced. However, the insulator The deposition of 216 is not limited to sputtering, but also includes CVD, MBE, and PL. Methods such as Method D and Method ALD may be used as appropriate.
[0233] In this embodiment, the insulator 216 is used as the silicon target in an atmosphere containing oxygen gas. Using this method, silicon oxide is deposited by pulsed DC sputtering. By using the ring method, the film thickness distribution can be made more uniform, improving the sputtering rate and film quality. It is possible.
[0234] Insulators 212, 214, and 216 are continuously used without exposure to the atmosphere. It is preferable to deposit the film in this manner. For example, a multi-chamber type film deposition apparatus may be used. This reduces the amount of hydrogen in the film of insulators 212, 214, and 216. This process allows for the formation of a film, and furthermore, reduces the incorporation of hydrogen into the film between each film formation step. .
[0235] Next, two openings are made in the insulator 216 that reach the insulator 214, extending in the A3-A4 direction. To form. Note that openings include, for example, grooves and slits. Also, when an opening is formed... The area that has been etched may be referred to as an opening. The opening can be formed using wet etching. However, dry etching is preferable for microfabrication. Also, the insulator 214 is It functions as an etching stopper film when etching the insulator 216 to form grooves. It is preferable to select an insulator. For example, silicon oxide is used for the insulator 216 that forms the groove. Alternatively, if silicon oxide nitride is used, the insulator 214 is silicon nitride, aluminum oxide. Hafnium oxide is a good choice.
[0236] As a dry etching apparatus, a capacitively coupled plasma (CCP) system with parallel plate electrodes is used. (Capacitively Coupled Plasma) Etching apparatus is used. Capacitively coupled plasma etching apparatus having parallel plate electrodes can be used. Alternatively, a high-frequency voltage may be applied to one electrode of the type electrode. Or, one of the parallel plate type electrodes. Alternatively, a configuration in which multiple different high-frequency voltages are applied to the electrodes may be used. Or a parallel plate type electrode Alternatively, a configuration in which the same high-frequency voltage is applied to each of them is also possible. Alternatively, a configuration in which high-frequency voltages of different frequencies are applied may be used. Or, a high-density plasma source may be used. A dry etching apparatus can be used. Dry etching with a high-density plasma source. The device is, for example, an inductively coupled plasma (ICP) device. Etching equipment such as an ed Plasma etching device can be used.
[0237] After the opening is formed, a conductive film is deposited to form the conductive material 205a. The film preferably contains a conductor that has the function of suppressing oxygen permeation. For example, nitride Tal, tungsten nitride, titanium nitride, etc. can be used. Alternatively, oxygen permeability Conductors that have a function to suppress [something], and tantalum, tungsten, titanium, molybdenum, aluminum It can be a multilayer film of aluminum, copper, and molybdenum tungsten alloy. Conductor 20 The conductive film (5a) is deposited using sputtering, CVD, MBE, PLD, or ALD. This can be done using laws and other means.
[0238] In this embodiment, titanium nitride is deposited as a conductive film that will become the conductor 205a. By using metal nitride as the lower layer of the conductor 205b, the insulator 216 and the like This can suppress the oxidation of the conductor 205b. Also, as the conductor 205b Even when using easily diffusive metals such as copper, the diffusion of the metal from the conductor 205a to the outside is not possible. It can be prevented.
[0239] Next, a conductive film that will become the conductor 205b is formed. The conductive film that will become the conductor 205b is Tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten Stainless steel alloys and the like can be used. The conductive film can be formed by plating or sputtering. This can be done using methods such as CVD, MBE, PLD, and ALD. In this configuration, tungsten is deposited as a conductive film that will become the conductor 205b.
[0240] Next, by performing CMP treatment, a conductive film that becomes conductor 205a and conductor 205b are formed. A portion of the conductive film is removed, exposing the insulator 216. As a result, the conductor is only visible at the opening. 205a and conductor 205b remain. Furthermore, as a result of this CMP treatment, insulator 216 Some parts may be removed.
[0241] Next, etching is performed to remove the upper part of the conductor 205b. This removes the conductor 2 The upper surface of 05b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. For etching 205b, either dry etching or wet etching can be used. However, dry etching is preferable for microfabrication.
[0242] Next, on top of the insulator 216, conductor 205a, and conductor 205b, conductor 205c A conductive film is formed. The conductive film that becomes conductor 205c is the conductive film that becomes conductor 205a. Similarly, it is desirable to include a conductor that has the function of suppressing oxygen permeation.
[0243] In this embodiment, titanium nitride is deposited as a conductive film that will become the conductor 205c. By using a metal nitride as the upper layer of the conductor 205b, the insulator 222 and the like This can suppress the oxidation of the conductor 205b. Also, as the conductor 205b Even when using easily diffusive metals such as copper, the diffusion of the metal from the conductor 205c to the outside is not possible. It can be prevented.
[0244] Next, by performing CMP treatment, a portion of the conductive film that will become the conductor 205c is removed, and the insulator 216 is exposed (see Figures 4A to 4D). As a result, the conductor 205 is exposed only at the opening. a, conductor 205b, and conductor 205c remain. This results in a flat upper surface, conductor A conductive body 205 can be formed. Furthermore, the conductive body 205b and the conductive body 205a and The structure is such that it is enclosed in the conductive material 205c. Therefore, impurities such as hydrogen are released from the conductive material 205b. To prevent the substance from diffusing outside of the conductors 205a and 205c, and to prevent the conductors 205a Furthermore, it prevents oxygen from entering from outside the conductor 205c and oxidizing the conductor 205b. Yes, it is possible. However, this CMP process may remove a portion of the insulator 216.
[0245] Next, an insulator 222 is formed on the insulator 216 and the conductor 205. As such, an insulating film containing an oxide of aluminum and / or hafnium is formed. It is desirable to do so. Furthermore, an insulator containing an oxide of either aluminum or hafnium or both. Examples include aluminum oxide, hafnium oxide, and aluminum and hafnium oxides. It is preferable to use materials such as aluminum and hafnium aluminate. Insulators containing oxides of one or both of the elements provide a barrier against oxygen, hydrogen, and water. It has. The insulator 222 has barrier properties against hydrogen and water, so the transient Hydrogen and water contained in the structure surrounding Ta 200 are transmitted through the insulator 222. Diffusion into the transistor 200 is suppressed, and the formation of oxygen vacancies in the oxide 230 is inhibited. It can be suppressed.
[0246] The insulator 222 was deposited using sputtering, CVD, MBE, PLD, and ALD methods. This can be done using the like. In this embodiment, the insulator 222 is sputtering Hafnium oxide is deposited using the sputtering method. Hydrogen is not required as the deposition gas. By using the ring method, the hydrogen concentration in the insulator 222 can be reduced.
[0247] Next, it is preferable to perform a heat treatment. The heat treatment is preferably performed at a temperature of 250°C to 650°C. It is preferable to carry it out at a temperature of 300°C to 500°C, and more preferably at 320°C to 450°C. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or with an oxidizing gas for 10 minutes. The procedure should be carried out in an atmosphere containing ppm or more, 1% or more, or 10% or more. For example, nitrogen gas and oxygen. When performing heat treatment in a gas mixture atmosphere, it is sufficient to use about 20% oxygen gas. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or an inert gas. After heat treatment in an atmosphere, an oxidizing gas of 10 ppm or more is added to replenish the desorbed oxygen. Heat treatment may be carried out in an atmosphere containing % or more, or 10% or more.
[0248] Furthermore, it is preferable that the gas used in the above heat treatment is highly purified. For example, The amount of moisture contained in the gas used in the heat treatment described above is 1 ppb or less, preferably 0.1 ppb or less. More preferably, the level should be 0.05 ppb or less. Heat treatment using highly purified gas. By performing this process, it is possible to prevent moisture and other substances from being absorbed into the insulator 222, etc., as much as possible. can.
[0249] In this embodiment, as a heat treatment, after the film formation of the insulator 222, nitrogen gas and oxygen gas are used. The treatment is performed at a temperature of 400°C for 1 hour with a flow rate ratio of 4 slm: 1 slm. This method allows for the removal of impurities such as water and hydrogen contained in the insulator 222. Furthermore, when using an oxide containing hafnium as the insulator 222, the heat treatment will This can improve the crystallinity of the insulator 222. Also, the heat treatment improves the insulator 22 This can also be done at a later stage, such as after film deposition (step 4).
[0250] Next, an insulator 224 is deposited on the insulator 222. The insulator 224 is deposited by sputtering. This can be performed using methods such as the kerning method, CVD method, MBE method, PLD method, and ALD method. In this application, silicon oxide is deposited as the insulator 224 using a sputtering method. By using a sputtering method that does not require the use of hydrogen as the film-forming gas, the insulator 224 The hydrogen concentration inside can be reduced. The insulator 224 comes into contact with the oxide 230a in a later process. Therefore, it is preferable that the hydrogen concentration is reduced in this manner.
[0251] Next, insulators 224, 222, 216, 214 and 212 An opening is formed. The opening is formed between the two conductors 205. The formation of the opening is done by While etching can be used, dry etching is preferable for microfabrication. Note that although the shape of the opening in Figure 5A is shown as circular in a top view, it is not limited to this. It is not the case that the opening is approximately circular, such as an ellipse, or rectangular when viewed from above. These shapes may include polygons such as quadrilaterals, or polygons with rounded corners.
[0252] Next, an insulating film to become the insulator 249 is formed, and the insulating film is anisotropically etched to form an insulator. Forming 249. The insulating film that will become the insulator 249 is deposited by sputtering, CVD, This can be done using methods such as MBE, PLD, or ALD. The insulator 249 As the insulating film, it is preferable to use an insulating film that has the function of reducing oxygen permeability. For example, it is preferable to deposit aluminum oxide using the ALD method. Alternatively, PE It is preferable to deposit silicon nitride using the ALD method. Silicon nitride is resistant to hydrogen. It is preferable because it has high barrier properties.
[0253] Furthermore, as an anisotropic etching of the insulating film that becomes the insulator 249, for example, dry etching Methods such as the G method can be used. By providing an insulator 249 on the side wall of the opening, oxygen from the outside can be blocked. This reduces the transmission of the conductive material and prevents oxidation of the conductive material 248 that is formed next. It can prevent impurities such as water and hydrogen from entering the body 248 from the outside.
[0254] After the opening is formed, a conductive film that will become the conductor 248 is deposited. Thin film deposition is performed using methods such as sputtering, CVD, MBE, PLD, or ALD. This can be done. In this embodiment, the conductor 248 is formed to have the same structure as the conductor 205. Therefore, the conductive film that becomes conductor 248a is prepared in the same way as the conductive film that becomes conductor 205a. The conductive film that becomes conductor 248b is formed in the same manner as the conductive film that becomes conductor 205b. Just make a film.
[0255] Next, by performing CMP treatment, a portion of the conductive film that will become the conductor 248 is removed, and the insulator 2 24 is exposed. As a result, a conductive film that becomes the conductor 248 remains only at the opening. This forms a conductor 248 (conductor 248a and conductor 248b) with a flat upper surface. This can be done (see Figures 5A to 5D). Furthermore, this CMP treatment can be performed on the insulator 2 Some of the 24 may be removed.
[0256] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. Plasma treatment may be performed. Oxygen-containing plasma treatment can be performed, for example, using high-density microwaves. It is preferable to use a device that has a power supply for generating rasma. Alternatively, RF( It may have a power supply that applies radio frequency. By doing so, high-density oxygen radicals can be generated, and RF can be applied to the substrate side. This efficiently guides the oxygen radicals generated by the high-density plasma into the insulator 224. This is possible. Alternatively, after performing plasma treatment with an inert gas using this device, Plasma treatment containing oxygen may be performed to replenish the desorbed oxygen. By appropriately selecting the processing conditions, impurities such as water and hydrogen contained in the insulator 224 can be removed. It can be removed. In that case, heat treatment is not necessary.
[0257] Here, aluminum oxide is applied to the insulator 224, for example, by sputtering. After film formation, CMP treatment may be performed until the insulator 224 is reached. This process allows for the planarization and smoothing of the surface of the insulator 224. By placing nium on the insulator 224 and performing CMP processing, the endpoint detection of the CMP processing can be easily performed. It becomes easy. Also, due to the CMP treatment, a part of the insulator 224 is polished, and the insulator 224 The film thickness may become thin, but this can be corrected by adjusting the film thickness during the deposition of the insulator 224. 224 Planarizing and smoothing the surface prevents deterioration of the coverage of the oxide film that will be deposited later. This can sometimes prevent a decrease in the yield of semiconductor devices. Also, on the insulator 224 Then, by forming an aluminum oxide film using the sputtering method, an insulator 224 It is preferable because oxygen can be added to it.
[0258] Next, oxide film 230A and oxide film 230B are applied sequentially to the insulator 224 and the conductor 248. The film is formed (see Figures 6A to 6D). Note that oxide films 230A and 230B are It is preferable to deposit the film continuously without exposing it to the atmospheric environment. Impurities or moisture from the atmospheric environment adhere to oxide film 230A and oxide film 230B. This prevents this from happening and keeps the area near the interface between oxide film 230A and oxide film 230B clean. It is possible.
[0259] The oxide films 230A and 230B were deposited by sputtering, CVD, and MBE. This can be done using methods such as the PLD method and the ALD method.
[0260] For example, oxide film 230A and oxide film 230B are deposited by sputtering. In this case, oxygen or a mixture of oxygen and a noble gas is used as the sputtering gas. By increasing the proportion of oxygen in the puttering gas, excess oxygen in the formed oxide film... This can increase the amount. Also, when the above oxide film is deposited by sputtering: The above-mentioned In-M-Zn oxide targets can be used.
[0261] In particular, during the deposition of oxide film 230A, some of the oxygen contained in the sputtering gas acts as an insulator. It may be supplied to 224. Therefore, the oxygen contained in the sputtering gas The percentage should be 70% or more, preferably 80% or more, and more preferably 100%.
[0262] Furthermore, when forming oxide film 230B by sputtering, the sputtering gas contains The proportion of oxygen is greater than 30% and less than or equal to 100%, preferably between 70% and 100%. When a film is formed using this method, an oxygen-rich oxide semiconductor is created. The transistors used in the channel formation region offer relatively high reliability. However, this generation One aspect of the present invention is not limited thereto. When the oxide film 230B is formed by sputtering, The proportion of oxygen in the sputtering gas should be 1% or more and 30% or less, preferably 5% or more. When the film is deposited with an oxygen content of 0% or less, an oxygen-deficient oxide semiconductor is formed. Transistors using a monocrystalline semiconductor in the channel formation region can achieve relatively high field-effect mobility. Furthermore, by performing film formation while heating the substrate, the crystallinity of the oxide film can be improved. It can be done.
[0263] In this embodiment, the oxide film 230A is formed by sputtering, using the In:Ga: The film is deposited using an oxide target with a Zn = 1:3:4 [atomic ratio]. Also, oxide film 23 As 0B, by sputtering, In:Ga:Zn=4:2:4.1 [atomic ratio] The film is deposited using the oxide target of ]. Note that each oxide film is formed under different deposition conditions and atomic ratios. By selecting appropriately, the desired properties for oxide 230a and oxide 230b can be determined. It is good to form it.
[0264] Next, an oxide film 243A is deposited on the oxide film 230B (see Figures 6A to 6D). Film 243A was deposited using sputtering, CVD, MBE, PLD, ALD, etc. It can be done using the following method. Oxide film 243A has an atomic ratio of Ga to In, which is the same as oxide film 2 It is preferable that the atomic ratio of Ga to In in 30B is greater than that of In. In this embodiment, acid As coating film 243A, by sputtering, In:Ga:Zn=1:3:4[atoms The film is deposited using an oxide target in a numerical ratio.
[0265] Note that the insulator 222, insulator 224, oxide film 230A, oxide film 230B, and oxide film It is preferable to deposit 243A by sputtering without exposing it to the atmosphere. For example, a multi-chamber type film deposition apparatus can be used. This allows for the deposition of insulator 222, The edge body 224, oxide film 230A, oxide film 230B, and oxide film 243A, the hydrogen in the film It reduces the amount of hydrogen present during film formation, and further reduces the amount of hydrogen mixed into the film between each film formation step. can.
[0266] Next, it is preferable to perform a heat treatment. The heat treatment is performed on oxide film 230A and oxide film 230B. The process should be carried out within a temperature range in which the oxide film 243A does not undergo polycrystallization, which is between 250°C and 650°C. The following steps should preferably be performed at a temperature of 400°C to 600°C. Note that the heat treatment is performed using nitrogen gas. Alternatively, an inert gas atmosphere, or an oxidizing gas at 10 ppm or more, 1% or more, The process should be carried out in an atmosphere containing 10% or more of the substance. For example, heat treatment should be performed in a mixed atmosphere of nitrogen and oxygen gas. In this case, the oxygen gas concentration should be around 20%. Also, the heat treatment can be performed under reduced pressure. Alternatively, the heat treatment may involve heating in a nitrogen or inert gas atmosphere followed by desorption. An atmosphere containing oxidizing gas at a concentration of 10 ppm or more, 1% or more, or 10% or more to replenish the oxygen. Heat treatment may be performed in an open atmosphere.
[0267] Furthermore, it is preferable that the gas used in the above heat treatment is highly purified. For example, The amount of moisture contained in the gas used in the heat treatment described above is 1 ppb or less, preferably 0.1 ppb or less. More preferably, the level should be 0.05 ppb or less. Heat treatment using highly purified gas. By performing this process, moisture, etc., is removed from oxide film 230A, oxide film 230B, and oxide film 243A. This can prevent it from being absorbed as much as possible.
[0268] In this embodiment, the heat treatment is performed at a temperature of 550°C for 1 hour in a nitrogen atmosphere. After this, the process is carried out continuously in an oxygen atmosphere at a temperature of 550°C for 1 hour. According to the principle, water, hydrogen, etc. in oxide film 230A, oxide film 230B, and oxide film 243A This allows for the removal of impurities, etc. Furthermore, this heat treatment results in the oxide film 230B This improves the crystallinity and creates a denser, more compact structure. The diffusion of oxygen or impurities within the film 230B can be reduced.
[0269] Next, a conductive film 242A is deposited on the oxide film 243A (see Figures 6A to 6D). The deposition of Electrode 242A can be performed using sputtering, CVD, MBE, PLD, ALD, etc. This can be done using the following method. For example, the conductive film 242A can be produced using the sputtering method. A tantalum nitride film can be deposited. Note that even if heat treatment is performed before depositing the conductive film 242A, Good. The heat treatment is carried out under reduced pressure and without exposure to the atmosphere, continuously applying the conductive film 242 A may be formed into the film. By performing such a process, the surface of the oxide film 243A, etc. The adsorbed water and hydrogen are removed, and further oxide film 230A, oxide film 230B, and The water and hydrogen concentrations in the oxide film 243A can be reduced. Heat treatment temperature The temperature is preferably between 100°C and 400°C. In this embodiment, the heat treatment temperature is set to 200°C. Let's use °C.
[0270] Next, using lithography, oxide film 230A, oxide film 230B, and oxide film 243A were obtained. , and the conductive film 242A is processed into an island shape to form oxide 230a, oxide 230b, oxide layer Form 243B and conductive layer 242B (see Figures 7A to 7D). The process can utilize dry etching or wet etching methods. The machining process using the 230A method is suitable for micro-machining. Also, oxide film 230A, oxide film 230B, and oxide The film 243A and the conductive film 242A may be processed under different conditions. Oh, in this process, the film thickness of the region of the insulator 224 that does not overlap with the oxide 230a becomes thinner. This may occur. In addition, in the said process, the insulator 224 is superimposed with the oxide 230a, It may also be constructed in an island-like shape.
[0271] In lithography, the resist is first exposed through a mask. Next, exposure... The selected area is removed or left intact using a developer to form a resist mask. Next, By etching through the resist mask, conductors, semiconductors, or insulators can be etched. These can be processed into desired shapes. For example, KrF excimer laser light, ArF excimer laser light Using sima laser light, EUV (Extreme Ultraviolet) light, etc., A resist mask can be formed by exposing the dyst. Also, the relationship between the substrate and the projection lens An immersion technique may be used, in which a liquid (e.g., water) is filled in between and then exposed. Alternatively, the aforementioned light Alternatively, electron beams or ion beams may be used. When using this method, a mask is not required. Note that a resist mask is used in processes such as ashing. After performing dry etching, wet etching, and dry etching Perform wet etching, or dry etching after wet etching. It can be removed by performing the necessary procedures.
[0272] Furthermore, a hard mask made of an insulator or conductor may be used beneath the resist mask. When using a hard mask, an insulating film or conductive film that will serve as the hard mask material will be placed on the conductive film 242A. By forming a hard mask, then forming a resist mask on top of it, and etching the hard mask material... A hard mask of the desired shape can be formed. Etching of conductive film 242A, etc. You can either remove the resist mask before proceeding, or you can proceed with the resist mask still in place. Good. In the latter case, the resist mask may disappear during etching. Conductive film 242 After etching A, the hard mask may be removed by etching. If the mask material does not affect subsequent processes, or can be used in subsequent processes, then it is not necessarily hard. There is no need to remove the mask. For example, if a hard mask is formed with an insulating film, the hard The domask may be left intact and used as a barrier insulating film.
[0273] Furthermore, oxide 230a, oxide 230b, oxide layer 243B, and conductive layer 242B are At least a portion of it is formed to overlap with the conductor 248 and the two conductors 205. Furthermore, oxide 230a, oxide 230b, oxide layer 243B, and conductive layer 242B The side surface is preferably approximately perpendicular to the upper surface of the insulator 222. Oxide 230a, The sides of oxide 230b, oxide layer 243B, and conductive layer 242B are on top of the insulator 222. By being roughly perpendicular to the surface, when providing multiple transistors 200, area reduction is possible. Higher density becomes possible. Alternatively, oxide 230a, oxide 230b, oxide layer 243B, and the angle between the side surface of the conductive layer 242B and the upper surface of the insulator 222 is low. This may be done. In that case, oxide 230a, oxide 230b, oxide layer 243B, and conductive The angle between the side surface of the electrical layer 242B and the top surface of the insulator 222 is preferably 60 degrees or more and less than 70 degrees. i. By adopting this shape, the coating properties of the insulator 275 and other materials in subsequent processes will be improved. This improves performance and reduces defects such as porosity.
[0274] Furthermore, the by-products generated in the etching process are oxide 230a, oxide 230b, In this case, it may be formed in layers on the sides of the oxide layer 243B and the conductive layer 242B. In addition, the layered by-products consist of oxide 230a, oxide 230b, oxide 243, and hydroxyl This will be formed between the electric body 242 and the insulator 275. Similarly, layered by-products will be formed. The layered by-product may be formed on the insulator 224. Even if the insulator 275 is formed in this state, the insulator 224 will be affected by the layered by-products. The addition of oxygen to the insulator is hindered. Therefore, the insulator formed in contact with the upper surface of the insulator 224 It is preferable to remove the layered by-product.
[0275] Next, insulator 224, oxide 230a, oxide 230b, oxide layer 243B, and conductive An insulator 275 is formed on the electrode layer 242B. (See Figures 8A to 8D.) Insulator 27 The film deposition in step 5 is carried out using methods such as sputtering, CVD, MBE, PLD, or ALD. This can be done by using an insulating film that has the function of suppressing oxygen permeation. It is preferable that it be present. For example, as insulator 275, in the ALD method or sputtering method Therefore, it is sufficient to deposit an aluminum oxide film. Also, as the insulator 275, sputtering Silicon nitride may be deposited using the G method.
[0276] Furthermore, by depositing the insulator 275 using the sputtering method, oxygen is added to the insulator 224. It is possible.
[0277] Next, an insulating film, which will become an insulating film 280, is formed on the insulating film 275. This can be done using methods such as sputtering, CVD, MBE, PLD, and ALD. Yes, it is possible. For example, a silicon oxide film can be formed as the insulating film using the sputtering method. The insulating film, which will become the insulator 280, is deposited by sputtering in an oxygen-containing atmosphere. By doing so, an insulator 280 containing excess oxygen can be formed. Also, water is used as the film-forming gas. By using a sputtering method that does not require the use of a particle, the hydrogen concentration in the insulator 280 can be reduced. It can be reduced. Furthermore, a heat treatment may be performed before the deposition of the insulating film. Heat treatment This process may be carried out under reduced pressure, and the insulating film may be deposited continuously without exposure to the atmosphere. By performing a process like this, moisture and water adsorbed on the surface of the insulator 275 can be removed. The element is removed, and further oxide 230a, oxide 230b, oxide layer 243B, and insulator The water and hydrogen concentrations in 224 can be reduced. The heat treatment described above The following heat treatment conditions can be used.
[0278] Next, the insulating film that will become the insulator 280 is subjected to CMP treatment, and the insulator 280 has a flat top surface. Form (see Figures 8A to 8D). Furthermore, on the insulator 280, for example, sputtering A silicon nitride film is formed by a coating method, and the silicon nitride is coated with C until it reaches the insulator 280. MP processing may be performed.
[0279] Next, a portion of the insulator 280, a portion of the insulator 275, a portion of the conductive layer 242B, and oxide layer 2 By removing part of 43B and part of oxide 230b, two openings that reach oxide 230b are created. To form. It is preferable that the two openings be formed so as to overlap with the conductor 205. The formation of the opening allows conductors 242a, 242b, and 242c to be separated by acid. Forms oxide 243a, oxide 243b, and oxide 243c (see Figures 9A to 9D). (Illuminate.) Here, it is preferable that the conductor 242b is formed superimposed on the conductor 248. Furthermore, the oxide 230b is heavy with conductors 242a, 242b, and 242c. Areas that are not covered with tatami mats are exposed.
[0280] When forming the above opening, the upper part of oxide 230b is removed. By removing it, grooves are formed in the oxide 230b. Depending on the depth of these grooves, The groove may be formed in the opening formation step described above, or in a step different from the opening formation step described above. It may be formed as follows.
[0281] Also, a portion of the insulator 280, a portion of the insulator 275, a portion of the conductive layer 242B, and oxide layer 2 Processing of parts of 43B and oxide 230b is done by dry etching or wet etching. The etching method can be used. Dry etching is suitable for microfabrication. Furthermore, the processing may be carried out under different conditions. For example, the insulator 280 Part of the material was processed using the dry etching method, and part of the insulator 275 was processed using the wet etching method. Furthermore, a portion of the oxide layer 243B, a portion of the conductive layer 242B, and a portion of the oxide 230b are used. The material may also be processed by the Ly-etching method. In this case, first, two openings are formed in the insulator 280. The insulator 275, oxide layer 243B, and conductive layer 242B are superimposed on the two openings. An opening is formed. In addition, processing of a portion of the oxide layer 243B and a portion of the conductive layer 242B is performed. The processing of oxide 230b may be carried out under different conditions.
[0282] Here, impurities such as oxide 230a and oxide 230b that are attached to the surface or diffused into the interior are considered. It is preferable to remove the material formed on the oxide 230b surface by the above dry etching. It is preferable to remove the damaged area. The impurities include insulator 280, insulating Components contained in body 275 and conductive layer 242B, and apparatus used to form the above-mentioned opening. Components contained in the materials used, and components contained in the gas or liquid used for etching. Examples of impurities include those caused by certain components. For example, aluminum, silicon Examples include condensate, tantalum, fluorine, and chlorine.
[0283] In particular, impurities such as aluminum or silicon are CAAC-O230b oxide. It inhibits S formation. Therefore, it inhibits CAAC-OS formation of aluminum or silicon. It is preferable that harmful impurity elements are reduced or removed. For example, oxide 230 b, and its vicinity, should have a concentration of aluminum atoms of 5.0 atomic percent or less. Preferably, 2.0 atomic% or less, more preferably 1.5 atomic% or less, and 1.0 atomic% or less. More preferably, and even more preferably less than 0.3 atomic percent.
[0284] Furthermore, impurities such as aluminum or silicon can inhibit the formation of CAAC-OS. , pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like ox The region of the metal oxide that has become an ide semiconductor is considered a non-CAAC region. It may be called that. In the non-CAAC region, the density of the crystal structure is reduced, so V O H It forms in large quantities, making it easier for transistors to become normally-on. Therefore, oxide 230 It is preferable that the non-CAAC region of b is reduced or eliminated.
[0285] In contrast, it is preferable that oxide 230b has a layered CAAC structure. It is preferable that the CAAC structure extends to the lower end of the drain of oxide 230b. In transistor 200, conductor 242a, conductor 242b, or conductor 242 c, and its vicinity, function as drains. That is, conductor 242a, conductor 242 b, or the oxide 230b near the lower end of the conductor 242c, has a CAAC structure. This is preferable. In this way, even at the drain end, which significantly affects the drain pressure, acid The damaged region of the ion 230b is removed, and the CAAC structure is obtained, resulting in transistor 200 This further suppresses fluctuations in the electrical characteristics. Furthermore, it improves the reliability of transistor 200. It can be improved.
[0286] To remove the above-mentioned impurities, a cleaning process is performed. The cleaning method involves using a cleaning solution, etc. These include wet cleaning, plasma treatment using plasma, and cleaning by heat treatment. The cleaning process may be combined as appropriate. Note that this cleaning process will deepen the grooves. This can happen.
[0287] For wet cleaning, use ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc., with carbonated water. Alternatively, the cleaning process may be carried out using an aqueous solution diluted with pure water, pure water, carbonated water, etc. Ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water. Alternatively, These cleaning methods may be combined as appropriate.
[0288] In this specification, etc., an aqueous solution obtained by diluting commercially available hydrofluoric acid with pure water is referred to as diluted hydrofluoric acid. It is called an acid, and a solution obtained by diluting commercially available ammonia water with pure water is sometimes called diluted ammonia water. Yes. Furthermore, the concentration and temperature of the aqueous solution depend on the impurities to be removed and the semiconductor device being cleaned. The composition should be adjusted as appropriate. The ammonia concentration of the diluted ammonia solution should be 0.0 The concentration should be between 1% and 5%, preferably between 0.1% and 0.5%. The hydrogen fluoride concentration of the hydrochloric acid is 0.01 ppm to 100 ppm, preferably 0.1 ppm. It should be between 10 ppm and above.
[0289] For ultrasonic cleaning, a frequency of 200 kHz or higher, preferably 900 kHz or higher, is used. It is preferable to have this. By using this frequency, damage to oxides such as 230b is reduced. It can be reduced.
[0290] Furthermore, the above cleaning process may be performed multiple times, and the cleaning solution may be changed each time the cleaning process is performed. Example For example, the first cleaning treatment involves using diluted hydrofluoric acid or diluted ammonia water. In addition, a second washing treatment using pure water or carbonated water may be performed.
[0291] In this embodiment, as the above cleaning process, wet cleaning is performed using diluted hydrofluoric acid. Next, wet cleaning is performed using purified water or carbonated water. Removes impurities such as oxide 230a and oxide 230b that are attached to the surface or diffused into the interior. This can be done. Furthermore, the crystallinity of oxide 230b can be increased.
[0292] Previously, processing such as dry etching or the above-mentioned cleaning treatment overlapped with the above-mentioned opening. Furthermore, the thickness of the insulator 224 in the region that does not overlap with the oxide 230b is such that it does not overlap with the oxide 230b. In overlapping regions, the thickness may be thinner than that of insulator 224.
[0293] Heat treatment may be performed after the etching or cleaning described above. The heat treatment is 100 The heating process should be carried out at a temperature between 450°C and 450°C, preferably between 350°C and 400°C. The procedure involves an atmosphere of nitrogen gas or an inert gas, or an oxidizing gas at a concentration of 10 ppm or more, or 1%. The procedure should be carried out in an atmosphere containing the above amount, or 10% or more. For example, heat treatment should be performed in an oxygen atmosphere. This is preferable. This supplies oxygen to oxide 230a and oxide 230b, and oxygen V missing O This can reduce oxide 23. The crystallinity of 0b can be improved. Furthermore, the heat treatment may be performed under reduced pressure. Alternatively, the material may be heat-treated in an oxygen atmosphere, followed by continuous heat-treatment in a nitrogen atmosphere without exposure to the atmosphere. You may do so.
[0294] Next, the insulating film 250A is deposited (see Figures 10A to 10D). Deposition of insulating film 250A A heat treatment may be performed beforehand, and this heat treatment should be carried out under reduced pressure and without exposure to the atmosphere. The insulating film 250A may be deposited continuously. Furthermore, the heat treatment may be carried out in an oxygen-containing atmosphere. It is preferable to carry this out. By performing such a treatment, the surface of oxide 230b, etc. The water and hydrogen adsorbed on it are removed, and further oxides 230a and 230b are removed. The moisture and hydrogen concentrations inside can be reduced. The heat treatment temperature is 100°C or higher. A temperature of 400°C or lower is preferable.
[0295] Insulating film 250A can be produced using methods such as sputtering, CVD, MBE, PLD, and ALD. It can be formed using [a specific method]. In addition, the insulating film 250A has reduced or removed hydrogen atoms. It is preferable to deposit the film using a film deposition method that utilizes a gas. This allows the water in the insulating film 250A to be deposited. The elemental concentration can be reduced. The insulating film 250A comes into contact with the oxide 230b in a later process. Since it becomes an insulator 250, it is preferable that the hydrogen concentration is reduced in this way.
[0296] Furthermore, it is preferable to deposit the insulating film 250A using the ALD method. The thickness of the insulator 250, which functions as a gate insulating film of the inverter 200, is extremely thin (e.g. For example, a range of 5nm to 30nm, and it is necessary to minimize the variation. In contrast, the ALD method alternately introduces a precursor and a reactant (oxidizing agent). This is a film deposition method, and the film thickness can be adjusted by repeating this cycle. Therefore, precise film thickness adjustment is possible. Thus, miniaturized transistor 200 is required. This makes it possible to achieve the required accuracy of the gate insulating film thickness. Also, as shown in Figures 10B and 10C Thus, the insulating film 250A is the bottom surface and side surface of the opening formed by the insulator 280, etc. It is necessary to form a film with good coverage. On the bottom and sides of the opening, layers of atoms Since it can be deposited layer by layer, the insulating film 250A provides good coverage over the opening. It can be used to form a film.
[0297] Furthermore, for example, when depositing an insulating film 250A using the PECVD method, hydrogen-containing The membrane gas is decomposed in the plasma, generating a large amount of hydrogen radicals. Reduction of hydrogen radicals. The reaction removes oxygen from oxide 230b and V O When H is formed, oxide 2 The hydrogen concentration in 30b increases. However, the insulating film 250A is deposited using the ALD method. This suppresses the generation of hydrogen radicals both when introducing the precursor and when introducing the reactant. Therefore, by forming an insulating film 250A using the ALD method, the oxide can be formed. This prevents the hydrogen concentration in 230b from becoming too high. For example, if the insulating film is 250A Then, a silicon oxide film, such as silicon oxide, can be deposited using the ALD method.
[0298] Note that in Figures 10B, 10C, and 10D, the insulating film 250A is shown as a single layer, but it is actually two layers. The above laminated structure may also be used. When the insulating film 250A is a two-layer laminated structure, insulating film 25 The lower layer of 0A is formed using an insulator that releases oxygen upon heating, and the upper layer of insulating film 250A The layer is preferably formed using an insulator that has the function of suppressing oxygen diffusion. By using such a configuration, oxygen contained in the lower layer of the insulator 250 diffuses into the conductor 260. This can suppress the decrease in the amount of oxygen supplied to oxide 230. This also suppresses the oxidation of the conductor 260 by oxygen contained in the lower layer of the insulator 250. It can be controlled. For example, the lower layer of the insulating film 250A is used in the insulator 250 described above. The insulating film 250A is made of a material that can be used, and the upper layer of the insulating film 250A is made of the same material as the insulator 222. It can be provided using this method.
[0299] Specifically, the upper layer of insulating film 250A is made of hafnium, aluminum, gallium, and Titanium, Zirconium, Tungsten, Titanium, Tantalum, Nickel, Germanium , a metal oxide containing one or more selected from magnesium, or Any metal oxide that can be used as oxide 230 can be used. In particular, aluminum It is preferable to use an insulator containing oxides of either or both of nium and hafnium. .
[0300] In this embodiment, the insulating film 250A has a two-layer laminated structure, with silicon oxide as the lower layer. A film is deposited using the PEALD method, and then hafnium oxide is deposited as an upper layer using the thermal ALD method.
[0301] Furthermore, when the insulating film 250A is made into a two-layer laminated structure, the insulating film that is below the insulating film 250A is... The film and the insulating film that forms the upper layer of insulating film 250A are deposited continuously without exposure to the atmospheric environment. Preferably, by forming the film without exposing it to the atmosphere, the insulating film that becomes the lower layer of insulating film 250A, And impurities such as hydrogen or water from the atmospheric environment may be present on the insulating film that forms the upper layer of insulating film 250A. This prevents the particles from adhering, and the insulating film that forms the lower layer of insulating film 250A and insulating film 250 This allows for keeping the vicinity of the interface with the insulating film that forms the upper layer of A clean.
[0302] Next, microwave treatment is performed in an oxygen-containing atmosphere (see Figures 10A to 10D). As shown in Figures 10B, 10C, and 10D, the dotted lines represent microwaves, RF and other high-frequency waves, and oxygen. This refers to plasma or oxygen radicals, etc. Microwave processing uses, for example, microwaves. It is preferable to use a microwave processing device that has a power supply for generating high-density plasma. Furthermore, the microwave processing device may have a power supply for applying RF to the substrate side. By using a rasma, high-density oxygen radicals can be generated. Also, on the substrate side... By applying RF, oxygen ions generated by the high-density plasma are efficiently converted into acid It can be introduced into the compound 230b. Furthermore, the above microwave treatment can be performed under reduced pressure. Preferably, the pressure is 60 Pa or higher, preferably 133 Pa or higher, more preferably 200 Pa More preferably, the pressure should be 400 Pa or higher. Also, the oxygen flow rate ratio (O2 / O2+ The process should be carried out with Ar content of 50% or less, preferably between 10% and 30%. The processing temperature should be The process should be carried out at a temperature of 750°C or lower, preferably 500°C or lower, for example, around 400°C. After the plasma treatment, heat treatment may be performed continuously without exposure to the outside air.
[0303] As shown in Figures 10B, 10C, and 10D, microwave processing is performed in an oxygen-containing atmosphere. By doing so, the oxygen gas is turned into plasma using microwaves or high-frequency waves such as RF, and the acid The elementary plasma is applied to the region between the conductors 242a and 242b of the oxide 230b, and the conductor It can be applied to the region between the electric element 242b and the conductor 242c. At this time, the microphone It is also possible to irradiate with radio waves or high-frequency waves such as RF. That is, region 232d as shown in Figure 2. And in region 232e, microwaves, or high-frequency waves such as RF, oxygen plasma, etc. It can be done. Due to the action of plasma, microwaves, etc., region 232d and region 2 32e's V OH can be segmented and hydrogen H can be removed from regions 232d and 232e. That is, in regions 232d and 232e, the reaction of "V O H → H + V O " occurs, and the hydrogen concentration in regions 232d and 232e can be reduced. Therefore, oxygen deficiency and V H in regions 232d and 232e can be reduced, and the carrier O concentration can be decreased. Also, oxygen radicals generated by the above oxygen plasma or oxygen contained in the insulator 250 are supplied to the oxygen deficiency formed in regions 232d and 232e, so that the oxygen deficiency in regions 232d and 232e can be further reduced , and the carrier concentration can be decreased. On the other hand, conductors 242a, conductor 2 42b, and conductor 242c are provided on regions 232a, region 232b, and region 232c. As shown in FIGS. 10B, 10C, and 10D , conductors 242a, conductor 242b, and conductor 242c shield the actions of microwaves, or high-frequency waves such as RF
[0304] etc., and oxygen plasma, so these actions do not reach regions 232a, region 232b, and region 232c. As a result, by microwave treatment, , reduction of V H and excessive oxygen supply do not occur in regions 232a, region 232b, and region 232c, so a decrease in the carrier concentration can be prevented. In this way, oxygen deficiency and V H are selectively removed in regions 232d and 2e of the oxide semiconductor, and regions 232d and 232e are made into i-type or substantially i-type O to prevent a decrease in the carrier concentration. In this way, oxygen deficiency and V
[0305] In this way, oxygen deficiency is selectively removed in regions 232d and 232e of the oxide semiconductor, and V H, and regions 232d and 232e are made into i-type or substantially i-type O to make regions 232d and 232e into i-type or substantially i-type This can be done. Furthermore, region 232 functions as a source region or drain region. This suppresses the supply of excess oxygen to regions a, 232b, and 232c, thereby promoting n-type formation. This can be maintained. This suppresses fluctuations in the electrical characteristics of transistor 200, and the base This can suppress variations in the electrical characteristics of transistor 200 within the board surface. Because the conductor 248 is superimposed on the electric body 242b, the upper surface of the conductor 248 is Since it is in self-alignment contact with region 232b, transistor 200a and transistor 200 b and the conductor 248 can form good contact.
[0306] In this way, it is possible to provide a semiconductor device with less variation in transistor characteristics. It is possible to provide semiconductor devices with good electrical characteristics. This can provide a good semiconductor device.
[0307] In the process shown in Figure 10, microwave treatment was performed after the deposition of the insulating film 250A. The present invention is not limited thereto. For example, microwave treatment before deposition of insulating film 250A Alternatively, microwave treatment may be performed both before and after deposition of the insulating film 250A. That's fine.
[0308] For example, if the insulating film 250A has the two-layer structure described above, microwave treatment is performed to provide insulation. The silicon oxide layer beneath film 250A was deposited using the PEALD method, and the silicon oxide layer above insulating film 250A was deposited. Hafnium can be deposited using the thermal ALD method. Here, the above microwave treatment and silicon oxide PEALD deposition of [a specific type of film] and thermal ALD deposition of hafnium oxide can be performed without exposure to the atmosphere. Continuous processing is preferable. For example, a multi-chamber processing system can be used. Furthermore, the above microwave processing is performed on the plasma-excited reactant of the PEALD device. This can be substituted with treatment using an oxidizing agent. Here, the reactant (oxidizing agent) is oxygen gas. You can use it.
[0309] Alternatively, heat treatment may be performed while maintaining a reduced pressure state after microwave treatment. By performing this treatment, in insulating film 250A, oxide 230b, and oxide 230a It can efficiently remove hydrogen. Also, some of the hydrogen is absorbed by conductor 242 (conductor 2 It may be gettered by 42a and conductor 242b), or by microwave. Even if the step of performing heat treatment while maintaining a reduced pressure state after processing is repeated multiple times Good. By repeatedly performing the heat treatment, the insulating film 250A, the oxide 230b, and the acid Hydrogen in compound 230a can be removed even more efficiently. The heat treatment temperature is as follows: It is preferable to use a temperature between 300°C and 500°C.
[0310] Furthermore, by performing microwave treatment to modify the film quality of the insulating film 250A, hydrogen, water, and other substances can be removed. The diffusion of pure substances can be suppressed. Therefore, the formation of conductive films that become conductors 260, etc. Subsequent processes, such as heat treatment, allow hydrogen, water, impurities, etc. to enter through the insulator 250. However, diffusion into oxides 230b, 230a, etc. can be suppressed.
[0311] Next, a conductive film to become conductor 260a and a conductive film to become conductor 260b are deposited in sequence. The deposition of the conductive film that will become the conductive body 260a and the conductive film that will become the conductive body 260b is performed by sputtering. This can be carried out using methods such as CVD, MBE, PLD, and ALD. Morphologically, a conductive film that will become the conductor 260a is formed using the ALD method, and then the CVD method is used A conductive film is formed to become the conductor 260b.
[0312] Next, the conductive film, which becomes the insulating film 250A and the conductive film 260a, and the conductive film, are subjected to CMP treatment. By polishing the conductive film that becomes the electric body 260b until the insulator 280 is exposed, Insulator 250 and conductor 2, corresponding to transistor 200a and transistor 200b. Forms 60 (conductor 260a and conductor 260b) respectively (Figures 11A to 11A) See 1D. This allows the insulators of transistors 200a and 200b to function properly. 250 has two openings that reach oxide 230b and the inner wall (side wall) of the groove of oxide 230b It is positioned to cover the bottom surface, and the transistor 200a and the transistor The conductor 260 of TA 200b has the two openings and the groove portion through the insulator 250. It is positioned to be embedded.
[0313] Next, a heat treatment may be performed under the same conditions as the heat treatment described above. In this embodiment, nitrogen The process is carried out at a temperature of 400°C for 1 hour in a plain atmosphere. This heat treatment causes the insulator 250 Furthermore, the moisture and hydrogen concentrations in the insulator 280 can be reduced. After heat treatment, the insulator 282 may be deposited continuously without exposure to the atmosphere.
[0314] Next, an insulator 282 is formed on the insulator 250, the conductor 260, and the insulator 280. (See Figures 12A to 12D.) The insulator 282 is deposited by sputtering, C This can be done using methods such as the VD method, MBE method, PLD method, and ALD method. The film deposition is preferably carried out using the sputtering method. By using a good sputtering method, the hydrogen concentration in the insulator 282 can be reduced. Furthermore, the insulator 282 is deposited in an oxygen-containing atmosphere using the sputtering method. This allows oxygen to be added to the insulator 280 while the film is being formed. Excess oxygen can be added to 280. At this time, while heating the substrate, insulator 2 It is preferable to form a film of 82.
[0315] In this embodiment, the insulator 282 is an aluminum target in an atmosphere containing oxygen gas. Using a tweezers, aluminum oxide is deposited using the pulsed DC sputtering method. By using the sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film It is possible to improve quality.
[0316] Next, an insulator 283 is formed on the insulator 282 (see Figures 1A to 1D). The film deposition of body 283 was performed by sputtering, CVD, MBE, PLD, or ALD. This can be done using methods such as the above. The insulator 283 is deposited using the sputtering method. It is preferable to use a sputtering method that does not require the use of hydrogen as the film deposition gas. The hydrogen concentration in the insulator 283 can be reduced. Also, the insulator 283 is multilayered. Alternatively, a silicon nitride film may be deposited using a sputtering method, and the silicon nitride A silicon nitride film may be deposited on top using the CVD method. A highly barrier insulator 283 By encasing the transistor 200 in the insulator 212, moisture and hydrogen are prevented from entering from the outside. This can prevent intrusion.
[0317] Next, heat treatment may be performed. In this embodiment, heat treatment is performed at a temperature of 400°C in a nitrogen atmosphere. The process is carried out for one hour. This heat treatment results in the formation of a film of the insulator 282, as shown in Figure 2. The oxygen added by diffuses into insulators 280 and 250, and the oxide 230 is charged. It can be selectively supplied to the flannel formation region. This heat treatment is performed on the insulator 283. This process may be performed not only after formation, but also after the deposition of the insulator 282, for example.
[0318] Based on the above, a semiconductor device having the transistor 200 shown in Figures 1A to 1D is fabricated. This is possible. Figures 4A to 12A, 4B to 12B, 4C to 12C, and As shown in Figures 4D to 12D, the method for fabricating the semiconductor device shown in this embodiment is used. This allows us to fabricate transistor 200.
[0319] <Microwave Processing Equipment> The following describes a microwave processing apparatus that can be used in the above-mentioned semiconductor device fabrication method. I will explain.
[0320] First, Figure 1 shows the configuration of a manufacturing equipment that minimizes the inclusion of impurities during the manufacturing of semiconductor devices and other equipment. 3. This will be explained using Figures 14 and 15.
[0321] Figure 13 schematically shows a top view of the single-wafer multi-chamber manufacturing apparatus 2700. The manufacturing apparatus 2700 includes a cassette port 2761 for housing the substrate and a substrate alignment An alignment port 2762 for performing an atmospheric substrate supply chamber 2701 and an atmospheric substrate From the board supply room 2701, the substrate is transported to the atmospheric substrate transport room 2702, and the substrate is brought in. Furthermore, a load lock chamber that switches the pressure inside the room from atmospheric pressure to reduced pressure, or from reduced pressure to atmospheric pressure. 2703a, and the removal of the substrate, and the room pressure from reduced pressure to atmospheric pressure, or from atmospheric pressure Unload lock chamber 2703b for switching to reduced pressure, and transport chamber 2 for transporting substrates in vacuum. 704, chamber 2706a, chamber 2706b, chamber 2706c It has a chamber 2706d and
[0322] Furthermore, the atmospheric substrate transport chamber 2702 is connected to the load lock chamber 2703a and the unload lock chamber. It is connected to the loading lock chamber 2703b, and the load lock chamber 2703a and the unload lock chamber 270 3b is connected to transport chamber 2704, and transport chamber 2704 is connected to chamber 2706a, It connects to bar 2706b, chamber 2706c, and chamber 2706d.
[0323] Furthermore, gate valves GV are provided at the connection points of each chamber, and the atmospheric substrate supply chamber 270 Except for chamber 1 and the atmospheric substrate transport chamber 2702, each chamber can be independently maintained in a vacuum state. Furthermore, a transport robot 2763a is provided in the atmospheric substrate transport chamber 2702, and transport A transport robot 2763b is installed in the transport room 2704. The transport robot 2763b can transport the substrates within the manufacturing apparatus 2700. ru.
[0324] The back pressure (total pressure) in the transport chamber 2704 and each chamber is, for example, 1 × 10⁻⁶ -4 Pa or less Preferably 3 × 10 -5 Pa or less, more preferably 1 × 10⁻⁶ -5 It should be Pa or less. Furthermore, the mass-to-charge ratio (m / z) of the transport chamber 2704 and each chamber is 18 for gas molecules. The partial pressure of the gas molecule (atom) is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, and even more preferably 3×10 -6 Pa or less. Also, the partial pressure of the gas molecule (atom) with m / z of 28 in the transfer chamber 2704 and each chamber is, for example, 3×10 Pa or less, preferably -5 1×10 Pa or less, and even more preferably 3×10 -5 Pa or less. Also, the partial pressure of the gas molecule (atom) with m / z of 44 in the transfer chamber 2704 and each chamber is, for example, -6 3×10 Pa or less, preferably 1×10 Pa or less, and even more preferably 3×1 -5 0 -5 Pa or less. 0 -6 Pa or less.
[0325] In addition, the total pressure and partial pressure in the transfer chamber 2704 and each chamber can be measured using a mass spectrometer. For example, the quadrupole mass spectrometer (also referred to as Q-mas s) Qulee CGM-051 manufactured by ULVAC, Inc. can be used. s) Qulee CGM-051 manufactured by ULVAC, Inc. can be used.
[0326] Also, the transfer chamber 2704 and each chamber are preferably configured to have little external leakage or internal leakage. For example, the leak rate of the transfer chamber 2704 and each chamber is 3×10 Pa·m -6 / s or less, preferably 1×10 3 Pa·m -6 / s or less. Also, for example, the leak rate of the gas molecule (atom) with m / z of 18 is 1×10 3 Pa·m / s or less, preferably -7 3×10 Pa·m 3 / s or less. Also, for example, -8 Pa·m 3 / s or less. Also, for example, The leak rate of a gas molecule (atom) with m / z 28 is 1 × 10⁻⁶ -5 Pa·m 3 / s or less Preferably 1 × 10 -6 Pa·m 3 It should be less than or equal to / s. Also, for example, if m / z is 44 The leak rate of gas molecules (atoms) is 3 × 10 -6 Pa·m 3 / s or less, preferably 1× 10 -6 Pa·m 3 Set to / s or less.
[0327] Regarding the leak rate, the total pressure and partial pressure were measured using the aforementioned mass spectrometer. Then we can derive it. The leak rate depends on external leaks and internal leaks. The problem is the inflow of gas from outside the vacuum system due to tiny holes or sealing defects. Leaks are caused by leaks from valves or other partitions within the vacuum system, or by released gases from internal components. To keep the leak rate below the above-mentioned values, both external and internal leaks are addressed. Therefore, countermeasures need to be taken.
[0328] For example, the opening and closing parts of the conveying chamber 2704 and each chamber are sealed with metal gaskets. It is good to do so. Metal gaskets are made of iron fluoride, aluminum oxide, or chromium oxide. It is preferable to use a metal gasket that is coated. Metal gaskets have better adhesion than O-rings. External leakage can be reduced. Also, by using iron fluoride, aluminum oxide, chromium oxide, etc. By using a metal passivation coating, impurities released from the metal gasket are contained. This suppresses the release of gases and reduces internal leakage.
[0329] Furthermore, as a component of the manufacturing apparatus 2700, aluminum with low emission gas containing impurities is used. It uses nium, chromium, titanium, zirconium, nickel, or vanadium. Also, the previous The aforementioned member may be used after being coated with an alloy containing iron, chromium, and nickel. Alloys containing ammonium and nickel are rigid, heat-resistant, and easy to process. Therefore, if the surface irregularities of the material are reduced by polishing or other means in order to reduce the surface area, It can reduce emissions.
[0330] Alternatively, the components of the aforementioned manufacturing apparatus 2700 may be made of iron fluoride, aluminum oxide, chromium oxide, etc. Any covering will do.
[0331] The components of the manufacturing apparatus 2700 are preferably made of metal as much as possible, such as quartz. When installing viewing windows or similar devices, the surface should be treated with iron fluoride to suppress the release of gases. It is best to coat it thinly with aluminum oxide, chromium oxide, or similar materials.
[0332] The adsorbed material present in the transport chamber 2704 and each chamber is adsorbed to the inner walls, etc. This does not affect the pressure in the transport chamber 2704 and each chamber, however, the pressure in the transport chamber 2704 and each chamber This causes gas release when exhausting the chamber. Therefore, the leak rate and exhaust speed are related. Although there is no direct connection, a pump with high exhaust capacity is used to transport chamber 2704 and each chamber. It is important to remove as much of the adsorbed material as possible and to evacuate the system beforehand. To promote the desorption of adsorbed material, the transport chamber 2704 and each chamber may be baked. Baking can increase the desorption rate of adsorbed substances by about 10 times. The process should be carried out at a temperature between 100°C and 450°C. At this time, an inert gas is introduced into the transport chamber 2704. Furthermore, when adsorbed substances are removed while being introduced into each chamber, they are difficult to remove by exhaust alone. The desorption rate of water and other substances can be further increased. By heating it to a temperature similar to that of King, the desorption rate of adsorbed substances can be further increased. It is preferable to use a noble gas as the inert gas in this case.
[0333] Alternatively, by introducing an inert gas such as a heated noble gas or oxygen into the transport chamber 27 The pressure in 04 and each chamber is increased, and after a certain period of time, the transfer chamber 2704 and each It is preferable to perform a process to exhaust the chamber. By introducing heated gas into the conveying chamber 2704 And adsorbed material can be removed from each chamber, transport chamber 2704 and each chamber This process can reduce impurities present in the bar. Note that this process should be repeated between 2 and 30 times. It is more effective to repeat the procedure, preferably between 5 and 15 times. Specifically, warm An inert gas whose temperature is between 40°C and 400°C, preferably between 50°C and 200°C. By introducing oxygen, etc., the pressure inside the transport chamber 2704 and each chamber can be raised to 0.1 Pa or less. Above 10 kPa or less, preferably 1 Pa or more and 1 kPa or less, more preferably 5 Pa or more and 1 The pressure should be 00 Pa or less, and the period for maintaining the pressure should be 1 minute or more and 300 minutes or less, preferably 5 minutes or more and 120 minutes or less. It should be less than a minute. After that, transport chamber 2704 and each chamber should be kept for 5 minutes to 300 minutes. Preferably, exhaust the system for a period of 10 minutes to 120 minutes.
[0334] Next, the cross-sectional model of chambers 2706b and 2706c is shown in Figure 14. I will explain using a diagram.
[0335] Chambers 2706b and 2706c are, for example, used to apply microwaves to the workpiece. This is a chamber capable of performing processing. Note that chamber 2706b and chamber The only difference between this and the 2706c is the atmosphere used during microwave processing. Other configurations Since these points are common to all, they will be explained together below.
[0336] Chambers 2706b and 2706c are connected to slot antenna board 2808. It has a dielectric plate 2809, a substrate holder 2812, and an exhaust port 2819. Outside chambers 2706b and 2706c, etc., there is a gas supply source 2801 and Valve 2802, high-frequency generator 2803, waveguide 2804, and mode converter 2805 And gas tube 2806, waveguide 2807, matching box 2815, and high-frequency power supply. A 2816, a vacuum pump 2817, and a valve 2818 are provided.
[0337] The high-frequency generator 2803 is connected to the mode converter 2805 via the waveguide 2804. The mode converter 2805 is connected to the slot antenna plate 2808 via the waveguide 2807. It continues. The slot antenna plate 2808 is positioned in contact with the dielectric plate 2809. Furthermore, the gas supply source 2801 is connected to the mode converter 2805 via the valve 2802. And the gas passes through the mode converter 2805, waveguide 2807 and dielectric plate 2809. Gas is supplied to chambers 2706b and 2706c via tube 2806. Furthermore, the vacuum pump 2817 is connected to the valve 2818 and exhaust port 2819. It has the function of exhausting gases, etc., from chamber 2706b and chamber 2706c. Furthermore, the high-frequency power supply 2816 is connected to the board holder 2812 via the matching box 2815. Connecting.
[0338] The substrate holder 2812 has the function of holding the substrate 2811. For example, substrate 2811 It has the function of electrostatically or mechanically chucking. Also, high-frequency power supply 2816 or It functions as an electrode to which power is supplied. It also has a heating mechanism 2813 inside. It has a function to heat the substrate 2811.
[0339] Vacuum pump 2817 can be used in various ways, such as dry pumps and mechanical booster pumps. Ion pumps, titanium sublimation pumps, cryopumps, or turbomolecular pumps These can be used. In addition, a cryotrap can be used in addition to the vacuum pump 2817. It is acceptable. Using a cryopump and cryotrap allows for efficient water exhaust. This is particularly preferable.
[0340] Furthermore, the heating mechanism 2813 may be a heating mechanism that uses, for example, a resistance heating element. Alternatively, by heat conduction or thermal radiation from a medium such as a heated gas, It may also be used as a heating mechanism. For example, GRTA (Gas Rapid Thermature) (Lamp Annealing) or LRTA (Lamp Rapid Thermal A RTA (Rapid Thermal Annealing) such as annealing This can be used. GRTA performs heat treatment using high-temperature gas. An inert gas is used.
[0341] Furthermore, the gas supply source 2801 is connected to the purifier via a mass flow controller. It is acceptable to use a gas with a dew point of -80°C or lower, preferably -100°C or lower. It is preferable to use oxygen gas, nitrogen gas, and noble gases (such as argon gas). Use it.
[0342] Examples of dielectric plates 2809 include silicon oxide (quartz) and aluminum oxide (aluminum oxide). Mina or yttrium oxide (yttria) can be used. Also, dielectric plate 28 Another protective layer may be formed on the surface of 09. The protective layer may be magnesium oxide. Zium, titanium dioxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, Dielectric plate: Silicon oxide, aluminum oxide, or yttrium oxide can be used. 2809 will be exposed to the particularly high-density region of the high-density plasma 2810, which will be described later. Therefore, damage can be mitigated by providing a protective layer. As a result, particles during processing This can suppress increases in the number of cases, etc.
[0343] The high-frequency generator 2803 can handle frequencies such as 0.3 GHz to 3.0 GHz, and 0.7 GHz. Generates microwaves between z and 1.1 GHz, or between 2.2 GHz and 2.8 GHz. It has the function of causing the microwaves generated by the high-frequency generator 2803 to be transmitted to the waveguide 2804. This is transmitted to the mode converter 2805 via [a certain method]. In the mode converter 2805, the TE mode is [a certain method]. The transmitted microwaves are converted to TEM mode. Then, the microwaves are transmitted through waveguide 280. It is transmitted to the slot antenna board 2808 via 7. The slot antenna board 2808 has multiple A slot hole is provided, and microwaves pass through the slot hole and the dielectric plate 2809. Then, an electric field is generated below the dielectric plate 2809, and the high-density plasma 2810 It can be generated. The high-density plasma 2810 is supplied from the gas supply source 2801. Depending on the type of gas, ions and radicals exist. For example, oxygen radicals exist. ru.
[0344] At this time, the substrate 2811 is exposed to ions and radicals generated in the high-density plasma 2810. This allows for modification of films on substrate 2811. Furthermore, the high-frequency power supply 2816 It may be preferable to apply a bias to the substrate 2811 side using the high-frequency power supply 28 16 includes, for example, RF (Radio Frequency) with frequencies such as 13.56MHz and 27.12MHz. A high frequency power supply can be used. By applying a bias to the circuit board, Ions in density plasma 2810 can efficiently reach deep into openings such as films on substrate 2811. It can be achieved.
[0345] For example, in chamber 2706b or chamber 2706c, gas supply source 2801 or By introducing oxygen, oxygen radical treatment using high-density plasma 2810 can be performed. can.
[0346] Next, the cross-sectional model of chambers 2706a and 2706d is shown in Figure 15. I will explain using a diagram.
[0347] Chambers 2706a and 2706d are, for example, used to expose the workpiece to electromagnetic waves. This is a chamber capable of firing. Note that chamber 2706a and chamber 2 The only difference between the 706d and this model is the type of electromagnetic wave they use. Other components are the same. Since there is a lot of information, the following explanation will be summarized.
[0348] Chambers 2706a and 2706d are one or more lamps 2820 It also includes a substrate holder 2825, a gas inlet 2823, and an exhaust port 2830. Outside of chambers 2706a and 2706d, etc., there is a gas supply source 2821 Valve 2822, vacuum pump 2828, and valve 2829 are provided.
[0349] The gas supply source 2821 is connected to the gas inlet 2823 via a valve 2822. The vacuum pump 2828 is connected to the exhaust port 2830 via valve 2829. 2820 is positioned opposite the board holder 2825. The board holder 2825 is It has the function of holding the substrate 2824. The substrate holder 2825 also has a heating mechanism inside. It has a component 2826 and a function to heat the substrate 2824.
[0350] Lamp 2820, for example, has a function that emits electromagnetic waves such as visible light or ultraviolet light. Any light source with the necessary properties can be used. For example, wavelengths between 10 nm and 2500 nm, and between 500 nm. It emits electromagnetic waves with a peak above 2000 nm or below, or between 40 nm and 340 nm. A light source with the necessary functionality should be used.
[0351] For example, lamp 2820 could be a halogen lamp, a metal halide lamp, or a xenon lamp. Arc lamps, carbon arc lamps, high-pressure sodium lamps, or high-pressure mercury lamps, etc. You can use this light source.
[0352] For example, some or all of the electromagnetic waves emitted from lamp 2820 are transmitted to substrate 2824 By being absorbed, the film on the substrate 2824 can be modified. For example, the birth of defects It is possible to create or reduce impurities, or remove them. Note that while heating the substrate 2824 This process allows for efficient generation or reduction of defects, or removal of impurities.
[0353] Alternatively, for example, electromagnetic waves emitted from lamp 2820 may affect the substrate holder 2825 The circuit board 2824 may be heated by adding heat to the inside of the circuit board holder 2825. It is not necessary to have a thermal mechanism 2826.
[0354] For vacuum pump 2828, refer to the description for vacuum pump 2817. Also, heating machine Structure 2826 refers to the description of the heating mechanism 2813. Also, gas supply source 2821 See the description for gas source 2801.
[0355] By using the above manufacturing equipment, it is possible to suppress the contamination of the workpiece with impurities while modifying the film. This will become possible.
[0356] <Modified examples of semiconductor devices> In the following, using Figures 16A to 16D, an example of a semiconductor device according to one aspect of the present invention will be shown. I will explain about that.
[0357] Figure 16A shows a top view of the semiconductor device. Figure 16B shows the same A1-A2 as shown in Figure 16A. This is a cross-sectional view corresponding to the area indicated by the dashed line in Figure 16A. Also, Figure 16C is a cross-sectional view corresponding to A3-A in Figure 16A. This is a cross-sectional view corresponding to the area indicated by the dashed line in 4. Also, Figure 16D is a cross-sectional view of Figure 16A with A5- This is a cross-sectional view corresponding to the area indicated by the dashed line in A6. In the top view of Figure 16A, the diagram is clarified. Some elements have been omitted for this reason.
[0358] Furthermore, in the semiconductor device shown in Figures 16A to 16D, the <Example of Semiconductor Device Configuration> is shown Structures having the same function as the structures constituting the semiconductor device described above will be denoted by the same reference numeral. Regarding the components of semiconductor devices, the materials used are explained in detail in the section <Examples of Semiconductor Device Configurations>. The materials used can be used.
[0359] The semiconductor devices shown in Figures 16A to 16D are variations of the semiconductor devices shown in Figures 1A to 1D. This is an example. The semiconductor device shown in Figures 16A to 16D is the same as the semiconductor device shown in Figures 1A to 1D. The body device differs in that it contains oxide 230c and oxide 230d. Furthermore, it is an insulator. It differs in that it has elements 271, an insulator 272, and an insulator 273.
[0360] In the semiconductor device shown in Figures 16A to 16D, transistor 200a and transistor In 200b, oxide 230c on oxide 230b and oxide on oxide 230c It has 230d and, respectively. Oxide 230c and oxide 230d are insulator 280 and are provided in the openings formed in the insulator 275. In addition, oxide 230c is an insulator Top surface of body 224, side surface of oxide 230a, top surface and side surface of oxide 230b, oxide 24 Side of 3, side of conductor 242, side of insulator 271, side of insulator 273, insulator 27 It is in contact with the side of 5 and the side of the insulator 280, respectively. Also, the top of the oxide 230c The uppermost part of the oxide 230d is in contact with the insulator 282.
[0361] By placing oxide 230d on top of oxide 230c, above oxide 230d Diffusion of impurities from the structure formed therein into oxide 230b or oxide 230c This can be suppressed. Also, by placing oxide 230d on top of oxide 230c Therefore, upward diffusion of oxygen from oxide 230b or oxide 230c can be suppressed. .
[0362] Furthermore, in a cross-sectional view of the transistor in the channel length direction, grooves are provided in the oxide 230b. It is preferable to embed oxide 230c in the groove. At this time, oxide 230c is It is positioned to cover the inner wall (side wall and bottom surface) of the groove. Also, oxide 230c The film thickness is preferably about the same as the depth of the groove. When forming an opening for embedding the conductor 260, the oxide 2 at the bottom of the opening Even if a damaged area is formed on the surface of 30b, the damaged area can be removed. This makes it possible to suppress electrical defects in transistor 200 caused by the damaged area. .
[0363] Here, the atomic ratio of In to element M in the metal oxide used for oxide 230c However, in the metal oxide used in oxide 230a or oxide 230d, with respect to element M It is preferable that the atomic ratio is greater than that of In.
[0364] Furthermore, if oxide 230c is the primary carrier pathway, Therefore, the atomic ratio of indium to the main component metal element in oxide 230b is, It is preferable that the atomic ratio of indium to the main metal element is greater than that of the main metal element. In oxide 230c, the atomic ratio of In to element M is the same as in oxide 230b, It is preferable that the atomic ratio of In to element M is greater than that of gold with a high indium content. By using a specific oxide in the channel formation region, the on-current of the transistor can be increased. Yes, it is possible. Therefore, in oxide 230c, the relationship between indium and the main metal element is The atomic ratio is the ratio of indium atoms to the main metal element in oxide 230b. By making the ratio greater than the numerical ratio, oxide 230c can be made the primary carrier pathway. Furthermore, the lower end of the conduction band of oxide 230c is the conduction band of oxide 230a and oxide 230b. It is preferable that the lower edge of the band is further away from the vacuum level. In other words, the electric field of oxide 230c The electron affinity is preferably greater than the electron affinity of oxides 230a and 230b. i. In this case, the main carrier pathway is oxide 230c.
[0365] Specifically, as oxide 230c, In:M:Zn = 4:2:3 [atomic ratio] or This refers to compositions in the vicinity of that, In:M:Zn=5:1:3 [atomic ratio] or compositions in the vicinity of that, Alternatively, metal oxides with a composition of In:M:Zn = 10:1:3 [atomic ratio] or close to it. Using indium oxide or similar materials is recommended.
[0366] Furthermore, it is preferable to use CAAC-OS as oxide 230c, and oxide 230 The c-axis of the crystal of c is oriented in a direction approximately perpendicular to the surface or top surface of the oxide 230c. It is preferable that CAAC-OS has the property of easily moving oxygen in the direction perpendicular to the c-axis. It has such properties. Therefore, it efficiently supplies the oxygen contained in oxide 230c to oxide 230b. It is possible.
[0367] Furthermore, oxide 230d is a metal element that makes up the metal oxide used in oxide 230c. Preferably, it contains at least one of the metal elements, and more preferably, it contains all of them. For example, as oxide 230c, In-M-Zn oxide, In-Zn oxide, or In Using zinc oxide, as oxide 230d, In-M-Zn oxide, M-Zn oxide, Alternatively, an oxide of element M may be used. This will produce oxide 230c and oxide 230d. The defect level density at the interface can be reduced.
[0368] Furthermore, the lower end of the conduction band of oxide 230d is closer to the vacuum level than the lower end of the conduction band of oxide 230c. It is preferable that the electron affinity of oxide 230d is equal to the electron affinity of oxide 230c. It is preferable that it is smaller than the affinity of the offspring. In this case, oxide 230d is also oxide 230a It is preferable to use a metal oxide that can be used for oxide 230b. The primary carrier pathway is oxide 230c.
[0369] Specifically, as oxide 230c, In:M:Zn = 4:2:3 [atomic ratio] or This refers to compositions in the vicinity of that, In:M:Zn=5:1:3 [atomic ratio] or compositions in the vicinity of that, Alternatively, metal oxides with a composition of In:M:Zn = 10:1:3 [atomic ratio] or close to it. Alternatively, indium oxide can be used. Also, as oxide 230d, In:M: Zn = 1:3:4 [atomic ratio] or a composition close to that, M:Zn = 2:1 [atomic ratio] Or a composition in the vicinity of that, or M:Zn=2:5 [atomic ratio] or a composition in the vicinity of that. A metal oxide or an oxide of element M may be used. Note that the nearby composition refers to the desired composition. It includes a range of ±30% of the atomic ratio. Furthermore, it is preferable to use gallium as element M. stomach.
[0370] Furthermore, oxide 230d is a metal that suppresses oxygen diffusion or permeation more effectively than oxide 230c. It is preferable that it be an oxide. Oxide 230d is placed between the insulator 250 and oxide 230c. By providing this, oxygen can be efficiently supplied to oxide 230b via oxide 230c. It is possible.
[0371] Furthermore, in the metal oxide used in oxide 230d, the I250 is the main component of the metal element. The atomic ratio of n is the same as that of the main metal element in the metal oxide used in oxide 230c. By making the atomic ratio of In smaller than that of In, the diffusion of In towards the insulator 250 is suppressed. This can be done. For example, in oxide 230d, the atomic ratio of In to element M is The ratio should be smaller than the atomic ratio of In to element M in oxide 230c. Body 250 functions as a gate insulator, so if In gets mixed into insulator 250, This results in a transistor characteristic defect. Therefore, between the oxide 230c and the insulator 250 By providing oxide 230d, it becomes possible to provide a highly reliable semiconductor device.
[0372] Note that oxide 230c may be provided for each transistor 200. The oxide 230c of transistor 200 and the transistor adjacent to the transistor 200 in the channel width direction. It is not necessary for the oxide 230c of transistor 200 to come into contact with it. Also, the acid of transistor 200 The material 230c and the transistor 20 adjacent to the transistor 200 in the channel width direction The oxide 230c of 0 may be separated. In other words, the oxide 230c is transient. A transistor 200 and a transistor 200 adjacent to the said transistor 200 in the channel width direction. It is also acceptable to have a configuration where it is not placed between them.
[0373] In a semiconductor device in which multiple transistors 200 are arranged in the channel width direction, With this configuration, oxide 230c is provided independently for each transistor 200. Therefore, transistor 200 and the transistor adjacent to it in the channel width direction The formation of parasitic transistors between the transistor 200 and the above-mentioned leak path is suppressed. This can suppress the occurrence of [unclear]. Therefore, it has good electrical properties and miniaturization Alternatively, it is possible to provide a semiconductor device that can be highly integrated.
[0374] Furthermore, the semiconductor device shown in Figures 16A to 16D has an insulator 271 on a conductor 242, Insulator 273 on insulator 271, side surface of oxide 230b, side surface of oxide 243, and It has an insulator 272 in contact with the side surface of the conductor 242.
[0375] The insulator 271 preferably functions as a barrier insulating film against oxygen. Therefore, it is preferable that the insulator 271 has the function of suppressing the diffusion of oxygen. For example, it is preferable that the insulator 271 has a function that suppresses oxygen diffusion more than the insulator 280. It seems so. As the insulator 271, for example, a silicon-containing nitride such as silicon nitride can be used. Just be there.
[0376] Insulator 273, like insulator 224, may have an excess oxygen region or excess oxygen. It is preferable that the concentration of impurities such as water and hydrogen in the insulator 273 is reduced. For example, insulator 273 contains silicon such as silicon oxide and silicon oxide nitride. Any suitable oxide may be used. An insulator having excess oxygen is provided in contact with the insulator 250. As a result, oxygen diffused into the oxide 230 via the insulator 250, This reduces defects and improves the reliability of transistor 200.
[0377] The insulator 272 preferably functions as at least a barrier insulating film against oxygen. Therefore, it is preferable that the insulator 272 has a function of suppressing the diffusion of oxygen. For example Preferably, the insulator 272 has a function that suppresses oxygen diffusion more than the insulator 280. For example, silicon nitride such as silicon nitride can be used as the insulator 272. That's all you need to do.
[0378] By providing the insulators 271 and 272 described above, a barrier property against oxygen is achieved. The conductor 242 can be wrapped in an insulator having the properties of the insulator 275. In other words, when the insulator 275 is formed... This prevents the added oxygen, or the oxygen contained in the insulator 273, from diffusing into the conductor 242. This allows for the addition of oxygen during the formation of the insulator 275, or the insulator 27 The oxygen contained in 3 directly oxidizes the conductor 242, increasing its resistivity, and the ON-EV This can suppress the reduction in flow.
[0379] In addition, in Figure 1B and other figures, the insulator 272 is made of oxide 230a, oxide 230b, and oxide Regarding the configuration in contact with the side surfaces of material 243, conductor 242, insulator 271, and insulator 273 As shown, the insulator 272 is in contact with at least the sides of the insulator 271 and the conductor 242. It is sufficient if the insulator 272 contains oxide 230a, oxide 230b, and oxide 243 The configuration is such that it is in contact with the sides of the conductor 242 and the insulator 271, but not in contact with the insulator 273. This can also happen. In this case, the side surface of the insulator 273 will be in contact with the insulator 275.
[0380] According to one aspect of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. It is possible. Alternatively, according to one aspect of the present invention, a semiconductor device with a large memory capacity can be provided. It is possible. Alternatively, according to one aspect of the present invention, a semiconductor device with less variation in transistor characteristics is provided. This can provide a reliable semiconductor device. Alternatively, according to one aspect of the present invention, It can be provided. Or, according to one aspect of the present invention, a semiconductor having good electrical properties. An apparatus can be provided. Alternatively, according to one aspect of the present invention, a semiconductor with a high on-current can be provided. An apparatus can be provided. Alternatively, according to one aspect of the present invention, miniaturization or high integration can be performed. A semiconductor device can be provided. Alternatively, according to one aspect of the present invention, a low-power semiconductor device can be provided. A semiconductor device can be provided. Alternatively, according to one aspect of the present invention, a novel semiconductor device can be provided. We can provide a place for you.
[0381] The configurations and methods described in this embodiment are not representative of other configurations, methods, etc. This can be used in appropriate combination with the configurations, methods, etc. shown in the embodiments.
[0382] (Embodiment 2) In this embodiment, one form of a semiconductor device that can be used as a memory device is shown in Figure 17. Further explanation will be provided using Figure 22.
[0383] [Storage device 1] An example of a semiconductor device (memory device) according to one aspect of the present invention is shown in Figure 17A. In this semiconductor device, a capacitive element 100a is placed on top of a transistor 200a, and the transistor Capacitive element 100b is placed on top of 200b. Note that in the following, capacitive element 100 Sometimes, elements a and 100b are collectively referred to as the capacitive element 100.
[0384] As transistors 200a and 200b, they are as described in the previous embodiment. Transistors 200a and 200b can be used. That is, Figure 1 The semiconductor device shown in 7A has a capacitive element 100a and a capacitive element on top of the semiconductor device shown in Figure 1. This configuration includes transistor 100b. Note that transistors 200a and 200 Regarding the configuration of b, the transistor 200a and the transistor shown in the previous embodiment are used. The description related to Ta200b can be taken into consideration.
[0385] Here, one of the sources and drains of transistor 200a is connected to the capacitive element 100a. The first electrode is electrically connected, and the source and drain of transistor 200a are , electrically connected to either the source or drain of transistor 200b, The source and drain of 200b are electrically connected to the first electrode of the capacitive element 100b. They are connected. Transistor 200a and capacitive element 100a are connected in this manner, and Transistor 200b and capacitive element 100b function as memory cells of the memory device, respectively. This can be done. Therefore, in the following, transistor 20 as shown in Figure 17A 0a, transistor 200b, capacitive element 100a, and semiconductor having capacitive element 100b The device is sometimes referred to as the memory unit 400.
[0386] In the memory unit 400, by providing the conductor 248 under the oxide 230, To reduce the parasitic capacitance of the electroluminescent body 248 and the bit lines provided in contact with the conductor 248. This makes it possible. As a result, the capacitance required for the capacitive element 100 is reduced, and the capacitance element 10 The 0 can be miniaturized. For example, if the capacitive element 100a is superimposed on the transistor 200a Therefore, the capacitive element 100b should be superimposed on the transistor 200b. In this way, the capacitive element By miniaturizing the 100, it becomes possible to miniaturize or highly integrate the memory unit 400. It is possible. Furthermore, by miniaturizing or highly integrating the memory unit 400, the storage capacity can be increased. We can provide large semiconductor devices.
[0387] Furthermore, in the memory unit 400, the conductor 248 is provided beneath the oxide 230. Then, the capacitive elements 100a and 100b and the removal plastic of the memory unit 400 This prevents interference. This increases the occupied area of the memory unit 400. Without adding any additional charge, the capacitance of capacitive elements 100a and 100b can be increased. Cut.
[0388] The capacitive element 100 is provided on the insulator 283. The capacitive element 100 has a first electrode and A conductor 110 that functions as a second electrode, a conductor 120 that functions as a second electrode, and a dielectric It has an insulator 130 that functions as such.
[0389] Conductors 110 and 120 can be used as conductor 205, etc. A conductor can be used. Note that in Figure 17, conductors 110 and 120 are single-layered. Although the structure is shown, it is not limited to this configuration, and a laminated structure of two or more layers is also acceptable. For example, a barrier Between a conductor with properties and a highly conductive conductor, a conductor with barrier properties and a conductive A conductor with high adhesion to a conductor with high conductivity may be formed.
[0390] Furthermore, the insulator 130 may be, for example, silicon oxide, silicon oxide nitride, or silicon oxide nitride. Silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, nitrile Aluminum oxide, hafnium oxide, hafnium oxide nitride, hafnium oxide nitride, hafnium nitride It can be made using materials such as nium, and can be constructed in layers or as a single layer.
[0391] For example, the insulator 130 may contain a material with high dielectric strength, such as silicon oxynitride, and a high dielectric strength material. It is preferable to use a laminated structure with a high-k material. With this configuration, the capacity element Child 100 has a high dielectric constant (high-k) insulator, which ensures sufficient capacitance. By having an insulator with high dielectric strength, the dielectric strength is improved, and the electrostatic discharge of the capacitive element 100 is reduced. It can suppress damage.
[0392] Furthermore, as an insulator of high-dielectric constant (high-k) materials (materials with a high relative permittivity), Having gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxides, aluminum and hafnium-containing oxides and nitrides, silicon and hafnium Oxides having silicon and hafnium, or silicon and hafnium oxides and Examples include nitrides containing humium.
[0393] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and nitrogen oxide. Silicon oxide, silicon nitride, silicon nitride, silicon oxide with added fluorine, carbon Silicon oxide with added carbon and nitrogen, silicon oxide with voids It may be made of concrete or resin.
[0394] Also, a plug for electrically connecting transistor 200a and capacitive element 100a, and A conductor that functions as a plug to electrically connect the transistor 200b and the capacitive element 100b. 240 will be provided.
[0395] As shown in Figure 17A, a guide is provided between the transistor 200a and the capacitive element 100a. The electric body 240 has its lower surface in contact with the conductor 242a and its upper surface in contact with the conductor 110 of the capacitive element 100a. They make contact. Also, the conductor 240 is provided between the transistor 200b and the capacitive element 100b. The lower surface is in contact with the conductor 242c, and the upper surface is in contact with the conductor 110 of the capacitive element 100b. Furthermore, an insulator 241 is provided in contact with the side surface of the conductor 240 which functions as a plug. It is preferable.
[0396] In contact with the inner wall of the opening of insulator 275, insulator 280, insulator 282, and insulator 283 An insulator 241 is provided, and the first conductor of the conductor 240 is in contact with the side surface of the insulator 241. A second conductive material, the conductive material 240, is provided further inside. This configuration involves stacking the first conductor and the second conductor of the conductor 240. As shown, the present invention is not limited thereto. For example, the conductor 240 is a single layer Alternatively, it may be configured as a laminated structure of three or more layers.
[0397] Conductor 240 is a conductive material mainly composed of tungsten, copper, or aluminum. It is preferable to use it. Also, the conductor 240 may have a laminated structure. When a layered structure is used, the insulators 283, 282, 280, and 275 are used. The conductive material used in contact with the device is one that has the function of suppressing the permeation of impurities such as water and hydrogen. It is preferable that they be present. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium It is preferable to use materials such as ruthenium oxide. Furthermore, the permeability of impurities such as water and hydrogen is controlled. The conductive material having the function of suppression may be used in a single layer or a multilayer structure. This provides insulation. Impurities such as water and hydrogen contained in the upper layer above body 283 pass through the conductor 240 to oxide 23 This can prevent contamination of the value with 0.
[0398] Examples of insulator 241 include silicon nitride, aluminum oxide, and silicon nitride oxide. Insulators such as the above can be used. Insulator 241 is an insulator of insulator 283, insulator 282, and Since it is provided in contact with the edge 275, impurities such as water and hydrogen contained in the insulator 280 However, it is possible to suppress the mixing of nitrogen into the oxide 230 through the conductor 240. In particular, nitrogen Silicon is suitable because it has high barrier properties against hydrogen. Furthermore, it is included in insulator 280. This prevents the oxygen from being absorbed by the conductor 240.
[0399] Also, as shown in Figure 17B, the memory unit 400 and the same as the memory unit 400 Memory units 401 having the above configuration may be arranged in the channel length direction.
[0400] The semiconductor device shown in Figure 17B has an insulator 210 provided below the insulator 212, and an insulator 2 A conductor 288 is provided below 10. The upper surface of the conductor 288 is the memory unit 40 0 is in contact with the lower surface of the conductor 248 of the memory unit 401. Here, the insulator 21 For 2, any insulator that can be used for insulator 280 is acceptable. Also, the conductor 288 is Any conductor suitable for use in the conductor 205 may be used.
[0401] The conductor 288 functions as wiring. That is, memory unit 400 and memory unit Each of the wires 401 is electrically connected to the conductor 288, which functions as wiring, via the conductor 248. They are directly connected.
[0402] Here, conductor 288 functions as a bit line and conductor 26 functions as a word line. It is preferable that the 0s are arranged orthogonally. In the region where the conductor 288 and the conductor 260 intersect A transistor 200 and a capacitive element 100 are formed, and the transistor 200 and Memory cells, each consisting of 100 capacitive elements, are arranged in a matrix.
[0403] In this way, by arranging memory units in a matrix on the same layer, a cell array ( It can form a cell array, also called a memory unit layer. By doing so, the spacing between adjacent cells can be reduced, thus reducing the projected area of the cell array. It can be made smaller, enabling high integration.
[0404] [Storage device 2] Next, Figure 18 shows an example of a semiconductor device (memory device) according to one aspect of the present invention. In one embodiment, the semiconductor device, as shown in Figure 17A, has a memory unit 400 and a transistor 300. It is located above. In other words, above transistor 300, transistor 200a is located above transistor 300. A transistor 200b is provided, and transistors 200a and 200 Capacitive elements 100a and 100b are provided above b. As 100 and transistor 200, the capacitive element 100 and transistor 200 are as described above. The Ta200 can be used, allowing for detailed consideration of the structure.
[0405] Transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. It is a transistor. Transistor 200 is used in memory devices because it has a low off-current. This makes it possible to retain memory content for a long period of time. In other words, refresh Because it does not require any operation, or because the refresh operation is performed very infrequently, the memory Power consumption can be significantly reduced.
[0406] Furthermore, as described in the previous embodiment, metal oxides such as In-M-Zn oxide are... The film can be formed on the substrate using methods such as puttering. The drive circuit, which consists of the assembled transistor 300, is then stacked on top of the transistor 2 A memory unit 400 can be provided, which is formed by 00 and capacitive elements 100, etc. This reduces the area occupied by peripheral circuits on a single chip, and the memory cell array By increasing the occupied area, the memory capacity of semiconductor devices can be increased.
[0407] Furthermore, the memory device shown in Figure 18, when arranged in a matrix, allows the memory cell array to function as a memory cell array. It can be configured.
[0408] <Transistor 300> The transistor 300 is provided on the substrate 311 and has a conductor 316 that functions as a gate. , an insulator 315 that functions as a gate insulator, and a semiconductor region 31 which is part of the substrate 311 3, and a low-resistance region 314a that functions as a source region or drain region, and low It has a resistive region 314b. Transistor 300 is either a p-channel or n-channel type. Any type is acceptable.
[0409] Here, the transistor 300 shown in Figure 18 is in the semiconductor region 313 where the channel is formed. A portion of the substrate 311 has a convex shape. In addition, the side and top surfaces of the semiconductor region 313 are made of an insulating material. The conductive material 316 is provided so as to cover the edge 315. Materials that adjust the work function may be used. Such a transistor 300 is on a semiconductor substrate. It is also called a FIN-type transistor because it utilizes a protruding part. Furthermore, it may have an insulator that functions as a mask for forming the protrusion. This example shows a case where a protrusion is formed by processing a part of a semiconductor substrate, but when processing an SOI substrate... A semiconductor film having a convex shape may be formed.
[0410] Note that the transistor 300 shown in Figure 18 is just one example, and its structure is not limited to that example. A suitable transistor should be used depending on the configuration and driving method.
[0411] <Wiring layer> Between each structure, there is a wiring layer containing interlayer membranes, wiring, and plugs. This is also possible. Furthermore, multiple wiring layers can be provided depending on the design. Here, the plug In the case of a conductor that functions as wiring, where multiple structures are grouped together and assigned the same code, There is a possibility of this occurring. Furthermore, in this specification, etc., the wiring and the plug that electrically connects to the wiring are integrated. It may also be an object. That is, when a part of the conductor functions as wiring, and the conductor Some parts may function as plugs.
[0412] For example, on transistor 300, there are insulators 320, 322, and an insulator as interlayer films. The edge body 324 and the insulator 326 are arranged in order in stacked layers. Also, the insulator 320, Insulators 322, 324, and 326 contain capacitive elements 100 or transients Conductors 328 and 330, etc., which are electrically connected to the sta 200, are embedded within. Furthermore, conductors 328 and 330 function as plugs or wiring.
[0413] Furthermore, the insulator, which functions as an interlayer film, acts as a planarizing film that covers the uneven shape beneath it. It may function. For example, the upper surface of the insulator 322 may be chemically and mechanically polished to improve flatness. The surface may be flattened by a flattening treatment such as the CMP method.
[0414] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, as shown in Figure 18. Insulators 350, 352, and 354 are arranged in a stacked manner. Furthermore, a conductor 356 is formed on insulators 350, 352, and 354. Conductor 356 functions as a plug or wiring.
[0415] An insulator 358 is provided on the insulator 354 and the conductor 356, and on the insulator 358 A conductive material 288 that functions as wiring is provided. Furthermore, an insulating material is placed on top of the conductive material 288. An edge body 210 is provided. On the insulator 210, as shown in the previous embodiment, an insulator 212, Insulator 214, Insulator 216, Insulator 222, Insulator 224, Insulator 280, Insulator 28 2 and an insulator 283 are provided, and a transistor 200a and Transistor 200b is formed.
[0416] Insulator 210, insulator 212, insulator 214, insulator 216, insulator 222 and insulation Body 224 has a conductor 248 and an insulator 249 embedded in it. Here, the conductor 2 48 is provided in contact with the upper surface of the conductor 288.
[0417] Furthermore, as described above, the conductor 240 functions as a plug, in contact with the upper surface of the conductor 242. A plug is provided. Furthermore, an insulator 241 is in contact with the side surface of the conductor 240 which functions as a plug. It is provided. Also, on the insulator 283 and on the conductor 240, in contact with the conductor 240 A conductor 110 is provided. Also, in a region on the insulator 283 that does not overlap with the insulator 280 An insulator 274 is provided.
[0418] The capacitive elements 100a and 100b described above are formed on the insulator 283. Furthermore, on the conductor 120 and the insulator 130 that form the capacitive element 100, A rim 150 is provided.
[0419] Insulators that can be used as interlayer films include insulating oxides, nitrides, and acids. Examples include nitrides, nitride oxides, metal oxides, metal oxide nitrides, and metal nitride oxides.
[0420] For example, by using a material with a low dielectric constant for the insulator that functions as an interlayer film, wiring The parasitic capacitance that occurs between them can be reduced. Therefore, depending on the function of the insulator, the material You should choose this option.
[0421] For example, insulator 150, insulator 274, insulator 210, insulator 358, insulator 352, And it is preferable that the insulator 354 etc. has an insulator with a low relative permittivity. For example, The insulator is silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, and carbon. Silicon oxide with added carbon and nitrogen, silicon oxide with voids It is preferable that the insulator has a resin or the like. Alternatively, the insulator may be silicon oxide, acid Silicon nitride, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon silicon oxide with added elements, silicon oxide with added carbon and nitrogen, or silicon oxide with vacancies It is preferable to have a laminated structure of silicon oxide and resin. Because silicon dioxide is thermally stable, when combined with resin, it becomes thermally stable and ductile. A laminated structure with low electrical conductivity can be achieved. Examples of resins include polyester and polio. Refine, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, This includes acrylic, etc.
[0422] Furthermore, transistors using oxide semiconductors suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has a controlling function, the electrical characteristics of the transistor are stabilized. Therefore, insulator 283, insulator 282, insulator 214, insulator 212 and Insulator 350, etc., is an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. You can use it.
[0423] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include, Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Element, argon, gallium, germanium, yttrium, zirconium, lanthanum, neo An insulator containing zym, hafnium, or tantalum may be used in a single layer or in a multilayer configuration. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide Umium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tan oxide Metal oxides such as tar, silicon nitride, or silicon nitride can be used. .
[0424] Conductors that can be used in wiring and plugs include aluminum, chromium, copper, and silver. Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanilla Dium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metallic elements selected from thenium and others can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements like nitrates, Silicides such as nickel silicide may also be used.
[0425] For example, conductor 328, conductor 330, conductor 356, conductor 288, conductor 110, And the conductor 120 etc. may be a metal material, alloy material, or metal nitride formed from the above materials. Conductive materials such as solid materials or metal oxide materials can be used in a single layer or in a laminated form. It is possible. By using high-melting-point materials such as tungsten and molybdenum that offer both heat resistance and conductivity. It is preferable to use aluminum or copper. It is preferable to form it with a low-resistance conductive material. By using a low-resistance conductive material, wiring resistance It can be lowered.
[0426] <Wiring or plugs in layers containing oxide semiconductors> Furthermore, when an oxide semiconductor is used for transistor 200, excess near the oxide semiconductor An insulator having an oxygen region may be provided. In that case, the insulator having the excess oxygen region A barrier-type insulator is provided between the insulator having the excess oxygen region and the conductor. It is preferable to provide one.
[0427] For example, in Figure 18, an insulating material is placed between the insulator 280, which has excess oxygen, and the conductor 240. It is preferable to provide body 241. Insulator 241, insulator 275, insulator 282, and insulator By being provided in contact with 283, the insulator 224 and transistor 200 have burrs. The structure can be sealed with an insulating material having a property called ion.
[0428] In other words, by providing the insulator 241, the excess oxygen in the insulator 280 is absorbed by the conductor 24 Absorption to 0 can be suppressed. Also, by having an insulator 241, impurities can be suppressed. This suppresses the diffusion of hydrogen, which is a substance, into the transistor 200 via the conductor 240. It is possible.
[0429] Furthermore, the insulator 241 is designed to suppress the diffusion of impurities such as water or hydrogen, and oxygen. It is preferable to use an insulating material that has the function of [doing something]. For example, silicon nitride, silicon nitride oxide, It is preferable to use aluminum oxide or hafnium oxide. In particular, silica nitride N is preferred because it has high barrier properties against hydrogen. In addition, other options include, for example, magnesium oxide. Glulium oxide, germanium oxide, yttrium oxide, zirconium oxide, ranium oxide Metal oxides such as tan, neodymium oxide, or tantalum oxide can be used.
[0430] Furthermore, as shown in Figure 18, the insulator 280 and the like are patterned, and the insulator 212 and the insulator are patterned. The edge 283 may be in contact with the insulator 212. The configuration may be sealed with insulators 214, 282, and 283. By using such a configuration, hydrogen contained in insulator 274, insulator 150, etc., enters insulator 28 This can reduce the amount of contamination in values such as 0.
[0431] Here, the conductor 240 penetrates the insulator 283 and the insulator 282, but as described above As such, the insulator 241 is provided in contact with the conductor 240. Through this, the inside of insulators 212, 214, 282, and 283 is mixed The amount of hydrogen introduced can be reduced. In this way, insulator 212, insulator 214, The transistor 200 is sealed with the edge body 282, the insulator 283, and the insulator 241. This reduces the intrusion of impurities such as hydrogen contained in 274 from the outside.
[0432] <Dicing line> In the following, by dividing a large-area substrate into semiconductor elements, multiple semiconductor devices are created. Dicing lines (scribe lines, division lines) are provided when extracting chips. This explains the cutting line (which may also be called the cutting line). For example, the method of division is... First, grooves (dicing lines) are formed in the substrate to divide the semiconductor elements, In some cases, the semiconductor device may be cut during grinding, resulting in its division into multiple semiconductor devices.
[0433] Here, for example, as shown in Figure 18, the region where the insulator 283 and the insulator 212 are in contact. It is preferable to design it so that it overlaps with the dicing line. In other words, multiple memory units Near the region that will become the dicing line on the outer edge of the 400, the insulator 282 , insulator 280, insulator 275, insulator 224, insulator 222, insulator 216, and insulator An opening is provided in the edge 214.
[0434] In other words, insulator 282, insulator 280, insulator 275, insulator 224, insulator 222, In the openings provided in the insulator 216 and the insulator 214, the insulator 212 and the insulator 28 3 is in contact with each other. For example, at this time, the insulator 212 and the insulator 283 are made of the same material and by the same method. They may be formed using the same material and method. Insulator 212 and insulator 283 may be formed using the same material and method. By providing this, adhesion can be improved. For example, silicon nitride is preferred. It seems so.
[0435] With this structure, insulators 212, 214, 282, and 283 , can enclose transistor 200. Insulator 212, insulator 214, insulator 2 82, and at least one of the insulators 283, have the function of suppressing the diffusion of oxygen, hydrogen, and water. Because it has, for each circuit region where the semiconductor element shown in this embodiment is formed, the substrate By dividing the substrate, even if it is processed into multiple chips, hydrogen or This prevents impurities such as water from contaminating the transistor 200 and diffusing into it.
[0436] Furthermore, this structure allows excess oxygen from the insulators 280 and 224 to diffuse to the outside. This can be prevented. Therefore, excess oxygen in insulator 280 and insulator 224 The acid is efficiently supplied to the oxide that forms the channel in transistor 200. This reduces oxygen vacancies in the oxide that form the channel in transistor 200. This allows the channel in transistor 200 to be formed in the oxide. This allows for the creation of an oxide semiconductor with a low defect level density and stable properties. In other words, This suppresses fluctuations in the electrical characteristics of transistor 200 and improves its reliability. ru.
[0437] Note that in the storage devices shown in Figures 17 and 18, capacitive element 100a and capacitive element 1 Although the shape of 00b is described as planar, the storage device shown in this embodiment is not limited to this. No. For example, as shown in Figure 19, capacitive elements 100a and 100b The shape may be cylindrical. Note that the memory device shown in Figure 19 is below the insulator 150. The configuration is the same as that of the semiconductor device shown in Figure 18.
[0438] Capacitive elements 100a and 100b shown in Figure 19 are located on the insulator 130. 50, an insulator 142 on the insulator 150, and formed on the insulator 150 and the insulator 142 A conductor 115 is placed inside the opening, and an insulator 1 is placed on the conductor 115 and the insulator 142. 45, the conductor 125 on the insulator 145, and the insulator on the conductor 125 and the insulator 145 It has 152 and, respectively. Here, two formed on the insulator 150 and the insulator 142 A conductor 115, an insulator 145, and at least a portion of the conductor 125 are arranged within the opening. It is placed there. Also, an insulator 154 is placed on the insulator 152, and a conductor 1 is placed on the insulator 154. 53 and insulator 156 are arranged. Also, insulators 152 and 154 are formed A conductive material 140 is provided inside the opening.
[0439] The conductor 115 functions as the lower electrode of the capacitive element 100, and the conductor 125 functions as the lower electrode of the capacitive element 10 The insulator 145 functions as the upper electrode of 0 and as the dielectric of the capacitive element 100. The capacitive element 100 has openings in the insulators 150 and 142, not only on the bottom surface, On the side, the upper electrode and the lower electrode are arranged facing each other with a dielectric in between, The capacitance per unit area can be increased. Therefore, increasing the depth of the opening will increase the capacitance per unit area. This allows the capacitance of the capacitive element 100 to be increased. By increasing the capacitance per unit area, it is possible to miniaturize or highly integrate semiconductor devices. This can be used to advance it.
[0440] Insulator 152 may be any insulator that can be used for insulator 280. The edge 142 functions as an etching stopper when forming an opening in the insulator 150. Preferably, any insulator that can be used for the insulator 214 may be used.
[0441] The shape of the openings formed in the insulators 150 and 142, when viewed from above, is rectangular. It may be a polygon other than a quadrilateral, or a polygon with curved corners. It may be a shape, or it may be a circular shape including an ellipse. Here, in a top view, the opening It is preferable to have a large overlapping area between the port and transistor 200. This reduces the occupied area of the semiconductor device having the capacitive element 100 and the transistor 200. It is possible.
[0442] The conductor 115 is positioned in contact with the openings formed in the insulator 142 and the insulator 150. The upper surface of the conductor 115 is preferably substantially the same as the upper surface of the insulator 142. The lower surface of the conductor 115 is in contact with the conductor 110 through an opening in the insulator 130. 5 is preferably formed using the ALD method or CVD method, for example, conductor 2 Any conductive material suitable for 05 should be used.
[0443] The insulator 145 is positioned to cover the conductor 115 and the insulator 142. For example, It is preferable to deposit the insulator 145 using the ALD method or CVD method. 45 is, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, Zirconium oxide, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, Aluminum nitride, hafnium oxide, hafnium oxide nitride, hafnium oxide nitride, hafnium nitride A material such as humic acid can be used, and it can be provided in a laminated or single layer. For example, insulator 1 As shown in 45, the layers are stacked in the order of zirconium oxide, aluminum oxide, and zirconium oxide. An insulating film can be used.
[0444] Furthermore, the insulator 145 may be a material with high dielectric strength, such as silicon oxynitride, or a high dielectric strength material. It is preferable to use a high-k material. Alternatively, a material with high dielectric strength and high A laminated structure of high-k dielectric materials may also be used.
[0445] Furthermore, as an insulator of high-dielectric constant (high-k) materials (materials with a high relative permittivity), Having gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxides, aluminum and hafnium-containing oxides and nitrides, silicon and hafnium Oxides having silicon and hafnium, oxidized nitrides having silicon and hafnium Examples include nitrides containing um. By using such high-k materials, an insulator 1 Even if the thickness of 45 is increased, sufficient capacitance of the capacitive element 100 can be secured. Insulator 145 By increasing the thickness, the leakage current between the conductor 115 and the conductor 125 is suppressed. It is possible.
[0446] On the other hand, materials with high dielectric strength include silicon oxide, silicon oxide nitride, and silicon oxide nitride. Silicon oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, Examples include silicon oxide with added carbon and nitrogen, silicon oxide with voids, and resins. For example, silicon nitride (SiN) deposited using the ALD method x ), using the PEALD method Silicon oxide film (SiO x ), silicon nitride (SiN) deposited using the ALD method x ) An insulating film can be used that is stacked in the order of these. By using this method, the dielectric strength is improved, and electrostatic discharge breakdown of the capacitive element 100 can be suppressed. .
[0447] The conductor 125 is positioned to fill the openings formed in the insulators 142 and 150. It is placed there. Also, conductor 125 functions as wiring via conductor 140. It is electrically connected to 53. Conductor 125 is made using ALD or CVD methods, etc. It is preferable to form a film, for example, if a conductor that can be used for the conductor 205 is used. good.
[0448] Furthermore, the conductor 153 is provided on the insulator 154 and is covered by the insulator 156. The conductor 153 can be any conductor that can be used for the conductor 110, and the insulator 156 can be any insulator that can be used for insulator 152. Here, conductor 1 53 is in contact with the upper surface of the conductor 140.
[0449] [Storage device 3] An example of a semiconductor device (memory device) according to one aspect of the present invention is shown in Figures 20 and 21.
[0450] The memory unit 400 shown in Figure 20A consists of capacitive elements 100a and 100b Its shape differs from that of the memory unit 400 shown in Figure 17A.
[0451] Capacitive element 100a comprises a conductor 242a and an insulator 2 covering the conductor 242a. It has 75 and a conductor 294a on the insulator 275. Furthermore, the capacitive element 100b is a conductor The conductive body 242c, the insulator 275 provided covering the conductive body 242c, and on the insulator 275 It has a conductor 294b and, that is, capacitive elements 100a and 100b are It has a MIM (Metal-Insulator-Metal) capacitance configuration.
[0452] Here, one of the pair of electrodes of the capacitive element 100, namely the conductor 242, is a transistor It can serve as either the source electrode or drain electrode of the ZISTA 200. Also, capacitive element 1 The dielectric layer of 00 is a protective layer provided on the transistor 200, i.e., an insulator 27 It can also serve as 5. Therefore, in the manufacturing process of the capacitive element 100, the transistor Because it can be used for part of the manufacturing process, it can be used to create a semiconductor device with high productivity. It is possible. Also, one of the pair of electrodes of the capacitive element 100, namely the conductor 242, Since it serves as either the source or drain electrode of transistor 200 This makes it possible to reduce the area where 0 and the capacitive element 100 are arranged.
[0453] Note that the conductors 294a and 294b are, for example, the same as the conductor 242. Use whatever materials are available.
[0454] Also, for example, as shown in Figure 20B, memory unit 400 and memory unit 400 A memory unit 401 having a similar configuration is connected via a capacity section. This is also acceptable. Here, memory unit 400 and memory unit 401, as shown in Figure 20B, It has a structure similar to the memory unit 400 shown in Figure 20A. Therefore, as shown in Figure 20B Details of the structure of memory unit 400 and memory unit 401 are shown in Figure 20A. The description relating to Mori Unit 400 can be taken into consideration.
[0455] Figure 20B shows transistor 200a, transistor 200b, capacitive element 100a, and A memory unit 400 having a capacitive element 100b, and a structure similar to that of the memory unit 400 This is a cross-sectional view showing a memory unit 401 having a capacity connected via a capacity section.
[0456] As shown in Figure 20B, one electrode of the capacitive element 100b of the memory unit 400 The conductor 294b, which functions as a memory unit, has a configuration similar to that of the memory unit 400. The nit 401 has a configuration that also serves as one of the electrodes of the capacitive device. However, it does not function as one electrode of the capacitive element 100a of the memory unit 400. The conductor 294a is located on the left side of the memory unit 400, that is, in the A1 direction in Figure 20B. It also serves as one of the electrodes for the capacitive device of the adjacent semiconductor device. Furthermore, it is part of memory unit 4. The same configuration applies to the cells on the right side of 01, that is, in Figure 20B, in the direction of A2. Yes, they are.
[0457] In this way, by arranging memory units in a matrix on the same layer, the cell array can be created. It can be configured in this way. By configuring the cell array in this manner, the spacing between adjacent cells can be Because it can be made smaller, the projected area of the cell array can be reduced, enabling high integration. This becomes possible.
[0458] Also, similar to Figure 17B, the semiconductor device shown in Figure 20B also has an insulator 2 beneath the insulator 212. 10 is provided, and a conductor 288 is provided below the insulator 210. Also, the conductor 28 The upper surface of 8 is on the lower surface of the conductor 248 of memory unit 400 and memory unit 401. They are in contact. Therefore, memory unit 400 and memory unit 401 are each connected. It is electrically connected to the conductor 288, which functions as wiring, via the electric body 248. Conductor 288, which functions as a bit line, and conductor 260, which functions as a word line, It is preferable that they be arranged in an alternating pattern.
[0459] Furthermore, a cell array having a memory unit 400 with the structure shown in Figures 20A and 20B is also available. The configuration may be not only layers, but also stacked. Figure 21 shows a memory unit 400. This shows a cross-sectional view of a configuration in which n layers of Luar Array 610 are stacked. As shown in Figure 21, multiple Cellar By stacking the arrays (cell arrays 610_1 to 610_n), Cells can be clustered and arranged without increasing the area occupied by the ray. In other words, 3D A cell array can be constructed. Also, a capacitive element 1 with the structure shown in Figures 20A and 20B Since 00 can be formed at a position lower than the upper surface of the conductor 260, the cylinder structure Compared to the case using capacitive elements, the height of each cell array can be reduced. This makes it relatively easy to stack multiple cell arrays. In this way, memory By increasing the integration of cells, it is possible to provide semiconductor devices with large memory capacity.
[0460] [Storage device 4] An example of a semiconductor device (memory device) according to one aspect of the present invention is shown in Figure 22.
[0461] Figure 22 shows that memory 470 has a transistor layer 413 with transistor 200T, and 4 Layer memory unit layer 415 (memory unit layer 415_1 to memory unit layer 415 An example having _4) is shown. Note that transistor 200T is the same as the transistor shown in the previous embodiment. It has a similar structure to the Zista 200.
[0462] Memory unit layers 415_1 through 415_4 each contain multiple memory units. It has a reunit 400. Memory unit layer 415_1 to memory unit layer 415_ The memory unit 400 in 4 has a similar structure to the memory unit 400 shown in Figure 20A. It has the following. Therefore, for details of the memory unit 400, please refer to the description in Figure 20A, etc. It is possible.
[0463] Here, the conductor 248_1 provided on the memory unit layer 415_1 is a transistor The conductive material 248_ is electrically connected to 200T and provided on the memory unit layer 415_2. 2 is connected to the conductor 242b provided on the memory unit layer 415_1, and the memory unit The conductive material 248_3 provided in the memory layer 415_3 is provided in the memory unit layer 415_2 The conductive material 242b is connected to the conductive material 24 provided in the memory unit layer 415_4. 8_4 is connected to the conductor 242b provided on the memory unit layer 415_3. In Figure 22, the conductor 248_1 is connected to the gate electrode of transistor 200T. However, the present invention is not limited thereto, and the connection of the conductor 248_1 is of the memory 470 You can adjust the settings as needed to match the circuit configuration and other factors.
[0464] As shown in the previous embodiment, the region 232b of oxide 230b is connected to the conductor 242b. Because they are superimposed, the carrier concentration is high and they have electrical conductivity. Therefore, the above configuration By doing so, the memory unit 400 region 232 provided in each memory unit layer 415 b and transistor 200T can be electrically connected via the conductor 248.
[0465] As described above, multiple memory unit layers can be stacked, thus forming a cell array. Memory cells can be integrated and arranged without increasing the occupied area. By increasing the integration of Moricell, it is possible to provide semiconductor devices with large memory capacity.
[0466] Memory 470 is connected to insulators 212, 214, 282, and 283. It is more sealed (for convenience, this will be referred to as the sealed structure below). An insulator surrounds the insulator 283. Insulator 274 is provided. In addition, conductive material is used in insulators 274, 283, and 212. Body 440 is provided and electrically connected to element layer 411.
[0467] Furthermore, an insulator 280 is provided inside the sealing structure. The insulator 280 is heated It has the function of releasing oxygen. Alternatively, the insulator 280 has an excess oxygen region.
[0468] Furthermore, insulators 212 and 283 have a high barrier function against hydrogen. It is preferable that the material is such that it captures hydrogen. Alternatively, the material is preferably one that has the function of fixing hydrogen.
[0469] For example, a material having high barrier properties against hydrogen is silicon nitride, or Examples include silicon nitride oxide. Furthermore, it possesses the function of capturing or fixing hydrogen. Materials having aluminum oxide, hafnium oxide, and aluminum and hafnium Examples include oxides containing um (such as hafnium aluminate).
[0470] The materials used for insulators 212, 214, 282, and 283 There are no particular limitations on the crystal structure, but it can be amorphous or crystalline. For example, as a material that has the function of capturing or fixing hydrogen, amorphous oxide Aluminum films are preferable. Amorphous aluminum oxide is preferable to highly crystalline aluminum oxide. In some cases, it can capture and solidify hydrogen in greater quantities than aluminum.
[0471] Also, between the transistor layer 413 and the memory unit layer 415, or each memory unit It is preferable that insulators 282 and 214 are also provided between layers 415. Furthermore, it is preferable that an insulator 296 is provided between the insulator 282 and the insulator 214. Insulator 296 can be made of the same material as insulator 283. Alternatively, silica oxide can be used. Cone and silicon oxide-nitride can be used. Alternatively, known insulating materials may be used. stomach.
[0472] Here, the excess oxygen in the insulator 280 is replaced by hydrogen in the oxide semiconductor in contact with the insulator 280. The following model can be considered for diffusion.
[0473] Hydrogen present in the oxide semiconductor can be transmitted to other materials via the insulator 280 in contact with the oxide semiconductor. It diffuses into the structure. Due to the diffusion of this hydrogen, excess oxygen in the insulator 280 becomes oxide semiconductor It reacts with the hydrogen inside to form an OH bond and diffuses through the insulator 280. The child is a material that has the function of capturing or fixing hydrogen (typically an insulator 282). When it reaches ), the hydrogen atom bonds with an atom in the insulator 282 (for example, a metal atom). It reacts with oxygen atoms and is captured or fixed in the insulator 282. On the other hand, having an OH bond It is presumed that the excess oxygen atoms remain in the insulator 280 as excess oxygen. In the diffusion of the hydrogen, there is a high probability that the excess oxygen in the insulator 280 plays a bridging role. It's expensive.
[0474] To satisfy the above model, the semiconductor device manufacturing process is one of the important elements. .
[0475] As an example, an insulator 280 having excess oxygen is formed on an oxide semiconductor, and then insulation Form body 282. After that, it is preferable to perform a heat treatment. This heat treatment is performed on the material Physically, in an atmosphere containing oxygen, an atmosphere containing nitrogen, or a mixed atmosphere of oxygen and nitrogen, The process should be carried out at a temperature of 350°C or higher, preferably 400°C or higher. The heat treatment time should be 1 hour or more. Preferably, it should be 4 hours or more, and more preferably 8 hours or more.
[0476] As a result of the above heat treatment, hydrogen in the oxide semiconductor is released into insulator 280 and insulator 28 It can diffuse outward through 2. In other words, oxide semiconductors, and said oxide semiconductors This can reduce the absolute amount of hydrogen present in the vicinity of the body.
[0477] After the above heat treatment, an insulator 283 is formed. The insulator 283 acts as a barrier against hydrogen. Because it is a material with high functionality, hydrogen diffused outwards, or water present in the outside This prevents the element from penetrating the interior, specifically the oxide semiconductor or the insulator 280. It is possible.
[0478] Regarding the above heat treatment, the configuration performed after the formation of the insulator 282 is as follows: The examples given are not limited to these. For example, after the formation of the transistor layer 413, or note After the formation of the reunit layer 415_1 to the memory unit layer 415_3, the above heating is performed on each of them. Processing may be performed. Also, when diffusing hydrogen outward by the above heat treatment, Hydrogen is diffused upward or laterally in the lunger layer 413. Similarly, in the memory unit layer When heat treatment is performed after the formation of 415_1 to the memory unit layer 415_3, water The element is diffused upwards or sideways.
[0479] Furthermore, by using the above manufacturing process, the insulator 212 and the insulator 283 are bonded together. The sealing structure described above is formed.
[0480] As described above, by using the above structure and manufacturing process, the hydrogen concentration is reduced. A semiconductor device using a specially selected oxide semiconductor can be provided. Therefore, it has good reliability. A semiconductor device can be provided. Furthermore, according to one aspect of the present invention, good electrical characteristics can be obtained. We can provide a semiconductor device that does this.
[0481] The configurations, methods, etc. shown in this embodiment may differ from the configurations, structures, methods, etc. shown in other embodiments. They can be used in combination as appropriate.
[0482] (Embodiment 3) In this embodiment, the present invention is described using Figures 23A, 23B, and 24A to 24C. A transistor using an oxide as a semiconductor, according to one aspect of this invention (hereinafter referred to as an OS transistor) In some cases, ), and storage devices to which capacitive elements are applied (hereinafter referred to as OS memory devices) This may be the case.) The OS memory device has at least a capacitive element and a capacitive element This is a memory device that has an OS transistor that controls the charging and discharging of the device. Because the current is extremely small, the OS memory device has excellent retention characteristics and is a non-volatile memory. It can be made to function.
[0483] <Example of storage device configuration> Figure 23A shows an example of the configuration of the OS memory device. The storage device 1400 is connected to peripheral circuit 141 1, and a memory cell array 1470. Peripheral circuit 1411 is a row circuit 1420, It has a column circuit 1430, an output circuit 1440, and a control logic circuit 1460. .
[0484] The column circuit 1430 includes, for example, a column decoder, a pre-charge circuit, a sense amplifier, and a programming circuit. It has circuits, etc. The precharge circuit has the function of precharging the wiring. The amplifier has the function of amplifying the data signal read from the memory cell. The lines are wiring connected to memory cells in the memory cell array 1470, and more details The details will be explained later. The amplified data signal is sent via the output circuit 1440 to the data signal RDA. The TA is output to the outside of the storage device 1400. Also, the row circuit 1420 is, for example, row It has a decoder, a word line driver circuit, etc., and can select the row to access.
[0485] The storage device 1400 receives a low power supply voltage (VSS) from an external source as the power supply voltage, and peripheral circuits 14 The high power supply voltage (VDD) for 11 and the high power supply voltage (VIL) for the memory cell array 1470 are It is supplied. In addition, the storage device 1400 contains control signals (CE, WE, RE) and address signals. The address signal ADDR and the data signal WDATA are input from an external source. The address signal ADDR is the line The data signal WDATA is input to the decoder and column decoder, and then input to the writing circuit. ru.
[0486] The control logic circuit 1460 receives externally input control signals (CE, WE, R Process E) to generate control signals for the row decoder and column decoder. The control signal CE is a chip The write enable signal is the control signal R E is the read enable signal. The signal processed by the control logic circuit 1460 The signal is not limited to this; other control signals can be input as needed.
[0487] The memory cell array 1470 consists of multiple memory cells MCa and arranged in a matrix. It has a memory cell MCb and multiple wirings. Note that the storage device shown in this embodiment is shown in Figure 2. As shown in 3A, memory cell MCa and memory cell MCb form a single memory It forms a Moly unit. Furthermore, below, memory cell MCa and memory cell MC Sometimes, the entire set of 'b' is referred to as the memory cell MC. Also, the memory cell array 1470 and the row The number of wires connecting to path 1420 is the configuration of the memory cell MC, and the number of memory cells in a row. It is determined by the number of MCs, etc. Also, the memory cell array 1470 and the column circuit 1430 The number of connected wires, the configuration of the memory cell MC, the number of memory cell MCs in a row, etc. It is determined by [something].
[0488] In Figure 23A, the peripheral circuit 1411 and the memory cell array 1470 are on the same plane. Although examples of how to form it have been shown, this embodiment is not limited to this. For example, As shown in Figure 23B, the memory cell array 1470 is superimposed on a portion of the peripheral circuit 1411. It may be provided in such a way. For example, so as to overlap below the memory cell array 1470, A configuration that includes a sense amplifier is also possible.
[0489] As described in the previous embodiment, metal oxides such as In-M-Zn oxide are sputtered. The film can be formed on the substrate using methods such as the ring method. Therefore, the film formed on the silicon substrate The memory cell array 1470 can be placed on top of the peripheral circuit 1411. This makes it possible to increase the area occupied by the memory cell array that can be installed on a single chip. Therefore, the memory capacity of semiconductor devices can be increased.
[0490] Alternatively, a configuration in which multiple memory cell arrays 1470 are stacked may be used. By stacking array 1470, the occupied area of the memory cell array 1470 can be increased. In any case, memory cells can be integrated and arranged. In other words, a 3D cell array can be formed. This makes it possible to achieve high integration of memory cells and large storage capacity semiconductors. We can provide a body device.
[0491] Figures 24A to 24C show the application of the above-mentioned memory cell MCa and memory cell MCb. An example of a memory cell configuration will be described.
[0492] [DOSRAM] Figures 24A to 24C show examples of circuit configurations for DRAM memory cells. And, DRAM using a 1OS transistor 1 capacitance element type memory cell is called DOSRAM. (Dynamic Oxide Semiconductor Random Acce It is sometimes called ss Memory. The memory unit 1471 shown in Figure 24A is It has memory cells MCa and memory cells MCb. Here, memory cell MCa is a transistor The memory cell MCb has a transistor M1a and a capacitive element CAa, and the memory cell MCb has a transistor M1a It has a capacitive element CAb and transistor M1a and transistor M1b. It has a gate (sometimes called a top gate) and a back gate.
[0493] The first terminal of transistor M1a is connected to the first terminal of capacitive element CAa, and the transistor The second terminal of transistor M1a is connected to wiring BIL, and the gate of transistor M1a is connected to wiring W The back gate of transistor M1a is connected to OLa and is connected to wiring BGLa. The second terminal of the capacitive element CAa is connected to the wiring CAL. Similarly, the transistor The first terminal of M1b is connected to the first terminal of the capacitive element CAb, and the second terminal of transistor M1b The terminal is connected to wiring BIL, and the gate of transistor M1b is connected to wiring WOLb. The back gate of transistor M1b is connected to wiring BGLb. Capacitive element C The second terminal of Ab is connected to the wiring CAL.
[0494] Wiring BIL functions as a bit line, while wiring WOLa and wiring WOLb function as word lines. It functions as follows. Wiring CAL is predetermined to the second terminals of capacitive elements CAa and CAb. It functions as wiring for applying the potential. Therefore, it is preferable to apply a low-level potential to the wiring CAL. Wiring BGLa is a transistor It functions as wiring for applying potential to the back gate of the ZISTA M1a, and wiring BGLb is It functions as wiring to apply potential to the back gate of transistor M1b. By applying an arbitrary potential to BGLa (wiring BGLb), transistor M1a ( The threshold voltage of transistor M1b) can be increased or decreased.
[0495] Here, the memory unit 1471 shown in Figure 24A is the same as the memory unit shown in Figure 17A, etc. It corresponds to transistor 400. In other words, transistor M1a corresponds to transistor 200a, and the capacitance Element CAa is converted to capacitor element 100a, transistor M1b is converted to transistor 200b, and capacitance Element CAb corresponds to capacitive element 100b. Also, wiring WOLa corresponds to transistor 2 Wiring WOLb to the conductor 260 of transistor 200b, BIL corresponds to conductors 248 and 288.
[0496] Furthermore, the storage device according to this embodiment is not limited to the memory unit 1471, and the circuit configuration The configuration can be changed. For example, the storage device according to this embodiment is shown in Figure 24B. As in memory unit 1472, the back gate of transistor M1a is connected to wiring BGLa Instead, the back gate of transistor M1b is connected to wiring WOLa, not wiring BGLb. The wiring WOLb may be configured to be connected. Also, for example, the memory according to this embodiment The device has a single-gate transistor structure, as shown in the memory unit 1473 in Figure 24C. In transistors M1a and M1b, which do not have a back gate, It may be configured as follows.
[0497] When the semiconductor device shown in the above embodiment is used in a memory unit 1471, etc., As transistor M1a, transistor 200a is used, and as transistor M1b, transistor Using 200b, using capacitive element CAa, using capacitive element 100a, and using capacitive element CAb Capacitive element 100b can be used. Transistor M1a and transistor M1b By using an OS transistor, transistor M1a and transistor The leakage current of M1b can be made very small. In other words, the written data can be transmitted. Because it can be held for a long time by transistor M1a and transistor M1b, This reduces the frequency of refreshing the Molysel. This eliminates the need for a squeaking operation. Furthermore, because the leakage current is very low, the memory unit For the 1471, 1472, and 1473 memory units, multi-level data is provided. Alternatively, it can retain analog data.
[0498] Furthermore, in DOSRAM, as described above, overlaps below the memory cell a...
Claims
1. A first conductor placed on a substrate, A first insulator disposed on the substrate, The first oxide disposed on the first insulator, A second oxide, a third oxide, and a fourth oxide are arranged in contact with the upper surface of the first oxide. A second conductor disposed on the second oxide, A third conductor disposed on the third oxide, A fourth conductor disposed on the fourth oxide, A second insulator is disposed on the second to fourth conductors and has a first opening and a second opening formed thereon, A third insulator disposed within the first opening, A fifth conductor disposed on the third insulator, A fourth insulator disposed within the second opening, The present invention comprises a sixth conductor disposed on the fourth insulator, The first oxide has an indium oxide, The first oxide is in contact with at least a portion of the upper surface of the first conductor. The third conductor is arranged superimposed on the first conductor, The first opening is formed superimposed on the region between the second conductor and the third conductor. The second opening is formed superimposed on the region between the third conductor and the fourth conductor. A semiconductor device wherein the second insulator is disposed in contact with the upper surface of the first insulator, the side surface of the first oxide, the side surfaces of the second oxide to the fourth oxide, the side surfaces of the second conductor to the fourth conductor, and the upper surface of the second conductor to the fourth conductor.
2. In claim 1, The second oxide, the third oxide, and the fourth oxide each contain the first element, A semiconductor device in which the first element is aluminum, gallium, yttrium, or tin.
3. In claim 2, A semiconductor device wherein the second oxide, the third oxide, and the fourth oxide each have a higher concentration of the first element than the first oxide.
4. In any one of claims 1 to 3, It comprises a first capacitive element and a second capacitive element, The first capacitive element is electrically connected to the second conductor. The second capacitive element is electrically connected to the fourth conductor in a semiconductor device.