Display panel

The display panel design addresses PBTS-induced degradation by exposing the driving transistor's active layer to external light, ensuring the switching transistor's active layer is protected, thus maintaining brightness and reliability.

JP2026116715APending Publication Date: 2026-07-10LG DISPLAY CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
LG DISPLAY CO LTD
Filing Date
2025-12-17
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

Display panels experience degradation in performance due to positive bias thermal stress (PBTS) affecting the threshold voltage of driving transistors, leading to a decrease in drive current and brightness over time.

Method used

The display panel design includes a structure where the active layer of the driving transistor is partially exposed to external light while the switching transistor's active layer is protected, preventing overlap with the anode and intermediate electrodes, thereby suppressing the positive shift in threshold voltage.

Benefits of technology

This design effectively mitigates the positive bias thermal stress on driving transistors, maintaining the brightness and reliability of the display panel by offsetting the positive shift in threshold voltage.

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Abstract

This improves the characteristics of transistors within subpixels in relation to PBTS (Positive Bias Thermal Stress). [Solution] The device includes a substrate; a switching transistor disposed on the substrate and including a first active layer; a driving transistor including a second active layer; an anode electrode electrically connected to the driving transistor, and a light-emitting element comprising a light-emitting layer located on the anode electrode and a cathode electrode located on the light-emitting layer; and an intermediate electrode electrically connecting the driving transistor and the anode electrode, wherein the first active layer of the switching transistor overlaps with at least one of the anode electrode and the intermediate electrode, and at least a portion of the second active layer of the driving transistor does not overlap with the anode electrode and the intermediate electrode.
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Description

Technical Field

[0001] This specification relates to a display panel.

Background Art

[0002] Display devices for displaying images on televisions, monitors, smartphones, tablet PCs, notebook computers, etc. use various methods and forms.

[0003] A display device includes a display panel having a plurality of light-emitting elements or liquid crystals for realizing an image, and transistors for controlling the operation of each light-emitting element or liquid crystal, and displays an image to be displayed via the plurality of light-emitting elements or liquid crystals.

[0004] A display device includes a plurality of pixels including light-emitting elements, and includes a plurality of driving and switching elements for driving and controlling the light-emitting elements provided in each pixel. The driving and switching elements may be composed of transistors.

[0005] In recent years, various research and developments have been conducted for improving the performance and reliability of transistors.

Summary of the Invention

Problems to be Solved by the Invention

[0006] One technical problem of the embodiments of this specification is to provide a display panel with improved characteristics of transistors provided in sub-pixels with respect to PBTS (Positive Bias Thermal Stress).

Means for Solving the Problems

[0007] An embodiment of this specification includes a substrate; a switching transistor disposed on the substrate and comprising a first gate electrode, a first source electrode, a first drain electrode, and a first active layer; a driving transistor disposed on the substrate at a distance from the switching transistor and comprising a second gate electrode, a second source electrode, a second drain electrode, and a second active layer; a light-emitting element comprising an anode electrode electrically connected to either the second source electrode or the second drain electrode of the driving transistor, a light-emitting layer located on the anode electrode, and a cathode electrode located on the light-emitting layer; and an intermediate electrode electrically connecting either the second source electrode or the second drain electrode of the driving transistor to the anode electrode, wherein the first active layer of the switching transistor overlaps with at least one of the anode electrode and the intermediate electrode, and at least a portion of the second active layer of the driving transistor does not overlap with the anode electrode and the intermediate electrode.

[0008] The entire first active layer of the switching transistor may overlap with at least one of the anode electrode and the intermediate electrode.

[0009] The first active layer and / or the second active layer may include an oxide semiconductor.

[0010] The second active layer of the drive transistor includes a non-exposed region that overlaps with the second gate electrode, second source electrode, and second drain electrode, and an exposed region that does not overlap with the second gate electrode, second source electrode, and second drain electrode, and at least the exposed region of the second active layer of the drive transistor may not overlap with the anode electrode and the intermediate electrode.

[0011] Of the second active layer of the drive transistor, at least the exposed region may overlap with the bank. The bank may contain a light-absorbing material. The bank has a bank hole through which a portion of the region penetrates, and at least one of the light-emitting layer and the cathode electrode may be located within the bank hole. The anode electrode may not be superimposed on the bank hole. The bank hole may overlap with the exposed region of the second active layer of the drive transistor. A color filter is placed on top of the light-emitting element, and a black matrix may be provided on the side of the color filter. The aforementioned black matrix may have BM holes that penetrate certain regions. The BM hole may overlap with the bank hole. The BM hole may overlap with the exposed region of the second active layer of the drive transistor.

[0012] In the embodiments described herein, the display panel has a structure in which the first active layer of the switching transistor overlaps with at least one of the anode electrode and the intermediate electrode, and at least a portion of the second active layer of the driving transistor does not overlap with the anode electrode and the intermediate electrode. Therefore, the driving transistor can suppress positive shift of the threshold voltage due to positive bias thermal stress (PBTS), thereby further improving the reliability of the display panel. [Brief explanation of the drawing]

[0013] [Figure 1] This is a diagram illustrating an example of a display device according to the present invention. [Figure 2] This figure illustrates an example of an equivalent circuit for a subpixel SP related to the display device of the present invention. [Figure 3] This figure illustrates an example of a cross-sectional structure of a display panel according to the present invention. [Figure 4]This diagram illustrates the superposition relationship between the anode electrode, the intermediate electrode, the switching transistor, and the driving transistor in a subpixel according to the present invention. [Figure 5] This figure provides a more detailed explanation of the non-overlapping portion of the driving transistors in the subpixel according to the present invention. [Figure 6] This diagram illustrates the principle by which the positive bias thermal stress (PBTS) of the drive transistor is canceled out. [Figure 7] This figure illustrates another example of the cross-sectional structure of a display panel according to the present invention. [Modes for carrying out the invention]

[0014] The following describes an embodiment with reference to the drawings.

[0015] The same reference number refers to the same component. Furthermore, some parts of the drawing may be emphasized for effective explanation of the thickness, proportions, and dimensions of components. The scale of components shown in the drawing is not limited to the scale shown in the drawing, as it may differ from the actual scale for illustrative purposes.

[0016] In this specification, when a component or area, layer, part, etc. is said to be "on top of," "connected to," or "connected to" another component, it means that it may be directly connected to / connected to the other component, or a third component may be placed between them.

[0017] "and / or" includes both of the one or more combinations that the related configuration may define.

[0018] Terms such as "first", "second", etc. may be used to describe various components, but the components are not limited by the terms. The terms are only used for the purpose of distinguishing one component from another. For example, without departing from the scope of the rights of this embodiment, the first component can be named the second component, and similarly, the second component can also be named the first component. Singular expressions include plural expressions unless the context clearly indicates otherwise.

[0019] Terms such as "below", "beneath", "above", "upper", etc. are used to explain the association of the configuration shown in the drawings. The terms are relative concepts and are explained based on the directions shown in the drawings. For example, unless "right" or "directly" is used, one or more other parts can be arranged between two parts. Spatially relative terms such as "below", "beneath", "above", "upper", etc. can be used to easily explain the correlation between an element or component and another element or component as shown in the figure. Therefore, for example, with respect to the first component, "below" and "beneath" can be in the opposite direction to "above" and "upper" with respect to the first component.

[0020] Spatially relative terms should be understood as terms that include different directions of elements during use or operation in addition to the directions shown in the drawings. For example, when an element shown in the figure is inverted, an element described as "below" or "beneath" another element may be placed "above" the other element. Therefore, the exemplary term "below" can include both the following and upward directions.

[0021] Terms such as "comprising" or "having" are intended to specify that there are features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and it should be understood that the existence or addition of one or more other features or numbers, steps, operations, components, parts, or combinations thereof is not precluded in advance.

[0022] The features of each of the various embodiments of this specification can be combined or combined with each other partially or wholly, various linkages and drives are technically possible, each embodiment can be implemented independently of each other, and can be implemented together in relation to each other.

[0023] FIG. 1 is a diagram for explaining an example of a display device according to the present invention, and FIG. 2 is a diagram for explaining an example of an equivalent circuit for a sub-pixel SP according to the present invention.

[0024] Referring to FIGS. 1 and 2, a display device according to an example of this specification includes a display panel 10, and the display panel 10 may include a display area AA and a non-display area NA.

[0025] The display area AA may be an area for displaying an image. A large number of sub-pixels SP are arranged in the display area AA of the display panel 10, and an image can be displayed using the large number of sub-pixels SP. The area where the large number of sub-pixels SP are arranged is the display area AA, and the area other than the display area AA may be the non-display area NA.

[0026] The non-display area NA may be arranged in an edge area surrounding the display area AA for displaying an image. At least one driving unit for driving a large number of sub-pixels SP may be arranged in the non-display area NA. For example, a scan driving unit that sequentially supplies a scan signal to a plurality of gate lines is provided in a gate-in-panel (GIP) in the non-display area NA. In addition, various additional elements for driving the sub-pixels SP in the display area AA may be further arranged in the non-display area NA.

[0027] At least one sub-pixel SP among the plurality of sub-pixels SP may include a circuit including, for example, a switching transistor ST, a driving transistor DT, a capacitor Cst, and a light-emitting element OLED as shown in FIG. 2.

[0028] The first electrode (e.g., drain electrode) of the switching transistor ST is electrically connected to the data line DL, the second electrode (e.g., source electrode) is electrically connected to the first node N1, and the gate electrode of the switching transistor ST is electrically connected to the gate line GL. The switching transistor ST can transmit the data signal supplied via the data line DL to the first node N1 in response to the scanning signal supplied via the gate line GL.

[0029] Capacitor Cst is electrically connected to the first node N1 and can be charged by the voltage applied to the first node N1.

[0030] A high-potential drive voltage EVDD is applied to the first electrode (e.g., the drain electrode) of the drive transistor DT, and its second electrode (e.g., the source electrode) is electrically connected to the first electrode (e.g., the anode electrode) of the light-emitting element OLED. The drive transistor DT can generate a drive current that flows through the light-emitting element OLED depending on the voltage applied to its gate electrode.

[0031] The active layer of the switching transistor ST and / or the driving transistor DT may include, but is not limited to, an oxide semiconductor such as IGZO (Indium-Gallium-Zinc-Oxide).

[0032] A light-emitting OLED can output light corresponding to the drive current. A light-emitting OLED can output light corresponding to one of the following colors: red (R), green (G), blue (B), or white (W).

[0033] A light-emitting OLED may include an anode electrode, a light-emitting layer placed on the anode electrode, and a cathode electrode that supplies a common voltage.

[0034] A drive current generated by a drive transistor DT can be applied to the anode electrode of the light-emitting OLED, and a low-potential drive voltage EVSS can be applied to the cathode electrode of the light-emitting OLED.

[0035] The light-emitting layer can be implemented to emit light of the same color for each pixel, such as white light, or it can be implemented to emit different colors for each subpixel SP, such as red (R), green (G), or blue (B) light. The light-emitting element OLED can be a front-emitting diode or a back-emitting diode.

[0036] Figure 2 shows an example where the drive transistor DT is directly connected to the light-emitting element OLED, but the present invention is not limited to this, and the drive transistor DT may be electrically connected to the light-emitting element OLED via another switching transistor ST.

[0037] Although not shown in Figure 2, the subpixel SP may further include a compensation circuit (not shown) for compensating for the threshold voltage Vth of the driving transistor DT. The compensation circuit may include at least one transistor connected to the driving transistor DT and may be provided within the subpixel SP.

[0038] The compensation circuit can be configured in various structures depending on the configuration, such as 3T1C, which includes three transistors and one capacitor Cst within the subpixel SP, or 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, 7T2C, which include four transistors and two capacitor Cst.

[0039] On the other hand, in the display panel 10 described above, the switching transistor ST, whose gate electrode is connected to the gate line GL, has a gate high voltage applied to it via the gate line GL for a very short period within one frame period. Similarly, the switching transistor ST included in the compensation circuit also has a gate high voltage applied to it for a very short period within one frame period, so it is possible that it will hardly experience any Positive Bias Thermal Stress (PBTS).

[0040] However, in the case of the drive transistor DT, the period during which a (+) voltage is applied to the gate electrode is very long due to the compensation circuit, etc., so it may experience a relatively large PBTS, which can cause the threshold voltage Vth of the drive transistor DT to shift positively, and the drive current generated by the drive transistor DT may decrease.

[0041] Therefore, the longer the driving time of the drive transistor DT, the more severe the degradation of the drive transistor DT becomes, which can lead to a deeper positive shift in the threshold voltage Vth, an increase in the decrease in drive current, and a decrease in the brightness of the light-emitting element OLED in proportion to the driving time.

[0042] Taking this into consideration, the present invention allows at least a portion of the active layer of the driving transistor DT to be exposed to external light, while preventing the active layer of the switching transistor ST from being exposed to external light, in order to suppress the degradation of the threshold voltage Vth of the driving transistor DT by PBTS and the resulting decrease in the brightness of the display panel 10.

[0043] For this purpose, the present invention may, for example, overlap at least one of the anode electrode and the intermediate electrode located on the switching transistor ST and the driving transistor DT with the active layer of the switching transistor ST, while the anode electrode and the intermediate electrode may not overlap with at least a portion of the active layer of the driving transistor DT. In other words, the present invention can ensure that the anode electrode and the intermediate electrode do not overlap with at least a portion of the active layer of the driving transistor DT.

[0044] This will be explained in detail with reference to Figure 3 and subsequent figures below.

[0045] This figure illustrates an example of a cross-sectional structure of a display panel according to the present invention.

[0046] An example of the cross-sectional structure of a display panel shown in Figure 3 may represent the cross-sectional structure of a subpixel. As shown in Figure 3, in an example of the present invention, the cross-sectional structure of the display panel 10 may include a substrate 100, a substrate insulating film 110, a buffer layer 140, a gate insulating film 150, an interlayer insulating film 200, a planarization film 300, an intermediate electrode SD2, a bank 400, a light-emitting element OLED, a encapsulation layer 500, a switching transistor ST, and a drive transistor DT.

[0047] The substrate 100 is formed from a flexible plastic material and may have flexible properties, and may include a thin, flexible glass material. The substrate 100 may be placed in the display area AA and the non-display area NA of the display panel 10.

[0048] The substrate insulating film 110 may be placed on the display area AA and the non-display area NA on the substrate 100. The substrate insulating film 110 is placed on the substrate 100 and can protect structures on the substrate 100 that are susceptible to moisture permeation from moisture penetrating the substrate 100. The substrate insulating film 110 may include one or more inorganic films from silicon oxide film SiOx, silicon nitride film SiNx, and silicon oxynitride film SiOxNy. A first metal layer BSM may be placed on the substrate insulating film 110 to stabilize the operation of the switching transistor ST.

[0049] The first metal layer BSM may be electrically connected to, for example, either the first source electrode SSD1a and the first drain electrode SSD1b of the switching transistor ST, or to the first gate electrode G1 of the switching transistor ST.

[0050] The buffer layer 140 may be provided on the substrate insulating film 110 while covering the first metal layer BSM. The buffer layer 140 may contain inorganic insulating materials such as silicon oxide SiO and silicon nitride SiN. The buffer layer 140 may include a multilayer structure containing the same material as each other or different materials. For example, the buffer layer 140 may comprise first, second, and third buffer layers 140a, 140b, and 140c.

[0051] The first buffer layer 140a is laminated on the substrate insulating film 110 while covering the first metal layer BSM, the second buffer layer 140b is laminated on the first buffer layer 140a, and on the second buffer layer 140b, a second metal layer BOT may be laminated while covering the second buffer layer 140b in order to stabilize the operation of the drive transistor DT.

[0052] The second metal layer BOT may be electrically connected to either the second source electrode DSD1a or the second drain electrode DSD1b of the driving transistor DT, or it may be connected to the second gate electrode G2 of the driving transistor DT. In this specification, as an example, with reference to Figure 5, the case in which the second metal layer BOT is electrically connected to either the second source electrode DSD1a or the second drain electrode DSD1b of the driving transistor DT is shown.

[0053] A switching transistor ST and a driving transistor DT may be arranged on the buffer layer 140. The switching transistor ST may include a first gate electrode G1, a first source electrode SSD1a, a first drain electrode SSD1b, and a first active layer ACT1, while the driving transistor DT is arranged separately from the switching transistor ST and may include a second gate electrode G2, a second source electrode DSD1a, and a second drain electrode.

[0054] As shown in Figure 3, the first and second active layers ACT1 and ACT2 may each include a source region AS, a channel region CH, and a drain region AD. The source region AS and drain region AD have higher electrical conductivity and carrier concentration than the channel region CH, while the channel region CH has a lower carrier concentration than the source region AS and drain region AD, and can form a channel in response to the voltage applied to the gate electrode G.

[0055] The gate insulating film 150 is stacked on the buffer layer 140, covering the first and second active layers ACT1 and ACT2. The gate insulating film 150 can insulate the gate electrode G of the transistor from the active layer ACT. The gate insulating film 150 may contain an inorganic insulating material such as silicon oxide SiOx, silicon nitride SiNx, or silicon oxynitride SiOxNy.

[0056] The interlayer insulating film 200 may be located on the gate insulating film 150 so as to cover the first and second gate electrodes G1 and G2. The first source electrode SSD1a and first drain electrode SSD1b of the switching transistor ST, and the second source electrode DSD1a and second drain electrode DSD1b of the driving transistor DT may be located on the interlayer insulating film 200. The interlayer insulating film 200 may contain an inorganic insulating material such as silicon oxide SiOx, silicon nitride SiNx, or silicon oxynitride SiOxNy.

[0057] The first source electrode SSD1a and the first drain electrode SSD1b of the switching transistor ST may penetrate the interlayer insulating film 200 and the gate insulating film 150 to contact the source region and drain region provided in the first active layer ACT1 of the switching transistor ST, and the second source electrode DSD1a of the driving transistor DT may penetrate the gate insulating film 150 to contact the source region and drain region provided in the second active layer ACT2 of the driving transistor DT.

[0058] The planarization film 300 is laminated on the interlayer insulating film 200 so as to cover the first source electrode SSD1a and the first drain electrode SSD1b of the switching transistor ST, and the second source electrode DSD1a and the second drain electrode DSD1b of the drive transistor DT. The planarization film 300 may eliminate steps caused by the drive circuit and may have a flat surface. The planarization film 300 may contain an organic insulating material with high fluidity.

[0059] The planarization film 300 may be provided by laminating multiple layers. For example, as shown in Figure 3, it may be provided by laminating a first planarization film 310, a second planarization film 320, and a third planarization film 330. The upper surfaces of the first, second, and third planarization films 310, 320, and 330 may have flat surfaces.

[0060] The first planarization film 310 is laminated on the interlayer insulating film 200 so as to cover the switching transistor ST and the drive transistor DT, and the intermediate electrode SD2 is positioned on the upper surface of the first planarization film 310.

[0061] The second planarization film 320 is positioned on the first planarization film 310, covering the intermediate electrode SD2, and the third planarization film 330 is positioned on the second planarization film 320. Figure 3 illustrates the case where three planarization films 300 are stacked, but the present invention is not limited to the number of stacked planarization films 300.

[0062] Here, the intermediate electrode SD2 can electrically connect either the second source electrode DSD1a or the second drain electrode DSD1b of the drive transistor DT to the anode electrode AND of the light-emitting element OLED. For example, the intermediate electrode SD2 may be electrically connected to either electrode of the drive transistor DT via a first contact portion CT1 that penetrates the first planarization film 310, and the anode electrode AND may be connected to a second contact portion CT2 that penetrates the second and third planarization films 320 and 330.

[0063] This allows one of the electrodes on the drive transistor DT to be electrically contacted with the anode electrode AND of the light-emitting element OLED.

[0064] Bank 400 may be located on the third planarization film 330. Bank 400 may contain an organic insulating material. Bank 400 may cover the edge of the anode electrode AND. The light-emitting layer EL and cathode electrode CTD may be laminated on a portion of the anode electrode AND exposed by bank 400. For example, bank 400 may define the light-emitting region of each subpixel SP. That is, the light-emitting region of each subpixel SP may be demarcated by bank 400.

[0065] The light-emitting element OLED may be located in the light-emitting region and may include an anode electrode AND, a light-emitting layer EL, and a cathode electrode CTD. Figure 3 illustrates a case where part of the light-emitting layer EL and cathode electrode CTD are located on bank 400, but the present invention is not necessarily limited thereto.

[0066] The display panel 10 of the present invention may have, for example, a top emission type structure in which light emitted from a light-emitting element OLED is emitted onto a substrate 100 on which the light-emitting element OLED is arranged.

[0067] For this purpose, the anode electrode AND may include a conductive material and have a structure in which a transparent conductive layer (not shown) and a reflective layer (not shown) are laminated beneath the transparent conductive layer. The transparent conductive layer may consist of a transparent conductive oxide such as ITO or IZO, and the reflective layer may consist of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or alloys thereof.

[0068] As a result, the anode electrode AND can reflect light incident from the entire surface on which the light-emitting layer EL is located, via the high reflectivity of the reflective layer.

[0069] The light-emitting layer (EL) can generate light with a brightness corresponding to the voltage difference between the anode electrode (AND) and the cathode electrode (CTD). For example, the light-emitting layer (EL) may include a light-emitting material layer (EMIM) containing a light-emitting substance. The light-emitting material may include organic materials, inorganic materials, or hybrid materials. For example, the light-emitting layer (EL) may include a light-emitting material layer (EML) made of organic material. The light-emitting material may include organic materials, inorganic materials, or hybrid materials. For example, the light-emitting layer (EL) may include a light-emitting material layer made of organic material.

[0070] The cathode electrode (CTD) may contain a conductive material. The cathode electrode (CTD) may contain a different material than the anode electrode (AND). For example, the cathode electrode (CTD) may be a transparent electrode made of transparent conductive materials such as ITO and IZO. The cathode electrode (CTD) may have higher transmittance than the anode electrode (AND).

[0071] For example, the cathode electrode CTD may be formed from a transparent metal oxide such as indium tin oxide (ITO) or indium zinc oxide (IDU), but is not limited to these. If the display device is a top-emitting type, the cathode electrode CTD may be arranged using a light-transmitting translucent conductive material. For example, the cathode electrode CTD may be formed from at least one of the alloys such as LiF / Al, CsF / Al, MgAg, Ca / Ag, CaAg, LiF / MgAg, LiF / Ca / Ag, and LiF / CaAg.

[0072] The encapsulation layer 500 may be placed on the cathode electrode CTD of the light-emitting layer EL, which can prevent damage to the light-emitting element OLED from external shocks and moisture. The encapsulation layer 500 may consist of alternating layers of inorganic insulating material and organic insulating material. For example, as shown in Figure 3, the encapsulation layer 500 may include first, second, and third encapsulation layers 510, 520, and 530. The first and third encapsulation layers 510 and 530 may include inorganic insulating material layers, and the second encapsulation layer 520 may include an organic insulating material layer.

[0073] In the display panel structure shown in Figure 3, the present invention may be made possible in order to suppress the degradation of the threshold voltage Vth of the drive transistor DT due to the PBTS, which reduces the brightness of the display panel 10, by superimposing at least one of the anode electrode AND and the intermediate electrode SD2 on the first active layer ACT1 of the switching transistor ST, so as not to overlap with at least a portion of ACT2.

[0074] For example, as shown in Figure 3, the anode electrode AND and the intermediate electrode SD2 may overlap with the first active layer ACT1 of the switching transistor ST, and may overlap with or not overlap with a portion of the second active layer ACT2 of the driving transistor DT. In other words, the second active layer ACT2 of the driving transistor DT may include portions that do not overlap with either the anode electrode AND or the intermediate electrode SD2.

[0075] Specifically, in Figure 3, the anode electrode AND and the intermediate electrode SD2 do not need to overlap with the portion of the second active layer ACT2 of the driving transistor DT that is not superimposed on the second gate electrode G2, the second source electrode DSD1a, and the second drain electrode DSD1b.

[0076] In the second active layer ACT2 of the drive transistor DT, the exposed region that does not overlap with the anode electrode AND and the intermediate electrode SD2, and is exposed to external light, may overlap with bank 400.

[0077] For reference, Figure 3 shows an example where the drive transistor DT is connected to the anode electrode AND via the intermediate electrode SD2, but the present invention is not limited to this. That is, the drive transistor DT may be electrically connected to the anode electrode AND via another switching transistor ST.

[0078] Figure 4 is a diagram illustrating the superposition relationship between the anode electrode, the intermediate electrode, the switching transistor, and the driving transistor in a subpixel according to the present invention.

[0079] Figure 4 shows, for ease of understanding, an example of the regions in a subpixel SP where the anode electrode AND and intermediate electrode SD2 are located, the switching transistor ST is located, and the driving transistor DT is located. In Figure 4, for example, the region where the switching transistor ST is located may be the same as the location of the first active layer ACT1 of the switching transistor ST, and the region where the driving transistor DT is located may be the same as the location of the second active layer ACT2 of the driving transistor DT. In Figure 4, for ease of understanding, the remaining components of the subpixel (e.g., source electrode), drain electrode, light-emitting layer EL, etc. are omitted from the illustration.

[0080] As shown in Figure 4, one or the other side of each of the multiple switching transistors ST and the drive transistor DT may be connected to the intermediate electrode SD2 via the first contact portion CT1, at least one of the multiple switching transistors ST and the drive transistor DT may be electrically connected to each other via the intermediate electrode SD2, and the anode electrode AND may be connected to the intermediate electrode SD2 via the second contact portion CT2.

[0081] The pattern forming the intermediate electrode SD2 and the pattern forming the anode electrode AND may have irregular shapes, as shown in Figure 4.

[0082] As shown in Figure 4, the intermediate electrode SD2 and the anode electrode AND may overlap with the entire first active layer ACT1 of the switching transistor ST, or the anode electrode AND excluding the intermediate electrode SD2 may overlap with the entire first active layer ACT1. Alternatively, although not shown in Figure 4, the intermediate electrode SD2 excluding the anode electrode AND may overlap with the entire first active layer ACT1.

[0083] This makes it possible to prevent the first active layer ACT1 of the switching transistor ST from being exposed to external light and undergoing a negative shift.

[0084] On the other hand, as shown in Figure 4, the second active layer ACT2 of the drive transistor DT partially overlaps with the intermediate electrode SD2, but other parts may not overlap with the intermediate electrode SD2 or the anode electrode AND.

[0085] As a result, the present invention takes into account the characteristics of the drive transistor DT, which is subjected to stress in a direction that is positively shifted due to characteristics of the drive system such as the compensation circuit, and by exposing at least a part of the second active layer ACT2 of the drive transistor DT to external light, as explained in Figures 3 and 4, the phenomenon of the threshold voltage Vth of the drive transistor DT being positively shifted can be counteracted.

[0086] The following section provides a more detailed explanation of the region of the drive transistor DT that is exposed to external light.

[0087] Figure 5 is a diagram that more specifically illustrates the non-overlapping portion of the driving transistors in the subpixel according to the present invention.

[0088] Specifically, Figure 5(a) is an enlarged example of the area in a subpixel where the drive transistor DT is located, and Figure 5(b) shows a cross-section along the CS-CS line shown in Figure 5(a).

[0089] For reference, in Figure 5(a), for ease of understanding, the second source electrode DSD1a, second drain electrode DSD1b, interlayer insulating film 200, gate insulating film 150, second buffer layer 140b, and third buffer layer 140c shown in Figure 5(b) are omitted, and in Figure 5(b), the anode electrode AND shown in Figure 5(a) is omitted.

[0090] As shown in Figures 5(a) and (b), the drive transistor DT may be configured to include a second metal layer BOT, a second active layer ACT2, a second gate electrode G2, a second source electrode DSD1a, and a second drain electrode DSD1b.

[0091] Specifically, as shown in Figure 5, in the drive transistor DT, the second metal layer BOT can be placed in overlap with the second active layer ACT2 and electrically connected to the second source electrode DSD1a. The second gate electrode G2 may overlap with the channel region of the second active layer ACT2. The second source electrode DSD1a is in contact with one side of the second active layer ACT2, overlapping with it, and the second drain electrode DSD1b is in contact with the other side of the second active layer ACT2.

[0092] On the second active layer ACT2, the second gate electrode G2 is separated from the second source electrode DSD1a and the second drain electrode DSD1b.

[0093] The portions of the second active layer ACT2 of the drive transistor DT that overlap with the second gate electrode G2, the second source electrode DSD1a, and the second drain electrode DSD1b can be defined as the non-exposed region NEA.

[0094] Furthermore, in the second active layer ACT2, the portion that does not overlap with the second gate electrode G2, the second source electrode DSD1a, and the second drain electrode DSD1b can be defined as the exposed region EA. That is, the exposed region EA is exposed outside the second gate electrode G2, the second source electrode DSD1a, and the second drain electrode DSD1b in the second active layer ACT2.

[0095] Furthermore, the first, second, and third intermediate electrodes SD2a, SD2b, and SD2c are positioned on the second source electrode DSD1a and the second drain electrode DSD1b. The first intermediate electrode SD2a may contact the second source electrode DSD1a via the firsta contact portion CT1a, the second intermediate electrode SD2b may contact the second gate electrode G2 via the firstb contact portion CT1b, and the third intermediate electrode SD2c may contact the second drain electrode DSD1b via the firstc contact portion CT1c.

[0096] Although not shown in Figure 5(b), as shown in Figure 5(a), the anode electrode AND may be positioned to overlap with a portion of the intermediate electrode SD2. For example, as shown in Figure 5(a), the anode electrode AND may be in contact with the first intermediate electrode SD2a via the second contact portion CT2, overlapping with the entire first intermediate electrode SD2a and covering a portion of the second intermediate electrode SD2b. Furthermore, the anode electrode AND located above the second drain electrode DSD1b of the drive transistor DT may overlap with most of the third intermediate electrode SD2c, excluding a portion of it.

[0097] The present invention makes it possible to ensure that the exposed region EA in the second active layer ACT2 of the drive transistor DT does not overlap with the anode electrode AND and the first, second, and third intermediate electrodes SD2a, SD2b, and SD2c. This allows external light to penetrate between the anode electrode AND and the first, second, and third intermediate electrodes SD2a, SD2b, and SD2c and be incident on the exposed region EA of the second active layer ACT2. As a result, the present invention may increase the amount of carriers contained in the second active layer ACT2 via the incident external light, thereby offsetting the positive bias thermal stress (PBTS) experienced by the drive transistor DT.

[0098] The following explains the principle by which external light cancels out the positive bias thermal stress (PBTS) of the drive transistor DT.

[0099] Figures 6a and 6b illustrate the principle by which the positive bias thermal stress (PBTS) of the drive transistor DT is canceled out.

[0100] Figure 6a shows an energy band diagram illustrating the degradation of the drive transistor DT when it is not exposed to external light, and Figure 6b shows an energy band diagram illustrating how the degradation of the drive transistor DT is offset or prevented when it is exposed to external light.

[0101] In Figures 6a and 6b, Ec represents the conduction band formed in the second active layer ACT2, Ev represents the valence band, Ef represents the Fermi level, and TS indicates the trap site where carriers are trapped at the interface between the second active layer ACT2 and the gate insulating film 150.

[0102] In the following section, we will explain using the example of an n-type drive transistor DT that has electrons (e-) as carriers.

[0103] As described above in Figures 1 and 2, when a (+) voltage is continuously applied to the gate electrode of the drive transistor DT by a compensation circuit or the like, as shown in Figure 6a, some of the electrons (e-) moving through the conduction band Ec of the second active layer ACT2 can be trapped at the trap site TS located at the interface between the second active layer ACT2 and the gate insulating film 150 by the (+) voltage continuously applied to the second gate electrode G2.

[0104] As the operating time of the drive transistor DT increases, the amount of electrons (e-) trapped at the trap site TS accumulates, which can gradually decrease the driving current of the drive transistor DT. This can lead to a phenomenon where the brightness of the light-emitting element OLED gradually decreases as the operating time of the display panel increases.

[0105] However, as explained earlier in Figures 3-5, when the exposed region EA of the second active layer ACT2 provided in the drive transistor DT is exposed to external light, as shown in Figure 6b, the energy hv of the external light having a value greater than the band gap BG excites electrons (e-) in the valence band Ev to the conduction band Ec, and holes (h+) are formed in the valence band Ev, while a large number of electron-hole pairs can be formed within the second active layer ACT2. Thus, the present invention can use electrons (e-) excited to the conduction band Ec by external light to compensate for the amount of electrons (e-) lost in the trap, thereby minimizing the reduction in the amount of drive current.

[0106] In addition, some of the holes (h+) generated by external light may combine with trapped electrons (e-), reducing the amount of trapped electrons (e-). When the (+) voltage applied to the second gate electrode G2 of the drive transistor DT is released, the electrons (e-) and holes h(+) immediately connect, and this positive shift can be suppressed.

[0107] Figure 7 illustrates another example of the cross-sectional structure of the display panel according to the present invention.

[0108] In the explanation of Figure 7, we will replace any overlapping content with that explained in Figures 3 to 6 with the content from Figures 3 to 6, and then focus on explaining the differences between Figures 3 to 6 and Figure 7.

[0109] An example of the cross-sectional structure of a display panel shown in Figure 7 may represent the cross-sectional structure of a subpixel. As shown in Figure 7, in an example of the present invention, the cross-sectional structure of the display panel 10 may include a substrate 100, a substrate insulating film 110, a buffer layer 140, a gate insulating film 150, an interlayer insulating film 200, a planarization film 300, an intermediate electrode SD2, a bank 400, a light-emitting element OLED, a sealing layer 500, a switching transistor ST, and a drive transistor DT. A touch insulating film 600, a touch electrode TE, a bridge electrode TB, a black matrix BM, a color filter CF, and an upper planarization film 700 may be further arranged on the sealing layer 500.

[0110] Here, the explanations for the substrate 100, substrate insulating film 110, buffer layer 140, gate insulating film 150, interlayer insulating film 200, planarization film 300, intermediate electrode SD2, light-emitting element, encapsulation layer 500, switching transistor, and drive transistor DT, excluding bank 400, are replaced by the contents of Figures 3 to 6.

[0111] As shown in Figure 7, Bank 400 may contain light-absorbing materials. For example, Bank 400 may contain a black pigment such as carbon black. This allows Bank 400 to absorb external light and minimize light reflectivity, thereby improving black color, light-to-dark ratio, color accuracy, and further enhancing image quality.

[0112] As shown in Figure 7, bank 400 may have a bank hole H400 that penetrates a portion of the bank, and the bank hole H400 may overlap with the exposed region EA of the drive transistor DT.

[0113] Furthermore, at least one of the light-emitting layer EL and the cathode electrode CTD may be located within the bank hole H400, and the anode electrode AND may not be superimposed on the bank hole H400.

[0114] Thus, in the present invention, when the bank 400 contains a light-absorbing material, the bank hole H400 is made to overlap with the exposed region EA of the drive transistor DT, and at least one of the light-emitting layer EL and cathode electrode CTD with high light transmittance is located within the bank hole H400, so that external light can be incident on the exposed region of the drive transistor DT through the bank hole H400.

[0115] As a result, the present invention can suppress the positive shift of the threshold voltage Vth of the drive transistor DT due to positive bias thermal stress (PBTS).

[0116] The touch insulating film 600 is comprised of multiple layers stacked together, each containing an organic or inorganic insulating material.

[0117] For example, the touch insulating film 600 may include the first, second, and third touch insulating films 610, 620, and 630.

[0118] The first touch insulating film 610 is placed on the third sealing layer 530, and a bridge electrode TB connecting the touch electrode TE may be patterned and placed on the first touch insulating film 610.

[0119] The second touch insulating film 620 may be deposited on the first touch insulating film 610 while covering the bridge electrode TB, and the touch electrode TE may be placed on the second touch insulating film 620. The touch electrode TE may be electrically connected to the bridge electrode TB by penetrating the second touch insulating film 620.

[0120] Although not shown, the touch electrode TE may include a touch drive electrode that transmits a touch drive signal and a touch receive electrode that senses the touch drive signal, the touch drive electrode and the touch receive electrode may be arranged in a matrix configuration, the touch drive electrode may extend in a first direction, and the touch receive electrode may extend in a second direction intersecting the first direction.

[0121] Either one of the touch driving electrode and the touch receiving electrode may be separated at an intersection where they cross, and the electrode separated at the intersection may be connected via a bridge electrode TB.

[0122] The third touch insulating film 630 may be placed on the second touch insulating film 620 while covering the touch electrode TE.

[0123] The black matrix BM may be placed on the third touch insulating film 630 and may contain a light-absorbing material, such as a black pigment. The black matrix BM may overlap with bank 400.

[0124] The color filter CF is positioned on top of the third touch insulating film 630, between the black matrix BM, and may overlap with the light-emitting region of the light-emitting element OLED. The color filter CF may have the same color as the color emitted by the light-emitting element OLED, which can further enhance the vividness of the light-emitting color of the light-emitting element OLED.

[0125] The black matrix BM may have BM holes HBM that penetrate in some areas. The BM holes HBM may overlap with bank holes H400 and may overlap with the exposed region EA of the drive transistor DT. As a result, external light can be incident on the exposed region EA of the drive transistor DT through the BM holes HBM and bank holes H400.

[0126] The upper planarization film 700 may be placed on the color filter CF and the black matrix BM, and contains a highly fluid insulating material that can eliminate the step formed by the color filter CF and the black matrix BM.

[0127] The upper planarization film 700 may fill the interior of the BM hole HBM and may come into contact with the third touch insulating film 630 through the BM hole HBM. Thus, even when the present invention includes a bank 400 containing a light-absorbing material and a black matrix BM, the drive transistor DT can be exposed to external light by providing a bank hole H400 and a BM hole HBM that overlap with the exposed region EA of the drive transistor DT.

[0128] As a result, the present invention can suppress the positive shift of the threshold voltage of the drive transistor DT due to positive bias thermal stress (PBTS) by exposing at least a portion of the drive transistor DT, excluding the switching transistor ST, to external light, thereby further improving the reliability of the display panel. Those skilled in the art will understand from the above explanation that a variety of changes and modifications are possible without departing from the technical concept of the present invention. Therefore, the technical scope of the present invention should not be limited to what is described in the detailed description of the specification, but should be defined by the claims. [Explanation of Symbols]

[0129] 10 Display Panel SP subpixel DL Dataline GL Gate Line ST Switching Transistor DT drive transistor OLED light-emitting element

Claims

1. circuit board and A switching transistor is disposed on the substrate and includes a first gate electrode, a first source electrode, a first drain electrode, and a first active layer. A drive transistor is disposed on the substrate at a distance from the switching transistor and includes a second gate electrode, a second source electrode, a second drain electrode, and a second active layer. A light-emitting element comprising an anode electrode electrically connected to one of the second source electrode and the second drain electrode of the drive transistor, and a light-emitting layer located on the anode electrode and a cathode electrode located on the light-emitting layer, The drive transistor includes an intermediate electrode that electrically connects one of the second source electrode and the second drain electrode of the drive transistor to the anode electrode, The first active layer of the switching transistor overlaps with at least one of the anode electrode and the intermediate electrode. A display panel wherein at least a portion of the second active layer of the drive transistor does not overlap with the anode electrode and the intermediate electrode.

2. The display panel according to claim 1, wherein the entire first active layer of the switching transistor overlaps with at least one of the anode electrode and the intermediate electrode.

3. The display panel according to claim 1, wherein the first active layer and / or the second active layer comprises an oxide semiconductor.

4. The second active layer of the drive transistor is Non-exposed regions overlapping with the second gate electrode, the second source electrode, and the second drain electrode, Includes an exposed region that does not overlap with the second gate electrode, the second source electrode, and the second drain electrode, The display panel according to claim 1, wherein at least the exposed region of the second active layer of the drive transistor does not overlap with the anode electrode and the intermediate electrode.

5. The display panel according to claim 4, wherein at least the exposed region of the second active layer of the drive transistor overlaps with the bank.

6. The display panel according to claim 5, wherein the bank contains a light-absorbing material.

7. The bank includes a bank hole that penetrates a portion of the bank's area, The display panel according to claim 5, wherein at least one of the light-emitting layer and the cathode electrode is located within the bank hole.

8. The display panel according to claim 7, wherein the anode electrode does not overlap with the bank hole.

9. The display panel according to claim 7, wherein the bank hole overlaps with the exposed region of the second active layer of the drive transistor.

10. A black matrix is ​​placed on top of the light-emitting element. The display panel according to claim 7, wherein a color filter is arranged between parts of the black matrix.

11. The display panel according to claim 10, wherein the color filter overlaps with the light-emitting region of the light-emitting element.

12. The display panel according to claim 10, wherein the black matrix includes a light-absorbing material and overlaps with the bank.

13. The display panel according to claim 10, wherein the black matrix comprises BM holes that penetrate a portion of its area.

14. The display panel according to claim 13, wherein the BM hole overlaps with the bank hole.

15. The display panel according to claim 13, wherein the BM hole overlaps with the exposed area of ​​the second active layer of the drive transistor.