Phase shift circuit, antenna system, and communication device

Abstract

The present application provides a phase shift circuit, an antenna system, and a communication device. The phase shift circuit includes an input terminal, an output terminal, a phase lead branch circuit, and a phase lag branch circuit. The phase lead branch circuit and the phase lag branch circuit are connected in parallel between the input terminal and the output terminal. The phase lead branch circuit includes a first high-frequency switch section and a phase lead section. The first high-frequency switch section and the phase lead section are connected in series between the input terminal and the output terminal. The phase lag branch circuit includes a first phase lag section, a second phase lag section, and a second high-frequency switch section. The first phase lag section and the second phase lag section are connected in series between the input terminal and the output terminal, and the second high-frequency switch section is connected between ground and a first connection point between the first phase lag section and the second phase lag section. According to the present application, the volume occupied by the phase shift circuit can be reduced, the cost is low, the power capacity and linearity index of the phase shift circuit are improved, and insertion loss is small.

Description

[Technical Field]

[0001] The present application relates to the field of wireless communication technology, and in particular to a phase shift circuit, an antenna system, and a communication device. [Background technology]

[0002] In wireless communication technology, beamforming is commonly used to improve communication capacity and quality. Beamforming concentrates energy in a specific direction by controlling the relative delay and amplitude between electromagnetic waves transmitted by a wave source, and wireless signals are propagated in a specific direction in the form of electromagnetic waves.

[0003] In certain embodiments, the relative delay between the electromagnetic waves transmitted by the wave source can be controlled by using a phase shift circuit. For example, in the existing phase shift circuit shown in Figure 1, L1 and L2 are two transmission lines. When a high-frequency signal passes through a transmission line of a certain length, a phase delay occurs. In addition, when the same high-frequency signal passes through transmission lines of different lengths, it will have different degrees of phase delay. Switch K 11 Contact 1 of switch K contacts contact 2. 12 When contact 1 of switch K is in contact with contact 2, the phase of the high frequency signal passing through transmission line L1 is delayed by φ1. 11 Contact 1 of switch K contacts contact 3. 12 When contact 1 of switch K is in contact with contact 3, the phase of the high frequency signal passing through transmission line L2 is delayed by φ2. 11 and switch K 12 is switched between two states: one in which contact 1 is in contact with contact 2, and the other in which contact 1 is in contact with contact 3. The phase shift circuit shown in Figure 1 can implement a phase shift amount Δφ = φ1 - φ2. The high-frequency signal output by the phase shift circuit is converted into an electromagnetic wave and transmitted via the antenna unit, and the propagation direction of the electromagnetic wave is related to the phase shift amount Δφ.

[0004] A phase shift circuit switches the transmission path of a high-frequency signal by switching the state of a switch element, and performs a phase shift on the high-frequency signal based on the difference in the delay phase of the high-frequency signal on the different transmission paths. The amount of phase shift in a phase shift circuit is related to the amount of phase delay. In the phase shift circuit shown in Figure 1, a larger amount of phase shift indicates a larger amount of phase delay that needs to be implemented on each transmission path. This larger amount of phase delay indicates a longer length of the transmission line and a larger volume occupied by the phase shift circuit. Therefore, how to reduce the volume occupied by the phase shift circuit while ensuring the same amount of phase shift is obtained is an important issue to be investigated. Summary of the Invention

[0005] The embodiments of the present application provide a phase shift circuit, an antenna system, and a communication device, which, while achieving the same phase shift amount, can reduce the volume occupied by the phase shift circuit, improve the power capacity of the phase shift circuit, improve the linearity index of the phase shift circuit, lower the cost, and reduce the insertion loss. [Means for solving the problem]

[0006] According to a first aspect, an embodiment of the present application provides a phase shift circuit, the phase shift circuit including an input terminal, an output terminal, a phase lead branch circuit, and a phase lag branch circuit, the phase lead branch circuit and the phase lag branch circuit being connected in parallel between the input terminal and the output terminal.

[0007] In one specific embodiment, the phase-lead branch circuit includes a first high-frequency switch section and a phase-lead section, and the first high-frequency switch section and the phase-lead section are connected in series between the input end and the output end. The phase-lag branch circuit includes a first phase-lag section, a second phase-lag section, and a second high-frequency switch section. The first phase-lag section and the second phase-lag section are connected in series between the input end and the output end. A first connection point between the first phase-lag section and the second phase-lag section is connected to one end of the second high-frequency switch section, and the other end of the second high-frequency switch section is grounded.

[0008] The implementation principle of this embodiment of the present application is as follows: when the first high-frequency switch unit and the second high-frequency switch unit are in an on state, a phase lead is obtained, specifically, the phase of the high-frequency signal output by the output terminal leads the phase of the high-frequency signal input by the input terminal. When the first high-frequency switch unit and the second high-frequency switch unit are in an off state, a phase lag is obtained, specifically, the phase of the high-frequency signal output by the output terminal lags the phase of the high-frequency signal input by the input terminal. In this embodiment of the present application, the phase lead should be described as being obtained by using a phase lead branch circuit. Therefore, when the same phase shift amount as that of the existing phase shift circuit is obtained, the amount of phase delay that needs to be implemented by the phase lag branch circuit is reduced, thereby reducing the length of the transmission line in the phase lag unit and further reducing the volume occupied by the phase shift circuit. In addition, the volume occupied by the phase shift circuit is reduced, and the volume of the printed circuit board (PCB) on which the phase shift circuit is etched is also reduced, thereby reducing material costs.

[0009] Regarding the first aspect, in a first possible implementation, the phase advance section includes a first inductive section, and the first inductive section and the first high-frequency switch section are connected in series between the input end and the output end.

[0010] Regarding the first aspect, in a second possible implementation mode, the phase advance unit includes a first capacitive unit, and the first capacitive unit and the first high-frequency switch unit are connected in series between the input end and the output end.

[0011] Regarding the second possible implementation example of the first aspect, in a third possible implementation example, the phase lead section further includes a second inductive section. One end of the second inductive section is connected to the second connection point, and the other end of the second inductive section is grounded. The second connection point is a connection point between the first high-frequency switch section and the first capacitive section. According to this embodiment of the present application, the amount of phase lead of the phase lead section can be further increased.

[0012] In a fourth possible embodiment, the phase-advance branch circuit further includes a third inductive section. The third inductive section and the first capacitive section are connected in parallel. In this embodiment of the present application, the third inductive section is added, and the third inductive section and the capacitive section in the phase-advance section form an LC resonance. This suppresses low-frequency signals outside the main operating frequency band, reduces low-frequency nonlinear products generated by the phase-shift circuit, and prevents the phase-shift circuit from affecting other communication devices.

[0013] With respect to the first aspect or any one of the preceding possible implementation forms of the first aspect, in a fifth possible implementation form the phase delay sub-circuit further comprises a third phase delay section.

[0014] The first connection point between the first phase delay unit and the second phase delay unit is connected to one end of the second high-frequency switch unit, and the other end of the second high-frequency switch unit is grounded. Specifically, the third phase delay unit and the second high-frequency switch unit are connected in series between the first connection point and ground. In this embodiment of the present application, the first phase delay unit, the second phase delay unit, and the third phase delay unit jointly perform phase delay, thereby further reducing the volume occupied by the phase shift circuit.

[0015] Regarding the fifth possible implementation mode of the first aspect, in a sixth possible implementation mode, the phase delay branch circuit further includes a second capacitive section.

[0016] The third phase delay unit and the second high-frequency switch unit are connected in series between the first connection point and ground. Details are as follows.

[0017] The second capacitance section, the third phase delay section, and the second high-frequency switch section are connected in series between the first connection point and ground. In this embodiment of the present application, the second capacitance section can further reduce the voltage that needs to be borne by both ends of the second high-frequency switch section.

[0018] Regarding the sixth possible implementation example of the first aspect, in a seventh possible implementation example, the phase delay branch circuit further includes a fourth inductive section. The fourth inductive section and the second capacitive section are connected in parallel. In this embodiment of the present application, the fourth inductive section is added, and the fourth inductive section and the capacitive section in the phase delay section form an LC resonance. Therefore, low-frequency signals outside the main operating frequency band can be suppressed, low-frequency nonlinear products generated by the phase shift circuit can be reduced, and the influence of the phase shift circuit on other communication devices can be avoided.

[0019] With respect to the first aspect, or with respect to any of the first possible implementation form of the first aspect to the fourth possible implementation form of the first aspect, in an eighth possible implementation form, the phase delay branch circuit further includes a third capacitive section.

[0020] The first connection point between the first phase delay unit and the second phase delay unit is connected to one end of the second high-frequency switch unit, and the other end of the second high-frequency switch unit is grounded. Specifically, the third capacitance unit and the second high-frequency switch unit are connected in series between the first connection point and ground. In this embodiment of the present application, the third capacitance unit can further reduce the voltage that needs to be borne by both ends of the second high-frequency switch unit.

[0021] Regarding the eighth possible embodiment of the first aspect, in a ninth possible embodiment, the phase delay branch circuit further includes a fifth inductive section. The fifth inductive section and the third capacitive section are connected in parallel. In this embodiment of the present application, the fifth inductive section is added, and the fifth inductive section and the capacitive section in the phase delay section form an LC resonance. Therefore, low-frequency signals outside the main operating frequency band can be suppressed, low-frequency nonlinear products generated by the phase shift circuit can be reduced, and the influence of the phase shift circuit on other communication devices can be avoided.

[0022] According to a second aspect, an embodiment of the present application provides an antenna system, comprising: an antenna unit and a phase shift circuit according to the first aspect or any one of the above possible implementations of the first aspect, the phase shift circuit being connected to the antenna unit.

[0023] According to a third aspect, an embodiment of the present application provides a communication device, the communication device including a digital intermediate frequency unit, a high frequency unit connected to the digital intermediate frequency unit, and an antenna unit, the high frequency unit including a phase shift circuit according to the first aspect or any one of the above possible implementations of the first aspect, the phase shift circuit being connected to the antenna unit.

[0024] It is understood that cross-references may be made to the implementations and beneficial effects of the foregoing aspects of the present application. [Brief explanation of the drawings]

[0025] [Figure 1] FIG. 1 illustrates a phase shift circuit according to the prior art. [Figure 2] 1 is a diagram of the structure of a communication device according to an embodiment of the present application; [Figure 3] FIG. 2 is a diagram of another structure of a communication device according to an embodiment of the present application. [Figure 4] FIG. 2 is a diagram of another structure of a communication device according to an embodiment of the present application. [Figure 5] 1 is a diagram of the structure of an antenna system according to an embodiment of the present application; [Figure 6] FIG. 2 is a diagram of another configuration of an antenna system according to an embodiment of the present application. [Figure 7] FIG. 2 is a block diagram of a circuit structure of a phase shift circuit according to an embodiment of the present application; [Figure 8] FIG. 2 is a diagram of a high frequency signal according to an embodiment of the present application. [Figure 9A] FIG. 2 is a circuit diagram of a phase advance unit according to an embodiment of the present application. [Figure 9B] FIG. 2 is a circuit diagram of a phase advance unit according to an embodiment of the present application. [Figure 9C] FIG. 2 is a circuit diagram of a phase advance unit according to an embodiment of the present application. [Figure 9D] FIG. 2 is a circuit diagram of a phase advance unit according to an embodiment of the present application. [Figure 9E] FIG. 2 is a circuit diagram of a phase advance unit according to an embodiment of the present application. [Figure 9F] FIG. 2 is a circuit diagram of a phase advance unit according to an embodiment of the present application. [Figure 9G] FIG. 2 is a circuit diagram of a phase advance unit according to an embodiment of the present application. [Figure 9H] FIG. 2 is a circuit diagram of a phase advance unit according to an embodiment of the present application. [Figure 10] FIG. 10 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. [Figure 11] FIG. 10 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. [Figure 12] FIG. 10 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. [Figure 13] FIG. 10 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. [Figure 14] FIG. 10 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. [Figure 15] FIG. 10 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. [Figure 16] FIG. 10 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. [Figure 17A] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17B] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17C] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17D] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17E] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17F] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17G] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17H] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17I] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17J] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. [Figure 17K] FIG. 2 is a circuit diagram of a phase delay unit according to an embodiment of the present application. DETAILED DESCRIPTION OF THE INVENTION

[0026] The following clearly and completely describes the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. It is clear that the described embodiments are only a part, not all, of the embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0027] Hereinafter, the embodiments of the technical solutions of the present application are further described with reference to the accompanying drawings.

[0028] 2 is a diagram of a structure of a communication device according to an embodiment of the present application. As shown in FIG. 2, a communication device 20 is connected to a baseband processing unit 21 via an optical fiber. The baseband processing unit 21 may be referred to as a BBU (Baseband Unit), and the BBU may perform baseband processing functions, such as encoding, multiplexing, modulation, and spreading.

[0029] The communication device 20 is connected via a feeder to the antenna section 22. The antenna section 22 includes at least one antenna element.

[0030] The optical fiber transmits optical signals, in other words, optical signals are transmitted between the baseband processing unit 21 and the communication device 20. The feeder transmits electrical signals, in other words, electrical signals are transmitted between the communication device 20 and the antenna unit 22.

[0031] The communication device 20 includes a digital intermediate frequency unit 201 and a high frequency unit 202 connected to the digital intermediate frequency unit 201. The baseband processing unit 21 is specifically connected to the digital intermediate frequency unit 201 in the communication device 20. The digital intermediate frequency unit 201 is configured to perform modulation and demodulation for optical transmission, digital up / down conversion, signal clipping, analog-to-digital conversion, and the like.

[0032] The high frequency section 202 includes a phase shift circuit 2021 that may provide a phase shift to the high frequency signal within the high frequency section 202 .

[0033] In some possible implementations, the high frequency unit 202 further includes a filter circuit 2022, which is located between the phase shift circuit 2021 and the digital intermediate frequency unit 201. The filter circuit 2022 can perform frequency selection on the high frequency signal in the high frequency unit 202 to remove interference frequency bands of the high frequency signal in the high frequency unit 202.

[0034] Furthermore, high frequency unit 202 further includes a power amplifier circuit 2023. Power amplifier circuit 2023 is located between filter circuit 2022 and digital intermediate frequency unit 201, and can perform power amplification on the high frequency signal. In this case, digital intermediate frequency unit 201 is specifically connected to power amplifier circuit 2023 in high frequency unit 202.

[0035] For example, the communication device 20 transmits a signal. The digital intermediate frequency unit 201 modulates the baseband signal transmitted by the baseband processing unit 21 to obtain a first high-frequency signal. The first high-frequency signal is amplified by the power amplifier circuit 2023 and then transmitted to the filter circuit 2022. The filter circuit 2022 removes an interference frequency band to obtain a second high-frequency signal. The phase shift circuit 2021 performs a phase shift on the second high-frequency signal to obtain a third high-frequency signal, which is then converted into an electromagnetic wave using the antenna unit 22 and transmitted.

[0036] In some possible implementations, an antenna unit may be further disposed in the communication device. FIG. 3 is a diagram of another structure of a communication device according to an embodiment of the present application. As shown in FIG. 3, the difference between the communication device 30 and the communication device 20 is that, in addition to the digital intermediate frequency unit 301 and the high frequency unit 302, the communication device 30 further includes an antenna unit 303. The antenna unit 303 includes at least one antenna element. In addition, each antenna element in the antenna unit 303 is specifically connected to one end of a phase shift circuit 3021 in the high frequency unit 302, the other end of which is connected to one end of a power amplifier circuit 3023 using a filter circuit 3022, the other end of which is connected to one end of the digital intermediate frequency unit 301, and the other end of which is connected to the baseband processing unit 31. It will be understood that a specific implementation of the communication device 30 refers to a specific implementation of the communication device 20. Details will not be repeated here.

[0037] In this embodiment of the present application, the antenna unit is integrated into the communication device, and the communication device can be understood as an active antenna unit (AAU). According to this embodiment of the present application, the cable connection between the communication device and the antenna unit can be reduced, and the cost is low. In addition, the communication device and the antenna unit are integrated, resulting in high integration and high space utilization.

[0038] In some possible implementations, a communication device may have multiple antenna units, and phase shift circuits corresponding to the antenna units are arranged in the high-frequency unit. In this case, the communication device may be as shown in FIG. 4. The communication device 40 includes a digital intermediate frequency unit 401 and a high-frequency unit 402. The high-frequency unit 402 includes a phase shift circuit 4021a, a phase shift circuit 4021b, and a phase shift circuit 4021n. One end of the phase shift circuit 4021a is connected to the antenna unit 403a, one end of the phase shift circuit 4021b is connected to the antenna unit 403b, one end of the phase shift circuit 4021n is connected to the antenna unit 403n, and the other end of the phase shift circuit 4021a, the other end of the phase shift circuit 4021b, and the other end of the phase shift circuit 4021n are connected to one end of the filter circuit 4022. The filter circuit 4022 is connected to one end of the digital intermediate frequency unit 401 by using a power amplifier circuit 4023, and the other end of the digital intermediate frequency unit 401 is connected to the baseband processing unit 41. The difference from the communication device 30 is that multiple antenna units in the communication device 40 provided in this embodiment of the present application share one baseband processing unit 41. The baseband signal transmitted by the baseband processing unit 41 is modulated by the digital intermediate frequency unit 401 to obtain a fourth high-frequency signal. The fourth high-frequency signal is transmitted to a phase shift circuit by using a power amplifier circuit 4023 and a filter circuit 4022. The phase shift amount of the phase shift circuit can be different, resulting in electromagnetic waves propagated in different directions by the antenna units connected to the phase shift circuit.

[0039] For example, antenna portion 403a, antenna portion 403b, and antenna portion 403n each include at least one antenna element. Furthermore, one antenna array may include antenna portion 403a, antenna portion 403b, and antenna portion 403n. In this case, antenna portion 403a, antenna portion 403b, and antenna portion 403n may be arranged on the same PCB.

[0040] In this embodiment of the present application, multiple antenna sections and multiple phase shift circuits are integrated into a communication device, resulting in higher integration and better space utilization.

[0041] It should be noted that the communication device provided in the present application may be used in scenarios such as a base station, a terminal device, a radar, and a wireless fidelity (Wi-Fi) system. The terminal device may be, for example, an intelligent wearable device, a smartphone, a tablet computer, a notebook computer, an in-vehicle computer, a server, or an intelligent vehicle. In this embodiment of the present application, the specific implementation of the terminal device is not limited.

[0042] In some possible implementations, in addition to a communication device, a product form that can be specifically embodied in the present application can further be embodied as an antenna system. For example, Fig. 5 is a diagram of the structure of an antenna system according to an embodiment of the present application. As shown in Fig. 5, the antenna system 50 is connected to a remote radio unit 51. The remote radio unit 51 may be called an RRU (Remote Radio Unit).

[0043] The antenna system 50 includes a phase shift circuit 501 and an antenna unit 502. The phase shift circuit 501 is connected to the antenna unit 502. For example, the phase shift circuit 501 performs a phase shift on a fifth high frequency signal provided by the remote radio unit 51 to obtain a sixth high frequency signal. The antenna unit 502 converts the sixth high frequency signal into an electromagnetic wave, which is propagated in a specific direction to perform signal transmission.

[0044] Similarly, the antenna system may alternatively include a plurality of phase shift circuits and an antenna unit connected to the phase shift circuits. Figure 6 is a diagram of another structure of an antenna system according to an embodiment of the present application. As shown in Figure 6, the antenna system 60 is connected to a remote radio unit 61. The remote radio unit 61 may be referred to as an RRU (Remote Radio Unit).

[0045] The antenna system 60 includes a phase shift circuit 601a, a phase shift circuit 601b, and a phase shift circuit 601n. Specifically, the remote radio unit 61 is connected to one end of the phase shift circuit 601a, one end of the phase shift circuit 601b, and one end of the phase shift circuit 601n in the antenna system 60, and the other end of the phase shift circuit 601a is connected to the antenna unit 602a, the other end of the phase shift circuit 601b is connected to the antenna unit 602b, and the other end of the phase shift circuit 601n is connected to the antenna unit 602n. In this case, multiple phase shift circuits and multiple antenna units are integrated, resulting in high integration and high space utilization. For specific embodiments, please refer to the antenna system 50. Details will not be repeated here.

[0046] For example, antenna portion 602a, antenna portion 602b, and antenna portion 602n each include at least one antenna element. Furthermore, one antenna array may include antenna portion 602a, antenna portion 602b, and antenna portion 602n. In this case, antenna portion 602a, antenna portion 602b, and antenna portion 602n may be arranged on the same PCB.

[0047] The specific structure of the phase shift circuit provided in one embodiment of the present application will be described below with reference to the accompanying drawings.

[0048] First, Fig. 7 is a circuit block diagram of a phase shift circuit according to an embodiment of the present application. As shown in Fig. 7, the phase shift circuit includes an input terminal 701, an output terminal 702, a phase lead branch circuit 703, and a phase lag branch circuit 704. The phase lead branch circuit 703 and the phase lag branch circuit 704 are connected in parallel between the input terminal 701 and the output terminal 702.

[0049] The phase-lead branch circuit 703 includes a first high-frequency switch section and a phase-lead section 7031, and the phase-lag branch circuit 704 includes a first phase-lag section 7041, a second phase-lag section 7042, and a second high-frequency switch section.

[0050] It should be noted that in this embodiment of the present application, an example in which the first high-frequency switch unit and the second high-frequency switch unit are each specifically implemented as one switch is used to explain the technical solution. In some feasible implementations, the first high-frequency switch unit and the second high-frequency switch unit may be in the form of a specific implementation in which two or more switches are connected in series or in parallel. In other words, in this embodiment of the present application, the number of switches included in the first high-frequency switch unit and the second high-frequency switch unit is not limited, and the serial / parallel connection between multiple switches included in the same high-frequency switch unit is also not limited.

[0051] Optionally, the switches may be implemented as mechanical switches or semiconductor switches. The semiconductor switches may include, for example, ferrite switches, GaN switches, SOI switches, and PIN switches. In other words, the types of switches included in the first high frequency switch unit and the second high frequency switch unit are not limited in this embodiment of the present application.

[0052] It will be understood that when the first and second high frequency switch units are specifically implemented as semiconductor switches, the first and second high frequency switch units may be integrated into one switch chip, or the first and second high frequency switch units may be two separate switch chips. The product forms of the first and second high frequency switch units are not limited in this embodiment of the present application.

[0053] In this case, the connection relationship in the phase shift circuit is as follows: 71 The phase lead unit 7031 is connected in series between the input terminal 701 and the output terminal 702. The first phase delay unit 7041 and the second phase delay unit 7042 are connected in series between the input terminal 701 and the output terminal 702. A first connection point A between the first phase delay unit 7041 and the second phase delay unit 7042 is connected in series to a first connection point A via a switch K 72 connected to the first end of switch K 72 The second end of the is grounded.

[0054] Switch K shown in FIG. 71 It will be understood that the relative positional relationship between the first high-frequency switch section and the phase advance section 7031 is an example. In some possible implementations, the positions of the first high-frequency switch section and the phase advance section may be interchanged. In other words, the first high-frequency switch section is connected to the output end, and the phase advance section is connected to the input end. In this case, the first high-frequency switch section and the phase advance section are still connected in series between the input end and the output end.

[0055] Similarly, the relative positions of the first phase delay unit 7041 and the second phase delay unit 7042 shown in FIG. 7 are merely examples. In some possible implementations, the positions of the first phase delay unit and the second phase delay unit may be interchanged. In other words, the first phase delay unit is connected to the output terminal, and the second phase delay unit is connected to the input terminal. In this case, the first phase delay unit and the second phase delay unit are still connected in series between the input terminal and the output terminal.

[0056] In this embodiment of the present application, the first high frequency switch section and the second high frequency switch section are simultaneously on or off. In other words, the switch K 71 and switch K 72 are simultaneously on or off. For example, the on or off of the high frequency switch unit may be controlled by a controller.

[0057] Switch K 71 and switch K 72 is in the on state, the high frequency signal inputted by the input terminal 701 is 71 and transmitted to the output end 702 via the phase lead section 7031. In this case, the phase of the high frequency signal output by the output end 702 leads the phase of the high frequency signal input by the input end 701.

[0058] In some possible implementations, the high frequency signal input by the input terminal 701 is fed to the switch K 71 and the phase lead section 7031 to the output end 702, and can be further transmitted to the output end 702 via the first phase lag section 7041 and the second phase lag section 7042 in the phase lag branch circuit 704. In this case, most of the high frequency signal input by the input end 701 is transmitted to the output end 702 via the phase lead branch circuit 703, and a small part of the high frequency signal is transmitted to the output end 702 via the phase lag branch circuit 704. For example, the input end 701 inputs a seventh high frequency signal. When the seventh high frequency signal is transmitted to point B, 90% of the seventh high frequency signal is transmitted to the output end 702 via the switch K. 71and phase-advance section 7031 to point C to obtain an eighth high-frequency signal, and 10% of the seventh high-frequency signal is transmitted to point C via first phase-lag section 7041 and second phase-lag section 7042 to obtain a ninth high-frequency signal. The eighth high-frequency signal and the ninth high-frequency signal are combined at point C to obtain a tenth high-frequency signal, which is output by output terminal 702. Since the seventh high-frequency signal passes through phase-lag branch circuit 704 but most of the seventh high-frequency signal passes through phase-advance branch circuit 703, the phase of the combined tenth high-frequency signal still leads the phase of the seventh high-frequency signal. In other words, switch K 71 and switch K 72 When is in the on state, the phase of the high frequency signal output by the output terminal 702 leads the phase of the high frequency signal input by the input terminal 701 .

[0059] Switch K 71 and switch K 72 When the switch K is in the off state, the high frequency signal inputted by the input terminal 701 is transmitted to the output terminal 702 via the first phase delay section 7041 and the second phase delay section 7042 in the phase delay branch circuit 704. In this case, the switch K 71 is in the off state, and the phase lead branch circuit 703 is disconnected, but during transmission of the high frequency signal, the switch K 71 and phase lead unit 7031 may be coupled to points B and C via inductors and capacitors, respectively. 71 and switch K 72 is in the off state, the phase-lead branch circuit 703 specifically corresponds to a capacitive branch circuit, which is connected in parallel to the ground and loaded at points B and C, thereby further increasing the phase delay amount of the phase-lag branch circuit 704. In this case, the high-frequency signal input by the input terminal 701 is transmitted to the output terminal 702 via the first phase delay unit 7041 and the second phase delay unit 7042, and the phase of the high-frequency signal output by the output terminal 702 lags behind the phase of the high-frequency signal input by the input terminal 701.

[0060] For example, switch K 71 and switch K 72 When switch K is in an on state, the phase of the high frequency signal output by output terminal 702 leads the phase of the high frequency signal input by input terminal 701 by 45°, which is represented as +45°. 71 and switch K 72 is in the off state, the phase of the high frequency signal output by the output terminal 702 lags behind the phase of the high frequency signal input by the input terminal 701 by 45°, which is represented as −45°. In this case, the amount of phase shift that can be implemented by the phase shift circuit is +45°−(−45°)=90°.

[0061] Assume that the phase shift circuit shown in FIG. 1 in the prior art is used to implement a 90° phase shift. When the phase of the high frequency signal passing through transmission line L1 is delayed by 0°, the phase of the high frequency signal passing through transmission line L2 needs to be delayed by 90°. In this way, the phase shift circuit can implement a 90° phase shift. In this embodiment of the present application, the phase delay branch circuit 704 only needs to have a phase delay of 45° to implement a 90° phase shift. Specifically, in this embodiment of the present application, the phase advance section is implemented by switch K 71 and switch K 72 is used to obtain the phase lead when switch K is in the on state, and 71 and switch K 72 , and the phase delay amount of the phase-advance section is reduced. Because the value of the phase delay amount is positively correlated with the length of the transmission line in the phase-delay branch circuit, in this embodiment of the present application, when a phase-advance section is added to obtain the same phase shift amount as that of the existing phase-shift circuit, the amount of phase delay that needs to be implemented by the phase-delay section is reduced, thereby reducing the length of the transmission line in the phase-delay section, which may further reduce the volume occupied by the phase-shift circuit and facilitate miniaturization of the phase-shift circuit. In addition, the volume occupied by the phase-shift circuit is reduced, and the volume of the PCB on which the phase-shift circuit is etched is also reduced, which may reduce material costs.

[0062] Furthermore, because a phase lead unit is used in this embodiment of the present application, the voltage that needs to be borne by both ends of the first high frequency switch unit and the second high frequency switch unit is reduced, improving the security of the phase shift circuit. Specifically, FIG. 8 is a diagram of a high frequency signal according to one embodiment of the present application. As shown in FIG. 8, the phase shift circuit does not use the phase lead unit 7031. The first high frequency switch unit, the second high frequency switch unit, the first phase delay unit, and the second phase delay unit are shown in FIG. 7. If a phase shift circuit that does not use the phase lead unit 7031 needs to implement the same amount of phase shift as a phase shift circuit that uses the phase lead unit 7031, the switch K 71 and switch K 72 When the switch K is in the off state, the phase shift circuit without the phase lead unit 7031 must have a phase delay θ1, i.e., the phase difference between point B' and point C' shown in Figure 8. In this case, the voltage difference between the input terminal 701 and the output terminal 702 is V1-V2. In other words, the switch K 71 The voltage that needs to be borne by both ends of the switch K is V1-V2. In this embodiment of the present application, the phase shift circuit using the phase advance unit 7031 only needs to have a phase delay θ2, i.e., the phase difference between point B and point C shown in FIG. 8, where θ2 is smaller than θ1. In this case, the voltage difference between the input terminal 701 and the output terminal 702 is V3-V4, in other words, the voltage difference between the input terminal 701 and the output terminal 702 is V3-V4. 71 The voltage that needs to be borne by both ends of the first high frequency switch unit is V3-V4. It can be seen that V3-V4 is smaller than V1-V2. Therefore, in this embodiment of the present application, the voltage borne between the input end and the output end can be reduced by using a phase advance unit, thereby reducing the voltage that needs to be borne by both ends of the first high frequency switch unit.

[0063] Switch K 72 It will be appreciated that the voltage that needs to be borne across the input terminal 701 and the output terminal 702 is the voltage divided between the input terminal 701 and the output terminal 702 at point A. In this embodiment of the present application, a phase lead is used to reduce the voltage borne between the input terminal 701 and the output terminal 702, and switch K 72The voltage that needs to be borne across the

[0064] Switch K 71 must bear most of the voltage between the input terminal 701 and the output terminal 702, and the switch K 72 bears the voltage divided between the input terminal 701 and the output terminal 702 at point A. In other words, switch K 71 The voltage that needs to be borne by both ends of the switch K 72 is greater than the voltage that must be borne by both ends of switch K. 71 is a determining factor limiting the power capacity of the phase shift circuit. For example, if the power of the phase shift circuit needs to be increased, the amplitude of the high frequency signal input by the input terminal 701 will increase, and the amplitude of the high frequency signal output by the output terminal 702 will also increase, and the switch K 71 In this embodiment of the present application, the phase advance section 7031 is connected to the switch K 71 Assuming that the phase lead section 7031 is not used, the power capacity of the phase shift circuit can be only 100 W. Correspondingly, switch K 71 However, according to this embodiment of the present application, if the power capacity of the phase shift circuit is 100 W, then the voltage that needs to be borne by both ends of switch K 71 The voltage that needs to be borne by both ends of switch K is only 25V. 71 It can be seen that the voltage that needs to be borne by both ends of the switch K is reduced, and the linearity of the phase shift circuit becomes better. For example, the third-order intercept point IIP3 (IIP3) can be significantly improved. 71 Assuming that is a switch that can withstand a voltage of 50V, the power capacity of the phase shift circuit provided in this embodiment of the present application can reach 400W.

[0065] Under the same power capacity requirement, according to this embodiment of the present application, a switch that can withstand a smaller voltage may be used, and the linearity index is improved. Alternatively, according to this embodiment of the present application, the power capacity of the phase shift circuit can be increased by using a switch that can withstand the same voltage.

[0066] Compared with existing phase shift circuits that use switches that can withstand higher voltages or that use multiple switches connected in series to increase the power capacity and result in higher costs, in this embodiment of the present application, the voltage applied between the input and output ends is reduced, and as a result, the power capacity of the phase shift circuit can be increased and the cost is reduced.

[0067] Therefore, this embodiment of the present application can be better applied to application scenarios with high power capacity and high linearity index requirements, and achieves low cost.

[0068] In the following, examples of various possible circuit structures of the phase advance unit 7031 will be described with reference to FIGS. 9A to 9H.

[0069] In some possible implementations, the phase lead section 7031 may include a first induction section, in which case the phase lead section 7031 may be specifically implemented as the phase lead section 7031A shown in Figure 9A or the phase lead section 7031B shown in Figure 9B.

[0070] For example, as shown in FIG. 9A, the phase lead unit 7031A may be considered as a two-port network, with a switch K 71 are connected in series to

[0071] The phase-leading portion 7031A includes the transmission line 1. In other words, the first inductive portion is specifically implemented as the transmission line 1.

[0072] It should be noted that a transmission line in this application is a device for guiding the transmission of electromagnetic waves, and includes, but is not limited to, a microstrip or stripline printed on a printed circuit board (PCB).

[0073] The transmission line 1 is connected to the input terminal 701 and the switch K 71 Specifically, the first end of the transmission line 1 is connected to the input terminal 701 and the switch K 71 and the second end of the transmission line 1 is grounded. Alternatively, the transmission line 1 is connected to the switch K 71 and the output terminal 702. Specifically, the first end of the transmission line 1 is connected to the switch K 71 and the output terminal 702, and the second end of the transmission line 1 is grounded.

[0074] In this case, the length of the transmission line 1 is less than 1 / 4 of the wavelength of the high frequency signal input by the input end 701, and the transmission line 1 is presented as inductive.

[0075] In this embodiment of the present application, the phase of the high frequency signal output by the output terminal leads the phase of the high frequency signal input by the input terminal through the inductive transmission line to ground.

[0076] As another example, as shown in FIG. 9B, the phase lead portion 7031B is an inductor L 91 In other words, the first inductive portion specifically includes the inductor L 91 It is implemented as.

[0077] Similarly, the phase lead unit 7031B may also be considered as a two-port network, with a switch K 71 are connected in series to

[0078] Inductor L 91 is connected to the input terminal 701 and the switch K 71 Specifically, the inductor L 91The first end of the input terminal 701 and the switch K 71 and inductor L 91 The second end of the inductor L is grounded. 91 Switch K 71 and the output terminal 702. Specifically, the inductor L 91 The first end of switch K 71 and an inductor L 91 The second end of the is grounded.

[0079] In this embodiment of the present application, the phase of the high frequency signal output by the output terminal leads the phase of the high frequency signal input by the input terminal through the inductor to ground.

[0080] Optionally, in some possible implementations, the phase lead unit 7031 may include a first capacitive unit, in which case the phase lead unit 7031 may be specifically implemented as the phase lead unit 7031C shown in Figure 9C or the phase lead unit 7031D shown in Figure 9D.

[0081] For example, as shown in FIG. 9C, the phase lead section 7031C is connected to a capacitor C 91 In other words, the first capacitance section specifically includes a capacitor C 91 It is implemented as a capacitor C 91 Switch K 71 and the output terminal 702. Specifically, the capacitor C 91 The first end of switch K 71 connected to the capacitor C 91 The second terminal of the capacitor C is connected to the output terminal 702. 91 is connected to the input terminal 701 and the switch K 71 Specifically, the capacitor C 91 The first terminal of the capacitor C is connected to the input terminal 701. 91 The second end of switch K 71 is connected to.

[0082] In this embodiment of the present application, a capacitor is connected in series between the input terminal and the output terminal, so that the phase of the high frequency signal output by the output terminal leads the phase of the high frequency signal input by the input terminal.

[0083] 9D, the phase-lead section 7031D includes a transmission line 2 and a transmission line 3. The transmission lines 2 and 3 are coupled in parallel and are presented as capacitive. In other words, the first capacitive section is specifically implemented as two transmission lines coupled in parallel.

[0084] In this case, switch K 71 Two transmission lines coupled in parallel are arranged between the output terminal 702 and the switch K 71 , and the transmission line 3 is connected to the output terminal 702. Alternatively, the input terminal 701 and the switch K 71 Specifically, transmission line 2 is connected to input terminal 701, and transmission line 3 is connected to switch K 71 The lengths of transmission lines 2 and 3 are related to the phase that the phase-leading branch needs to lead.

[0085] In this embodiment of the present application, two transmission lines coupled in parallel are connected in series between the input end and the output end, so that the phase of the high-frequency signal output by the output end leads the phase of the high-frequency signal input by the input end.

[0086] Furthermore, in some possible implementations, the phase lead section 7031 may further include a second inductive section in addition to the first capacitive section. A first end of the second inductive section is connected to a second connection point, which is a connection point between the first high-frequency switch section and the first capacitive section, and a second end of the second inductive section is grounded. In this case, the phase lead section 7031 may be specifically implemented as a phase lead section 7031E shown in FIG. 9E, a phase lead section 7031F shown in FIG. 9F, a phase lead section 7031G shown in FIG. 9G, or a phase lead section 7031H shown in FIG. 9H.

[0087] For example, as shown in FIG. 9E, the phase advance section 7031E includes a capacitor C 92 and a transmission line 4. The phase lead unit 7031E includes a switch K 71 and the output terminal 702. 92 The first end of switch K 71 and a capacitor C 92 The second end of the transmission line 4 is connected to the output terminal 702, and the second end of the transmission line 4 is grounded. Alternatively, the phase advance unit 7031E is connected to the input terminal 701 and the switch K 71 In this case, the capacitor C 92 The first end of switch K 71 and a capacitor C 92 The second end of the transmission line 4 is connected to the input terminal 701, and the second end of the transmission line 4 is grounded.

[0088] It can be seen that the phase lead section 7031E is a combination of the phase lead section 7031A shown in Figure 9A and the phase lead section 7031C shown in Figure 9C. Specifically, in this embodiment of the present application, the transmission line is connected to ground, and a capacitor is connected in series between the input end and the output end, so that the phase of the high-frequency signal output by the output end leads the phase of the high-frequency signal input by the input end. According to this embodiment of the present application, the phase lead amount of the phase lead section can be further increased.

[0089] 9F, the phase lead section 7031F includes a transmission line 5, a transmission line 6, and a transmission line 7. The transmission lines 6 and 7 are coupled in parallel and are presented as capacitive. The length of the transmission line 1 is less than ¼ of the wavelength of the high frequency signal input by the input terminal 701, and the transmission line 1 is presented as inductive.

[0090] In this case, the phase advance unit 7031F is connected to the switch K 71 and the output terminal 702. The transmission line 6 is connected to the switch K 71and a first end of the transmission line 5, the transmission line 7 is connected to the output terminal 702, and the second end of the transmission line 5 is grounded. Alternatively, the phase advance unit 7031F is connected to the input terminal 701 and the switch K 71 The transmission line 7 is connected to the input terminal 701, and the transmission line 6 is connected to the switch K 71 and a first end of the transmission line 5, the second end of which is grounded.

[0091] It can be seen that the phase lead section 7031F is a combination of the phase lead section 7031A shown in Figure 9A and the phase lead section 7031D shown in Figure 9D. Specifically, in this embodiment of the present application, a transmission line is connected to ground, and two parallel-coupled transmission lines are connected in series between the input end and the output end, so that the phase of the high-frequency signal output by the output end leads the phase of the high-frequency signal input by the input end. According to this embodiment of the present application, the phase lead amount of the phase lead section can be further increased.

[0092] As another example, as shown in FIG. 9G, the phase advance unit 7031G includes a capacitor C 93 and inductor L 92 Includes:

[0093] The phase advance section 7031G is connected to the switch K 71 and the output terminal 702. 93 The first end of switch K 71 and inductor L 92 connected to the first end of the capacitor C 93 The second end of the inductor L is connected to the output terminal 702. 92 The second end of the phase advance unit 7031G is grounded. Alternatively, the phase advance unit 7031G is connected between the input terminal 701 and the switch K 71 The capacitor C is placed between 93 The first end of switch K 71 and inductor L 92 connected to the first end of the capacitor C 93 The second end of the inductor L is connected to the input terminal 701. 92 The second end of the is grounded.

[0094] It can be seen that the phase lead section 7031G is a combination of the phase lead section 7031B shown in Figure 9B and the phase lead section 7031C shown in Figure 9C. Specifically, in this embodiment of the present application, an inductor is connected to ground, and a capacitor is connected in series between the input end and the output end, so that the phase of the high-frequency signal output by the output end leads the phase of the high-frequency signal input by the input end. According to this embodiment of the present application, the phase lead amount of the phase lead section can be further increased.

[0095] As another example, as shown in FIG. 9H, the phase-leading portion 7031H includes a transmission line 8, a transmission line 9, and an inductor L 93 The transmission line 8 and the transmission line 9 are coupled in parallel and are presented as capacitive.

[0096] In this case, the phase advance unit 7031H is 71 and the output terminal 702. The transmission line 8 is connected to the switch K 71 and inductor L 93 The transmission line 9 is connected to the first end of the inductor L 93 The second terminal of the phase advance unit 7031H is grounded. Alternatively, the phase advance unit 7031H is connected to the input terminal 701 and the switch K 71 The transmission line 9 is connected to the input terminal 701, and the transmission line 8 is connected to the switch K 71 and inductor L 93 is connected to the first end of the inductor L 93 The second end of the is grounded.

[0097] It can be seen that the phase lead section 7031H is a combination of the phase lead section 7031B shown in Figure 9B and the phase lead section 7031D shown in Figure 9D. Specifically, in this embodiment of the present application, an inductor is connected to ground, and two parallel-coupled transmission lines are connected in series between the input end and the output end, so that the phase of the high-frequency signal output by the output end leads the phase of the high-frequency signal input by the input end. According to this embodiment of the present application, the phase lead amount of the phase lead section can be further increased.

[0098] In some possible implementations, Figure 10 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. As shown in Figure 10, the phase shift circuit includes an input terminal 1001, an output terminal 1002, a phase lead branch circuit 1003, and a phase lag branch circuit 1004. The phase lead branch circuit 1003 and the phase lag branch circuit 1004 are connected in parallel between the input terminal 1001 and the output terminal 1002.

[0099] The phase-lead branch circuit 1003 includes a first high-frequency switch unit, a phase-lead unit, and a third inductive unit. The phase-lead unit includes a first capacitive unit.

[0100] In this embodiment of the present application, the first high frequency switch section is switch K 101 and the first capacitance section includes a capacitor C 101 and the third inductor is an inductor L 101 An example including switch K will be used. 101 and capacitor C 101 is connected in series between the input terminal 1001 and the output terminal 1002, and an inductor L 101 and capacitor C 101 are connected in parallel.

[0101] Optionally, the first capacitance section may include two transmission lines coupled in parallel. In some possible implementations, the inductor L 101 may be connected in parallel to both ends of two transmission lines coupled in parallel.

[0102] The phase delay branch circuit 1004 includes a first phase delay section 10041, a second phase delay section 10042, and a second high frequency switch section. The first phase delay section 10041 and the second phase delay section 10042 are connected in series between the input terminal 1001 and the output terminal 1002. The second high frequency switch section is connected to a switch K 102 A first connection point between the first phase delay unit 10041 and the second phase delay unit 10042 is connected to a switch K 102connected to the first end of switch K 102 The second end of the is grounded.

[0103] In this embodiment of the present application, the first capacitive part and the third inductive part form a first LC resonant network. In other words, the capacitor C 101 and inductor L 101 form a first LC resonant network. In this case, the first LC resonant network is presented as capacitive in a main operating frequency band, for example, 3.5 GHz, and is presented as being in a high impedance state in another frequency band outside the main operating frequency band. The phase lead branch circuit 1003 can still ensure that the phase of the high frequency signal output by the output terminal 1002 leads the phase of the high frequency signal input by the input terminal 1001.

[0104] Capacitor C 101 The capacitance value of and the inductor L 101 The inductance value is related to the size of the main operating frequency band.

[0105] The difference from the phase shift circuit shown in FIG. 7 is that in this embodiment of the present application, an inductor connected in parallel to the first capacitance unit is added across the first capacitance unit. Therefore, in addition to the advantages of the phase shift circuit shown in FIG. 7, such as its small volume, low cost, low voltage required across the high-frequency switch unit, high power capacity, and good linearity, the phase shift circuit provided in this embodiment of the present application can also suppress signals in another frequency band outside the primary operating frequency band. For example, in a multi-frequency system and an architecture in which active and passive modules are integrated, frequency division duplex (FDD) frequency band signals leak into the phase shift circuit through coupling. The frequency of the FDD frequency band signal is, for example, 1.8 GHz, and the frequency of the primary operating frequency band signal is, for example, 3.5 GHz. The FDD frequency band is a low-frequency signal relative to the primary operating frequency band. If the FDD frequency band signal leaks into the phase shift circuit and the phase shift circuit does not suppress the FDD frequency band signal, the high-frequency switch section in the phase shift circuit will generate an intermodulation signal, which will further affect the sensitivity of receiving the FDD frequency band signal. Therefore, in this embodiment of the present application, an inductor is added, and the inductor and the capacitance section in the phase advance section form an LC resonance. This can suppress low-frequency signals outside the main operating frequency band, reduce low-frequency nonlinear products generated by the phase shift circuit, and prevent the phase shift circuit from affecting other communication devices.

[0106] No inductor is connected in parallel to the first capacitive section. In multi-frequency systems and architectures that integrate active and passive modules, a dedicated filter circuit is generally required to be added to the output of the phase shift circuit to suppress low-frequency signals outside the main operating frequency band. As a result, the area occupied by the phase shift circuit increases, and the insertion loss of the phase shift circuit increases. Therefore, according to this embodiment of the present application, the area occupied by the phase shift circuit can be reduced, and the insertion loss can be reduced.

[0107] Optionally, in some possible implementations, Figure 11 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. As shown in Figure 11, the phase shift circuit includes an input terminal 1101, an output terminal 1102, a phase lead branch circuit 1103, and a phase lag branch circuit 1104. The phase lead branch circuit 1103 and the phase lag branch circuit 1104 are connected in parallel between the input terminal 1101 and the output terminal 1102.

[0108] The phase-lead branch circuit 1103 includes a first high-frequency switch unit, a phase-lead unit, and a third inductive unit. The phase-lead unit includes a first capacitive unit.

[0109] In this embodiment of the present application, the first high frequency switch section is switch K 111 and the first capacitance section includes a capacitor C 111 and the third inductive section includes the transmission line 10. 111 and capacitor C 111 is connected in series between the input terminal 1101 and the output terminal 1102, and the transmission line 10 and the capacitor C 111 are connected in parallel.

[0110] Similarly, the first capacitive section may include two transmission lines coupled in parallel, and in some possible implementations, the transmission line 10 may be connected in parallel to both ends of the two parallel-coupled transmission lines.

[0111] The phase delay branch circuit 1104 includes a first phase delay unit 11041, a second phase delay unit 11042, and a second high-frequency switch unit. The first phase delay unit 11041 and the second phase delay unit 11042 are connected in series between the input terminal 1101 and the output terminal 1102. The second high-frequency switch unit is connected to a switch K 112 A first connection point between the first phase delay unit 11041 and the second phase delay unit 11042 is connected to a switch K 112 connected to the first end of switch K 112 The second end of the is grounded.

[0112] The difference from the phase shift circuit shown in Figure 10 is that the third inductive section in the phase shift circuit provided in this embodiment of the present application is specifically implemented as a transmission line, so that the effect of the phase shift circuit provided in Figure 10 can be achieved, and the use of inductor components can be reduced to further reduce costs.

[0113] 10 and 11 provide illustrative examples in which the phase lead unit is specifically implemented as a capacitor, and an inductor or a transmission line is connected in parallel across the capacitor. In some possible implementations, the phase lead unit may be specifically implemented as the phase lead unit shown in FIGS. 9D to 9H. Specifically, an inductor or a transmission line is connected in parallel across two transmission lines coupled in parallel, or an inductor or a transmission line is added to the second connection point between the first high-frequency switch unit and the first capacitance unit.

[0114] Optionally, in some possible implementations, Figure 12 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. As shown in Figure 12, the phase shift circuit includes an input terminal 1201, an output terminal 1202, a phase lead branch circuit 1203, and a phase lag branch circuit 1204. The phase lead branch circuit 1203 and the phase lag branch circuit 1204 are connected in parallel between the input terminal 1201 and the output terminal 1202.

[0115] The phase-lead branch circuit 1203 includes a first high-frequency switch section and a phase-lead section 12031. In this embodiment of the present application, the first high-frequency switch section is a switch K 121 A concrete example is used as follows. 121 and the phase advance section 12031 are connected in series between the input terminal 1201 and the output terminal 1202 .

[0116] The phase delay branch circuit 1204 includes a first phase delay section 12041, a second phase delay section 12042, a third phase delay section 12043, and a second high frequency switch section. In this embodiment of the present application, the second high frequency switch section is a switch K 122 A first phase delay unit 12041 and a second phase delay unit 12042 are connected in series between an input terminal 1201 and an output terminal 1202. In addition, a third phase delay unit 12043 and a switch K 122 is connected in series between ground and a first connection point D between the first phase delay unit 12041 and the second phase delay unit 12042.

[0117] The third phase delay unit 12043 and switch K shown in FIG. 122 It will be understood that the relative positional relationship between the third phase delay unit and the second high-frequency switch unit is an example. In some possible implementations, the positions of the third phase delay unit and the second high-frequency switch unit may be interchanged. In other words, the second high-frequency switch unit is connected to the first connection point, and the third phase delay unit is grounded. In this case, the third phase delay unit and the second high-frequency switch unit are still connected in series between the first connection point and ground.

[0118] 7, it can be seen that the phase shift circuit provided in this embodiment of the present application adds a third phase delay unit 12043. In this case, in this embodiment of the present application, switch K 71 and switch K 72When the phase delay branch circuit 1204 is in the off state, the phase delay branch circuit 1204 can further increase the phase delay of the high-frequency signal input through the input terminal 1201. For example, if the phase of the high-frequency signal output through the output terminal 702 needs to be delayed by 45° compared to the phase of the high-frequency signal input through the input terminal 701, the first phase delay unit 7041 and the second phase delay unit 7042 shown in FIG. 7 implement a phase delay of 45°. However, in this embodiment of the present application, the first phase delay unit 12041, the second phase delay unit 12042, and the third phase delay unit 12043 jointly implement a phase delay of 45°. Each phase delay unit is specifically implemented as a transmission line. According to this embodiment of the present application, based on the effect of the phase shift circuit shown in FIG. 7, the length of the transmission lines in the first phase delay unit and the second phase delay unit is further shortened, and the volume occupied by the phase shift circuit is reduced.

[0119] Furthermore, in some possible implementations, Figure 13 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. As shown in Figure 13, the phase shift circuit includes an input terminal 1301, an output terminal 1302, a phase lead branch circuit 1303, and a phase lag branch circuit 1304. The phase lead branch circuit 1303 and the phase lag branch circuit 1304 are connected in parallel between the input terminal 1301 and the output terminal 1302.

[0120] The phase-lead branch circuit 1303 includes a first high-frequency switch section and a phase-lead section 13031. In this embodiment of the present application, the first high-frequency switch section is a switch K 131 A concrete example is used as follows. 131 The phase advance section 13031 is connected in series between the input terminal 1301 and the output terminal 1302 .

[0121] The phase delay branch circuit 1304 includes a first phase delay section 13041, a second phase delay section 13042, a third phase delay section 13043, a second high frequency switch section, and a second capacitance section. In this embodiment of the present application, the second high frequency switch section is a switch K 132The second capacitance section is specifically implemented as a capacitor C 131 The first phase delay unit 13041 and the second phase delay unit 13042 are connected in series between the input terminal 1301 and the output terminal 1302. In addition, the connection point between the first phase delay unit 13041 and the second phase delay unit 13042 is the first connection point E, and the third phase delay unit 13043, the switch K 132 , and capacitor C 131 is connected in series between the first connection point E and ground.

[0122] The third phase delay unit 13043 shown in FIG. 13 and the switch K 132 and capacitor C 131 It will be understood that the relative positional relationship between the third phase delay unit, the second high-frequency switch unit, and the second capacitive unit is merely an example. In some possible implementations, the positions of the third phase delay unit, the second high-frequency switch unit, and the second capacitive unit can be interchanged. For example, the second high-frequency switch unit is connected to the first connection point, the second capacitive unit is connected between the second high-frequency switch unit and the third phase delay unit, and the third phase delay unit is grounded, or the second capacitive unit is connected to the first connection point, the second high-frequency switch unit is connected between the second capacitive unit and the third phase delay unit, and the third phase delay unit is grounded, with the third phase delay unit, the second high-frequency switch unit, and the second capacitive unit still being connected in series between the first connection point and ground.

[0123] Optionally, the second capacitive section may be further specifically implemented as two transmission lines coupled in parallel.

[0124] Compared with the phase shift circuit shown in FIG. 12, in this embodiment of the present application, a second capacitive part, e.g., a capacitor C 131 It can be seen that a capacitor C 131 divides the voltage between the first node E and ground, and switches K 132 This may further reduce the voltage that needs to be borne across the

[0125] Furthermore, in some possible implementations, Figure 14 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. As shown in Figure 14, the phase shift circuit includes an input terminal 1401, an output terminal 1402, a phase lead branch circuit 1403, and a phase lag branch circuit 1404. The phase lead branch circuit 1403 and the phase lag branch circuit 1404 are connected in parallel between the input terminal 1401 and the output terminal 1402.

[0126] The phase-lead branch circuit 1403 includes a first high-frequency switch section and a phase-lead section 14031. In this embodiment of the present application, the first high-frequency switch section is a switch K 141 A concrete example is used as follows. 141 The phase advance section 14031 is connected in series between the input terminal 1401 and the output terminal 1402 .

[0127] The phase delay branch circuit 1404 includes a first phase delay section 14041, a second phase delay section 14042, a third phase delay section 14043, a second high frequency switch section, a second capacitive section, and a fourth inductive section. In this embodiment of the present application, the second high frequency switch section is a switch K 142 The second capacitance section is specifically implemented as a capacitor C 141 The fourth inductor is an inductor L 141 A first phase delay unit 14041 and a second phase delay unit 14042 are connected in series between an input terminal 1401 and an output terminal 1402. The connection point between the first phase delay unit 14041 and the second phase delay unit 14042 is a first connection point F. A third phase delay unit 14043, a switch K 142 , and capacitor C 141 is connected in series between the first node F and ground, and the inductor L 141 and capacitor C 141 are connected in parallel.

[0128] Optionally, the second capacitive section may be specifically implemented as two transmission lines coupled in parallel. In some possible implementations, an inductor may be connected in parallel to both ends of the two parallel-coupled transmission lines. Alternatively, the fourth inductive section may be specifically implemented as a transmission line. In some possible implementations, a transmission line whose wavelength is less than ¼ of the wavelength of the high-frequency signal input by the input end may be connected in parallel to both ends of the capacitor, or a transmission line whose wavelength is less than ¼ of the wavelength of the high-frequency signal input by the input end may be connected in parallel to both ends of the two parallel-coupled transmission lines.

[0129] Compared with the phase shift circuit shown in Figure 13, it can be seen that in this embodiment of the present application, a fourth inductive section is added. The fourth inductive section and the second capacitive section form a second LC resonant network. In other words, the inductor L 141 and capacitor C 141 forms a second LC resonant network. The second LC resonant network is presented as capacitive in the main operating frequency band, for example, 3.5 GHz, and is presented as being in a high impedance state in another frequency band outside the main operating frequency band. In this case, the phase delay branch circuit 1404 can still ensure that the phase of the high frequency signal output by the output terminal 1402 lags the phase of the high frequency signal input by the input terminal 1401.

[0130] Inductor L 141 The inductance value of the capacitor C 141 The capacitance value is related to the size of the main operating frequency band.

[0131] In this embodiment of the present application, an inductive section connected in parallel to the second capacitive section is added across both ends of the second capacitive section. Therefore, in addition to the effect of the phase shift circuit shown in Figure 13, the phase shift circuit provided in this embodiment of the present application can further suppress signals on another frequency band outside the main operating frequency band, reduce low-frequency nonlinear products generated by the phase shift circuit, and avoid the phase shift circuit from affecting other communication devices.

[0132] Optionally, in some possible implementations, Figure 15 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. As shown in Figure 15, the phase shift circuit includes an input terminal 1501, an output terminal 1502, a phase lead branch circuit 1503, and a phase lag branch circuit 1504. The phase lead branch circuit 1503 and the phase lag branch circuit 1504 are connected in parallel between the input terminal 1501 and the output terminal 1502.

[0133] The phase-advance branch circuit 1503 includes a first high-frequency switch section and a phase-advance section 15031. In this embodiment of the present application, the first high-frequency switch section is a switch K 151 A concrete example is used as follows. 151 The phase advance section 15031 is connected in series between the input terminal 1501 and the output terminal 1502 .

[0134] The phase delay branch circuit 1504 includes a first phase delay section 15041, a second phase delay section 15042, a second high frequency switch section, and a third capacitance section. In this embodiment of the present application, the second high frequency switch section is a switch K 152 The third capacitance section is a capacitor C 151 A first phase delay unit 15041 and a second phase delay unit 15042 are connected in series between an input terminal 1501 and an output terminal 1502. In addition, a connection point between the first phase delay unit 15041 and the second phase delay unit 15042 is a first connection point G, and a switch K 152 and capacitor C 151is connected in series between the first connection point G and ground.

[0135] Capacitor C shown in Figure 15 151 and switch K 152 It will be understood that the relative positional relationship between the second high-frequency switch section and the third capacitive section is an example. In some possible implementations, the positions of the second high-frequency switch section and the third capacitive section may be interchanged. In other words, the third capacitive section is connected to the first connection point, and the second high-frequency switch section is grounded. In this case, the third capacitive section and the second high-frequency switch section are still connected in series between the first connection point and ground.

[0136] Optionally, the second capacitive section may be specifically implemented as two transmission lines coupled in parallel.

[0137] Compared with the phase shift circuit shown in FIG. 7, the phase shift circuit provided in this embodiment of the present application includes a third capacitance part, e.g., a capacitor C 151 It can be seen that a capacitor C 151 divides the voltage between the first node G and ground, and switches K 152 This may reduce the voltage borne by both ends of the

[0138] Furthermore, in some possible implementations, Figure 16 is a block diagram of another circuit structure of a phase shift circuit according to an embodiment of the present application. As shown in Figure 16, the phase shift circuit includes an input terminal 1601, an output terminal 1602, a phase lead branch circuit 1603, and a phase lag branch circuit 1604. The phase lead branch circuit 1603 and the phase lag branch circuit 1604 are connected in parallel between the input terminal 1601 and the output terminal 1602.

[0139] The phase-lead branch circuit 1603 includes a first high-frequency switch section and a phase-lead section 16031. In this embodiment of the present application, the first high-frequency switch section is a switch K 161 A concrete example is used as follows. 161The phase advance section 16031 is connected in series between the input terminal 1601 and the output terminal 1602 .

[0140] The phase delay branch circuit 1604 includes a first phase delay section 16041, a second phase delay section 16042, a second high frequency switch section, a third capacitive section, and a fifth inductive section. In this embodiment of the present application, the second high frequency switch section is a switch K 162 The third capacitance section is a capacitor C 161 The fifth inductor is an inductor L 161 A first phase delay unit 16041 and a second phase delay unit 16042 are connected in series between an input terminal 1601 and an output terminal 1602. In addition, a connection point between the first phase delay unit 16041 and the second phase delay unit 16042 is a first connection point H, and a switch K 162 and capacitor C 161 is connected in series between the first node H and ground, and the inductor L 161 and capacitor C 161 are connected in parallel.

[0141] Optionally, the third capacitive section may be specifically implemented as two transmission lines coupled in parallel. In some possible implementations, an inductor may be connected in parallel to both ends of the two parallel-coupled transmission lines. Alternatively, the fifth inductive section may be specifically implemented as a transmission line. In some possible implementations, a transmission line whose wavelength is less than ¼ of the wavelength of the high-frequency signal input by the input end may be connected in parallel to both ends of the capacitor, or a transmission line whose wavelength is less than ¼ of the wavelength of the high-frequency signal input by the input end may be connected in parallel to both ends of the two parallel-coupled transmission lines.

[0142] Compared with the phase shift circuit shown in Figure 15, it can be seen that in this embodiment of the present application, a fifth inductive section is added. The fifth inductive section and the third capacitive section form a third LC resonant network. In other words, the inductor L161 and capacitor C 161 forms a third LC resonant network. The third LC resonant network is presented as capacitive in the main operating frequency band, for example, 3.5 GHz, and is presented as being in a high impedance state in another frequency band outside the main operating frequency band. In this case, the phase delay branch circuit 1604 can still ensure that the phase of the high frequency signal output by the output terminal 1602 lags the phase of the high frequency signal input by the input terminal 1601.

[0143] Inductor L 161 The inductance value of the capacitor C 161 The capacitance value is related to the size of the main operating frequency band.

[0144] In this embodiment of the present application, an inductive section connected in parallel to the third capacitive section is added across the third capacitive section. Therefore, in addition to the effect of the phase shift circuit shown in Figure 15, the phase shift circuit provided in this embodiment of the present application can further suppress signals on another frequency band outside the main operating frequency band, reduce low-frequency nonlinear products generated by the phase shift circuit, and avoid the phase shift circuit from affecting other communication devices.

[0145] Hereinafter, examples of the circuit structure of the phase delay unit will be described with reference to FIGS. 17A to 17K.

[0146] In some possible implementations, the phase delay section may include a sixth inductive section.

[0147] For example, as shown in FIG. 17A, the phase delay unit 171A includes a transmission line 11. In other words, the sixth induction unit is specifically implemented as a transmission line. The length of the transmission line 11 is less than half the phase shift amount of the phase shift circuit. When the first phase delay unit and the second phase delay unit are specifically implemented as the phase delay unit 171A, the transmission lines are connected in series between the input terminal and the output terminal of the phase shift circuit, so that the phase of the high-frequency signal output by the output terminal lags behind the phase of the high-frequency signal input by the input terminal.

[0148] Optionally, the third phase delay section may be specifically implemented as phase delay section 171A, with the transmission line connected in series between ground and a first connection point between the first phase delay section and the second phase delay section.

[0149] As another example, as shown in FIG. 17B, the phase delay unit 171B includes an inductor L 171 In other words, the sixth inductive unit may be specifically implemented as an inductor. When the first phase delay unit and the second phase delay unit are specifically implemented as the phase delay unit 171B, the inductor is connected in series between the input terminal and the output terminal of the phase shift circuit, so that the phase of the high-frequency signal output by the output terminal lags behind the phase of the high-frequency signal input by the input terminal.

[0150] Optionally, the third phase delay section may be specifically implemented as phase delay section 171B, with an inductor connected in series between ground and a first connection point between the first phase delay section and the second phase delay section.

[0151] Optionally, in some possible implementations, the phase delay section may include a fourth capacitive section.

[0152] For example, as shown in FIG. 17C, the phase delay unit 171C includes a capacitor C 171In other words, the fourth capacitance unit is specifically implemented as a capacitor. In this case, the phase delay unit 171C may be considered as a two-port network. When the first phase delay unit and the second phase delay unit are specifically implemented as the phase delay unit 171C, a capacitor is connected in parallel to ground between the input terminal and the output terminal of the phase shift circuit, so that the phase of the high-frequency signal output by the output terminal lags behind the phase of the high-frequency signal input by the input terminal.

[0153] Optionally, the third phase delay section may be specifically implemented as phase delay section 171C, with a capacitor connected in parallel to ground between ground and a first connection point between the first phase delay section and the second phase delay section.

[0154] As another example, as shown in FIG. 17D , the phase delay unit 171D includes the transmission line 12 and the transmission line 13. The transmission line 12 and the transmission line 13 are coupled in parallel and are presented as capacitive. In other words, the fourth capacitive unit is specifically implemented as two transmission lines coupled in parallel. When the first phase delay unit and the second phase delay unit are specifically implemented as the phase delay unit 171D, the two parallel-coupled transmission lines are connected in parallel to ground between the input terminal and the output terminal of the phase shift circuit, so that the phase of the high-frequency signal output by the output terminal lags behind the phase of the high-frequency signal input by the input terminal.

[0155] Optionally, the third phase delay section may be specifically implemented as two parallel coupled transmission lines, the two parallel coupled transmission lines being connected in parallel to ground between ground and a first connection point between the first phase delay section and the second phase delay section.

[0156] As another example, as shown in FIG. 17E, the phase delay unit 171E includes a transmission line 14. The length of the transmission line 14 is less than 1 / 4 of the wavelength of the high-frequency signal input by the input terminal, and the transmission line 14 is open to ground and presented as capacitive. In other words, the fourth capacitive unit is specifically implemented as an open line. When the first phase delay unit and the second phase delay unit are specifically implemented as the phase delay unit 171E, an open line is connected between the input terminal and the output terminal of the phase shift circuit, so that the phase of the high-frequency signal output by the output terminal lags behind the phase of the high-frequency signal input by the input terminal.

[0157] Optionally, the third phase delay section may be specifically implemented as phase delay section 171E, with an open line connected between ground and a first connection point between the first phase delay section and the second phase delay section.

[0158] Furthermore, in some possible implementations, the phase delay section may include a sixth inductive section and a fourth capacitive section, in which case it will be understood that the phase delay sections shown in Figures 17A and 17B and the phase delay sections shown in Figures 17C, 17D, and 17E are arranged and combined to form a new phase delay section.

[0159] For example, as shown in FIG. 17F, a phase delay unit 171F includes a transmission line 15 and a capacitor C 172 Phase delay section 171F is a combination of phase delay section 171A shown in Fig. 17A and phase delay section 171C shown in Fig. 17C.

[0160] When the first and second phase delay units are specifically implemented as the phase delay unit 171F, a transmission line is connected in series between the input and output terminals of the phase shift circuit, and a capacitor is connected in parallel to ground between the input and output terminals, so that the phase of the high-frequency signal output by the output terminal lags the phase of the high-frequency signal input by the input terminal. The first and second phase delay units are symmetrical with respect to a first connection point, which is a connection point formed by connecting the first and second phase delay units in series.

[0161] Optionally, the third phase delay unit may be specifically implemented as a phase delay unit 171F, in which a transmission line is connected in series between the first connection point and ground, and a capacitor is connected in parallel to ground at a position close to the first connection point.

[0162] 17G, a phase delay unit 171G includes a transmission line 16, a transmission line 17, and a transmission line 18. The length of the transmission line 16 is less than half the phase shift amount of the phase shift circuit, and the transmission lines 17 and 18 are connected in parallel. The phase delay unit 171G is a combination of the phase delay unit 171A shown in FIG. 17A and the phase delay unit 171D shown in FIG. 17D.

[0163] When the first and second phase delay units are specifically implemented as the phase delay unit 171G, a transmission line is connected in series between the input and output terminals of the phase shift circuit, and two parallel-coupled transmission lines are connected in parallel to ground between the input and output terminals, so that the phase of the high-frequency signal output by the output terminal lags the phase of the high-frequency signal input by the input terminal. The first and second phase delay units are symmetrical with respect to a first connection point, which is a connection point formed by connecting the first and second phase delay units in series.

[0164] Optionally, the third phase delay unit may be specifically implemented as a phase delay unit 171G, in which a transmission line is connected in series between the first connection point and ground, and two parallel-coupled transmission lines are connected in parallel to ground at a position close to the first connection point.

[0165] As another example, as shown in Fig. 17H, a phase delay unit 171H includes a transmission line 19 and a transmission line 20. The phase delay unit 171H is a combination of the phase delay unit 171A shown in Fig. 17A and the phase delay unit 171E shown in Fig. 17E.

[0166] When the first and second phase delay units are specifically implemented as the phase delay unit 171H, a transmission line is connected in series between the input and output terminals of the phase shift circuit, and an open line is connected in parallel between the input and output terminals, so that the phase of the high-frequency signal output by the output terminal lags the phase of the high-frequency signal input by the input terminal. The first and second phase delay units are symmetrical with respect to a first connection point, which is a connection point formed by connecting the first and second phase delay units in series.

[0167] Optionally, the third phase delay section may be specifically implemented as a phase delay section 171H, in which a transmission line is connected in series between the first connection point and ground, and an open line is connected at a position close to the first connection point.

[0168] As another example, as shown in FIG. 17I, a phase delay unit 171I includes an inductor L 172 and capacitor C 173 The phase delay portion 171I is a combination of the phase delay portion 171B shown in Fig. 17B and the phase delay portion 171C shown in Fig. 17C.

[0169] When the first and second phase delay units are specifically implemented as the phase delay unit 171I, an inductor is connected in series between the input and output terminals of the phase shift circuit, and a capacitor is connected in parallel to ground between the input and output terminals, so that the phase of the high-frequency signal output by the output terminal lags the phase of the high-frequency signal input by the input terminal. The first and second phase delay units are symmetrical with respect to the first connection point, which is a connection point formed by connecting the first and second phase delay units in series.

[0170] Optionally, the third phase delay unit may be specifically implemented as a phase delay unit 171I, in which an inductor is connected in series between the first connection point and ground, and a capacitor is connected in parallel to ground at a position close to the first connection point.

[0171] As another example, as shown in FIG. 17J, a phase delay unit 171J includes an inductor L 173 17B and 171D shown in FIG. 17D.

[0172] When the first and second phase delay units are specifically implemented as the phase delay unit 171J, an inductor is connected in series between the input and output terminals of the phase shift circuit, and two parallel-coupled transmission lines are connected in parallel to ground between the input and output terminals, so that the phase of the high-frequency signal output by the output terminal lags the phase of the high-frequency signal input by the input terminal. The first and second phase delay units are symmetrical with respect to a first connection point, which is a connection point formed by connecting the first and second phase delay units in series.

[0173] Optionally, the third phase delay unit may be specifically implemented as a phase delay unit 171J, in which an inductor is connected in series between the first connection point and ground, and two parallel-coupled transmission lines are connected in parallel to ground at a position close to the first connection point.

[0174] As another example, as shown in FIG. 17K, a phase delay unit 171K includes an inductor L 174 and a transmission line 23. The phase delay unit 171K is a combination of the phase delay unit 171B shown in Fig. 17B and the phase delay unit 171E shown in Fig. 17E.

[0175] When the first and second phase delay units are specifically implemented as the phase delay unit 171K, an inductor is connected in series between the input and output terminals of the phase shift circuit, and an open line is connected in parallel to ground between the input and output terminals, so that the phase of the high-frequency signal output by the output terminal lags the phase of the high-frequency signal input by the input terminal. The first and second phase delay units are symmetrical with respect to the first connection point, which is a connection point formed by connecting the first and second phase delay units in series.

[0176] Optionally, the third phase delay section may be specifically implemented as a phase delay section 171K, in which an inductor is connected in series between the first connection point and ground, and an open line is connected in parallel to ground at a position close to the first connection point.

[0177] It should be noted that the first phase delay unit, the second phase delay unit, and the third phase delay unit in the present application can each be specifically implemented as any one of the phase delay units shown in Figures 17A to 17K. In a specific embodiment, the phase advance units shown in Figures 9A to 9H and the phase delay units shown in Figures 17A to 17K can be randomly combined to obtain the phase shift circuit provided in the present application.

[0178] The terms "first" and "second" are for descriptive purposes only and should not be understood as indicating or implying relative importance.

[0179] The above description is merely a specific embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modifications or replacements that can be easily thought up by those skilled in the art within the technical scope disclosed in the present invention shall fall within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims. [Explanation of symbols]

[0180] 20 communication device, 201 digital intermediate frequency section, 202 high frequency section, 2021 phase shift circuit, 2022 filter circuit, 2023 power amplifier circuit, 21 baseband processing section, 22 antenna section, 30 communication device, 301 digital intermediate frequency section, 302 high frequency section, 3021 phase shift circuit, 3022 filter circuit, 3023 power amplifier circuit, 303 antenna section, 31 baseband processing section, 40 communication device, 401 digital intermediate frequency section, 402 high frequency section, 4021a phase shift circuit, 4021b phase shift circuit, 4021n phase shift circuit, 4022 filter circuit, 4023 power amplifier circuit, 403a antenna section, 403b antenna section, 403n antenna section, 41 baseband processing section, 50 antenna system, 501 phase shift circuit, 502 Antenna unit, 51 remote radio unit, 60 antenna system, 601a phase shift circuit, 602a antenna unit, 601b phase shift circuit, 602b antenna unit, 601n phase shift circuit, 602n antenna unit, 61 remote radio unit, 701 input terminal, 702 output terminal, 703 phase lead branch circuit, 7031 phase lead unit, 704 phase delay branch circuit, 7041 first phase delay unit, 7042 second phase delay unit, 7031A phase lead unit, 7031B phase lead unit, 7031C phase lead unit, 7031D phase lead unit, 7031E phase lead unit, 7031F phase lead unit, 7031G phase lead unit, 7031H phase lead unit, 1001 input terminal, 1002 output terminal, 1003 phase lead branch circuit, 1004 Phase lag branch circuit, 10041, first phase lag section, 10042, second phase lag section, 1101, input terminal, 1102, output terminal, 1103, phase lead branch circuit, 1104, phase lag branch circuit, 11041, first phase lag section, 11042, second phase lag section, 1201, input terminal, 1202, output terminal, 1203, phase lead branch circuit, 12031, phase lead section, 1204, phase lag branch circuit, 12041, first phase lag section, 12042, second phase lag section, 1301, input terminal, 1302, output terminal, 1303, phase lead branch circuit, 1304, phase lag branch circuit, 13031, phase lead section, 13041, first phase lag section, 13042, second phase lag section, 13043, third phase lag section, 1401Input terminal, 1402, output terminal, 1403, phase lead branch circuit, 14031, phase lead section, 1404, phase lag branch circuit, 14041, first phase lag section, 14042, second phase lag section, 14043, third phase lag section, 1501, input terminal, 1502, output terminal, 1503, phase lead branch circuit, 1504, phase lag branch circuit, 15031, phase lead section, 15041, first phase lag section, 15042, second phase lag section, 1601, input terminal, 1602, output terminal, 1603, phase lead branch circuit, 16031, phase lead section, 1604, phase lag branch circuit, 16041, first phase lag section, 16042, second phase lag section, 171A, phase lag section, 171B, phase lag section, 171C, phase lag section, 171D Phase delay section, 171E Phase delay section, 171F Phase delay section, 171G Phase delay section, 171H Phase delay section, 171I Phase delay section, 171J Phase delay section, 171K Phase delay section, L1 transmission line, L2 transmission line, K 71 Switch, K 72 Switch, K 101 Switch, K 102 Switch, K 111 Switch, K 112 Switch, K 121 Switch, K 122 Switch, K 131 Switch, K 132 Switch, K 141 Switch, K 142 Switch, K 151 Switch, K 152 Switch, K 161 Switch, K 162 Switch, L 91 Inductor, L 92 Inductor, L 93 Inductor, L 101 Inductor, L 141 Inductor, L 161 Inductor, L 171 Inductor, L 172 Inductor, L 173 Inductor, L 174 Inductor, C 91 Capacitor, C 92 Capacitor, C 93 Capacitor, C 101 Capacitor, C111 Capacitor, C 131 Capacitor, C 141 Capacitor, C 151 Capacitor, C 161 Capacitor, C 171 Capacitor, C 172 Capacitor, C 173 capacitor

Claims

1. A phase shift circuit, the phase shift circuit comprising an input terminal, an output terminal, a phase lead branch circuit, and a phase lag branch circuit, the phase lead branch circuit and the phase lag branch circuit being connected in parallel between the input terminal and the output terminal; the phase-advance branch circuit includes a first high-frequency switch unit and a phase-advance unit, the first high-frequency switch unit and the phase-advance unit being connected in series between the input end and the output end, the phase delay branch circuit includes a first phase delay section, a second phase delay section, and a second high-frequency switch section, the first phase delay section and the second phase delay section being connected in series between the input terminal and the output terminal, and the second high-frequency switch section being connected between ground and a first connection point between the first phase delay section and the second phase delay section; Phase shift circuit.

2. 2. The phase shift circuit according to claim 1, wherein when the first high-frequency switch section and the second high-frequency switch section are in an on state, the phase of the high-frequency signal output by the output terminal leads the phase of the high-frequency signal input by the input terminal.

3. 3. The phase shift circuit according to claim 1, wherein when the first high-frequency switch unit and the second high-frequency switch unit are in an off state, the phase of the high-frequency signal output by the output terminal lags behind the phase of the high-frequency signal input by the input terminal.

4. 4. The phase shift circuit according to claim 1, wherein the phase advance section includes a first inductive section, and the first inductive section and the first high-frequency switch section are connected in series between the input terminal and the output terminal.

5. 4. The phase shift circuit according to claim 1, wherein the phase advance section includes a first capacitance section, and the first capacitance section and the first high-frequency switch section are connected in series between the input terminal and the output terminal.

6. 6. The phase shift circuit according to claim 5, wherein the phase advance section further comprises a second inductive section, one end of the second inductive section being connected to a second connection point, the other end of the second inductive section being grounded, and the second connection point being a connection point between the first high-frequency switch section and the first capacitance section.

7. 7. The phase shift circuit according to claim 5, wherein the phase-lead branch circuit further comprises a third inductive section, and the third inductive section and the first capacitive section are connected in parallel.

8. the phase delay branch circuit further comprises a third phase delay section; the third phase delay unit and the second high-frequency switch unit are connected in series between the first connection point and ground.

8. A phase shift circuit according to claim 1.

9. the phase delay branch circuit further includes a second capacitance section; the second capacitance section, the third phase delay section, and the second high-frequency switch section are connected in series between the first connection point and ground.

9. The phase shift circuit of claim 8.

10. 10. The phase shift circuit of claim 9, wherein the phase lag branch circuit further comprises a fourth inductive section, and the fourth inductive section and the second capacitive section are connected in parallel.

11. the phase delay branch circuit further includes a third capacitance section; the third capacitance unit and the second high-frequency switch unit are connected in series between the first connection point and ground.

8. A phase shift circuit according to claim 1.

12. 11. The phase shift circuit according to claim 10, wherein the phase lag branch circuit further comprises a fifth inductive section, the fifth inductive section being connected in parallel with the third capacitive section.

13. 13. An antenna system comprising an antenna section and a phase shift circuit according to any one of claims 1 to 12, the phase shift circuit being connected to the antenna section.

14. A communication device comprising: a digital intermediate frequency unit; a high frequency unit connected to the digital intermediate frequency unit; and an antenna unit, wherein the high frequency unit comprises a phase shift circuit according to any one of claims 1 to 12, and the phase shift circuit is connected to the antenna unit.

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