Micro LED Display Panel

Abstract

The microLED display panel includes a micropixel array region having a plurality of micropixel regions, each containing a microLED. The microLEDs include at least two vertically arranged light-emitting layers and a dielectric layer formed between adjacent ones of the light-emitting layers. The microLEDs also include an IC backplane formed on the backside of the microLEDs and configured to control the light-emitting layers, and a plurality of interconnect structures configured to electrically connect each light-emitting layer to an electrode. The interconnect structures include one or more upper interconnect structures configured to electrically connect an upper portion of each light-emitting layer to a first electrode, and one or more lower interconnect structures configured to electrically connect a lower portion of each light-emitting layer to the IC backplane and to a second electrode. The interconnect structures are formed around each micropixel region, with one lower interconnect structure corresponding to one microLED and one upper interconnect structure corresponding to an adjacent microLED.

Description

[Technical Field]

[0001] The present disclosure relates generally to micro-LED manufacturing techniques, and more particularly to micro-LED display panels. [Background technology]

[0002] Inorganic micropixel light-emitting diodes, also known as micro light-emitting diodes, microLEDs, or μLEDs, are becoming increasingly important for use in a variety of areas, including self-emissive microdisplays, visible light communications, and optogenetics. MicroLEDs have higher output power than conventional LEDs due to better strain relief, improved light extraction efficiency, and uniform current spreading. Compared to conventional LEDs, microLEDs also offer several advantages, including improved thermal efficiency, faster response speed, a wider operating temperature range, higher resolution, a wider color gamut, higher contrast, lower power consumption, and the ability to operate at higher current densities.

[0003] Conventionally, a micro LED may include multiple light-emitting layers, each of which may be electrically connected to a respective electrode so that each light-emitting layer can be controlled. A micro LED display panel may include an array of micro LEDs. Therefore, for a micro LED display panel, such connections for each light-emitting layer of each micro LED take up a significant amount of space within the micro LED display panel, which may limit the placement of more micro LEDs in the micro LED display panel. Summary of the Invention

[0004] An embodiment of the present disclosure provides a microLED display panel comprising: a micropixel array region having a plurality of micropixel regions, each micropixel region including a microLED, the microLEDs including at least two vertically arranged light-emitting layers and a dielectric layer formed between adjacent ones of the light-emitting layers, the at least two light-emitting layers being coaxial; an IC backplane formed on a backside of the microLEDs and configured to control the light-emitting layers; and a plurality of interconnect structures configured to electrically connect each light-emitting layer to an electrode, the interconnect structures including one or more upper interconnect structures configured to electrically connect an upper portion of each light-emitting layer to a first electrode and one or more lower interconnect structures configured to electrically connect a lower portion of each light-emitting layer to the IC backplane and to a second electrode, the interconnect structures being formed around each micropixel region, one lower interconnect structure corresponding to one microLED and one upper interconnect structure corresponding to an adjacent microLED.

[0005] An embodiment of the present disclosure provides a microLED display panel comprising: a micropixel array region having a plurality of micropixel regions, each micropixel region including a microLED, the microLEDs including at least two vertically oriented light-emitting layers and a dielectric layer formed between adjacent ones of the light-emitting layers, the at least two light-emitting layers being off-axis; an IC backplane formed on a backside of the microLEDs and configured to control the light-emitting layers; and a plurality of interconnect structures configured to electrically connect the light-emitting layers to electrodes, respectively, the interconnect structures including one or more upper interconnect structures configured to electrically connect an upper portion of each of the light-emitting layers to a first electrode and one or more lower interconnect structures configured to electrically connect a lower portion of each of the light-emitting layers to the IC backplane and to a second electrode, the interconnect structures being formed around each micropixel region, one lower interconnect structure corresponding to one microLED and one upper interconnect structure corresponding to an adjacent microLED.

[0006] An embodiment of the present disclosure provides a micro-LED display panel. The microLED display panel comprises: a micropixel array region having a plurality of micropixel regions, each micropixel region containing a microLED, the microLEDs including at least two vertically arranged light-emitting layers and a dielectric layer formed between adjacent ones of the light-emitting layers; an IC backplane formed on a backside of the microLEDs and configured to control the light-emitting layers; a plurality of interconnect structures configured to electrically connect the light-emitting layers to electrodes, respectively, the interconnect structures including one or more upper interconnect structures configured to electrically connect an upper portion of each of the light-emitting layers to a first electrode and one or more lower interconnect structures configured to electrically connect a lower portion of each of the light-emitting layers to the IC backplane and to a second electrode, the interconnect structures being formed around each micropixel region, one lower interconnect structure corresponding to one microLED and one upper interconnect structure corresponding to an adjacent microLED; and a plurality of upper contacts configured to connect the one or more upper interconnect structures to the first electrode, the top contacts being continuously connected to form a mesh structure through which the microLEDs are exposed.

[0007] Embodiments and various aspects of the present disclosure are illustrated in the following detailed description and the accompanying drawings, in which various features are not drawn to scale. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a structural diagram illustrating a top view of a micro-packaging structure of a micro-LED display panel according to some embodiments of the present disclosure. [Figure 2] FIG. 1 is a structural diagram illustrating a side cross-sectional view of a micro-LED display panel according to some embodiments of the present disclosure. [Figure 3] FIG. 1 is a structural diagram illustrating a cross-sectional view of an exemplary micro LED having multiple light-emitting layers, according to some embodiments of the present disclosure. [Figure 4A] FIG. 1 is a structural diagram illustrating a top view of an exemplary micro-LED display panel, according to some embodiments of the present disclosure. [Figures 4B-4D] 1A-1C are structural diagrams illustrating top views of an exemplary micro-LED display panel showing delimited zones of metal regions, according to some embodiments of the present disclosure. [Figure 5A] FIG. 4E is a structural diagram illustrating a cross-sectional view along the X-axis of the exemplary micro-LED display panel shown in FIG. 4D, according to some embodiments of the present disclosure. [Figure 5B] FIG. 4E is a structural diagram illustrating a cross-sectional view along the Y-axis of the exemplary micro-LED display panel shown in FIG. 4D, according to some embodiments of the present disclosure. [Figure 5C] FIG. 4E is a structural diagram illustrating a cross-sectional view along the Z-axis of the exemplary micro-LED display panel shown in FIG. 4D, according to some embodiments of the present disclosure. [Figure 6] FIG. 1B is a structural diagram illustrating a cross-sectional view along the X-axis of another exemplary micro-LED display panel according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0009] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which, unless otherwise indicated, like numbers in various drawings represent the same or similar elements. The implementations described in the following description of exemplary embodiments do not represent all implementations consistent with the present invention. Instead, the implementations are merely examples of apparatus and methods consistent with aspects related to the present invention as set forth in the appended claims. Certain aspects of the present disclosure are described in more detail below. In the event of a conflict with usages and / or definitions incorporated by reference, the usages and definitions presented herein shall control.

[0010] FIG. 1 shows a structural diagram illustrating a top view of a micropackage structure of a microLED display panel according to some embodiments of the present disclosure. FIG. 2 shows a structural diagram illustrating a side cross-sectional view of a microLED display panel according to some embodiments of the present disclosure. Referring to FIGS. 1 and 2 , a micropackage structure 100 includes a microLED display panel 130. The microLED display panel 130 includes a microLED array region 132 and an IC (integrated circuit) backplane 131. The microLED array region 132 is disposed on the IC backplane 131 to form an image display region of the microLED display panel 130. The remaining area on the IC backplane 131 that is not covered by the microLED array region 132 is formed as a non-functional region. The IC backplane 131 is formed on the backside of the microLED array region 132, and an extrusion molded part extends outside the microLED array region 132, i.e., not covered by the microLED array region 132. The microLED array region 132 further includes a plurality of microLEDs 133 arranged in an array. A plurality of signal metal pads and dummy metals can be further formed on the surface of the non-functional area. The signal metal pads can include a plurality of IO (input / output) metal pads 191 and a plurality of dummy metal pads 192.

[0011] The IO metal pads 191 can be conductively connected to the IC backplane 131. The micro LEDs 133 in the micro LED array region 132 are respectively connected to the IC backplane 131 by a plurality of first metal connection holes 193. That is, each micro LED 133 is connected to the IC backplane 131 by one first metal connection hole 193. An upper portion of each of the first metal connection holes 193 is connected to a micro LED 133 one-to-one. Thus, the plurality of first metal connection holes 193 correspond to the plurality of micro LEDs 133. As shown in FIG. 1 , the first metal connection holes 193 are formed in the same array as the array of the micro LEDs 133, and the first metal connection holes 193 are formed as first connection regions on the IC backplane 131 corresponding to the micro LED array region 132 (e.g., an image display region). The lower portions of the signal metal pads, i.e., the IO metal pads 191 and the dummy metal pads 192, are connected to the IC backplane 131 by a plurality of second metal connection holes 194. The lower portions of the second metal connection holes 194 of the IO metal pads 191 are conductively connected to the lower portions of the first metal connection holes 193, for example, by wires (not shown) embedded in the IC backplane 131. Thus, the IO metal pads 191 can be conductively connected to the micro LEDs 133 via the second metal connection holes 194, the IC backplane 131, and the first metal connection holes 193. The lower portions of the second metal connection holes 194 of the dummy metal pads 192 are conductively connected to electrodes of the micro LEDs 133. The second metal connection holes 194 are formed as second connection regions in the non-functional region. The second connection region is located near the edge of the IC backplane 131, away from the first connection region. In some embodiments, the first connection region is referred to as an inner connection region, and the second connection region is referred to as an outer connection region. The first metal connection hole 193 and the second metal connection hole 194 are formed in the upper layer 134 of the IC backplane 131.

[0012] FIG. 3 illustrates a structural diagram showing a cross-section of an exemplary micro LED 300 having multiple light-emitting layers according to some embodiments of the present disclosure. It can be understood that the components illustrated in FIG. 3 are merely for illustrative purposes and do not constitute limitations to a particular configuration. As shown in FIG. 3 , in this example, the micro LED 300 includes three light-emitting layers: a first light-emitting layer 311 (i.e., the top light-emitting layer), a second light-emitting layer 312, and a third light-emitting layer 313 (i.e., the bottom light-emitting layer). For example, in some embodiments, the first light-emitting layer 311 is a red light-emitting layer, the second light-emitting layer 312 is a blue light-emitting layer, and the third light-emitting layer 313 is a green light-emitting layer. In some embodiments, the light-emitting layers may include the same light color. For example, the first light-emitting layer 311 is a green light-emitting layer, and the second light-emitting layer 312 and the third light-emitting layer 313 are both red light-emitting layers. The three light-emitting layers (i.e., layers 311-313) are arranged vertically relative to one another, from top to bottom. That is, second light-emitting layer 312 is disposed on third light-emitting layer 313, and first light-emitting layer 311 is disposed on second light-emitting layer 312. In some embodiments, the vertical distance between two adjacent light-emitting layers is the same. In some embodiments, the distance between two adjacent light-emitting layers can vary depending on the implementation.

[0013] In some embodiments, the light-emitting layers are arranged coaxially, i.e., the vertical projections of each light-emitting layer overlap. In some embodiments, the light-emitting layers can have different sizes (e.g., areas), in which case the vertical projections of each light-emitting layer can partially overlap.

[0014] In some embodiments, the light-emitting layers are positioned off-axis. Thus, the vertical projections of each light-emitting layer may overlap. In some embodiments, the light-emitting layers are staggered. In some embodiments, the vertical projections of each light-emitting layer are diffuse without any overlap.

[0015] In some embodiments, the micro LED 300 further includes a conductive layer network structure 320. The conductive layer network structure 320 is configured to connect each light-emitting layer to an electrode so that a potential difference can be formed across the light-emitting layer. In some embodiments, the conductive layer network structure 320 includes multiple conductive layers, such as conductive layers 321-324. The conductive layers 321 and 323 are formed on the back surfaces of the first light-emitting layer 311 and the second light-emitting layer 312, respectively. The conductive layers 321 and 323 can also be referred to as the lower conductive layer of the first light-emitting layer 311 and the lower conductive layer of the second light-emitting layer 312, respectively. The conductive layers 322 and 324 are formed on the upper surfaces of the second light-emitting layer 312 and the third light-emitting layer 313, respectively. The conductive layers 322 and 324 can also be referred to as the upper conductive layer of the second light-emitting layer 312 and the upper conductive layer of the third light-emitting layer 313, respectively. Each conductive layer is configured to connect a corresponding light-emitting layer to one electrode. The conductive layer network structure 320 allows for more flexible configurations for connecting the light-emitting layers to the electrodes, and provides more possibilities for wiring.

[0016] In some embodiments, the conductive layers are transparent. The material of each conductive layer is one or more of indium tin oxide (ITO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), or the like.

[0017] In some embodiments, a lower conductive layer is formed on the back surface of each of the third light-emitting layers 313, and the lower conductive layer is opaque, which can improve light-emitting efficiency.

[0018] In some embodiments, the micro LED 300 further includes an interconnect structure configured to connect the conductive layer network structure 320 to an electrode. In some embodiments, one electrode is on the top of the micro LED 300, and another electrode is integrated into the IC backplane 330. The IC backplane 330 is formed on the backside of the micro LED 300. The interconnect structure includes one or more top interconnect structures 341 and one or more bottom interconnect structures 342. The top interconnect structure 341 includes top interconnect structures 341a and 341b. The bottom interconnect structure 342 includes bottom interconnect structures 342a and 342b. The top interconnect structure 341 is used to connect the top of each light-emitting layer to one electrode (not shown) of the micro LED 300, for example, via the conductive layer network structure 320. The bottom interconnect structure 342 is used to connect the bottom of each light-emitting layer to the IC backplane 330 and to another electrode, for example, via the conductive layer network structure 320. In some embodiments, each conductive layer (321, 322, 323, or 324) can be connected to one interconnect structure. In some embodiments, a top interconnect structure can be used to connect the top of each of the light-emitting layers except for the top of the top light-emitting layer (i.e., 311). That is, the top of the top light-emitting layer 311 can be directly connected to an electrode (not shown) of the micro LED 300, and the tops of the other light-emitting layers (i.e., 312, 313) are connected to the same top interconnect structure 341 via the conductive layer network structure 320. In some embodiments, the electrodes connecting to the tops of the light-emitting layers are provided on the IC backplane. For example, the micro LED 300 further includes external wires configured to connect the top interconnect structure to electrodes on the IC backplane. In another example, the top interconnect structure can extend downward into the IC backplane to connect to electrodes on the IC backplane.

[0019] In some embodiments, every light-emitting layer 311-313 corresponds to one lower interconnect structure 342, and all of the lower interconnect structures 342 are spaced apart and insulated from one another. A lower portion of each light-emitting layer 311-313 is connected to a corresponding lower interconnect structure 342 via a conductive layer network structure 320. In some embodiments, the lower portion of the bottom light-emitting layer can be directly connected to the IC backplane 330 via the lower interconnect structure 342 without the conductive layer network structure 320. In some embodiments, the interconnect structures (e.g., upper interconnect structure 341 and lower interconnect structure 342) are made of a conductive metal.

[0020] In some embodiments, the interconnect structure is further configured to reflect light emitted from the light-emitting layer and prevent optical crosstalk between adjacent micro-LEDs, thereby increasing luminous efficiency, as described in further detail below.

[0021] 3 , in this example, the bottom of the first light-emitting layer 311 is connected to the IC backplane 330 via the conductive layer 321 and the lower interconnect structure 342a. The top of the second light-emitting layer 312 is connected to the electrode of the micro LED 300 via the conductive layer 322 of the conductive layer network structure 320 and the upper interconnect structure 341a. The bottom of the second light-emitting layer 312 is connected to the IC backplane 330 via the conductive layer 323 and the lower interconnect structure 342b. The top of the third light-emitting layer 313 is connected to the electrode of the micro LED 300 via the conductive layer 324 of the conductive layer network structure 320 and the upper interconnect structure 341b. The bottom of the third light-emitting layer 313 is connected to the IC backplane 330 via the conductive layer and the lower interconnect structure. As shown in FIG. 3 , the bottom of the third light-emitting layer 313 can be connected to the IC backplane without the lower conductive layer. The bottom of the third light-emitting layer 313 (i.e., the bottom light-emitting layer) is connected to the IC backplane 330 by the bottom conductive connecting structure 380. Therefore, one bottom interconnect structure can be omitted. The number of bottom interconnect structures in a micro LED is one less than the number of light-emitting layers. For example, if there are three light-emitting layers in a micro LED, the number of bottom interconnect structures for the micro LED is two. If there are five light-emitting layers in a micro LED, the number of bottom interconnect structures for the micro LED is four. In some embodiments, a bottom conductive layer 325 can be formed on the back surface of the third light-emitting layer 313, and the bottom conductive connecting structure 380 is connected to the bottom conductive layer 325. In some embodiments, no conductive layer is formed on the back surface of the third light-emitting layer 313. That is, the bottom conductive connecting structure 380 can be connected to the third light-emitting layer 313 without the bottom conductive layer 325.

[0022] Each light-emitting layer is connected to an electrode, so that each light-emitting layer can be controlled independently. In some embodiments, each light-emitting layer is a stacked PN junction layer. In some embodiments, the stacked PN junction layer includes, from top to bottom, a P-type semiconductor layer, a quantum well layer, and an N-type semiconductor layer.

[0023] In some embodiments, the micro LED 300 further includes a dielectric layer 350 formed between adjacent light-emitting layers. For example, a first dielectric layer may be formed between the first light-emitting layer 311 and the second light-emitting layer 312, a second dielectric layer may be formed between the second light-emitting layer 312 and the third light-emitting layer 313, and a third dielectric layer may be further formed between the third light-emitting layer 313 and the IC backplane 330. In some embodiments, the dielectric layer 350 is formed around the interconnect structure. In some embodiments, the dielectric layer 350 fills the space within the micro LED 300. In some embodiments, the dielectric layer 350 is transparent. In some embodiments, the material of the dielectric layer 350 includes one or more of SiO, SiON, AlO, or SiN, etc.

[0024] In some embodiments, the third light-emitting layer 313, i.e., the bottom light-emitting layer, further includes a reflective layer 3131 formed on the bottom surface of the third light-emitting layer 313. The reflective layer 3131 is opaque and can reflect light emitted below the bottom light-emitting layer 313 upward to improve light-emitting efficiency. In some embodiments, the reflective layer 3131 is an Ag mirror.

[0025] In some embodiments, third light-emitting layer 313, i.e., the bottom light-emitting layer, further includes insulating layer 3132 formed between the bottom surface of third light-emitting layer 313 and reflective layer 3131 to insulate third light-emitting layer 313 from reflective layer 3131. In some embodiments, the material of insulating layer 3132 includes one or more of SiO2, SiON, Al2O3, or SiN, etc.

[0026] FIG. 4A shows a structural diagram illustrating a top view of an exemplary microLED display panel 400 according to some embodiments of the present disclosure. As shown in FIG. 4A, the microLED display panel 400 includes a micropixel array region. In this example, the micropixel array region is a 3×3 array. The micropixel array region has a plurality of microLED pixel regions 410. Each of the micropixel regions 410 in the micropixel array region includes a microLED 300. Referring also to FIG. 3 , each microLED 300 can be defined by a mesa boundary 360 and a metal boundary 370. The mesa boundary 360 defines a mesa structure region of the microLED 300. The mesa structure has a diameter d and is formed by the light-emitting layer (e.g., 311, 312, or 313). For example, the diameter of the mesa boundary 360 is d. In some embodiments, the mesa structure has a convex structure. In some embodiments, the mesa structure includes a flat top surface. In some embodiments, the top surface of the mesa structure is aligned with the surface of the micro LED 300, i.e., the mesa structure does not protrude from the surface of the micro LED 300. A metal boundary 370 separates the micro LED 300 from the metal region. The area defined within the metal boundary 370 forms the micro LED pixel region 410 for emitting light. In some embodiments, little light can be emitted from the area outside the metal boundary 370. For example, the diameter of the metal boundary 370 is D. The area between adjacent micro LEDs 300 can be referred to as a metal region 420. The metal can partially or completely fill the metal region 420 and act as an emission blocker to prevent optical crosstalk between adjacent micro LEDs 300.

[0027] 3 , the microLED 300 further includes a microlens 390 above the first light-emitting layer 311. The microlens 390 covers the mesa structure region of the microLED 300 (i.e., the mesa structure region), i.e., the diameter of the microlens 390 is equal to or greater than the diameter d. In some embodiments, the diameter of the microlens 390 is equal to or less than the diameter D. The material of the microlens 390 is selected from silicon oxide, photoresist, etc.

[0028] 4B-4D are structural diagrams each illustrating a top view of an exemplary micro LED display panel showing the separated zones of the metal region 420, according to some embodiments of the present disclosure. Referring to FIG. 3 and FIGS. 4B-4D, in some embodiments, the metal region 410 can be divided into multiple zones to provide various functions. For example, the metal region 410 can be divided into a first zone connecting the bottom of each light-emitting layer to the IC backplane 330 and a second zone connecting the top of each light-emitting layer to the micro LED's electrodes. In this example, for a micro LED having three light-emitting layers, the first zone connecting the bottom of each light-emitting layer to the IC backplane 330 is divided into two subzones A1 and A2. FIGS. 4B and 4C show subzone A1 and subzone A2, respectively, according to some embodiments of the present disclosure. As shown in FIG. 4B, subzone A1 is a zone that connects adjacent micro LEDs in the vertical direction as seen in FIG. 4B. A lower interconnect structure 342a for connecting to the bottom of the first light-emitting layer 321 can be provided in subzone A1. As shown in FIG. 4C , subzone A2 is a zone that connects adjacent micro LEDs in the horizontal direction as seen in FIG. 4C . A lower interconnect structure 342b connecting to the lower part of the second light-emitting layer 312 can be provided in subzone A2. In some embodiments, a lower interconnect structure connecting to the lower part of the third light-emitting layer 313 can be provided below the lower part of the micro LED, for example, within the mesa boundary 360. In some embodiments, the third light-emitting layer 313 can be connected to the IC backplane without a lower conductive layer. The lower part of the third light-emitting layer 313 (i.e., the bottom light-emitting layer) is connected to the IC backplane by a lower conductive connection structure formed between the bottom of the bottom light-emitting layer and the IC backplane. Therefore, a lower interconnect structure is not required for the third light-emitting layer 313. Therefore, the number of lower interconnect structures for the micro LED can be reduced by one. For example, if there are three light-emitting layers in the micro LED, the number of lower interconnect structures for the micro LED is two. If there are five light-emitting layers in the micro LED, the number of lower interconnect structures for the micro LED is four.

[0029] Subzone A1 and subzone A2 are spaced apart. More specifically, lower interconnect structure 342a and lower interconnect structure 342b are separately disposed. FIG. 4D illustrates subzones A1 and A2 and a second zone B that connects the top of each light-emitting layer to an electrode of the micro LED, according to some embodiments of the present disclosure. As shown in FIG. 4D, zone B can be formed in the remaining area between subzone A1 and subzone A2. In this example, subzone A1 and subzone A2 are orthogonal, so zone B is rectangular. An upper interconnect structure 341 that connects the top of each light-emitting layer (e.g., 311-313) can be provided in zone B.

[0030] As shown in FIG. 4D, the zones A1, A2, and B are symmetrically divided, and subzone A1 and subzone A2 are spaced apart. It can be appreciated that in some embodiments, subzone A1 and subzone A2 are not orthogonal. An insulating zone configured to separate adjacent zones is present between adjacent zones, and no metal is filled within the insulating zone. For example, referring to FIG. 4D, zone C is formed between subzone A1 and zone B and between subzone A2 and zone B.

[0031] In some embodiments, the lower interconnect structure 342 is symmetrically disposed around each of the micropixel regions, for example, in subzone A1 and subzone A2 as shown in Figure 4D. In some embodiments, the upper interconnect structure 341 is symmetrically disposed around each of the micropixel regions, for example, in the center of zone B as shown in Figure 4D. In some embodiments, the center of symmetry of the lower interconnect structure 342 and the upper interconnect structure 341 is the center of each microLED.

[0032] In some embodiments, there are more than three light-emitting layers in the micro LED. The first zone, which connects the bottom of each light-emitting layer to the IC backplane, can be further divided into more subzones. For example, in a micro LED with four light-emitting layers, the three subzones in the first zone can be spaced apart by an angle of 120° between two subzones. Three lower interconnect structures corresponding to the three light-emitting layers can be provided in the three subzones, respectively. The lower interconnect structure for the bottom light-emitting layer can be provided in the mesa structure region, for example, within the mesa boundary. A second zone, which connects the top of each light-emitting layer to an electrode of the micro LED, can be formed in the remaining region between the subzones in the first zone. With such a design, the metal region 410 is also divided symmetrically.

[0033] 4A-4C in conjunction with FIG. 3, conductive layer 321 can extend into zone A1 to connect with lower interconnect structure 342a, conductive layer 323 can extend into zone A2 to connect with lower interconnect structure 342b, and conductive layers 322 and 324 can extend into zone B to connect with upper interconnect structure 341. Further structural details are provided with reference to FIGS. 5A-5C. In some embodiments, the sum of the contours of the conductive layers that connect to the micro LEDs is equal to or greater than the circumference of the micro pixel area. That is, with reference to FIG. 4D, the sum of the contours of zone A1 and zone A2 that connect to one micro LED is equal to or greater than half (e.g., 50%) of the circumference of the micro pixel area (e.g., having a diameter D).

[0034] FIG. 5A shows a structural diagram illustrating a cross-section along the X-axis of the exemplary micro LED display panel 400 shown in FIG. 4D according to some embodiments of the present disclosure. FIG. 5B shows a structural diagram illustrating a cross-section along the Y-axis of the exemplary micro LED display panel 400 shown in FIG. 4D according to some embodiments of the present disclosure. As shown in FIG. 5A, the lower conductive layer 323 of the second light-emitting layer 312 extends to connect to the lower interconnect structure 342b. The lower interconnect structure 342b is connected to the IC backplane 330 and is formed below subzone A2. The lower conductive layer 321 of the first light-emitting layer 311 is not connected to the lower interconnect structure 342b. In some embodiments, the width of the lower interconnect structure 342b is the same as the length of subzone A2, i.e., the distance between adjacent micro LEDs in the X-axis direction. In some embodiments, the width of the lower interconnect structure 342b is smaller than the length of subzone A2. In some embodiments, the bottom conductive layer 323 can extend into the bottom interconnect structure 342b, i.e., the bottom conductive layer 323 can extend to the farthest edge of the interconnect structure 342b. In some embodiments, the bottom conductive layer 323 can extend into the bottom interconnect structure 342b and can terminate at any location within the bottom interconnect structure 342b. For two adjacent micro LEDs, the bottom conductive layer 323 of the second light emitting layer 312 of each micro LED can extend to and connect to one bottom interconnect structure 342b, and one bottom interconnect structure 342b can only connect to one bottom conductive layer 323. For example, in this example, the bottom conductive layer 323 of the second light-emitting layer 312 of each micro LED extends to the right (as seen in FIG. 5A ) to connect with the bottom interconnect structure 342 b provided on the right side of the micro LED, but does not connect with the bottom interconnect structure 342 b on the left (in the relative orientation shown in FIG. 5A ), which is configured to connect to the bottom conductive layer of the second light-emitting layer 312 of an adjacent micro LED. Therefore, one bottom interconnect structure 342 b can connect the second light-emitting layer 312 of only one micro LED to the IC backplane 330. Therefore, the second light-emitting layer 312 of each micro LED can be independently controlled.

[0035] Referring to FIG. 5B, which is similar to FIG. 5A, the lower conductive layer 321 of the first light-emitting layer 311 extends to connect to the lower interconnect structure 342a. The lower interconnect structure 342a is connected to the IC backplane 330 and is formed below zone A1. The lower conductive layer 323 of the second light-emitting layer 312 is not connected to the lower interconnect structure 342a. In some embodiments, the width of the lower interconnect structure 342a is the same as the length of subzone A1, i.e., the distance between adjacent micro LEDs in the Y-axis direction. In some embodiments, the width of the lower interconnect structure 342a is smaller than the length of subzone A1. In some embodiments, the lower conductive layer 321 can extend into the lower interconnect structure 342a, i.e., the lower conductive layer 321 can extend to the farthest edge of the interconnect structure 342a. In some embodiments, the lower conductive layer 321 can extend into the lower interconnect structure 342a and terminate at any position within the lower interconnect structure 342a. For two adjacent micro LEDs, the bottom conductive layer 321 of the first light-emitting layer 311 of each micro LED can extend and connect to one bottom interconnect structure 342a, and one bottom interconnect structure 342a can connect to only one bottom conductive layer 321. For example, in this example, the bottom conductive layer 321 of the first light-emitting layer 311 of each micro LED extends to the right (as seen in FIG. 5B ) to connect to the bottom interconnect structure 342a provided on the right side, but does not connect to the bottom interconnect structure 342a on the left side (in the relative orientation shown in FIG. 5B ), which is configured to connect to the bottom conductive layer of the first light-emitting layer 311 of the adjacent micro LED. Therefore, one bottom interconnect structure 342a can connect only the first light-emitting layer 311 of one micro LED to the IC backplane 330. Therefore, the first light-emitting layer 311 of each micro LED can be independently controlled.

[0036] As shown in both Figures 5A and 5B, the bottom of the third light-emitting layer 313 can be connected to the IC backplane without a bottom conductive layer. The bottom of the third light-emitting layer 313 (i.e., the bottom light-emitting layer) is connected to the IC backplane 330 by a bottom conductive connecting structure 380. The third light-emitting layer 313 is connected to the IC backplane 330 by a respective bottom interconnect structure for each micro LED. Thus, each light-emitting layer of each micro LED can be separately connected to the IC backplane 330 and thereby independently controlled. In some embodiments, the top of the bottom interconnect structure 342 is lower than the top of the first light-emitting layer 311, i.e., the top light-emitting layer. Thus, the bottom interconnect structure 342 does not pass through the micro LEDs.

[0037] As shown in Figures 5A and 5B, one lower interconnect structure 342 is used for only one light-emitting layer of one micro LED. Adjacent micro LEDs do not share a lower interconnect structure. One micro LED can have multiple lower interconnect structures around the micropixel area for multiple light-emitting layers. In some embodiments, the multiple lower interconnect structures are arranged symmetrically around the micropixel area.

[0038] FIG. 5C shows a structural diagram illustrating a cross-section along the Z-axis of the exemplary micro LED display panel 400 shown in FIG. 4D according to some embodiments of the present disclosure. As shown in FIG. 5C, both top conductive layers 322 and 324 extend and connect to the top interconnect structure 341. The top interconnect structure 341 is configured to connect with electrodes of the micro LEDs. The top interconnect structure 341 is configured to connect with electrodes of the micro LEDs. In some embodiments, both top conductive layers 322 and 324 are continuously formed, i.e., each top conductive layer (e.g., 322, 324) extends continuously along the Z-axis. The top conductive layers of adjacent micro LEDs can be connected to the same top interconnect structure. For example, four adjacent micro LEDs can use the same top interconnect structure located in the center of zone B. The top interconnect structure can connect to the continuous top conductive layers 322 and 324 for all micro LEDs. As described with reference to Figures 5A and 5B, the bottom of each light-emitting layer (e.g., 311-313) is independently connected to the IC backplane 330 by a respective lower interconnect structure (e.g., 342a, 342b), and the top of each light-emitting layer can be connected to the electrode of the micro LED by a common upper interconnect structure 341, thereby reducing the complexity of the design and thereby reducing costs.

[0039] In some embodiments, the upper interconnect structure 341 passes through the top and bottom of the micro LEDs. The top of the upper interconnect structure 341 is higher than the top of the micro LEDs. The bottom of the upper interconnect structure 342 is formed in the IC backplane 330. In some embodiments, the upper interconnect structure 341 does not pass through the micro LEDs, as long as the upper interconnect structure 341 can connect the top conductive layer of the third light-emitting layer.

[0040] In some embodiments, the light-emitting layer (i.e., 311-313) is formed by a stacked pn junction layer. The stacked pn junction layer includes, from top to bottom, a P-type semiconductor layer, a quantum well layer, and an N-type semiconductor layer. In some embodiments, any layer of the light-emitting layer, for example, the P-type semiconductor layer, the quantum well layer, and the N-type semiconductor layer, is formed continuously between adjacent micropixel regions and continuously across the entire micropixel array region. In some embodiments, a top contact 344 is formed directly on the quantum well layer between adjacent microLEDs, and the top contact 344 is configured to connect to an electrode. The top of the top interconnect structure 341 is connected to the bottom of the top contact 344. Therefore, two adjacent microLEDs can share one top contact 344 and one top interconnect structure 341. In some embodiments, the P-type semiconductor layer and / or the N-type semiconductor layer includes a III-V compound semiconductor.

[0041] In some embodiments, an opening is formed in the quantum well of the first light emitting layer 311 between adjacent microLEDs. An upper conductive connecting structure 343 is formed in the opening and connects with the upper interconnect structure 341 and the upper contact 344. The width of the upper conductive connecting structure 343 is smaller than the width of the upper interconnect structure 341. The width of the upper contact 344 is larger than the width of the upper conductive connecting structure 343. In some embodiments, the width of the upper contact 344 is even larger than the width of the upper interconnect structure 341 to enhance the conductive performance of the upper interconnect structure 341. In some embodiments, the width of the upper contact 344 is larger than the width of the lower interconnect structure 342. Therefore, the volume of the microLEDs can be reduced and the integration density can be increased.

[0042] In some embodiments, multiple top contacts are connected in series to form a mesh structure. The mesh structure includes multiple openings through which each of the micro LEDs is exposed. The openings may have a size (e.g., area) that is compatible with each other as long as the mesh structure area of ​​the micro LED is exposed.

[0043] The micro LED display panel provided by the embodiment of the present disclosure has an interconnect structure connecting each light-emitting layer of each micro LED to connect to an electrode, and the interconnect structure is symmetrically arranged on the micro LED display panel, which can facilitate the manufacturing of the micro LED display panel. The conductive layer network structure corresponds to the interconnect structure, which can further reduce metal usage due to the symmetrical arrangement.

[0044] 6 shows a structural diagram illustrating a cross-section along the X-axis of another exemplary micro LED display panel according to some embodiments of the present disclosure. Compared to FIG. 5A, the width of the lower interconnect structure 342b shown in FIG. 6 is smaller than the width of the lower interconnect structure 342b shown in FIG. 5A. Therefore, the micro LEDs can be arranged more densely, and more micro LEDs can be arranged for a given micro LED display panel.

[0045] The micro LEDs herein have a very small volume. The micro LEDs can be organic or inorganic LEDs. The micro LEDs can be applied to a micro LED array panel. The light-emitting area of ​​the micro LED array panel is very small, such as 1 mm x 1 mm, 3 mm x 5 mm, etc. In some embodiments, the light-emitting area is the area of ​​the micro LED array in the micro LED array panel. The micro LED array panel includes one or more micro LED arrays forming a pixel array, such as a 1600 x 1200, 680 x 480, or 1920 x 1080 pixel array, where the micro LEDs are pixels. The diameter of the micro LEDs is in the range of approximately 200 nm to 2 μm. An IC backplane is formed on the back of the micro LED array and is electrically connected to the micro LED array. The IC backplane receives signals, such as image data, from an external device via signal lines to control the corresponding micro LEDs to emit or not emit light.

[0046] It will be understood by those skilled in the art that a micro LED display model or a micro LED display panel is not limited by the structures described above and may include more or fewer components than those shown, or some components may be combined, or different components may be used.

[0047] It should be noted that relationship terms used herein, such as "first" and "second," are used only to distinguish one entity or operation from another, and do not require or imply any actual relationship or ordering between those entities or operations. Furthermore, the words "comprising," "having," "containing," and "including," as well as other similar forms, are intended to be equivalent in meaning and open-ended in that the listing of one or more items following any one of these words is not intended to be an exhaustive listing of such one or more items, nor is it intended to be limited to only the listed one or more items.

[0048] As used herein, unless otherwise specified, the term "or" includes all possible combinations unless impracticable. For example, if it is stated that a database may include A or B, the database may include A or B, or A and B, unless otherwise specified or impracticable. As a second example, if it is stated that a database may include A, B, or C, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C, unless otherwise specified or impracticable.

[0049] In the foregoing specification, embodiments have been described with reference to numerous specific details that may vary from implementation to implementation. Certain adaptations and modifications of the described embodiments may be made. Other embodiments may become apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with the true scope and spirit of the invention being indicated by the appended claims. Additionally, the order of steps depicted in the figures is intended for illustrative purposes only and is not intended to be limited to any particular order of steps. Thus, one skilled in the art will appreciate that steps may be performed in different orders while performing the same method.

[0050] In the drawings and herein, illustrative embodiments are disclosed. However, many variations and modifications to these embodiments are possible. Thus, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims

1. 1. A micro LED display panel, comprising: a micropixel array region having a plurality of micropixel regions, each micropixel region including a microLED, the microLED including at least two vertically oriented light-emitting layers and a dielectric layer formed between adjacent ones of the light-emitting layers, the at least two light-emitting layers being coaxial; an IC backplane formed on the backside of the micro LED and configured to control the light-emitting layer; a plurality of interconnect structures configured to electrically connect the light-emitting layers to electrodes, respectively, the interconnect structures including one or more upper interconnect structures configured to electrically connect an upper portion of each of the light-emitting layers to a first electrode and one or more lower interconnect structures configured to electrically connect a lower portion of each of the light-emitting layers to the IC backplane and to a second electrode, the interconnect structures being formed around each micropixel area, one lower interconnect structure corresponding to one micro-LED and one upper interconnect structure corresponding to an adjacent micro-LED; A micro LED display panel comprising:

2. 10. The micro LED display panel of claim 1, wherein the plurality of interconnect structures are symmetrically arranged around each micro LED in the micro LED display panel.

3. 3. The micro LED display panel of claim 1, wherein the interconnect structure does not directly contact any of the light emitting layers.

4. 4. The micro LED display panel of claim 3, wherein the micro LED comprises three or more light emitting layers in the vertical direction, and the interconnect structure comprises two or more lower interconnect structures respectively electrically connected to a lower portion of each light emitting layer except for a bottom light emitting layer of the micro LED.

5. 5. The micro LED display panel according to claim 4, wherein a lower portion of the bottom light-emitting layer is connected to the IC backplane by a lower conductive connection structure formed between the lower portion of the bottom light-emitting layer and the IC backplane.

6. 6. The micro LED display panel of claim 4, wherein the number of the lower interconnect structures for the micro LEDs is equal to the number of the light emitting layers of the micro LED minus one.

7. 7. The micro LED display panel of claim 3, wherein the light emitting layers include a first light emitting layer, a second light emitting layer, and a third light emitting layer arranged in the vertical direction, and the lower interconnect structure includes a first lower interconnect structure connecting to a lower portion of the first light emitting layer of each of the micro LEDs and a second lower interconnect structure connecting to a lower portion of the second light emitting layer of each of the micro LEDs, and the first lower interconnect structure and the second lower interconnect structure are symmetrically disposed around each micro pixel area in the micro LED display panel.

8. 8. The micro LED display panel of claim 7, wherein the upper interconnect structures are symmetrically arranged on the micro LED display panel.

9. 9. The micro LED display panel according to claim 7 or 8, wherein the center of symmetry is the center of the micro LED.

10. 10. The micro LED display panel of claim 1, further comprising a conductive layer network structure configured to connect the light emitting layer to the interconnect structure.

11. 11. The micro LED display panel of claim 10, wherein the conductive layer network structure comprises one or more upper conductive layers formed on an upper surface of each of the light emitting layers to connect the light emitting layers with the upper interconnect structure, and one or more lower conductive layers formed on a lower surface of each of the light emitting layers to connect the light emitting layers with the lower interconnect structure.

12. 12. The micro LED display panel of claim 11, wherein each of the upper conductive layers is formed continuously between adjacent micro LEDs, each of the lower conductive layers is not continuous between the adjacent micro LEDs, and the lower interconnect structure is separately connected to the corresponding lower conductive layer of each of the micro LEDs.

13. 13. The micro LED display panel according to claim 10, wherein the conductive layer network structure is transparent.

14. 14. The micro LED display panel according to claim 13, wherein the material of the conductive layer network structure is one of indium tin oxide (ITO), fluorine-doped tin oxide (FTO), or aluminum-doped zinc oxide (AZO).

15. 13. The micro LED display panel of claim 12, wherein the lower conductive layer of the bottom light emitting layer is opaque.

16. 16. The micro LED display panel of claim 10, wherein the sum of the contours of the conductive layers connecting to the micro LEDs is equal to or greater than half the circumference of the micro pixel area.

17. 17. The micro LED display panel of claim 1, further comprising a dielectric layer formed around the interconnect structure between the light emitting layers.

18. 20. The micro LED display panel of claim 17, wherein the dielectric layer is transparent.

19. 19. The micro LED display panel of claim 1, wherein the lower interconnect structure is formed on a top surface of the IC backplane and is electrically connected to the IC backplane.

20. 20. The micro LED display panel of claim 19, wherein a top of the lower interconnect structure is lower than a top of the top light emitting layer.

21. 21. The micro LED display panel of claim 1, wherein the upper interconnect structure passes over the top and bottom of the micro LEDs, the top of the upper interconnect structure being higher than the top of the micro LEDs.

22. 22. The micro LED display panel of claim 21, wherein the light emitting layer is formed by a stacked PN junction layer, the stacked PN junction layer including a P-type semiconductor layer, a quantum well layer, and an N-type semiconductor layer.

23. 23. The micro LED display panel of claim 22, wherein the P-type semiconductor layer and / or the N-type semiconductor layer comprises a III-V compound semiconductor.

24. 24. The micro LED display panel of claim 22 or 23, wherein the quantum well layer of the top light emitting layer is formed continuously between adjacent micro LEDs and continuously in the micro pixel array region.

25. 25. The micro LED display panel of claim 24, wherein a top contact is provided to the quantum well layer between the adjacent micro LEDs.

26. 26. The micro LED display panel of claim 25, wherein openings are formed in the quantum well layer between the adjacent micro LEDs, and upper conductive connection structures are provided in the openings to connect the upper interconnect structure with the upper contacts.

27. 27. The micro LED display panel of claim 26, wherein a plurality of the top contacts are connected in series to form a mesh structure through which the micro LEDs are exposed.

28. 28. The micro LED display panel of claim 26 or 27, wherein a width of the upper conductive connecting structure is smaller than a width of the upper interconnect structure, and a width of the upper contact is larger than the width of the upper conductive connecting structure.

29. 30. The micro LED display panel of claim 28, wherein the width of the top contact is greater than the width of the top interconnect structure.

30. 30. The micro LED display panel of claim 29, wherein the width of the top contact is greater than the width of the bottom interconnect structure.

31. 31. The micro LED display panel of claim 1, wherein the interconnect structure is made of a conductive metal.

32. 32. The micro LED display panel of claim 1, wherein the light emitting layer emits at least two different light colors.

33. 33. The micro LED display panel of claim 32, wherein the light emitting layers include a red light emitting layer, a blue light emitting layer, and a green light emitting layer.

34. 33. The micro LED display panel of claim 32, wherein the light emitting layers include two red light emitting layers and one green light emitting layer.

35. 32. The micro LED display panel of claim 1, wherein the light emitting layers emit the same light color.

36. 36. The micro LED display panel of claim 1, wherein the micro LED further comprises a mesa structure formed by the light emitting layer.

37. 37. The micro LED display panel of claim 36, wherein the mesa structure includes a flat upper surface.

38. 38. The micro LED display panel of claim 37, wherein the mesa structure has a convex structure.

39. 38. The micro LED display panel of claim 37, wherein a surface of the mesa structure is aligned with a surface of the micro LED.

40. 40. The micro LED display panel of claim 36, wherein the micro LED further comprises a micro lens disposed above the first light emitting layer and covering a region of the mesa structure.

41. 41. The micro LED display panel of claim 1, further comprising a reflective layer formed on a lower surface of a lowermost light emitting layer of the at least two light emitting layers.

42. 42. The micro LED display panel of claim 1, wherein the plurality of interconnect structures are configured to reflect light emitted from the at least two light emitting layers.

43. 43. The micro LED display panel of claim 1, further comprising an external wire configured to connect the upper interconnect structure to the first electrode, the first electrode being provided on the IC backplane.

44. 1. A micro LED display panel, comprising: a micropixel array region having a plurality of micropixel regions, each micropixel region including a microLED, the microLED including at least two vertically oriented light-emitting layers and a dielectric layer formed between adjacent ones of the light-emitting layers, the at least two light-emitting layers being off-axis; an IC backplane formed on the backside of the micro LED and configured to control the light-emitting layer; a plurality of interconnect structures configured to electrically connect the light-emitting layers to electrodes, respectively, the interconnect structures including one or more upper interconnect structures configured to electrically connect an upper portion of each of the light-emitting layers to a first electrode and one or more lower interconnect structures configured to electrically connect a lower portion of each of the light-emitting layers to the IC backplane and to a second electrode, the interconnect structures being formed around each micropixel area, one lower interconnect structure corresponding to one micro-LED and one upper interconnect structure corresponding to an adjacent micro-LED; A micro LED display panel comprising:

45. 45. The micro LED display panel of claim 44, wherein the at least two light emitting layers are staggered.

46. 45. The micro LED display panel of claim 44, wherein the plurality of interconnect structures are symmetrically disposed around each micro LED in the micro LED display panel.

47. 47. The micro LED display panel of claim 44, wherein the interconnect structure does not directly contact any of the light emitting layers.

48. 48. The micro LED display panel of claim 47, wherein the micro LED comprises three or more light emitting layers in the vertical direction, and the interconnect structure comprises two or more lower interconnect structures respectively electrically connected to a lower portion of each light emitting layer except for a bottom light emitting layer of the micro LED.

49. 49. The micro LED display panel of claim 48, wherein a lower portion of the bottom light-emitting layer is connected to the IC backplane by a lower conductive connection structure formed between the lower portion of the bottom light-emitting layer and the IC backplane.

50. 50. The micro LED display panel of claim 48 or 49, wherein the number of said lower interconnect structures for said micro LEDs is equal to the number of said light emitting layers of said micro LED minus one.

51. 51. The micro LED display panel of claim 47, wherein the light emitting layers include a first light emitting layer, a second light emitting layer, and a third light emitting layer arranged in the vertical direction, and the lower interconnect structure includes a first lower interconnect structure connecting to a lower portion of the first light emitting layer of each of the micro LEDs and a second lower interconnect structure connecting to a lower portion of the second light emitting layer of each of the micro LEDs, and the first lower interconnect structure and the second lower interconnect structure are arranged symmetrically around each micro pixel area in the micro LED display panel.

52. 52. The micro LED display panel of claim 51 , wherein the upper interconnect structures are symmetrically disposed on the micro LED display panel.

53. 53. The micro LED display panel of claim 51 or 52, wherein the center of symmetry is the center of the micro LED.

54. 54. The micro LED display panel of any one of claims 44 to 53, further comprising a conductive layer network structure configured to connect the light emitting layer to the interconnect structure.

55. 55. The micro LED display panel of claim 54, wherein the conductive layer network structure comprises one or more upper conductive layers formed on an upper surface of each of the light emitting layers to connect the light emitting layers with the upper interconnect structure, and one or more lower conductive layers formed on a lower surface of each of the light emitting layers to connect the light emitting layers with the lower interconnect structure.

56. 56. The micro LED display panel of claim 55, wherein each of the upper conductive layers is formed continuously between adjacent micro LEDs, each of the lower conductive layers is not continuous between the adjacent micro LEDs, and the lower interconnect structure is separately connected to the corresponding lower conductive layer of each of the micro LEDs.

57. 57. The micro LED display panel of any one of claims 54 to 56, wherein the conductive layer network structure is transparent.

58. 58. The micro LED display panel of claim 57, wherein the material of the conductive layer network structure is one of indium tin oxide (ITO), fluorine doped tin oxide (FTO), or aluminum doped zinc oxide (AZO).

59. 57. The micro LED display panel of claim 56, wherein the bottom conductive layer of the bottom light emitting layer is opaque.

60. 60. The micro LED display panel of claim 54, wherein the sum of the contours of the conductive layers connecting to the micro LEDs is equal to or greater than half the circumference of the micro pixel area.

61. 61. The micro LED display panel of any one of claims 44 to 60, further comprising a dielectric layer formed around the interconnect structure between the light emitting layers.

62. 62. The micro LED display panel of claim 61 , wherein the dielectric layer is transparent.

63. 63. The micro LED display panel of claim 44, wherein the lower interconnect structure is formed on a top surface of the IC backplane and is electrically connected to the IC backplane.

64. 64. The micro LED display panel of claim 63, wherein a top of the lower interconnect structure is lower than a top of the top light emitting layer.

65. 65. The micro LED display panel of claim 44, wherein the upper interconnect structure passes over the top and bottom of the micro LEDs, the top of the upper interconnect structure being higher than the top of the micro LEDs.

66. 66. The micro LED display panel of claim 65, wherein the light emitting layer is formed by a stacked PN junction layer, the stacked PN junction layer including a P-type semiconductor layer, a quantum well layer, and an N-type semiconductor layer.

67. 67. The micro LED display panel of claim 66, wherein the P-type semiconductor layer and / or the N-type semiconductor layer comprises a III-V compound semiconductor.

68. 68. The micro LED display panel of claim 66 or 67, wherein the quantum well layer of the top light emitting layer is formed continuously between adjacent micro LEDs and continuously in the micro pixel array area.

69. 69. The micro LED display panel of claim 68, wherein a top contact is provided to the quantum well layer between the adjacent micro LEDs.

70. 70. The micro LED display panel of claim 69, wherein openings are formed in the quantum well layer between adjacent micro LEDs, and upper conductive connection structures are provided in the openings to connect the upper interconnect structure with the upper contacts.

71. 71. The micro LED display panel of claim 70, wherein a plurality of the top contacts are connected in series to form a mesh structure through which the micro LEDs are exposed.

72. 72. The micro LED display panel of claim 70 or 71, wherein a width of the upper conductive connecting structure is smaller than a width of the upper interconnect structure, and a width of the upper contact is larger than the width of the upper conductive connecting structure.

73. 73. The micro LED display panel of claim 72, wherein the width of the top contact is greater than the width of the top interconnect structure.

74. 74. The micro LED display panel of claim 73, wherein the width of the top contact is greater than the width of the bottom interconnect structure.

75. 75. The micro LED display panel of any one of claims 44 to 74, wherein the interconnect structure is made from a conductive metal.

76. 76. The micro LED display panel of any one of claims 44 to 75, wherein the light emitting layer emits at least two different light colors.

77. 77. The micro LED display panel of claim 76, wherein the light emitting layers include a red light emitting layer, a blue light emitting layer, and a green light emitting layer.

78. 77. The micro LED display panel of claim 76, wherein the light emitting layers include two red light emitting layers and one green light emitting layer.

79. 76. The micro LED display panel of any one of claims 44 to 75, wherein the light emitting layers emit the same light color.

80. 80. The micro LED display panel of any one of claims 44 to 79, wherein the micro LED further comprises a mesa structure formed by the light emitting layer.

81. 81. The micro LED display panel of claim 80, wherein the mesa structure includes a flat upper surface.

82. 82. The micro LED display panel of claim 81, wherein the mesa structure has a convex structure.

83. 82. The micro LED display panel of claim 81 , wherein a surface of the mesa structure is aligned with a surface of the micro LED.

84. 84. The micro LED display panel of claim 80, wherein the micro LED further comprises a micro lens disposed above the first light emitting layer and covering a region of the mesa structure.

85. 85. The micro LED display panel of claim 44, further comprising a reflective layer formed on a lower surface of a bottom light emitting layer of the at least two light emitting layers.

86. 86. The micro LED display panel of any one of claims 44 to 85, wherein the plurality of interconnect structures are configured to reflect light emitted from the at least two light emitting layers.

87. 87. The micro LED display panel of claim 44, further comprising an external wire configured to connect the upper interconnect structure to the first electrode, the first electrode being provided on the IC backplane.

88. 1. A micro LED display panel, comprising: a micropixel array region having a plurality of micropixel regions, each micropixel region including a microLED, the microLED including at least two vertically oriented light-emitting layers and a dielectric layer formed between adjacent ones of the light-emitting layers; an IC backplane formed on the backside of the micro LED and configured to control the light-emitting layer; a plurality of interconnect structures configured to electrically connect the light-emitting layers to electrodes, respectively, the interconnect structures including one or more upper interconnect structures configured to electrically connect an upper portion of each of the light-emitting layers to a first electrode and one or more lower interconnect structures configured to electrically connect a lower portion of each of the light-emitting layers to the IC backplane and to a second electrode, the interconnect structures being formed around each micropixel area, one lower interconnect structure corresponding to one micro-LED and one upper interconnect structure corresponding to an adjacent micro-LED; a plurality of top contacts configured to connect the one or more top interconnect structures to the first electrode, the top contacts being continuously connected to form a mesh structure through which the micro LEDs are exposed; and A micro LED display panel comprising:

89. 90. The micro LED display panel of claim 88, wherein the plurality of interconnect structures are symmetrically disposed around each micro LED in the micro LED display panel.

90. 90. The micro LED display panel of claim 88 or 89, wherein the interconnect structure does not directly contact any of the light emitting layers.

91. 91. The micro LED display panel of claim 90, wherein the micro LED comprises three or more light emitting layers in the vertical direction, and the interconnect structure comprises two or more lower interconnect structures respectively electrically connected to a lower portion of each light emitting layer except for a bottom light emitting layer of the micro LED.

92. 92. The micro LED display panel of claim 91, wherein a lower portion of the bottom light-emitting layer is connected to the IC backplane by a lower conductive connection structure formed between the lower portion of the bottom light-emitting layer and the IC backplane.

93. 93. The micro LED display panel of claim 91 or 92, wherein the number of said lower interconnect structures for said micro LEDs is equal to the number of said light emitting layers of said micro LED minus one.

94. 94. The micro LED display panel of claim 90, wherein the light emitting layers include a first light emitting layer, a second light emitting layer, and a third light emitting layer arranged in the vertical direction, and the lower interconnect structure includes a first lower interconnect structure connecting to a lower portion of the first light emitting layer of each of the micro LEDs and a second lower interconnect structure connecting to a lower portion of the second light emitting layer of each of the micro LEDs, and the first lower interconnect structure and the second lower interconnect structure are arranged symmetrically around each micro pixel area in the micro LED display panel.

95. 95. The micro LED display panel of claim 94, wherein the upper interconnect structures are symmetrically disposed on the micro LED display panel.

96. 96. The micro LED display panel of claim 94 or 95, wherein the center of symmetry is the center of the micro LED.

97. 97. The micro LED display panel of any one of claims 88 to 96, further comprising a conductive layer network structure configured to connect the light emitting layer to the interconnect structure.

98. 100. The micro LED display panel of claim 99, wherein the conductive layer network structure comprises one or more upper conductive layers formed on an upper surface of each of the light emitting layers to connect the light emitting layers with the upper interconnect structure, and one or more lower conductive layers formed on a lower surface of each of the light emitting layers to connect the light emitting layers with the lower interconnect structure.

99. 99. The micro LED display panel of claim 98, wherein each of the upper conductive layers is formed continuously between adjacent micro LEDs, each of the lower conductive layers is not continuous between the adjacent micro LEDs, and the lower interconnect structure is separately connected to the corresponding lower conductive layer of each of the micro LEDs.

100. 100. The micro LED display panel of any one of claims 97 to 99, wherein the conductive layer network structure is transparent.

101. 101. The micro LED display panel of claim 100, wherein the material of the conductive layer network structure is one of indium tin oxide (ITO), fluorine doped tin oxide (FTO), or aluminum doped zinc oxide (AZO).

102. 102. The micro LED display panel of claim 101, wherein the lower conductive layer of the bottom light emitting layer is opaque.

103. 103. The micro LED display panel of claim 97, wherein the sum of the contours of the conductive layers connecting to the micro LEDs is equal to or greater than half the circumference of the micro pixel area.

104. 104. The micro LED display panel of any one of claims 88 to 103, further comprising a dielectric layer formed around the interconnect structure between the light emitting layers.

105. 105. The micro LED display panel of claim 104, wherein the dielectric layer is transparent.

106. 106. The micro LED display panel of any one of claims 88 to 105, wherein the lower interconnect structure is formed on a top surface of the IC backplane and is electrically connected to the IC backplane.

107. 107. The micro LED display panel of claim 106, wherein a top of the lower interconnect structure is lower than a top of the top light emitting layer.

108. 108. The micro LED display panel of claim 88, wherein the upper interconnect structure passes over the top and bottom of the micro LEDs, the top of the upper interconnect structure being higher than the top of the micro LEDs.

109. 109. The micro LED display panel of claim 108, wherein the light emitting layer is formed by a stacked PN junction layer, the stacked PN junction layer including a P-type semiconductor layer, a quantum well layer, and an N-type semiconductor.

110. 110. The micro LED display panel of claim 109, wherein the P-type semiconductor layer and / or the N-type semiconductor layer comprises a III-V compound semiconductor.

111. 111. The micro LED display panel of claim 109 or 110, wherein the quantum well layer of the top light emitting layer is formed continuously between adjacent micro LEDs and continuously in the micro pixel array area.

112. 112. The micro LED display panel of claim 111, wherein the top contact is provided to the quantum well layer between the adjacent micro LEDs.

113. 113. The micro LED display panel of claim 112, wherein openings are formed in the quantum well layer between adjacent micro LEDs, and upper conductive connection structures are provided in the openings to connect the upper interconnect structure with the upper contacts.

114. 114. The micro LED display panel of claim 113, wherein a width of the upper conductive connecting structure is smaller than a width of the upper interconnect structure, and a width of the upper contact is larger than the width of the upper conductive connecting structure.

115. 115. The micro LED display panel of claim 114, wherein the width of the top contact is greater than the width of the top interconnect structure.

116. 116. The micro LED display panel of claim 115, wherein the width of the top contact is greater than the width of the bottom interconnect structure.

117. 117. The micro LED display panel of any one of claims 88 to 116, wherein the interconnect structure is made from a conductive metal.

118. 118. The micro LED display panel of any one of claims 88 to 117, wherein the light emitting layer emits at least two different light colors.

119. 119. The micro LED display panel of claim 118, wherein the light emitting layers include a red light emitting layer, a blue light emitting layer, and a green light emitting layer.

120. 119. The micro LED display panel of claim 118, wherein the light emitting layers include two red light emitting layers and one green light emitting layer.

121. 118. The micro LED display panel of any one of claims 88 to 117, wherein the light emitting layers emit the same light color.

122. 122. The micro LED display panel of claim 1, wherein the micro LED further comprises a mesa structure formed by the light emitting layer.

123. 123. The micro LED display panel of claim 122, wherein the mesa structure includes a flat upper surface.

124. 124. The micro LED display panel of claim 123, wherein the mesa structure has a convex structure.

125. 124. The micro LED display panel of claim 123, wherein a surface of the mesa structure is aligned with a surface of the micro LED.

126. 126. The micro LED display panel of claim 122, wherein the micro LED further comprises a micro lens disposed above the first light emitting layer and covering a region of the mesa structure.

127. 127. The micro LED display panel of any one of claims 88 to 126, further comprising a reflective layer formed on a lower surface of a bottom light emitting layer of said at least two light emitting layers.

128. 128. The micro LED display panel of any one of claims 88 to 127, wherein the plurality of interconnect structures are configured to reflect light emitted from the at least two light emitting layers.

129. 129. The micro LED display panel of claim 88, further comprising an external wire configured to connect the upper interconnect structure to the first electrode, the first electrode being provided on the IC backplane.

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