Decreased etching resistance in advanced substrate patterning

Abstract

A subpixel circuit and a method for forming a subpixel circuit that can be used in displays such as organic light-emitting diode (OLED) displays. In one example, the device includes a substrate, a pixel definition layer (PDL) structure disposed on the substrate and defining subpixels of the device, and a plurality of overhang structures. A first subpixel includes a first anode, an OLED material, a first cathode, and a first encapsulation layer having a gap defined by a first portion of a first encapsulation layer disposed on the first cathode, a second portion of a first encapsulation layer disposed on the side wall of a main structure, and a third portion of a first encapsulation layer below the lower surface of the upper extension of a superstructure, wherein the first portion of the first encapsulation layer is in contact with the third portion of the first encapsulation layer.

Description

[Technical Field]

[0001] The embodiments described herein relate to displays in general. More specifically, the embodiments described herein relate to subpixel circuits and methods for forming subpixel circuits that may be used in displays such as organic light-emitting diode (OLED) displays. [Background technology]

[0002] Input devices, including display devices, are used in a variety of electronic systems. Organic light-emitting diodes (OLEDs) are light-emitting diodes (LEDs) in which the light-emitting electroluminescent layer is a film of an organic compound that emits light in response to an electric current. OLED devices are classified as bottom-emission devices if the emitted light passes through a transparent or translucent bottom electrode and the substrate on which the panel is manufactured. Top-emission devices are classified based on whether the light emitted from the OLED device exits through a lid that is added after the device is manufactured. OLEDs are used today to create display devices for many electronic devices. Electronic device manufacturers today are pushing to provide higher resolution than just a few years ago, while also reducing the size of these display devices. [Overview of the project] [Problems that the invention aims to solve]

[0003] OLED pixel patterning is currently based on processes that limit panel size, pixel resolution, and substrate size. Instead of using fine metal masks, pixel patterning should be done using photolithography. Currently, OLED pixel patterning requires lift-off of organic material after the patterning process. When organic material is lift-off, the problem of particles that impair OLED performance remains. Therefore, what is needed in this art is subpixel circuits and methods for forming subpixel circuits that can be used in displays such as organic OLED displays. [Means for solving the problem]

[0004] In one embodiment, a device is provided. The device includes a substrate, a pixel definition layer (PDL) structure disposed on the substrate and defining subpixels of the device, and a plurality of overhang structures. Each overhang structure is defined by an upper extension of a superstructure that extends laterally beyond a main structure, each main structure is disposed on the upper surface of each PDL structure, and adjacent overhang structures of the plurality of overhang structures define a plurality of subpixels including a first subpixel. A first subpixel includes a first anode, a first organic light-emitting diode (OLED) material disposed above and below an adjacent overhang structure of the first anode, a first cathode disposed above and below an adjacent overhang structure of the first OLED material, and a first encapsulation layer having a gap defined by a first portion of the first encapsulation layer disposed above the first cathode, a second portion of the first encapsulation layer disposed above the side wall of the main structure, and a third portion of the first encapsulation layer below the lower surface of the upper extension of the superstructure, wherein the first portion of the first encapsulation layer is in contact with the third portion of the first encapsulation layer.

[0005] In another embodiment, a device is provided which includes a substrate, a pixel definition layer (PDL) structure disposed on the substrate and defining subpixels of the device, and a plurality of overhang structures. Each overhang structure is defined by an upper extension of a superstructure that extends laterally beyond a main structure to form an overhang, and each main structure is disposed on the upper surface of each PDL structure, and adjacent overhang structures of the plurality of overhang structures define a plurality of subpixels including a first subpixel and a second subpixel. A first subpixel includes a first anode, a first organic light-emitting diode (OLED) material disposed above and below an adjacent overhang structure of the first anode, a first cathode disposed above and below an adjacent overhang structure of the first OLED material, and a first encapsulation layer having a gap defined by a first portion of the first encapsulation layer disposed above the first cathode, a second portion of the first encapsulation layer disposed above the side wall of the main structure, and a third portion of the first encapsulation layer below the lower surface of the upper extension of the superstructure, wherein the first portion of the first encapsulation layer is in contact with the third portion of the first encapsulation layer. The second subpixel includes a second anode, a second organic light-emitting diode (OLED) material positioned above the second anode and below adjacent overhang structures, a second cathode positioned above the second OLED material and below adjacent overhang structures, and a second encapsulation layer having a gap defined by a first portion of the second encapsulation layer positioned above the second cathode, a second portion of the second encapsulation layer positioned above the side wall of the main structure, and a third portion of the second encapsulation layer below the lower surface of the upper extension of the superstructure, wherein the first portion of the second encapsulation layer is in contact with the third portion of the second encapsulation layer.

[0006] In another embodiment, a device is provided which includes a substrate, a pixel definition layer (PDL) structure disposed on the substrate and defining subpixels of the device, and a plurality of overhang structures. Each overhang structure is defined by an upper extension of a superstructure that extends laterally beyond a main structure, each main structure is disposed on the upper surface of each PDL structure, and adjacent overhang structures of the plurality of overhang structures define a plurality of subpixels including a first subpixel. A first subpixel includes a first anode, a first organic light-emitting diode (OLED) material positioned above the first anode, in contact with the first anode, and positioned below an adjacent overhang structure, a first cathode positioned above the first OLED material and below the adjacent overhang structure, and a first encapsulation layer having a gap defined by a first portion of the first encapsulation layer in contact with the first cathode, a second portion of the first encapsulation layer in contact with the side wall of the main structure, and a third portion of the first encapsulation layer in contact with the lower surface of the upper extension of the superstructure, wherein the first portion of the first encapsulation layer is in contact with the third portion of the first encapsulation layer.

[0007] In another embodiment, a device is provided. The device includes a substrate and subpixels. Each subpixel includes an anode, a first organic light-emitting diode (OLED) material disposed on the anode, and a first cathode disposed on the first OLED material. The device further includes a pixel definition layer (PDL) structure disposed on the substrate and an overhang structure defined by an upper extension of a superstructure that extends laterally over a portion of the first cathode beyond the main structure. The main structure is disposed on the upper surface of the PDL structure. A first encapsulation layer is disposed on the overhang structure to form a sealed space below the upper extension of the superstructure and an upper space above the upper surface of the superstructure. The sealed space is sealed by portions of the first encapsulation layer disposed above the first cathode, above the sidewalls of the main structure, and below the lower surface of the superstructure. The upper space is located between the edge of the first encapsulation layer and the edge of the second encapsulation layer.

[0008] To enable a more detailed understanding of the above-mentioned features of this disclosure, a more specific description of this disclosure, which has been briefly summarized above, can be obtained by referring to embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings show only exemplary embodiments and should not be considered limiting in scope, as other equally valid embodiments may be recognized. [Brief explanation of the drawing]

[0009] [Figure 1A] This is a schematic cross-sectional view of a subpixel circuit according to an embodiment. [Figure 1B] This is a schematic cross-sectional view of a subpixel circuit according to an embodiment. [Figure 1C] This is a schematic top cross-sectional view of a subpixel circuit having a dot-type architecture according to an embodiment. [Figure 1D] This is a schematic cross-sectional view of a subpixel circuit having a line-type architecture according to an embodiment. [Figure 2A] This is a schematic cross-sectional view of the overhang structure of a subpixel circuit according to an embodiment. [Figure 2B] This is a schematic cross-sectional view of the overhang structure of a subpixel circuit according to an embodiment. [Figure 3] This is a flowchart of an on-demand method for forming subpixel circuits according to an embodiment. [Figure 4A] This is a schematic cross-sectional view of a substrate in a method for forming a subpixel circuit according to an embodiment. [Figure 4B] This is a schematic cross-sectional view of a substrate in a method for forming a subpixel circuit according to an embodiment. [Figure 4C] This is a schematic cross-sectional view of a substrate in a method for forming a subpixel circuit according to an embodiment. [Figure 4D] This is a schematic cross-sectional view of a substrate in a method for forming a subpixel circuit according to an embodiment. [Figure 4E]Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to an embodiment. [Figure 4F] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to an embodiment. [Figure 4G] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to an embodiment. [Figure 4H] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to an embodiment. [Figure 4I] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to an embodiment. [Figure 4J] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to an embodiment. [Figure 4K] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to an embodiment. [Figure 5] Flow diagram of a one-step method for forming a sub-pixel circuit according to an embodiment. [Figure 6A] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to embodiments described herein. [Figure 6B] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to embodiments described herein. [Figure 6C] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to embodiments described herein. [Figure 6D] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to embodiments described herein. [Figure 6E] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to embodiments described herein. [Figure 6F] Schematic cross-sectional view of a substrate in a method for forming a sub-pixel circuit according to embodiments described herein. [Figure 6G]This is a schematic cross-sectional view of a substrate in a method for forming a subpixel circuit according to an embodiment described herein. [Figure 6H] This is a schematic cross-sectional view of a substrate in a method for forming a subpixel circuit according to an embodiment described herein. [Modes for carrying out the invention]

[0010] For ease of understanding, the same reference numerals are used to indicate identical elements common to the drawings, where possible. Elements disclosed in one embodiment are intended to be usefully utilized in relation to other embodiments without particular detail.

[0011] The embodiments described herein generally relate to displays. More specifically, the embodiments described herein relate to subpixel circuits and methods for forming subpixel circuits that may be used in displays such as organic light-emitting diode (OLED) displays.

[0012] Each embodiment of a subpixel circuit described herein includes a plurality of subpixels, each subpixel defined by a permanent adjacent overhang structure within the subpixel circuit. While the figure shows three subpixels, each defined by an adjacent overhang structure, the subpixel circuits of the embodiments described herein include a plurality of subpixels, such as three or more subpixels. Each subpixel has an OLED material configured to emit white, red, green, blue, or other colored light when energized. For example, the OLED material of the first subpixel emits red light when energized, the OLED material of the second subpixel emits green light when energized, and the OLED material of the third subpixel emits blue light when energized.

[0013] The overhang structure is permanent to the subpixel circuit and includes at least a superstructure positioned on top of the main structure. Adjacent overhang structures defining each subpixel of the display's subpixel circuit allow for the formation of the subpixel circuit using deposition and allow the overhang structure to remain in place after the subpixel circuit has been formed. Deposition is used for the deposition of OLED material (including a hole injection layer (HIL), a hole transport layer (HTL), an emissive layer (EML), and an electron transport layer (ETL)) and the cathode. In one embodiment, the HIL layer has a higher conductivity than the HTL layer. In another embodiment, the HIL layer has a higher energy level than the HTL layer. In some cases, an encapsulation layer may be deposited via deposition. In embodiments including one or more capping layers, the capping layer is positioned between the cathode and the encapsulation layer. The deposition angle set by the overhang structure and the deposition source defines the deposition angle, i.e., the overhang structure provides a shadowing effect during deposition at the deposition angle set by the deposition source. To deposit at a specific angle, the deposition source is configured to release the deposition material at a specific angle relative to the overhang structure. The encapsulation layer for each subpixel is positioned above the cathode, and the encapsulation layer extends beneath at least a portion of each adjacent overhang structure. The encapsulation layer for each subpixel is in contact with at least a portion of the sidewall of each adjacent overhang structure. The thickness, composition, and deposition method of the encapsulation layer can be varied depending on the OLED material deposited on the subpixel.

[0014] Figure 1A is a schematic cross-sectional view of the subpixel circuit 100 having arrangement 101A. The cross-sectional view of Figure 1A is taken along the cross-sectional line 1'-1' in Figures 1C and 1D. Figure 1B is a schematic cross-sectional view of the subpixel circuit 100 having arrangement 101B. The cross-sectional view of Figure 1B is taken along the cross-sectional line 1'-1' in Figures 1C and 1D.

[0015] The subpixel circuit 100 includes a substrate 102. A metal-containing layer 104 may be patterned on the substrate 102 and is defined by adjacent pixel definition layer (PDL) structures 126 located on the substrate 102. In one embodiment, the metal-containing layer 104 is pre-patterned on the substrate 102. For example, the substrate 102 is a pre-patterned indium tin oxide (ITO) glass substrate. The metal-containing layer 104 is configured to operate the anode of each subpixel. The metal-containing layer 104 includes, but is not limited to, chromium, titanium, gold, silver, copper, aluminum, ITO, combinations thereof, or other suitable conductive materials.

[0016] The PDL structure 126 is placed on the substrate 102. The PDL structure 126 comprises one of the following: an organic material, an organic material with an inorganic coating, or an inorganic material. The organic material of the PDL structure 126 includes, but is not limited to, polyimide. The inorganic material of the PDL structure 126 includes, but is not limited to, silicon oxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (Si2N2O), magnesium fluoride (MgF2), or a combination thereof. Adjacent PDL structures 126 define their respective subpixels and expose the anode (i.e., the metal-containing layer 104) of each subpixel in the subpixel circuit 100.

[0017] The subpixel circuit 100 has a plurality of subpixels 106, including at least a first subpixel 108a, a second subpixel 108b, and a third subpixel 108c. The figure shows the first subpixel 108a, the second subpixel 108b, and the third subpixel 108c, but the subpixel circuit 100 of the embodiments described herein may include three or more subpixels 106, such as fourth and fifth subpixels. Each subpixel 106 has an organic light-emitting diode (OLED) material 112 configured to emit white, red, green, blue, or other colored light when energized. For example, the OLED material 112 of the first subpixel 108a emits red light when energized, the OLED material of the second subpixel 108b emits green light when energized, the OLED material of the third subpixel 108c emits blue light when energized, and the OLED materials of the fourth and fifth subpixels emit light of a different color when energized.

[0018] An overhang structure 110 is positioned on the upper surface 103 of each PDL structure 126. The overhang structure 110 is permanent to the subpixel circuit. The overhang structure 110 further defines each subpixel 106 of the subpixel circuit 100. The overhang structure 110 includes at least a superstructure 110B positioned on top of the main structure 110A. In one embodiment, the superstructure 110B is positioned on top of the main structure 110A. The main structure 110A is positioned on the upper surface 103 of the PDL structure 126. In one embodiment, the main structure 110A is positioned on top of the upper surface 103 of the PDL structure 126. Each overhang structure 110 includes an adjacent overhang 109. The adjacent overhang 109 is defined by an upper extension 109A of the superstructure 110B that extends laterally beyond the side wall 111 of the main structure 110A.

[0019] The superstructure 110B includes one of the following: a nonconductive material, an inorganic material, or a metal-containing material. The main structure 110A includes a nonconductive material, an inorganic material, or a metal-containing material. Examples of nonconductive materials include, but are not limited to, inorganic silicon-containing materials. For example, silicon-containing materials include silicon oxides or nitrides, or combinations thereof. Metal-containing materials include at least one of the following: titanium (Ti), aluminum (Al), aluminum neodymium (AlNd), molybdenum (Mo), molybdenum tungsten (MoW), copper (Cu), or combinations thereof. The inorganic materials of the main structure 110A and the superstructure 110B include silicon nitride (Si3N4), silicon oxide (SiO2), silicon oxynitride (Si2N2O), or combinations thereof. The overhang structure 110 can remain in place, i.e., it is permanent. Therefore, no organic material that would interfere with OLED performance resulting from a lifted overhang structure remains. Eliminating the need for a lift-off procedure also improves throughput.

[0020] In one example, the superstructure 110B includes a non-conductive inorganic material, and the main structure 110A includes a conductive inorganic material or a metal-containing material. In another example, the superstructure 110B includes a conductive inorganic material or a metal-containing material, and the main structure 110A includes a conductive inorganic material or a metal-containing material.

[0021] The adjacent overhang 109 is defined by the upper extension 109A of the superstructure 110B. At least the bottom surface 107 of the superstructure 110B is wider than the top surface 105 of the main structure 110A, forming the upper extension 109A of the overhang 109 (as shown in Figures 1A and 1B). The superstructure 110B is positioned above the top surface 105 of the main structure 110A. The upper extension 109A of the superstructure 110B forms the overhang 109, allowing the superstructure 110B to cast a shadow on the main structure 110A. The shadowing of the overhang 109 provides for the deposition of the OLED material 112 and the cathode 114, respectively. The OLED material 112 is positioned below the overhang 109. The cathode 114 is positioned above the OLED material 112 and extends below the overhang 109. In one embodiment, as shown in Figures 2A and 2B, the cathode 114 is in contact with a first portion 220 of the side wall 111 of the main body structure 110A.

[0022] The deposition angle set by the overhang structure 110 and the deposition source defines the deposition angle, i.e., the overhang structure 110 provides a shadowing effect during deposition at the deposition angle set by the deposition source. The overhang 109 and the deposition source control the OLED angle θ of the OLED material 112. OLED and the cathode angle θ of cathode 114 cathode (As shown in Figure 2A) defines the OLED angle θ of the OLED material 112. OLED and the cathode angle θ of cathode 114 cathodeThis results from the deposition angle set by the overhang structure 110 and the deposition source, i.e., the overhang structure 110 provides a shadowing effect during the deposition of the OLED material 112 and cathode 114 at the deposition angle set by the deposition source. In one embodiment, the OLED material 112 and cathode 114 are in contact with the side wall 111 of the main structure 110A of the overhang structure 110. In another embodiment, as shown in Figure 1A, the cathode 114 is in contact with the side wall 111 of the main structure 110A of the overhang structure 110. In one embodiment, as shown in Figure 1A, the encapsulation layer 116 is located on the side wall 111 of the main structure 110A and the bottom surface 107 of the superstructure 110B. In another embodiment, the cathode 114 is in contact with a busbar (not shown) outside the active region of the subpixel circuit 100. The cathode 114 includes a conductive material such as a metal or a metal alloy. For example, the cathode 114 may include, but is not limited to, chromium, titanium, aluminum, ITO, or a combination thereof. In some embodiments, the material of the cathode 114 is different from the material of the main body structure 110A and the superstructure 110B.

[0023] Each subpixel 106 includes an encapsulation layer 116, for example, the first subpixel 108a has a first encapsulation layer 116A, the second subpixel 108b has a second encapsulation layer 116B, and the third subpixel 108c has a third encapsulation layer 116C. The encapsulation layer 116 may be a local passivation layer or equivalent. The encapsulation layer 116 of each subpixel is located on the cathode 114 (and OLED material 112), and the encapsulation layer 116 extends below at least a portion of the overhang structure 110 and above at least a portion of the respective sidewalls of adjacent overhang structures 110. In one embodiment, as shown in subpixels 108b and 108c of Figure 1A, the second encapsulation layer 116B and the third encapsulation layer 116C are positioned above the cathode 114 and extend below the adjacent overhang 109, contacting a second portion (not shown) of the side wall 111 of the main structure 110A. In another embodiment, as shown in subpixel 108a of Figure 1A, the first encapsulation layer 116A is positioned above the side wall 111 of the main structure 110A and the bottom surface 107 of the superstructure 110B.

[0024] In another embodiment, as shown in subpixel 108a of Figure 1B, the first encapsulation layer 116A is positioned on the side wall 111 of the main structure 110A of the overhang structure 110, the bottom surface 107 of the superstructure 110B, the side wall 113 of the superstructure 110B, and a portion of the top surface 115 of the superstructure 110B. The first encapsulation layer 116A has gaps 150. Each of the gaps 150 is defined by a first portion 151, a second portion 152, and a third portion 153, with the first portion 151 in contact with the third portion 153 of the first encapsulation layer 116A. The first portion 151 of the first encapsulation layer 116A is positioned on the cathode 114. In some embodiments, the first portion 151 is in contact with the cathode 114. The second portion 152 of the first sealing layer 116A is positioned on the side wall 111 of the main structure 110A. In some embodiments, the second portion 152 is in contact with the side wall 111 of the main structure 110A. The third portion 153 of the first sealing layer 116A is positioned below the lower surface 117 of the upper extension 109A of the superstructure 110B. In some embodiments, the third portion 153 is in contact with the lower surface 117 of the upper extension 109A of the superstructure 110B. The first portion 151 of the first sealing layer 116A is in contact with the third portion 153 of the first sealing layer 116A. The gap 150 is sealed by the contact between the first portion 151 and the third portion 153. The first sealing layer 116A has an inner surface 155 and an outer surface 156. The inner surface 155 is in contact with the cathode 114, the side wall 111 of the main body structure 110A, and the lower surface 117 of the upper extension 109A of the superstructure 110B. The outer surface 156 surrounds the void space outside the first encapsulation layer 116A. This void space corresponds to the gap 150. In one or more embodiments, the gap 150 and the void have a size smaller than the height of the overhang 109. In one or more embodiments, the gap 150 and the void have a size of less than 1.5 μm, for example, less than 0.5 μm.

[0025] In some embodiments, as shown in the second subpixel 108b of Figure 1B, the second encapsulation layer 116B is positioned on the side wall 111 of the main structure 110A of the overhang structure 110, the bottom surface 107 of the superstructure 110B, the side wall 113 of the superstructure 110B, and a portion of the top surface 115 of the superstructure 110B. The second encapsulation layer 116B has gaps 150. Each of the gaps 150 is defined by a first portion 151, a second portion 152, and a third portion 153, with the first portion 151 in contact with the third portion 153 of the second encapsulation layer 116B. The first portion 151 of the second encapsulation layer 116B is positioned on the cathode 114. In some embodiments, the first portion 151 is in contact with the cathode 114. The second portion 152 of the second sealing layer 116B is positioned on the side wall 111 of the main structure 110A. In some embodiments, the second portion 152 is in contact with the side wall 111 of the main structure 110A. The third portion 153 of the second sealing layer 116B is positioned below the lower surface 117 of the upper extension 109A of the superstructure 110B. In some embodiments, the third portion 153 is in contact with the lower surface 117 of the upper extension 109A of the superstructure 110B. The first portion 151 of the second sealing layer 116B is in contact with the third portion 153 of the second sealing layer 116B. The gap 150 is sealed by the contact between the first portion 151 and the third portion 153. The second sealing layer 116B has an inner surface 155 and an outer surface 156. The inner surface 155 is in contact with the cathode 114, the side wall 111 of the main body structure 110A, and the lower surface 117 of the upper extension 109A of the superstructure 110B. The outer surface 156 surrounds the void space outside the second encapsulation layer 116B. This void space corresponds to the gap 150.

[0026] In some embodiments, the portion of the upper surface 115 of the superstructure 110B on which the first encapsulation layer 116A is located is separated from the portion of the upper surface 115 of the superstructure 110B on which the second encapsulation layer 116B is located. Thus, as shown in Figure 1B, a space 160 exists between the first encapsulation layer 116A and the second encapsulation layer 116B. In some embodiments, the first encapsulation layer 116A overlaps with the second encapsulation layer 116B.

[0027] In some embodiments, as shown in the third subpixel 108c of Figure 1B, the third encapsulation layer 116C is positioned on the side wall 111 of the main structure 110A of the overhang structure 110, the bottom surface 107 of the superstructure 110B, the side wall 113 of the superstructure 110B, and a portion of the top surface 115 of the superstructure 110B. The third encapsulation layer 116C has gaps 150. Each of the gaps 150 is defined by a first portion 151, a second portion 152, and a third portion 153, with the first portion 151 in contact with the third portion 153 of the third encapsulation layer 116C. The first portion 151 of the third encapsulation layer 116C is positioned on the cathode 114. In some embodiments, the first portion 151 is in contact with the cathode 114. The second portion 152 of the third sealing layer 116C is positioned on the side wall 111 of the main structure 110A. In some embodiments, the second portion 152 is in contact with the side wall 111 of the main structure 110A. The third portion 153 of the third sealing layer 116C is positioned below the lower surface 117 of the upper extension 109A of the superstructure 110B. In some embodiments, the third portion 153 is in contact with the lower surface 117 of the upper extension 109A of the superstructure 110B. The first portion 151 of the third sealing layer 116C is in contact with the third portion 153 of the third sealing layer 116C. The gap 150 is sealed by the contact between the first portion 151 and the third portion 153. The third sealing layer 116C has an inner surface 155 and an outer surface 156. The inner surface 155 is in contact with the cathode 114, the side wall 111 of the main structure 110A, and the lower surface 117 of the upper extension 109A of the superstructure 110B. The outer surface 156 surrounds the void space outside the third encapsulation layer 116C. This void space corresponds to the gap 150.

[0028] In some embodiments, the portion of the upper surface 115 of the superstructure 110B on which the second encapsulation layer 116B is located is separated from the portion of the upper surface 115 of the superstructure 110B on which the third encapsulation layer 116C is located. Thus, a space 160 exists between the second encapsulation layer 116B and the third encapsulation layer 116C. In some embodiments, the second encapsulation layer 116B overlaps with the third encapsulation layer 116C, as shown in Figure 1B.

[0029] In embodiments including one or more capping layers, the capping layers are located between the cathode 114 and the encapsulation layer 116. For example, a first capping layer and a second capping layer are located between the cathode 114 and the encapsulation layer 116. Each of the embodiments described herein may include one or more capping layers located between the cathode 114 and the encapsulation layer 116. The first capping layer may include an organic material. The second capping layer may include an inorganic material such as lithium fluoride. The first and second capping layers may be deposited by vapor deposition. In another embodiment, the subpixel circuit 100 further includes at least a global passivation layer 120 located on the overhang structure 110 and the encapsulation layer 116. In yet another embodiment, the subpixel includes an intermediate passivation layer located on each of the overhang structures 110 of the subpixel 106 and located between the encapsulation layer 116 and the global passivation layer 120.

[0030] Arrangements 101A and 101B of the subpixel circuit 100 further include at least a global passivation layer 120 disposed on top of the overhang structure 110 and the encapsulation layer 116. In one embodiment, an intermediate layer 118 may be disposed between the global passivation layer 120 and the overhang structure 110 and the encapsulation layer 116. The intermediate layer 118 may include an inkjet material such as an acrylic material.

[0031] Figure 1C is a schematic top cross-sectional view of a subpixel circuit 100 having a dot architecture 101C. Figure 1D is a schematic cross-sectional view of a subpixel circuit 100 having a line architecture 101D. The top cross-sectional views of Figures 1C and 1D are taken along the section lines 1'-1' in Figures 1A and 1B, respectively. The dot architecture 101C includes multiple pixel openings 124A from adjacent PDL structures 126. Each of the pixel openings 124A is surrounded by an overhang structure 110 that defines each of the subpixels 106 of the dot architecture 101C, as shown in Figure 1A. The line architecture 101D includes multiple pixel openings 124B from adjacent PDL structures 126. Each of the pixel openings 124B abuts against an overhang structure 110 that defines each of the subpixels 106 of the line architecture 101D, as shown in Figure 1A.

[0032] Figure 2A is a schematic cross-sectional view of the overhang structure 110 of the subpixel circuit 100. Figure 2B is a schematic cross-sectional view of the overhang structure 110 of the subpixel circuit 100. In one embodiment, the overhang structure 110 includes a superstructure 110B made of a non-conductive inorganic material and a body structure 110A made of a conductive inorganic material. In another embodiment, the overhang structure 110 includes a superstructure 110B made of a conductive inorganic material and a body structure 110A made of a conductive inorganic material. In one embodiment, the cathode 114 is in contact with the body structure 110A of the overhang structure 110. In another embodiment, as shown in Figure 2B, the encapsulation layer 116 has gaps 150. Each of the gaps 150 is defined by a first portion 151, a second portion 152, and a third portion 153, with the first portion 151 in contact with the third portion 153 of the encapsulation layer 116. The first portion 151 of the sealing layer 116 is positioned above the cathode 114. In some embodiments, the first portion 151 is in contact with the cathode 114. The second portion 152 of the sealing layer 116 is positioned above the side wall 111 of the main structure 110A. In some embodiments, the second portion 152 is in contact with the side wall 111 of the main structure 110A. The third portion 153 of the sealing layer 116 is positioned below the lower surface 117 of the upper extension 109A of the superstructure 110B. In some embodiments, the third portion 153 is in contact with the lower surface 117 of the upper extension 109A of the superstructure 110B. The first portion 151 of the sealing layer 116 is in contact with the third portion 153 of the sealing layer 116. The gap 150 is sealed by the contact between the first portion 151 and the third portion 153.

[0033] The superstructure 110B includes a lower edge 206 and an overhang vector 208. The lower edge 206 extends beyond the side wall 111 of the main structure 110A. The overhang vector 208 is defined by the lower edge 206 and the PDL structure 126. The OLED material 112 is positioned on the metal-containing layer 104, on the side wall 127 of the PDL structure 126, and on the first portion 210 of the upper surface 103 of the PDL structure 126, extending below the overhang 109 to the OLED endpoint 218. The OLED material 112 has an OLED angle θ between the OLED vector 212 and the overhang vector 208.OLED The OLED vector 212 is defined by an OLED endpoint 218 extending beneath the superstructure 110B and the lower edge portion 206 of the superstructure 110B. In one embodiment, the OLED material 112 may include one or more of HIL, HTL, EML, and ETL.

[0034] The cathode 114 is located on the OLED material 112, on the first portion 210 of the PDL structure 126, and on the second portion 211 of the upper surface 103 of the PDL structure 126 in each subpixel 106. In some embodiments that can be combined with other embodiments described herein, the cathode 114 is located on the first portion 220 of the side wall 111 of the main body structure 110A. In other embodiments, as shown in Figure 2A, the cathode 114 has a cathode angle θ between the cathode vector 224 and the overhang vector 208. cathode The cathode vector 224 is defined by the cathode endpoint 226 extending beneath the superstructure 110B and the lower edge portion 206 of the superstructure 110B.

[0035] The encapsulation layer 116 is positioned above the cathode 114 (and the OLED material 112), and extends at least below the superstructure 110B of the overhang structure 110 and above at least a portion of the sidewall of the overhang structure 110. In one embodiment, as shown in subpixels 108a, 108b, and 108c of Figure 1A, the second encapsulation layer 116B and the third encapsulation layer 116C are positioned above the cathode 114 and extend below the adjacent overhang 109, contacting a second portion (not shown) of the sidewall 111 of the main structure 110A. In another embodiment, as shown in Figure 2A, the first encapsulation layer 116A is positioned above the sidewall 111 of the main structure 110A and the bottom surface 107 of the superstructure 110B. In another embodiment, as shown in Figure 2B, the first encapsulation layer 116A is in contact with the side walls 111 of the main structure 110A of the overhang structure 110, the bottom surface 107 of the superstructure 110B, the side walls 113 of the superstructure 110B, and a portion of the top surface 115 of the superstructure 110B. The encapsulation layer 116 further includes a top surface 119 that defines the uppermost edge of the encapsulation layer 116 between the side walls 111 of the main structure 110A.

[0036] In one embodiment, as shown in Figure 1A, the encapsulation layer 116 can be varied using the deposition thickness. Each encapsulation layer 116 has a thickness, which is the distance from the bottom surface of the encapsulation layer to the top surface of the encapsulation layer 116. The first encapsulation layer 116A has a first thickness t1, the second encapsulation layer 116B has a second thickness t2, and the third encapsulation layer 116C has a third thickness t3. In another embodiment, the second thickness t2 is different from the first thickness t1, and the third thickness t3 is different from the first thickness t1 and the second thickness t2. In one embodiment, as shown in Figure 1A, the thickness t1 is greater than the thicknesses t2 and t3, and the thickness t2 is greater than the thickness t3.

[0037] In another embodiment, the thickness of the encapsulation layer 116 increases as the wavelength of the emitted light increases, for example, the thickness t1 of the first encapsulation layer 116A is thickest at subpixel 108a having red OLED material 112 (approximately 580 nm), the thickness t2 of the second encapsulation layer 116B is thinner at the second subpixel 108b having green OLED material 112 (approximately 540 nm), and the thickness t3 of the third encapsulation layer 116C is thinnest at subpixel 108c having blue OLED material 112 (approximately 440 nm). In another embodiment, the thickness of the encapsulation layer 116 decreases as the wavelength of the emitted light increases. For example, the thickness t1 of the first encapsulation layer 116A is thinnest at subpixel 108a having red OLED material 112 (approximately 580 nm), the thickness t2 of the second encapsulation layer 116B is thicker at the second subpixel 108b having green OLED material 112 (approximately 540 nm), and the thickness t3 of the third encapsulation layer 116C is thickest at subpixel 108c having blue OLED material 112 (approximately 440 nm). In another embodiment, the thickness of the encapsulation layer 116 may vary independently of the type of OLED light used in subpixels 108a, 108b, and 108c. The encapsulation layer in each subpixel has varying thickness to protect the deposited layer during subsequent etching of the encapsulation layer.

[0038] The encapsulation layer 116 comprises a non-conductive inorganic material such as a silicon-containing material. The silicon-containing material may include silicon nitride (e.g., Si3N4), silicon oxynitride (e.g., Si2N2O), silicon oxide (e.g., SiO2), or a combination thereof. In one embodiment, the first encapsulation layer 116A comprises a silicon nitride material, the second encapsulation layer 116B comprises a silicon oxynitride material, and the third encapsulation layer 116C comprises silicon oxide. The thickness of the encapsulation layer 116 may depend on the etching selectivity of the material of the encapsulation layer 116. The silicon-containing material can be further varied to change the optical properties of the encapsulation layer 116. For example, the silicon-containing material can be adjusted to increase or decrease the refractive index. The difference in refractive index may also affect the etching rate of the encapsulation layer 116. This allows for additional control of the etching selectivity of the encapsulation layer 116. In one embodiment, the first encapsulation layer 116A has a first refractive index, the second encapsulation layer 116B has a second refractive index, and the third encapsulation layer 116C has a third refractive index. In this embodiment, the first refractive index, the second refractive index, and the third refractive index are different from each other.

[0039] In one embodiment, at least one of the first encapsulation layer 116A, the second encapsulation layer 116B, and the third encapsulation layer 116C may include at least two layers of silicon-containing material. At least one of the first encapsulation layer 116A, the second encapsulation layer 116B, and the third encapsulation layer 116C may have at least one of the silicon-containing material layers having a different composition than the other encapsulation layers 116. In the first example, the first encapsulation layer 116A includes a silicon oxynitride material on top of a silicon nitride material. The second encapsulation layer 116B includes a silicon oxide layer on top of a silicon nitride layer. The third encapsulation layer 116C includes a silicon nitride layer on top of a silicon oxide layer. In the second example, the first encapsulation layer 116A includes a silicon oxide layer on top of a silicon oxynitride layer. The second encapsulation layer 116B includes a silicon nitride layer on top of a silicon oxynitride layer. The third encapsulation layer 116C has a silicon oxynitride layer on top of a silicon oxide layer.

[0040] The encapsulation layer 116 can be further varied using different deposition modes, such as atomic layer deposition (ALD), chemical vapor deposition (CVD), and physical vapor deposition (PVD). For example, the first subpixel 108a contains silicon nitride deposited using CVD and silicon oxide deposited using ALD. The second subpixel 108b contains silicon nitride deposited using CVD and silicon oxynitride deposited using CVD. The third subpixel 108c contains silicon nitride deposited using CVD. The encapsulation layer 116 can be further varied between using inductively coupled plasma (IDP) or conductively coupled plasma (CCP) for the deposition process.

[0041] By varying the composition, deposition method, and thickness of the encapsulation layer 116, the encapsulation layer of each subpixel protects the deposited layer during subsequent processing, improving process yield and efficiency. Varying the thickness of the encapsulation layer 116 further controls the distance between the lower edge 206 and the upper surface of the encapsulation layer 116, as shown in subpixels 108b and 108c in Figures 1A and 2A. This distance controls the amount of etching and deposition performed under the overhang structure 110, enhancing the protection of the OLED material 112 during subsequent deposition and etching.

[0042] During the deposition of the OLED material 112, the lower edge 206 of the superstructure 110B defines the position of the OLED endpoint 218. For example, the OLED material 112 is deposited at the maximum OLED angle corresponding to the OLED vector 212, and the lower edge 206 prevents the OLED material 112 from depositing beyond the OLED endpoint 218. During the deposition of the cathode 114, the lower edge 206 of the superstructure 110B defines the position of the cathode endpoint 226. For example, the cathode 114 is deposited at the maximum cathode angle corresponding to the cathode vector 224, and the lower edge 206 prevents the cathode 114 from depositing beyond the cathode endpoint 226. OLED angle θ OLED This is the cathode angle θ cathode It is smaller than that.

[0043] Figure 3 is a flowchart of a method 300 for forming a subpixel circuit 100 according to an embodiment. Figures 4A to 4K are schematic cross-sectional views of a substrate 102 in a method 300 for forming a subpixel circuit 100 according to an embodiment described herein. The method 300 described herein provides the ability to manufacture both subpixel circuits 100 having a dot architecture 101C and subpixel circuits 100 having a line architecture 101D.

[0044] In operation 301, the main structural layer 402A and the upper structural layer 402B are deposited on the substrate 102, as shown in Figure 4A. The main structural layer 402A is placed on top of the PDL structure 126 and the metal-containing layer 104. The upper structural layer 402B is placed on top of the main structural layer 402A. The main structural layer 402A corresponds to the main structure 110A, and the upper structural layer 402B corresponds to the upper structure 110B of the overhang structure 110.

[0045] In operation 302, the resist 406 is positioned and patterned as shown in Figure 4B. The resist 406 is positioned on top of the superstructure layer 402B. The resist 406 is either a positive resist or a negative resist. A positive resist contains portions of the resist that, when exposed to electromagnetic radiation, become soluble to the resist developer applied to the resist after the pattern has been written to the resist using electromagnetic radiation. A negative resist contains portions of the resist that, when exposed to radiation, become insoluble to the resist developer applied to the resist after the pattern has been written to the resist using electromagnetic radiation. The chemical composition of the resist 406 determines whether the resist is a positive or negative resist. The resist 406 is patterned to form either a pixel opening 124A of the dot architecture 101C or a pixel opening 124B of the line architecture 101D of the first subpixel 108a. Patterning is one of the following processes: photolithography, digital lithography, or laser ablation.

[0046] In operation 303, as shown in FIG. 4C, the portions of the upper structure layer 402B and the body structure layer 402A exposed by the pixel openings 124A, 124B are removed. The upper structure layer 402B exposed by the pixel openings 124A, 124B can be removed by a dry etching process or a wet etching process. The body structure layer 402A exposed by the pixel openings 124A, 124B can be removed by a dry etching process or a wet etching process. Operation 303 forms the overhang structure 110 of the first sub-pixel 108a. Due to the etching selectivity between the material of the upper structure layer 402B corresponding to the upper structure 110B and the material of the body structure layer 402A corresponding to the body structure 110A, and the etching process for removing the exposed portions of the upper structure layer 402B and the body structure layer 402A, the bottom surface 107 of the upper structure 110B becomes wider than the upper surface 105 of the body structure 110A, and an upper extension 109A defining an overhang 109 is formed (as shown in FIGS. 1A, 1B, 2A, and 2B). The shadowing of the overhang 109 provides for the deposition of the OLED material 112 and the cathode 114.

[0047] In operation 304, as shown in FIG. 4D, the OLED material 112, the cathode 114, and the encapsulation layer 116 of the first sub-pixel 108a are deposited. The shadowing of the overhang 109 provides for the deposition of the OLED material 112 and the cathode 114, respectively. As further discussed in the corresponding description of FIG. 2, due to the shadowing effect of the overhang structure 110, the OLED angle θ OLED (shown in FIG. 2A) of the OLED material 112 and the cathode angle θ cathode (shown in FIG. 2A) of the cathode 114 are defined. The OLED angle θ OLED of the OLED material 112 and the cathode angle θ cathodeThis occurs as a result of the deposition of the OLED material 112 and the cathode 114. In one embodiment, the cathode 114 is in contact with the main structure 110A of the overhang structure 110. The encapsulation layer 116 is deposited on top of the cathode 114 to a thickness t1. In embodiments including a capping layer, the capping layer is deposited between the cathode 114 and the encapsulation layer 116. The capping layer can be deposited by vapor deposition.

[0048] In operation 305, a resist 408 is formed in the well 410 of the first subpixel 108a, as shown in Figure 4E. In one embodiment, the thickness of the resist 408 is different from the thickness of the resist 406. In operation 306, the encapsulation layer 116, cathode 114, and OLED material 112 exposed by the resist 408 are removed, as shown in Figure 4F. The encapsulation layer 116, cathode 114, and OLED material 112 exposed by the resist 408 can be removed by a wet etching or dry etching process. The resist 408 is removed from the well, leaving the overhang structure 110. In operation 307, the resist 412 is placed and patterned, as shown in Figure 4G. In one embodiment, the thickness of the resist 412 is different from the thicknesses of the resists 406 and 408. The resist 412 is placed on top of the superstructure layer 402B and superstructure 110B of the first subpixel 108a. The resist 412 is patterned to form either a pixel aperture 124A of a dot-type architecture 101C or a pixel aperture 124B of a line-type architecture 101D for a second subpixel 108b.

[0049] In operation 308, as shown in Figure 4H, portions of the superstructure layer 402B and body structure layer 402A exposed by the pixel openings 124A and 124B of the second subpixel 108b are removed. The superstructure layer 402B exposed by the pixel openings 124A and 124B can be removed by a dry etching process or a wet etching process. The body structure layer 402A exposed by the pixel openings 124A and 124B can be removed by a dry etching process or a wet etching process. Operation 308 forms the overhang structure 110 of the second subpixel 108b. Due to the etching selectivity of the materials of the superstructure layer 402B corresponding to the superstructure 110B and the main structure layer 402A corresponding to the main structure 110A, and the etching process that removes the exposed portions of the superstructure layer 402B and the main structure layer 402A, the bottom surface 107 of the superstructure 110B becomes wider than the top surface 105 of the main structure 110A, forming an upper extension 109A that defines an overhang 109 (as shown in Figure 1A). The shadowing of the overhang 109 provides for the deposition of the OLED material 112 and the cathode 114.

[0050] In operation 309, the OLED material 112, cathode 114, and encapsulation layer 116 of the second subpixel 108b are deposited, as shown in Figure 4I. A resist 414 is formed in the well of the first subpixel 108a, and the OLED material 112, cathode 114, and encapsulation layer 116 are deposited on top of the resist 414. In one embodiment, the resist 414 has a different thickness than the resists 408 and 412. In embodiments including a capping layer, a capping layer is deposited between the cathode 114 and the encapsulation layer 116. The capping layer can be deposited by vapor deposition. Shadowing of the overhang 109 provides for the deposition of the OLED material 112 and cathode 114. The shadowing effect of the overhang structure 110 provides for the OLED angle θ of the OLED material 112. OLED and the cathode angle θ of cathode 114 cathode The OLED angle θ of OLED material 112 is defined. OLEDand the cathode angle θ of cathode 114 cathode This occurs as a result of the deposition of the OLED material 112 and the cathode 114. In one embodiment, the cathode 114 is in contact with the main structure 110A of the overhang structure 110. The encapsulation layer 116 is deposited on top of the cathode 114 to a thickness t2. In one embodiment, the thickness t2 is less than the thickness t1. In another embodiment, the thickness t2 is greater than the thickness t1.

[0051] In operation 310, a resist 416 is formed in the well of the second subpixel 108b, as shown in Figure 4J. In one embodiment, the thickness of the resist 416 is different from the thicknesses of the resists 406, 408, and 412. In operation 311, the encapsulation layer 116, cathode 114, and OLED material 112 exposed by the resist 416 are removed, as shown in Figure 4K. The encapsulation layer 116, cathode 114, and OLED material 112 exposed by the resist 416 can be removed by a wet etching or dry etching process. The resist 416 is removed from the well, leaving the overhang structure 110. Operations 301-311 described herein form a subpixel circuit 100 containing two subpixels 106. Operations 306-310 may be repeated for each additional subpixel, e.g., a third and / or fourth subpixel. The encapsulation layer 116 for the third subpixel 108c has a thickness t3, as shown in Figures 1A and 1B. Any additional pixels 108n have a thickness t nIt has an encapsulation layer 116. In one embodiment, the thickness t3 of the encapsulation layer 116 of the subpixel 108c is less than the thicknesses t1 and t2. In another embodiment, the thickness t3 of the encapsulation layer 116 of the subpixel 108c is greater than the thicknesses t1 and t2. In another embodiment, the thickness t3 of the encapsulation layer 116 of the subpixel 108c is less than the thickness t1 and greater than the thickness t2. In another embodiment, the thickness t3 of the encapsulation layer 116 of the subpixel 108c is greater than the thickness t1 and less than the thickness t2. In another embodiment, the thickness of the encapsulation layer 116 increases as the wavelength of the emitted light increases. In another embodiment, the thickness of the encapsulation layer 116 decreases as the wavelength of the emitted light increases.

[0052] The thickness, composition, and deposition method of the encapsulation layer 116 can be varied as described above. By varying the composition and deposition method of the encapsulation layer 116 to change its thickness, the encapsulation layer 116 protects the deposited OLED material 112 from damage during layer formation, improving process yield and efficiency. Varying the thickness of the encapsulation layer 116 further controls the distance between the lower edge 206 and the upper surface of the encapsulation layer 116, as shown in subpixels 108b and 108c of Figures 1 and 2. This distance controls the amount of etching and deposition performed under the overhang structure 110, enhancing the protection of the OLED material 112 during subsequent deposition and etching.

[0053] Figure 5 is a flowchart of method 500 for forming a subpixel circuit 100. Figures 6a to 6H are schematic cross-sectional views of a substrate 102 in method 500 for forming a subpixel circuit 100 according to embodiments described herein.

[0054] In operation 501, the main structural layer 402A and the superstructure layer 402B are deposited on the substrate 102, as shown in Figure 6A. The main structural layer 402A is placed on top of the PDL structure 126 and the metal-containing layer 104. The superstructure layer 402B is placed on top of the main structural layer 402A. The main structural layer 402A corresponds to the main structure 110A, and the superstructure layer 402B corresponds to the superstructure 110B of the overhang structure 110. A resist 406 is placed on top of the superstructure layer 402B and patterned to expose the pixel openings 124A and 124B. In operation 502, the overhang structure portions of the superstructure layer 402B and the main structural layer 402A exposed by the pixel openings 124A and 124B are removed, as shown in Figure 6B. The upper structural layer 402B exposed by the pixel openings 124A and 124B can be removed by a dry etching process or a wet etching process. The main structural layer 402A exposed by the pixel openings 124A and 124B can be removed by a dry etching process or a wet etching process.

[0055] In operation 503, the OLED material 112, cathode 114, and encapsulation layer 116 of the first subpixel 108a are deposited, as shown in Figure 6C. In embodiments including a capping layer, the capping layer is deposited between the cathode 114 and the encapsulation layer 116. The capping layer can be deposited by vapor deposition. As further discussed in the corresponding description in Figure 2B, the shadowing effect of the overhang structure 110 causes the OLED angle θ of the OLED material 112 to change. OLED (Shown in Figure 2A) and the cathode angle θ of cathode 114 cathode (Shown in Figure 2A) is defined. OLED angle θ of OLED material 112 OLED and the cathode angle θ of cathode 114 cathodeThis occurs as a result of the deposition of the OLED material 112 and the cathode 114. In one embodiment, the cathode 114 is in contact with the main structure 110A of the overhang structure 110. An encapsulation layer 116 is deposited on top of the cathode 114. The encapsulation layer 116 of the subpixel 108a has a partial gap 150 below the superstructure 110B. Each of the gaps 150 is defined by a first portion 151, a second portion 152, and a third portion 153, with the first portion 151 in contact with the third portion 153 of the encapsulation layer 116. The first portion 151 of the encapsulation layer 116 is positioned on top of the cathode 114. In some embodiments, the first portion 151 is in contact with the cathode 114. The second portion 152 of the encapsulation layer 116 is positioned on the side wall 111 of the main structure 110A. In some embodiments, the second portion 152 is in contact with the side wall 111 of the main structure 110A. The third portion 153 of the sealing layer 116 is located below the lower surface 117 of the upper extension 109A of the superstructure 110B. In some embodiments, the third portion 153 is in contact with the lower surface 117 of the upper extension 109A of the superstructure 110B. The first portion 151 of the sealing layer 116 is in contact with the third portion 153 of the sealing layer 116. The gap 150 is sealed by the contact between the first portion 151 and the third portion 153.

[0056] In operation 504, a resist 602 is formed in the well of the first subpixel 108a, as shown in Figure 6D. The resist 602 cannot enter the gap 150 because the first portion 151 and the third portion 153 of the encapsulation layer 116 are in contact. The resist 602 cannot go under the superstructure 110B due to the gap 150 and the encapsulation layer 116. In operation 505, the encapsulation layer 116, cathode 114, and OLED material 112 exposed by the resist 602 are removed, as shown in Figure 6E. The encapsulation layer 116, cathode 114, and OLED material 112 exposed by the resist 602 can be removed by a wet etching process. The resist 602 is removed. The resist 602 is removed without leaving any residue because it is prevented from being trapped under the superstructure 110B.

[0057] In operation 506, the OLED material 112, cathode 114, and encapsulation layer 116 of the second subpixel 108b are deposited, as shown in Figure 6F. In embodiments including a capping layer, the capping layer is deposited between the cathode 114 and the encapsulation layer 116. The capping layer can be deposited by vapor deposition. Shadowing of the overhang 109 provides the deposition of the OLED material 112 and cathode 114, respectively. The shadowing effect of the overhang structure 110 provides the OLED angle θ of the OLED material 112. OLED and the cathode angle θ of cathode 114 cathode The OLED angle θ of OLED material 112 is defined. OLED and the cathode angle θ of cathode 114 cathode This occurs as a result of the deposition of the OLED material 112 and the cathode 114. In one embodiment, the cathode 114 is in contact with the main structure 110A of the overhang structure 110. An encapsulation layer 116 is deposited on top of the cathode 114. The encapsulation layer 116 of the subpixel 108b has a partial gap 150 below the superstructure 110B. Each of the gaps 150 is defined by a first portion 151, a second portion 152, and a third portion 153, with the first portion 151 in contact with the third portion 153 of the encapsulation layer 116. The first portion 151 of the encapsulation layer 116 is positioned on top of the cathode 114. In some embodiments, the first portion 151 is in contact with the cathode 114. The second portion 152 of the encapsulation layer 116 is positioned on the side wall 111 of the main structure 110A. In some embodiments, the second portion 152 is in contact with the side wall 111 of the main structure 110A. The third portion 153 of the sealing layer 116 is located below the lower surface 117 of the upper extension 109A of the superstructure 110B. In some embodiments, the third portion 153 is in contact with the lower surface 117 of the upper extension 109A of the superstructure 110B. The first portion 151 of the sealing layer 116 is in contact with the third portion 153 of the sealing layer 116. The gap 150 is sealed by the contact between the first portion 151 and the third portion 153.

[0058] In operation 507, a resist 606 is formed in the well of the second subpixel 108b, as shown in Figure 6G. The resist 606 cannot enter the gap 150 because the first portion 151 and the third portion 153 of the encapsulation layer 116 are in contact. The resist 606 cannot enter under the superstructure 110B due to the gap 150 and the encapsulation layer 116. In operation 508, the encapsulation layer 116, cathode 114, and OLED material 112 exposed by the resist 606 are removed, as shown in Figure 6H. The encapsulation layer 116, cathode 114, and OLED material 112 exposed by the resist 606 may also be removed by a wet etching process. The resist 606 is removed. The resist 606 is removed without leaving any resist 602 behind, as it is prevented from being trapped under the superstructure 110B.

[0059] Operations 501-508 described herein form a subpixel circuit 100 including two or more subpixels 106. Operations 505-508 may be repeated for each additional subpixel, e.g., a third and / or fourth subpixel. As shown in Figure 1B, the encapsulation layer 116 of the third subpixel 108c has a partial gap 150 beneath the superstructure 110B. Each of the gaps 150 is defined by a first portion 151, a second portion 152, and a third portion 153, with the first portion 151 in contact with the third portion 153 of the encapsulation layer 116. The first portion 151 of the encapsulation layer 116 is located above the cathode 114. In some embodiments, the first portion 151 is in contact with the cathode 114. The second portion 152 of the encapsulation layer 116 is located above the side wall 111 of the main structure 110A. In some embodiments, the second portion 152 is in contact with the side wall 111 of the main structure 110A. The third portion 153 of the encapsulation layer 116 is below the lower surface 117 of the upper extension 109A of the superstructure 110B. In some embodiments, the third portion 153 is in contact with the lower surface 117 of the upper extension 109A of the superstructure 110B. The first portion 151 of the encapsulation layer 116 is in contact with the third portion 153 of the encapsulation layer 116. The gap 150 is sealed by the contact between the first portion 151 and the third portion 153. Any additional pixels 108n have an encapsulation layer 116 in which the gap 150 is sealed by the contact between the first portion 151 and the third portion 153.

[0060] In summary, this specification describes devices and methods for forming subpixel circuits that can be used in displays such as organic light-emitting diode (OLED) displays. Adjacent overhang structures defining each subpixel of the subpixel circuit of the display enable the formation of the subpixel circuit using vapor deposition and allow the overhang structures to remain in place after the subpixel circuit has been formed. Vapor deposition can be used for the deposition of the OLED material and cathode. According to some embodiments, the overhang structures define the deposition angles for the OLED material and cathode, respectively, providing a shadowing effect during deposition such that the OLED material does not contact the main structure and the cathode contacts the main structure. The encapsulation layer of each subpixel is positioned above the cathode, and the encapsulation layer extends below at least a portion of each of the adjacent overhang structures and above the respective sidewalls of the adjacent overhang structures. The encapsulation layer of each subpixel is varied in thickness to protect the deposited layer during etching of the subsequent encapsulation layer. The thickness variation may be gradually thinning, gradually thickening, or dependent on the deposited OLED material (e.g., the color of the OLED). The gap 150 in the encapsulation layer 116 is present and sealed to prevent the resist from falling under the superstructure 110B. The resists 602 and 606 are prevented from being trapped and can be properly removed along with the encapsulation layer 116, cathode 114, and OLED material 112.

[0061] While the above applies to embodiments of the present disclosure, other embodiments and further embodiments of the present disclosure can be devised without departing from the basic scope of the present disclosure, and the scope of the present disclosure is determined by the following claims.

Claims

1. circuit board and A pixel definition layer (PDL) structure is disposed on the substrate and defines the subpixels of the device, A plurality of overhang structures, each defined by an upper extension of a superstructure that extends laterally beyond the main structure, wherein each main structure is positioned on the upper surface of each PDL structure, and adjacent overhang structures define a plurality of subpixels including a first subpixel, Equipped with, The first subpixel described above is The first anode and, A first organic light-emitting diode (OLED) material is disposed above the first anode and below the adjacent overhang structure, A first cathode is disposed on the first OLED material and below the adjacent overhang structure, The first sealing layer, The first portion of the first encapsulation layer placed on the first cathode, The second portion of the first sealing layer, which is positioned on the side wall of the main body structure, The third portion of the first sealing layer below the lower surface of the upper extension of the superstructure, The fourth portion of the first sealing layer, which is positioned on the upper surface of the superstructure, A gap defined by the first portion, the second portion, and the third portion, wherein the first portion of the first sealing layer contacts the third portion of the first sealing layer, and The space between the fourth portion of the first encapsulation layer and the fourth portion of the second encapsulation layer positioned on the upper surface of the superstructure, A first encapsulation layer having, A device equipped with the following features.

2. The second anode and, A second organic light-emitting diode (OLED) material is positioned on the second anode, in contact with the second anode, and positioned beneath the adjacent overhang structure, A second cathode is positioned on the second OLED material and below the adjacent overhang structure, A second encapsulation layer having the gap defined by the first portion of the second encapsulation layer disposed on the second cathode, the second portion of the second encapsulation layer disposed on the side wall of the main body structure, and the third portion of the second encapsulation layer below the lower surface of the upper extension of the upper structure, wherein the first portion of the second encapsulation layer is in contact with the third portion of the second encapsulation layer, A second subpixel comprising, The device according to claim 1, further comprising:

3. The third anode and A third organic light-emitting diode (OLED) material is positioned on the third anode, in contact with the third anode, and positioned beneath the adjacent overhang structure, A third cathode is positioned on the third OLED material and below the adjacent overhang structure, A third encapsulating layer having the gap defined by the first portion of the third encapsulating layer disposed on the third cathode, the second portion of the third encapsulating layer disposed on the side wall of the main body structure, and the third portion of the third encapsulating layer below the lower surface of the upper extension of the upper structure, wherein the first portion of the third encapsulating layer is in contact with the third portion of the third encapsulating layer, The device according to claim 2, further comprising a third subpixel having the same.

4. The device according to claim 3, wherein the first encapsulation layer, the second encapsulation layer, and the third encapsulation layer include a silicon nitride material, a silicon oxynitride material, a silicon oxide material, or a combination thereof.

5. The device according to claim 3, wherein the first encapsulation layer comprises a material different from at least one of the second encapsulation layer or the third encapsulation layer.

6. The device according to claim 1, wherein the main body structure includes an inorganic material or a metal-containing material.

7. The device according to claim 3, wherein the first encapsulation layer, the second encapsulation layer, and the third encapsulation layer each comprise at least two layers of silicon-containing material, and at least one of the silicon-containing material layers of the first encapsulation layer, the second encapsulation layer, and the third encapsulation layer is different from each other.

8. The device according to claim 2, wherein the first OLED material is positioned on the first anode, in contact with the first anode, and below the overhang structure so as to be in contact with the PDL structure, and the second OLED material is positioned on the second anode, in contact with the second anode, and below the overhang structure so as to be in contact with the PDL structure.

9. circuit board and A pixel definition layer (PDL) structure is disposed on the substrate and defines the subpixels of the device, A plurality of overhang structures, each defined by an upper extension of a superstructure that extends laterally beyond the main structure to form an overhang, wherein each main structure is positioned on the upper surface of each PDL structure, and adjacent overhang structures of the plurality of overhang structures define a plurality of subpixels including a first subpixel and a second subpixel, Equipped with, The first subpixel described above is The first anode and, A first organic light-emitting diode (OLED) material is disposed above the first anode and below the adjacent overhang structure, A first cathode is disposed on the first OLED material and below the adjacent overhang structure, A first encapsulation layer having an inner surface and an outer surface, wherein the inner surface is in contact with the first cathode, the side wall of the main body structure, the lower surface of the upper extension of the superstructure, and the upper surface of the superstructure, and the outer surface surrounds a void space outside the first encapsulation layer, Equipped with, The second subpixel is, The second anode and, A second organic light-emitting diode (OLED) material is disposed above the second anode and below the adjacent overhang structure, A second cathode is positioned on the second OLED material and below the adjacent overhang structure, A second encapsulation layer having the inner surface and the outer surface, wherein the inner surface is in contact with the second cathode, the side wall of the main body structure, the lower surface of the upper extension of the superstructure, and the outer surface of the first encapsulation layer on the superstructure, the outer surface surrounds the void space outside the second encapsulation layer, and the inner surface of the second encapsulation layer overlaps with the outer surface of the first encapsulation layer on the superstructure, A device equipped with the following features.

10. The third anode and A third organic light-emitting diode (OLED) material is positioned on the third anode, in contact with the third anode, and positioned beneath the adjacent overhang structure, A third cathode is positioned on the third OLED material and beneath the adjacent overhang structure, and is in contact with a portion of the overhang structure. A third encapsulation layer having the inner surface and the outer surface, wherein the inner surface is in contact with the third cathode, the side wall of the main body structure, and the lower surface of the upper extension of the superstructure, and the outer surface surrounds the void space outside the third encapsulation layer, The device according to claim 9, further comprising a third subpixel having the same.

11. The device according to claim 10, wherein the first encapsulation layer, the second encapsulation layer, and the third encapsulation layer include a silicon nitride material, a silicon oxynitride material, a silicon oxide material, or a combination thereof.

12. The device according to claim 9, wherein the main body structure includes an inorganic material, a non-conductive material, or a metal-containing material.

13. The device according to claim 9, wherein the superstructure comprises a non-conductive material, an inorganic material, or a metal-containing material.

14. The device according to claim 9, wherein the first cathode extends beyond the endpoint of the first OLED material to contact the PDL structure, and the second cathode extends beyond the endpoint of the second OLED material to contact the PDL structure.

15. The device according to claim 9, wherein the first OLED material is positioned on the first anode, in contact with the first anode, and below the overhang structure so as to be in contact with the PDL structure, and the second OLED material is positioned on the second anode, in contact with the second anode, and below the overhang structure so as to be in contact with the PDL structure.

16. circuit board and A pixel definition layer (PDL) structure is disposed on the substrate and defines the subpixels of the device, A plurality of overhang structures, each defined by an upper extension of a superstructure that extends laterally beyond the main structure, wherein each main structure is positioned on the upper surface of each PDL structure, and adjacent overhang structures define a plurality of subpixels including a first subpixel, Equipped with, The first subpixel described above is The first anode and, A first organic light-emitting diode (OLED) material is disposed on the first anode, in contact with the first anode, and positioned beneath the adjacent overhang structure, A first cathode is disposed on the first OLED material and below the adjacent overhang structure, The first sealing layer, The first portion of the first sealing layer that contacts the first cathode, The second portion of the first sealing layer that contacts the side wall of the main body structure, The third portion of the first sealing layer that contacts the lower surface of the upper extension of the superstructure, The fourth portion of the first sealing layer that contacts the upper surface of the superstructure, A gap defined by the first portion, the second portion, and the third portion, wherein the first portion of the first sealing layer contacts the third portion of the first sealing layer, and The space between the fourth portion of the first encapsulation layer and the fourth portion of the second encapsulation layer that contacts the upper surface of the superstructure, A first encapsulation layer having, A device equipped with the following features.

17. The device according to claim 16, wherein the first encapsulation layer comprises a silicon nitride material, a silicon oxynitride material, a silicon oxide material, or a combination thereof.

18. The device according to claim 16, wherein the first encapsulation layer comprises at least two layers of silicon-containing material.

19. The device according to claim 16, wherein the main body structure includes an inorganic material or a metal-containing material.

20. The device according to claim 16, wherein the first cathode extends beyond the endpoint of the first OLED material to contact the PDL structure.

21. circuit board and It is a subpixel, A-scatter, A first organic light-emitting diode (OLED) material disposed on the anode, and A first cathode placed on the first OLED material Subpixels, A pixel definition layer (PDL) structure is placed on the substrate, An overhang structure defined by an upper extension of a superstructure that extends laterally over a part of the first cathode beyond the main body structure, wherein the main body structure is positioned on the upper surface of the PDL structure, A first sealing layer disposed on the overhang structure, forming a sealed space below the upper extension of the superstructure, and forming an upper space above the upper surface of the superstructure, The sealed space is surrounded by the portion of the first sealing layer located above the first cathode, above the side wall of the main body structure, and below the lower surface of the upper structure. The upper space is located between the edge of the first encapsulation layer and the edge of the second encapsulation layer. The first encapsulation layer, A device equipped with the following features.

22. The device according to claim 21, wherein no material is placed in the sealed space.

23. The device according to claim 21, wherein an intermediate layer is arranged in the upper space.

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