Circuit and method for starting and stopping a multilevel converter

Abstract

A circuit suitable for use in a multilevel power converter cell, comprising: (1) charging a boot capacitor at startup to a level sufficient to supply power to level shifters and drivers that control the power switches within the cell; (2) pre-charging each fly capacitor to a target voltage; (3) providing a stop operation mode and / or standby operation mode that allows for rapid restart of operation; and (4) balancing the fly capacitor voltage when the fly capacitor is not actively charge-balanced. One embodiment comprises a first switchable current source connected between the fly capacitor and an input voltage; a second switchable current source connected between the fly capacitor and a reference potential; and a third switchable current source connected in parallel with the fly capacitor, wherein these switchable current sources are configured to charge the fly capacitor in the first operation mode and to discharge the fly capacitor in the second operation mode.

Claims

1. (a) An M-level power converter cell having a set of n power switches connected in series and configured to connect between the input voltage and a reference potential, wherein M≧3 and n≧4, (b) An output capacitor connected to the node between adjacent pairs of the set of n power switches and the reference potential, (c) One or more fly capacitors connected to the set of n power switches, each having an upper plate and a lower plate, (d) For each of the one or more fly capacitors, (1) A first switchable current source connected to the upper plate of the fly capacitor and configured to be connected to the input voltage, (2) A second switchable current source connected to the lower plate of the fly capacitor and configured to be connected to the reference potential, (3) A third switchable current source connected between the upper plate and the lower plate of the fly capacitor and Equipped with, A circuit in which the first, second, and third switchable current sources are configured to charge the fly capacitor in a first operating mode and to discharge the fly capacitor in a second operating mode.

2. The circuit according to claim 1, wherein the power switch comprises an N-type field-effect transistor.

3. The circuit according to claim 1, further comprising an inductor connected between the output capacitor and the node.

4. The circuit according to claim 1, further comprising a resistor connected in parallel to at least one of the one or more fly capacitors.

5. The circuit according to claim 1, wherein at least one switchable current source comprises a current source and a switch connected in series.

6. The circuit according to claim 1, wherein at least one switchable current source comprises a resistor and a switch connected in series.

7. (a) An M-level power converter cell having a set of n power switches connected in series and configured to connect between an input voltage and a reference potential, wherein each power switch has a control gate, and M≧3 and n≧4, (b) An output capacitor connected to the node between adjacent pairs of the set of n power switches and the reference potential, (c) One or more fly capacitors connected to the set of n power switches, each having an upper plate and a lower plate, (d) A set of n driver circuits, each connected to the control gate of a related power switch among the set of n power switches, (e) A set of n boot capacitors, each having an upper plate and a lower plate, each connected to a related driver circuit among the set of n driver circuits, (f) A diode ladder connected to a supply voltage and comprising a set of n-1 diodes, wherein each diode is connected between the upper plate of a related boot capacitor in the set of n boot capacitors and the upper plate of an adjacent boot capacitor in the set of n boot capacitors, and is configured to provide charge to the related boot capacitor in the set of n boot capacitors, (g) A set of n-1 switches, each of which is connected in parallel to a related diode in the set of n-1 diodes and configured to selectively bypass the related diode in the set of n-1 diodes, and A circuit equipped with this feature.

8. The circuit according to claim 7, wherein the diode is a Schottky diode.

9. The circuit according to claim 7, wherein at least one of the set of n driver circuits comprises a level shifter.

10. The circuit according to claim 7, wherein the set of n-1 switches comprises a P-type field-effect transistor.

11. The circuit according to claim 7, wherein the power switch comprises an N-type field-effect transistor.

12. The circuit according to claim 7, further comprising an inductor connected between the output capacitor and the node.

13. The circuit according to claim 7, further comprising a resistor connected in parallel to at least one of the one or more fly capacitors.

14. For each of the one or more fly capacitors, (a) A first switchable current source connected to the upper plate of the fly capacitor and configured to be connected to the input voltage, (b) A second switchable current source connected to the lower plate of the fly capacitor and configured to be connected to the reference potential, (c) A third switchable current source connected between the upper and lower plates of the fly capacitor and Furthermore, The circuit according to claim 7, wherein the first, second, and third switchable current sources are configured to charge the fly capacitor in a first operating mode and to discharge the fly capacitor in a second operating mode.

15. The circuit according to claim 14, wherein the diode is a Schottky diode.

16. The circuit according to claim 14, wherein at least one of the set of n driver circuits comprises a level shifter.

17. The circuit according to claim 14, wherein the set of n-1 switches comprises a p-type field-effect transistor.

18. The circuit according to claim 14, wherein the power switch comprises an N-type field-effect transistor.

19. The circuit according to claim 14, further comprising an inductor connected between the output capacitor and the node.

20. The circuit according to claim 14, further comprising a resistor connected in parallel to at least one of the one or more fly capacitors.

21. The circuit according to claim 14, wherein at least one switchable current source comprises a current source and a switch connected in series.

22. The circuit according to claim 14, wherein at least one switchable current source comprises a resistor and a switch connected in series.

23. (a) An M-level power converter cell having a set of n power switches connected in series and configured to connect between an input voltage and a reference potential, wherein each power switch has a control gate, and M≧3 and n≧4, (b) An output capacitor connected to the node between adjacent pairs of the set of n power switches and the reference potential, (c) One or more fly capacitors connected to the set of n power switches, each having an upper plate and a lower plate, (d) A set of n driver circuits, each connected to the control gate of a related power switch among the set of n power switches, (e) A set of n boot capacitors, each having an upper plate and a lower plate, each connected to a related driver circuit among the set of n driver circuits, (f) A set of n-1 startup charger circuits, each of which is connected in parallel to a related boot capacitor from the set of n boot capacitors, connected to a supply voltage, and configured to provide charge to the related boot capacitor from the set of n boot capacitors in the first stage of startup operation, (g) A diode ladder connected to a supply voltage and comprising a set of n-1 diodes, wherein each diode is connected between the upper plate of a related boot capacitor of the set of n boot capacitors and the upper plate of an adjacent boot capacitor of the set of n boot capacitors, and is configured to provide charge to the related boot capacitor of the set of n boot capacitors during a second stage of startup operation and during normal operation of the M-level power converter cell, (h) A set of n-1 switches, each of which is connected in parallel to a related diode in the set of n-1 diodes and configured to selectively bypass the related diode in the set of n-1 diodes, and A circuit equipped with this feature.

24. The circuit according to claim 23, wherein the diode is a Schottky diode.

25. The circuit according to claim 23, wherein at least one of the set of n driver circuits comprises a level shifter.

26. The circuit according to claim 23, wherein the set of n-1 switches comprises a P-type field-effect transistor.

27. The circuit according to claim 23, wherein the power switch comprises an N-type field-effect transistor.

28. The circuit according to claim 23, further comprising an inductor connected between the output capacitor and the node.

29. The circuit according to claim 23, further comprising a resistor connected in parallel to at least one of the one or more fly capacitors.

30. For each of the one or more fly capacitors, (a) A first switchable current source connected to the upper plate of the fly capacitor and configured to be connected to the input voltage, (b) A second switchable current source connected to the lower plate of the fly capacitor and configured to be connected to the reference potential, (c) A third switchable current source connected between the upper and lower plates of the fly capacitor and Furthermore, The circuit according to claim 23, wherein the first, second, and third switchable current sources are configured to charge the fly capacitor in a first operating mode and to discharge the fly capacitor in a second operating mode.

31. The circuit according to claim 30, wherein at least one switchable current source comprises a current source and a switch connected in series.

32. The circuit according to claim 30, wherein at least one switchable current source comprises a resistor and a switch connected in series.

33. (a) An M-level power converter cell having a set of n power switches connected in series and configured to connect between an input voltage and a reference potential, wherein each power switch has a control gate, and M≧3 and n≧4, (b) An output capacitor connected to the node between adjacent pairs of the set of n power switches and the reference potential, (c) One or more fly capacitors connected to the set of n power switches, each having an upper plate and a lower plate, (d) A set of n driver circuits, each connected to the control gate of a related power switch among the set of n power switches, (e) A set of n boot capacitors, each having an upper plate and a lower plate, each connected to a related driver circuit among the set of n driver circuits, (f) A set of n-1 startup charger circuits, each of which is connected in parallel to a related boot capacitor from the set of n boot capacitors, connected to a supply voltage, and configured to provide charge to the related boot capacitor from the set of n boot capacitors in the first stage of startup operation, (g) A diode ladder connected to a supply voltage and comprising a set of n-1 diodes, wherein each diode is connected between the upper plate of a related boot capacitor in the set of n boot capacitors and the upper plate of an adjacent boot capacitor in the set of n boot capacitors, and is configured to provide charge to the related boot capacitor in the set of n boot capacitors during a second stage of startup operation and during normal operation of the M-level power converter cell, (h) A set of n-1 switches, each of which is connected in parallel to a related diode in the set of n-1 diodes and configured to selectively bypass the related diode in the set of n-1 diodes, (i) For each of the one or more fly capacitors, (1) A first switchable current source connected to the upper plate of the fly capacitor and configured to be connected to the input voltage, (2) A second switchable current source connected to the lower plate of the fly capacitor and configured to be connected to the reference potential, (3) A third switchable current source connected between the upper and lower plates of the fly capacitor and Equipped with, A circuit in which the first, second, and third switchable current sources are configured to charge the fly capacitor in a first operating mode and to discharge the fly capacitor in a second operating mode.

34. The circuit according to claim 33, wherein the diode is a Schottky diode.

35. The circuit according to claim 33, wherein at least one of the set of n driver circuits comprises a level shifter.

36. The circuit according to claim 33, wherein the set of n-1 switches comprises a P-type field-effect transistor.

37. The circuit according to claim 33, wherein the power switch comprises an N-type field-effect transistor.

38. The circuit according to claim 33, further comprising an inductor connected between the output capacitor and the node.

39. The circuit according to claim 33, further comprising a resistor connected in parallel to at least one of the one or more fly capacitors.

40. The circuit according to claim 33, wherein at least one switchable current source comprises a current source and a switch connected in series.

41. The circuit according to claim 33, wherein at least one switchable current source comprises a resistor and a switch connected in series.

42. A method for charging and discharging the fly capacitor of an M-level power converter cell having a set of n power switches connected in series and configured to connect between an input voltage and a reference potential, wherein M≧3 and n≧4, and the method is (a) Connecting a first switchable current source between the upper plate of the fly capacitor and the input voltage, (b) Connecting a second switchable current source between the lower plate of the fly capacitor and the reference potential, (c) Connecting a third switchable current source between the upper plate and the lower plate of the fly capacitor, (d) The step of charging the fly capacitor in the first operating mode by setting the first and second switchable current sources to a closed conductive state and the third switchable current source to an open non-conductive state, (e) Discharging the fly capacitor in the second operating mode by setting the first and second switchable current sources to an open, non-conducting state and setting the third switchable current source to a closed, conductive state; The method, including the method described above.

43. A method for charging a set of n boot capacitors of an M-level power converter cell having a set of n power switches connected in series and configured to connect between an input voltage and a reference potential, wherein M≧3 and n≧4, (a) A step of connecting a diode ladder to a supply voltage, wherein the diode ladder comprises a set of n-1 diodes, and each diode is connected between the upper plate of a related boot capacitor in the set of n boot capacitors and the upper plate of an adjacent boot capacitor in the set of n boot capacitors, (b) The step of connecting a set of n-1 switches in parallel to the corresponding diodes from the set of n-1 diodes, (c) A step of selectively setting the set of n-1 switches such that one or more of the set of n-1 diodes are bypassed in order to electrically connect the supply voltage and charge at least one of the set of n boot capacitors. The method, including the method described above.

44. A method for charging a set of n boot capacitors of an M-level power converter cell having a set of n power switches connected in series and configured to connect between an input voltage and a reference potential, wherein M≧3 and n≧4, (a) The step of connecting an n-1 set of startup charger circuits in parallel to the corresponding boot capacitors from the set of n boot capacitors, (b) A step of connecting a diode ladder to a supply voltage, wherein the diode ladder comprises a set of n-1 diodes, and each diode is connected between the upper plate of a related boot capacitor in the set of n boot capacitors and the upper plate of an adjacent boot capacitor in the set of n boot capacitors, (c) The step of connecting a set of n-1 switches in parallel to the corresponding diodes from the set of n-1 diodes, (d) A step of charging the corresponding boot capacitor from the set of n boot capacitors through the set of n-1 startup charger circuits, (e) Selectively setting the set of n-1 switches such that it bypasses one or more of the set of n-1 diodes in order to electrically connect the supply voltage and charge at least one of the set of n boot capacitors; The method, including the method described above.

45. A method for charging a set of n boot capacitors and charging / discharging fly capacitors of an M-level power converter cell having a set of n power switches connected in series and configured to connect between an input voltage and a reference potential, wherein M≧3 and n≧4, and the method is (a) The step of connecting an n-1 set of startup charger circuits in parallel to the corresponding boot capacitors among the set of n boot capacitors, (b) A step of connecting a diode ladder to a supply voltage, wherein the diode ladder comprises a set of n-1 diodes, and each diode is connected between the upper plate of a related boot capacitor in the set of n boot capacitors and the upper plate of an adjacent boot capacitor in the set of n boot capacitors, (c) The step of connecting a set of n-1 switches in parallel to the corresponding diodes from the set of n-1 diodes, (d) A step of charging the corresponding boot capacitor from the set of n boot capacitors through the set of n-1 startup charger circuits, (e) Selectively setting the n-1 set of switches such that one or more of the n-1 set of diodes are bypassed in order to electrically connect the supply voltage and charge at least one of the n set of boot capacitors, (f) Connecting a first switchable current source between the upper plate of the fly capacitor and the input voltage, (g) Connecting a second switchable current source between the lower plate of the fly capacitor and the reference potential, (h) Connecting a third switchable current source between the upper and lower plates of the fly capacitor, (i) The step of charging the fly capacitor in the first operating mode by setting the first and second switchable current sources to a closed conductive state and the third switchable current source to an open non-conductive state, (j) Discharging the fly capacitor in the second operating mode by setting the first and second switchable current sources to an open, non-conducting state and setting the third switchable current source to a closed, conductive state. The method, including the method described above.

46. The method according to claim 45, wherein the diode is a Schottky diode.

47. The method according to claim 45, wherein the set of n-1 switches comprises a p-type field-effect transistor.

48. The method according to claim 45, wherein the power switch comprises an N-type field-effect transistor.

49. The method according to claim 45, further comprising the step of connecting a resistor in parallel with the fly capacitor.

50. The method according to claim 45, wherein at least one switchable current source comprises a current source and a switch connected in series.

51. The method according to claim 45, wherein at least one switchable current source comprises a resistor and a switch connected in series.

52. They are connected in series, and the input voltage V ＩＮ It has a set of n power switches configured to be connected between the output voltage V and a reference potential, and the output voltage V ＯＵＴ A method for maintaining charge equilibrium for a fly capacitor of an M-level power converter cell configured to output a certain value, wherein M≧3 and n≧4, and the method is (a) When the fly capacitor is the output voltage V ＯＵＴ A step to determine whether it is providing a charge that contributes to, (b) When the fly capacitor is the output voltage V ＯＵＴ If it does not provide a charge that contributes to the fly capacitor, and the voltage across the fly capacitor is less than the target voltage value of the fly capacitor, then the fly capacitor will be V ＩＮ The step of connecting between the reference potential and the fly capacitor, and if the voltage across the fly capacitor is greater than the target voltage value of the fly capacitor, then connecting the upper plate and lower plate of the fly capacitor to each other. The method, including the method described above.

Images