Semiconductor package model generation system and related methods

Abstract

An implementation of object files for modeling using a 3D modeling module may include: a first object defined as a root object, which corresponds to a first component of a semiconductor package; a second object corresponding to a second component of a semiconductor package that is directly physically coupled to the first component of the semiconductor package, which includes a reference to the root object; and at least a third object corresponding to a third component of a semiconductor package, which includes a reference to the root object, wherein the third component of the semiconductor package is directly coupled to a fourth component of a semiconductor package that is indirectly physically coupled to the second component of the semiconductor package.

Description

Technical Field

[0001] (Cross - Reference to Related Applications) This document claims the benefit of the filing date of U.S. Provisional Patent Application No. 63 / 509,729, titled "MFIT Automated 3D Model Generation of Arbitrary Power Modules" by Neumaier et al., filed on June 22, 2023, the disclosure of which is hereby incorporated by reference in its entirety.

[0002] Aspects of this specification generally relate to systems and methods used in semiconductor package design.

Background Art

[0003] Semiconductor packages have been devised that function to provide an electrical connection between a semiconductor die and a circuit or motherboard to which the semiconductor package is attached. Some semiconductor packages mechanically protect the semiconductor die from shock or vibration. Other semiconductor packages help protect the semiconductor die from electrostatic discharge.

Summary of the Invention

[0004] An implementation of a method for generating object files for modeling using a 3D modeling module may include, using one or more processors, receiving a drawing exchange format file containing multiple objects from a user using a first computer interface, receiving a selection of semiconductor package types from a user, receiving a selection of SPICE models for at least one semiconductor die from a user, receiving the coordinates of the location of at least one semiconductor die, and receiving the coordinates of the location of at least one electrical connector, using a second computer interface. The method may include, using an object file module, determining a root object among multiple objects in the drawing exchange format file, and assigning a relationship between the root object or any one of the multiple objects and at least one semiconductor die. The method may also include, recording a reference object for at least one semiconductor die and one or more characteristics of at least one semiconductor die in the object file, and assigning a relationship between the root object or any one of the multiple objects and at least one electrical connector, using the coordinates of the location of at least one electrical connector. This method may include recording a reference object for at least one electrical connector and one or more characteristics of at least one electrical connector in an object file; assigning a relationship between each object of a plurality of objects to a root object or one of the other objects of the plurality of objects in order to establish a reference object for each object; recording the reference object for each object and one or more characteristics of each object in an object file; and storing the object file.

[0005] The implementation of the method for generating object files for modeling using the 3D modeling module may include one, all, or any of the following:

[0006] At least one electrical connector may be at least one bond wire, at least one clip, or both at least one bond wire and at least one clip.

[0007] This method may include using a second computer interface to receive from the user a selection of one of the registers, gate drivers, capacitors, or any combination thereof; receiving the coordinates of the location of one of the registers, gate drivers, capacitors, or any combination thereof; using the coordinates of the location of one of the registers, gate drivers, capacitors, or any combination thereof to assign a relationship of one of the registers, gate drivers, capacitors, or any combination thereof to the root object or any one of a group of objects; and recording a reference object for one of the registers, gate drivers, capacitors, or any combination thereof, and one or more characteristics of one of the registers, gate drivers, capacitors, or any combination thereof, in an object file.

[0008] The second computer interface includes a canvas portion on which multiple objects from a drawing exchange format file may be displayed, and the user can position at least one semiconductor die and at least one electrical connector at desired positions relative to the multiple objects in order to establish the coordinates of the position of at least one semiconductor die and at least one electrical connector.

[0009] The second computer interface may include a button configured to execute an object file module using the current settings of multiple objects displayed on the canvas, at least one semiconductor die, and at least one electrical connector.

[0010] The second computer interface may include a button configured to send object files to a 3D modeling module for processing.

[0011] An implementation of object files for modeling using a 3D modeling module may include: a first object defined as a root object, which corresponds to a first component of a semiconductor package; a second object corresponding to a second component of a semiconductor package that is directly physically coupled to the first component of the semiconductor package, which includes a reference to the root object; and at least a third object corresponding to a third component of a semiconductor package, which includes a reference to the root object, wherein the third component of the semiconductor package is directly coupled to a fourth component of a semiconductor package that is indirectly physically coupled to the second component of the semiconductor package.

[0012] The implementation of object files for modeling may include one, all, or any of the following:

[0013] The fourth component of the semiconductor package corresponds to a fourth object, which may contain a reference to one of the root object, the second object, or the third object.

[0014] The first object, the second object, and the third object may each contain one or more characteristics of the first component, the second component, and the third component, respectively.

[0015] One or more characteristics may include size, material, or name.

[0016] The second object may include the Z position relative to the root object.

[0017] The third object may include the Z position relative to the root object.

[0018] The fourth object may include the Z position relative to one of the root object, the second object, or the third object.

[0019] The 3D modeling module can be configured to initiate modeling using a root object.

[0020] An implementation of a method for designing a clip may include, using one or more processors, receiving a drawing exchange format file containing multiple objects from a user using a first computer interface, and receiving a selection of a semiconductor package type from a user using a second computer interface. The method may also include receiving a selection of at least one semiconductor die from a user, receiving a selection of a clip from a user, and receiving the coordinates of the position of at least one semiconductor die using a second computer interface. The method may also include receiving the coordinates of the outer boundary of the clip, receiving the thickness of the clip, and receiving the coordinates of at least one fixed portion of the clip within the outer boundary of the clip. The method may also include receiving the coordinates of a first transition region of the clip within the outer boundary of the clip.

[0021] The implementation of the method for designing clips may include one, all, or any of the following:

[0022] Receiving the coordinates of the outer boundary of the clip may further include receiving the distance to the clip reference.

[0023] The method may include receiving the coordinates of holes in the clip within the outer boundary of the clip.

[0024] The method may include receiving the coordinates of a second transition region of the clip within the outer boundary of the clip and defining a flexible region between the first transition region and the second transition region.

[0025] The method may further include receiving a selection of a portion of the first transition region of the clip and, in response thereto, receiving the coordinates of a line where the first transition region does not exist.

[0026] The method may include generating a plurality of objects corresponding to the clip using an object file module and storing the plurality of objects in an object file.

[0027] The above and other aspects, features, and advantages will be apparent to those skilled in the art from the "Detailed Description of the Invention" and the "Drawings" and from the "Claims".

Brief Description of the Drawings

[0028] The implementation forms will be described below in conjunction with the accompanying drawings. In the drawings, like reference numerals indicate like elements. [Figure 1] A perspective view of an implementation form of a semiconductor package before being formed or before being included in a housing. [Figure 2] A side view of the semiconductor package of FIG. 1. [Figure 3] A detailed perspective view of a portion of the semiconductor package of FIG. 1. [Figure 4] An exploded perspective view of the implementation form of the semiconductor package of FIG. 1. [Figure 5] [[ID= (41]]A detailed exploded view of a portion of the semiconductor package of FIG. 1. [Figure 6] A detailed exploded view of a portion of the semiconductor package of FIG. 1. [Figure 7] Figure 1 is an exploded perspective view of a portion of a semiconductor package. [Figure 8] Figure 1 is an exploded side view of a semiconductor package. [Figure 9] This is a diagram of a stack used to model one implementation configuration of a semiconductor package. [Figure 10] This is a diagram of a stack used to model an alternative implementation of a semiconductor package. [Figure 11] This is a diagram illustrating the relationships between six objects with respect to the coordinate axes. [Figure 12] This is a printout of a portion of one implementation of an object file. [Figure 13] This is a diagram of a computer interface with the outer boundary of a clip drawn on top of it. [Figure 14] This is a diagram of the computer interface in Figure 13, showing the range of the clip in Figure 13. [Figure 15] Figure 13 shows a computer interface diagram illustrating the position of the clip's fixing point. [Figure 16] Figure 13 shows a computer interface diagram illustrating the four fixed parts. [Figure 17] Figure 13 shows a computer interface diagram illustrating two holes. [Figure 18] Figure 13 shows a computer interface diagram illustrating the deselection of the transition on two of the fixed edges. [Figure 19] Figure 13 shows a computer interface diagram illustrating the selection of storage devices for the user. [Figure 20] This is a flowchart of the first implementation form for modeling semiconductor packages. [Figure 21] This is a flowchart of the second implementation form for modeling semiconductor packages. [Figure 22] This is a block diagram of the system components for modeling a power electronics module. [Figure 23] This is a diagram showing multiple objects included in a drawing exchange format view as seen using a computer interface. [Figure 24] This is a diagram of a computer interface for receiving and processing drawing interface files. [Figure 25] This is a diagram of a computer interface for laying out package components, processing object files, and generating 3D models. [Modes for carrying out the invention]

[0029] The present disclosure, its embodiments, and implementations are not limited to any specific components, assembly procedures, or method elements disclosed herein. Many additional components, assembly procedures, and / or method elements known in the art, compatible with the intended semiconductor package model generation system, will become apparent for use with any particular implementation from the present disclosure. For example, while a particular implementation is disclosed, such implementation and implementation components may include any shape, size, style, type, model, version, dimensions, concentration, material, quantity, method elements, steps, and others known in the art with respect to such semiconductor package model generation system, and implementation components and methods, as well as with respect to the intended operation and method.

[0030] Referring to Figure 1, a perspective view of one configuration of semiconductor package 2 is shown. This particular configuration shows the structure of semiconductor package 2 before molding with the molding compound while the leads 4 and 6 are exposed, or before the housing is fastened while the leads 4 and 6 are similarly exposed. Figure 2 shows a side view of semiconductor package 2, showing the relative heights of the package components, including the leads 4 and 6, the substrate 8, and the clips 10 and 12. Figures 1 and 2 also show various dies and bond wires that provide electrical connections between the lead and / or clip components.

[0031] Referring to Figure 3, a detailed perspective view of the semiconductor package 2 is shown, showing the semiconductor die 14 bonded / mounted to the substrate 8. In this figure, it can be seen that the leads 4 are attached to the component 16, and then the component 16 is attached to the substrate 8 and bond wires 18. The figure also shows the structure of the clip 12, which has fixed portions 20, 22 attached to the semiconductor die 14 and a portion of the substrate 8, a hole 24 passing through them, and transition portions 26, 28, where the transition portions 26, 28 rise from one height level above the substrate 8 to another height level that forms a bridge between the two semiconductor dies 14.

[0032] Figure 4 shows an exploded view of the semiconductor package 2. Leads 4 and 6 are shown in this figure as separate components, which is an unfolded three-dimensional structure of the figure. In various mounting configurations, leads 4 and 6 may be made from a single lead frame stamped from a single metal sheet. The upward portion of the lead is formed by bending. The lead frame forming the lead can then be soldered / welded / sintered to the substrate 8. Figure 6 shows a detailed exploded view of lead 4. Referring to Figure 6, another detailed view of the exploded view of the semiconductor package 2 provides further details regarding the location of the semiconductor die 14. Figure 7 shows another detailed view of the exploded view of clip 12, showing that clip 12 includes a main flat portion 30, transition portions 26 and 28, additional flat portions 32 and 34 between transition portions 26 and 28, contact portions 36 and 38, and drop portions 40 and 42 that transition between contact portions 36 and 38 and the main flat portion 30. The side view shown in Figure 8 illustrates the relative Z-axis / direction positions of various parts of clips 10, 12 and die 14.

[0033] As the various diagrams of semiconductor package designs in Figures 1 to 8 show, there are multiple parts of the semiconductor package that are not directly physically attached to the semiconductor die or substrate. For example, most of the components of clips 10, 12, including the main planar portion 30, the transition portions 24, 28, and the additional planar portions 32, 34, are not directly physically coupled to the semiconductor die, but are coupled via other parts of the clips, including the drop portions 40, 42. The separation of these parts from the substrate / die means that, as shown in Figure 9, various implementations of modeling modules that consider the semiconductor package structure as a simple stack 44 of components cannot adequately model the structure of the semiconductor package with respect to electrical performance, parasitic performance, and / or thermal performance. The use of a simple stack 44 of layers is effective for substrate / die combinations with electrical connectors in the form of bond wires or single-layer clips, but is not effective when more complex clip structures are employed, or for leads that include two or more components directly coupled to the substrate (such as leads 4, 6).

[0034] The various implementations and methods of the systems disclosed herein employ a dynamic stacking method that specifies relationships in at least Z-distance / position coordinates between each component of a semiconductor package with respect to one other component or to a root / reference layer / component. In various other implementations, X-distance / position and / or Y-distance / position relationships may also be specified. Referring to Figure 10, this method is shown in a figure where layer 0 is defined as the root layer and therefore has no other reference layers. Then, the position of layer 1 is specified with respect to layer 0, and the position of layer 12 is specified with respect to layer 1. However, it is illustrated that layer 37 has the option of being specified with respect to layer 1 or layer 12, depending on whether layer 37 is directly physically connected to either layer 1 or layer 12, or whether it is more convenient to define the position of layer 37 with respect to layer 1 or layer 12. For example, if the component of the semiconductor package forming layer 37 is physically closer to layer 1, the Z-position of layer 37 will have a smaller magnitude value than when the position of layer 37 is defined with respect to layer 12. However, if layer 37 is directly and physically bonded to layer 12, it becomes more convenient to define the Z position of layer 37 relative to layer 12. Each component of a semiconductor package, including each subcomponent of various components, can be identified as a “layer” using this technique and identified in space using its relationship to another nearby or convenient component, so substrate components, dies, resistors, capacitors, controllers, and other electrical connectors, such as, in non-limiting examples, bond wires, wire bonds, pins, leads, clips, intermediate circuit boards, intermediate leads, or any other electrical connection structures, can be represented in this manner.

[0035] By using this technique to define the relationships between different components of a semiconductor package down to a single root layer / component, the object file module in the system has the ability to collect and store information about all components of the semiconductor package in the form of objects corresponding to each component. In various implementations, an object includes identification information of its reference object (reference layer) along with one or more properties of the component. The one or more properties may, in non-limiting examples, include the component type, one or more coordinates of the component in the coordinate system covering the semiconductor package, the material type, the size of the component, the name of the component, or any other desired properties of a particular component of the semiconductor package. Once the reference object and one or more properties are identified, the 3D modeling module can begin the process of constructing one or more models of the semiconductor package, as described below.

[0036] Referring to Figure 11, a diagram is shown in which the components of a semiconductor package are represented as objects. Here, the root object 46 is identified. The root object 46 is the lowest object in the Z direction along the axis on the left, but this is for convenience and does not necessarily apply to all implementation forms, as any object in the diagram in Figure 11 can be declared as the root object (since the Z coordinate can be either positive or negative). Even if object 3 (50) corresponds to a component of the semiconductor package that is not directly physically coupled to the component that the root object 46 corresponds to, object 1 (48) is specified for the root object in its X, Y, and Z coordinate values, just like object 3. Object 4 (52) is specified by referring to object 1 (48), and even if the corresponding component of the semiconductor package is not directly physically coupled to object 3 (50), object 5 (54) is specified by referring to object 3 (50). Finally, object 2 (56) is specified for object 3 (50). This flexibility in specifying a reference object as the root object or as any other object within a set of objects corresponding to components of a semiconductor package provides significant flexibility for components connected at a distance of several components from the root object's components, or at a certain distance. Furthermore, this data structure allows 3D modeling modules to accurately determine the physical connections and relationships between different components when using this object representation as input.

[0037] Ultimately, this object-oriented / driven approach to representing each component of a semiconductor package relative to a root object is well suited to developing data contained in object files formed by object file modules and then used by 3D modeling modules to perform modeling. Referring to Figure 12, a portion of an implementation of an object file 58 in a human-readable format is shown, displaying data associated with two objects 60 and 62. The format of this particular object file implementation is JavaScript Object Notation (JSON), but in various implementations and system implementations, other formats such as plain text, eXtensible Markup Language (XML), and hypertext markup language (HTML) may be used as non-limiting examples, in any other format that can store data in a database rather than a flat file, or in a retrievable format. Object 60 is the root object because the key "Reference" is set to the value null, indicating that the reference object value is stored here. Object 60 also stores properties including its height, the presence of cutouts, material type, its name, type, shape type (Polygon in this case), and the X / Y coordinate values ​​of the polygon's corners. It is also indicated that object 60 includes the distance from the reference object, which is 0.0 in this case because object 60 is the root object.

[0038] Object 62 has similar characteristics to Object 60, except that its reference object is indicated as Object 60, since the string name value specified in the Reference key is the name of Object 60, "OBJECT_SiC_DBC_BOTTOM_COPPER_SiC_1". The distance to the reference object is indicated as 0.0, which means that a given Object 62 corresponds to the ceramic layer in a double-bonded ceramic substrate, where Object 60 is the first layer of copper. This same format, including the reference object, the distance to the reference object in one, all, or any of the X, Y, or Z coordinates, and one or more characteristics of the object, can be included in an object file. An implementation of the object file module functions to collect object files, organize them into an object file, and store the corresponding object files in a machine-readable electronic storage device combined with the object file module. One or more processors can be used to operate the machine-readable instructions that direct the operation of the object file module in various system implementations.

[0039] Once the object files are obtained, the implementation form of the system and the implementation form of the method are ready to begin the process of developing various modules, including a 3D model of the semiconductor package, and determining various electrical and thermal parameters of the semiconductor package. Referring to Figure 20, a flowchart of one implementation form of the method for generating a model of a semiconductor package 64 is shown. The output of this method involves the creation of one or more SPICE models for the semiconductor package, along with various models of the thermal and electrical performance of the semiconductor package, including the semiconductor die contained in the package. The goal of this prototype is to create sufficiently accurate electrical and / or thermal models so that circuit designers can reliably incorporate the resulting semiconductor package into the design of the circuit board / motherboard, and so that failures are not found when the device / system is finally built due to inaccurate / suboptimal performance of the semiconductor package. Further information regarding the package modeling activities in the dotted modules 66, 68, 70, and 72 can be found in the following references: U.S. Patent No. 11,481,532 ('532') by Victory et al., entitled "Systems and methods for designing a discrete device product" (issued October 25, 2022) (U.S. Patent Application No. 17 / 076,039, filed October 21, 2020); U.S. Patent No. 11,481,533 ('533') by Victory et al., entitled "Systems and methods for designing a discrete device product" (issued October 25, 2022) (U.S. Patent Application No. 17 / 076,072, filed October 21, 2020); and "Automated power discrete and module model generation for system level These can be found in U.S. Patent Application No. 18 / 058,382 (Application No. 382) (filed November 23, 2022) by Xiao et al., entitled “simulators”, each of which is incorporated herein by reference in its entirety.

[0040] In this specification, the functionality of the object file module is represented by the dotted box 74, and the functionality of the 3D modeling module is represented by the dotted box 76. In the implementation of the method shown in the process flow of the flowchart in Figure 20, the process begins by sending a drawing interchange format (DXF) file of a specific semiconductor package design to a specific system user. This specific system user has experience with manual data processing and formatting operations using the system and has system access, and inputs appropriate information about the semiconductor from the DXF file to make it available within the system, allowing other system users to select it as a base package design for further modeling (boxes 78, 80, 82). Because this is a manual process with quality assurance (QA), the process of inputting and preparing the semiconductor package design from the DXF file may require 1-2 weeks of manual work. Once the semiconductor package design is incorporated into the system, the system user can select it (box 84), specify a specific semiconductor die, and import the associated modeled die SPICE model and Graphic Design System (GDS) model (box 86). In this system, a computer interface allows the user to lay out various electrical connectors (bond wires, clips, pins, etc.) on a semiconductor package design, as well as position a specific semiconductor die (box 88), assign material properties (box 90), and assign one or more ports to the design (box 92). At this point, the object file module acquires coordinate information for the various objects in the design and is ready to generate an object file, which in this implementation is formatted as a JSON file (box 74).Next, the object file is transferred to the 3D modeling module, which retrieves the object file, begins analyzing it, and uses the object file to construct a 3D model of the semiconductor package design, including all the package components (semiconductor die, wire bond, clip, pin, and substrate). The 3D model is then used in subsequent thermal development, electrical development, and model development operations shown in Figure 20 (Box 76).

[0041] However, this manual data entry process is time-consuming and, despite using manual data entry, cannot encompass semiconductor package designs such as those shown in Figures 1-8. This is because the object file module in this implementation only constructs and references objects within the semiconductor package according to the layer model in Figure 9. Consequently, the implementation 64 of the method shown in Figure 20, even with manual data entry, cannot construct an object file that can be used to build an accurate 3D model for use in subsequent modeling operations.

[0042] Referring to Figure 21, a flowchart of another implementation of the method for generating a model of a semiconductor package 94 is shown. In contrast to the implementation 64 of the method shown in Figure 20, this method utilizes an automated DXF file processing operation, which enables a typical system user to import a DXF file and perform the necessary setup activities so that the associated semiconductor package design can be made available in the system (box 96). In this process, various material properties of the semiconductor package components can be assigned, so that the user does not need to input these when designing a particular semiconductor package based on the semiconductor package design (see the flows in boxes 98, 100, 102, and 104, which are similar to the corresponding implementation of the method shown in the flow in Figure 20). In this implementation of the method, the resulting multiple objects associated with the components of the semiconductor package are linked using the layer / object reference method of Figures 10 and 11, which, as mentioned above, makes it possible to accurately represent the physical relationships of the semiconductor package using this flexible reference object method based on the root object. In this implementation, the object file module is configured to utilize root and reference objects assigned to each of the multiple objects corresponding to the multiple components within the designed semiconductor package in order to create the corresponding object file, in this case a JSON file (box 106). The resulting object file is received by the 3D modeling module and used to construct an accurate 3D model containing the physical relationships of all the components of the semiconductor package (box 108). By using root objects and flexible referencing techniques, it is also easy to import and create new packages into the system without requiring manual processing by an experienced user, so that the implementation 94 of the method can create semiconductor package models, as shown in Figures 1 to 8, in a relatively short time.Next, the resulting 3D model is used in the implementation of this method in the same way as described for the similar method elements shown in the implementation of the method in Figure 20.

[0043] Referring to Figure 22, a diagram of the self-service process shown in boxes 96-106 is presented. Here, the semiconductor package (here, a power electronics module 110) can be described as containing both static components 112 and flexible components 114. These components, considered static, are components included in the DXF file associated with the package design, as they are the result of a separate design activity leading to the creation of the DXF file itself. These static components are not designed so that the implementation form of the method adjusts their position, and are therefore processed in the system as multiple objects, each corresponding to a component of the semiconductor package that has already defined physical relationships with one or more other components of the semiconductor package. These multiple objects and associated relationships (static components / objects) are collected / formed from the processing of the DXF file.

[0044] Flexible components 114 include those (such as clips, dies, bond wires, etc. 116) that have the ability to be selected and placed by the user using the implementation forms and methods of the system disclosed herein, in order to accommodate a desired degree of performance or to adapt the package design to specific customer specifications / configuration / performance requirements. As illustrated, the system creates a computer interface (web interface 118) in which a first computer interface enables the import and processing of DXF files, and a second computer interface enables the user to add / specify the location of flexible components. After processing the DXF files and placing the flexible components, the object file module 120 processes the objects and assigns / uses their reference objects, including the root object, to form an object file (in this case, generated in JSON format) 122.

[0045] Referring to Figure 23, a two-dimensional graphical representation 124 of the semiconductor package design contained in the DXF file corresponding to the semiconductor package designs in Figures 1 to 8 is shown. Here, the pattern of the upper layer 126 of the dual-bonded copper (DBC) substrate is shown along with the position and dimensions of various components of leads 4, 6 oriented horizontally / parallel to the substrate. All of these components need to be associated with corresponding objects so that they can be assembled into a three-dimensional model of the package for subsequent modeling.

[0046] Figure 24 shows an implementation of a first computer interface 128 used by the user to import DXF files and provide necessary processing feedback, thereby enabling multiple objects corresponding to the components of the semiconductor package contained in the DXF file to be appropriately created and referenced using the root object and one another. This first computer interface also allows users to perform tasks that previously had to be done manually by experienced users, such as creating and importing package designs into the system, via automatic selection using various selectors and drop-down menus, and thus package designs are available to all users of the system. As shown, a wide variety of options, material types, device specifications, and other parameters can be adjusted / set / assigned by the user using the first computer interface 128.

[0047] Following the uploading and processing of the DXF file using the first computer interface 128, the system generates a second computer interface 130, as shown in Figure 25. As illustrated, this second computer interface provides the user with a visual two-dimensional canvas on which objects from the DXF file are drawn, thereby allowing the user to select and place various flexible objects such as semiconductor dies, gate drivers, registers, capacitors, bond wires, clips, or any other desired package components that the system allows the user to include. Once each flexible component is selected and placed, its coordinates (X, Y, Z) and associated properties are received by the system and included in the associated object of that component, which includes assigning relationships between the component and the root object or another object among the multiple objects of the semiconductor package. Once the placement of the flexible components is complete, a button (here, the "Save Floorplan" button) is used to start generating objects, recording coordinates, assigning relationships, and recording one or more properties of the objects in the package into memory. Another button (here, the "Send to ONBDS" button) is used to send the object and associated data to the object file module, which then retrieves the multiple objects, assigns data to each object, and formats the objects into any desired object file format as disclosed herein (here, a JSON file). Once this process is complete, the second computer interface also includes a button (here, "Submit Ansys 3D Model"), which initiates the processing of the object file with a 3D model, forming a 3D model for use by other system components and completing the modeling of the designed semiconductor package.

[0048] As illustrated, the second computer interface also includes various buttons / selectors that allow the user to add semiconductor dies, rotate semiconductor dies, add gate drivers or other operating components, add registers, add capacitors, and enter a wiring mode where bond wires and clips can be placed. In the second computer interface, a package design is selected and information from objects created by processing a DXF file is populated onto the canvas. Also, once a semiconductor die is selected and placed, the system also selects a die SPICE model in the system corresponding to that die and associates that model with a semiconductor package created for later model processing.

[0049] The aforementioned second computer interface is used in various system implementations and method implementations. This second computer interface may also include an optional / interface design that allows the user to design a clip for use with one or more dies / components of a package, which can then be represented as an object in an object file using the reference layer system shown in Figures 10-11. This clip design interface can be accessed by the user by pressing a button (such as "Advanced Clip") on the second computer interface, at which point the canvas enters a mode that presents additional interfaces required by the components to complete the clip design. Referring to Figure 13, an example of a clip design interface 132 is shown, which includes a canvas 134 containing a two-dimensional view of the static and flexible components placed up to this point in the design process. As shown in Figure 13, the user has drawn a box 136 representing the outer boundary of the clip being designed. The user then sets a pixel resolution 138 in micrometers, which allows the system to appropriately calculate the size and coordinate positions of the clip's components during the design process and the object file creation process. The user also uses the Clip Reference dropdown menu 140 to set a reference object for the clip, which is one of the components located below the bounding box that has just been drawn. The user can also set the thickness of the clip using the Thickness dropdown menu 142 within this interface diagram. Next, the user presses the "Next" button, which presents a new interface component to use when designing the rest of the clip.

[0050] Referring to Figure 14, the updated computer interface 132 is shown, along with the color change of the bounding box 136 drawn for the clip. In this implementation, the bounding box 136 changes color to green, indicating that the area of ​​the clip is not in contact with other objects in the package. When the clip is in this state, the "Distance to Clip Reference box" box 144 allows the user to specify the distance between the flexible portion of the clip and the clip reference. Different flexible regions can be set to different distances from the clip reference to help the system capture changes in the shape of the clip perpendicular (Z direction) from the clip reference. Since the flexible portion is represented as a set or section of "pixels" with a previously set pixel resolution, during the clip design process, each pixel can be individually assigned a clip reference distance or state, or it can be assigned as a group of selected pixels. Each pixel can be changed to a fixed state, meaning that the corresponding area of ​​the clip is not fixed to the object below it, or each pixel can be changed to a hole (void) state, meaning that the pixel corresponds to a hole in the clip. Accordingly, the color of each pixel changes to orange in the case of a fixed area and to transparent in the case of a hole. These colors are used in this implementation, but in various implementations, any of the many other color contrast methods may be adopted. Once the fixed / hole area is specified by selecting the appropriate pixel(s) within the flexible area of ​​the clip, the user presses the "Set" button 146 to record the coordinates of these feature areas of the clip in memory.

[0051] Figure 15 shows the computer interface 132 after the fixed area 148 has been selected and then configured using the "Set" button 146. In this implementation, the fixed area 148 is configured to be fixed in direct physical contact with the semiconductor die M1. The fixed area 148 is demarcated by dark lines 150, which are bent / stretched downwards so that the clip material reaches the fixed area 148 that contacts the die M1, indicating that the transition area of ​​the clip lies within these areas. Figure 15 shows that after selecting the area of ​​the clip, when the "Clip State" dropdown menu 152 is set to "Fixed," an additional dropdown menu "Contact" 154 appears, allowing the user to select the component below the clip to which the clip will be fixed. The "Set" button is then pressed to save this configuration assignment of the clip.

[0052] Figure 16 shows the computer interface 132 after the allocation of four fixed regions 148, 156, 158, and 160. In Figure 16, regions 162 and 164 are also assigned a distance from the clip reference that is different from the originally set height of the clip reference, and therefore their color is changed to a different shade of green (different color) than the color of the rest of the flexible portion of the clip. A transition region indicating the transition to these regions of different heights is indicated by a line 163 between these regions 162 and 164. As shown, the height of region 164 is set to 2000 micrometers, which is higher than the original height of 1000 micrometers set for the original flexible portion of the clip. In various implementations, it is possible to hover over these regions of the clip, whose status and height are defined, using the mouse, and a pop-up box / window showing the value of the distance to the clip reference and / or the status is included in the pop-up box / window as assistance to the user.

[0053] Figure 17 shows the computer interface 132 after selecting relevant pixels and setting those pixels to a hole state to form a hole region 166. Referring to Figure 18, the computer interface 132 is shown after selecting lines 168 adjacent to a fixed region 158. In this particular interface design, when lines 168 are selected, they change from solid black lines to a gray state. This has the effect of indicating that there are no longer any transition edges on these lines, and therefore no transition along this edge. Not all edges in a clip need to have a transition, as this ability to eliminate transition edges is provided in various implementations disclosed herein. For example, a clip structure may include downward transitions on two opposite edges, while the other two opposite edges remain unconnected to the bottom surface. This can occur when a cut into the metal made along the unconnected opposite edges enables a downward transition, thereby allowing the clip material to transition downward on two sides while leaving openings on the other two sides.

[0054] Figure 19 shows the computer interface 132 when the clip design process is complete. The user then presses the "Store" button 170, and the system then records the coordinates and attributes of all elements of the designed clip and creates corresponding objects to be included in the object file using the object file module and various methods and system components described herein.

[0055] The various implementations of the systems disclosed herein may utilize various implementations of the method for generating object files for modeling using a 3D modeling module. The method includes using one or more processors to receive a DXF file containing multiple objects from a user using a first computer interface, such as that disclosed herein. The method also includes using a second computer interface to receive a selection of a semiconductor package type from a user and a selection of a SPICE model for at least one semiconductor die. In the various implementations of the method, the SPICE model of the die is already associated with the die and loaded into the system, so the selection of the SPICE model may occur automatically when the user selects a particular semiconductor die type that is already available in the system.

[0056] The method also includes using a second computer interface to receive the coordinates of the location of at least one semiconductor die (when the die is placed on the canvas as a desired location) and to receive the coordinates of the location of at least one electrical connector (when a particular electrical connector is placed on the canvas at a desired location). The method also includes using an object file module to determine one of several root objects in a DXF file and using the coordinates of the location of at least one semiconductor die to assign a relationship between at least one semiconductor die and the root object or any one of the multiple objects. The method includes this element, however, if the semiconductor die is the root object, various implementations of the method instead include assigning relationships between the other objects of the multiple objects to at least one semiconductor die because the semiconductor die is the root object.

[0057] The method also includes using the object file module to record a reference object for at least one semiconductor die and one or more properties of at least one semiconductor die (which may be any of those disclosed herein) in an object file (if the semiconductor die is not the root object). The method also includes using the object file module to assign a relationship between at least one electrical connector and the root object (if at least one electrical connector itself is not the root object) or any one of the multiple objects, using the coordinates of the location of at least one electrical connector. The method also includes using the object file module to record a reference object for at least one electrical connector and one or more properties of at least one electrical connector (which may be any of those disclosed herein) in an object file. The method also includes, for each of the multiple objects, assigning a relationship between each object and the root object or another object of the multiple objects in order to establish a reference object for each object. The method also includes, for each of the multiple objects, recording a reference object for each object and one or more properties of each object in an object file. The method also includes storing the object file in any of the formats disclosed herein for subsequent use by the 3D modeling module.

[0058] The implementations of the various system implementations and methods disclosed herein utilize an implementation of an object file used for modeling by a 3D modeling module. The object file implementation includes a first object (in the form of machine-readable information / machine-readable code / machine-readable instructions) that corresponds to a first component of a semiconductor package, defined as a root object. The first component may be any component of a semiconductor package, including a semiconductor die in various implementations. The object file also includes a second object that corresponds to a second component of a semiconductor package directly physically coupled to the first component of the semiconductor package, and includes a reference to the root object. Furthermore, this second object may correspond to any other component of the semiconductor package that is not the component corresponding to the root object. The object file also includes at least a third object that corresponds to a third component of a semiconductor package, the third object having a reference to the root object, and the third component of the semiconductor package being directly coupled to a fourth component of the semiconductor package that is indirectly physically coupled to a second component of the semiconductor package. Here, the structure of the objects in the object file reflects the structure of the semiconductor package disclosed herein, in which various components are not directly physically coupled to the root object, but are indirectly coupled only through other objects that are ultimately coupled to the root object. The indirect physical coupling of the fourth component prevents the 3D modeling module from accurately modeling the package structure using the layer method shown in Figure 9.

[0059] In various implementations of object files, the fourth component corresponds to the fourth object. This fourth object contains references to the root object, the second object, or the third object. In various implementations, the second object contains the Z position relative to the root object, the third object contains the Z position relative to the root object, and / or the fourth object contains the Z position relative to the root object, the second object, or the third object.

[0060] In another implementation of the method for designing clips, the method includes using one or more processors to receive a DXF file containing multiple objects from a user using a first computer interface. The method also includes using a second computer interface to receive a semiconductor package type, at least one semiconductor die type, and a clip selection from the user. The method also includes using the second computer interface to receive the coordinates of the position of at least one semiconductor die, the coordinates of the outer boundary of the clip, and the thickness of the clip. The method also includes receiving the coordinates of at least one fixed portion of the clip within the outer boundary of the clip, and receiving the coordinates of a first transition region of the clip. As disclosed herein, the coordinates may be received after various pixel regions of the second computer interface have been selected and then set, and then stored using an object file module in an object file associated with the corresponding object.

[0061] In various implementations of this method, the method includes receiving the distance to the clip reference in the outer boundary region. The method may also include receiving the distance to the clip reference for any of the specified regions of the clip that are outside the flexible region within the outer boundary region of the clip. The method may also include receiving the coordinates of one or more holes in the clip. The method may also include receiving a selection of a first transition region of the clip and, accordingly, receiving the coordinates of lines where the first transition no longer exists.

[0062] One or more processors and associated system components used in implementations of the various methods disclosed herein and for operating various modules may be any remote platform(s), computing platform(s), electronic storage device type, processor(s), external resources, computing device, and / or network component disclosed in Patent No. 532, Patent No. 533, and / or Application No. 382, ​​which are incorporated by reference above. Implementations of the object file module and 3D modeling module disclosed herein may be added to the various module types disclosed in Patent No. 532, Patent No. 533, and / or Application No. 382, ​​which are incorporated by reference above. With respect to the 3D modeling module, the 3D modeling module may be any similar module including a 3D simulation module that utilizes any of the various 3D modeling systems / techniques disclosed in Patent No. 532, Patent No. 533, and / or Application No. 382, ​​which are incorporated by reference above.

[0063] Where the above explanation refers to specific implementation forms of semiconductor package model generation systems and implementation components, subcomponents, methods, and submethods, it will be readily apparent that some modifications may be made without deviating from their intended purpose, and that these implementation forms, implementation components, subcomponents, methods, and submethods may be applicable to other semiconductor package model generation systems.

Claims

1. A method for generating object files for modeling using a 3D modeling module, Using one or more processors, Receiving a drawing exchange format file containing multiple objects from a user using a first computer interface (128), Using the second computer interface (130), Receiving the selection of semiconductor package type from the user, The selection of at least one SPICE model for a semiconductor die is received from the user, Receiving the coordinates of the position of at least one semiconductor die, To receive the coordinates of the location of at least one electrical connector, Using the object file module, Determining one root object among the plurality of objects in the drawing exchange format file, Using the coordinates of the position of the at least one semiconductor die, assign a relationship between the at least one semiconductor die and the root object or any one of the multiple objects, Recording a reference object for the at least one semiconductor die and one or more characteristics of the at least one semiconductor die in an object file, Using the coordinates of the position of the at least one electrical connector, assign a relationship between the at least one electrical connector and the root object or any one of the multiple objects, Recording a reference object for the at least one electrical connector and one or more characteristics of the at least one electrical connector in the object file, For each of the aforementioned multiple objects, In order to establish a reference object for each object, the relationship of each object to the root object or one of the other objects among the multiple objects is assigned, Record the reference object for each object and one or more characteristics of each object in the object file, The object file mentioned above is stored, Methods that include...

2. The method according to claim 1, wherein the at least one electrical connector is one of at least one bond wire, at least one clip, or both at least one bond wire and at least one clip.

3. Using the second computer interface (130), receive from the user a selection of one of the following: a register, a gate driver, a capacitor, or any combination thereof. Receiving the coordinates of one of the locations of a register, gate driver, capacitor, or any combination thereof, Assigning one relationship between a register, gate driver, capacitor, or any combination thereof to the root object or any one of the multiple objects using the coordinates of one of the positions of a register, gate driver, capacitor, or any combination thereof, Recording the reference object for one of the registers, gate drivers, capacitors, or any combination thereof, and one or more characteristics of the register, gate driver, capacitor, or any combination thereof, in the object file, The method according to claim 1, further comprising:

4. The method according to claim 1, wherein the second computer interface (130) includes a canvas portion on which the plurality of objects from the drawing exchange format file are displayed, and the user positions the at least one semiconductor die and the at least one electrical connector at desired positions relative to the plurality of objects in order to establish the coordinates of the position of the at least one semiconductor die and the coordinates of the at least one electrical connector.

5. The method according to claim 1, wherein the second computer interface (130) includes a button configured to execute the object file module using the current settings of the plurality of objects displayed on the canvas portion, the at least one semiconductor die, and the at least one electrical connector.

6. The method according to claim 1, wherein the second computer interface (130) includes a button configured to send the object file to the 3D modeling module for processing.

7. An object file for modeling using a 3D modeling module, A first object defined as the root object, which corresponds to a first component of the semiconductor package, A second object corresponding to a second component of the semiconductor package which is directly physically coupled to the first component of the semiconductor package, the second object including a reference to the root object, At least a third object corresponding to a third component of the semiconductor package, which includes a reference to the root object, wherein the third component of the semiconductor package is directly coupled to a fourth component of the semiconductor package that is indirectly physically coupled to the second component of the semiconductor package, An object file containing [this].

8. The object file according to claim 7, wherein the fourth component of the semiconductor package corresponds to a fourth object, the fourth object includes a reference to one of the root object, the second object, or the third object.

9. The object file according to claim 7, wherein the first object, the second object, and the third object each include one or more characteristics of the first component, the second component, and the third component, respectively.

10. The object file according to claim 9, wherein one or more of the characteristics include one of size, material, or name.

11. The object file according to claim 7, wherein the second object includes the Z position relative to the root object.

12. The object file according to claim 7, wherein the third object includes the Z position relative to the root object.

13. The object file according to claim 8, wherein the fourth object includes a Z position relative to one of the root object, the second object, or the third object.

14. The object file according to claim 7, wherein the 3D modeling module is configured to initiate modeling using the root object.

15. A method for designing a clip, Using one or more processors, Receiving a drawing exchange format file containing multiple objects from a user using a first computer interface (128), Using the second computer interface (130), Receiving the selection of semiconductor package type from the user, Receiving the selection of at least one semiconductor die from the user, Receiving the clip selection from the user, Using the second computer interface (130), Receiving the coordinates of the position of at least one semiconductor die, The coordinates of the outer boundary of the aforementioned clip are received, To receive the thickness of the aforementioned clip, Within the outer boundary of the clip, the coordinates of at least one fixed portion of the clip are received. Within the outer boundary of the clip, the coordinates of the first transition region of the clip are received. Methods that include...

16. The method of claim 15, wherein receiving the coordinates of the outer boundary of the clip further comprises receiving the distance to the clip reference.

17. The method of claim 15, further comprising receiving the coordinates of a hole in the clip within the outer boundary of the clip.

18. The method according to claim 15, further comprising receiving the coordinates of a second transition region of the clip within the outer boundary of the clip, and defining a flexible region between the first transition region and the second transition region.

19. The method according to claim 15, further comprising receiving a selection of a portion of the first transition region of the clip, and accordingly receiving the coordinates of a line in which the first transition region does not exist.

20. The method according to claim 15, further comprising generating a plurality of objects corresponding to the clip using an object file module, and storing the plurality of objects in an object file.

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