Optimal calibration of gates in quantum computing systems
By optimizing the calibration of quantum gate operations through systematic mapping and infidelity reduction, the method addresses the inefficiencies in quantum computing systems, enhancing the fidelity and reducing resource consumption.
Patent Information
- Application Number
- JP2023565340
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-11-19
- Filing Date
- 2021-12-29
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2041-12-29
AI Technical Summary
Existing quantum computing systems face challenges in calibrating control parameters due to miscalibration of laser pulses, leading to control errors and inefficient resource utilization in quantum gate operations, which is costly and time-consuming.
A method for optimizing quantum gate operations by minimizing infidelity through a systematic approach that includes mapping logical qubits to physical qubits, calibrating two-qubit gates, and applying laser pulses to reduce infidelity, using a classical computer to execute quantum circuits and measure qubit states.
This method reduces the resource requirements and time for calibration, improving the fidelity of quantum computations by optimizing the calibration process and enhancing the performance of quantum gate operations.
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Abstract
Description
[Technical field]
[0001] (Government License Rights) This invention was made with United States Government support under 70NANB16H168 awarded by the National Institute of Standards and Technology. The United States Government has certain rights in this invention.
[0002] The present disclosure relates generally to methods for performing computations in a quantum computing system, and more particularly to methods for optimizing resources for calibrating quantum gate operations to perform a sequence of quantum gate operations in a quantum computing system that includes a group of trapped ions. [Background technology]
[0003] Among the physical systems proposed to build large-scale quantum computers are groups of ions (e.g., charged atoms) trapped and suspended in a vacuum by electromagnetic fields. The ions have internal hyperfine states separated by frequencies of several GHz that can be used as computational states of quantum bits (called "qubit states"). These hyperfine states can be controlled using radiation delivered by a laser, sometimes referred to herein as interaction with a laser beam. Such interaction with a laser can be used to cool the ions to near their motional ground state. Ions can also be optically excited with high precision into one of two hyperfine states (qubit preparation), manipulated between the two hyperfine states by a laser beam (single qubit gating), and the internal hyperfine states detected by fluorescence upon application of a resonant laser beam (qubit readout). Pairs of ions can be controllably entangled by a force that depends on the qubit state using a laser pulse that couples the ions into a collective motional mode of the group of trapped ions that arises from the Coulomb interaction between the ions (two qubit gating). In general, entanglement occurs when pairs or groups of ions (or particles) create, interact, or share spatial proximity in such a way that the quantum state of each ion cannot be described independently from the quantum state of the other ion, even if the ions are far apart.
[0004] Quantum computation can be performed in such quantum computing systems by performing a set of one-qubit gate operations and two-qubit gate operations. Although the methods for applying these fundamental building blocks of quantum computing are well established, there exist control errors in the hardware of the quantum computing system due to miscalibration of control parameters, such as the frequency and amplitude of the laser pulses applied to the qubits. Such control errors are mainly due to the lack of knowledge of how ions interact with each other and the characteristics of the quantum computing hardware in the quantum computing system. Therefore, in order to perform reliable and scalable quantum computing, the control parameters of the quantum computing system need to be corrected (i.e., calibrated). However, calibration typically requires repeated measurements of the qubits to collect statistics of a vast parameter space of the control parameters of the quantum computing system. Therefore, calibration is costly and time-consuming.
[0005] Therefore, a method is needed that minimizes the resources required to calibrate control parameters within tolerances in quantum computing. Summary of the Invention
[0006] An embodiment of the present disclosure provides a method of performing a quantum computing process, the method comprising the steps of: mapping, by a classical computer, a plurality of logical qubits to a plurality of physical qubits of a quantum processor such that a plurality of quantum circuits are executable using the physical qubits of the quantum processor and a total infidelity of the plurality of quantum circuits is minimized, each of the physical qubits comprising a trapped ion and each of the plurality of quantum circuits comprising a plurality of single qubit gates and a plurality of two qubit gates in the plurality of logical qubits; calibrating, by a system controller, two qubit gates in a first plurality of pairs of physical qubits such that infidelity of the two qubit gates in the first plurality of pairs of physical qubits is reduced; and applying laser pulses to the plurality of physical qubits to induce single qubit gate operations and two qubit gate operations in each of the plurality of quantum circuits. Thus, the method includes the steps of executing the plurality of quantum circuits on the quantum processor; measuring, by the system controller, a population of qubit states of the physical qubits in the quantum processor after executing the plurality of quantum circuits on the quantum processor; and outputting, by the classical computer, the measured population of qubit states of the physical qubits as a result of the execution of the plurality of quantum circuits, wherein the results of the execution of the plurality of quantum circuits are configured to be displayed on a user interface, stored in a memory of the classical computer, or transferred to another computing device.
[0007]
[0010] Embodiments of the present disclosure also provide a quantum computing system, comprising: a quantum processor including a plurality of physical qubits, each of the physical qubits comprising a trapped ion; a classical computer configured to map a plurality of logical qubits to the plurality of physical qubits such that a plurality of quantum circuits are executable using the physical qubits and a total infidelity of the plurality of quantum circuits is minimized, each of the plurality of quantum circuits comprising a plurality of single qubit gates and a plurality of two qubit gates within the plurality of logical qubits; and a system controller configured to calibrate the two qubit gates in a first plurality of pairs of physical qubits such that the infidelity of the two qubit gates in the first plurality of pairs of physical qubits is reduced; and a system controller configured to: execute the plurality of quantum circuits on the quantum processor by applying laser pulses to the plurality of physical qubits that cause single-qubit and two-qubit gate operations in each of the quantum circuits; and measure a population of qubit states of the physical qubits in the quantum processor after executing the plurality of quantum circuits on the quantum processor, wherein the classical computer is further configured to output the measured population of qubit states of the physical qubits as a result of the execution of the plurality of quantum circuits, and the results of the execution of the plurality of quantum circuits are configured to be displayed on a user interface, stored in a memory of the classical computer, or transferred to another computing device.
[0008] An embodiment of the present disclosure further provides a quantum computing system comprising a non-volatile memory having a number of instructions stored therein, the number of instructions, when executed by one or more processors, causing the quantum computing system to include the steps of: mapping, by a classical computer, a number of logical qubits to a number of physical qubits of a quantum processor such that a number of quantum circuits are executable using the physical qubits of the quantum processor, minimizing a total infidelity of the number of quantum circuits, each of the physical qubits comprising a trapped ion and each of the number of quantum circuits comprising a number of single qubit gates and a number of two qubit gates within the number of logical qubits; calibrating, by a system controller, two qubit gates in a first plurality of pairs of physical qubits such that infidelity of the two qubit gates in the first plurality of pairs of physical qubits is reduced; and calibrating, by a system controller, two qubit gates in a first plurality of pairs of physical qubits such that infidelity of the two qubit gates in the first plurality of pairs of physical qubits is reduced. executing the plurality of quantum circuits on the quantum processor by applying laser pulses to the plurality of physical qubits that cause single-qubit and two-qubit gate operations in each of the paths; measuring, by the system controller, a population of qubit states of the physical qubits in the quantum processor after executing the plurality of quantum circuits on the quantum processor; and outputting, by the classical computer, the measured population of qubit states of the physical qubits as a result of the execution of the plurality of quantum circuits, wherein the results of the execution of the plurality of quantum circuits are configured to be displayed on a user interface, stored in a memory of the classical computer, or transferred to another computing device. [Brief description of the drawings]
[0009] So that the above features of the present disclosure can be understood in detail, a more particular description of the present disclosure briefly outlined above can be described by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings illustrate only typical embodiments of the present disclosure and should not be considered as limiting its scope, since the present disclosure may admit of other equally effective embodiments.
[0010] [Figure 1] FIG. 1 is a schematic partial view of a trapped ion quantum computer according to one embodiment. [Diagram 2] 1 shows a schematic diagram of an ion trap for confining ions in groups according to one embodiment. [Diagram 3] 4 shows a schematic energy diagram of each ion in a group of trapped ions according to one embodiment. [Figure 4] 1 shows the qubit states of the ions represented as points on the surface of the Bloch sphere. [Figure 5A] Schematic collective transverse motion mode structure of a group of five trapped ions is shown. [Figure 5B] Schematic collective transverse motion mode structure of a group of five trapped ions is shown. [Figure 5C] Schematic collective transverse motion mode structure of a group of five trapped ions is shown. [Figure 6A] 1 shows a schematic diagram of the motional sideband spectrum of each ion according to one embodiment. [Figure 6B] 1 shows a schematic diagram of the mode of motion of each ion according to one embodiment. [Figure 7] FIG. 2 illustrates an example of pairwise maximum common edge subgraphs (MCEs) according to one embodiment. [Figure 8] 1 shows a flowchart illustrating a method for computing a most compact cumulative supergraph (MCCS) by an approximate MCCS algorithm according to one embodiment. [Figure 9]9 shows a flowchart illustrating a method 900 for computing a most compact cumulative supergraph (MCCS) via a genetic algorithm according to one embodiment. [Figure 10A] 1 illustrates exemplary simulation results for the average fidelity of an input quantum circuit, according to one embodiment. [Figure 10B] 1 illustrates exemplary simulation results of reduced calibration budget requirements according to one embodiment. [Figure 11A] 1 illustrates exemplary simulation results for the average fidelity of an input quantum circuit, according to one embodiment. [Figure 11B] 1 illustrates exemplary simulation results of reduced calibration budget requirements according to one embodiment. [Figure 12A] 13 illustrates exemplary simulation results of the number of calls to a search function according to one embodiment. [Figure 12B] 1 illustrates exemplary simulation results of reduced calibration budget requirements according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] For ease of understanding, the same reference numbers are used, where possible, to designate identical elements common to the figures. The figures and the following description use a Cartesian coordinate system including an X-axis, a Y-axis, and a Z-axis. Directions represented by arrows in the figures are assumed to be positive for convenience. It is believed that elements disclosed in some embodiments may be beneficially utilized in other implementations without specific specification.
[0012] (Detailed Description) The embodiments described herein relate generally to methods of performing computations in a quantum computing system, and more particularly to a method of optimizing resources required to perform a sequence of quantum gate operations in a quantum computing system that includes a group of trapped ions. The method may include a process of calibrating aspects of quantum gate operations used in a computation process performed by the quantum computing system.
[0013] An embodiment of the present disclosure includes a quantum computing system that can perform a quantum computing process by using a classical computer, a system controller, and a quantum processor. The classical computer performs supporting tasks including selecting a quantum algorithm to use, computing a quantum circuit to execute the quantum algorithm, and outputting the results of the execution of the quantum circuit using a user interface. A software program for performing the tasks is stored in a non-volatile memory in the classical computer. The quantum processor includes a trapped ion coupled with various hardware, including a laser for manipulating the internal hyperfine state (qubit state) of the trapped ion and a photomultiplier tube (PMT) for reading out the internal hyperfine state (qubit state) of the trapped ion. The system controller receives instructions from the classical computer for controlling the quantum processor, controls various hardware associated with controlling all aspects used to execute the instructions for controlling the quantum processor, and transmits the readout of the quantum processor, and thus the output of the readout results, to the classical computer. In some embodiments, the classical computer utilizes the calculation results based on the output of the readout results to form a result set, which is then provided to a user in the form of results displayed on a user interface, stored in memory, and / or transferred to another computing device to solve a technical problem.
[0014] I. General Hardware Configuration 1 is a partial diagram of a trapped ion quantum computing system 100 according to one embodiment. The trapped ion quantum computing system 100 includes a classical (digital) computer 101, a system controller 104, and a quantum processor that is a group 106 of trapped ions (i.e., five are shown) extending along the Z axis. Each ion in the group 106 of trapped ions is an ion having a nuclear spin I and an electron spin s such that the difference between the nuclear spin I and the electron spin s is zero, e.g., a positive ytterbium ion 171 Yb +, positive barium ions 133 Ba + , positive cadmium ions 111 CD + or 113 CD + all of which have nuclear spin I=1 / 2 and 2 S 1 / 2 In some embodiments, all ions in the group of trapped ions 106 are of the same species and isotope (e.g., 171 Yb + In some other embodiments, the group of trapped ions 106 includes one or more species or isotopes (e.g., some ions are 171 Yb + and some other ions 133 Ba + In yet further embodiments, the group of trapped ions 106 may include various isotopes of the same species (e.g., different isotopes of Yb, different isotopes of Ba). Ions within the group of trapped ions 106 are individually processed with separate laser beams. The classical computer 102 includes a central processing unit (CPU), memory, and support circuits (or I / O). The memory is connected to the CPU and may be one or more of readily available memory, either locally or remotely, such as read-only memory (ROM), random access memory (RAM), floppy disk, hard disk, or any other form of digital storage. Software instructions, algorithms, and data may be coded and stored in the memory to instruct the CPU. Support circuits (not shown) are also connected to the CPU for supporting the processor in a conventional manner. The support circuits may include conventional caches, power supplies, clock circuits, input / output circuits, subsystems, and the like.
[0015] An imaging objective 108, such as a 0.37 numerical aperture (NA) objective, collects fluorescence from the ions along the Y-axis and maps each ion to a multichannel photomultiplier tube (PMT) 106 for measuring the individual ions. A non-co-propagating Raman laser beam from a laser 112 is provided along the X-axis to perform operations on the ions. A diffractive beam splitter 114 creates an array of static Raman beams 112 that are individually switched using a multichannel acousto-optic modulator (AOM) 118 and configured to selectively act on individual ions. A global Raman laser beam 120 illuminates an ion at a time. In some embodiments, each of the individual Raman laser beams (not shown) illuminates an individual ion. A system controller (also referred to as an "RF controller") 104 controls the AOM 118 and thus the laser pulses applied to the trapped ions in the group of trapped ions 106. The system controller 104 includes a central processing unit (CPU) 122, a read only memory (ROM) 124, a random access memory (RAM) 126, a storage unit 128, etc. The CPU 124 is the processor of the RF controller 104. The ROM 124 stores various programs, and the RAM 124 is a working memory for various programs and data. The storage unit 128 includes a non-volatile memory such as a hard disk drive (HDD) or a flash memory, and stores various programs even when the power is turned off. The CPU 122, the ROM 124, the RAM 126, and the storage unit 128 are interconnected via a bus 130. The system controller 104 executes a control program that is stored in the ROM 124 or the storage unit 128 and uses the RAM 126 as a working area. The control program includes software applications including program codes that can be executed by the processor to perform various functions related to receiving and analyzing data, and to control any and all aspects of the methods and hardware used to create the ion trap quantum computer system 100 described herein.
[0016] FIG. 2 shows a schematic diagram of an ion trap 200 (also called a Paul trap) that confines ions in groups 106 according to one embodiment. The confinement potential is affected by both static (DC) and radio frequency (RF) voltages. The static (DC) voltage V S is applied to end cap electrodes 210 and 212 to confine ions along the Z-axis (also called the "axial", "longitudinal" or "first direction"). The ions in group 106 are approximately evenly distributed in the axial direction due to Coulomb interactions between the ions. In some embodiments, ion trap 200 includes four hyperbolic shaped electrodes 202, 204, 206, and 208 that extend along the Z-axis.
[0017] During operation, (amplitude V RF A sinusoidal voltage V1 having a phase shift of 180° (and amplitude V RF / 2) is a sinusoidal voltage V2 having a driving frequency ω RF A quadrupole potential is applied to another pair of opposing electrodes 206, 208 at 100 .ANG. to generate a quadrupole potential. In some embodiments, a sinusoidal voltage is applied only to one pair of opposing electrodes (e.g., 202, 204), and the other pair of opposing electrodes 206, 208 is grounded. The quadrupole potential generates an effective confinement force in the XY plane perpendicular to the Z axis (also called the "radial", "lateral" or "second direction") for each of the trapped ions, the confinement force being proportional to the distance from the saddle point (i.e., the location in the axial (Z) direction) where the RF field vanishes. The radial (i.e., in the XY plane) motion of each ion is approximated as a harmonic oscillation (called secular motion) with a restoring force toward the radial saddle point, each with a spring constant k, as described in more detail below. x and k yIn some embodiments, the radial spring constants are modeled as equal when the quadrupole potential is radially symmetric. However, if undesirable, the radial ion motion may be distorted due to some asymmetry in the physical trapping configuration, small DC patch potentials due to non-uniformities on the surface of the electrodes, etc. These and other external sources of distortion may cause the ion to de-center from the saddle point.
[0018] 3 illustrates a schematic energy diagram 300 of each ion in the group of trapped ions 106, according to one embodiment. Each ion in the group of trapped ions 106 is an ion with a nuclear spin I and an electron spin s, such that the difference between the nuclear spin I and the electron spin s is zero. In one example, each ion has a nuclear spin I=1 / 2 and 2 S 1 / 2 A positive ytterbium ion with a hyperfine state (i.e., two electronic states) 171 Yb + ω 01 In another example, each ion has an energy split corresponding to a frequency difference (called the "carrier frequency") of 12.642821 GHz. 133 Ba + , positive cadmium ions 111 CD + or 113 CD + all of which have nuclear spin I=1 / 2 and 2 S 1 / 2 The qubit is formed of two hyperfine states, denoted |0> and |1>, where the hyperfine state (i.e. 2 S 1 / 2 The lower energy state of the hyperfine state is chosen to represent |0>. In the following, the terms "hyperfine state", "internal hyperfine state" and "qubit" may be used interchangeably to represent |0> and |1>. Each ion is cooled by known laser cooling methods such as Doppler cooling or resolved sideband cooling without phonon excitation (i.e., n ph =0) and the ground state of motion of any motion mode m ism (i.e., the kinetic energy of the ion may be reduced) to near , and the qubit state can then be prepared by optical pumping in the hyperfine ground state │0〉, where │0〉 denotes the individual qubit state of the trapped ion and │0〉 with the subscript m. m represents the motional ground state of motional mode m of the group 106 of trapped ions.
[0019] The individual qubit states of each trapped ion can be, for example, excited 2 P 1 / 2 The laser beam from the laser can be operated through a Raman level (represented by |e>) by a mode-locked laser at 355 nanometers (nm). As shown in Figure 3, the laser beam from the laser is split into a pair of non-copropagating laser beams (a first laser beam with frequency ω1 and a second laser beam with frequency ω2) in a Raman configuration, with a transition frequency ω between |0> and |e> as explained in Figure 3. 0e With respect to the one-photon transition detuning frequency Δ=ω1-ω 0e The two-photon transition detuning frequency δ involves adjusting the amount of energy provided to the trapped ion by the first and second laser beams, which, when used in combination, move the trapped ion between hyperfine states |0> and |1>. The one-photon transition detuning frequency Δ can be expressed as the two-photon transition detuning frequency (also simply called the "detuning frequency") δ=ω1-ω2-ω 01 (hereafter denoted as ±μ, where μ is a positive value), the single-photon Rabi frequency Ω at which a Rabi flop occurs between states |0> and |e>, and between states |1> and |e>, respectively. 0e (t) and Ω 1e (t) (which is time-dependent and determined by the amplitudes and phases of the first and second laser beams), the spontaneous emission rate from the excited state |e>, the Rabi flop between the two hyperfine states │0> and │1> (called a "carrier transition"), is induced at the two-photon Rabi frequency Ω(t) (also called the "Rabi rate"). The two-photon Rabi frequency Ω(t) is given by Ω 0e Ω 1e / 2Δ, where Ω 0e and Omega 1e are the single-photon Rabi frequencies of the first and second laser beams, respectively. Hereinafter, this set of non-copropagating laser beams in a Raman configuration for manipulating the internal hyperfine state (qubit state) of a qubit may be referred to as a "composite pulse" or simply a "pulse", and the resulting time-dependent pattern of two-photon Rabi frequencies Ω(t) may be referred to as the "amplitude" of the pulse or simply a "pulse", as shown and further described below. Detuning frequency δ=ω1-ω2-ω 01 may be referred to as the detuning frequency of the composite pulse or the detuning frequency of the pulse. The amplitude of the two-photon Rabi frequency Ω(t) is determined by the amplitudes of the first and second laser beams and may be referred to as the “amplitude” of the composite pulse.
[0020] It should be noted that the specific atomic species used in the description provided herein is merely one example of an atomic species that has a stable and well-defined two-level energy structure and an optically accessible excited state when ionized, and is not intended to limit the possible configurations, specifications, etc. of the trapped ion quantum computer of the present disclosure. For example, other ion species include alkaline earth metal ions (Be + , Ca + , Sr + , Mg + , and Ba + ) or transition metal ions (Zn + , Hg + , Cd + ).
[0021] FIG. 4 is provided to help visualize the qubit state of an ion, represented as a point on the surface of a Bloch sphere 400 with azimuthal angle φ and polar angle θ. Application of a composite pulse as described above results in a Rabi flop between qubit states |0> (represented as the north pole of the Bloch sphere) and |1> (represented as the south pole of the Bloch sphere). Adjusting the duration and amplitude of the composite pulse flips the qubit state from |0> to |1> (i.e., from the north pole to the south pole of the Bloch sphere) or flips the qubit state from |1> to |0> (i.e., from the south pole to the north pole of the Bloch sphere). This application of a composite pulse is referred to as a "π pulse." Furthermore, by adjusting the duration and amplitude of the composite pulse, one can transform the qubit state │0> into a superposition state │0>+│1>, where the two qubit states │0> and │1> are added and equally weighted in phase (normalization factors for the superposition state are omitted below for convenience), or transform the qubit state │1> into a superposition state │0>-│1>, where the two qubit states │0> and │1> are added and equally weighted but out of phase. This application of a composite pulse is called a "π / 2 pulse". More generally, a superposition of two added and equally weighted qubit states │0> and │1> is represented by a point on the equator of the Bloch sphere. For example, the superposition states │0>±│1> correspond to points on the equator with azimuth angles φ of zero and π, respectively. The superposition state corresponding to a point on the equator with azimuth angle φ is │0>+e iφ │0>±i│1> (for example, for φ=±π / 2, it is │0>±i│1>). Transformation between two points on the equator (i.e., rotation around the Z axis of the Bloch sphere) can be implemented by shifting the phase of the composite pulse.
[0022] II. Entanglement formation 5A, 5B, and 5C show, for example, some schematic collective transverse motion mode structures (also simply referred to as "motion mode structures") of a group 106 of five trapped ions, where a static voltage V SThe confining potential due to the axial direction is weak compared to the radial confining potential. The collective transverse motion mode of the group of trapped ions 106 is determined by the Coulomb interactions between the trapped ions in combination with the confining potential created by the ion trap 200. The trapped ions undergo collective transverse motion (referred to as the "collective transverse motion mode", "collective motion mode", or simply "motion mode"), each mode having a distinct energy (or equivalently, frequency) associated with it. In the following, the mth lowest energy motion mode is referred to as |n ph > m where n ph represents the number of motion quanta (units of energy excitation, called phonons) of a motion mode, and the number of motion modes M in a given transverse direction is equal to the number of trapped ions in group 106. Figures 5A-5C illustrate schematic examples of different types of motion modes that may be experienced by five trapped ions arranged in group 106. Figure 5A illustrates a typical motion mode |n ph > M , where M is the number of motion modes. ph > M In this case, all ions oscillate transversely in phase. Figure 5B shows the second highest energy tilting mode |n ph > M-1 In the tilt motion mode, the ions at both ends move laterally out of phase (i.e., in opposite directions). ph > M-1 Higher order modes of motion, which have lower energies than ph > M-3 FIG.
[0023] It should be noted that the above specific configuration is only one of several possible examples of a trap for confining ions according to the present disclosure, and is not intended to limit possible configurations, specifications, etc. of a trap according to the present disclosure. For example, the shape of the electrodes is not limited to the hyperbolic electrodes described above. In other examples, the trap that generates an effective electric field that causes the motion of ions in a radial direction as a harmonic oscillation may be a multi-layer trap in which multiple electrode layers are stacked and RF voltage is applied to two diagonal electrodes, or a surface trap in which all electrodes are arranged in a single plane on the chip. Furthermore, the trap may be divided into multiple segments, adjacent pairs of which may be linked to shuttle one or more ions or may be coupled by photonic interconnects. The trap may also be an array of individual trapping regions arranged in close proximity to each other on a microfabricated ion trap chip. In some embodiments, the quadrupole potential has a spatially varying DC component in addition to the RF component described above.
[0024] In a trapped ion quantum computer, the motional mode may act as a data bus mediating entanglement between two qubits, which is used to perform XX gate operations. That is, each of the two qubits is entangled with a motional mode, and the entanglement is then transferred to the entanglement between the two qubits by using motional sideband excitation, as described below. Figures 6A and 6B show a kinetic mode with a frequency ω m Mode of motion with ph > M 6B, when the detuning frequency of the composite pulse is zero (i.e., the frequency difference between the first and second laser beams is tuned to the carrier frequency), δ=ω1-ω2-ω 01 =0), a simple Rabi flop (carrier transition) occurs between qubit states │0> and │1>. If the detuning frequency of the composite pulse is positive (i.e., the frequency difference between the first and second laser beams is tuned higher than the carrier frequency), then δ=ω1-ω2-ω 01=μ>0, called the blue sideband), combined qubit motional state │0>│n ph > m and │1>│n ph +1> m (i.e., when the qubit state │0> flips to │1>, │n ph > m From the m-th motion mode with n-phonon excitation represented by │n ph +1> m (n ph +1) a transition to the mth motional mode occurs with phonon excitation. If the detuning frequency of the composite pulse is negative (i.e., the frequency difference between the first and second laser beams is greater than the frequency of the motional mode │n ph > m Frequency ω m If the frequency is tuned lower than the carrier frequency by 01 =-μ<0, called the red sideband), combined qubit motional state │0>│n ph > m and │1>│n ph -1> m (i.e., when the qubit state flips from │0〉 to │1〉, the motion mode │n ph > m From the above, the motion mode with one less phonon excitation │n ph -1> m A π / 2 pulse in the blue sideband applied to the qubit induces a transition to the combined qubit motional state │0>│n ph > m │0>│n ph > m and │1>│n ph +1> m A π / 2 pulse in the red sideband applied to the qubit transforms it into a superposition of combined qubit motional states │0>│n ph > m │0>│n ph > m and │1>│n ph -1> mWhen the two-photon Rabi frequency Ω(t) is small compared to the detuning frequency, δ=ω1-ω2-ω 01 =±μ, blue sideband transitions, or red sideband transitions can be selectively driven. Thus, a qubit can be entangled in a desired mode of motion by applying an appropriate type of pulse, such as a π / 2 pulse, and then entangled with another qubit, resulting in the entanglement between the two qubits required to perform XX gate operations in a trapped ion quantum computer.
[0025] As described above, an XX gate operation may be performed on two qubits (i and j qubits) by controlling and / or directing the transformation of the combined qubit motional state. In general, an XX gate operation (with maximum entanglement) can be performed on a two-qubit state |0> i |0> j , |0> i |1> j , |1> i |0> j and |1> i |1> j are converted as follows, respectively:
number
[0026] Therefore, applying a π / 2 pulse in the blue sideband to the i-th qubit and a π / 2 pulse in the red sideband to the j-th qubit results in two qubits and the motional mode |0> i |0> j |n ph > m The combination state of |0> i |0> j |n ph > m and |1> i |1> j |n ph > m and the two qubits are now in an entangled state. As will be apparent to those skilled in the art, it is possible to have a two-qubit state entangled with a motional mode that has a different number of phonon excitations than the initial number n of phonon excitations (i.e., |1> i |0>j|n ph +1> m and |0> i |1> j |n ph -1> m) can be removed by a sufficiently complex pulse sequence, so that the combined state of the two qubits and the motional modes after the XX gate operation is the initial number of phonon excitations in the m-th motional mode, n ph does not change at the end of the XX gate operation, so it may be considered disentangled. Thus, the qubit states before and after the XX gate operation, as described below, generally do not contain any motional modes.
[0027] More generally, it is transformed by applying a pulse on the sideband for a duration τ (called the "gate duration"), resulting in an amplitude Ω (i) and Ω (j) The combined state of the i-th and j-th qubits with the detuning frequency μ is expressed by the entanglement interaction χ (ij) In terms of (τ), it can be written as follows:
number
number
number
[0028] The entanglement of two qubits (trapped ions) as described above can be used to perform XX gate operations. The XX gate operations (XX gates), together with single qubit operations (R gates), form a set of gates {R,XX} that can be used to build a quantum computer configured to perform a desired computational process. Among several known sets of logic gates into which any quantum algorithm can be decomposed, a set of logic gates commonly denoted as {R,XX} is unique to the trapped ion quantum computing system described herein. Here, the R gates correspond to the manipulation of the individual qubit states of the trapped ions, and the XX gates (also called "entanglement gates") correspond to the manipulation of the entanglement of two trapped ions.
[0029] To perform an XX gate operation between the i-th qubit and the j-th qubit, the condition
number
[0030] III. Calibration Quantum computing can be performed in a quantum computing system, such as the trapped ion quantum computing system 100, using a set of quantum gate operations including single-qubit gate operations (R-gates) and two-qubit gate operations, such as XX-gate operations (XX-gates). Although methods for applying such basic building blocks of quantum computing have been established, there are control errors due to miscalibration of control parameters in the hardware in the quantum computing system. These control errors are mainly due to a lack of knowledge about how the ions, and therefore the qubits, in the quantum computing system behave during quantum gate operations. Therefore, calibration, which is the task of learning the control parameters in the quantum computing system and adjusting the control parameters to correct the control errors, is needed to provide scalable and reliable quantum computing results.
[0031] The calibration process typically requires repeated measurements of qubits to collect statistics over a significant parameter space of the control parameters of the quantum computing system. Thus, the calibration process can be an expensive and time-consuming task. For example, if every gate operation is calibrated, the sequence of calibration steps or processes may grow quadratically as the number of qubits in the quantum computing system, resulting in a degradation of the quality of the calibration process. Thus, the sequence of calibration steps or processes needs to be optimized within the tolerances in quantum computing.
[0032] In an embodiment described herein, a method for optimizing resources for calibrating quantum gate operations is performed on a quantum computing system to execute a batch of quantum circuits (i.e., a sequence of quantum gate operations). In a quantum computing system such as the ion trap quantum computing system 100, single qubit gate operations (R gates) can be performed with high accuracy with minimal calibration effort, and therefore only two qubit gate operations, such as XX gate operations (XX gates), are calibrated with significant effort.
[0033] III.A. Calibration Resource Specifications A quantum processor, such as a group 106 of trapped ions in a trapped ion quantum computing system 100, is organized into a fully connected system graph G s =(V s ,E s ,ε), and vertex i∈V s represents a physical qubit i (i.e., a trapped ion) of the quantum processor. Two vertices i, j ∈ V for physical qubits i and j s Each edge (i,j) ∈ E s represents a two-qubit gate between physical qubits i and j. For each edge (i,j)∈E s has an associated infidelity ε(i,j) for a two-qubit gate between physical qubits i and j. The associated infidelity ε(i,j) is symmetric with respect to interchanging physical qubits i and j (i.e., ε(i,j)=ε(j,i)).
[0034] The calibration of the two-qubit gate in the ion trap quantum computing system 100 is carried out for all edges (i, j) ∈ E s and adjusting control parameters associated with hardware in the trapped ion quantum computing system 100 to calibrate edge (i,j) in subset S. In general, the associated infidelity ε(i,j) of edge (i,j) in the calibrated subset S is lower than the associated infidelity ε(i,j) of edge (i,j) outside the uncalibrated subset S. The calibration is performed on subset S (hence also referred to as the "calibration set"), such that the calibration is optimized when subset S has a minimum size within an acceptable error.
[0035] A quantum computation in the ion trap quantum computing system 100 is performed by executing a batch C of a quantum circuit c. A quantum circuit c∈C is a circuit graph G c =(V c ,E c , w) and vertex k ∈ V c represents a logical qubit k. Two vertices k, l ∈ V for logical qubits k and l cEach edge e = (k, l) ∈ Ec connecting two logical qubits k and l represents a two-qubit gate between them. The number of logical qubits |V c is the number of physical qubits in the quantum processor 106, |V s Assume that for each edge e = (k, l) ∈ E for logical qubits k and l. c has an associated weight w(k,l) indicating the number of occurrences of two-qubit gates between logical qubits k and l in quantum circuit c∈C. Each logical qubit k is mapped to a physical qubit i, and the mapping between logical qubits and physical qubits is described below. Each quantum circuit c∈C is mapped to a set of single-qubit and two-qubit gates on physical qubit i, which can be implemented on a quantum processor, such as a group of trapped ions in trapped ion quantum computing system 100, by applying appropriate laser pulses to physical qubit i by a system controller, such as system controller 104.
[0036] Circuit Graph G c =(V c ,E c ,w) and a system graph G s =(V s ,E s Consider a quantum processor designated by (G , ε), the logical qubit k is the infidelity ε(G c ,G s ) is minimized. In some embodiments, this mapping relationship between physical qubit i and logical qubit k is expressed as a bijective map π:V c →V s (i.e., π(G c )=G s By this map π, the circuit graph G c Edge e=(k,l)∈E c is the system graph G s (i.e., π(E c )=E s π(e) = (π(k),π(l)) ∈ Es The mapping π is a function of the system graph G s The infidelity of a quantum circuit c∈C executed on c ,G s ) is minimized as follows:
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[0037] The minimized average infidelity shown in Eq. (3)
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[0038] First, for brevity, let us consider an edge e ∈ E S All two-qubit gates for have equal associated infidelity ε before calibration. - and the associated infidelity ε + (ε + <ε - ) In the following, we will call this assumption the binary gate fidelity model. Thus, equation (1) becomes
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[0039] Next, we introduce maximum common edge subgraphs (MCEs), because the calibration set S to be computed is a circuit graph G c This is because in a typical scenario where we estimate that a graph c has more edges e than the calibration budget Γ, it will have maximal overlap with a batch C of quantum circuits c. The MCEs between two unweighted graphs (i.e., edges e have weight w of 0 or 1) consist of a maximal set of common edges as defined below.
[0040] Definition A.1 (Maximum common edge subgraph) A maximum common edge subgraph is an isomorphic subgraph ∩(G1,G2,…,G n) to identify the
[0041] Graph {G1,G2,…,G N}, we perform pairwise MCEs, i.e., (((G1∩G2)∩G3)…∩G N The maximum common edge subgraphs (MCEs) determined by sequentially computing n!) are not the same as the MCEs of the graph sequence defined in Definition A.1. A brute force method to find MCEs of n graphs requires maximization over permutations of vertex mappings for all graphs. This scales exponentially in the number of graphs n. Therefore, in the embodiment described herein, MCEs of n graphs are computed by composing pairwise MCEs operations, instead reducing the complexity to be linear in the number of graphs n. However, it should be noted that the process of pairwise MCEs determination is not associative as shown in FIG. 7. In the example shown in FIG. 7, pairwise determination of MCEs for three graphs F, G, and H provides different final results depending on the order of composition of pairwise MCEs. Considering N! orderings (N is the total number of graphs for which MCEs are computed) is prohibitively expensive, so the method described herein provides a heuristic for determining a suitable sequential ordering of pairwise MCEs.
[0042] In a weighted graph, where edges each have a different weight, for example, an edge e ∈ Ec has an associated weight w(e) in a circuit graph G c =(V c ,E c In (w, w), the heaviest cumulative subgraphs (HCs) are considered to adapt to the edge weights. The heaviest cumulative subgraphs (HCs) are defined as follows:
[0043] Definition A.2 (Heaviest Cumulative Subgraph) A most weighted cumulative subgraph is a set of multiple graphs ∧(G1,G2,…,G n ), and the maximum total edge weight is:
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[0044] The definition of heaviest cumulative subgraphs (HCs) is closely related to the calibration set S. For example, between two graphs G (a complete graph with two vertices) and H (a complete graph with three vertices and edges, each with a different weight), the optimal calibration set S for a calibration budget Γ=1 is the HCs between graphs G and H. That is, determine a mapping from G to H such that the cumulative edge weight is maximized.
[0045] However, in non-trivial cases, the definition of most-heavy cumulative subgraphs (HCs) is insufficient to compute the most-heavy cumulative subgraphs. Therefore, we consider most-compact cumulative supergraphs (MCCSs). The average infidelity shown in Eq. (2) is
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[0046] Definition A.3 (Most compact cumulative supergraph) The most compact cumulative supergraph with respect to the calibration budget Γ is the set of graphs V with the largest sum of weights on the Γ edges. Γ (G1,G2,…,G n ) is a supergraph of Γ, which is the weight of the heaviest edge of
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[0047] In some embodiments, the circuit graph G c =(V c ,E c , w) has fewer edges e∈E than the calibration budget Γ. c In this case, all circuit graphs G c We can consider the smallest supergraph that contains a supergraph with a number of edges less than or equal to the calibration budget Γ, and all edges in the supergraph can be calibrated without considering edge weights. This supergraph is called the minimum common edge supergraph (mCES) and is defined as follows:
[0048] Definition A.4 (Minimum common edge supergraph) A minimal common supergraph is a set ∪(G1,G2,…,G n ) that contains all the graphs in
[0049] III.B. Calibration Resource Minimization As mentioned above, the calibration resources are determined by the circuit graph G for a given calibration budget Γ. cIn the embodiment described herein, two heuristic methods for finding an MCCS are known in the art: a method 800 for computing an MCCS by an approximate MCCS algorithm, and a method 900 for computing an MCCS by a genetic algorithm.
[0050] B.1 Approximate MCCS Algorithm B.1.1 Algorithm Overview Figure 8 shows a circuit graph G that specifies a batch C of a quantum circuit c∈C. c =(V c, E c 8 shows a flowchart illustrating a method 800 for computing the most compact cumulative supergraph (MCCS, hereafter simply referred to as M) for a set of G, w, w by the approximate MCCS algorithm. c =(V c ,E c ,w) and the system graph G s The mapping π between is calculated, and the infidelity ε(G c ,G s ) is minimized.
[0051] In block 802, a batch C of quantum circuits c ∈ C to be calibrated is received by the classical computer 102.
[0052] In block 804, the classical computer 102 generates a circuit graph G c =(V c ,E c , w) is computed based on the received batch C of a quantum circuit c∈C. c In forming the set of,graph isomorphism is taken into account. That is, the set is a set of,circuit graphs G,G ... cFor weighted graphs, a modified definition of graph isomorphism is used: two weighted graphs G = (V1,E1,w1) and H = (V2,E2,w2) are isomorphic if there is a bijective mapping π:V1 → V2 between the sets of vertices of the two graphs such that the mapping preserves weighted adjacency, i.e., w1(e) = w2(π(e)) ∀e∈E1. For an edge e∈E c and the associated weights w(e) are stored separately in a dictionary in the non-volatile memory of the classical computer 102.
[0053] In block 806, the number of edges e∈Ec is calculated by the classical computer 102. c If all numbers in are less than or equal to the predetermined calibration budget Γ, the method 800 proceeds to block 808. c If at least one of the numbers is greater than the predetermined calibration budget Γ, then the method 800 proceeds to block 814 .
[0054] In block 808, the classical computer 102 generates a circuit graph G c =(V c ,E c ,w), the minimum common edge supergraph (mCES) of the set is computed.
[0055] In block 810, the classical computer 102 generates a circuit graph G c =(V c ,E c The number of edges in a Minimum Common Edge Supergraph (mCES) of w (w, w) is calculated. If the number of edges in the mCES is less than or equal to a predefined calibration budget Γ, then all edges in the mCES may be calibrated regardless of the associated weights of the edges. Method 800 then proceeds to block 812. If the number of edges in the mCES is greater than the predefined calibration budget Γ, method 800 proceeds to an iteration of computing the MCCS M starting at block 814.
[0056] In block 812, the classical computer 102 outputs the calculated minimum common edge supergraph (mCES) as a calculation result.
[0057] At block 814, an initial iteration of approximation and iterative computation of the MCCS, M, is performed by the classical computer 102. At block 814, the graph M is converted to a null graph (i.e., a circuit graph G c (not including ) and the circuit graph G c An ordered list L of the circuit graphs is created. The ordered list L is created by sorting the circuit graphs in descending order of the number of edges.
[0058] In block 816, the classical computer 102 generates the circuit graph G c Let the set of s First, a mapping π is computed that maps the first circuit graph G c (simply referred to as G) is computed such that the circuit graph G and the graph M overlap. The computation of the mapping π is described in more detail below.
[0059] In block 818, the classical computer 102 maps the graph G by a mapping π, such that the mapped graph π(G) is
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[0060] At block 820, the method 800 selects the next circuit graph G in the ordered list L. c For all circuit graphs G in the ordered list L, we return to block 816. c If so, the method 800 proceeds to block 822. The resulting graph M is a graph of all circuit graphs G in the ordered list L. c Graph M is a cumulative supergraph of all circuit graphs G c MCCS graph of the approximated
[0061] At block 822, among the edges in the cumulative supergraph M, the heaviest edge of Γ is selected and the remaining edges are removed. Γ This final graph, denoted as M, is an approximate solution that includes the calibration set S as its edges. Γ Once the M for each input circuit is specified, Γ The round of optimal mapping to M Γ The mapping used previously in constructing the graph M is Γ This step is performed because, ... c Use this as the final mapping.
[0062] In block 824, the classical computer 102 generates the computed graph M Γ is output as the calculation result.
[0063] Circuit Graph G c Note that organizing θ as above may yield an exact solution for the MCCS solution when using the sequential merging approach described above.
[0064] B.1.2 Algorithms for optimal mapping In block 806, a mapping π is calculated such that an overlap between the circuit graph G and the graph M occurs. This may be considered as an extension of the Maximum Common Edge Subgraphs (MCEs) problem to weighted graphs. The algorithm to find the most optimal mapping is called a backtracking algorithm, which is similar to the Depth-First Search (DFS) algorithm known in the art, but differs in that the backtracking algorithm does not involve all possible branches, but backtracks faster based on a prediction function that checks whether the mapping started is worth completing based on the optimization goal. As a basis for the backtracking algorithm, the SplitP algorithm known in the art is used with a modified prediction function. Instead of maximizing the number of common edges of the graphs, the accumulated weight on the common subgraphs is maximized to achieve the heaviest accumulated subgraphs (HCs). In the case of multiple potential maps, an additional criterion is used. In this scenario, the map is selected such that it incurs the minimum subgraph transformation cost between π(G) and M. This criterion serves to minimize the number of heaviest edges in the final accumulated supergraph M.
[0065] Definition B.1 (Subgraph transformation cost) The subgraph transformation cost S(G,H) between two weighted graphs G and H is the transformation cost (see below) on the graph formed by their set of common edges.
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[0066] Definition B.2 (Conversion cost) The cost of transformation T(G,H) between two weighted graphs G and H includes the sum of the weights of added / removed edges and the changes in weights of common edges.
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[0067] Specifically, a mapping algorithm that identifies an optimal mapping of vertices of G to M repeatedly invokes a search function. The search function looks for heaviest cumulative subgraphs (HCs) between G and M that have a pre-specified number of edges. If found, the function also returns a vertex map from G to M that is used to derive the HCs. Starting with the smaller number of edges of the two input graphs G and M, the maximum possible HCs between G and M can be determined by iteratively decreasing said pre-specified number of edges.
[0068] Implementing the search function is technically involved. In brief, given two input graphs G and M, and a pre-specified number of edges, the function starts with an empty mapping and constructs a mapping using a depth-first search that pairs a heuristically selected edge from G with an appropriate edge from M at each level of the search tree. The function backtracks if there is a low chance that the search in one branch will beat the best result found so far. The function also backtracks if the computed bound is less than a pre-specified number of edges. The bound here is computed as the number of edges already mapped plus the maximum number of edges that can be mapped based on their adjacency to the mapped edges.
[0069] B.1.3 Beam search The backtracking algorithm used herein can be considered a more advanced version of the Depth-First Search (DFS) algorithm, but is still poor on the size of the graph. To make the approach more scalable, a threshold can be set for the predicted improvement while exploring a branch compared to the best one found so far. In particular, a stronger condition requires that the predicted cumulative weight of a potential subgraph exceeds the best found value plus an added threshold. Otherwise, the potential map is removed from further consideration. Multiple branches can be further explored while limiting the number of potential maps or walkers on the search tree to n, i.e., keeping only the n most promising ones.
[0070] For a large number of qubits, the circuit graphs in the batch may have small heaviest cumulative subgraphs (HCs), which would lead to a rapid explosion in the size of the merged graph M. This results in a rapid increase in the computational resources required for the optimal mapping search described in the previous section. Therefore, the size of M can be limited by keeping the number of edges in M below kΓ. This can be achieved by choosing to keep the heaviest edges of kΓ (where k>1) if the determined M has more than kΓ edges at any stage and discarding the remaining edges.
[0071] B.2 Genetic Algorithms FIG. 9 is a flow chart illustrating a method 900 for computing the most compact cumulative supergraph (MCCS) by a genetic algorithm. A genetic optimization algorithm has a population of subgraphs in its memory. At each generation, a fraction of the population is selected to move to the next generation based on its fitness. In addition, mutated copies of fit members of the population may be generated. In mutation, the graph undergoes random changes in its structure. Some pairs of parents from the current population may be selected and used in a crossover function to generate children for the next generation. These children are expected to combine and improve on the good characteristics of the parents. A small fraction is selected to undergo mutation such that the graph undergoes random changes in its structure. The population size from generation to generation is kept constant. After a certain number of generations, the best members of the population that survive are returned as the optimal solution.
[0072] The fidelity ε(G c ,G s In the method 900 for computing the most compact cumulative supergraph (MCCS) that minimizes c ,G s ) is biased as in fitness functions in genetic algorithms. In some embodiments, the system graph G s To calculate the fitness of a candidate graph G for each circuit graph G c An optimal vertex map of is found. Note that computing the fitness function is already a challenging task since it requires the computation of an optimal mapping from the circuit graph to the system graph. To compute the mapping, the backtracking heaviest cumulative subgraph (HCs) and maximum common edge subgraph (mCES) algorithms mentioned above are used. Thus, the performance of the genetic algorithm is closely tied to the performance of the computation of the mapping.
[0073] In block 902, a batch C of quantum circuits c∈C to be calibrated is received by the classical computer 102.
[0074] In block 904, the classical computer 102 generates a circuit graph G c =(V c ,E c , w) is computed based on the received batch C of a quantum circuit c∈C.
[0075] In block 906, the classical computer 102 calculates the infidelity ε(G c ,G s ) is calculated.
[0076] In block 908, some of the candidate graphs G are mutated (i.e., some of the candidate graphs G are mutated to include the circuit graph G that is not in the candidate graph G). c (The graph G = (V,E) is randomly replaced with some of the m , the number of edges e∈E is equal to the calibration budget Γ, and p m It contains |E| new edges, randomly selected from edges e ∈ E in the original graph G (1-p m )*|E| edges are sampled.
[0077] At block 910, a pair of two candidate graphs G are crossed over. Crossing over two graphs (i.e., parents) G1=(V,E1), G2=(V,E2) generates two more graphs G3=(V,E3) and G4=(V,E4), where edges E3 and E4 are generated by sampling from E1∪E2 with constraint |E3|=|E4|=Γ. If the fitness function of the candidate graph G is below the predetermined threshold, method 900 returns to block 906. If the fitness function of the candidate graph G is above the predetermined threshold, method 900 proceeds to block 912. In another embodiment, a predetermined number n G In block 906, the crossover of nG Returning to step 900, the method G After iterations, proceed to block 912.
[0078] In block 912, the computed best-fit candidate graph G, which includes the calibration set S as an edge, is output as the computation result.
[0079] III.C. Working Example Below we present exemplary simulation results for optimized calibration of quantum gates for a given calibration budget Γ. In the example disclosed herein, the quantum circuit is implemented on a quantum processor 106 that includes 11 trapped ions in a trapped ion quantum computing system 100. The quantum circuit is implemented on 10-20 physical qubits.
[0080] To demonstrate the quality of the methods described herein, exemplary simulation results are compared against the following primitive calibration techniques: The first primitive mapping technique (called the "random approach") is a fully unoptimized, trivial approach that calibrates Γ random gates and then runs the circuit without mapping between logical and physical qubits. The second primitive mapping technique (called the "naive approach") is a slightly optimized, but still naive, approach that counts the number of gates in each circuit and calibrates the most frequently used ones without mapping between logical and physical qubits. As mentioned above, in block 822 of the MCCS-based method 800, a circuit graph G c From the system graph G s Rounds of (re)mapping to x, y, y, y, y, y, y, y, y, y, are used. The use of this (re)mapping on top of the random or naive approaches is referred to as the and asterisked methods, respectively. Note that these asterisked methods rely on Maximum Common Edge Subgraphs (MCEs) or Heavy Cumulative Subgraphs (HCs) mapping functions as described herein.
[0081] 10A and 10B show exemplary simulation results of the average fidelity of an input quantum circuit c as a function of the calibration budget Γ and the reduction in the requirement of the calibration budget Γ to achieve a target average fidelity, respectively, for the 30 most common unweighted graphs. In the illustrated example, the reduced associated infidelity ε after calibration + is ε + = 1%, and the associated infidelity before calibration, ε - is ε - = 10%. In Fig. 10A, the dashed lines show the fidelity of the naively and randomly generated system graphs. The blue region covers the 90% confidence interval of the best to worst random assignments. The solid lines show the fidelity for the average random and naive approaches with qubit mapping (* indicates the presence of this mapping) and those generated with the most compact cumulative supergraph (MCCS) and genetic algorithm. The average random approach is averaged over 100 random instances. In Fig. 10B, the reduction of the Γ requirement is shown for the method exploiting qubit mapping, the baseline is the naive approach. The reduction is calculated as the difference of the Γ requirement expected from the average fidelity curve of Fig. 10A, obtained by linearly interpolating the data points (not shown) of Fig. 10A.
[0082] The average fidelity for all methods (using the MCCS algorithm, genetic algorithm, and primitive techniques) is Γ, where the calibrated gate has infidelity ε + = 1%, and the rest is infidelity ε - = 10%.
[0083] 11A and 11B show exemplary simulation results of the average fidelity of an input quantum circuit c as a function of the calibration budget Γ and the reduction in the requirement of the calibration budget Γ to achieve a target average fidelity, respectively, for the 40 most common weighted graphs. In the illustrated example, the reduced associated infidelity ε after calibration + is ε += 1%, and the associated infidelity before calibration, ε - is ε - = 10%. In Fig. 11A, the dashed lines show the fidelity of naively and randomly generated system graphs without individual circuit remapping. The blue region covers the 90% confidence interval of the best to worst random assignment. The solid lines show the fidelity for the average random and naive approaches with qubit mapping (* indicates the presence of this mapping) and those generated with the most compact cumulative supergraph (MCCS) and genetic algorithm. The average random approach is averaged over 100 random instances. In Fig. 11B, the reduction of the Γ requirement is shown for the method exploiting qubit mapping, where the baseline is the naive approach. The reduction is calculated as the difference of the Γ requirement expected from the average fidelity curve of Fig. 11A, obtained by linearly interpolating the data points (not shown) of Fig. 11A.
[0084] 12A and 12B show exemplary simulation results of the reduction in the number of calls to the search function in the beam search version of the MCCS algorithm and the requirement of the calibration budget Γ to achieve the target average fidelity compared to the naive approach giving the same fidelity for different system sizes N and Γ=N, 2N, 3N, respectively. The predicted number of calls to the search function in FIG. 12A in the best random approach with mapping for N=10, 12, 14, and Γ=2N are shown with error bars marking the 90% confidence interval of the random distribution. The reduction value in FIG. 12B for each N is calculated as the additional Γ required to achieve the same fidelity as the MCCS method with the naive method. The average fidelity curve for the naive method is obtained by linearly interpolating the data points (not shown). The line in FIG. 12B shows the reduction Γ as a function of the system size N. reduced This shows the fit function for Γ reduced =(N)C x (N-10) x were estimated to be 1.5, 2.1, and 1.9 for the three cases, respectively.
[0085] The scalability of the method described herein is illustrated in an example using artificially generated batches of circuits for different system sizes, where each batch consists of 5 line graphs, 5 star graphs, 5 random trees, and N randomly selected small diameter regular graphs, where N is the number of qubits. This particular configuration was motivated by the shapes of lines, stars, and trees that frequently appear in quantum programs executed on quantum computing systems such as the ion trap quantum computing system 100. Small diameter regular graphs of the form (k,d,n), where k is the degree of the graph, d is the diameter of the graph, and n is the number of vertices, were chosen to exploit the connectivity of all qubits available in quantum computing systems such as the ion trap quantum computing system 100. In the illustrated example, the MCCS solution is calculated on batches generated for six different system sizes ranging from N=10 to 20 qubits, considering a calibration budget of Γ=N, 2N, 3N. The number of calls to the search function as a measure of execution time is shown in FIG. 12A. The expected number of calls for the best random approach is also calculated by first calculating the best average fidelity obtained as a function of the number of random trials for the benchmark circuits, and then extrapolating this to match the average fidelity obtained by the MCCS method. This is then converted to the number of calls to the search function according to the method described herein, which is of the form M / 2×(number of search calls for the MCCS solution). For a solution with Γ=2N, the expected number of trials is M≈700 for N=10, M≈800 for N=12, and M≈750 for N=14 (FIG. 12A), which is more than 2.5 orders of magnitude higher in execution time compared to the MCCS algorithm. The upper limit of the 90% confidence interval spans five orders of magnitude due to the Poisson distribution of the probability of randomly finding a solution, so the actual time may be much longer. For each case of Γ=N, 2N, 3N considered here, the associated infidelity ε used previously is ±The expected average fidelity is estimated from a benchmark batch of circuits using . It is found that if a naive approach is used, it takes more than twice the number of calibrated gates to reach the same average fidelity. The advantage in the Γ requirement increases with system size following the trend shown in FIG. 12B. Note that to achieve the same fidelity, the naive approach may require as many as 80 additional calibrations for a 20 qubit instance, on top of the 60 already required from the better performing MCCS algorithm.
[0086] III.D. Description In the embodiments described herein, a method is provided for minimizing calibration resources for a batch of quantum circuits. It has been shown that for both non-weighted and weighted graphs, optimizing the mapping between the logical qubits and physical qubits described by the graph can have a significant impact on fidelity. In both cases, the methods described herein for computing the mapping provide an increase in average algorithm fidelity of about 70% to over 90% over unmapped runs. Calibrating the gate set using a backtracking algorithm gives consistently better performance over the fidelity range of interest, at high fidelity, for both weighted and non-weighted graphs, than a naive approach of calibrating the most frequently used gates. In both cases, the genetic algorithm performs well for large calibration budgets Γ>15. It should be noted that when aided by the remapping algorithm described herein, even random calibration sets can give performance close to that obtained using the backtracking or genetic algorithms. It should also be noted that the random sampling method takes as long or longer than the backtracking algorithm to reach the target fidelity.
[0087] In using genetic algorithms to find optimal calibration sequences, genetic algorithms have been found to outperform MCCS algorithms in terms of average fidelity for large target budgets Γ. However, it should be noted that genetic algorithms that rely on the stochastic evolution of an ensemble of candidate solutions tend to consume significant time and computational resources. Other neural network-based methods, such as deep learning, may be used to conserve time. More efficient fusion with other search methods, such as backtracking or nested candidate approaches, may also be used to reduce computational resource requirements.
[0088] The methods described herein may provide benefits to quantum circuits that compile and execute quantum algorithms that may accelerate various numerical optimization problems. Additionally, the methods described herein may enable smaller sized quantum computers to optimize calibration routines for larger quantum computers.
[0089] It should be noted that the specific illustrative embodiments described above are merely some possible examples of the application of calibration resource optimization to a quantum computing system according to the present disclosure, and do not limit the possible configurations, specifications, etc. of a quantum computing system according to the present disclosure. For example, the quantum processor in the quantum computing system is not limited to a group of trapped ions with all-to-all connectivity described above. For example, the quantum processor may be an architecture with more limited connectivity, such as superconducting qubits and a modular topology, where some strongly connected modules communicate with a small number of channels. The graph-theoretic techniques provided herein can be modified to reduce routing and shuttling times in such systems with limited connectivity.
[0090] While the forgoing is directed to specific embodiments, other and further embodiments may be devised without departing from the basic scope thereof, which is determined by the claims that follow.
Claims
1. 1. A method of performing a quantum computing process, comprising: mapping, by a classical computer, a plurality of logical qubits to a plurality of physical qubits of a quantum processor such that a plurality of quantum circuits are executable using the physical qubits of the quantum processor; each of the physical qubits comprises a trapped ion; each of the plurality of quantum circuits comprising a plurality of single qubit gates and a plurality of two qubit gates within the plurality of logical qubits; adjusting, by a system controller, the amplitude and frequency of laser pulses applied to each of a first plurality of pairs of physical qubits to correct for errors in the two-qubit gates in the first plurality of pairs of physical qubits; executing the plurality of quantum circuits on the quantum processor by applying laser pulses to the plurality of physical qubits that induce single qubit and two qubit gate operations in each of the plurality of quantum circuits; measuring, by the system controller, a population of qubit states of the physical qubits in the quantum processor after executing the plurality of quantum circuits on the quantum processor; outputting, by the classical computer, the measured population of qubit states of the physical qubits as a result of the execution of the plurality of quantum circuits, the results of the execution of the plurality of quantum circuits being configured to be displayed on a user interface, stored in a memory of the classical computer, or transferred to another computing device; A method comprising:
2. The method of claim 1, comprising a step of measuring, by the system controller, a population of quantum bit states of the first plurality of pairs of physical quantum bits before executing the plurality of quantum circuits on the quantum processor.
3. computing, with the classical computer, a plurality of circuit graphs based on the plurality of quantum circuits, each of the plurality of circuit graphs having a plurality of vertices representing the plurality of logical qubits and a plurality of edges representing two-qubit gates between pairs of the plurality of logical qubits. The method of claim 1 further comprising:
4. computing, by the classical computer, a most compact cumulative supergraph of the plurality of circuit graphs; computing, by the classical computer, the first plurality of pairs of physical qubits based on the computed most compact cumulative supergraphs of the plurality of circuit graphs; The method of claim 3 further comprising:
5. replacing, by the classical computer, a predetermined percentage of a candidate circuit graph of the plurality of circuit graphs with a circuit graph of the plurality of circuit graphs that is not one of the candidate circuit graphs; generating, by the classical computer, a pair of circuit graphs for addition to the plurality of candidate circuit graphs based on the plurality of candidate circuit graph pairs; computing, by the classical computer, a most compact cumulative supergraph of the plurality of circuit graphs; computing, by the classical computer, the first plurality of pairs of physical qubits based on the computed most compact cumulative supergraph that includes the plurality of candidate circuit graphs; The method of claim 3 further comprising:
6. 10. The method of claim 1 , wherein a number of the first plurality of pairs of physical qubits is less than a predetermined calibration budget.
7. 1. A quantum computing system, comprising: a quantum processor including a plurality of physical qubits, each of the physical qubits comprising a trapped ion; A classical computer, a classical computer, wherein a plurality of quantum circuits are executable using the physical qubits by mapping a plurality of logical qubits to the plurality of physical qubits, each of the plurality of quantum circuits comprising a plurality of single qubit gates and a plurality of two qubit gates within the plurality of logical qubits; A system controller, adjusting the amplitude and frequency of a laser pulse applied to each of the first plurality of pairs of physical qubits to correct an error of a two-qubit gate in the first plurality of pairs of physical qubits; executing the plurality of quantum circuits on the quantum processor by applying laser pulses to the plurality of physical qubits that induce single qubit and two qubit gate operations in each of the plurality of quantum circuits; measuring a population of qubit states of the physical qubits in the quantum processor after executing the plurality of quantum circuits on the quantum processor; A system controller configured to: Equipped with The classical computer comprises: a quantum computing system further configured to output the measured population of qubit states of the physical qubits as a result of the execution of the plurality of quantum circuits, the results of the execution of the plurality of quantum circuits being configured to be displayed on a user interface, stored within a memory of the classical computer, or transferred to another computing device.
8. calibrating the two-qubit gate by adjusting the amplitude and frequency of laser pulses in the first plurality of pairs of physical qubits includes: measuring, by the system controller, an ensemble of qubit states of the first plurality of pairs of physical qubits; adjusting, by the system controller, an amplitude and a frequency of a laser pulse applied to each of the first plurality of pairs of physical qubits to correct for errors in the measured population of qubit states of the first plurality of pairs of physical qubits; The quantum computing system of claim 7 .
9. The classical computer comprises:
8. The quantum computing system of claim 7, further configured to compute a plurality of circuit graphs based on the plurality of quantum circuits, each of the plurality of circuit graphs having a plurality of vertices representing the plurality of logical qubits and a plurality of edges representing two-qubit gates between pairs of the plurality of logical qubits.
10. The classical computer comprises: Computing a most compact cumulative supergraph of the plurality of circuit graphs; computing the first plurality of pairs of physical qubits based on the computed most compact cumulative supergraph of the plurality of circuit graphs; 10. The quantum computing system of claim 9, further configured to:
11. The classical computer comprises: replacing a candidate circuit graph of the plurality of circuit graphs with a circuit graph of the plurality of circuit graphs that is not one of the candidate circuit graphs at a predetermined rate; generating a pair of circuit graphs for addition to the plurality of candidate circuit graphs based on the plurality of candidate circuit graph pairs; computing, by the classical computer, a most compact cumulative supergraph of the plurality of circuit graphs; Computing the first plurality of pairs of physical qubits based on the computed most compact cumulative supergraph that includes the plurality of candidate circuit graphs; 10. The quantum computing system of claim 9, further configured to:
12. 8. The quantum computing system of claim 7, wherein the number of the first plurality of pairs of physical qubits is less than a predetermined calibration budget.
13. 8. The quantum computing system of claim 7, wherein each of the physical qubits is an ion having a nuclear spin and an electron spin, such that the difference between the nuclear spin and the electron spin is zero.
14. 14. The quantum computing system of claim 13, wherein each of the physical qubits is an ion having nuclear spin 1 / 2 and a 2S1 / 2 hyperfine state.
15. 1. A quantum computing system comprising a non-volatile memory having a number of instructions stored therein, the number of instructions, when executed by one or more processors, causing the quantum computing system to: mapping, by a classical computer, a plurality of logical qubits to a plurality of physical qubits of a quantum processor such that a plurality of quantum circuits are executable using the physical qubits of the quantum processor; each of the physical qubits comprises a trapped ion; each of the plurality of quantum circuits comprising a plurality of single qubit gates and a plurality of two qubit gates within the plurality of logical qubits; adjusting, by a system controller, the amplitude and frequency of laser pulses applied to each of a first plurality of pairs of physical qubits to correct for errors in the two-qubit gates in the first plurality of pairs of physical qubits; executing the plurality of quantum circuits on the quantum processor by applying laser pulses to the plurality of physical qubits that induce single qubit and two qubit gate operations in each of the plurality of quantum circuits; measuring, by the system controller, a population of qubit states of the physical qubits in the quantum processor after executing the plurality of quantum circuits on the quantum processor; outputting, by the classical computer, the measured population of qubit states of the physical qubits as a result of the execution of the plurality of quantum circuits, the results of the execution of the plurality of quantum circuits being configured to be displayed on a user interface, stored in a memory of the classical computer, or transferred to another computing device; A quantum computing system that performs operations including: measuring, by the system controller, an ensemble of qubit states of the first plurality of pairs of physical qubits prior to executing the plurality of quantum circuits on the quantum processor; 16. The quantum computing system of claim 15, comprising:
17. computing, with the classical computer, a plurality of circuit graphs based on the plurality of quantum circuits, each of the plurality of circuit graphs having a plurality of vertices representing the plurality of logical qubits and a plurality of edges representing two-qubit gates between pairs of the plurality of logical qubits.
16. The quantum computing system of claim 15, further comprising:
18. computing, by the classical computer, a most compact cumulative supergraph of the plurality of circuit graphs; computing, by the classical computer, the first plurality of pairs of physical qubits based on the computed most compact cumulative supergraphs of the plurality of circuit graphs; 20. The quantum computing system of claim 17, further comprising:
19. replacing, by the classical computer, a predetermined percentage of a candidate circuit graph of the plurality of circuit graphs with a circuit graph of the plurality of circuit graphs that is not one of the candidate graphs; generating, by the classical computer, a pair of circuit graphs for addition to the plurality of candidate circuit graphs based on the plurality of candidate circuit graph pairs; computing, by the classical computer, a most compact cumulative supergraph of the plurality of circuit graphs; computing, by the classical computer, the first plurality of pairs of physical qubits based on a computed most compact cumulative supergraph that includes the plurality of candidate circuit graphs; 16. The quantum computing system of claim 15, further comprising:
20. 14. The quantum computing system of claim 13, wherein the number of the first plurality of pairs of physical qubits is less than a predetermined calibration budget.
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