Data storage device having split burst servo pattern - Patents.com

Abstract

Various illustrative aspects relate to a data storage device comprising one or more disks, an actuation mechanism comprising one or more heads and configured to position the one or more heads proximate disk surfaces of the one or more disks, and one or more processing devices configured to: determine a first burst value based on average values ​​of a first set of one or more bursts, determine a second burst value based on average values ​​of a second set of one or more bursts, generate a position error signal (PES) based on the determined first burst values ​​and the determined second burst values, and control a position of at least one of the one or more heads based on the PES.

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application claims the benefit of U.S. Non-Provisional Patent Application No. 17 / 839,011, entitled "DATA STORAGE DEVICE WITH SPLIT BURST SERVO PATTERN," filed on June 13, 2022, the entire contents of which are incorporated herein by reference for all purposes. [Background technology]

[0002] A data storage device such as a disk drive comprises a disk and a head connected to a distal end of an actuator arm that is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced concentric tracks for recording user data sectors and servo wedges or servo sectors. The servo sectors comprise head positioning information (e.g., track addresses) that is read by the head and processed by a servo control system to control the actuator arm as it seeks from track to track.

[0003] FIG. 1 shows servo wedges 60-66 recorded around the circumference of each servo track. N 1 shows a prior art disk format 2 with multiple radially spaced concentric servo tracks 4 defined by servo wedges 6. A number of concentric data tracks are defined about the servo tracks 4, and the data tracks may have the same or different radial density (e.g., tracks per inch (TPI)) as the servo tracks 4. Each servo wedge 6 icomprises a preamble 8 for storing a periodic pattern that allows proper gain adjustment and timing synchronization of the read signal, and a synchronization mark 10 for storing a special pattern used for symbol synchronization to the servo data fields 12. The servo data fields 12 store coarse head positioning information, such as a servo track address, that is used to position the head over a target data track during seek operations. Each servo wedge (e.g., servo wedge 64) further comprises a group of phase-based servo bursts 14 (e.g., P and Q servo bursts), which are recorded at a predetermined phase with respect to each other and with respect to the servo track centerline.

[0004] The coarse head positioning information is processed to position the head over a target data track during seek operations, and the servo bursts 14 provide fine head positioning information used for centerline tracking while accessing a data track during write / read operations. A position error signal (PES) is generated by reading the servo bursts 14, the PES representing the measured position of the head relative to the centerline of the target servo track. A servo controller processes the PES to generate control signals that are applied to one or more head actuators to actuate the head radially over the disk in a direction that reduces the PES. The one or more head actuators may comprise a voice coil motor, and in some embodiments may comprise one or more fine actuators in a dual stage actuator or triple stage actuator.

[0005] Data is typically written to the disk by modulating a write current in an inductive coil (write coil) to record magnetic transitions on the disk surface in a process called saturation recording. During readback, the magnetic transitions are sensed by a read element (e.g., a magnetoresistive element) and the resulting read signal is demodulated by a suitable read channel. Heat assisted magnetic recording (HAMR) is a recent development that improves the quality of written data by heating the disk surface during a write operation to reduce the coercivity of the magnetic media, thereby allowing the magnetic field generated by the write coil to magnetize the disk surface more easily. Any suitable technique may be used to heat the surface of the disk in HAMR recording, such as by fabricating a laser diode and a near field transducer (NFT) along with other writing components of the head. Because the quality of the write / read signal depends on the flying height of the head, conventional heads may also include an actuator to control the flying height. Any suitable fly height actuator (FHA) may be used, such as a heater that controls the fly height by thermal expansion, or a piezoelectric (PZT) actuator that operates by mechanical deflection. Summary of the Invention

[0006] Various embodiments disclosed herein are directed to systems and methods for mitigating the effects of servo pattern distortion caused by laser mode hopping that occurs with the use of HAMR laser systems in hard disk drives. Implementations of the present disclosure may use a split-burst servo pattern including a first set and a second set of bursts. In various embodiments, the disk drive control circuit generates a position error signal (PES) based on average values ​​from the first set and the second set of bursts. Averaging values ​​from multiple spaced bursts helps to counter step changes that may occur due to mode hopping. In this manner, implementations help to reduce the occurrence of DC squeezing that may result from servo pattern distortion caused by laser mode hopping.

[0007] Various illustrative aspects are directed to a data storage device comprising one or more disks, an actuation mechanism comprising one or more heads and configured to position the one or more heads proximate disk surfaces of the one or more disks, and one or more processing devices configured to: determine a first burst value based on average values ​​of a first set of one or more bursts, determine a second burst value based on average values ​​of a second set of one or more bursts, generate a position error signal (PES) based on the determined first burst values ​​and the determined second burst values, and control a position of at least one of the one or more heads based on the PES.

[0008] Various illustrative aspects relate to a method that includes determining, by one or more processing devices, a first burst value based on average values ​​of a first set of one or more bursts, determining, by the one or more processing devices, a second burst value based on average values ​​of a second set of one or more bursts, generating, by the one or more processing devices, a position error signal (PES) based on the determined first burst values ​​and the determined second burst values, and controlling, by the one or more processing devices, a position of a head of a data storage device based on the PES.

[0009] Various illustrative aspects are directed to one or more processing devices comprising means for determining a first burst value based on an average value of a first set of one or more bursts, means for determining a second burst value based on an average value of a second set of one or more bursts, means for determining to generate a position error signal (PES) based on the determined first burst values ​​and the determined second burst value, and means for controlling a position of a head of a disk drive based on the PES.

[0010] Various additional aspects are illustrated in the accompanying drawings and will become more apparent based on the following description. [Brief description of the drawings]

[0011] Various features and advantages of the techniques of the present disclosure will become apparent from the following description of specific examples of those techniques and as illustrated in the accompanying drawings. The drawings are not necessarily to scale, emphasis instead being placed on illustrating the principles of the technological concepts. In the drawings, like reference characters may refer to the same parts throughout the different views. The drawings depict only illustrative examples of the present disclosure and are not limiting in scope. [Figure 1]1 illustrates a prior art disk format that includes multiple radially spaced concentric servo tracks defined by servo wedges recorded around the circumference of each servo track. [Figure 2A] 1 illustrates a conceptual block diagram of a top and side view of a data storage device in the form of a disk drive, according to an aspect of the present disclosure. [Figure 2B] 1 illustrates a conceptual block diagram of a top and side view of a data storage device in the form of a disk drive, according to an aspect of the present disclosure. [Figure 2C] 1 depicts a flowchart of an exemplary method that one or more VCM drivers of a disk drive's control circuitry may implement or execute in controlling operations of the disk drive, including head position adjustment operations, according to an aspect of the present disclosure. [Figure 2D] 1 depicts a read / write head including a laser unit according to an aspect of the present disclosure. [Figure 3A] The mechanism of DC bimodal distortion caused by laser mode hopping is depicted. [Figure 3B] The mechanism of DC bimodal distortion caused by laser mode hopping is depicted. [Figure 3C] The mechanism of DC bimodal distortion caused by laser mode hopping is depicted. [Figure 4] 2 shows a conventional null burst servo pattern including a first burst and a second burst. [Diagram 5] 4 illustrates a split null burst servo pattern according to an aspect of the present disclosure. [Figure 6A] 1 illustrates a split-null burst servo pattern for a readback waveform in accordance with an aspect of the present disclosure. [Figure 6B] 1 illustrates a split-null burst servo pattern for a readback waveform in accordance with an aspect of the present disclosure. [Figure 7A]10 illustrates how a split null burst servo pattern according to aspects of the present disclosure mitigates the effects of servo pattern distortion compared to a conventional null burst servo pattern. [Figure 7B] 10 illustrates how a split null burst servo pattern according to aspects of the present disclosure mitigates the effects of servo pattern distortion compared to a conventional null burst servo pattern. [Figure 7C] 10 illustrates how a split null burst servo pattern according to aspects of the present disclosure mitigates the effects of servo pattern distortion compared to a conventional null burst servo pattern. [Figure 8A] 4 shows a graph of measured burst amplitude levels at the crossing points of a sinusoidal waveform of a conventional null burst servo pattern. [Figure 8B] 1 illustrates a graph of measured burst amplitude levels at cross points of a sinusoidal waveform of a split-null burst servo pattern in accordance with an aspect of the present disclosure. [Figure 9] 1 shows a graph depicting a comparison of amplitude levels of a conventional null burst servo pattern and a split null burst servo pattern in accordance with an aspect of the present disclosure. [Figure 10A] 13 illustrates another example of a split null burst servo pattern according to an aspect of the present disclosure. [Figure 10B] 13 illustrates another example of a split null burst servo pattern according to an aspect of the present disclosure. [Figure 10C] 13 illustrates another example of a split null burst servo pattern according to an aspect of the present disclosure. [Figure 11] 1 illustrates an implementation of a burst rotation of a seek according to an aspect of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] 2A and 2B illustrate conceptual block diagrams of top and side views of a data storage device in the form of a disk drive 15 according to an embodiment of the present disclosure. Disk drive 15 includes a control circuit 22, an actuator arm assembly 19, and a number of hard disks 16A, 16B, 16C, 16D ("hard disks 16"). FIG 2C depicts a flowchart of an exemplary method 80 that one or more VCM drivers 24 of control circuit 22 of disk drive 15 may implement or execute in controlling operation of disk drive 15, including head position adjustment operations, according to an embodiment of the present disclosure.

[0013] The actuator arm assembly 19 includes a primary actuator, e.g., a voice coil motor 20 ("VCM 20"), and a number of actuator arms 40 (e.g., a top actuator arm 40A as seen in the perspective views of FIGS. 2A and 2B). Each of the actuator arms 40 includes a suspension assembly 42 at its distal end (e.g., a top suspension assembly 42A included in the top actuator arm 40A in the views of FIGS. 2A and 2B). In some embodiments, each suspension assembly 42 may include one or more auxiliary or fine actuators.

[0014] Each of the actuator arms 40 is configured to suspend a read / write head 18 proximate to a corresponding disk surface 17 (e.g., read / write head 18A is suspended over an uppermost corresponding disk surface 17A by a top actuator arm 40A, and read / write head 18H is suspended over a lowermost corresponding disk surface 17H ​​by a bottom actuator arm 40H). Other embodiments may include any of a wide variety of other numbers of hard disks and disk surfaces, and other numbers of actuator arm assemblies, primary actuators, and fine actuators, other than, for example, one actuator in the form of one actuator arm assembly 19 and VCM 20 in the embodiment of Figures 2A and 2B.

[0015] In various embodiments, disk drive 15 may be considered to perform or execute functions, tasks, processes, methods, and / or techniques, including aspects of exemplary method 80, in terms of its control circuitry 22 performing or executing such functions, tasks, processes, methods, and / or techniques. Control circuitry 22 may comprise and / or take the form of one or more driver devices and / or one or more other processing devices of any type, and in various examples may implement or execute functions, tasks, processes, methods, or techniques by executing computer-readable instructions of software or firmware code on a hardware structure configured to execute such software or firmware code. Control circuitry 22 may also, in various embodiments, implement or execute functions, tasks, processes, methods, or techniques by hardware circuitry that implements or executes such functions, tasks, processes, methods, or techniques by the hardware structure itself, without any operation of software.

[0016] Control circuitry 22 may include one or more processing devices that implement device drivers that are specifically configured to drive and operate a particular device. Such device drivers may include one or more VCM drivers 24 that are configured to drive and operate VCM 20. VCM driver 24 may be configured as an integrated component of one or more larger circuits, such as one or more power large-scale integrated circuit (PLSI) chips or circuits, and / or as part of control circuitry 22, in various embodiments. VCM driver 24 may also be configured as a component within another larger integrated circuit, such as a system on chip (SoC) circuit, that may be operably coupled to other components of control circuitry 22, or as more or less a standalone circuit, in various embodiments.

[0017] The exemplary disk drive 15 of Figures 2A and 2B includes four hard disks 16. Other embodiments may include any number of disks, such as one disk, two disks, three disks, or five or more disks. The hard disks 16 are also known as platters, and their disk surfaces may also be referred to as media or media surfaces. The four hard disks 16 include eight disk surfaces 17A, 17B, 17C, 17D, 17E, 17F, 17G, and 17H ("disk surfaces 17"), one disk surface 17 on each side of each hard disk 16 in this illustrative embodiment. The VCM 20 may perform macroscopic actuation of a number of actuator arms 40, each of which may suspend one of the heads 18, e.g., head 18A, over and adjacent to a corresponding disk surface of the disk 16. The position of head 18, e.g., head 18A, is shown in FIG. 2A and is generally positioned very close to disk surface 17, although when FIGS. 2A and 2B are depicted to scale, head 18 is too small to be seen. Actuator assembly 19 suspends each of heads 18 of each actuator arm 40 over and in close proximity to a corresponding disk surface 17, enabling each head 18 to write control features and data to, and read control features and data from, its respective proximate disk surface 17. In this sense, each head 18 of each actuator arm 40 interacts with a corresponding disk surface 17. Each head 18 writes to and reads from its corresponding disk surface 17 under the positioning control of an actuator of actuator arm assembly 19, which in this embodiment may include VCM 20, potentially additional fine actuators, and which may be controlled by control circuitry 22 in various embodiments.

[0018] FIG. 2D illustrates a close-up view of a head 18A including a laser unit 50 in a HAMR head system according to an aspect of the disclosure. In the embodiment of FIG. 2D, the head 18A includes a laser unit 50 configured to heat the disk surface, a write element 60 (e.g., an inductive coil), a read element 62 (e.g., a magnetoresistive element), and a fly height actuator (FHA) 64 configured to actuate the head 18 vertically over the disk surface 17A. Any suitable FHA 64 may be used, such as a thermal fly height control (TFC) element that operates via thermal expansion, or a piezoelectric actuator that operates by mechanical deflection. The head 18A may also include other optical components associated with the laser unit 50, such as a waveguide and a near-field transducer (NFT) configured to project plasmons onto the disk surface 17A using a laser emitted by the laser unit 50 to heat the area of ​​the disk surface 17A to be written by the write element 60. The arrangement or arrangement of the elements of head 18 is not limited to any particular detail as shown in FIG. 2D, and the elements of head 18 may be arranged in any of a variety of other configurations in other embodiments.

[0019] The term "disk surface" may be understood to have the ordinary meaning that one of ordinary skill in the art has. The term "disk surface" may be understood to include both the very outer surface layer of the disk drive and the volume of disk drive material below the outer surface layer, which may be considered in terms of atomic depth, or (in a very simplified model) the number of atoms deep from the surface layer of atoms that the material is susceptible to physical interaction with the head. The term "disk surface" may include, for example, the portion of the material of the disk susceptible to interaction with a read / write head in disk drive operations such as control write operations, control read operations, data write operations, and data read operations.

[0020] In the embodiment of Figures 2A, 2B, and 2D, each disk surface 17, for example disk surface 17A as shown in Figure 2A, includes a number of control features. The control features are servo wedges 321-32. N (collectively servo wedges 32) which define a plurality of servo tracks 34, and data tracks are defined relative to the servo tracks 34, which may be of the same or different radial densities. The control circuit 22 processes a read signal 36 emanating from each head, for example head 18A, to read from the disk surface 17A and control the servo wedges 321-32. N 1 and demodulates the servo wedge position signal (PES) to generate a position error signal (PES) representative of the error between the actual position of the head and the target position relative to the target track. A servo control system within control circuitry 22 includes filtering the PES from the servo wedge using a suitable compensation filter and controlling VCM 20 to generate a control signal 38 that is applied to actuator arm assembly 19, which rotates actuator arm assembly 19 about an axial pivot, and in various embodiments controls any fine actuators, to effect primary actuation of head 18 corresponding radially over disk surface 17 in a direction that reduces the PES.

[0021] In the embodiment of Figures 2A and 2B, the actuator arm assembly 19 rotates the actuator arm 40 about a common pivot. In another embodiment, the first actuator arm assembly and / or VCM and the second actuator arm assembly and / or VCM, or other type of primary actuator, may each be configured to actuate a respective actuator arm assembly or set of multi-actuator arms, for example, about a separate pivot mounted at a different circumferential position around the disk. In other embodiments, three or more actuator arm assemblies or primary actuators or multi-actuators may be used, which may actuate about a common pivot or may be included in multiple multi-actuators mounted at different circumferential positions around the disk. All of these may be examples of an actuation mechanism comprising one or more heads 18 and configured to position one or more heads 18 proximate to a disk surface 17 of one or more disks 16 according to various embodiments of the present disclosure.

[0022] In performing the example method 80 of FIG. 2C (aspects of which are also described further below with reference to additional figures), control circuitry 22 may be configured to perform one or more internal operations, such as issuing one or more commands to other components of disk drive 15, receiving information from one or more other components of disk drive 15, and / or generating one or more driver currents for output to system components of disk drive 15. Specifically, control circuitry 22 may determine a first burst value based on average values ​​of a first set of one or more bursts and determine a second burst value based on average values ​​of a second set of one or more bursts (82). Control circuitry 22 may further generate a position error signal (PES) based on the determined first burst value and the determined second burst value (84). Control circuitry 22 may further control the position of the head based on the PES (86).

[0023] Referring again to the HAMR disk drive head 18 as shown in FIG. 2D, when the control circuit 22 is applying current (or any form of power) to the laser unit 50 during a write operation, the laser unit 50 may exhibit sudden and unpredictable changes in any of the two or more available modes in which the laser unit 50 emits the laser due to the inherent physical phenomenon of laser emission that causes a transient or sudden shift in magnitude in the output power of the laser being emitted by the laser unit 50. This phenomenon is known as "mode hopping." Because such laser mode hopping can produce sudden and unpredictable changes in laser power, laser mode hopping may also cause sudden and unpredictable changes in write width even if the write current applied to the write element 60 remains constant. That is, a larger or smaller width across the disk surface 17 may be susceptible to a constant write current in response to the laser suddenly becoming stronger or weaker, respectively. When such changes in write width are applied to the servo control feature, laser mode hopping may thus cause distortion of the servo pattern in the servo wedge 32. Such distortion of the servo pattern, sometimes referred to as DC bimodal distortion, or simply "DC bimodality," can result in operational problems in the disk drive 15, such as DC squeeze (also referred to as track squeeze) and / or large repeatable runout (RRO) errors. As such, laser mode hopping has proven to be an undesirable characteristic of HAMR systems and difficult to eliminate. Accordingly, aspects of the present disclosure are directed to systems and methods that, among other advantages, mitigate the effects of servo pattern distortion caused by laser mode hopping.

[0024] 3A-3C depict illustrative examples of DC bimodal distortion mechanisms caused by laser mode hopping. FIG. 3A depicts examples of basic write patterns generated in a servo writing process. Basic servo wedge patterns 301, 302, 303 illustrate three exemplary cases each having a write width change while writing a single servo wedge. Each of the basic servo wedge patterns 301, 302, 303 includes a block 310 and a block 305. The block 310 in each of the basic servo wedge patterns 301, 302, 303 consists of a preamble, a servo address mark (SAM) or a servo index mark (SIM), and Gray-coded track information. The block 305 in each of the basic servo wedge patterns 301, 302, 303 includes a Q burst and a P burst. In the servo writing process, the control circuitry 22 may write a basic servo wedge pattern 302 that overlaps with a previous basic servo wedge pattern 322 by adding a half track radial offset, as shown in Figure 3B. The control circuitry 22 may repeat this writing and moving operation to form a servo wedge across a stroke on the disk surface 17, such as servo wedge 32 of Figure 2A.

[0025] FIG. 3A illustrates that the sudden and unexpected write width variation patterns 311, 312, 313 are caused by laser mode hops as described herein in the basic servo wedge patterns 301, 302, 303, respectively. The slowly increasing tendency of the write width of the basic servo wedge patterns 301, 302, 303 over time (i.e., from left to right) is due to the regular write transients due to the ramp-up of the laser power. The occurrence of the write width variation caused by mode hops is not completely random when writing servo wedges. In most cases, the write width varies as in the write width variation patterns 311, 312, 313 and appears at approximately the same down-track position of all wedges while writing thousands of tracks. As the process progresses further in time and the servo writing progresses radially across the disk surface 17A, the down-track position of the write width variation pattern 311 may gradually shift to the position of the write width variation patterns 312 and / or 313. Because the null burst pattern is formed by stitching polarity inversion patterns, when the write width change overlaps the burst region as shown in basic servo wedge pattern 302 and write width change pattern 312, the impact on the servo positioning operation of disk drive 15 is greater than when the write width change is outside the burst region as shown in write width change patterns 311 and 313.

[0026] 3B shows a close-up view of the distortion of the Q and P bursts caused by the write width variation pattern 312 overlapping the null burst servo pattern of the basic servo wedge pattern 322 as shown in FIG. 3A, which is written adjacent to and overlaps the basic servo wedge pattern 302 having a similarly distorted write width variation pattern 332 between the Q and P bursts of that track. As shown in FIG. 3B, when the write width variation patterns 312, 332 overlap the null burst servo pattern, the burst transition edges can be radially shifted consistently in the adjacent basic servo wedge patterns 302, 322 with respect to the adjacent null burst servo patterns. In the embodiment shown in FIG. 3B, the P and Q bursts are radially shifted by the distortion caused by the write width change such as the write width variation pattern 312 or 332. As a result, the pattern edges of the P and Q bursts are misaligned, creating a radial position difference 342. While null bursts are used in this embodiment, in various embodiments, the control circuitry 22 may write quad bursts. In the case of a quad burst, the control circuitry 22 may write a pair of single-sided bursts that are radially positioned with a 180 degree offset and provide the equivalent functionality of a single null burst. Thus, any null burst embodiment of the present disclosure may also be realized by replacing a single null burst with a pair of single-sided bursts. Thus, in some embodiments, the first set of one or more bursts and the second set of one or more bursts may include null bursts formed by repeatedly writing a single frequency pattern with its pattern phase changed by 180 degrees in each track of the multiple tracks, and in some embodiments, the first set of one or more bursts and the second set of one or more bursts may include a quad burst including a pair of single-sided bursts formed by writing a single frequency pattern in every other track, the single-sided bursts being positioned with a radial offset of one track width from one of the single-sided bursts to the other single-sided burst.

[0027] FIG. 3C illustrates an example cross-track profile of the servo burst signals of the Q and P bursts resulting from the distortion of the null burst servo pattern depicted in FIG. 3B. In the embodiment illustrated in FIG. 3C, the Q burst edge is located on the inner diameter (ID) side with respect to the P burst edge by a shift amount 342. As shown in FIG. 3C, the amplitude of the crossover levels 331, 332 at integer positions is different from the amplitude of the crossover levels 333, 334 at half integer positions because the profile of one burst is radially shifted with respect to the other burst. This cross-point split (also referred to herein as DC bimodality) leads to a slight servo pattern track position scale distortion and undesirable DC track misregistration.

[0028] 4 shows a set of adjacent servo tracks including a conventional null burst servo pattern 410, including an exemplary set of servo bursts of three adjacent tracks, as a basis for comparison of FIG. 5 and subsequent figures, the null burst servo pattern 410 including a first set of servo bursts 411 and a second set of servo bursts 412. The null burst servo pattern 410 may be included in a servo wedge of a servo track of a disk, which may further include a preamble 413, other servo information 414 such as a servo index mark (SIM) or a servo address mark (SAM), and a Gray coded track address representing the address of the corresponding servo track. The first set of bursts 411 may correspond to the P bursts shown in FIG. 3A-3C, and the second set of bursts 412 may correspond to the Q bursts shown in FIG. 3A-3C. In this configuration, the system may be susceptible to undesirable servo sensing degradation, track misalignment, and DC bimodality resulting from distortion of the null burst servo pattern 410 as a result of laser mode hopping, as described, for example, with respect to Figures 3A-3C.

[0029] 5 illustrates a set of adjacent servo tracks including a split null burst servo pattern 510, including an exemplary set of servo bursts of adjacent tracks, in accordance with aspects of the present disclosure. In various embodiments, the split null burst servo pattern 510 includes a first burst 511, a second burst 512, a third burst 513, and a fourth burst 514. The split null burst servo pattern 510 may be included in a servo wedge 32 of a servo track 34 of the disk 16 as shown in FIG. 2A, which may further include a set of preambles 515 and other servo information 516, such as a set of servo index marks (SIMs) or servo address marks (SAMs), and a Gray coded track address representing the address of the corresponding servo track.

[0030] In an embodiment, the control circuit 22 may write the first burst 511 and the fourth burst 514 with one same pattern polarity and the second burst 512 and the third burst 513 with another same pattern polarity by updating their polarities, so that the first and fourth combinations and the second and third combinations are substantially 90 degree offset (e.g., within a nominal design tolerance of a 90 degree offset) relative to the first radial position. In this example, the first burst 511 and the fourth burst 514 constitute a first set of null bursts, and the second burst 512 and the third burst 513 constitute a second set of null bursts. According to an aspect of the present disclosure, when demodulating the split-null burst servo pattern 510, the control circuit 22 may determine an average value of the amplitudes of the first burst 511 and the fourth burst 514 as one burst value (e.g., a P burst value) and determine an average value of the amplitudes of the second burst 512 and the third burst 513 as another burst value (e.g., a Q burst value). In this manner, the control circuit 22 may sample the split-null burst servo pattern 510 from multiple down-track positions, so that the P burst value and the Q burst value may be derived as average values, which may help counteract the effects of unforeseen write width changes that may cause distortion of the servo pattern.

[0031] 6A and 6B show a split null burst servo pattern 510 for a readback waveform 610 generated by reading a preamble 515, other servo information 516, and burst patterns 511-514 according to an illustrative embodiment of the present disclosure. As shown in FIGS. 6A and 6B, the split null burst servo pattern 510 includes four bursts across three adjacent servo tracks, including radially aligned burst pair 511, 514 and radially aligned burst pair 512, 513. According to an embodiment of the present disclosure, when demodulating the split null burst servo pattern 510, the control circuit 22 determines a P magnitude by averaging amplitude values ​​from a first burst pair 511, 514, and the control circuit 22 determines a Q magnitude by averaging amplitude values ​​from a second burst pair 512, 513 (e.g., as in 82 of method 80 of FIG. 2C). After determining the P magnitude and Q magnitude in this manner, control circuitry 22 may then use the determined P magnitude and Q magnitude to derive a PES in a conventional manner (e.g., as in 84 of method 80 of FIG. 2C). After determining the PES in this manner, control circuitry 22 may then control the position of the head based on the PES (e.g., as in step 86 of method 80 of FIG. 2C).

[0032] In various embodiments, the second burst 512 and the third burst 513 are located longitudinally (e.g., circumferentially) along the track between the first burst 511 and the fourth burst 514. In this manner, the first burst 511 and the fourth burst 514 are spaced apart from one another along the track, which spacing, combined with the averaging described herein, helps to mitigate the effects of sudden and unexpected write width changes that cause distortion of the servo pattern.

[0033] 5 and 6, the split null burst servo pattern 510 differs from a conventional burst pattern including an A burst, a B burst, a C burst, and a D burst because the four A bursts to D bursts in the conventional burst pattern are located at four different radial positions. In contrast to such conventional burst patterns, the split null burst servo pattern 510 shown in FIG. 5 and 6 includes two bursts (e.g., bursts 511 and 514) at the same first radial position 621 and two bursts (e.g., bursts 513 and 513) at the same second radial position 622 that is different from the first radial position 621. Writing two bursts at the same first radial position and writing two bursts at the same second radial position provides averaging of burst signal values ​​as described herein for the purpose of mitigating the effects of servo pattern distortion caused by sudden write width changes resulting from laser mode hops.

[0034] 7A-7C illustrate how a split null burst servo pattern according to an embodiment of the present disclosure mitigates the effects of servo pattern distortion compared to a conventional null burst servo pattern. In this example, the effect of mode hope on the servo DC scale is quantified as the relative shift of the P and Q bursts, denoted by ΔPQ.

[0035] FIG. 7A illustrates a diagram of a conventional null burst servo pattern 710 consisting of a P burst and a Q burst (e.g., similar to FIG. 4), where the Q burst is subject to distortion (e.g., edge shift) due to a sudden write width change resulting from a laser mode hop. As shown in FIG. 7A, the distortion results in an edge shift indicated by δ (equivalent to the radial position shift 342 in FIG. 3B). FIG. 7A also illustrates a graph 720 of the reading of the P burst and the Q burst, where the Q burst cross-track profile is shifted to the right due to the edge shift δ. In this example of a conventional null burst servo pattern, ΔPQ is quantified as δ.

[0036] 7B illustrates a diagram of a split null burst servo pattern 730 according to an embodiment of the present disclosure, the split null burst servo pattern consisting of a first burst P0, a second burst Q0, a third burst Q1, and a fourth burst P1. The split null burst servo pattern shown in FIG. 7B may be equivalent to split null burst servo pattern 510, where burst P0 corresponds to first burst 511, burst Q0 corresponds to second burst 512, burst Q1 corresponds to third burst 513, and burst P1 corresponds to fourth burst 514. In the example shown in FIG. 7B, the sudden write width change is in a position to cause a burst edge shift of magnitude δ in burst P1. 7B also shows a graph 740 of the reading of the first burst P0, the second burst Q0, the third burst Q1, and the fourth burst P1, where the P1 cross-track profile is shifted to the right relative to the P0 cross-track profile due to edge shift δ, while the cross-track profiles of Q0 and Q1 are identical. In this example, ΔPQ is quantified as δ / 2, which is a 50% reduction in the effect of mode hop impact on the conventional null burst servo pattern depicted in FIG. 7A.

[0037] 7C illustrates a diagram of a split null burst servo pattern 750 according to an embodiment of the present disclosure, the split null burst servo pattern consisting of a first burst P0, a second burst Q0, a third burst Q1, and a fourth burst P1. The split null burst servo pattern shown in FIG. 7C may be equivalent to split null burst servo pattern 510, where burst P0 corresponds to first burst 511, burst Q0 corresponds to second burst 512, burst Q1 corresponds to third burst 513, and burst P1 corresponds to fourth burst 514. In the embodiment shown in FIG. 7C, the sudden write width change is in a position to cause a burst edge shift of magnitude δ in bursts P1 and Q1. 7C also shows a graph 760 of the reading of the first burst P0, the second burst Q0, the third burst Q1, and the fourth burst P1, where the P1 and Q1 cross track profiles are shifted to the right relative to the P0 and Q0 cross track profiles due to the edge shift δ. In this example, ΔPQ is quantified as 0, which is a 100% reduction, or complete elimination, of the effect of mode hop impact on the conventional null burst servo pattern depicted in FIG.

[0038] FIG. 8A shows a graph 810 of measured burst amplitude levels at the cross-points of the cross-track profile of a conventional null burst servo pattern (e.g., similar to FIG. 4) consisting of P and Q bursts, with normalized combined burst amplitudes plotted across radial position. FIG. 8B shows a graph 820 of measured burst amplitude levels including the cross-points of the cross-track profile of the split null burst servo pattern 510 of FIGS. 5 and 6 according to an embodiment of the present disclosure, with normalized combined burst amplitudes plotted across radial position. The data included in graphs 810, 820 was measured for two different demodulation settings on the same servo track. Graph 810 shows a burst cross-point level shift due to mode hopping at 815. Graph 820 shows that the burst cross-point level shift is mitigated at 825 and the level split due to the write transient is cancelled at 830.

[0039] 9 shows a graph depicting a comparison of amplitude levels of a conventional null burst servo pattern consisting of a P burst and a Q burst (e.g., similar to FIG. 4) and the split null burst servo pattern 510 of FIG. 5 and FIG. 6 according to an embodiment of the present disclosure. Graphs 905, 915, 925, 935, and 945 show the levels of five implementations of a conventional null burst servo pattern consisting of a P burst and a Q burst (e.g., similar to FIG. 4). Graphs 910, 920, 930, 940, and 950 show the levels of five implementations of the split null burst servo pattern 510 of FIG. 5 and FIG. 6 according to an embodiment of the present disclosure read by the same five respective heads as the conventional null burst servo patterns shown in graphs 905, 915, 925, 935, and 945. Graphs 905 and 910 show the levels read using the same first head. Graphs 915 and 920 show levels read using the same second head. Graphs 925 and 930 show levels read using the same third head. Graphs 935 and 940 show levels read using the same fourth head. Graphs 945 and 950 show levels read using the same fifth head. The graphs in Figure 9 demonstrate that using the split null burst servo pattern 510 of Figures 5 and 6 according to aspects of the present disclosure reduces the effects of DC bimodality.

[0040] 10A-10C show examples of other split-null burst servo patterns according to aspects of the present disclosure, where the polarity configuration between the sets of bursts is somewhat similar to that of the example of Figure 5. Implementations are not limited to the examples described herein, and other split-null burst servo patterns may be used.

[0041] Figure 10A shows an embodiment of a three-burst split null burst servo pattern 1010, where a first set of null bursts includes a first burst 1011 and a third burst 1013 at the same first radial location and with a first pattern polarity, and a second set of one or more null bursts includes a single second burst 1012 at a second radial location and with a second pattern polarity different from the first radial location and the first pattern polarity, thereby achieving a polarity configuration between the first and second sets of bursts somewhat similar to that of the embodiment of Figure 5. Thus, a set of bursts may include one or more sets of bursts, and in this embodiment may include a single burst, as is the case for the set of second burst 1012. According to an aspect of the disclosure, the second burst 1012 is between the first burst 1011 and the third burst 1013 in the longitudinal direction of the track, so that the first burst 1011 and the third burst 1013 are spaced apart from each other in this direction. In this embodiment, the down-track symmetric layout helps to counteract write transients. In this embodiment, the second burst 1012 has a different length from each of the first burst 1011 and the third burst 1013 in the longitudinal direction of the track. According to aspects of the present disclosure, when demodulating the split null burst servo pattern 1010, the control circuitry 22 may determine an average value (e.g., of its amplitude) of a first set of bursts including the first burst 1011 and the third burst 1013 as a first burst value (e.g., a P burst value) and may determine an average value (e.g., of its amplitude) of a second set of bursts including only the second burst 1012 as a second burst value (e.g., a Q burst value). Thus, in some embodiments, such as FIG. 10B, the control circuitry 22 may average one or more sets of values, which in this embodiment consist of only a single value of the second burst 1012; mathematically, the sets may include only a single value, and the average of the single values ​​simply equals the single value.In this manner, the control circuit 22 can use an average value when determining the P burst value and the Q burst value and generating the PES based on the determined first P burst value and the determined second Q burst value, which can also help counteract the effects of unexpected write width changes that may cause distortion of the servo pattern.

[0042] 10B illustrates an embodiment of a split null burst servo pattern 1020 consisting of five bursts, where a first set of null bursts includes a first burst 1021, a third burst 1023, and a fifth burst 1025 that are all at the same first radial location, and a second set of null bursts includes a second burst 1022 and a fourth burst 1024 that are both at the same second radial location different from the first radial location. According to aspects of the present disclosure, the second burst 1022 and the fourth burst 1024 are between the first burst 1021, the third burst 1023, and the fifth burst 1025 in the longitudinal direction of the track, such that the first burst 1021, the third burst 1023, and the fifth burst 1025 are spaced apart from each other in this direction. In this embodiment, the first burst 1021, the third burst 1023, and the fifth burst 1025 each have a first burst length along the length of the track, and the second burst 1022 and the fourth burst 1024 each have a second burst length along the length of the track, the second burst length being different from the first burst length (e.g., longer than the first burst length).

[0043] FIG. 10C illustrates an embodiment of a split null burst servo pattern 1030 consisting of six bursts, where a first set of null bursts includes a first burst 1031, a third burst 1033, and a fifth burst 1035, all at the same first radial position, and a second set of null bursts includes a second burst 1032, a fourth burst 1034, and a sixth burst 1036, all at the same second radial position different from the first radial position. According to an aspect of the present disclosure, the odd-numbered bursts and the even-numbered bursts are arranged or disposed alternately with each other in the longitudinal direction of the track, such that the respective bursts at the first radial position and the second radial position are spaced apart from each other in this direction. In this embodiment, each of the bursts has the same burst length in the longitudinal direction of the track. In this embodiment, the combination of shorter bursts makes the pattern more mode hop resistant. Thus, even in embodiments 10B and 10C, control circuit 22 may determine a first average value of a first set of one or more bursts and a second average value of a second set of one or more bursts, and generate a PES based on the determined first burst values ​​and the determined second burst values.

[0044] FIG. 11 illustrates an implementation of a burst rotation for a seek according to an embodiment of the present disclosure. FIG. 11 illustrates servo sectors including a split null burst servo pattern according to an embodiment of the present disclosure. FIG. 11 also illustrates how the radial velocity of the head varies along these servo sectors. In the example shown in FIG. 11, the split null burst servo pattern corresponds to pattern 1010 of FIG. 10A, and burst N b , Q, and N a correspond to bursts 1011, 1012, and 1013, respectively. The control circuit 22 generates servo burst signals N a and N b To adjust the amplitude of , the following matrix equation may be implemented:

[0045]

number

number

[0046] Any suitable control circuitry, such as any suitable integrated circuit or circuits, may be used to implement the flow diagrams in the above examples. For example, the control circuitry may be implemented in a read channel integrated circuit, or in a component separate from the read channel, such as a data storage controller, or certain operations described above may be performed by the read channel and other operations may be performed by the data storage controller. In some embodiments, the read channel and data storage controller may be implemented as separate integrated circuits, and in some examples, the read channel and data storage controller may be fabricated in a single integrated circuit or system on a chip (SoC). In some embodiments, the control circuitry may include a suitable preamp circuitry implemented as a separate integrated circuit, integrated into the read channel or data storage controller circuitry, or integrated into the SoC.

[0047] In some embodiments, the control circuitry may comprise a microprocessor that executes instructions operable to cause the microprocessor to perform one or more aspects of the methods, processes, or techniques illustrated in the flow diagrams and described herein with reference thereto. The executable instructions of the present disclosure may be stored on any computer-readable medium. In some embodiments, the executable instructions of the present disclosure may be stored on a non-volatile semiconductor memory device, component, or system external to the microprocessor, or may be integrated with the microprocessor in an SoC. In some embodiments, the executable instructions of the present disclosure may be stored on one or more disks and loaded into a volatile semiconductor memory when the disk drive is powered on. In some embodiments, the control circuitry may comprise logic circuitry, such as a state machine circuitry. In some embodiments, at least some of the flow diagram blocks may be implemented using analog circuitry (e.g., analog comparators, timers, etc.). In some embodiments, at least some of the flow diagram blocks may be implemented using digital circuitry or a combination of analog and digital circuitry.

[0048] In various embodiments, one or more processing devices may comprise or configure control circuitry as described herein and / or perform one or more of the functions of the control circuitry as described herein. In various embodiments, the control circuitry, or one or more other processing devices performing one or more of the functions of the control circuitry as described herein, may be abstracted away from physical proximity to disks and disk surfaces. The control circuitry, and / or its one or more device drivers, and / or one or more processing devices of any other type performing one or more of the functions of the control circuitry as described herein, may in various embodiments be part of or in proximity to a rack of multiple data storage devices or a stand-alone product comprising multiple data storage devices, part of or in proximity to one or more physical or virtual servers, part of or in proximity to one or more local area networks or one or more storage area networks, part of or in proximity to a data center, or hosted on one or more cloud services.

[0049] In various embodiments, the disk drive may include a magnetic disk drive, an optical disk drive, a hybrid disk drive, or other type of disk drive. Some embodiments may include an electronic device, such as a computing device, a data server device, a media content storage device, or other device, component, or system that may include a storage medium and / or control circuitry as described above.

[0050] The various features and processes described above may be used independently of each other or may be combined in various ways. All possible combinations and subcombinations are within the scope of the present disclosure. In some implementations, certain methods, events, or process blocks may be omitted. The methods and processes described herein are not limited to any particular order, and the blocks or states associated therewith may be performed in other orders. For example, the tasks or events described may be performed in an order other than that specifically disclosed, or multiple ones may be combined into a single block or state. The example tasks or events may be performed in series, in parallel, or in another manner. Tasks or events may be added to or removed from the disclosed examples. The example systems and components described herein may be configured differently than described. For example, elements may be added, removed, or rearranged compared to the disclosed examples.

[0051] Although certain exemplary embodiments are described herein, these embodiments are presented by way of example only and do not limit the scope of the invention disclosed herein. Thus, nothing in the above description implies that any particular feature, characteristic, step, module, or block is required or essential. The novel methods and systems described herein may be embodied in a variety of other forms. Various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the spirit and scope of the present disclosure.

[0052] Method 80, and other methods of the present disclosure, may include other steps or variations in various other embodiments. Any or all of method 80 and other methods of the present disclosure may be performed or embodied in hardware and / or performed or executed by a controller, CPU, FPGA, SoC, measurement and control multi-processor system on chip (MPSoC), which may include both CPU and FPGA together with other elements in one integrated SoC, or other processing or computing devices that process executable instructions in controlling other related hardware, devices, systems, or products in performing, implementing, or embodying various subject matter of the methods.

[0053] Thus, data storage systems, devices, and methods that implement and embody the novel advantages of the present disclosure are shown and described herein in various fundamental aspects and various selected illustrative applications, architectures, techniques, and methods for implementing and embodying the novel advantages of the present disclosure. Those skilled in the relevant art will be fully equipped with this disclosure to understand, and an informed reduction to the implementation of, a wide range of further applications, architectures, techniques, and methods for the novel advantages, techniques, methods, processes, devices, and systems encompassed by the present disclosure and the claims that follow.

[0054] As used herein, the statement "at least one of A, B, and C" is intended to mean "either A, B, C, or any combination of A, B, and C." The description of the disclosed examples is provided to enable those skilled in the relevant art to understand how to make or use the subject matter of the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art based on this disclosure, and the general principles defined herein may be applied to other examples without departing from the spirit or scope of the present disclosure. Thus, the present disclosure is not limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0055] The present disclosure and many of its attendant advantages will be understood from the foregoing description, and various changes may be made in the form, construction, and arrangement of the elements without departing from the disclosed subject matter or sacrificing all or any of its material advantages. The forms described are merely illustrative, and the following claims encompass and include a wide range of embodiments, including a wide range of examples that encompass any such changes in the form, construction, and arrangement of the elements as described herein.

[0056] Although the present disclosure has been described with reference to various examples, it will be understood that these examples are illustrative and that the scope of the present disclosure is not limited thereto. All subject matter described herein is presented in the form of illustrative, non-limiting examples, and not as exclusive implementations, whether or not explicitly called out as examples for purposes of illustration. Many variations, modifications, and additions are possible within the scope of the examples of the present disclosure. More generally, the examples according to the present disclosure are described in the context of specific implementations. Functions may be separated or combined in separate blocks or described in different terms in various examples of the present disclosure without departing from the spirit and scope of the present disclosure and the following claims. These and other variations, modifications, additions, and improvements may be included within the scope of the present disclosure, as defined in the following claims. The following items are elements that are claimed in the international application: (Item 1) 1. A data storage device comprising: One or more disks; an actuation mechanism comprising one or more heads and configured to position the one or more heads proximate to disk surfaces of the one or more disks; one or more processing devices, determining a first burst value based on an average value of a first set of one or more bursts; determining a second burst value based on the average values ​​of a second set of one or more bursts; generating a position error signal (PES) based on the determined first burst value and the determined second burst value; and one or more processing devices configured to: control a position of at least one of the one or more heads based on the PES. (Item 2) the first set of one or more bursts includes a first burst and a third burst each at a first radial position; 2. The data storage device of claim 1, wherein the second set of one or more bursts includes a second burst at a second radial position different from the first radial position. (Item 3) 3. The data storage device of claim 2, wherein the second burst is between the first burst and the third burst along the length of the track. (Item 4) the first set of one or more bursts includes a first burst and a fourth burst each at a first radial position; 2. The data storage device of claim 1, wherein the second set of one or more bursts includes a second burst and a third burst, each at a second radial position different from the first radial position. (Item 5) 5. The data storage device of claim 4, wherein the second burst and the third burst are between the first burst and the fourth burst along the length of the track. (Item 6) 5. The data storage device of claim 4, wherein the second burst and the third burst are written radially offset substantially 90 degrees relative to the first burst and the fourth burst. (Item 7) the first set of one or more bursts comprising a plurality of first bursts each at a first radial position and spaced apart from one another along a longitudinal direction of the track; 2. The data storage device of claim 1, wherein the second set of one or more bursts includes a plurality of second bursts each at a second radial position and spaced apart from one another along the longitudinal direction of the track, the second radial positions being different from the first radial positions. (Item 8) 8. The data storage device of claim 7, wherein each of the plurality of first bursts and each of the plurality of second bursts are arranged alternately along the longitudinal direction of the track. (Item 9) 2. The data storage device of claim 1, wherein each of the one or more heads includes a laser unit configured to heat the disk surface during a write operation. (Item 10) 2. The data storage device of claim 1, wherein the one or more processing devices are further configured to adjust amplitudes of the determined first burst value and the determined second burst value in response to a radial velocity of the one or more heads relative to the disk surface. (Item 11) 2. The data storage device of claim 1, wherein the first set of one or more bursts and the second set of one or more bursts include null bursts formed by repeatedly writing a single frequency pattern with a pattern phase shift of 180 degrees in each track of a plurality of tracks. (Item 12) 2. The data storage device of claim 1, wherein the first set of one or more bursts and the second set of one or more bursts include quad bursts, the quad bursts including a pair of one-sided bursts formed by writing a single frequency pattern to every other track of a plurality of tracks. (Item 13) 1. A method comprising: determining, by the one or more processing devices, a first burst value based on average values ​​of a first set of one or more bursts; determining, by the one or more processing devices, a second burst value based on average values ​​of a second set of one or more bursts; generating, by the one or more processing devices, a position error signal (PES) based on the determined first burst value and the determined second burst value; and controlling, by the one or more processing devices, a position of a head of a data storage device based on the PES. (Item 14) the first set of one or more bursts includes a first burst and a third burst each at a first radial position; the second set of one or more bursts includes a second burst at a second radial position different from the first radial position; Item 14. The method of item 13, wherein the second burst is between the first burst and the third burst along the length of the track. (Item 15) the first set of one or more bursts includes a first burst and a fourth burst each at a first radial position; the second set of one or more bursts includes a second burst and a third burst, each at a second radial position different from the first radial position; the second burst and the third burst are located between the first burst and the fourth burst along a longitudinal direction of the track; Item 14. The method of item 13, wherein the second burst and the third burst are written radially offset substantially 90 degrees relative to the first burst and the fourth burst. (Item 16) the first set of one or more bursts includes a plurality of first bursts each at a first radial position and spaced apart from one another along a longitudinal direction of the track; the second set of one or more bursts includes a plurality of second bursts each at a second radial position and spaced apart from one another along the longitudinal direction of the track; the second radial position is different from the first radial position; Item 14. The method according to item 13, wherein each of the plurality of first bursts and each of the plurality of second bursts are alternately arranged along the longitudinal direction of the track. (Item 17) one or more processing devices, means for determining a first burst value based on an average value of a first set of one or more bursts; means for determining a second burst value based on an average value of a second set of one or more bursts; means for generating a position error signal (PES) based on the determined first burst value and the determined second burst value; and means for controlling a position of a head of a disk drive based on the PES. (Item 18) the first set of one or more bursts includes a first burst and a third burst each at a first radial position; the second set of one or more bursts includes a second burst at a second radial position different from the first radial position; Item 18. The one or more processing devices of item 17, wherein the second burst is between the first burst and the third burst along the length of the track. (Item 19) the first set of one or more bursts includes a first burst and a fourth burst each at a first radial position; the second set of one or more bursts includes a second burst and a third burst, each at a second radial position different from the first radial position; the second burst and the third burst are located between the first burst and the fourth burst along a longitudinal direction of the track; Item 18. The one or more processing devices of item 17, wherein the second burst and the third burst are written radially offset substantially 90 degrees relative to the first burst and the fourth burst. (Item 20) the first set of one or more bursts includes a plurality of first bursts each at a first radial position and spaced apart from one another along a longitudinal direction of the track; the second set of one or more bursts includes a plurality of second bursts each at a second radial position and spaced apart from one another along the longitudinal direction of the track; the second radial position is different from the first radial position; Item 18. The one or more processing devices according to item 17, wherein each of the plurality of first bursts and each of the plurality of second bursts are arranged alternately along the longitudinal direction of the track.

Claims

1. 1. A data storage device, comprising: One or more disks; an actuation mechanism comprising one or more heads and configured to position the one or more heads proximate disk surfaces of the one or more disks; one or more processing devices, determining a first burst value based on an average value of a first set of one or more bursts in the servo pattern; determining a second burst value based on an average value of a second set of one or more bursts in the servo pattern; generating a position error signal (PES) based on the determined first burst value and the determined second burst value; and controlling a position of at least one of the one or more heads based on the PES; At least one of the first set of one or more bursts and the second set of one or more bursts comprises a plurality of spaced apart bursts in the servo pattern; the spacing is along a length of a track including the first and second sets of bursts; Data storage device.

2. the first set of one or more bursts includes a first burst and a third burst each at a first radial position; 2. The data storage device of claim 1, wherein the second set of one or more bursts includes a second burst at a second radial location different from the first radial location.

3. 3. The data storage device of claim 2, wherein the second burst is between the first burst and the third burst along the length of the track.

4. the first set of one or more bursts includes a first burst and a fourth burst each at a first radial position; 2. The data storage device of claim 1, wherein the second set of one or more bursts includes a second burst and a third burst, each at a second radial position different from the first radial position.

5. 5. The data storage device of claim 4, wherein the second burst and the third burst are between the first burst and the fourth burst along the length of the track.

6. 5. The data storage device of claim 4, wherein the second burst and the third burst are written radially offset substantially 90 degrees relative to the first burst and the fourth burst.

7. the first set of one or more bursts comprising a plurality of first bursts each at a first radial position and spaced apart from one another along the longitudinal direction of the track; 2. The data storage device of claim 1, wherein the second set of one or more bursts includes a plurality of second bursts each at a second radial position and spaced apart from one another along the longitudinal direction of the track, the second radial positions being different from the first radial positions.

8. 8. The data storage device of claim 7, wherein each of the plurality of first bursts and each of the plurality of second bursts are alternately disposed along the longitudinal direction of the track.

9. The data storage device of claim 1 , wherein each of the one or more heads includes a laser unit configured to heat the disk surface during a write operation.

10. 2. The data storage device of claim 1, wherein the one or more processing devices are further configured to adjust amplitudes of the determined first burst value and the determined second burst value in response to a radial velocity of the one or more heads relative to the disk surface.

11. 2. The data storage device of claim 1, wherein the first set of one or more bursts and the second set of one or more bursts include null bursts formed by repeatedly writing a single frequency pattern with a pattern phase shift of 180 degrees in each track of a plurality of tracks.

12. 2. The data storage device of claim 1, wherein the first set of one or more bursts and the second set of one or more bursts comprise quad bursts comprising a pair of one-sided bursts formed by writing a single frequency pattern in every other track of a plurality of tracks.

13. 1. A method comprising: determining, by the one or more processing devices, a first burst value based on an average value of a first set of one or more bursts; determining, by the one or more processing devices, a second burst value based on a second set of average values ​​of one or more bursts; generating, by the one or more processing devices, a position error signal (PES) based on the determined first burst value and the determined second burst value; and controlling, by the one or more processing devices, a position of a head of a data storage device based on the PES; the first set of one or more bursts and the second set of one or more bursts comprise either a null burst or a quad burst; the null burst is formed by repeatedly writing a single frequency pattern in each track of a plurality of tracks, the pattern phase of which is shifted by 180 degrees; the quad burst includes a pair of one-sided bursts formed by writing a single frequency pattern on every other track of a plurality of tracks; method.

14. the first set of one or more bursts includes a first burst and a fourth burst each at a first radial position; the second set of one or more bursts includes a second burst and a third burst, each at a second radial position different from the first radial position; the second burst and the third burst are located between the first burst and the fourth burst along a longitudinal direction of the track; 14. The method of claim 13, wherein the second burst and the third burst are written radially offset substantially 90 degrees relative to the first burst and the fourth burst.

15. the first set of one or more bursts includes a plurality of first bursts each at a first radial position and spaced apart from one another along a longitudinal direction of the track; the second set of one or more bursts includes a plurality of second bursts each at a second radial position and spaced apart from one another along the longitudinal direction of the track; the second radial position is different from the first radial position; The method of claim 13 , wherein each of the plurality of first bursts and each of the plurality of second bursts are disposed in an alternating manner along the longitudinal direction of the track.

16. one or more processing devices, means for determining a first burst value based on an average value of a first set of one or more bursts; means for determining a second burst value based on an average value of a second set of one or more bursts; means for generating a position error signal (PES) based on the determined first burst value and the determined second burst value; means for controlling a position of a head of a disk drive based on the PES; means for adjusting the amplitude of the determined first burst value and the determined second burst value in response to a radial velocity of the one or more heads relative to a disk surface; One or more processing devices.

17. the first set of one or more bursts includes a first burst and a fourth burst each at a first radial position; the second set of one or more bursts includes a second burst and a third burst, each at a second radial position different from the first radial position; the second burst and the third burst are located between the first burst and the fourth burst along a longitudinal direction of the track; 17. The one or more processing devices of claim 16, wherein the second burst and the third burst are written radially offset substantially 90 degrees relative to the first burst and the fourth burst.

18. The method according to claim 17, wherein the first set of one or more bursts includes a first burst and a third burst each at a first radial position and having a first pattern polarity; the second set of one or more bursts includes a second burst having a second radial position and a second pattern polarity different from the first radial position and the first pattern polarity; 2. The data storage device of claim 1, wherein the second burst is disposed between the first burst and the third burst in the longitudinal direction of the track such that the first burst and the third burst are spaced apart from each other in the longitudinal direction of the track.

19. The method of claim 18, wherein the first set of one or more bursts includes a first burst, a third burst and a fifth burst that are spaced apart from one another at a same first radial position within the servo pattern and have a first burst length along the longitudinal direction of the track; the second set of one or more bursts includes a second burst and a fourth burst at a same second radial position different from the first radial position in the servo pattern and having a second burst length in the longitudinal direction of the track; such that the first burst, the third burst and the fifth burst are spaced apart from one another in the longitudinal direction of the track; 2. The data storage device of claim 1, wherein the second burst and the fourth burst are disposed between the first burst, the third burst and the fifth burst in the longitudinal direction of the track.

20. The servo pattern according to claim 1, wherein the first set of one or more bursts includes a first burst, a third burst, and a fifth burst at a same first radial position within the servo pattern; the second set of one or more bursts includes a second burst, a fourth burst and a sixth burst at a same second radial position different from the first radial position in the servo pattern; the odd-numbered bursts include the first burst, the third burst, and the fifth burst; the even-numbered bursts include the second burst, the fourth burst, and the sixth burst; 2. The data storage device of claim 1, wherein the second burst, the fourth burst and the sixth burst are interleaved with each other in the longitudinal direction of the track such that the respective bursts at the first radial position and the second radial position are spaced apart from each other in the longitudinal direction of the track.

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