COMMUNICATION SYSTEM, TRANSMITTING APPARATUS, AND COMMUNICATION METHOD

The communication system addresses the issue of delayed main signal arrival by replicating and timing-adjusted transmission of main signals, enhancing transfer rates and ensuring correct sub-signal decoding.

JP7616355B2Active Publication Date: 2025-01-17NIPPON TELEGRAPH & TELEPHONE CORP
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Patent Information

Application Number
JP2023512516
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-04-05
Publication Date
2025-01-17
Estimated Expiration
2041-04-05

AI Technical Summary

Technical Problem

In communication systems with redundant paths, adding a fixed delay to main signals to account for route delay differences can cause the main signal that should arrive first to arrive later, leading to longer signal intervals and reduced transfer rates.

Method used

A communication system that replicates main signals based on the number of paths and adjusts transmission timing using delay information to ensure the main signal arrives first, while decoding sub-signals based on reception timing and path delay variance to maintain order.

Benefits of technology

Improves the transfer rate of main signals by preventing late arrival and maintaining signal order, allowing correct decoding of sub-signals without unnecessarily elongating signal intervals.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

This communication system performs multiplex communication of a main signal and a sub-signal via a plurality of paths between a transmission device and a reception device. The transmission device includes: a duplicating unit which duplicates, in accordance with the number of paths, a main signal to be communicated on a main signal channel; a conversion unit which converts a sub-signal communicated on a sub-signal channel into a delay amount; and a transmission control unit which transmits, on the basis of the delay amount, the main signal to each path. The reception device includes: a selection unit which selects, in accordance with the reception timing of the main signal, a main signal to be communicated on the main signal channel; and a decoding unit which decodes a sub-signal communicated on the sub-signal channel, on the basis of which path the selected main signal has been received through. The conversion unit converts at least one sub-signal into a delay amount, on the basis of delay information calculated from path delays measured from respective paths.
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Description

[Technical field]

[0001] The present embodiment relates to a communication system, a transmitting device, and a communication method. [Background technology]

[0002] Among communication systems that use redundant paths to communicate frames, there are communication systems that can switch without momentary interruption. Among these communication systems that can switch without momentary interruption, there are also communication systems that can multiplex communication of a main signal and a secondary signal without assigning an identifier to the main signal. In this communication system, a transmitting device creates copies of the main signal according to the number of redundant paths. Then, each main signal is assigned a delay amount converted based on the secondary signal. In a receiving device, the secondary signal is decoded from the series of port numbers at which the main signal arrived first. [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] Kawakami, “A Study on Information Transmission Method Using Transmission Timing in Redundant Paths”, 2020 General Conference B-8-45. Summary of the Invention [Problem to be solved by the invention]

[0004] If the delay amount given to the main signal is a fixed amount, the main signal that should arrive first may arrive later depending on the path delay difference between the paths. Also, by giving a fixed delay amount that is sufficiently large compared to the path delay difference between the paths, the main signal that should arrive first is prevented from arriving later. On the other hand, the signal interval of the main signal becomes longer. This reduces the transfer rate of the main signal.

[0005] The embodiments provide a communication system, a transmitting device, and a communication method that can improve the transmission rate of a main signal while suppressing a main signal that should arrive first from arriving late. [Means for solving the problem]

[0006] A communication system according to one embodiment is a communication system that performs multiplex communication of a primary signal and at least one secondary signal via a plurality of paths between a transmitting device and a receiving device. The transmitting device includes a replicating unit that replicates a primary signal communicated on a primary signal channel in accordance with the number of paths, a converting unit that converts at least one secondary signal communicated on a secondary signal channel into a delay amount that is an amount of delay to be imparted to each of the replicated primary signals, and a transmission control unit that transmits each replicated primary signal to each path based on the delay amount. The receiving device includes a selecting unit that selects a primary signal communicated on a primary signal channel in accordance with a reception timing of each primary signal, and a decoding unit that decodes at least one secondary signal communicated on at least one secondary signal channel based on which path the selected primary signal was received via. The converting unit converts at least one secondary signal into a secondary signal from delay information based on a path delay and a variance of the path delay measured from each path. , the minimum delay difference between the average path delays measured from each path plus the jitter, and which limits the reversal of the arrival order of the main signal to a desired rate. Convert it into a delay amount. Effect of the Invention

[0007] According to the embodiments, a communication system, a transmission device, and a communication method are provided that can improve the transfer rate of a main signal while suppressing a main signal that should arrive first from arriving late. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram showing an example of a schematic configuration of a communication system according to each embodiment. [Diagram 2] FIG. 2 is a functional block diagram of an example of the uninterruptible unit UA in the first embodiment. [Diagram 3] FIG. 3 is a diagram illustrating a table as an example of the delay information. [Figure 4] FIG. 4 is a diagram illustrating an example of a hardware configuration of the uninterruptible unit UA. [Diagram 5]FIG. 5 is a flowchart showing an example of a transmission processing operation of the uninterruptible unit UA. [Figure 6] FIG. 6 is a flowchart showing an example of the reception processing operation of the uninterruptible unit UA. [Figure 7] FIG. 7 is a timing chart showing a first operation when a delay is applied based on delay information in the uninterruptible unit UA on the transmitting side according to the first embodiment. [Figure 8] FIG. 8 is a timing chart showing a second operation when a delay is applied based on delay information in the uninterruptible unit UA on the transmitting side according to the second embodiment. [Figure 9] FIG. 9 is a functional block diagram of an example of an uninterruptible unit UA in the third embodiment. [Figure 10] FIG. 10 is a timing chart showing the operation when the interruption-free unit UA on the transmitting side of the fourth embodiment pre-transmits the main signal based on delay information. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment will be described with reference to the drawings. [First embodiment] The communication system multiplexes signals between two uninterruptible devices using redundant paths. In the following, for the sake of simplicity of the drawings and explanation, an example will be described in which the number of relay paths is two, i.e., the number of redundant paths is one. However, the number of relay paths may be any number as long as it is two or more.

[0010] FIG. 1 is a block diagram showing an example of a schematic configuration of a communication system according to each embodiment. The communication system 1 includes a first uninterruptible device UA1, a second uninterruptible device UA2, a first relay route RR1, and a second relay route RR2. Hereinafter, in the specification, when it is not necessary to particularly distinguish between the first uninterruptible device UA1 and the second uninterruptible device UA2, both are collectively referred to as an uninterruptible device UA. Similarly, in the specification, when it is not necessary to particularly distinguish between the first relay route RR1 and the second relay route RR2, both are collectively referred to as a relay route RR.

[0011] The first uninterruptible device UA1 can operate as a transmitting device in the communication system 1. A first high-speed user terminal HST1 and a first low-speed user terminal LST1 are connected to the first uninterruptible device UA1. The first high-speed user terminal HST1 is a terminal that inputs a main signal MS to be transmitted on a main signal channel to the first uninterruptible device UA1. The first low-speed user terminal LST1 is a terminal that inputs a sub-signal SS to be transmitted on a sub-signal channel to the first uninterruptible device UA1. The main signal MS is, for example, a user data frame including a header, a payload, and a Frame Check Sequence (FCS). The sub-signal SS is user data that is a code sequence of 0s and 1s.

[0012] The second uninterruptible device UA2 can operate as a receiving device in the communication system 1. A second high-speed user terminal HST2 and a second low-speed user terminal LST2 are connected to the second uninterruptible device UA2. The second high-speed user terminal HST2 is a terminal to which a main signal MS received by the second uninterruptible device UA2 is input. The second low-speed user terminal LST2 is a terminal to which a secondary signal SS received by the second uninterruptible device UA2 is input.

[0013] The first relay route RR1 is one relay route between the first uninterruptible device UA1 and the second uninterruptible device UA2. The second relay route RR2 is another relay route between the first uninterruptible device UA1 and the second uninterruptible device UA2. The first relay route RR1 and the second relay route RR2 may include a relay network. The relay network may be, for example, an Ethernet (registered trademark) network. The type of the relay network is not limited to a specific type.

[0014] The first uninterruptible unit UA1 assigns a sequence number to the input main signal MS. The sequence number is a number that indicates the order of each main signal MS. The first uninterruptible unit UA1 also copies the main signal MS to which the sequence number has been assigned according to the number of relay routes RR. Then, the first uninterruptible unit UA1 transmits the main signal MS to each relay route RR. At this time, the first uninterruptible unit UA1 adjusts the transmission timing of the main signal MS for each relay route RR based on the delay amount converted from the input sub-signal SS. As will be explained in detail later, the sub-signal SS is converted into the delay amount, and the sub-signal SS itself is discarded. Therefore, the only signal that flows through the relay route RR is the main signal MS.

[0015] The second uninterruptible unit UA2 selects a main signal MS to be output to the second high-speed user terminal HST2 according to the reception timing of the main signal MS via each relay route RR. For example, the second uninterruptible unit UA2 determines the first-arrived main signal MS based on the sequence number assigned to each received main signal MS. Then, the second uninterruptible unit UA2 deletes the sequence number from the first-arrived main signal MS and outputs it to the second high-speed user terminal HST2. The second uninterruptible unit UA2 discards the last-arrived main signal MS. The second uninterruptible unit UA2 decodes the secondary signal SS based on which relay route RR the selected main signal MS has passed through. Then, the second uninterruptible unit UA2 outputs the decoded secondary signal SS to the second low-speed user terminal LST2. For example, the second uninterruptible device UA2 determines which relay route RR the selected first-arriving main signal MS passed through, and converts the sequence of the relay route RR through which the first-arriving main signal MS was received into a code sequence of 0, 1, which is the sub-signal SS.

[0016] In Fig. 1, the main signal MS arriving first at the second uninterruptible device UA2 from the first relay route RR1 is represented by a rectangle with diagonal hatching, and the main signal MS arriving first at the second uninterruptible device UA2 from the second relay route RR2 is represented by a rectangle with vertical and horizontal checkered hatching. Also, the main signal arriving later at the second uninterruptible device UA2 is represented by an open rectangle with no hatching. The numbers written in the rectangles representing the main signals MS indicate sequence numbers.

[0017] In the embodiment, the first uninterruptible device UA1 is assumed to be operable as a transmitting device in the communication system 1, and the second uninterruptible device UA2 is assumed to be operable as a receiving device in the communication system 1. Conversely, the second uninterruptible device UA2 may be assumed to be operable as a transmitting device in the communication system 1, and the first uninterruptible device UA1 may be assumed to be operable as a receiving device in the communication system 1. Furthermore, both the first uninterruptible device UA1 and the second uninterruptible device UA2 may have the same configuration and may be operable as a transmitting device and a receiving device in the communication system 1. In the following, the first uninterruptible device UA1 and the second uninterruptible device UA2 are described as having the same configuration. In this case, when there is no need to particularly distinguish the first high-speed user terminal HST1 and the second high-speed user terminal HST2 in the specification, both are collectively referred to as high-speed user terminal HST. Similarly, in the specification, when there is no need to particularly distinguish between the low speed user terminal LST1 and the second low speed user terminal LST2, both are collectively referred to as the low speed user terminal LST.

[0018] Fig. 2 is a functional block diagram of an example of an uninterruptible unit UA in the first embodiment. In Fig. 2, solid arrows indicate the flow of a main signal MS or a sub-signal SS, and dashed arrows indicate the flow of a control signal.

[0019] The uninterruptible device UA has, as components related to transmission, a number assignment unit 101, a duplication unit 102, a control signal communication unit 103, a merging unit 104, a calculation unit 105, a conversion unit 106, and a transmission control unit 107. The uninterruptible device UA also includes, as components related to reception, a reception control unit 108, a selection unit 109, a number deletion unit 110, a notification unit 111, and a decoding unit 112.

[0020] The uninterruptible unit UA further includes a first user port UP1 and a second user port UP2, a first relay port RP1 and a second relay port RP2. The first user port UP1 is a port for receiving a main signal MS input from a first high-speed user terminal HST1 via a first user route UR1, and for transmitting the main signal MS output to a second high-speed user terminal HST2 via the first user route UR1. The second user port UP2 is a port for receiving a secondary signal SS input from a first low-speed user terminal LST1 via a second user route UR2, and for transmitting the secondary signal SS output to a second low-speed user terminal LST2 via the second user route UR2. The first relay port RP1 is a port for transmitting a main signal MS with or without delay to the first relay route RR1, and for receiving a main signal MS with or without delay from the first relay route RR1. The second relay port RP2 is a port for transmitting a main signal MS with or without delay to the second relay route RR2 and for receiving a main signal MS with or without delay from the second relay route RR2. Hereinafter, in the specification, unless it is necessary to particularly distinguish between the first user port UP1 and the second user port UP2, both will be collectively referred to as the user port UP. Similarly, unless it is necessary to particularly distinguish between the first relay port RP1 and the second relay port RP2, both will be collectively referred to as the relay port RP.

[0021] The number assigning unit 101 assigns a sequence number to a main signal MS received at the first user port UP1. For example, if the main signal MS is a user data frame, the number assigning unit 101 adds the sequence number to a part of a header or a payload. The number assigning unit 101 supplies the main signal MS with the sequence number assigned to it to the duplicating unit 102.

[0022] The duplicating unit 102 duplicates the main signal MS to which the sequence number provided from the number providing unit 101 is provided, according to the number of redundant paths. In the example of Fig. 2, the uninterruptible device UA has two relay ports corresponding to two paths, i.e., one relay port corresponding to one redundant path. Therefore, the duplicating unit 102 duplicates one main signal MS. The duplicating unit 102 provides each main signal MS to the junction unit 104.

[0023] When transmitting the main signal MS, the control signal communication unit 103 receives a request from the calculation unit 105 and includes a timestamp indicating the transmission time in the control signal CS, and supplies the control signal CS including the timestamp of the transmission time to the junction unit 104. When receiving the main signal MS, the control signal communication unit 103 includes a timestamp indicating the reception time in the control signal CS supplied from the reception control unit 108, and supplies the control signal CS including the timestamp of the reception time to the calculation unit 105. The control signal CS is a signal for measuring path delays in one or more relay paths. The control signal CS may be, for example, a control frame including a header, a payload, and an FCS. The control signal CS is distinguished from the main signal MS by, for example, an identifier recorded in the header. The timestamp may be recorded in the header or the payload. When path delays in two or more relay paths are measured, two or more control signals CS may be supplied to the junction unit 104.

[0024] The merging unit 104 merges the main signal MS supplied from the duplicating unit 102 and the control signal CS supplied from the control signal communication unit 103 so as to match the transmission timing of the two. Then, the merging unit 104 supplies the main signal MS and the control signal CS to the conversion unit 106. Here, the merging method in the merging unit 104 is not limited to a specific method. As an example of the merging method, a method of performing priority control according to priorities set in queues for storing the main signal MS and the control signal CS can be considered.

[0025] The calculation unit 105 calculates delay information for each relay route RR based on the route delay measured for each relay route RR. Then, the calculation unit 105 supplies the delay information for each relay route RR to the transmission control unit 107. The delay information is information that represents the distribution of route delays in the relay route RR.

[0026] FIG. 3 is a diagram showing a table as an example of delay information. The delay information includes, for example, information on route identifiers. The route identifier is an identifier that is uniquely assigned to each relay route RR. For example, the route identifier of the first relay route RR1 is 1, and the route identifier of the second relay route RR2 is 2. Each route identifier is associated with information on maximum route delay, average route delay, and variance. The maximum route delay is the maximum value of the route delays measured for each relay route RR. The average route delay is the average value of the route delays measured for each relay route RR. The variance is the variance of the average route delay calculated for each relay route RR. The variance represents the jitter in the relay route RR. In FIG. 3, the value of the maximum route delay in the first relay route RR1 is T_ DelayMax1 , the average path delay is T_ DelayAverage1 , the variance value is T_ DelayVariance1 Similarly, the maximum route delay of the second relay route RR2 is T_ DelayMax2 , the average path delay is T_ DelayAverage2 , the variance value is T_ DelayVariance2 The delay information may further include information other than the maximum path delay, the average path delay, and the variance, such as a median.

[0027] Here, the route delay in each relay route RR is, for example, the time it takes from when the control signal CS is transmitted from the first uninterruptible device UA to when it is received by the second uninterruptible device UA2 via each relay route RR. As an example, the route delay can be measured from the time difference between the time stamp of the transmission time included in the control signal CS by the control signal communication unit 103 when the control signal CS is transmitted to each relay route RR, and the time stamp of the reception time included in the control signal CS by the control signal communication unit 103 when the control signal CS is received from each relay route RR. When the first uninterruptible device UA1 operates as a transmitting device and the second uninterruptible device UA2 operates as a receiving device, it is the second uninterruptible device UA2 that obtains both the transmission time and the reception time of the control signal CS. In this case, the second uninterruptible device UA2 may notify the first uninterruptible device UA1 of the transmission time and the reception time. For example, the second uninterruptible device UA2 may notify by transmitting the control signal CS including the time stamps of both the transmission time and the reception time. Alternatively, the transmission time and reception time of the control signal CS may be included in an ACK or the like transmitted from the second uninterruptible device UA2 to the first uninterruptible device UA1 to confirm reception. When the first uninterruptible device UA1 and the second uninterruptible device UA2 operate as a transmitting device and a receiving device, respectively, the path delay may be calculated from the control signal CS received by each of the first uninterruptible device UA1 and the second uninterruptible device UA2. Therefore, in this case, such notification of the transmission time and reception time may or may not be performed.

[0028] The table shown in Fig. 3 can be updated every time the route delay is measured in each relay route RR. Here, the delay information is calculated to obtain the amount of delay given to each relay route RR, which will be described later. Therefore, the delay information may be a function of the delay information and the amount of delay given to each relay route RR.

[0029] The converter 106 converts the sub-signal SS received at the second user port UP2 into a delay amount. The converter 106 then supplies the delay amount to the transmission controller 107. For example, if the sub-signal SS is user data that is a code sequence of 0 and 1, the converter 106 determines the delay amount to be applied to the main signal MS sent from the first relay port RP1 and the main signal MS sent from the second relay port RP2, in accordance with the bit values ​​0 and 1 included in the sub-signal SS. The delay amount at this time is determined in accordance with the delay information.

[0030] The transmission control unit 107 transmits the two main signals MS with sequence numbers provided thereto from the duplicating unit 102 to the relay port RP. At this time, the transmission control unit 107 controls the transmission timing of each main signal MS based on the delay amount provided from the conversion unit 106.

[0031] The reception control unit 108 separates the main signal MS and the control signal CS received at the relay port RP. Then, the reception control unit 108 supplies the main signal MS to the selection unit 109 and the control signal CS to the control signal communication unit 103. A possible method for separating the main signal MS and the control signal CS is to separate them based on identification information added to the headers of the main signal MS and the control signal CS.

[0032] The selection unit 109 judges whether the main signal MS supplied from the reception control unit 108 is the first main signal MS or the last main signal MS. This judgment can be made by referring to the sequence number assigned to the main signal MS. In other words, when a main signal MS with the same sequence number has not been supplied, the main signal MS is the first main signal, and when a main signal MS with the same sequence number has already been supplied, the main signal MS is the last main signal. When the selection unit 109 judges that the supplied main signal MS is the first main signal MS, it supplies the main signal MS to the number deletion unit 110. When the selection unit 109 judges that the supplied main signal MS is the last main signal MS, it discards the main signal MS. In addition, the selection unit 109 supplies the first-arrival route information indicating the relay port RP that received the first-arrival main signal MS, i.e., the relay route RR, to the notification unit 111.

[0033] The number deletion unit 110 deletes the sequence number assigned to the main signal MS supplied from the selection unit 109. Then, the number deletion unit 110 transmits the main signal MS from which the sequence number has been deleted to the first user port UP1. As a result, the main signal MS is transmitted to the receiving side high-speed user terminal HST via the first user route UR1.

[0034] The notification unit 111 determines which relay route RR the first-arrival main signal MS was received via, based on the first-arrival route information supplied from the selection unit 109. Then, the notification unit 111 notifies the decoding unit 112 of the determination result.

[0035] The decoder 112 decodes the sub-signal SS transmitted on the sub-signal channel based on the determination result notified by the notifier 111. For example, the decoder 112 assigns a 1 to the bit of the sub-signal SS if the first-arriving main signal MS has passed through the first relay route RR1, and assigns a 0 to the bit of the sub-signal SS if the first-arriving main signal MS has passed through the second relay route RR2. In this way, the decoder 112 decodes the sub-signal SS from the sequence of the relay route RR that received the first-arriving main signal MS. After decoding the sub-signal SS, the decoder 112 transmits the sub-signal SS to the second user port UP2. As a result, the sub-signal SS is transmitted to the low-speed user terminal LST on the receiving side via the second user route UR2.

[0036] Fig. 4 is a diagram showing an example of a hardware configuration of the uninterruptible device UA. As shown in Fig. 4, the uninterruptible device UA can be configured by a computer. The uninterruptible device UA has a hardware processor 11 such as a CPU (Central Processing Unit). A program memory 12, a data memory 13, an input / output interface 14, and a communication interface 15 are connected to the processor 11 via a bus 16.

[0037] The program memory 12 includes, as a non-transient tangible computer-readable storage medium, a non-volatile memory that can be written and read at any time, such as a hard disk drive (HDD) or a solid state drive (SSD), and a non-volatile memory such as a ROM. The program memory 12 stores a program required for the processor 11 to execute various processes according to each embodiment. That is, the processor 11 may operate as the number assignment unit 101, the duplication unit 102, the control signal communication unit 103, the merging unit 104, the calculation unit 105, the conversion unit 106, the transmission control unit 107, the reception control unit 108, the selection unit 109, the number deletion unit 110, the notification unit 111, and the decryption unit 112 shown in FIG. 2 by executing this program. The processor 11 may be changed to an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA), etc., instead of a CPU. The processor 11 does not necessarily have to be a single processor, and may be two or more.

[0038] The data memory 13 includes a tangible computer-readable storage medium, such as a volatile memory, such as a random access memory (RAM). The data memory 13 stores various data acquired and generated in the course of various processes. That is, an area is allocated in the data memory 13 for appropriately storing various data in the course of various processes.

[0039] The input / output interface 14 corresponds to the first user port UP1 and the second user port UP2 shown in Fig. 2. The input / output interface 14 can be connected to a high-speed user terminal HST and a low-speed user terminal LST via a first user path UR1 and a second user path UR2.

[0040] The communication interface 15 corresponds to the first relay port RP1 and the second relay port RP2 shown in Fig. 2. The communication interface 15 can be connected to the communication interface 15 of another uninterruptible device UA via the first relay route RR1 and the second relay route RR2. The communication interface 15 may include not only a port but also a communication module according to the communication medium, communication method, and communication protocol of the relay route RR.

[0041] Next, the operation of the uninterruptible unit UA will be described. In the following description, the main signal MS is a user data frame, and the sub-signal SS is user data. However, the combination of the main signal MS and the sub-signal SS is not limited to this.

[0042] When the uninterruptible device UA is configured by a computer as shown in FIG. 4, the processor 11 can perform the operations of each element shown in FIG. 2 by executing a program stored in the program memory 12.

[0043] FIG. 5 is a flowchart showing an example of the transmission processing operation of the uninterruptible device UA. Here, in FIG. 5, the illustration of the assignment of a sequence number to the main signal MS and the process of duplicating the main signal MS are omitted. The process of FIG. 5 is performed every time one frame of the series of user data frames, which is the main signal MS, is input to the first user port UP1 and one bit of the series of user data, which is the sub-signal SS, is input to the second user port UP2. Furthermore, prior to the process of FIG. 5, the processor 11 of the uninterruptible device UA on the transmitting side is assumed to have calculated delay information for each relay route RR or to have been notified by the uninterruptible device UA on the receiving side. Note that the delay information does not necessarily have to be calculated during the transmission processing operation and the reception processing operation of the uninterruptible device UA. In other words, the delay information may be calculated at an offline timing other than during the transmission processing operation and the reception processing operation of the uninterruptible device UA, and the delay information calculated at this offline timing may be used during the transmission processing operation of the uninterruptible device UA.

[0044] In step S101, the processor 11 converts the sub-signal SS, which is information to be transmitted on the sub-signal channel, into a delay amount. For example, when the bit value of the sub-signal SS is 1, the processor 11 sets the delay amount for the main signal MS sent from the first relay port RP1 to the first relay route RR1 to 0. Also, the processor 11 sets the delay amount for the main signal MS sent from the second relay port RP2 to the second relay route RR2 to T DelayModulation When the bit value of the sub-signal SS is 0, the processor 11 sets the delay amount for the main signal MS to be sent from the first relay port RP1 to the first relay route RR1 to T DelayModulation The processor 11 also sets the delay amount for the main signal MS sent from the second relay port RP2 to the second relay route RR2 to 0. Here, the delay amount T DelayModulation is a value larger than the average path delay difference calculated based on the measured path delay. DelayModulation is determined so as to satisfy the following condition (Equation 1). Here, T route#1 is the average route delay in the first relay route RR1, and T route#2 is the average route delay in the second relay route RR2.

number

[0045] The delay amount T in (Equation 1) DelayModulation An upper limit may be further set for . This upper limit may be, for example, the minimum value that satisfies the desired bit error rate. For example, in the case of a signal of "0" and "1" such as amplitude modulation, the relative voltage difference between the two values ​​is wide enough that even if the voltage fluctuates slightly, bit inversion does not occur. "Sufficiently" here means whether the bit error satisfies the desired value. When this is considered in relation to the embodiment, the delay amount T at which the reversal of the arrival order, which is a bit error, is suppressed to a desired rate is DelayModulation Based on this idea, the delay amount T DelayModulation An upper limit for may be determined.

[0046] In addition, the delay amount T DelayModulation may be determined by taking into account jitter in addition to the average path delay difference. In this case, the delay amount T DelayModulation is determined to satisfy the following condition (Equation 2): Jitter is the jitter in the relay route RR to which delay is added.

number

[0047] Furthermore, the delay amount T DelayModulation is a value larger than the absolute value of the difference between the average path delay of the relay path through which the main signal MS to be delayed is transmitted and the maximum value of the average path delay calculated for the other relay paths.

[0048] In step S102, the processor 11 compares the bit value of the subsignal SS, which is information to be transmitted on the input subsignal channel, with the bit value of the previous subsignal SS to determine whether or not the bit value is inverted from 0 to 1. The bit value of the previous subsignal SS may be stored in the data memory 13. When moving from the process of step S102 to the next process, the processor 11 updates the bit value stored in the data memory 13 with the bit value of the current subsignal SS.

[0049] If the bit value is not inverted in step S102, the processor 11 increments the delay amount T DelayModulation On the other hand, the processor 11 does not impart a delay to the main signal MS transmitted via the other relay route RR. Which main signal MS is to be delayed depends on the result of the determination in step S101. For example, when the bit value of the secondary signal SS is 0, the processor 11 imparts a delay amount T DelayModulationWhen the bit value of the sub-signal SS is 1, the processor 11 adds a delay of T DelayModulation delay.

[0050] In step S104, the processor 11 transmits the main signal MS and the control signal CS to the two relay ports RP. Specifically, the processor 11 transmits the main signal MS to which no delay has been added together with the control signal CS. Then, the processor 11 transmits the main signal MS to which no delay has been added together with the control signal CS. DelayModulation After the time has elapsed, the processor 11 transmits the delayed main signal MS together with the control signal CS to the corresponding relay port RP. As a result, the main signal MS is transmitted from each relay port RP to the uninterruptible unit UA on the receiving side via the corresponding relay route RR. After that, the processor 11 ends the transmission processing operation shown in this flowchart and prepares for the input of the next main signal MS and secondary signal SS.

[0051] If the bit value is inverted in step S102, the processor 11 performs time adjustment in step S105 until the sequence number of the delayed main signal MS sent to the relay port RP matches the sequence number of the non-delayed main signal MS sent to the other relay port RP. Specifically, the processor 11 waits for the waiting time before processing. The waiting time for the time adjustment is, for example, the delay amount T DelayModulation The waiting time may be the same as the time when the bit value is not inverted. The waiting time may also be determined taking into consideration the occurrence of delays in data processing and data transmission within the uninterruptible device UA. When the waiting time has elapsed, the processor 11 advances the process to step S103. Thereafter, the process is executed in the same manner as when the bit value is not inverted.

[0052] FIG. 6 is a flowchart showing an example of the reception processing operation of the uninterruptible unit UA.

[0053] In step S111, when the main signal MS and the control signal CS are received at any of the relay ports RP, the processor 11 acquires the main signal MS and the control signal CS from the relay port RP. Then, the processor 11 separates the main signal MS from the control signal CS.

[0054] In step S112, the processor 11 returns the control signal CS separated from the main signal MS to the transmitting uninterruptible unit UA, including a timestamp indicating the reception time. In response to this, the transmitting uninterruptible unit UA calculates delay information. The processor 11 of the receiving uninterruptible unit UA may calculate delay information in the corresponding relay route RR and notify the transmitting uninterruptible unit UA of the calculated delay information.

[0055] In step S113, the processor 11 determines whether the sequence number assigned to the acquired main signal MS is greater than a sequence number that has already been acquired. The acquired sequence number to be compared is stored in the data memory 13.

[0056] If it is determined in step S113 that the sequence number assigned to the newly acquired main signal MS is greater than the sequence number already acquired, the processor 11 deletes the sequence number from the acquired main signal MS in step S114 and stores the deleted sequence number in the data memory 13 so that it will be used as a sequence number to be compared in the next step S113.

[0057] In step S115, the processor 11 sends the main signal MS from which the sequence number has been deleted to the first user port UP1. As a result, the main signal MS is transmitted from the first user port UP1 to the second high-speed user terminal HST2 on the receiving side via the first user route UR1.

[0058] In step S116, the processor 11 determines the relay route RR through which the main signal MS has been transmitted, depending on whether the relay port RP that received the main signal MS was the first relay port RP1 or the second relay port RP2.

[0059] In step S117, the processor 11 decodes the sub-signal SS by assigning 1 to the first relay route RR1 and 0 to the second relay route RR2 based on the determined relay route RR sequence.

[0060] In step S118, the processor 11 sends the secondary signal SS to the second user port UP2. As a result, the secondary signal SS is transmitted from the second user port UP2 to the second low-speed user terminal LST2 on the receiving side via the second user route UR2. After that, the processor 11 ends the receiving process operation shown in this flowchart and prepares for receiving the next primary signal MS.

[0061] If it is determined in step S113 that the sequence number assigned to the newly acquired main signal MS is not greater than the sequence number already acquired, the processor 11 discards the newly acquired main signal MS in step S119. In other words, if the newly acquired main signal MS is a later-arriving main signal MS, this main signal is discarded. Thereafter, the processor 11 ends the reception processing operation shown in this flowchart and prepares for reception of the next main signal MS.

[0062] Fig. 7 is a timing chart showing the operation when a delay is applied based on delay information in the uninterruptible unit UA on the transmitting side. Fig. 7 shows, from the top, the bit value of the transmitted sub-signal SS, the transmitted main signal MS, the main signal MS received via the first relay route RR1, the main signal MS received via the second relay route RR2, the first-arrived main signal MS, and the timing of the decoded sub-signal SS. The upper series of the transmitted main signal MS shows the timing of the main signal MS sent to the first relay port RP1, and the lower series shows the timing of the main signal MS sent to the second relay port RP2.

[0063] 7 has a sequence of 1010101. Here, it is assumed that the first relay route RR1 is a short route with a small average route delay, and the second relay route RR2 is a long route with a large average route delay. It is also assumed that when the bit value of the sub-signal SS is 0, the main signal MS is transmitted via the second relay route RR2, and when the bit value of the sub-signal SS is 1, the main signal MS is transmitted via the first relay route RR1.

[0064] When the bit value of the secondary signal SS input to the first uninterruptible device UA1, which is the transmitting side, is 0, in order for the secondary signal SS to be correctly decoded in the second uninterruptible device UA2, which is the receiving side, the main signal MS passing through the second relay route RR2, which is a longer route, must arrive at the second uninterruptible device UA2 first.

[0065] Therefore, as shown in FIG. 7, when the bit value of the sub-signal SS is 0, for example, for a main signal MS having a sequence number 2, the main signal MS transmitted via the first relay route RR1 has a delay amount T based on the average route delay difference between the first relay route RR1 and the second relay route RR2, whereas the main signal MS transmitted via the second relay route RR2 has a delay amount T based on the average route delay difference between the first relay route RR1 and the second relay route RR2. DelayModulation delay is granted.

[0066] As a result, when the bit value of the sub-signal SS is 0, the main signal MS transmitted via the second relay route RR2 arrives before the main signal MS transmitted via the first relay route RR1, and the sub-signal SS is correctly decoded in the second uninterruptible unit UA2.

[0067] As described above, according to the first embodiment, in a communication system that performs multiplex communication of a main signal and a secondary signal using a plurality of relay routes RR including redundant routes, a delay is imparted to each of the duplicated main signals MS based on delay information in the relay route RR to which each is sent based on the bit value of the secondary signal SS in the transmission uninterruptible device UA, and each primary signal MS is transmitted. This prevents the order of the main signals MS received by the reception uninterruptible device UA from being changed. Therefore, the primary signal MS transmitted earlier by the transmission uninterruptible device UA is used to decode the secondary signal SS in the reception uninterruptible device UA. This allows the reception uninterruptible device UA to correctly decode the secondary signal SS. In addition, the amount of delay imparted to the main signal MS is determined based on delay information calculated from the actually measured route delay. By imparting a delay according to the delay information to the main signal MS, the interval of the main signal MS is not longer than necessary due to the imparted delay being too large. As a result, the transfer rate of the main signal MS is improved.

[0068] [Second embodiment] Next, a second embodiment will be described. In the first embodiment, a delay larger than the average route delay difference is always imparted to the main signal MS that is to arrive later based on the delay information. Here, it is assumed that the first relay route RR1 is a short route with a small average route delay, and the second relay route RR2 is a long route with a large average route delay. In this case, when the main signal MS is simultaneously transmitted to the first relay route RR1 and the second relay route RR2, if jitter is not taken into consideration, statistically the main signal MS that has passed through the first relay route RR1 will have a route delay difference D between the first relay route RR1 and the second relay route RR2 shown in (Equation 3). route Only the T route#1 is the average route delay in the first relay route RR1, and T route#2 is the average route delay in the second relay route RR2.

number

[0069] When the bit value of the secondary signal SS is 1, the primary signal MS via the first relay route RR1 should arrive at the uninterruptible unit UA on the receiving side first. As described above, the primary signal MS via the first relay route RR1 statistically arrives at the uninterruptible unit UA on the receiving side first by the average route delay difference. Therefore, the delay amount T DelayModulationRoute#2 As shown in (Equation 4), the jitter T Jitter The delay amount T of the main signal MS passing through the first relay route RR1 may be determined by taking into consideration only the delay amount T DelayModulationRoute#1 can be 0.

number

[0070] On the other hand, when the bit value of the secondary signal SS is 0, the primary signal MS via the second relay route RR2 must arrive at the uninterruptible unit UA on the receiving side first. As described above, the primary signal MS via the first relay route RR1 statistically arrives at the uninterruptible unit UA on the receiving side first. Therefore, the delay amount T DelayModulationRoute#1 As shown in (Equation 5), the jitter T Jitter In addition, the average route delay difference must be taken into consideration when determining the delay amount T DelayModulationRoute#2 can be 0.

number

[0071] In this way, in the second embodiment, when the average route delay calculated for the relay route RR corresponding to the main signal MS that should arrive first is smaller than the average route delay calculated for the other relay routes RR, the delay amount of the main signal MS is set to the delay amount of (Equation 4). On the other hand, when the average route delay calculated for the relay route RR corresponding to the main signal MS that should arrive first is not smaller than the average route delay calculated for the other relay routes RR, the delay amount of the main signal MS is set to the delay amount of (Equation 5). Such conversion of the delay amount may be performed in step S101 of FIG. 5. Then, in step S103 of FIG. 5, the processor 11 applies the delay amount T DelayModulationRoute#1 On the other hand, the processor 11 adds a delay of T DelayModulationRoute#2 The delay amount T 1 shown in (Equation 4) is applied to the main signal MS to be transmitted via the second relay route RR2. The delay amount T 1 shown in (Equation 4) is applied to the main signal MS to be transmitted via the second relay route RR2. DelayModulationRoute#2 When the bit value of the sub-signal SS is 0, the processor 11 adds a delay of T DelayModulationRoute#1 delay.

[0072] Fig. 8 is a timing chart showing the operation when a delay is applied based on delay information in the uninterruptible unit UA on the transmitting side of the second embodiment. Fig. 8 shows, from the top, the bit value of the transmitted sub-signal SS, the transmitted main signal MS, the main signal MS received via the first relay route RR1, the main signal MS received via the second relay route RR2, the first-arrived main signal MS, and the timing of the decoded sub-signal SS. In addition, the upper series of the transmitted main signal MS shows the timing of the main signal MS sent to the first relay port RP1, and the lower series shows the timing of the main signal MS sent to the second relay port RP2.

[0073] 8 has a sequence of 1010101. Here, it is assumed that the first relay route RR1 is a short route with a small average route delay, and the second relay route RR2 is a long route with a large average route delay. It is also assumed that when the bit value of the sub-signal SS is 0, the main signal MS is transmitted via the second relay route RR2, and when the bit value of the sub-signal SS is 1, the main signal MS is transmitted via the first relay route RR1.

[0074] When the bit value of the secondary signal SS is 1, the primary signal MS passing through the first relay route RR1, which is a short route, may arrive at the second uninterruptible unit UA2 first. For this reason, when the bit value of the secondary signal SS is 1, for example, the primary signal MS given sequence number 1 is delayed by a delay amount T DelayModulationRoute#1 In addition, a delay of 0 is applied to the main signal MS transmitted via the second relay route RR2. DelayModulationRoute#2 , that is, a delay is applied that takes into account only jitter.

[0075] On the other hand, when the bit value of the secondary signal SS is 0, in order for the secondary signal SS to be correctly decoded in the second uninterruptible unit UA2 on the receiving side, the primary signal MS via the second relay route RR2, which is a long route, must arrive at the second uninterruptible unit UA2 first. For this reason, when the bit value of the secondary signal SS is 1, for example, for the primary signal MS given sequence number 2, the delay amount T DelayModulationRoute#1 , that is, a delay in which jitter is taken into consideration is added to the average path delay difference. Also, a delay amount T DelayModulationRoute#2 A delay of 0 is applied as a delay.

[0076] In this way, in the second embodiment, even if there is jitter in the primary signal MS or even if there is an average path delay difference between the relay paths RR, the primary signal MS that should arrive first correctly arrives first at the uninterruptible unit UA on the receiving side. Therefore, the secondary signal SS is correctly decoded in the second uninterruptible unit UA2.

[0077] As described above, according to the second embodiment, in a communication system that performs multiplex communication of a main signal and a secondary signal using a plurality of relay routes RR including redundant routes, a delay is imparted to each of the replicated main signals MS in the uninterruptible device UA on the transmitting side based on delay information on the relay routes RR. This prevents the order of the main signals MS received by the uninterruptible device UA on the receiving side from being changed even if there is jitter in the main signal MS or a route delay difference in the relay routes RR. The uninterruptible device UA on the receiving side uses the main signal MS that was previously transmitted by the uninterruptible device UA on the transmitting side to decode the secondary signal SS. This allows the uninterruptible device UA on the receiving side to correctly decode the secondary signal SS. In addition, the amount of delay imparted to the main signal MS is determined based on delay information calculated from the actually measured route delay. By imparting a delay to the main signal MS according to the delay information, the interval of the main signal MS is not longer than necessary due to the imparted delay being too large. As a result, the transfer rate of the main signal MS is improved. Furthermore, in the second embodiment, when the main signal MS passing through the short path is the main signal MS that should arrive first, a small delay amount that takes only jitter into consideration is given to the main signal MS, thereby further improving the transfer rate compared to the first embodiment.

[0078] [Third embodiment] Next, the third embodiment will be described. Fig. 9 is a functional block diagram of an example of an uninterruptible device UA in the second embodiment. In Fig. 9, elements corresponding to those in Fig. 2 are given the same reference numerals as those in Fig. 2. Descriptions of elements given the same reference numerals as those in Fig. 2 will be omitted or simplified. Below, differences from the first embodiment will be mainly described.

[0079] The uninterruptible device UA has a number assignment unit 101, a duplication unit 102, a control signal communication unit 103, a junction unit 104, a calculation unit 105, a conversion unit 106, and a transmission control unit 107 as components related to transmission. The uninterruptible device UA also has a reception control unit 108, a selection unit 109, a number deletion unit 110, a notification unit 111, and a decoding unit 112 as components related to reception. The uninterruptible device UA also includes a first user port UP1, a second user port UP2, a first relay port RP1, and a second relay port RP2. In addition, in the second embodiment, the uninterruptible device UA has a transmission time assignment unit 113 as a component related to transmission, and a reception time assignment unit 114 as a component related to reception. Elements other than the control signal communication unit 103, the calculation unit 105, the transmission time assignment unit 113, and the reception time assignment unit 114 operate in the same manner as in the first embodiment. Therefore, a description is omitted.

[0080] As in the first embodiment, the control signal communication unit 103 receives a request from the calculation unit 105 and assigns timestamps indicating the transmission time and reception time to the control signal CS. Then, the control signal communication unit 103 supplies the control signal CS to the junction unit 104. Furthermore, in the second embodiment, the control signal communication unit 103 requests the transmission time assignment unit 113 to assign a timestamp indicating the transmission time to the main signal MS when the main signal MS is transmitted.

[0081] The transmission time assigning unit 113 assigns a time stamp indicating a transmission time to the main signal MS to which a sequence number has been assigned by the number assigning unit 101 upon receiving a request from the control signal communication unit 103. The transmission time assigning unit 113 then supplies the main signal MS to the duplicating unit 102.

[0082] The reception time assigning unit 114 extracts the transmission time from the main signal MS separated from the reception control unit 108. Then, the reception time assigning unit 114 supplies information obtained by adding the reception time of the main signal MS to the transmission time of the main signal MS to the control signal communication unit 103.

[0083] The control signal communication unit 103 supplies the transmission time and reception time assigned to the control signal CS and the transmission time and reception time extracted from the main signal MS to the calculation unit 105. The calculation unit 105 calculates delay information in each relay route RR from at least one of the transmission time and reception time assigned to the control signal CS and the transmission time and reception time extracted from the main signal MS.

[0084] As described above, in the third embodiment, a time stamp is assigned to the main signal MS in addition to the control signal CS. This makes it possible to measure delay information of each relay route RR without unnecessarily distributing the control signal CS, which would reduce the bandwidth of the main signal MS, for example, when the bandwidth of the first relay port RP1 and the second relay port RP2 is congested with the main signal MS.

[0085] Here, as a modification of the third embodiment, the transmission of the control signal CS may be omitted, that is, the delay information may be calculated based only on the transmission time and reception time of the main signal MS.

[0086] [Fourth embodiment] Next, a fourth embodiment will be described. Fig. 10 is a timing chart showing the operation when the uninterruptible device UA on the transmitting side of the fourth embodiment performs the advance transmission of the main signal based on the delay information. Fig. 10 also shows, from the top, the bit value of the transmitted sub-signal SS, the transmitted main signal MS, the main signal MS received via the first relay route RR1, the main signal MS received via the second relay route RR2, the first-arrived main signal MS, and the timing of the decoded sub-signal SS. In addition, the upper series of the transmitted main signal MS shows the timing of the main signal MS sent to the first relay port RP1, and the lower series shows the timing of the main signal MS sent to the second relay port RP2.

[0087] The sub-signal SS in Fig. 10 also has a sequence of 1010101, similar to the sub-signal SS in Fig. 7 and Fig. 8. Here, it is assumed that the first relay route RR1 is a short route with a small average route delay, and the second relay route RR2 is a long route with a large average route delay. It is also assumed that when the bit value of the sub-signal SS is 0, the main signal MS is transmitted via the second relay route RR2, and when the bit value of the sub-signal SS is 1, the main signal MS is transmitted via the first relay route RR1.

[0088] First, an example in which the code "1" of the sub-signal SS is transmitted will be described. In this case, as described in the second embodiment, if the main signal MS is transmitted simultaneously to the first relay route RR1 and the second relay route RR2, the main signal MS via the first relay route RR1 will be statistically received earlier by the average route delay difference shown in (Equation 3) if jitter is not taken into consideration. On the other hand, if the main signal MS is transmitted not simultaneously but via the second relay route RR2, the transmission time T TransmissionTime#2 is the transmission time T TransmissionTime#1 If the difference satisfies the relationship of the following (Equation 6), the main signal MS via the first relay route RR1 is received first, even if the main signal MS via the first relay route RR2 is received first.

number

[0089] In this case, the advance amount T DelayModulationRoute#2 is expressed as the following (Equation 7) by further considering jitter in the relationship of (Equation 6). DelayModulationRoute#2 can also be expressed as the amount of negative delay applied to the main signal MS passing through the second relay route RR2.

number

[0090] Here, when the main signal MS via the second relay route RR2 is sent first based on (Equation 7), the transmission time T TransmissionTime#1is the expected transmission time of the main signal MS. On the other hand, the transmission time T TransmissionTime#2 is a transmission time that is earlier than the original expected transmission time of the main signal MS.

[0091] In addition, in order to perform advance transmission of the main signal MS via the second relay route RR2 as shown in Figure 10, the bit value of the secondary signal SS must be input to the transmitting side uninterruptible unit UA beforehand.

[0092] When the main signal MS via the second relay route RR2 is sent first according to (Equation 7), the relationship of first-arrival and last-arrival is reversed at the time of transmission between the main signal MS via the first relay route RR1 and the main signal MS via the second relay route RR2 as shown in Fig. 10. On the other hand, the relationship of first-arrival and last-arrival is not reversed at the time of reception between the main signal MS via the first relay route RR1 and the main signal MS via the second relay route RR2. Therefore, the secondary signal SS can be correctly decoded in the uninterruptible unit UA on the receiving side.

[0093] Next, an example in which the code "0" of the sub-signal SS is transmitted will be described. When the code "0" is transmitted, the transmission timing may be controlled in the same manner as in the second embodiment. Specifically, the main signal MS passing through the second relay route RR2 does not need to be sent earlier than the original transmission time. On the other hand, the main signal MS passing through the first relay route RR1 has a delay amount T DelayModulationRoute#1 delay is granted.

[0094] As described above, in the fourth embodiment, when the main signal MS via the short path is made to arrive first, the main signal MS via the long path is sent first in consideration of delay information. This makes it possible to advance the timing of decoding the secondary signal SS in the uninterruptible unit UA on the receiving side when the main signal MS via the short path is made to arrive first. This improves the transfer rate of the main signal MS compared to the second embodiment.

[0095] [Variations] Modifications will be described below: In the first to fourth embodiments, the sub-signal channel is described as being for low-speed communication, but the sub-signal channel is not limited to being for low-speed communication.

[0096] The methods described in each embodiment can be stored as a program (software means) that can be executed by a calculator (computer) on a recording medium such as a magnetic disk (floppy (registered trademark) disk, hard disk, etc.), optical disk (CD-ROM, DVD, MO, etc.), semiconductor memory (ROM, RAM, flash memory, etc.), and can also be distributed by transmitting it via a communication medium. The programs stored on the medium side also include a setting program that configures the software means (including not only execution programs but also tables and data structures) that the computer executes within the computer. The computer that realizes this device reads the program recorded on the recording medium, and in some cases, configures the software means by the setting program, and executes the above-mentioned processing by controlling the operation of the software means. The recording medium referred to in the specification is not limited to a recording medium for distribution, but also includes a storage medium such as a magnetic disk or semiconductor memory provided inside the computer or in a device connected via a network.

[0097] In short, this invention is not limited to the above-mentioned embodiment, and various modifications can be made in the implementation stage without departing from the gist of the invention. Moreover, each embodiment may be implemented in combination as appropriate as possible, in which case the combined effect can be obtained. Furthermore, the above-mentioned embodiment includes inventions at various stages, and various inventions can be extracted by appropriate combinations of the disclosed constituent elements. [Explanation of symbols]

[0098] 1. Communication systems 11…Processor 12...Program memory 13 Data Memory 14... Input / Output Interface 15...Communication interface 16…Bus 101...Numbering Department 102...Replication section 103...Control signal communication unit 104…Confluence 105...Calculation section 106…Conversion unit 107...Transmission control unit 108... Reception control unit 109…Selection section 110…Number deletion section 111…Notification department 112...Decoding section 113...Transmission time setting unit 114... Reception time setting unit

Claims

1. A communication system for multiplexing a main signal and at least one sub-signal via a plurality of paths between a transmitting device and a receiving device, comprising: The transmitting device a duplication unit that duplicates the main signal communicated through a main signal channel in accordance with the number of paths; a converter for converting each of the at least one secondary signal communicated on a secondary signal channel into a delay amount that is an amount of delay to be applied to each of the replicated primary signals; a transmission control unit that transmits each of the replicated main signals to each of the paths based on the delay amount; Equipped with The receiving device includes: a selection unit that selects the main signal to be communicated through the main signal channel in accordance with a reception timing of each of the main signals; a decoding unit that decodes at least one secondary signal communicated through the at least one secondary signal channel based on the path through which the selected primary signal is received; Equipped with the conversion unit converts the at least one sub-signal from delay information calculated from path delays measured from each of the paths into a minimum delay amount that is greater than a difference between average path delays measured from each of the paths plus jitter and that suppresses reversals of the arrival order of the main signal to a desired rate. Communication systems.

2. The path delay is measured based on a difference between a transmission time when a control signal transmitted together with the main signal is transmitted from the transmitting device and a reception time when the control signal is received by the receiving device. The communication system according to claim 1 .

3. The path delay is measured based on a difference between a transmission time when the main signal is transmitted from the transmitting device and a reception time when the main signal is received by the receiving device.

3. A communication system according to claim 1 or 2.

4. the conversion unit performs the conversion so that a negative delay amount is imparted to the main signal to be received later by the receiving device; the transmission control unit transmits the main signal to be received later by the receiving device prior to the main signal to be received earlier by the receiving device based on the negative delay amount. A communication system according to any one of claims 1 to 3.

5. A transmission device in a communication system that performs multiplex communication of a main signal and at least one sub-signal via a plurality of paths between the transmission device and a reception device, a duplication unit that duplicates the main signal communicated through a main signal channel in accordance with the number of paths; a converter for converting each of the at least one secondary signal communicated on a secondary signal channel into a delay amount that is an amount of delay to be applied to each of the replicated primary signals; a transmission control unit that transmits each of the replicated main signals using each of the paths based on the delay amount; Equipped with the conversion unit converts the at least one sub-signal from delay information calculated from path delays measured from the respective paths into a minimum delay amount that is greater than a difference between average path delays measured from the respective paths plus jitter and that suppresses reversals of the arrival order of the main signal to a desired rate. Transmitting device.

6. A communication method in a communication system for multiplexing a main signal and at least one sub-signal via a plurality of paths between a transmitting device and a receiving device, comprising: In the transmitting device, duplicating the main signal communicated through a main signal channel in accordance with the number of paths; converting, at the transmitting device, each of the at least one secondary signal communicated on a secondary signal channel into a delay amount that is an amount of delay to be applied to each of the replicated primary signals; transmitting, in the transmitting device, each of the replicated main signals to each of the paths based on the delay amount; selecting, in the receiving device, the main signals communicated through the main signal channel in accordance with reception timings of the respective main signals; decoding at least one secondary signal communicated on the at least one secondary signal channel based on the path through which the selected primary signal was received in the receiving device; Equipped with said converting step includes converting said at least one sub-signal from delay information calculated from path delays measured from each of said paths to a minimum delay amount that is greater than a difference between average path delays measured from each of said paths plus jitter and that suppresses reversals of arrival order of a main signal to a desired rate. Communication methods.

Citation Information

Patent Citations

  • Transmitter and transmission system

    JP2013051605A