PIXEL DRIVE CIRCUIT AND DISPLAY PANEL

Abstract

To provide a pixel drive circuit and a display panel capable of reducing power consumption.SOLUTION: A pixel drive circuit includes a light-emitting device, a voltage conversion module connected to the light-emitting device via a first node, a drive module connected to the light-emitting device via a second node, a data writing module connected to the drive module via a fourth node, a first potential coupling module connected to the second node and the third node, and a second potential coupling module connected to the second node and the fourth node, and a first voltage end is connected to the drive module via the third node. Before the drive module controls light emission start of the light-emitting device, the voltage conversion module changes the potential of the first node from a first voltage to a second voltage lower than the first voltage, and the first potential coupling module couples the potential of the third node and the second potential coupling module couples the potential of the fourth node.SELECTED DRAWING: Figure 1A

Description

[Technical field]

[0001] The present invention relates to the field of display technology, and in particular to pixel driving circuits and display panels. [Background technology]

[0002] Conventional display devices using mini LEDs (sub-millimeter light-emitting diodes) often use a passive driving method, and utilize the visual delay of the human eye to achieve display using a method that combines pulse width modulation and scanning. However, when displaying a low-gradation screen, the refresh rate is reduced, which causes problems such as flicker and various scan lines. If the active driving method combined with pulse width modulation is used for driving, there is no flicker problem at low gradations, and normal display can be guaranteed within the effective time of each frame. However, due to poor transistor consistency and stability, it is generally necessary to use a compensation method to improve the display effect. Currently, the external compensation method requires the addition of special external circuits and chips, which increases costs and does not allow real-time compensation. The internal compensation circuit is installed in the plane, which can reduce costs and allows real-time compensation, making it a desirable compensation method. However, the commonly used 4T2C internal compensation method also has disadvantages. In order to achieve internal compensation, it is necessary to increase the negative end voltage of the light-emitting diode to prevent it from affecting the detection result, thus increasing the power consumption of the design. Summary of the Invention [Problem to be solved by the invention]

[0003] SUMMARY OF THE DISCLOSURE The embodiments of the present invention provide a pixel driving circuit and a display panel that can reduce the power consumption of the panel. [Means for solving the problem]

[0004] An embodiment of the present invention provides a pixel driving circuit, which includes a light emitting device, a driving module, a data writing module, a voltage conversion module, a first potential coupling module, and a second potential coupling module.

[0005] The light-emitting device is connected in series between a first node and a second node. The driving module is electrically connected to the light-emitting device through the second node and electrically connected to a first voltage end through a third node, and configured to generate a driving current based on a data signal to control the light emission of the light-emitting device. The data writing module is electrically connected to the driving module through a fourth node and configured to output a data signal to the driving module. The voltage conversion module is electrically connected to the first node and configured to control the potential of the first node at a first time to change from a first voltage to a second voltage. The first potential coupling module is electrically connected to the second node and the third node, and configured to couple the potential of the third node when the potential of the first node changes from the first voltage to the second voltage. The second potential coupling module is electrically connected to the second node and the fourth node and configured to couple the potential of the fourth node when the potential of the first node changes from the first voltage to the second voltage, where the driving module controls the light-emitting device to begin emitting light at a second time, the first time being prior to the second time and the first voltage being greater than the second voltage.

[0006] Preferably, in some embodiments of the present invention, the voltage conversion module includes a control unit, a voltage generating unit, and a voltage switching unit, the control unit configured to generate a first control signal and a second control signal, the voltage generating unit electrically connected to the control unit and configured to generate the first voltage and the second voltage, the voltage switching unit electrically connected to the first node, the voltage generating unit, and the control unit, configured to output the first voltage to the first node according to the first control signal, and output the second voltage to the first node according to the second control signal.

[0007] Preferably, in some embodiments of the present invention, the control unit is further configured to generate a third voltage, the voltage generating unit includes a DC converter and a grounding unit, the DC converter is electrically connected to the control unit, the DC converter is configured to generate the first voltage based on the third voltage, and the grounding unit is configured to provide the second voltage.

[0008] Preferably, in some embodiments of the present invention, the voltage switching unit includes a first switch tube and a second switch tube, the gate of the first switch tube is electrically connected to the control unit, the source and drain of the first switch tube are electrically connected between the DC converter and the first node, the gate of the second switch tube is electrically connected to the control unit, and the source and drain of the second switch tube are electrically connected between the ground unit and the first node.

[0009] Preferably, in some embodiments of the present invention, the first potential coupling module includes a first capacitor and the second potential coupling module includes a second capacitor, the first capacitor being connected in series between the second node and the third node, and the second capacitor being connected in series between the second node and the fourth node.

[0010] Preferably, in some embodiments of the present invention, the driving module includes a driving transistor, a gate of the driving transistor is electrically connected to the fourth node, and a source and a drain of the driving transistor are electrically connected between the second node and the third node. The data writing module includes a data transistor, a gate of the data transistor is configured to receive a first scanning signal, one of a source and a drain of the data transistor is configured to receive the data signal, and the other of the source and the drain of the data transistor is electrically connected to the fourth node. The pixel driving circuit further includes a reset module and a light emission control module. The reset module includes a reset transistor, a gate of the reset transistor is configured to receive a second scanning signal, one of a source and a drain of the reset transistor is configured to receive a reset signal, and the other of the source and the drain of the reset transistor is electrically connected to the second node. The light-emitting control module includes a light-emitting control transistor, a gate of the light-emitting control transistor is electrically connected to a light-emitting control line, and a source and a drain of the light-emitting control transistor are electrically connected between the driving transistor and the third node.

[0011] The present invention further provides a display panel, which includes a plurality of sub-pixels arranged in an array and a voltage conversion module, each of the sub-pixels includes a light-emitting device and a pixel driving circuit, the pixel driving circuit includes a driving transistor, a data transistor, a first capacitor, and a second capacitor, an anode of the light-emitting device is electrically connected to one of a source and a drain of the driving transistor, a cathode of the light-emitting device is electrically connected to a common node, the other of the source and the drain of the driving transistor is electrically connected to a first voltage end, a source and a drain of the data transistor are electrically connected between a corresponding data line and a gate of the driving transistor, the first capacitor is connected in series between the first voltage end and the anode of the light-emitting device, and the second capacitor is connected in series between the gate of the driving transistor and the anode of the light-emitting device. The voltage conversion module includes a plurality of voltage switching units, each of which is electrically connected to the light emitting devices of a plurality of the sub-pixels located in the same row via the common node, and each of the voltage switching units is configured to output a first voltage or a second voltage to the common node, where the voltage conversion module is configured to control the potential of the common node to change from the first voltage to the second voltage before the driving transistor drives the light emitting device to emit light, and the first voltage is greater than the second voltage.

[0012] Preferably, in some embodiments of the present invention, the voltage conversion module further includes a control unit and a voltage generating unit, the control unit is configured to generate a third voltage, the voltage generating unit includes a DC converter and a grounding unit, the DC converter is electrically connected to the control unit, the DC converter is configured to generate the first voltage based on the third voltage and output the first voltage to the voltage switching unit, and the grounding unit is configured to provide the second voltage to the voltage switching unit.

[0013] Preferably, in some embodiments of the present invention, the control unit is configured to generate a plurality of first control signals and a plurality of second control signals. Each of the voltage switching units includes a first switch tube and a second switch tube. A gate of the first switch tube is electrically connected to the control unit, a source and a drain of the first switch tube are electrically connected between the DC converter and the corresponding common node, and the first switch tube is configured to output the first voltage to the common node based on the corresponding first control signal. A gate of the second switch tube is electrically connected to the control unit, a source and a drain of the second switch tube are electrically connected between the ground unit and the corresponding common node, and the second switch tube is configured to output the second voltage to the common node based on the corresponding second control signal.

[0014] Preferably, in some embodiments of the present invention, the display panel includes a plurality of first scan lines, a plurality of second scan lines, and a plurality of emission control lines, and a gate of the data transistor of each of the pixel driving circuits is electrically connected to a corresponding one of the first scan lines. Each of the pixel driving circuits further includes a reset transistor and an emission control transistor. A gate of the reset transistor is electrically connected to a corresponding one of the second scan lines, one of a source and a drain of the reset transistor is electrically connected to a reset line, and the other of the source and the drain of the reset transistor is electrically connected to the light emitting device and the driving transistor. A gate of the emission control transistor is electrically connected to a corresponding one of the emission control lines, and a source and a drain of the emission control transistor are electrically connected between the driving transistor and the first voltage terminal.

[0015] An embodiment of the present invention provides a pixel driving circuit and a display panel, the pixel driving circuit includes a light emitting device, a driving module, a data writing module, a voltage conversion module, a first potential coupling module, and a second potential coupling module, the light emitting device is electrically connected to the voltage conversion module through a first node and electrically connected to the driving module through a second node, the first voltage end is electrically connected to the driving module through a third node, the data writing module is electrically connected to the driving module through a fourth node, the first potential coupling module is electrically connected to the second node and the third node, and the second potential coupling module is electrically connected to the second node and the fourth node. The voltage conversion module controls the potential of the first node to change from a first voltage to a second voltage lower than the first voltage before the driving module controls the light emitting device to start emitting light, and the first potential coupling module couples the third node and the second potential coupling module couples the potential of the fourth node, thereby realizing normal light emission of the light emitting device without setting the voltage of the first voltage end very high, which is advantageous for reducing power consumption and also for expanding the compensation range of the internal compensation circuit. The display panel includes a plurality of sub-pixels arranged in an array and a voltage conversion module, and each sub-pixel includes a light emitting device and a pixel driving circuit. [Brief description of the drawings]

[0016] In order to more clearly describe the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings described below are only some embodiments of the present invention, and those skilled in the art can further obtain other drawings based on these drawings without creative work. [Figure 1A] FIG. 2 is a structural schematic diagram of a pixel driving circuit according to an embodiment of the present invention; [Figure 1B] FIG. 2 is a structural schematic diagram of a pixel driving circuit according to an embodiment of the present invention; [Diagram 2]FIG. 2 is a time sequence diagram according to an embodiment of the present invention. [Diagram 3] FIG. 2 is a structural schematic diagram of a display panel according to an embodiment of the present invention. [Figure 4] FIG. 2 is a structural schematic diagram of a pixel driving circuit according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] Hereinafter, the technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and are not all of the embodiments. All other embodiments obtained based on the embodiments of the present invention without the creative efforts of those skilled in the art are all within the scope of protection of the present invention. It should be understood that the specific embodiments described herein are only for explaining and interpreting the present invention, and are not intended to limit the present invention. In the present invention, unless otherwise stated, the directional terms used, such as "up" and "down", generally refer to the up and down of the device in actual use or working state, specifically the drawing direction in the drawing, while "inside" and "outside" refer to the contour of the device.

[0018] Specifically, Figures 1A and 1B are structural schematic diagrams of a pixel driving circuit according to an embodiment of the present invention, in which the embodiment of the present invention provides a pixel driving circuit, which includes a light emitting device D, a driving module 100, a data writing module 200, a voltage conversion module 300, a first potential coupling module 401, and a second potential coupling module 402.

[0019] The light emitting device D is connected in series between a first node n1 and a second node n2. Preferably, the light emitting device D includes an organic light emitting diode, a sub-millimeter light emitting diode, a micro light emitting diode, etc.

[0020] The driving module 100 is electrically connected to the light-emitting device D via the second node n2 and electrically connected to a first voltage end VDD via a third node n3, and the driving module 100 is configured to generate a driving current based on a data signal Data to control the light emission of the light-emitting device D.

[0021] Preferably, the driving module 100 includes a driving transistor T1, the gate of the driving transistor T1 is electrically connected to a fourth node n4, and the source and drain of the driving transistor T1 are electrically connected between the second node n2 and the third node n3.

[0022] The data writing module 200 is electrically connected to the driving module 100 via the fourth node n4, and the data writing module 200 is configured to output a data signal Data to the driving module 100.

[0023] Preferably, the data writing module 200 includes a data transistor T2, the gate of the data transistor T2 is electrically connected to a first scan line ScL and configured to receive a first scan signal Scan transmitted by the first scan line ScL, one of a source and a drain of the data transistor T2 is electrically connected to a data line DL and configured to receive the data signal Data, and the other of the source and the drain of the data transistor T2 is electrically connected to the fourth node n4.

[0024] The voltage conversion module 300 is electrically connected to the first node n1, and is configured to control the potential of the first node n1 at a first time t1 so as to change from a first voltage to a second voltage, and the first voltage is greater than the second voltage, so that the potential of the third node n3 and the potential of the fourth node n4 change correspondingly due to the coupling of the first potential coupling module 401 and the second potential coupling module 402, respectively, thereby realizing normal light emission of the light-emitting device D without setting the voltage of the first voltage terminal VDD very high, which is advantageous for reducing power consumption and also expands the compensation range of the internal compensation circuit.

[0025] Preferably, the driving module 100 controls the light-emitting device D to start emitting light at a second time t2, and the first time t1 is earlier than the second time t2, thereby avoiding affecting the light-emitting state of the light-emitting device D when the potential of the first node n1 changes from the first voltage to the second voltage.

[0026] Preferably, the first time t1 is the same as or later than the time at which the fourth node n4 completes writing of the data signal Data, thereby reducing the effect of a potential change at the first node n1 on the write process of the data signal Data.

[0027] Preferably, the first voltage and the second voltage are both lower than the voltage of the first voltage terminal VDD, allowing the light emitting device D to be normally driven to emit light.

[0028] Preferably, the voltage difference between the first voltage and the second voltage is greater than the threshold voltage Vth of the driving transistor T1, which makes it easy to drive the potential change of the third node n3 and the potential change of the fourth node n4 by the potential change of the first node n1. Preferably, the voltage difference between the first voltage and the second voltage is 0.5V or more and 8V or less.

[0029] Preferably, since the threshold voltage Vth of the driving transistor T1 shifts in practical application, in order to cover the shift range of the threshold voltage Vth of the driving transistor T1, the voltage difference between the first voltage and the second voltage may be more than 2 V. Preferably, the voltage difference between the first voltage and the second voltage is equal to 3 V, 3.5 V, 4 V, 4.5 V, 5 V, 5.5 V, 6 V, 6.5 V, 7 V, 7.5 V or 8 V.

[0030] Preferably, the voltage conversion module 300 includes a control unit 301 , a voltage generating unit 302 and a voltage switching unit 303 .

[0031] The control unit 301 is configured to generate a first control signal and a second control signal. Preferably, the control unit 301 includes a time sequence controller, a programmable logic gate array, etc.

[0032] The voltage generating unit 302 is electrically connected with the control unit 301, and the voltage generating unit 302 is configured to generate the first voltage and the second voltage. Preferably, the control unit 301 is further configured to generate a third voltage. The voltage generating unit 302 includes a DC converter DCDC and a ground unit GND, the DC converter DCDC is electrically connected with the control unit 301, the DC converter DCDC is configured to generate the first voltage based on the third voltage, and the ground unit GND is configured to provide the second voltage.

[0033] As can be understood, the second voltage can also be obtained by utilizing the control unit 301 and the DC / DC converter DCDC.

[0034] The voltage switching unit 303 is electrically connected to the first node n1, the voltage generating unit 302 and the control unit 301, and the voltage switching unit 303 is configured to output the first voltage to the first node n1 based on the first control signal, and output the second voltage to the first node n1 based on the second control signal.

[0035] Preferably, the voltage switching unit 303 includes a first switch tube Ts1 and a second switch tube Ts2, the gate of the first switch tube Ts1 is electrically connected to the control unit 301 and configured to receive the first control signal, the source and drain of the first switch tube Ts1 are electrically connected between the DC converter DCDC and the first node n1, the gate of the second switch tube Ts2 is electrically connected to the control unit 301 and configured to receive the second control signal, and the source and drain of the second switch tube Ts2 are electrically connected between the ground unit GND and the first node n1.

[0036] The first potential coupling module 401 is electrically connected to the second node n2 and the third node n3, and the first potential coupling module 401 is configured to couple the potential of the third node n3 when the potential of the first node n1 changes from the first voltage to the second voltage.

[0037] The second potential coupling module 402 is electrically connected to the second node n2 and the fourth node n4, and the second potential coupling module 402 is configured to couple the potential of the fourth node n4 when the potential of the first node n1 changes from the first voltage to the second voltage.

[0038] Preferably, the first potential coupling module 401 includes a first capacitor C1, and the second potential coupling module 402 includes a second capacitor C2. The first capacitor C1 is connected in series between the second node n2 and the third node n3, and is configured to couple the potential of the third node n3 when the potential of the first node n1 changes from the first voltage to the second voltage. The second capacitor C2 is connected in series between the second node n2 and the fourth node n4, and is configured to couple the potential of the fourth node n4 when the potential of the first node n1 changes from the first voltage to the second voltage.

[0039] Preferably, the capacitance value of the first capacitor C1 is greater than the capacitance value of the second capacitor C2 in order to reduce the influence of the first capacitor C1 on the voltage division of the second capacitor C2. Preferably, the capacitance value of the first capacitor C1 may be equal to 10 times the capacitance value of the second capacitor C2.

[0040] Preferably, the pixel driving circuit further includes a reset module 500 and a light emission control module 600 .

[0041] The reset module 500 is configured to reset the potential of the second node n2. Preferably, the reset module 500 includes a reset transistor T3, the gate of the reset transistor T3 is electrically connected to a second scan line SgL and configured to receive a second scan signal Sg, one of the source and drain of the reset transistor T3 is electrically connected to a reset line SeL and configured to receive a reset signal, and the other of the source and drain of the reset transistor T3 is electrically connected to the second node n2.

[0042] The light-emitting control module 600 is configured to control the light-emitting time of the light-emitting device D. Preferably, the light-emitting control module 600 includes a light-emitting control transistor T4, a gate of the light-emitting control transistor T4 is electrically connected to a light-emitting control line EML and configured to receive a light-emitting control signal EM, and a source and a drain of the light-emitting control transistor T4 are electrically connected between the driving transistor T1 and the third node n3.

[0043] Preferably, the time when the potential of the first node n1 changes from the second voltage to the first voltage may be the same as the time when the gate potential of the driving transistor T1 and the anode potential of the light emitting device D start to reset, thereby facilitating the subsequent detection of the threshold voltage Vth of the driving transistor T1.

[0044] 2 is a time sequence diagram according to an embodiment of the present invention, in which the driving transistor T1, the data transistor T2, the reset transistor T3, and the light emitting control transistor T4 included in the pixel driving circuit are N-type transistors as an example to describe the operation principle of the pixel driving circuit.

[0045] The operation process of the pixel driving circuit includes an initialization step S1, a threshold voltage detection step S2, a data signal writing step S3, a potential conversion step S4 and a light emitting step S5.

[0046] In the initialization stage S1, the first scanning signal Scan, the second scanning signal Sg, and the emission control signal EM are at high level, and the first switch tube Ts1 transmits a first voltage to the first node n1 to maintain the potential of the first node n1 at the first voltage. The data transistor T2 is turned on based on the first scanning signal Scan, and the data signal Data transmitted by the data line DL at this time is Vref, which is transmitted to the fourth node n4 via the data transistor T2 to reset the gate potential of the driving transistor T1. The reset transistor T3 is turned on based on the second scanning signal Sg, and the reset signal Vint transmitted by the reset line SeL is transmitted to the second node n2 to reset the potential of the second node n2.

[0047] Preferably, Vref-Vint>Vth to enable the driving transistor T1 to conduct during the initialization stage S1 to ensure the accuracy of the threshold voltage Vth of the driving transistor T1 detected in the threshold voltage detection stage S2.

[0048] In the threshold voltage detection step S2, the first scan signal Scan and the light emission control signal EM are at high level, the potential of the first node n1 is maintained at the first voltage, and the second scan signal Sg is at low level. The data transistor T2 is turned on according to the first scan signal Scan, and the data signal Data transmitted by the data line DL at this time is Vref, which is transmitted to the fourth node n4. The reset transistor T3 is cut off according to the second scan signal Sg, the light emission control transistor T4 is turned on according to the light emission control signal EM, the driving transistor T1 is turned on, and when the potential of the second node n2 changes from Vint to Vref-Vth, the driving transistor T1 is cut off, and the second capacitor C2 maintains the voltage difference between the second node n2 and the fourth node n4, i.e., the second capacitor C2 stores the threshold voltage Vth of the driving transistor T1.

[0049] In the data signal writing step S3, the first scan signal Scan is at a high level, the potential of the first node n1 is maintained at the first voltage, and the second scan signal Sg and the light emission control signal EM are at a low level. The data transistor T2 is turned on based on the first scan signal Scan, and the data signal Data transmitted by the data line DL at this time is Vdata, which is transmitted to the fourth node n4. The reset transistor T3 is cut off based on the second scan signal Sg, the light emission control transistor T4 is cut off based on the light emission control signal EM, and the voltage difference between the fourth node n4 and the second node n2 is Vgs=Vdata-(Vref-Vth).

[0050] In the potential conversion step S4, the first scanning signal Scan, the second scanning signal Sg, and the light emission control signal EM are all at low level, and the second switch tube Ts2 transmits the second voltage to the first node n1 to maintain the potential of the first node n1 at the second voltage. The data transistor T2 is cut off according to the first scanning signal Scan, the reset transistor T3 is cut off according to the second scanning signal Sg, and the light emission control transistor T4 is cut off according to the light emission control signal EM, and the potential of the first node n1 changes from the first voltage to the second voltage, so that the potential of the third node n3 is coupled to the first capacitor C1 and reduced, and the potential of the fourth node n4 is coupled to the second capacitor C2 and reduced. Preferably, the reduction in the potential of the third node n3 may be the same as the reduction in the potential of the first node n1, i.e., the potential of the first node n1 and the potential of the third node n3 are maintained to change at the same ratio.

[0051] In the light emitting stage S5, the light emitting control signal EM is at a high level, the first scanning signal Scan and the second scanning signal Sg are both at a low level, the potential of the first node n1 is maintained at the second voltage, and the light emitting control transistor T4 is conductive to synchronously increase the potential of the second node n2 and the potential of the fourth node n4, thereby increasing the driving current generated by the driving transistor T1 to I=[(CoxμmW / L)*(Vgs-Vth) 2 ] / 2 to I=[(CoxμmW / L)*(Vdata-Vref) 2 ] / 2. Therefore, the influence of the threshold voltage Vth of the driving transistor T1 on the driving current can be improved, and power consumption can be reduced. Here, Cox, μm, W, and L are the channel capacitance, channel mobility, channel width, and channel length per unit area of ​​the transistor, respectively.

[0052] According to the inventor's verification, when the pixel driving circuit does not employ the voltage conversion module 300 to control the potential of the first node n1, the voltage of the first voltage end VDD needs to be set to 14V, but after the pixel driving circuit employs the voltage switching module to control the potential of the first node n1, the voltage of the first voltage end VDD is set to 10V, and the light emitting device D can be driven to achieve normal light emission. Therefore, the pixel driving circuit according to the embodiment of the present invention can reduce power consumption.

[0053] 3 is a structural schematic diagram of a display panel according to an embodiment of the present invention, and FIG. 4 is a structural schematic diagram of a pixel driving circuit according to an embodiment of the present invention. The present invention further provides a display panel, which includes a plurality of data lines DL, a plurality of first scan lines ScL, a plurality of second scan lines SgL, a plurality of emission control lines EML, a plurality of sub-pixels Pi arranged in an array, and a voltage conversion module 300.

[0054] Preferably, the plurality of data lines DL are configured to transmit a plurality of data signals, the plurality of first scanning lines ScL are configured to transmit a plurality of cascaded first scanning signals, the plurality of second scanning lines SgL are configured to transmit a plurality of cascaded second scanning signals, and the plurality of light emission control lines EML are configured to transmit a plurality of cascaded light emission control signals.

[0055] A plurality of the sub-pixels Pi arranged in an array are electrically connected to the corresponding data line DL, the first scanning line ScL, the second scanning line SgL and the emission control line EML, thereby causing the plurality of the sub-pixels Pi to perform display based on the corresponding first scanning signal, the second scanning signal and the emission control signal.

[0056] Preferably, each said sub-pixel Pi comprises a light emitting device D and a pixel driving circuit Pd.

[0057] Preferably, the light emitting device D includes an organic light emitting diode, a sub-millimeter light emitting diode, a micro light emitting diode, and so on.

[0058] The pixel driving circuit Pd includes a driving transistor T1, a data transistor T2, a first capacitor C1 and a second capacitor C2.

[0059] The anode of the light-emitting device D is electrically connected to one of the source and drain of the driving transistor T1, the cathode of the light-emitting device D is electrically connected to a common node n0, the other of the source and drain of the driving transistor T1 is electrically connected to a first voltage end VDD, the source and drain of the data transistor T2 are electrically connected between a corresponding data line DL and the gate of the driving transistor T1, the first capacitor C1 is connected in series between the first voltage end VDD and the anode of the light-emitting device D, and the second capacitor C2 is connected in series between the gate of the driving transistor T1 and the anode of the light-emitting device D.

[0060] The voltage conversion module 300 includes a plurality of voltage switching units 303, each of which is electrically connected to the light emitting devices D of a plurality of sub-pixels Pi located in the same row via the common node n0, and each of the voltage switching units 303 is configured to output a first voltage or a second voltage to the common node n0.

[0061] Here, the voltage conversion module 300 is configured to control the potential of the common node n0 to change from the first voltage to the second voltage before the driving transistor T1 drives the light emitting device D to emit light, and the first voltage is greater than the second voltage, so that the first capacitor C1 and the second capacitor C2 couple the potential change to the first voltage end VDD and the gate of the driving transistor T1, thereby realizing the normal emission of the light emitting devices D of the plurality of sub-pixels Pi located in the same row without setting the voltage of the first voltage end VDD very high, which is favorable to reducing power consumption, expanding the compensation range of the internal compensation circuit, and improving the reliability and yield of the product, and is favorable to improving the competitiveness of glass-based active driving direct display products. In addition, since the plurality of sub-pixels located in the same row multiplex the same voltage switching unit 303, it is also favorable to saving manufacturing costs and layout space.

[0062] Preferably, the voltage conversion module 300 further includes a control unit 301 and a voltage generating unit 302. The control unit 301 is configured to generate a third voltage, and the voltage generating unit 302 includes a DC converter DCDC, a ground unit and a GND, the DC converter DCDC is electrically connected to the control unit 301, the DC converter DCDC is configured to generate the first voltage according to the third voltage, and output the first voltage to the voltage switching unit 303, and the ground unit GND is configured to provide the second voltage to the voltage switching unit 303.

[0063] Preferably, multiple voltage switching units 303 may be electrically connected to the same control unit 301 and the same voltage generating unit 302, for example, all ports a in FIG. 3 are electrically connected to the control unit 301, all ports b are electrically connected to the DC / DC converter DCDC, and all ports c are electrically connected to the ground unit GND, thereby saving manufacturing costs.

[0064] Preferably, the control unit 301 includes a time sequence controller, a programmable logic gate array, and the like.

[0065] Preferably, the control unit 301 is configured to generate a plurality of first control signals and a plurality of second control signals. Each of the voltage switching units 303 includes a first switch tube Ts1 and a second switch tube Ts2. A gate of the first switch tube Ts1 is electrically connected to the control unit 301, a source and a drain of the first switch tube Ts1 are electrically connected between the DC / DC converter DCDC and the corresponding common node n0, and the first switch tube Ts1 is configured to output the first voltage to the common node n0 based on the corresponding first control signal. A gate of the second switch tube Ts2 is electrically connected to the control unit 301, a source and a drain of the second switch tube Ts2 are electrically connected between the ground unit GND and the corresponding common node n0, and the second switch tube Ts2 is configured to output the second voltage to the common node n0 based on the corresponding second control signal.

[0066] Preferably, the gate of the data transistor T2 of each of the pixel driving circuits Pd is electrically connected to the corresponding first scan line ScL. Each of the pixel driving circuits further includes a reset transistor T3 and a light emission control transistor T4. The gate of the reset transistor T3 is electrically connected to the corresponding second scan line SgL, one of the source and drain of the reset transistor T3 is electrically connected to a reset line SeL, and the other of the source and drain of the reset transistor T3 is electrically connected to the light emitting device D and the driving transistor T1. The gate of the light emission control transistor T4 is electrically connected to the corresponding light emission control line, and the source and drain of the light emission control transistor T4 are electrically connected between the driving transistor T1 and the first voltage terminal VDD.

[0067] Preferably, since the plurality of sub-pixels adopt a sequential scanning driving method to realize display, the plurality of first control signals and the plurality of second control signals may each be in the form of a cascaded connection signal, thereby controlling the light emission state of the sub-pixels in the corresponding row according to the cascaded first scanning signal, the cascaded second scanning signal, and the cascaded light emission control signal.

[0068] As can be understood, the working principle of the pixel driving circuit Pd can be obtained with reference to the time sequence of FIG. 2, and will not be further described here.

[0069] The present invention further provides a display device, which includes any one of the above driving circuits or any one of the above display panels.

[0070] As can be appreciated, the display devices include mobile displays (eg, laptops, mobile phones, etc.), stationary terminals (eg, desktop computers, televisions, etc.), measuring devices (eg, exercise bracelets, thermometers, etc.), and the like.

[0071] In this specification, the principles and embodiments of the present invention have been described using specific examples. However, the explanation of the above examples is merely intended to aid in understanding the method of the present invention and its core ideas. At the same time, a person skilled in the art can make changes to both the form for implementing the invention and the scope of application based on the ideas of the present invention. In summary, the contents of this specification should not be understood as limitations on the present invention. [Explanation of symbols]

[0072] 100: Drive module 200: Data writing module 300: Voltage conversion module 301: Control unit 302: Voltage generation unit 303: Voltage switching unit 401: First potential coupling module 402: Second potential coupling module 500: Reset module 600: Light emission control module C1: First capacitor C2: Second capacitor D: Light-emitting device DCDC: DC converter DL: Data line EML: Light Emitting Control Line GND: Ground unit Pd: Pixel driving circuit Pi: Sub-pixel ScL: First scan line SeL: Reset line SgL: Second scan line T1: Drive transistor T2: Data transistor T3: Reset transistor T4: Light-emitting control transistor Ts1: First switch tube Ts2: Second switch tube VDD: First voltage terminal a :port b :Port c : port n0: Common node n1: First node n2: second node n3: the third node n4: The fourth node

Claims

1. 1. A pixel driving circuit, comprising: a light emitting device connected in series between the first node and the second node; a driving module electrically connected to the light-emitting device through the second node and electrically connected to a first voltage end through a third node, the driving module being configured to generate a driving current based on a data signal to control the light emission of the light-emitting device; a data writing module electrically connected to the driving module via a fourth node and configured to output a data signal to the driving module; a voltage conversion module electrically connected to the first node and configured to control a potential of the first node at a first time to change from a first voltage to a second voltage; a first potential coupling module electrically connected to the second node and the third node, including a first capacitor connected in series between the second node and the third node, and configured to couple the third node to the first capacitor and reduce the potential of the third node when a light emission control signal is at a low level, by changing the potential of the first node from the first voltage to the second voltage; a second capacitor electrically connected to the second node and the fourth node and connected in series between the second node and the fourth node, and configured to couple the fourth node to the second capacitor and reduce the potential of the fourth node when a light emission control signal is at a low level, by changing the potential of the first node from the first voltage to the second voltage; wherein the driving module controls the light emitting device to start emitting light at a second time, the first time being prior to the second time, and the first voltage being greater than the second voltage.

2. The voltage conversion module includes: a control unit configured to generate a first control signal and a second control signal; a voltage generating unit electrically connected to the control unit and configured to generate the first voltage and the second voltage; 2. The pixel driving circuit of claim 1, further comprising: a voltage switching unit electrically connected to the first node, the voltage generating unit and the control unit, the voltage switching unit configured to output the first voltage to the first node based on the first control signal and to output the second voltage to the first node based on the second control signal.

3. The control unit is further configured to generate a third voltage; 3. The pixel driving circuit of claim 2, wherein the voltage generating unit includes a DC converter and a ground unit, the DC converter is electrically connected to the control unit, the DC converter is configured to generate the first voltage based on the third voltage, and the ground unit is configured to provide the second voltage.

4. The voltage switching unit includes:

4. The pixel driving circuit of claim 3, comprising: a first switch tube, a gate of the first switch tube electrically connected to the control unit, and a source and a drain of the first switch tube electrically connected between the DC converter and the first node; and a second switch tube, a gate of the second switch tube electrically connected to the control unit, and a source and a drain of the second switch tube electrically connected between the ground unit and the first node.

5. the driving module includes a driving transistor, a gate of the driving transistor is electrically connected to the fourth node, and a source and a drain of the driving transistor are electrically connected between the second node and the third node; the data writing module includes a data transistor, a gate of the data transistor is configured to receive a first scanning signal, one of a source and a drain of the data transistor is configured to receive the data signal, and the other of the source and the drain of the data transistor is electrically connected to the fourth node; The pixel driving circuit includes: a reset module including a reset transistor, a gate of the reset transistor configured to receive a second scan signal, one of a source and a drain of the reset transistor configured to receive a reset signal, and the other of the source and the drain of the reset transistor electrically connected to the second node; 2. The pixel driving circuit of claim 1, further comprising: an emission control module including an emission control transistor, wherein a gate of the emission control transistor is electrically connected to an emission control line and configured to receive the emission control signal, and a source and a drain of the emission control transistor are electrically connected between the driving transistor and the third node.

6. A display panel, a plurality of sub-pixels arranged in an array, each of the sub-pixels including a light-emitting device and a pixel driving circuit, the pixel driving circuit including a driving transistor, a data transistor, a first capacitor, and a second capacitor, an anode of the light-emitting device electrically connected to one of a source and a drain of the driving transistor, a cathode of the light-emitting device electrically connected to a common node, the other of the source and the drain of the driving transistor electrically connected to a first voltage end, a source and a drain of the data transistor electrically connected between a corresponding data line and a gate of the driving transistor, the first capacitor connected in series between the first voltage end and the anode of the light-emitting device, and the second capacitor connected in series between the gate of the driving transistor and the anode of the light-emitting device; a voltage conversion module including a plurality of voltage switching units, each of which is electrically connected to the light emitting devices of a plurality of the sub-pixels located in the same row via the common node, and each of the voltage switching units is configured to output a first voltage or a second voltage to the common node; Here, the display panel is characterized in that the voltage conversion module is configured to control the potential of the common node to change from the first voltage to the second voltage before the driving transistor drives the light-emitting device to emit light, and the first voltage is greater than the second voltage.

7. The voltage conversion module includes: a control unit configured to generate a third voltage; 7. The display panel of claim 6, further comprising: a voltage generating unit including a DC converter and a grounding unit, the DC converter being electrically connected to the control unit, the DC converter being configured to generate the first voltage based on the third voltage and output the first voltage to the voltage switching unit, and the grounding unit being configured to provide the second voltage to the voltage switching unit.

8. The control unit is configured to generate a plurality of first control signals and a plurality of second control signals, and each of the voltage switching units includes: a first switch tube, a gate of the first switch tube electrically connected to the control unit, a source and a drain of the first switch tube electrically connected between the DC converter and a corresponding common node, the first switch tube configured to output the first voltage to the common node according to a corresponding first control signal; 8. The display panel of claim 7, further comprising: a second switch tube, a gate of the second switch tube electrically connected to the control unit, a source and a drain of the second switch tube electrically connected between the ground unit and a corresponding common node, and the second switch tube configured to output the second voltage to the common node based on a corresponding second control signal.

9. The display panel includes a plurality of first scanning lines, a plurality of second scanning lines, and a plurality of light emission control lines, and a gate of the data transistor of each of the pixel driving circuits is electrically connected to a corresponding one of the first scanning lines, and each of the pixel driving circuits includes: a reset transistor, a gate of the reset transistor being electrically connected to a corresponding second scan line, one of a source and a drain of the reset transistor being electrically connected to a reset line, and the other of the source and the drain of the reset transistor being electrically connected to the light emitting device and the driving transistor; 7. The display panel according to claim 6, further comprising: an emission control transistor, the gate of which is electrically connected to the corresponding emission control line, and the source and drain of which are electrically connected between the driving transistor and the first voltage terminal.

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