Partition calculation based on sub-picture level

Abstract

To provide several techniques for video coding and video decoding.SOLUTION: A method as an example includes the step of executing a conversion between a video including at least one picture video and a bit stream of video, each video picture having at least one tile including at least one tile row. The bit stream complies with a format rule. The format rule defines that a tile row index is derived for each coding tree unit (CTU) row of the tile of the video picture.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application is a divisional application of Japanese Patent Application No. 2022-550700 filed on August 23, 2022 based on International Patent Application No. PCT / US2021 / 019216 filed on February 23, 2021, claiming priority and the benefit of U.S. Provisional Application No. 62 / 980963 filed on February 24, 2020. All of the above applications are incorporated herein by reference in their entirety.

[0002] [Technical field] This patent specification relates to image and video coding and decoding. [Background technology]

[0003] Digital video accounts for the largest bandwidth usage on the Internet and other digital communications networks, and the bandwidth demands for digital video usage are expected to continue to increase as the number of user devices capable of receiving and displaying video increases. Summary of the Invention

[0004] This patent document discloses techniques that may be used by video encoders and decoders to process coded representations of video with control information that is useful for decoding the coded representations.

[0005] In one example aspect, a video processing method is disclosed, the method including performing a conversion between a video including one or more video pictures and a bitstream of the video, each video picture having one or more tiles including one or more tile columns, the bitstream following a format rule that specifies that a tile column index is derived for each coding tree unit (CTU) column of tiles of the video picture.

[0006] In another example aspect, a video processing method is disclosed that includes performing a conversion between a video including one or more video pictures and a bitstream of the video, each video picture having one or more tiles including one or more tile rows, the bitstream following a format rule that specifies that a tile row index is derived for each coding tree unit (CTU) row of a tile of the video picture.

[0007] In another example aspect, a video processing method is disclosed that includes performing a conversion between a video including at least one video picture and a bitstream of the video according to rules, the at least one video picture having one or more slices and one or more sub-pictures, the rules defining that an order of slice indexes of the one or more slices in the at least one video picture is indicated in response to a syntax element associated with the at least one video picture indicating whether a single slice is included in each sub-picture of the at least one video picture.

[0008] In another example aspect, a video processing method is disclosed, the method including performing a conversion between a video unit of a video domain of a video and a bitstream of the video, the bitstream following a format rule, the format rule defining that first control information at a first level of the video domain in the bitstream controls whether second control information is included at a second level of the video unit in the bitstream, the second level being smaller than the first level, the first control information and the second control information including information regarding whether or how a luma mapping and chroma scaling (LMCS) tool is applied to the video unit, the LMCS tool including using a luma reshaping process (RP) or a chroma residual scaling (CRS) for the conversion.

[0009] In another example aspect, a video processing method is disclosed, the method including performing conversion between a video and a bitstream of the video according to rules, the rules specifying that a luma mapping and chroma scaling (LMCS) tool is enabled if a first syntax element in a referenced sequence parameter set indicates that the LMCS tool is enabled, the rules specifying that the LMCS tool is not used if the first syntax element indicates that the LMCS tool is disabled, and the rules specifying that the LMCS tool is enabled for all slices associated with a picture header of a video picture if a second syntax element in the bitstream indicates that the LMCS tool is enabled at a picture header level of the video. The rules specify that the LMCS tools are not used for all slices associated with the picture header if the second syntax element indicates that the LMCS tools are disabled at the picture header level of the video, the rules specify that the LMCS tools are used for a current slice associated with a slice header of a video picture if a third syntax element selectively included in the bitstream indicates that the LMCS tools are enabled at the slice header level of the video, and the rules specify that the LMCS tools are not used for the current slice if the third syntax element indicates that the LMCS tools are disabled at the slice header level of the video.

[0010] In another example aspect, a video processing method is disclosed, the method comprising: performing a conversion between a video including one or more video pictures and a bitstream of the video according to rules, the rules defining whether an adaptive motion vector differential decomposition (AMVR) is used in motion vector coding of an affine inter mode based on a syntax element selectively included in a referenced sequence parameter set (SPS) indicating whether the AMVR is enabled, the rules defining that the AMVR is not used in the motion vector coding of the affine inter mode if the syntax element indicates that the AMVR is disabled, and the rules defining that the AMVR is inferred not to be used in the motion vector coding of the affine inter mode if the syntax element is not included in the SPS.

[0011] In another example aspect, a video processing method is disclosed, the method comprising: performing a conversion between a video including a video picture and a bitstream of the video according to rules, the video picture including sub-pictures, tiles and slices, the rules defining that the conversion is performed by not counting a height of the sub-picture with a number of tiles of the video picture, whereby the sub-picture includes the slices that are partitioned from the tiles.

[0012] In another example aspect, a video processing method is disclosed, the method including performing a conversion between a video including a video picture and a bitstream of the video, the bitstream indicating heights of sub-pictures of the video picture counted based on a number of coding tree units (CTUs) of the video picture.

[0013] In another example aspect, a video processing method is disclosed, the method including making a decision as to whether a height of a sub-picture of a video picture of a video is less than a height of a tile row of said video picture according to a rule, and using said decision to perform a conversion between said video and a bitstream of said video.

[0014] In another example aspect, a video processing method is disclosed, the method including performing a conversion between a video including one or more video pictures, each video picture including one or more tiles, and a coded representation of the video, the coded representation according to a format rule, the format rule specifying first information signaled in the coded representation and second information derived from the coded representation, at least the first information or the second information relating to a row index or a column index of the one or more tiles.

[0015] In another example aspect, a video processing method is disclosed, the method including performing a conversion between a video unit in a video domain of a video and a coded representation of the video, the coded representation following a format rule that specifies that first control information in the video domain controls whether second control information is included at the level of the video unit, the first control information and / or the second control information including information regarding a reshaping process or Chroma Residual Scaling (CRS) or Luma Mapping and Chroma Scaling (LMCS) used for the conversion.

[0016] In yet another exemplary aspect, a video encoder apparatus is disclosed, the video encoder having a processor configured to implement the above method.

[0017] In yet another exemplary aspect, a video decoder apparatus is disclosed, the video decoder apparatus having a processor configured to implement the above method.

[0018] In yet another exemplary aspect, a computer readable medium is disclosed having code stored thereon, the code being in the form of processor executable code that embodies one of the methods described herein.

[0019] These and other features are described throughout this specification. [Brief description of the drawings]

[0020] [Figure 1] 1 shows an example of raster scan slice partitioning where a picture is divided into 12 tiles and 3 raster scan slices. [Diagram 2] 1 shows an example of rectangular slice partitioning of a picture where the picture is divided into 24 tiles (6 tile columns and 4 tile rows) and 9 rectangular slices. [Diagram 3] 1 shows an example of a picture partitioned into tiles and rectangular slices, where the picture is divided into four tiles (two tile columns and two tile rows) and four rectangular slices. [Figure 4] A picture is shown partitioned into 15 tiles, 24 slices, and 24 subpictures. [Diagram 5] FIG. 1 is a block diagram of an example video processing system. [Figure 6] FIG. 2 is a block diagram of a video processing device. [Figure 7] 1 is a flow chart of an example method of video processing. [Figure 8] FIG. 1 is a block diagram illustrating a video coding system according to some embodiments of the present disclosure. [Figure 9] FIG. 2 is a block diagram illustrating an encoder according to some embodiments of the present disclosure. [Figure 10] FIG. 2 is a block diagram illustrating a decoder according to some embodiments of the present disclosure. [Figure 11] 1 is a flow chart of an example method of video processing. [Figure 12] 1 is a flow chart of an example method of video processing. [Figure 13] 1 is a flow chart of an example method of video processing. [Figure 14] 1 is a flow chart of an example method of video processing. [Figure 15] 1 is a flow chart of an example method of video processing. [Figure 16] 1 is a flow chart of an example method of video processing. [Figure 17] 1 is a flow chart of an example method of video processing. [Figure 18] 1 is a flow chart of an example method of video processing. [Figure 19] 1 is a flow chart of an example method of video processing. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Section headings are used herein for ease of understanding, and do not limit the applicability of the techniques and embodiments disclosed in each section to only that section. Additionally, the term H.266 is used in some descriptions for ease of understanding only, and not to limit the scope of the disclosed techniques. As such, the techniques described herein are applicable to other video codec protocols and designs. Throughout this specification, editorial changes are indicated in the text by opening and closing double brackets (e.g., [[]]) indicating canceled text between the double brackets, and bold italicized text indicating added text, with respect to the current draft of the VVC specification.

[0022] [1. Overview] This specification relates to video coding techniques. In particular, it relates to support for sub-pictures, LMCS, and AMVR. The sub-picture related aspects include derivation of the number of tile rows and tile columns contained in a sub-picture, as well as derivation of a list of raster scan CTU addresses of CTUs contained in slices if each sub-picture contains one or less slices. The LMCS related aspects relate to signaling of LMCS enablement at different levels. The AMVR related aspects relate to the semantics of sps_affine_amvr_enabled_flag. The ideas may be applied individually or in various combinations to any video coding standard or non-standard video codec supporting single layer and / or multi-layer video coding, for example the Versatile Video Coding (VVC) under development.

[0023] [2.Acronym] ALF Adaptive Loop Filter AMVR Adaptive Motion Vector Difference Resolution APS Adaptation Parameter Set AU Access Unit AUD Access Unit Delimiter AVC Advanced Video Coding CLVS Coded Layer Video Sequence CPB Coded Picture Buffer CRA Clean Random Access CTU Coding Tree Unit CVS Coded Video Sequence DPB Decoded Picture Buffer DPS Decoding Parameter Set EOB End Of Bitstream EOS End Of Sequence GDR Gradual Decoding Refresh HEVC High Efficiency Video Coding HRD Hypothetical Reference Decoder IDR Instantaneous Decoding Refresh JEM Joint Exploration Model LMCS Luma Mapping with Chroma Scaling MCTS Motion-Constrained Tile Sets NAL Network Abstraction Layer OLS Output Layer Set PH Picture Header PPS Picture Parameter Set PTL Profile, Tier and Level PU Picture Unit RBSP Raw Byte Sequence Payload SEI Supplemental Enhancement Information SPS Sequence Parameter Set SVC Scalable Video Coding VCL Video Coding Layer VPS Video Parameter Set VTM VVC Test Model VUI Video Usability Information VVC Versatile Video Coding

[0024] [3. Initial Discussion] Video coding standards have evolved primarily through the development of well-known ITU-T and ISO / IEC standards. ITU-T produced H.261 and H.263, ISO / IEC produced MPEG-1 and MPEG-4 Visual, and the two organizations jointly produced H.262 / MPEG-2 Video, H264 / MPEG-4 AVC (Advanced Video Coding), and H.265 / HEVC standards. Since H.262, video coding standards have been based on a hybrid video coding structure where temporal prediction plus transform coding is used. To explore future video coding technologies beyond HEVC, the Joint Video Exploration Team (JVET) was jointly established by VCEG and MPEG. Since then, many new methods have been adopted by JVET and put into reference software named Joint Exploration Model (JEM). JVET meetings are held simultaneously once every quarter, and the new coding standard aims to reduce the bitrate by 50% compared to HEVC. The new video coding standard was officially named VVC (Versatile Video Coding) at the April 2018 JVET meeting, and the first version of the VVC Test Model (VTM) was released at that time. As there are continuous efforts contributing to VVC standardization, new coding methods are adopted into the VVC standard at every JVET meeting. Since then, the VVC Working Draft and Test Model VTM are updated after every meeting. The VVC project is currently aiming for technical completion (FDIS) at the July 2020 meeting.

[0025] [3.1. Picture partitioning method in HEVC] HEVC includes four different picture partitioning techniques, namely regular slices, dependent slices, tiles, and Wavefront Parallel Processing (WPP), which can be applied for Maximum Transfer Unit (MTU) size matching, parallel processing, and reduced end-to-end delay.

[0026] Regular slices are similar to H.264 / AVC: each regular slice is encapsulated in its own NAL unit, and intra-picture prediction (intra-sample prediction, motion information prediction, coding mode prediction) and entropy coding dependencies across slice boundaries are disabled. Thus, regular slices can be reconstructed independently from other regular slices in the same picture (although interdependencies due to loop filtering operations may still exist).

[0027] Regular slices are the only tool that can be used for parallelization that is also available in H.264 / AVC in virtually the same form. Parallelization based on regular slices does not require much inter-processor or inter-core communication (except for inter-processor or inter-core data sharing for motion compensation when decoding predictively coded pictures, which is usually much heavier than inter-processor or inter-core data sharing with intra-picture prediction). However, for the same reason, the use of regular slices can lead to high coding overhead due to the bit cost of slice headers and the lack of prediction across slice boundaries. Furthermore, regular slices (in contrast to other tools described below) also serve as an important mechanism for bitstream partitioning to match MTU size requirements due to their intra-picture independence and the encapsulation of each regular slice in its own NAL unit. In many cases, the parallelization goal and the MTU size matching goal put conflicting demands on slice layout within a picture. The realization of this solution led to the development of the parallelization tool described below.

[0028] Dependency slices have short slice headers and allow for partitioning of the bitstream at treeblock boundaries without compromising any intra-picture prediction. Essentially, dependency slices provide fragmentation of a regular slice into multiple NAL units to result in reduced end-to-end delay by allowing parts of the regular slice to be sent before the coding of the entire regular slice is finished.

[0029] In WPP, a picture is partitioned into single rows of coding tree blocks (CTBs). Entropy decoding and prediction are allowed to use data from CTBs in other partitions. Parallel processing is possible through parallel decoding of CTB rows, where the start of decoding of a CTB row is delayed by two CTBs to ensure that data for the CTBs to the right and above the target CTB are available before the target CTB is decoded. With this staggered start (which looks like a wavefront when represented graphically), parallelization is possible with as many processors / cores as the picture contains CTB rows. Since intra-picture prediction between adjacent treeblock rows in a picture is allowed, the required inter-processor / inter-core communication to enable intra-picture prediction can be significant. WPP is not a tool for MTU size matching, since WPP partitioning does not result in the generation of additional NAL units compared to when it is not applied. However, regular slices can be used with WPP, with certain coding overhead, if MTU size matching is required.

[0030] Tiles define horizontal and vertical boundaries that partition a picture into tile columns and rows. Tile columns run from the top of the picture to the bottom of the picture. Similarly, tile rows run from the left of the picture to the right of the picture. The number of tiles in a picture can be simply determined as the number of tile columns multiplied by the number of tile rows.

[0031] The scan order of the CTBs is changed to be local within the tile (in the CTB raster scan order of the tile) before decoding the top-left CTB of the next tile in the picture tile raster scan order. As with regular slices, tiles break entropy decoding dependencies as well as intra-picture prediction dependencies. However, tiles cannot be used for MTU size matching, since they do not need to be included in individual NAL units (same as WPP in this respect). Each tile can be processed by one processor / core, and the inter-processor / inter-core communication required for intra-picture prediction between processing units decoding adjacent tiles is limited to the transmission of shared slice headers when a slice spans more than one tile, and the sharing associated with loop filtering of reconstructed samples and metadata. When more than one tile or WPP segment is included in a slice, the entropy point byte offset for each tile or WPP segment in the slice except the first one is signaled in the slice header.

[0032] For simplicity, restrictions on the application of the four different picture partitioning methods are specified in HEVC. A given coded video sequence cannot contain both tiles and wavefronts for most of the profiles specified in HEVC. For each slice and tile, one or both of the following conditions must be met: 1) all coded treeblocks in a slice belong to the same tile; 2) all coded treeblocks in a tile belong to the same slice. Finally, a wavefront segment contains exactly one CTB row, and if WPP is used, if a slice starts in a CTB row, it should end in the same CTB row.

[0033] The final amendment to HEVC is specified in the JCT-VC output document JCTVC-AC1005, J. Boyce, A. Ramasubramonian, R. Skupin, GJ Sullivan, A. Tourapis, Y.-K. Wang (editors), "HEVC Additional Supplemental Enhancement Information (Draft 4)", 24 October 2017, available at http: / / phenix.int-evry.fr / jct / doc_end_user / documents / 29_Macau / wg11 / JCTVC-AC1005-v2.zip. With this amendment in place, HEVC specifies three MCTS-related SEI messages: the Time MCTS SEI message, the MCTS Extraction Information Set SEI message, and the MCTS Extraction Information Nesting SEI message.

[0034] The temporal MCTS SEI message indicates the presence of an MCTS in the bitstream and signals the MCTS. For each MCTS, motion vectors are restricted to point to full sample positions within the MCTS and fractional sample positions that require only full sample positions within the MCTS for interpolation, and the use of motion vector candidates for temporal motion vector prediction derived from blocks outside the MCTS is not allowed. In this way, each MCTS can be decoded independently without the presence of tiles that are not included in the MCTS.

[0035] The MCTS extraction information set SEI message provides supplemental information that can be used with MCTS sub-bitstreams (specified as part of the semantics of the SEI message) to generate a conforming bitstream for the MCTS set. The information consists of multiple extraction information sets, each of which defines multiple MCTS sets and includes the RBSP bytes of the replacement VPS, SPS, and PPS used during the MCTS sub-bitstream extraction process. When extracting a sub-bitstream according to the MCTS sub-bitstream extraction process, the parameter sets (VPS, SPS, and PPS) need to be rewritten or replaced, and the slice header needs to be slightly updated, since one or all of the syntax elements related to slice addresses (including first_slice_segment_in_pic_flag and slice_segment_address) usually need to have different values.

[0036] [3.2. Picture Partitioning in VVC] In VVC, a picture is divided into one or more tile rows and one or more tile columns. A tile is a sequence of CTUs that covers a rectangular region of the picture. The CTUs within a tile are scanned in raster scan order within that tile.

[0037] A slice consists of an integer number of complete tiles, or an integer number of consecutive complete CTU rows within a tile of a picture.

[0038] Two modes of slices are supported: raster scan slice mode and rectangular slice mode. In raster scan slice mode, a slice contains a succession of complete tiles in the tile raster scan of the picture. In rectangular slice mode, a slice contains multiple complete tiles that collectively form a rectangular region of the picture, or multiple contiguous complete CTU rows of one tile that collectively form a rectangular region of the picture. The tiles in a rectangular slice are scanned in tile raster scan order within the rectangular region corresponding to the slice.

[0039] A subpicture contains one or more slices that collectively cover a rectangular area of ​​the picture.

[0040] FIG. 1 shows an example of raster scan slice partitioning of a picture, where the picture is divided into 12 tiles and 3 raster scan slices.

[0041] FIG. 2 shows an example of rectangular slice partitioning of a picture, where the picture is divided into 24 tiles (6 tile columns and 4 tile rows) and 9 rectangular slices.

[0042] FIG. 3 shows an example of a picture partitioned into tiles and rectangular slices, where the picture is divided into four tiles (two tile columns and two tile rows) and four rectangular slices.

[0043] FIG. 4 shows an example of sub-picture partitioning of a picture, where the picture is partitioned into 18 tiles, 12 of which are on the left hand side, each covering one slice of a 4×4 CTU, and 6 of which are on the right hand side, each covering two vertically stacked slices of a 2×2 CTU, resulting in 24 slices of different dimensions and 24 sub-pictures (each slice is a sub-picture).

[0044] [3.3. Signaling of SPS / PPS / Picture Header / Slice Header in VVC (as JVET-Q2001-vC)] [Table 1] TIFF0007623077000002.tif228161TIFF0007623077000003.tif222161TIFF0007623077000004.tif223161 TIFF0007623077000005.tif222161TIFF0007623077000006.tif223161TIFF0007623077000007.tif223161 TIFF0007623077000008.tif223161TIFF0007623077000009.tif213161TIFF0007623077000010.tif222170 TIFF0007623077000011.tif223161TIFF0007623077000012.tif226161TIFF0007623077000013.tif223161 TIFF0007623077000014.tif222161TIFF0007623077000015.tif222169TIFF0007623077000016.tif223161 TIFF0007623077000017.tif222161TIFF0007623077000018.tif223161TIFF0007623077000019.tif228161 TIFF0007623077000020.tif222161TIFF0007623077000021.tif221169TIFF0007623077000022.tif222161 TIFF0007623077000023.tif213161TIFF0007623077000024.tif220161TIFF0007623077000025.tif206161

[0045] [3.4. JVET-Q2001-vC Specifications for Tiles, Slices and Subpictures] [Table 2] TIFF0007623077000027.tif223168TIFF0007623077000028.tif223168TIFF0007623077000029.tif215150TIFF000 7623077000030.tif221168TIFF0007623077000031.tif215169TIFF0007623077000032.tif226169TIFF00076230770 00033.tif218169TIFF0007623077000034.tif214169TIFF0007623077000035.tif225169TIFF0007623077000036.t if214169TIFF0007623077000037.tif223168TIFF0007623077000038.tif221169TIFF0007623077000039.tif123153

[0046] [3.5. Luma Mapping with Chroma Scaling (LMCS)] LMCS includes two aspects: luma mapping (a reshaping process represented by RP) and luma-dependent chroma residual scaling (CRS). For the luma signal, the LMCS mode operates based on two domains, including a first domain in the original domain and a second domain which is a reshape domain that maps luma samples to specific values ​​according to a reshape model. Furthermore, for the chroma signal, residual scaling is applied, where the scaling coefficients are derived from the luma samples.

[0047] The relevant syntax elements and semantics in the SPS, picture header (PH) and slice header (SH) are described as follows: Syntax Table [Table 3] TIFF0007623077000041.tif230161TIFF0007623077000042.tif229169 Semantics [Table 4]

[0048] [3.6. Adaptive Motion Vector Differential Decomposition (AMVR) for Affine Coded Blocks] Affine AMVR (Adaptive Motion Vector difference Resolution) is a coding tool that allows affine inter-coded blocks to transmit MV differences at different resolutions, for example, at precisions of 1 / 4 luma sample (default, amvr_flag is set to 0), 1 / 16 luma sample, and 1 luma sample.

[0049] The relevant syntax elements and semantics in the SPS are described as follows: Syntax Table [Table 5] Semantics [Table 6] [Table 7] TIFF0007623077000047.tif211170TIFF0007623077000048.tif222170TIFF00076230770 00049.tif214170TIFF0007623077000050.tif219170TIFF0007623077000051.tif188170

[0050] [4. Technical problem addressed by the disclosed technical solution] The existing design for subpicture and LMCS in VVC has the following challenges: 1) The derivation of the list SubpicNumTileRows[] (which specifies the number of tile rows contained in a subpicture) in equation D.5 is inaccurate in that the index value idx of CtbToTileRowBd[idx] in the equation can be larger than the maximum allowed value. Furthermore, the derivation of both SubpicNumTileRows[] and SubpicNumTileCols[] (which specifies the number of tile columns contained in a subpicture) uses CTU-based arithmetic that is unnecessarily complex. 2) The derivation of the array CtbAddrInSlice in Equation 29 when single_slice_per_subpic_flag is equal to 1 is incorrect in that the values ​​of the raster scan CTB addresses in the array for each slice must be in the CTU's decoding order rather than the CTU's raster scan order. 3) LMCS signaling is inefficient. When ph_lmcs_enabled_flag is equal to 1, in most cases LMCS will be enabled for all slices of a picture. However, in the current VVC design, if LMCS is enabled for all slices of a picture, not only ph_lmcs_enabled_flag is equal to 1, but slice_lmcs_enabled_flag with value 1 needs to be signaled for each slice. a. The semantics of ph_lmcs_enabled_flag contradict the motivation for signaling slice-level LMCS flag when ph_lmcs_enabled_flag is true. In current VVC, when ph_lmcs_enabled_flag is true, it means that all slices should have LMCS enabled. Therefore, there is no need to further signal the LMCS enabled flag in the slice header. b. Furthermore, if the picture header indicates that LMCS is enabled, then typically LMCS is fully enabled for all slices. The control of LMCS in the slice header is primarily to handle corner cases. Thus, if the PH LMCS flag is true and the SH LMCS flag is always signaled, unnecessary bits may be signaled for the typical user case. 4) The semantics of the SPS affine AMVR flag is not precise because for each affine inter-coded CU, affine AMVR can be enabled or disabled.

[0051] [5. Examples of Technology and Embodiments] In order to solve the above problems, as well as some other problems mentioned, the methods summarized below are disclosed. The items should be considered as examples for the purpose of overview and should not be interpreted narrowly. Moreover, these items may be applied individually or combined in any manner.

[0052] Related to the sub-picture for solving the first and second problems 1. One or more of the following approaches are disclosed: a. The tile column index for each CTU column of the picture is derived. b. The derivation of the number of tile columns contained in a sub-picture is based on the tile column index of the leftmost and / or rightmost CTU contained in the sub-picture. c. The tile row index for each CTU row of the picture is derived. d. The derivation of the number of tile rows included in the sub-picture is based on the tile row indexes of the upper and / or lower CTUs included in the sub-picture. e. The term picture-level slice index is defined as follows: the index of a slice relative to the list of slices in a picture, defined when rect_slice_flag is equal to 1, in the order in which the slices are signaled in the PPS when single_slice_per_subpic_flag is equal to 0, or in the order of increasing sub-picture indices of the sub-pictures corresponding to the slice when single_slice_per_subpic_flag is equal to 1. f. In one example, the height of a subpicture may not be counted with respect to a tile if the subpicture contains a slice that is partitioned from the tile. g. In one example, the height of a subpicture may be counted in terms of CTUs instead of tiles. h. It is determined whether the subpicture height is less than one tile row. i. In one example, whether the height of a subpicture is less than one tile row is derived to be true if the subpicture only contains CTUs from one tile row, and if the top CTU in the subpicture is not the top CTU of that tile row, or the bottom CTU in the subpicture is not the bottom CTU of the tile row. ii. If each subpicture contains only one slice and the height of the subpicture is indicated to be less than one tile row, then for each slice with picture-level slice index i of the picture, the value of CtbAddrInSlice[i][j] is derived to be the picture raster scan CTU address of the jth CTU in the CTU raster scan of the subpicture, where j is greater than or equal to 0 and less than or equal to the number of CTUs in the slice minus 1. iii. In one example, whether a subpicture is less than one row of tiles is derived to be true if the distance between the top CTU in the subpicture and the bottom CTU in the subpicture is less than the height of the tile for the CTU. iv. If each subpicture contains only one slice and the height of the subpicture is indicated to be one or more tile rows, then for each slice with picture-level slice index i of the picture, the value of CtbAddrInSlice[i][j] is derived to be the picture raster scan CTU address of the jth CTU in the next order of CTUs, where j is greater than or equal to 0 and less than or equal to the number of CTUs in the slice minus one. 1) CTUs in different tiles in a subpicture are ordered such that a first CTU in a first tile with a smaller tile index value comes before a second CTU in a second tile with a higher tile index value. 2) The CTUs within a tile in a subpicture are ordered by the CTU raster scan of that tile.

[0053] Related to LMCS to solve the third problem (including sub-problems) 2. A two-level control of LMCS (including two aspects, namely luma mapping (reshaping process represented by RP) and luma-dependent chroma residual scaling (CRS)) is introduced, where higher-level (e.g., picture-level) and lower-level (e.g., slice-level) control is used, and the presence or absence of lower-level control information depends on the higher-level control information. In addition, the following applies: In the first example, one or more of the following sub-bullets apply: i. A first indicator (e.g., ph_lmcs_enabled_type) may be signaled at a higher level (e.g., in the picture header (PH)) to specify how LMCS is enabled at a lower level that is a non-binary value. 1) In one example, when the first indicator is equal to X (e.g., X=2), it specifies that LMCS is enabled for all slices associated with the PH; when the first indicator is equal to Y (Y!=X) (e.g., Y=1), it specifies that LMCS is enabled for one or more, but not all, slices not associated with the PH; and when the first indicator is equal to Z (Z!=X and Z!=Y) (e.g., Z=0), it specifies that LMCS is disabled for all slices associated with the PH. 2) In one example, when the first indicator is equal to X (e.g., X=2), it specifies that LMCS is disabled for all slices associated with the PH; when the first indicator is equal to Y (Y!=X) (e.g., Y=1), it specifies that LMCS is enabled for one or more, but not all, slices not associated with the PH; and when the first indicator is equal to Z (Z!=X and Z!=Y) (e.g., Z=0), it specifies that LMCS is enabled for all slices associated with the PH. a) Alternatively, further, if the first indicator is not present, the value of that indicator is inferred to be equal to a default value, for example X. 3) Alternatively, the first indicator may also be conditionally signaled depending on the value of an LMCS enabled flag (eg, sps_lmcs_enabled_flag) at the sequence level. 4) Alternatively, further, the first indicator may be coded as u(v), or u(2), or ue(v). 5) Alternatively, further, the first indicator may be coded with a truncated unary code. 6) Alternatively, LMCS APS information (e.g., ph_lmcs_aps_id) and / or CS enablement flag (e.g., ph_chroma_residual_scale_flag) used by the slice may also be signaled under conditional confirmation of the value of the first indicator. ii. A second indicator (e.g., slice_lmcs_enabled_flag) that enables / disables LMCS for lower levels may be signaled at the lower level (e.g., in the slice header), which may be conditionally signaled by checking the value of the first indicator. 1) In one example, the second indicator may be signaled under the condition check that "the first indicator is equal to Y." a) Alternatively, the second indicator may be signaled under a conditional check with "value of first indicator>>1" or "value of first indicator / 2" or "value of first indicator&0x01". b) Alternatively, in addition, the second indicator may be inferred to be enabled when the first indicator is equal to X, or inferred to be disabled when the first indicator is equal to Z. b. In the second example, one or more of the following sub-bullets apply: i.1 More indicators may be signaled at a higher level (eg, in the picture header (PH)) to specify how LMCS is enabled at a lower level that is a non-binary value. 1) In one example, two indicators may be signaled in the PH. a) In one example, a first indicator specifies whether there is at least one slice associated with the PH that has LMCS enabled, and a second indicator specifies whether all slices associated with the PH have LMCS enabled. i. Alternatively, the second indicator may also be conditionally signaled depending on the value of the first indicator, for example, if the first indicator identifies that at least one slice that enables LMCS is present. i. Alternatively, further, if the second indicator is not present, it is inferred that all slices have LMCS enabled. ii. Alternatively, a third indicator may also be conditionally signaled in the SH depending on the value of the second indicator, for example if the second indicator specifies that not all slices have LMCS enabled. i. Alternatively, further, if the third indicator is not present, it may be inferred at the value of the first and / or second indicator (eg, inferred to be equal to the value of the first indicator). b) Alternatively, the first indicator specifies whether there is at least one slice associated with the PH that disables LMCS, and the second indicator specifies whether all slices associated with the PH disable LMCS. i. Alternatively, the second indicator may also be conditionally signaled depending on the value of the first indicator, for example, if the first indicator identifies the presence of at least one slice in which LMCS is disabled. i. Alternatively, further, if the second indicator is not present, it is inferred that all slices have LMCS disabled. ii. Alternatively, a third indicator may also be conditionally signaled in the SH depending on the value of the second indicator, for example if the second indicator specifies that not all slices have LMCS disabled. i. Alternatively, further, if the third indicator is not present, it may be inferred at the value of the first and / or second indicator (eg, inferred to be equal to the value of the first indicator). 2) Alternatively, the first indicator may also be conditionally signaled depending on the value of an LMCS enabled flag (eg, sps_lmcs_enabled_flag) at the sequence level. ii. A third indicator (e.g., slice_lmcs_enabled_flag) that enables / disables LMCS for lower levels may be signaled at the lower level (e.g., in the slice header), which may be conditionally signaled by checking the values ​​of the first indicator and / or the second indicator. 1) In one example, the third indicator may be signaled under the condition confirmation that "not all slices enable LMCS" or "not all slices disable LMCS." c. In yet another example, the first and / or second and / or third indicator in the first / second example may be used to control utilization of the RP or CRS rather than the LMCS.

[0054] 3.The semantics of the three LMCS flags in SPS / PH / SH are updated as follows: [Table 8] a. PH and / or SH LMCS signaling is modified such that if LMCS is used for all slices of a picture, there is no LMCS signaling in the SH. i. Alternatively, further, how the LMCS is inferred depends on the PH LMCS signaling. 1) In one example, it is inferred to be enabled if LMCS is used for all slices of a picture, and is inferred to be disabled if LMCS is not used for all slices of a picture.

[0055] Affine AMVR Related 4.The semantics of the affine AMVR flag in SPS is updated as follows: [Table 9]

[0056] [6. Embodiment] [6.1. Embodiment 1: Subpicture Support] This embodiment relates to item 1 and its subitems. [Table 10] TIFF0007623077000055.tif211169TIFF0007623077000056.tif227169TIFF0007623077000057.tif227150 TIFF0007623077000058.tif218169TIFF0007623077000059.tif226169TIFF0007623077000060.tif115169

[0057] [6.2. Embodiment 2: Support for LMCS] In this embodiment, the syntax and semantics of LMCS-related syntax elements in the picture header are modified such that there is no LMCS signaling in the SH if LMCS is used for all slices of a picture. [Table 11] In the above example, the values ​​of M and N may be set to 1 and 2, respectively. Alternatively, the values ​​of M and N may be set to 2 and 1, respectively.

[0058] 5 is a block diagram illustrating an example video processing system 1900 in which various techniques disclosed herein may be implemented. Various implementations may include some or all of the components of system 1900. System 1900 may include an input 1902 that receives video content. The video content may be received in raw or uncompressed format, e.g., 8 or 10 bit multi-component pixel values, or may be in a compressed or encoded format. Input 1902 may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interfaces include wired interfaces such as Ethernet, Passive Optical Network (PON), etc., and wireless interfaces such as Wi-Fi or cellular networks.

[0059] The system 1900 may include a coding component 1904 that may implement various coding or encoding methods described herein. The coding component 1904 may reduce the average bit rate of the video from the input 1902 to an output of the coding component 1904 to generate a coded representation of the video. The coding techniques are therefore sometimes referred to as video compression or video transcoding techniques. The output of the coding component 1904 may be stored or transmitted via a connected communication, as represented by component 1906. The stored or communicated bitstream (or coded) representation of the video received at the input 1902 may be used by component 1908 to generate pixel values ​​or displayable video that is sent to a display interface 1910. The process of generating a video that can be viewed by a user from the bitstream representation is sometimes referred to as video decompression. Furthermore, it will be understood that while certain video processing operations are referred to as "coding" operations or tools, such coding tools or operations are used at an encoder and corresponding decoding tools or operations that transpose the results of the coding will be performed by a decoder.

[0060] Examples of peripheral bus interfaces or display interfaces may include Universal Serial Bus (USB) or High-Definition Multimedia Interface (HDMI®) or Displayport®, etc. Examples of storage interfaces include Serial Advanced Technology Attachment (SATA), PCI, IDE interfaces, etc. The techniques described herein may be embodied in various electronic devices such as mobile phones, laptops, smartphones, or other devices capable of performing digital data processing and / or video display.

[0061] FIG. 6 is a block diagram of a video processing device 3600. The device 3600 may be used to implement one or more of the methods described herein. The device 3600 may be embodied in a smartphone, a tablet, a computer, an Internet of Things (IoT) receiver, etc. The device 3600 may include one or more processors 3602, one or more memories 3604, and video processing hardware 3606. The processor 3602 may be configured to implement one or more of the methods described herein. The memory(s) 3604 may be used to store data and code used to implement the methods and techniques described herein. The video processing hardware 3606 may be used to implement some of the techniques described herein in hardware circuitry.

[0062] FIG. 8 is a block diagram illustrating an example video coding system 100 that may utilize the techniques of this disclosure.

[0063] 8, video coding system 100 may include source device 110 and destination device 120. Source device 110 generates encoded video data and may be referred to as a video encoding device. Destination device 120 can decode the encoded video data generated by source device 110 and may be referred to as a video decoding device.

[0064] The source device 110 may include a video source 112, a video encoder 114, and an input / output (I / O) interface 116.

[0065] The video source 112 may include a source such as a video capture device, an interface that receives video data from a video content provider, and / or a computer graphics system that generates video data, or a combination of such sources. The video data may have one or more pictures. The video encoder 114 encodes the video data from the video source 112 to generate a bitstream. The bitstream may include a sequence of bits that form a coded representation of the video data. The bitstream may include a coded picture and associated data. A coded picture is a coded representation of a picture. The associated data may include a sequence parameter set, a picture parameter set, and other syntax structures. The I / O interface 116 may include a modulator / demodulator (modem) and / or a transmitter. The coded video data may be transmitted directly over the network 130a to the destination device 120 via the I / O interface 116. The coded video data may also be stored in a storage medium / server 130b for access by the destination device 120.

[0066] The destination device 120 may include an I / O interface 126 , a video decoder 124 , and a display device 122 .

[0067] The I / O interface 126 may include a receiver and / or a modem. The I / O interface 126 may obtain encoded video data from the source device 110 or the storage medium / server 130b. The video decoder 124 may decode the encoded video data. The display device 122 may display the decoded video data to a user. The display device 122 may be integrated with the destination device 120 or may be external to the destination device 120 and configured to interface with an external display device.

[0068] The video encoder 114 and the video decoder 124 may operate according to a video compression standard, such as the High Efficiency Video Coding (HEVC) standard, the Versatile Video Coding (VVC) standard, and other current and / or future standards.

[0069] FIG. 9 is a block diagram illustrating an example of a video encoder 200, which may be the video encoder 114 of the system 100 illustrated in FIG.

[0070] Video encoder 200 may be configured to perform any or all of the techniques of this disclosure. In the example of FIG. 9, video encoder 200 includes multiple functional components. The techniques described in this disclosure may be shared among various components of video encoder 200. In some examples, a processor may be configured to perform any or all of the techniques described in this disclosure.

[0071] Functional components of the video encoder 200 may include a partition unit 201, a prediction unit 202, which may include a mode selection unit 203, a motion estimation unit 204, a motion compensation unit 205, and an intra prediction unit 206, a residual generation unit 207, a transform unit 208, a quantization unit 209, an inverse quantization unit 210, an inverse transform unit 211, a reconstruction unit 212, a buffer 213, and an entropy encoding unit 214.

[0072] In other examples, video encoder 200 may include more, fewer, or different functional components. In an example, prediction unit 202 may include an Intra Block Copy (IBC) unit. The IBC unit may perform prediction in an IBC mode, where at least one reference picture is the picture in which the current video block is located.

[0073] Furthermore, some components, such as the motion estimation unit 204 and the motion compensation unit 205, may be highly integrated, but are depicted separately in the example of FIG. 9 for purposes of illustration.

[0074] Partition unit 201 may partition a picture into one or more video blocks. Video encoder 200 and video decoder 300 may support a variety of video block sizes.

[0075] The mode selection unit 203 may select one of intra or inter coding modes, for example based on an error result, and provide the resulting intra or inter coded block to a residual generation unit 207 that generates residual block data, and to a reconstruction unit 212 that reconstructs the coded block for use as a reference picture. In some examples, the mode selection unit 203 may select a Combination of Intra and Inter Prediction (CIIP) mode, in which prediction is based on an inter prediction signal and an intra prediction signal. The mode selection unit 203 may also select a resolution (e.g., sub-pixel or integer pixel precision) for the motion vector of the block in the case of inter prediction.

[0076] To perform inter prediction on the current video block, motion estimation unit 204 may generate motion information for the current video block by comparing one or more reference frames from buffer 213 with the current video block. Motion compensation unit 205 may determine a predicted video block for the current video block based on the motion information and decoded samples of pictures from buffer 213 other than the picture associated with the current video block.

[0077] Motion estimation unit 204 and motion compensation unit 205 may perform different operations for the current video block depending on whether the current video block is an I slice, a P slice, or a B slice, for example.

[0078] In some examples, motion estimation unit 204 may perform unidirectional prediction for the current video block, and motion estimation unit 204 may look for a reference video block for the current video block from a reference picture in list 0 or list 1. Motion estimation unit 204 may then generate a reference index indicating a reference picture in list 0 or list 1 that contains the reference video block, and a motion vector indicating a spatial displacement between the current video block and the reference video block. Motion estimation unit 204 may output the reference index, the prediction direction indicator, and the motion vector as motion information for the current video block. Motion compensation unit 205 may generate a predicted video block for the current block based on the reference video block indicated by the motion information of the current video block.

[0079] In another example, motion estimation unit 204 may perform bidirectional prediction for the current video block, and motion estimation unit 204 may look for a reference video block for the current video block from a reference picture in list 0 and may look for another reference video block for the current video block from a reference picture in list 1. Motion estimation unit 204 may then generate a reference index indicating the reference pictures in list 0 and list 1 that contain the reference video blocks, and a motion vector indicating the spatial displacement between the reference video block and the current video block. Motion estimation unit 204 may output the reference index and the motion vector of the current video block as motion information of the current video block. Motion compensation unit 205 may generate a predicted video block for the current video block based on the reference video block indicated by the motion information of the current video block.

[0080] In some examples, the motion estimation unit 204 may output a full set of motion information for the decoding process of the decoder.

[0081] In some examples, motion estimation unit 204 may not output a full set of motion information for the current video. Rather, motion estimation unit 204 may signal the motion information of the current video block with reference to motion information of other video blocks. For example, motion estimation unit 204 may determine that the motion information of the current video block is sufficiently similar to the motion information of a neighboring video block.

[0082] In one example, motion estimation unit 204 may indicate in a syntax structure associated with the current video block a value that indicates to video decoder 300 that the current video block has the same motion information as other video blocks.

[0083] In other examples, motion estimation unit 204 may identify another video block and a motion vector difference (MVD) in a syntax structure associated with the current video block. The motion vector difference indicates the difference between the motion vector of the current video block and the motion vector of the indicated video block. Video decoder 300 may use the motion vector and the motion vector difference of the indicated video block to determine the motion vector of the current video block.

[0084] As described above, video encoder 200 may predictively signal motion vectors. Two examples of predictive signaling techniques that may be implemented by video encoder 200 include Advanced Motion Vector Prediction (AMVP) and merge mode signaling.

[0085] Intra prediction unit 206 may perform intra prediction on the current video block. When intra prediction unit 206 performs intra prediction on the current video block, intra prediction unit 206 may generate predictive data for the current video block based on decoded samples of other video blocks in the same picture. The predictive data for the current video block may include a predicted video block and various syntax elements.

[0086] Residual generation unit 207 may generate residual data for the current video block by subtracting (e.g., as indicated by a minus sign) the predicted video block of the current video block from the current video block. The residual data for the current video block may include residual video blocks that correspond to different sample components of the samples in the current video block.

[0087] In other examples, for example, in skip mode, residual data for the current video block may not be present and residual generation unit 207 may not perform the subtraction operation.

[0088] Transform processing unit 208 may generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to a residual video block associated with the current video block.

[0089] After transform processing unit 208 generates a transform coefficient video block associated with the current video block, quantization unit 209 may quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values ​​associated with the current video block.

[0090] Inverse quantization unit 210 and inverse transform unit 211 may apply inverse quantization and inverse transform, respectively, to the transform coefficient video block to reconstruct a residual video block from the transform coefficient video block. Reconstruction unit 212 may add the reconstructed residual video block to corresponding samples from one or more predicted video blocks generated by prediction unit 202 to generate a reconstructed video block related to the current block for storage in buffer 213.

[0091] After reconstruction unit 212 reconstructs the video blocks, a loop filtering operation may be performed to reduce video blocking artifacts in the video blocks.

[0092] The entropy encoding unit 214 may receive data from other functional components of the video encoder 200. When the entropy encoding unit 214 receives the data, the entropy encoding unit 214 may perform one or more entropy encoding operations to generate entropy encoded data and output a bitstream including the entropy encoded data.

[0093] Some embodiments of the disclosed techniques include making a judgment or decision to enable a video processing tool or mode. When a video processing tool or mode is enabled, the encoder will use or implement the tool or mode in processing blocks of video, but may not necessarily modify the resulting bitstream based on the use of the tool or mode. That is, the conversion of blocks of video to a bitstream (or bitstream representation) of video will be performed using the video processing tool or mode when it is enabled based on the judgment or decision. In another example, when a video processing tool or mode is enabled, the decoder will process the bitstream with the knowledge that the bitstream has been modified based on the video processing tool or mode. That is, the conversion of the video bitstream to blocks of video will be performed using the video processing tool or mode enabled based on the judgment or decision.

[0094] FIG. 10 is a block diagram illustrating an example of a video decoder 300, which may be the video decoder 124 of the system 100 illustrated in FIG.

[0095] The video decoder 300 may be configured to perform any or all of the techniques of this disclosure. In the example of FIG. 10, the video decoder 300 includes multiple functional components. The techniques described in this disclosure may be shared among various components of the video decoder 300. In some examples, a processor may be configured to perform any or all of the techniques described in this disclosure.

[0096] 10, the video decoder 300 includes an entropy decoding unit 301, a motion compensation unit 302, an intra prediction unit 303, an inverse quantization unit 304, an inverse transform unit 305, a reconstruction unit 306, and a buffer 307. The video decoder 300 may, in some examples, perform a decoding pass that is generally inverse to the encoding pass described with respect to the video encoder 200 (FIG. 9).

[0097] The entropy decoding unit 301 may retrieve an encoded bitstream. The encoded bitstream may include entropy coded video data (e.g., coded blocks of video data). The entropy decoding unit 301 may decode the entropy coded video data, and from the entropy decoded video data, the motion compensation unit 302 may determine motion information including motion vectors, motion vector precision, reference picture list index, and other motion information. The motion compensation unit 302 may determine such information, for example, by implementing AMVP and merge mode.

[0098] The motion compensation unit 302 may optionally perform interpolation based on an interpolation filter to generate the motion compensated block. An identifier for the interpolation filter used with sub-pixel precision may be included in the syntax element.

[0099] Motion compensation unit 302 may use the interpolation filters used by video encoder 200 during encoding of the video block to calculate interpolated values ​​for sub-integer pixels of the reference block. Motion compensation unit 302 may determine the interpolation filters used by video encoder 200 according to received syntax information and use the interpolation filters to generate the predictive block.

[0100] The motion compensation unit 302 may use some of the syntax information to determine the size of the blocks used to code the frames and / or slices of the coded video sequence, partition information describing how each macroblock of a picture of the coded video sequence is partitioned, a mode indicating how each partition is coded, one or more reference frames (and reference frame lists) for each inter-coded block, and other information for decoding the coded video sequence.

[0101] The intra prediction unit 303 may use, for example, an intra prediction mode received in the bitstream to form a prediction block from spatially neighboring blocks. The inverse quantization unit 304 inverse quantizes, i.e., dequantizes, the quantized video block coefficients provided in the bitstream and decoded by the entropy decoding unit 301. The inverse transform unit 305 applies an inverse transform.

[0102] Reconstruction unit 306 may add a corresponding predictive block generated by motion compensation unit 302 or intra prediction unit 303 to the residual block to form a decoded block. If desired, a deblocking filter may also be applied to filter the decoded block to remove blockiness artifacts. The decoded video block is then stored in buffer 307, which provides reference blocks for subsequent motion compensation / intra prediction, as well as generating the decoded video for presentation on a display device.

[0103] A list of solutions preferred by some embodiments is given below.

[0104] The following solutions represent exemplary implementations of the techniques described in the previous section (eg, item 1).

[0105] Solution 1. 1. A video processing method (e.g., method 900 depicted in FIG. 7), comprising: performing a conversion between a video including one or more video pictures, each video picture including one or more tiles, and a coded representation of the video; the coded representation follows formatting rules; the format rules specify first information signaled in the coded representation and second information derived from the coded representation; At least the first information or the second information relates to a row index or a column index of the one or more tiles. method.

[0106] Solution 2. the format rules define that a tile sequence index for each coding tree unit sequence of each video picture is derived. The method described in Solution 1.

[0107] Solution 3. the format rules define that a tile row index for each coding tree unit row of each video picture is derived. The method described in Solution 1.

[0108] The following solutions illustrate example embodiments of the techniques described in the previous section (e.g., item 2). In these solutions, the video region may be a video picture, and the video unit may be a video block or a coding tree unit or a video slice.

[0109] Solution 4. 1. A method of video processing, comprising: performing a conversion between video units of a video domain of a video and a coded representation of said video; the coded representation follows formatting rules; The format rule defines whether first control information is included in the video area and whether second control information is included at the level of the video unit; the first control information and / or the second control information includes information regarding a luma reshaping process (RP) or a chroma residual scaling (CRS) or a luma mapping and chroma scaling (LMCS) for the transform; method.

[0110] Solution 5. the first control information includes an indicator of whether the second control information is included in the coded representation. The method described in Solution 4.

[0111] Solution 6. a particular value of the first control information indicating that LMCS is disabled for all video units in the video area; The method described in solutions 4-5.

[0112] Solution 7. The second control information controls enabling of LMCS in the video unit. The method according to any one of Solutions 4 to 6.

[0113] Solution 8. the first control information includes a plurality of indicators; The method described in Solution 4.

[0114] Solution 9. said converting including encoding said video into said coded representation; The method according to any one of solutions 1 to 8.

[0115] Solution 10. the converting includes decoding the coded representation to generate pixel values ​​for the video. The method according to any one of solutions 1 to 8.

[0116] Solution 11. A video decoding device comprising a processor configured to implement the methods according to one or more of solutions 1 to 10.

[0117] Solution 12. A video encoding device comprising a processor configured to implement the methods according to one or more of solutions 1 to 10.

[0118] Solution 13. storing computer code which, when executed by a processor, causes the processor to implement a method according to any one of solutions 1 to 10; Computer program products.

[0119] Solution 14. A method, apparatus, or system as described herein.

[0120] In the solutions described herein, an encoder may comply with the formatting rules by generating a coded representation according to the formatting rules, and a decoder may use the formatting rules to parse syntax elements in the coded representation and generate decoded video, knowing the presence or absence of syntax elements according to the formatting rules.

[0121] 11 is a flow chart of an example method of video processing 1100. Operation 1102 includes performing a conversion between a video including one or more video pictures and a video bitstream, each video picture having one or more tiles including one or more tile columns, the bitstream following a format rule, the format rule defining that a tile column index is derived for each coding tree unit (CTU) column of tiles of the video picture.

[0122] In some embodiments of the method 1100, the tile column index for the ctbAddrXth tile column, denoted as ctbToTileColIdx[ctbAddrX], is as follows: tileX=0 for(ctbAddrX=0;ctbAddrX<=PicWidthInCtbsY;ctbAddrX++){ if(ctbAddrX==tileColBd[tileX+1]) tileX++ ctbToTileColIdx[ctbAddrX]=tileX } where PicWidthInCtbsY represents the width of the video picture in units of coded treeblocks (CTBs), and tileColBd[i] represents the position of the ith tile column boundary in units of CTBs.

[0123] In some embodiments of method 1100, each video picture also has one or more sub-pictures, each sub-picture having one or more slices that collectively form a rectangular subset of the video picture, and the formatting rules further specify that the width of a sub-picture in units of the tile column it contains is derived based on the tile column index of the leftmost and / or rightmost CTU contained in that sub-picture.

[0124] In some embodiments of the method 1100, the width of the ith subpicture in units of tile columns, denoted as SubpicWidthInTiles[i], is as follows: for(i=0;i<=sps_num_subpics_minus1;i++){ leftX=sps_subpic_ctu_top_left_x[i] rightX=leftX+sps_subpic_width_minus1[i] SubpicWidthInTiles[i]=ctbToTileColIdx[rightX]+1-ctbToTileColIdx[leftX] } where sps_num_subpics_minus1 represents the number of subpictures in the video picture, sps_subpic_ctu_top_left_x[i] represents the horizontal position of the top-left CTU of the i-th subpicture, sps_subpic_width_minus1[i] plus 1 specifies the width of the i-th subpicture, and ctbToTileColIdx[rightX] and ctbToTileColIdx[leftX] represent the tile column indexes of the leftmost and rightmost CTUs contained in the subpicture, respectively.

[0125] In some embodiments of method 1100, in response to a tile being partitioned into multiple rectangular slices and only a subset of the rectangular slices of the tile being included in the subpicture, the tile is counted as one tile in the width value of the subpicture.

[0126] 12 is a flow chart of an example method of video processing 1200. Operation 1202 includes performing a conversion between a video including one or more video pictures and a video bitstream, each video picture having one or more tiles including one or more tile rows, the bitstream following a format rule, the format rule defining that a tile row index is derived for each coding tree unit (CTU) row of a tile of the video picture.

[0127] In some embodiments of method 1200, the tile row index for the ctbAddrY-th tile row, denoted as ctbToTileRowIdx[ctbAddrY], is one of the following: tileY=0 for(ctbAddrY=0;ctbAddrY<=PicHeightInCtbsY;ctbAddrY++){ if(ctbAddrY==tileRowBd[tileY+1]) tileY++ ctbToTileRowIdx[ctbAddrY]=tileY } where PicHeightInCtbsY represents the height of the video picture in units of coded treeblocks (CTBs), and tileRowBd[i] represents the position of the ith tile row boundary in units of CTBs.

[0128] In some embodiments of method 1200, each video picture also has one or more sub-pictures, each sub-picture having one or more slices that collectively form a rectangular subset of the video picture, and the formatting rules further provide that the height of the sub-picture in units of tile rows is derived based on the tile row index of the top CTU and / or bottom CTU contained in the sub-picture.

[0129] In some embodiments of the method 1200, the height of the ith subpicture in units of tile rows, denoted as SubpicHeightInTiles[i], is: for(i=0;i<=sps_num_subpics_minus1;i++){ topY=sps_subpic_ctu_top_left_y[i] bottomY=topY+sps_subpic_height_minus1[i] SubpicHeightInTiles[i]=ctbToTileRowIdx[botY]+1-ctbToTileRowIdx[topY] } where sps_num_subpics_minus1 represents the number of subpictures in the video picture, sps_subpic_ctu_top_left_y[i] represents the vertical position of the top left CTU of the i-th subpicture, sps_subpic_height_minus1[i] plus 1 specifies the height of the i-th subpicture, and ctbToTileRowIdx[botY] and ctbToTileRowIdx[topY] represent the tile row indexes of the bottom CTU and top CTU contained in the subpicture, respectively.

[0130] In some embodiments of method 1200, a tile is partitioned into multiple rectangular slices, and in response to only a subset of the rectangular slices of the tile being included in the subpicture, the tile is counted as one tile in the height value of the subpicture.

[0131] 13 is a flow chart of an example method 1300 of video processing. Operation 1302 includes performing a conversion between a video including at least one video picture and a video bitstream according to rules, the at least one video picture having one or more slices and one or more sub-pictures, the rules providing that an order of slice indexes of one or more slices in the at least one video picture is indicated in response to a syntax element associated with the at least one video picture indicating whether a single slice is included in each of the sub-pictures of the at least one video picture.

[0132] In some embodiments of the method 1300, the rules further define that the slice index is indicated in response to each slice in the at least one video picture being a rectangular slice. In some embodiments of the method 1300, the rules define that if the syntax element indicates that each of the one or more subpictures includes a single rectangular slice, the order corresponds to increasing values ​​of subpicture indexes of one or more subpictures in the video picture, the subpicture indexes of the one or more subpictures being indicated in a sequence parameter set (SPS) referenced by the at least one video picture. In some embodiments of the method 1300, the rules define that if the syntax element indicates that each subpicture includes one or more rectangular slices, the order corresponds to an order in which the one or more slices are included in a picture parameter set (PPS) referenced by the at least one video picture. In some embodiments of the method 1300, the syntax element is included in a picture parameter set (PPS) referenced by the at least one video picture.

[0133] 14 is a flow chart of an example method 1400 of video processing. Operation 1402 includes performing a conversion between a video unit of a video domain of a video and a bitstream of the video, where the bitstream follows a format rule, where the format rule specifies that first control information at a first level of the video domain in the bitstream controls whether second control information is included at a second level of the video unit in the bitstream, where the second level is smaller than the first level, where the first control information and the second control information include information regarding whether or how a luma mapping and chroma scaling (LMCS) tool is applied to the video unit, where the LMCS tool includes using a luma reshaping process (RP) or a chroma residual scaling (CRS) for the conversion.

[0134] In some embodiments of the method 1400, the first control information optionally includes a first indicator indicating whether the LMCS tools are enabled for one or more slices at the first level of the video domain to specify whether the LMCS tools are enabled at the second level of the video unit, the first indicator being a non-binary value. In some embodiments of the method 1400, the first level of the video domain includes a picture header. In some embodiments of the method 1400, the first level of the video domain includes a picture header, the first control information includes a first indicator, the LMCS tools are enabled for all slices of the picture header when the first indicator is equal to a first value, the LMCS tools are enabled for less than all slices of the picture header when the first indicator is equal to a second value, and the LMCS tools are disabled for all slices of the picture header when the first indicator is equal to a third value, the first value, the second value, and the third value being different from each other. In some embodiments of the method 1400, the value of the first indicator is inferred to be a default value if the first control information excludes the first indicator.

[0135] In some embodiments of the method 1400, the first level of the video region includes a picture header, the first control information includes a first indicator, and the LMCS tools are disabled for all slices of the picture header when the first indicator is equal to a first value, the LMCS tools are disabled for less than all slices of the picture header when the first indicator is equal to a second value, and the LMCS tools are enabled for all slices of the picture header when the first indicator is equal to a third value, and the first value, the second value, and the third value are different from each other. In some embodiments of the method 1400, whether the first indicator is selectively included in the first control information is based on a value of a syntax element in the bitstream indicating whether the LMCS tools are enabled at a sequence level. In some embodiments of the method 1400, the first indicator is coded with u(v) or u(2) or ue(v). In some embodiments of the method 1400, the first indicator is coded with a truncated unary code.

[0136] In some embodiments of method 1400, adaptive parameter set (APS) information for the LMCS tools used by one or more slices and / or chroma scaling syntax elements is included in the bitstream based on a value of a first indicator indicating whether the LMCS tools are enabled for one or more slices at a first level in the video domain. In some embodiments of method 1400, the second control information selectively includes a second indicator indicating whether the LMCS tools are enabled or disabled for one or more slices at a second level of the video unit, the second indicator being included in the bitstream based on a value of the first indicator included in the first control information, the first indicator indicating whether the LMCS tools are enabled or disabled for one or more slices at the second level of the video unit. In some embodiments of method 1400, the second control information comprises a slice header. In some embodiments of method 1400, the second indicator is included in the second control information in response to the first indicator being equal to the first value. In some embodiments of method 1400, the second indicator is included in the second control information in response to performing a condition check of the first indicator >>1, or the first indicator / 2, or the first indicator &0x01, where >> indicates a right shift operation and & indicates a bitwise logical AND operation.

[0137] In some embodiments of method 1400, the second indicator is inferred to indicate that the LMCS tool is enabled for one or more slices at the second level of the video unit in response to the first indicator being equal to the first value, or the second indicator is inferred to indicate that the LMCS tool is disabled for one or more slices at the second level of the video unit in response to the first indicator being equal to a third value, the first value, the second value of the first indicator, and the third value being different from each other. In some embodiments of method 1400, the first control information comprises a plurality of indicators indicating whether the LMCS tool is enabled for one or more slices at the first level of the video region to specify whether the LMCS tool is enabled for the one or more slices at the second level of the video unit, the plurality of indicators having non-binary values. In some embodiments of method 1400, the plurality of indicators comprises at least two indicators included in the picture header. In some embodiments of method 1400, the at least two indicators include a first indicator specifying whether the LMCS tools are enabled for at least one slice associated with the picture header, and the at least two indicators optionally include a second indicator specifying whether the LMCS tools are enabled for all slices associated with the picture header. In some embodiments of method 1400, the second indicator is selectively present in the plurality of indicators based on a value of the first indicator.

[0138] In some embodiments of method 1400, the value of the first indicator indicates that the LMCS tools are enabled for at least one slice. In some embodiments of method 1400, the LMCS tools are inferred to be enabled for all slices associated with the picture header in response to the second indicator being absent from the bitstream. In some embodiments of method 1400, the at least two indicators include a third indicator selectively included in the slice header based on a second value of the second indicator. In some embodiments of method 1400, the second value of the second indicator indicates that the LMCS tools are disabled for all slices. In some embodiments of method 1400, the value of the third indicator is inferred based on a first value of the first indicator and / or a second value of the second indicator in response to the third indicator being absent from the bitstream. In some embodiments of the method 1400, the at least two indicators include a first indicator specifying whether the LMCS tools are disabled for at least one slice associated with the picture header, and the at least two indicators optionally include a second indicator specifying whether the LMCS tools are disabled for all slices associated with the picture header. In some embodiments of the method 1400, the second indicator is present in the plurality of indicators based on a value of the first indicator. In some embodiments of the method 1400, a value of the first indicator specifies that the LMCS tools are disabled for at least one slice. In some embodiments of the method 1400, the LMCS tools are inferred to be disabled for all slices associated with the picture header in response to the second indicator being absent from the bitstream. In some embodiments of the method 1400, the at least two indicators optionally include a third indicator in the slice header based on a second value of the second indicator.

[0139] In some embodiments of method 1400, the second value of the second indicator specifies that the LMCS tools are enabled for all slices. In some embodiments of method 1400, the value of the third indicator is inferred based on the first value of the first indicator and / or the second value of the second indicator in response to the third indicator being absent from the bitstream. In some embodiments of method 1400, the plurality of indicators selectively includes the first indicator based on a value of a syntax element indicating whether the LMCS tools are enabled at a sequence level. In some embodiments of method 1400, the plurality of indicators selectively includes a third indicator indicating whether the LMCS tools are enabled or disabled at a second level of the video unit, the third indicator being selectively present based on the first value of the first indicator and / or the second value of the second indicator. In some embodiments of method 1400, the third indicator is selectively present based on a second indicator indicating that the LMCS tools are not enabled for all slices or that the LMCS tools are not disabled for all slices. In some embodiments of the method 1400, the first indicator, the second indicator, and / or the third indicator control utilization of the CRS or the luma RP.

[0140] 15 is a flow chart of an example method 1500 of video processing. Operation 1502 includes performing conversion between video and a video bitstream according to rules, the rules specifying that luma mapping and chroma scaling (LMCS) tools are enabled if a first syntax element in a referenced sequence parameter set indicates that LMCS tools are enabled, the rules specifying that LMCS tools are not used if the first syntax element indicates that LMCS tools are disabled, and the rules specifying that LMCS tools are enabled for all slices associated with a picture header of a video picture if a second syntax element in the bitstream indicates that LMCS tools are enabled at a picture header level of the video. the rules specify that LMCS tools are used for a current slice associated with the video picture slice header if a third syntax element optionally included in the bitstream indicates that LMCS tools are enabled at the video slice header level, and the rules specify that LMCS tools are not used for the current slice associated with the video picture slice header if a second syntax element indicates that LMCS tools are disabled at the video slice header level, and the rules specify that LMCS tools are not used for the current slice if the third syntax element indicates that LMCS tools are disabled at the video slice header level.

[0141] In some embodiments of method 1500, the rules dictate that if the LMCS tools are not used for all slices of the video picture, then the third syntax element is not included in the slice header of the bitstream. In some embodiments of method 1500, whether the LMCS tools are enabled or disabled is based on the second syntax element. In some embodiments of method 1500, the LMCS tools are enabled if the LMCS tools are used for all slices of the video picture, and the LMCS tools are disabled if the LMCS tools are not used for all slices of the video picture.

[0142] 16 is a flow chart of an example method 1600 of video processing. Operation 1602 includes performing a conversion between a video including one or more video pictures and a video bitstream according to rules, the rules specifying whether an adaptive motion vector differential decomposition (AMVR) is used in affine inter mode motion vector coding based on a syntax element selectively included in a referenced sequence parameter set (SPS) indicating whether the AMVR is enabled, the rules specifying that the AMVR is not used in affine inter mode motion vector coding if the syntax element indicates that the AMVR is disabled, and the rules specifying that the AMVR is inferred not to be used in affine inter mode motion vector coding if the syntax element is not included in the SPS.

[0143] 17 is a flow chart of an example method 1700 of video processing. Operation 1702 includes performing a conversion between a video including a video picture and a video bitstream according to a rule, where the video picture includes sub-pictures, tiles and slices, and the rule provides that the conversion is performed by not counting the height of the sub-picture with the number of tiles of the video picture, where the sub-picture includes slices that are partitioned from tiles.

[0144] In some embodiments of the method 1700, the height of the subpicture is counted based on the number of coding tree units (CTUs). In some embodiments of the method 1700, the height of the subpicture is less than one tile row.

[0145] 18 is a flowchart of an example method 1800 of video processing. Operation 1802 includes performing a conversion between a video including a video picture and a video bitstream, where the bitstream indicates a sub-picture height of the video picture counted based on a number of coding tree units (CTUs) of the video picture.

[0146] In some embodiments of the method 1800, the height of the subpicture is not based on the number of tiles in the video picture. In some embodiments of the method 1800, the height of the subpicture is less than one row of tiles.

[0147] 19 is a flow chart of an example method 1900 of video processing. Operation 1902 includes making a decision as to whether a height of a sub-picture of a video picture of a video is less than a height of a tile row of the video picture according to a rule. Operation 1904 includes performing a conversion between the video and a video bitstream using the decision.

[0148] In some embodiments of method 1900, the rules dictate that a subpicture's height is less than one tile row if the subpicture only includes coding tree units (CTUs) from one tile row and either a first set of CTUs located at the top of the subpicture are not the same as a second set of CTUs located at the top of a tile row or a third set of CTUs located at the bottom of the subpicture are not the same as a fourth set of CTUs located at the bottom of a tile row. In some embodiments of method 1900, if each subpicture of a video picture only includes one slice and the subpicture's height is less than one tile row, then for each slice having picture-level slice index i of the video picture, the value of CtbAddrInSlice[i][j] is derived from the picture raster scan CTU address of the jth CTU in the CTU raster scan of the subpicture, where j is in the range greater than or equal to 0 and less than or equal to the number of CTUs in the slice minus one.

[0149] In some embodiments of method 1900, the rule specifies that the height of the subpicture is less than one tile row if a distance between a first set of CTUs located at the top of the subpicture and a second set of CTUs located at the bottom of the subpicture is less than a second height of tiles of the video picture, the second height of tiles being based on the number of CTUs of the subpicture. In some embodiments of method 1900, when each subpicture of a video picture includes only one slice and the height of the subpicture is greater than or equal to one tile row, for each slice having picture-level slice index i of the video picture, the value of CtbAddrInSlice[i][j] is derived from the picture raster scan CTU address of the jth CTU in the order of CTUs in the subpicture, where j is in the range greater than or equal to 0 and less than or equal to the number of CTUs in the slice minus 1.

[0150] In some embodiments of method 1900, the ordering of the CTUs in the subpicture is such that a first CTU in a first tile having a first tile index is located before a second CTU in a second tile having a second tile index, where the value of the first tile index is less than the value of the second tile index. In some embodiments of method 1900, the ordering of the CTUs in a subpicture is such that the CTUs in a tile in the subpicture are ordered in a raster scan of the CTUs in that tile.

[0151] In some embodiments of methods 1100-1900, performing the conversion includes encoding the video into a bitstream. In some embodiments of methods 1100-1900, performing the conversion includes encoding the video into a bitstream, the method further including storing the bitstream on a non-transitory computer-readable storage medium. In some embodiments of methods 1100-1900, performing the conversion includes decoding the video from the bitstream.

[0152] In some embodiments, a video decoding apparatus has a processor configured to implement the operations described for any one or more of the methods 1100-1900. In some embodiments, a video encoding apparatus has a processor configured to implement the operations described for any one or more of the methods 1100-1900. In some embodiments, a computer program product stores instructions that, when executed by a processor, cause the processor to implement the operations described for any one or more of the methods 1100-1900. In some embodiments, a non-transitory computer readable storage medium stores a bitstream generated according to the operations described for any one or more of the methods 1100-1900. In some embodiments, a non-transitory computer readable storage medium stores instructions that cause a processor to implement the operations described for any one or more of the methods 1100-1900. In some embodiments, a method of bitstream generation includes generating a bitstream of video according to the operations described for any one or more of the methods 1100-1900 and storing the bitstream on a computer readable program medium. In some embodiments, methods, apparatus, bitstreams generated according to the disclosed methods, or systems are described herein.

[0153] In this specification, the term "video processing" may refer to video encoding, video decoding, video compression, or video decompression. For example, a video compression algorithm may be applied during conversion from a pixel representation of a video to a corresponding bitstream representation or vice versa. The bitstream representation of a current video block may correspond to bits that are either co-located or scattered in different locations in the bitstream, e.g., as defined by a syntax. For example, a macroblock may be encoded with respect to a transformed and coded error residual value, and with bits in a header and other fields in the bitstream. Furthermore, during conversion, a decoder may parse the bitstream with knowledge of the presence or absence of some fields based on a decision, as described in the above solution. Similarly, an encoder may determine whether a particular syntax field should be included or not, and accordingly generate a coded representation by either including or excluding the syntax field from the coded representation.

[0154] The disclosed and other solutions, examples, embodiments, modules, and functional operations described herein may be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed herein and their structural equivalents, or in one or more combinations thereof. The disclosed and other embodiments may be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer-readable medium that are either executed by or control the operation of a data processing apparatus. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter that affects a machine-readable propagated signal, or one or more combinations thereof. The term "data processing apparatus" encompasses all apparatus, devices, and machines for processing data, including, by way of example, a programmable processor, a computer, or multiple processors or computers. An apparatus may include, in addition to hardware, code that creates an execution environment for the computer program in question, such as code that constitutes a processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof. A propagated signal is an artificially generated signal, for example a machine-generated electrical, optical, or electromagnetic signal, that has been generated to encode information for transmission to an appropriate receiver device.

[0155] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a single file dedicated to the program in question, or in multiple coordinated files (e.g., a file storing one or more modules, subprograms, or portions of code), in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document). A computer program can be deployed to be executed on one computer or on multiple computers located at one site or distributed across multiple sites and interconnected by a communication network.

[0156] The processes and logic flows described herein may be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows may also be performed by, and an apparatus may be implemented as, special purpose logic circuitry, such as a field programmable gate array (FPGA) or application specific integrated circuit (ASIC).

[0157] Processors suitable for executing computer programs include, by way of example, both general purpose and special purpose microprocessors, as well as any one or more processors of any kind of digital computer. Generally, a processor will read instructions and data from a read-only memory or a random access memory, or both. The essential elements of a computer are a processor for executing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include one or more mass storage devices, such as magnetic, optical magnetic disks, or optical disks, for storing data, or be operatively coupled to receive data from or transfer data to, or both, such one or more mass storage devices. However, a computer need not have such devices. Computer-readable media suitable for storing computer program instructions and data include, by way of example, all forms of non-volatile memory, media, and memory devices, including semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable disks; optical magnetic disks; and CD ROM and DVD-ROM disks. The processor and memory may be augmented by, or incorporated in, dedicated logic circuitry.

[0158] Although the specification contains numerous details, they should not be construed as limitations on the scope of any subject matter or what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of a particular technology. Certain features described herein in the context of separate embodiments may also be implemented in combination with a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, although features may be described above as operating in a particular combination, and even initially claimed as such, one or more features from a claimed combination may in some cases be deleted from the combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination.

[0159] Similarly, although operations may be depicted in the figures in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown, or in a sequential order, or that all of the depicted operations be performed, to achieve desired results. Further, the separation of various system components in the embodiments described herein should not be understood as requiring such separation in all embodiments.

[0160] Only a few implementations and examples have been described; other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.

Claims

1. 1. A video processing method comprising the steps of: making a determination as to whether a height of a sub-picture of a video picture of a video is less than a height of a tile row of said video picture according to a first rule; using said determination to convert between said video and a bitstream of said video; having the video picture having one or more tiles forming one or more tile rows and one or more tile columns; the bitstream conforms to a first format rule; The first format rule specifies that a tile column index is derived for each coding tree block (CTB) column of a tile of the video picture. method.

2. The first rule is: the subpicture contains only coding tree units (CTUs) from one tile row, and If either a first set of CTUs located above the subpicture is not the same as a second set of CTUs located above the one tile row, or a third set of CTUs located below the subpicture is not the same as a fourth set of CTUs located below the one tile row, the height of the subpicture is less than one row of tiles; The method of claim 1.

3. a) if each sub-picture of the video picture includes only one slice and the height of the sub-picture is less than one tile row, then for each slice with picture level slice index i of the video picture, a value of CtbAddrInSlice[i][j] specifying the picture raster scan CTB address of the jth CTB in the slice is derived from the picture raster scan CTB address of the jth CTB in the CTB raster scan of the sub-picture, where i is in the range of 0 to 1 minus the number of slices in the video picture, and j is in the range of 0 to 1 minus the number of CTUs in the slice; or b) the first rule defines that a height of the subpicture is less than one tile row if a distance between a first set of coding tree units (CTUs) located above the subpicture and a second set of CTUs located below the subpicture is less than a second height of a tile of the video picture, the second height of the tile being based on a number of CTUs of the tile; The method of claim 1.

4. When each sub-picture of the video picture includes only one slice and the height of the sub-picture is greater than or equal to one tile row, for each slice having a picture level slice index i of the video picture, a value of CtbAddrInSlice[i][j] specifying a picture raster scan CTB address of the jth CTB in the slice is derived from a picture raster scan CTB address of the jth CTB in the CTB order in the sub-picture, where i is in the range of 0 to 1 minus the number of slices in the video picture, and j is in the range of 0 to 1 minus the number of CTUs in the slice; an order of the CTBs in the subpicture is such that a first CTB in a first tile having a first tile index precedes a second CTB in a second tile having a second tile index, the value of the first tile index being less than the value of the second tile index; The order of the CTBs in a tile in the subpicture is ordered by a raster scan of the CTBs in the tile. The method of claim 1.

5. The tile column index of the ctbAddrX-th tile column, denoted as ctbToTileColIdx[ctbAddrX], is tileX=0 for(ctbAddrX=0;ctbAddrX<=PicWidthInCtbsY;ctbAddrX++){ if(ctbAddrX==tileColBd[tileX+1]) tileX++ ctbToTileColIdx[ctbAddrX]=tileX } It is derived as follows: PicWidthInCtbsY represents the width of the video picture in units of CTB, tileColBd [i] represents the position of the i-th tile column boundary in units of CTB, The method of claim 1.

6. The video picture also comprises one or more sub-pictures; each sub-picture having one or more slices that collectively form a rectangular subset of the video picture; The first format rule further defines that a width of a sub-picture in units of tile columns is derived based on a tile column index of a left-most CTB and / or a right-most CTB included in the sub-picture; The width of the ith subpicture in tile-column units, denoted as SubpicWidthInTiles[i], is for(i=0;i<=sps_num_subpics_minus1;i++){ leftX=sps_subpic_ctu_top_left_x[i] rightX=leftX+sps_subpic_width_minus1[i] SubpicWidthInTiles[i]=ctbToTileColIdx[rightX]+1-ctbToTileColIdx[leftX] } It is derived as follows: sps_num_subpics_minus1 plus 1 represents the number of subpictures in the video picture, sps_subpic_ctu_top_left_x[i] represents the horizontal position of the top left CTB of the i-th subpicture, sps_subpic_width_minus1[i] plus 1 specifies the width of the i-th subpicture, ctbToTileColIdx[rightX] and ctbToTileColIdx[leftX] respectively represent the tile column indexes of the leftmost and rightmost CTBs included in the subpicture; the tile is partitioned into a plurality of rectangular slices, and in response to only a subset of the rectangular slices of the tile being included in the subpicture, the tile is counted as one tile in the width value of the subpicture. The method of claim 1.

7. the first formatting rule further defines that a tile row index is derived for each CTB row of the tiles of the video picture; The tile row index of the ctbAddrY-th tile row, denoted as ctbToTileRowIdx[ctbAddrY], is tileY=0 for(ctbAddrY=0;ctbAddrY<=PicHeightInCtbsY;ctbAddrY++){ if(ctbAddrY==tileRowBd[tileY+1]) tileY++ ctbToTileRowIdx[ctbAddrY]=tileY } It is derived as follows: PicHeightInCtbsY represents the height of the video picture in units of CTB, tileRowBd[i] represents the position of the i-th tile row boundary in units of the CTB; The video picture also comprises one or more sub-pictures; each sub-picture having one or more slices that collectively form a rectangular subset of the video picture; The first format rule further defines that a height of a sub-picture in units of tile rows is derived based on a tile row index of a top CTB and / or a bottom CTB included in the sub-picture; The height of the ith subpicture in units of tile rows, denoted as SubpicHeightInTiles[i], is for(i=0;i<=sps_num_subpics_minus1;i++){ topY=sps_subpic_ctu_top_left_y[i] bottomY=topY+sps_subpic_height_minus1[i] SubpicHeightInTiles[i]=ctbToTileRowIdx[botY]+1-ctbToTileRowIdx[topY] } It is derived as follows: sps_num_subpics_minus1 plus 1 represents the number of subpictures in the video picture, sps_subpic_ctu_top_left_y [i] represents the vertical position of the top left CTB of the i-th subpicture, sps_subpic_height_minus1[i] plus 1 specifies the height of the i-th subpicture, ctbToTileRowIdx[botY] and ctbToTileRowIdx[topY] respectively represent the tile row indexes of the bottom CTB and top CTB included in the subpicture; the tile is partitioned into a plurality of rectangular slices, and in response to only a subset of the rectangular slices of the tile being included in the subpicture, the tile is counted as one tile in the height value of the subpicture. The method of claim 1.

8. the video comprises at least one video picture; The conversion is further performed according to a second rule: the at least one video picture having one or more slices and one or more sub-pictures; the second rule provides that an order of slice indexes of the one or more slices in the at least one video picture is indicated in response to a syntax element associated with the at least one video picture indicating whether a single slice is included per sub-picture of the at least one video picture. The method of claim 1.

9. a) the second rule further defines that the slice index is indicated in response to each of the one or more slices in the at least one video picture being a rectangular slice; or b) the second rule further defines that, if the syntax element indicates that each of the one or more sub-pictures comprises a single rectangular slice, the order corresponds to increasing values ​​of sub-picture indexes of the one or more sub-pictures within the video picture, the sub-picture indexes of the one or more sub-pictures being derived based on information in a Sequence Parameter Set (SPS) referenced by the at least one video picture; or c) the second rule further specifies that, if the syntax element indicates that each of the one or more sub-pictures may contain one or more rectangular slices, the order corresponds to an order in which the one or more slices are included in a Picture Parameter Set (PPS) referenced by the at least one video picture; or d) the syntax element is included in a Picture Parameter Set (PPS) referenced by the at least one video picture; The method according to claim 8.

10. The bitstream conforms to a second format rule, the second format rule specifies that a tile row index is derived for each CTB row of a tile of the video picture. The method of claim 1.

11. The tile row index of the ctbAddrY-th tile row, denoted as ctbToTileRowIdx[ctbAddrY], is tileY = 0 for(ctbAddrY=0;ctbAddrY<=PicHeightInCtbsY;ctbAddrY++){ if(ctbAddrY==tileRowBd[tileY+1]) tileY++ ctbToTileRowIdx[ctbAddrY]=tileY } It is derived as follows: PicHeightInCtbsY represents the height of the video picture in units of CTB, tileRowBd[i] represents the position of the i-th tile row boundary in units of the CTB; The method of claim 10.

12. The video picture also comprises one or more sub-pictures; each of the one or more sub-pictures having one or more slices that collectively form a rectangular subset of the video picture; The second format rule further specifies that a height of a sub-picture in units of tile rows is derived based on tile row indexes of a top CTB and / or a bottom CTB included in the sub-picture. The method of claim 10.

13. The height of the ith subpicture in units of tile rows, denoted as SubpicHeightInTiles[i], is for(i=0;i<=sps_num_subpics_minus1;i++){ topY=sps_subpic_ctu_top_left_y[i] bottomY=topY+sps_subpic_height_minus1[i] SubpicHeightInTiles[i]=ctbToTileRowIdx[botY]+1-ctbToTileRowIdx[topY] } It is derived as follows: sps_num_subpics_minus1 plus 1 represents the number of subpictures in the video picture, sps_subpic_ctu_top_left_y [i] represents the vertical position of the top left CTB of the i-th subpicture, sps_subpic_height_minus1[i] plus 1 specifies the height of the i-th subpicture, ctbToTileRowIdx[botY] and ctbToTileRowIdx[topY] represent the tile row indexes of the bottom CTB and top CTB included in the subpicture, respectively; The method of claim 12.

14. the tile is partitioned into a plurality of rectangular slices, and in response to only a subset of the rectangular slices of the tile being included in the subpicture, the tile is counted as one tile in the height value of the subpicture. The method of claim 12.

15. said step of performing said conversion comprises encoding said video into said bitstream.

15. The method according to any one of claims 1 to 14.

16. the step of performing the conversion comprises decoding the video from the bitstream.

15. The method according to any one of claims 1 to 14.

17. 1. An apparatus for processing video data, comprising: a processor and a non-transitory memory having instructions; The instructions, when executed by the processor, cause the processor to: making a determination as to whether a height of a sub-picture of a video picture of a video is less than a height of a tile row of said video picture according to a first rule; using said determination to convert between said video and a bitstream of said video; Run the command, the video picture having one or more tiles forming one or more tile rows and one or more tile columns; the bitstream conforms to a first format rule; The first format rule specifies that a tile column index is derived for each coding tree block (CTB) column of a tile of the video picture. Device.

18. The processor: making a determination as to whether a height of a sub-picture of a video picture of a video is less than a height of a tile row of said video picture according to a first rule; using said determination to convert between said video and a bitstream of said video; Run the command, the video picture having one or more tiles forming one or more tile rows and one or more tile columns; the bitstream conforms to a first format rule; The first format rule specifies that a tile column index is derived for each coding tree block (CTB) column of a tile of the video picture. A non-transitory computer-readable storage medium having instructions stored thereon.

19. 1. A method for storing a video bitstream, comprising: making a determination as to whether a height of a sub-picture of a video picture of a video is less than a height of a tile row of said video picture according to a first rule; generating a bitstream for the video using said determination; storing the bitstream on a non-transitory computer-readable recording medium; having the video picture having one or more tiles forming one or more tile rows and one or more tile columns; the bitstream conforms to a first format rule; The first format rule specifies that a tile column index is derived for each coding tree block (CTB) column of a tile of the video picture. method.

Images