Isolation Device

Abstract

To provide an isolator capable of avoiding false detection of communications due to noise with a simple configuration.SOLUTION: In an isolator, a primary side pattern 15 for signals and a secondary side pattern 16 for signals are coupled by electromagnetic induction, and a primary side pattern 17 for noise detection and a secondary side pattern 18 for noise detection are coupled by electromagnetic induction. A first voltage-dividing resistor 19 is arranged between a first node ND1 and a third node ND3, and a second voltage-dividing resistor 20 is arranged between the third node ND3 and a second node ND2. A first end J1 of the secondary side pattern 16 for signals and a first input terminal IP1 of a signal receiving circuit 8 are connected via a secondary side circuit 6, and a first end H1 of the secondary side pattern 18 for noise detection and a second input terminal IP2 of the signal receiving circuit 8 are connected via the secondary side circuit 6. When a voltage of the second input terminal IP2 is equal to or more than a threshold voltage, the signal receiving circuit 8 determines that an input signal is an abnormal signal.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present disclosure relates to an isolation device. [Background technology]

[0002] Conventionally, digital input circuits for receiving signals from external devices such as sensors, or for ON / OFF control of relays or diodes, are insulated using photocouplers or digital isolators to prevent noise from entering from the connected device. However, in recent years, as the speed of calculation processing has increased, the costs of control ICs and peripheral memories have tended to increase, so there is a demand for cost reduction of the output circuit section in order to maintain the cost of the entire device.

[0003] A method is known in which annular metal conductors are overlapped to transmit signals through magnetic resonance coupling without using an insulating element. Patent Document 1 describes a technology that implements this method using only a printed circuit board pattern and passive circuit elements (hereinafter referred to as a pattern isolator). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2016-46723 A Summary of the Invention [Problem to be solved by the invention]

[0005] In the actual environment where electronic devices are used, false detection of communication due to conductive noise superimposed on communication lines can be an issue. Even in pattern isolators, the superimposed noise that has been conducted through the communication lines is transmitted in the same way as normal communication signals due to coupling caused by electromagnetic induction. As a result, the digital input circuit erroneously detects the noise as a communication signal.

[0006] In the case of Patent Document 1, pulse conversion is required, which increases the product size, product cost, and communication delay time.

[0007] An object of the present disclosure is to provide an isolation device that can avoid erroneous detection of communication due to noise with a simple configuration. [Means for solving the problem]

[0008] The isolation device of the present disclosure includes a primary circuit arranged on a substrate, a secondary circuit, an isolation unit for isolating the primary circuit from the secondary circuit, a magnetic field generating unit, and a signal receiving circuit. The magnetic field generating unit includes a primary signal pattern, a secondary signal pattern, a primary noise detection pattern, and a secondary noise detection pattern. The primary signal pattern and the secondary noise detection pattern are coupled by electromagnetic induction. The primary noise detection pattern and the secondary noise detection pattern are coupled by electromagnetic fusion. The primary circuit has a first signal input terminal for receiving an input signal, a second signal input terminal, a first node, a second node, a third node, a first voltage dividing resistor, and a second voltage dividing resistor. The first node is connected to the first signal input terminal. The second node is connected to the second signal input terminal and a reference power supply. The first voltage dividing resistor is arranged between the first node and the third node. The second voltage dividing resistor is disposed between the third node and the second node. The first node is connected to a first end of the signal primary side pattern. The third node is connected to a first end of the noise detection primary side pattern. The second node is connected to a second end of the signal primary side pattern and a second end of the noise detection primary side pattern. The first end of the signal secondary side pattern is connected to a first input terminal of the signal receiving circuit via a secondary side circuit. The first end of the noise detection secondary side pattern is connected to a second input terminal of the signal receiving circuit via a secondary side circuit. The signal receiving circuit determines that the input signal is an abnormal signal when the voltage of the second input terminal is equal to or higher than a threshold voltage.

[0009] The isolation device of the present disclosure includes a primary circuit arranged on a substrate, a secondary circuit, an isolation unit for isolating the primary circuit from the secondary circuit, a magnetic field generating unit, and a signal receiving circuit. The magnetic field generating unit includes a signal primary pattern, a signal secondary pattern, a noise detection primary pattern, and a noise detection secondary pattern. The signal primary pattern and the signal secondary pattern are coupled by electromagnetic induction. The noise detection primary pattern and the noise detection secondary pattern are coupled by electromagnetic fusion. The primary circuit has a first signal input terminal for receiving an input signal, a second signal input terminal, a first node, a second node, a third node, a first shunt resistor, and a second shunt resistor. The first node is connected to the first signal input terminal. The second node is connected to the second signal input terminal and a reference power supply. The first shunt resistor is arranged between the first node and a first end of the signal primary pattern. The second shunt resistor is disposed between the first node and a first end of the noise detection primary side pattern. The second node is connected to a second end of the signal primary side pattern and a second end of the noise detection primary side pattern. The first end of the signal secondary side pattern is connected to a first input terminal of the signal receiving circuit via a secondary side circuit. The first end of the noise detection secondary side pattern is connected to a second input terminal of the signal receiving circuit via a secondary side circuit. The signal receiving circuit determines that the input signal is an abnormal signal when the voltage of the second input terminal is equal to or higher than a threshold voltage.

[0010] The isolation device of the present disclosure includes a primary circuit arranged on a substrate, a secondary circuit, an isolation unit for isolating the primary circuit from the secondary circuit, a magnetic field generating unit, and a signal receiving circuit. The magnetic field generating unit includes a primary signal pattern, a secondary signal pattern, a primary noise detection pattern, and a secondary noise detection pattern. The primary signal pattern and the secondary noise detection pattern are coupled by electromagnetic induction. The primary noise detection pattern and the secondary noise detection pattern are coupled by electromagnetic fusion. The primary circuit has a first signal input terminal for receiving an input signal, a second signal input terminal, a first node, and a second node. The first node is connected to the first signal input terminal. The second node is connected to the second signal input terminal and a reference power supply. The first node is connected to a first end of the primary signal pattern and a first end of the primary noise detection pattern. The second node is connected to a second end of the signal primary side pattern and a second end of the noise detection primary side pattern. A first end of the signal secondary side pattern is connected to a first input terminal of the signal receiving circuit via a secondary side circuit. A first end of the noise detection secondary side pattern is connected to a second input terminal of the signal receiving circuit via a secondary side circuit. The signal receiving circuit determines that the input signal is an abnormal signal when the voltage of the second input terminal is equal to or higher than a threshold voltage.

[0011] The isolation device of the present disclosure includes a primary circuit arranged on a substrate, a secondary circuit, an isolation unit for isolating the primary circuit from the secondary circuit, a magnetic field generating unit, and a signal receiving circuit. The magnetic field generating unit includes a signal primary pattern, a signal secondary pattern, and a noise detection primary pattern. The signal primary pattern and the signal secondary pattern are coupled by electromagnetic induction. The signal primary pattern and the noise detection primary pattern are coupled by electromagnetic fusion. The primary circuit has a first signal input terminal for receiving an input signal, a second signal input terminal, a first node, a second node, a third node, a first voltage dividing resistor, a second voltage dividing resistor, and a transistor. The first node is connected to the first signal input terminal. The second node is connected to the second signal input terminal and a reference power supply. The first voltage dividing resistor is arranged between the first node and the third node. The second voltage dividing resistor is disposed between the third node and the second node. The transistor is disposed between the first node and a first end of the noise detection primary side pattern, and a control electrode of the transistor is connected to the third node. The first node is connected to a first end of the signal primary side pattern. The second node is connected to a second end of the signal primary side pattern and a second end of the noise detection primary side pattern. The first end of the signal secondary side pattern is connected to a first input terminal of the signal receiving circuit via the secondary side circuit. The transistor is turned on when the input signal is an abnormal signal. Effect of the Invention

[0012] According to the present disclosure, erroneous detection of communication due to noise can be avoided with a simple configuration. [Brief description of the drawings]

[0013] [Figure 1] FIG. 2 is a plan view of the insulating device according to the first embodiment. [Diagram 2] 2 is a diagram showing the propagation characteristics 10 of the magnetic field generating unit 9. FIG. [Diagram 3] 1 is a diagram showing an input signal voltage 11 and a propagated signal voltage 12. FIG. [Figure 4]2 is a diagram illustrating the configuration of a primary side circuit 4 and a magnetic field generating unit 9 according to the first embodiment. FIG. [Diagram 5] 3 is a diagram showing a specific example of a wiring pattern of the magnetic field generating unit 9. FIG. [Figure 6] 2 is a diagram showing an example of a signal receiving circuit 8. FIG. [Figure 7] 11 is a diagram showing the configuration of a primary side circuit 4 and a magnetic field generating unit 9 according to a second embodiment. FIG. [Figure 8] 13 is a diagram showing the configuration of a primary side circuit 4 and a magnetic field generating unit 9 according to a third embodiment. FIG. [Figure 9] FIG. 13 is a diagram showing the configuration of a primary side circuit 4 and a magnetic field generating unit 9 according to a fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, embodiments will be described with reference to the drawings.

[0015] Embodiment 1 FIG. 1 is a plan view of an insulating device according to a first embodiment.

[0016] The isolation device comprises a substrate 1, an input circuit 7 and a signal receiving circuit 8 disposed on the substrate 1.

[0017] The board 1 and an external device 2 are connected by a cable 3. A signal input from the external device 2 to the board 1 via the cable 3 propagates through an input circuit 7 on the board 1 and is input to a signal receiving circuit 8.

[0018] The input circuit 7 includes a primary side circuit 4, an insulating unit 5, a secondary side circuit 6, and a magnetic field generating unit 9.

[0019] The magnetic field generating unit 9 couples the primary circuit 4 and the secondary circuit 6 by electromagnetic induction. The primary circuit 4 and the secondary circuit 6 are separated by the insulating unit 5. As a result, the primary circuit 4 and the secondary circuit 6 are not in electrical contact with each other. The magnetic field generating unit 9 is realized by pattern wiring, not by an insulating element such as a photocoupler or digital isolator. Hereinafter, this is referred to as a pattern isolator.

[0020] A resistor or a capacitor may be connected to the propagation path of the primary circuit 4 and the secondary circuit 6. The board 1 and the external device 2 may not be connected by the cable 3 but may be directly connected by a connector or the like.

[0021] FIG. 2 is a diagram showing the propagation characteristic 10 of the magnetic field generating unit 9. As shown in FIG.

[0022] 2, the horizontal axis represents frequency and the vertical axis represents S12. S12 is the ratio of energy that is propagated to the secondary circuit 6 out of the energy released from the primary circuit 4.

[0023] The propagation characteristic 10 changes according to the magnetic field generating unit 9. As shown in FIG. 2, unlike the propagation method by magnetic resonance, S12 does not become high only at a specific frequency. S12 is almost constant with respect to the change in frequency. Therefore, the magnetic field generating unit 9 makes it possible to propagate the signal from the externally connected device 2 to the signal receiving circuit 8 without depending on the frequency.

[0024] FIG. 3 is a diagram showing an input signal voltage 11 and a propagated signal voltage 12. As shown in FIG.

[0025] Figure 3 shows the propagation signal voltage 12 sent by the magnetic field generating unit 9 to the secondary circuit 6 and the signal receiving circuit 8 when an input signal voltage 11 is applied to the primary circuit 4 when the characteristics of the magnetic field generating unit 9 are the propagation characteristics 10 shown in Figure 2.

[0026] The absolute value of the propagated signal voltage 12 is greatest when the input signal voltage 11 rises and falls. In FIG. 3, the propagated signal voltage 12 is positive when the input signal voltage 11 rises and negative when the input signal voltage 11 falls, but the positive and negative may be reversed. The input signal voltage 11 differs depending on the external device 2 to be connected. A voltage waveform different from the input signal voltage 11 shown in FIG. 3 may be input, and the voltage generated thereby may be different from the propagated signal voltage 12.

[0027] In the positive range of the propagation signal voltage 12, a value lower than the first largest peak value and higher than the second largest peak value is set as the rising reference voltage 13. In the negative range of the propagation signal voltage 12, a value lower than the first largest peak value and higher than the second largest peak value is set as the falling reference voltage 14.

[0028] The signal receiving circuit 8 determines that the input signal voltage 11 has risen when the propagation signal voltage 12 becomes higher than the rising reference voltage 13. The signal receiving circuit 8 determines that the input signal voltage 11 has fallen when the propagation signal voltage 12 becomes lower than the falling reference voltage 14. This enables the signal receiving circuit 8 to decode the input signal voltage 11 from the propagation signal voltage 12.

[0029] Up to this point, we have explained the insulation properties and signal propagation provided by the pattern isolator. The characteristics of the pattern isolator work in the same way whether the input signal is a normal signal intended for communication, an abnormal signal in which external noise is superimposed on a normal signal, or an abnormal signal consisting only of external noise. Therefore, there is a possibility that the signal receiving circuit 8 will recognize the abnormal signal as a normal signal. This will result in a problem of the system malfunctioning.

[0030] FIG. 4 is a diagram showing the configuration of the primary side circuit 4 and the magnetic field generating unit 9 according to the first embodiment.

[0031] The magnetic field generating unit 9 includes a primary signal circular pattern 15, a secondary signal circular pattern 16, a primary noise detection circular pattern 17, and a secondary noise detection circular pattern .

[0032] The primary signal circular pattern 15 and the secondary signal circular pattern 16 are coupled by electromagnetic induction. The primary noise detection circular pattern 17 and the secondary noise detection circular pattern 18 are coupled by electromagnetic fusion.

[0033] The primary side circuit 4 includes a first signal input terminal IV1, a second signal input terminal IV2, a first node ND1, a second node ND2, a third node ND3, a first voltage dividing resistor 19, and a second voltage dividing resistor 20.

[0034] The first signal input terminal IV1 is connected to an external device 2 via a cable 3. The first signal input terminal IV1 receives an input signal.

[0035] The first node ND1 is connected to a first signal input terminal IV1.

[0036] The second node ND2 is connected to the second signal input terminal IV2 and the reference power supply (GND). The first voltage dividing resistor 19 is disposed between the first node ND1 and the third node ND3. The second voltage dividing resistor 20 is disposed between the third node ND3 and the second node ND2.

[0037] The first node ND1 and a first end E1 of the primary side circular signal pattern 15 are connected.

[0038] The third node ND3 and a first end F1 of the noise detection primary-side circular pattern 17 are connected.

[0039] The second node ND2 is connected to the second end E2 of the primary side circular pattern 15 for signal and the second end F2 of the primary side circular pattern 17 for noise detection.

[0040] A first end J1 of the secondary circular signal pattern 16 is connected to a first input terminal IP1 of the signal receiving circuit 8 via the secondary circuit 6. A second end J2 of the secondary circular signal pattern 16 is connected to a reference power supply (GND).

[0041] A first end H1 of the noise detection secondary-side circular pattern 18 is connected to a second input terminal IP2 of the signal receiving circuit 8 via the secondary-side circuit 6. A second end H2 of the noise detection secondary-side circular pattern 18 is connected to the reference power supply (GND).

[0042] The signal receiving circuit 8 determines that the input signal input to the first signal input terminal IV1 is an abnormal signal when the voltage at the second input terminal IP2 is equal to or higher than the high-level input threshold voltage Vih.

[0043] FIG. 5 is a diagram showing a specific example of a wiring pattern of the magnetic field generating unit 9. As shown in FIG.

[0044] The primary signal circular pattern 15 has no breaks other than the connection with the primary circuit 4. The secondary signal circular pattern 16 has no breaks other than the connection with the secondary circuit 6.

[0045] The ring of the primary signal circular pattern 15 and the ring of the secondary signal circular pattern 16 are arranged to overlap one above the other.

[0046] The primary side circular signal pattern 15 is wired on a primary side circular pattern layer (not shown), and the secondary side circular signal pattern 16 is wired on a secondary side circular pattern layer (not shown). The primary side circular pattern layer and the secondary side circular pattern layer are separate layers of the substrate 1.

[0047] When an input signal is input from an external device 2, a current flows through the primary signal ring pattern 15, generating a magnetic field 121, as shown in Fig. 5. The generated magnetic field 121 passes through the inside of the secondary signal ring pattern 16. As a result, a propagation signal voltage 12 propagates to the secondary circuit 6.

[0048] The configurations and operations of the primary noise detection circular pattern 17 and the secondary noise detection circular pattern 18 are similar to those of the primary signal circular pattern 15 and the secondary signal circular pattern 16 .

[0049] The primary-side circular pattern for noise detection 17 differs from the primary-side circular pattern for signal 15 in that it is connected to both ends of a second voltage dividing resistor 20 provided in the primary-side circuit 4, but similarly has no gaps other than at the connection with the primary-side circuit 4. The secondary-side circular pattern for noise detection 18, like the secondary-side circular pattern for signal 16, has no gaps other than at the connection with the secondary-side circuit 6.

[0050] In this embodiment, reception of normal signals and detection of abnormal signals are achieved by generating a difference between the electromotive voltage of the signal secondary circular pattern 16 and the electromotive voltage of the noise detection secondary circular pattern 18. The abnormal signals to be detected are noise signals with amplitudes larger than the maximum voltage amplitude of normal signals, and steep high-frequency signals with shorter rise and fall times than normal signals.

[0051] The voltage across both ends of the primary side circular pattern 15 for signal is Vsd1, the voltage across both ends of the secondary side circular pattern 16 for signal is Vsd2, the voltage across both ends of the primary side circular pattern 17 for noise detection is Vnd1, the voltage across both ends of the secondary side circular pattern 18 for noise detection is Vnd2, the voltage at the first input terminal IP1 of the signal receiving circuit 8 is VIN1, and the voltage at the second input terminal IP2 of the signal receiving circuit 8 is VIN2.

[0052] The resistance value of the first voltage dividing resistor 19 is R1, and the resistance value of the second voltage dividing resistor 20 is R2. The voltage propagation coefficient from the signal primary side circular pattern 15 to the signal secondary side circular pattern 16 is M1, the transmission coefficient of the signal from the signal secondary side circular pattern 16 to the signal receiving circuit 8 is G1, the voltage propagation coefficient from the noise detection primary side circular pattern 17 to the noise detection secondary side circular pattern 18 is M2, and the transmission coefficient of the signal from the noise detection secondary side circular pattern 18 to the signal receiving circuit 8 is G2. The high level input threshold voltage of the first input terminal IP1 and the second input terminal IP2 of the signal receiving circuit 8 is Vih. When the voltage of the first input terminal IP1 of the signal receiving circuit 8 is equal to or higher than the high level input threshold voltage Vih, the signal receiving circuit 8 generates a high level voltage as an input signal of the first input terminal IP1. When the voltage of the first input terminal IP1 of the signal receiving circuit 8 is less than the high-level input threshold voltage Vih, the signal receiving circuit 8 generates a low-level voltage as the input signal of the first input terminal IP1. When the voltage of the second input terminal IP2 of the signal receiving circuit 8 is equal to or greater than the high-level input threshold voltage Vih, the signal receiving circuit 8 generates a high-level voltage as the input signal of the second input terminal IP2. When the voltage of the second input terminal IP2 of the signal receiving circuit 8 is less than the high-level input threshold voltage Vih, the signal receiving circuit 8 generates a low-level voltage as the input signal of the second input terminal IP2. The voltage of the input signal is V0. The following equations hold.

[0053] Vsd1 = V0 (A1) Vsd2=M1×Vsd1=V0×M1 (A2) VIN1=G1×Vsd2=V0×G1×M1...(A3) Vnd1 = V0 × R2 / (R1 + R2) (A4) Vnd2=M2×Vnd1=V0×M2×R2 / (R1+R2)...(A5) VIN2=G2×Vnd2=V0×G2×M2×R2 / (R1+R2)...(A6) When the input signal is normal, the following holds:

[0054] VIN2 <Vih···(A7) When the input signal is an abnormal signal, the following holds:

[0055] VIN2 ≥ Vih (A8) More specifically, the following is assumed to hold: When the input signal is a normal signal, the maximum amplitude of V0 is Vsmax. When the input signal is an abnormal signal, the amplitude of V0 is Vn. The following formula holds:

[0056] Vn>>Vsmax (A9) Assume that the following equation holds when V0=Vsmax.

[0057] VIN2=Vsmax×G2×M2×R2 / (R1+R2) <Vih···(A10) When V0=Vn, the following equation holds.

[0058] VIN2=Vn×G2×M2×R2 / (R1+R2)≧Vih...(A11) The resistance value R1 of the first voltage dividing resistor 19 and the resistance value R2 of the second voltage dividing resistor 20 are adjusted so that the formula (A10) and the formula (A11) are satisfied. In selecting the resistance values ​​R1 and R2 in an actual product design, it is necessary to select them while evaluating Vsmax for each product, and Vn and frequency expected in the usage environment. In the first embodiment, two resistors are used for resistive voltage division as the simplest configuration, but three or more resistors may be used.

[0059] Alternatively, the resistance value R1 of the first voltage dividing resistor 19, the resistance value R2 of the second voltage dividing resistor 20, the voltage propagation coefficient M2 from the noise detection primary side circular pattern 17 to the noise detection secondary side circular pattern 18, and the propagation coefficient G2 of the signal from the noise detection secondary side circular pattern 18 to the signal receiving circuit 8 may be adjusted so that formula (A10) and formula (A11) are satisfied. In order to adjust M2 and G2, the ring shape, ring area, number of turns, and / or circular pattern spacing of each of the noise detection primary side circular pattern 17 and the noise detection secondary side circular pattern 18 may be adjusted.

[0060] When the signal input to the second input terminal IP2 of the signal receiving circuit 8 is at a low level, the signal receiving circuit 8 determines that the input signal is a normal signal.

[0061] When the signal input to the second input terminal IP2 of the signal receiving circuit 8 is at a high level, the signal receiving circuit 8 determines that the input signal is an abnormal signal. In this case, the signal input to the first input terminal IP1 of the signal receiving circuit 8 is discarded. The number of detections may be set to multiple times to improve the accuracy of the noise detection determination in the signal receiving circuit 8.

[0062] As described above, according to the present embodiment, when a normal signal is input, it is possible to prevent the signal from being erroneously detected as an abnormal signal. When an abnormal signal in which noise greater than that of the normal signal is superimposed is input, it is possible to prevent the signal from being erroneously detected as a normal signal.

[0063] A variation of the first embodiment. FIG. 6 is a diagram showing an example of the signal receiving circuit 8. As shown in FIG.

[0064] The signal receiving circuit 8 includes an AND gate 21 and a signal receiving IC 18 .

[0065] The AND gate 21 receives VIN1 and VIN2 and outputs a high level only when VIN1 is equal to or higher than Vih and VIN2 is lower than Vih.

[0066] The signal receiving IC 18 receives the output of the AND gate 21 .

[0067] Embodiment 2 FIG. 7 is a diagram showing the configuration of a primary side circuit 4 and a magnetic field generating unit 9 according to the second embodiment.

[0068] The magnetic field generating unit 9 includes a primary signal circular pattern 15, a secondary signal circular pattern 16, a primary noise detection circular pattern 17, and a secondary noise detection circular pattern .

[0069] The primary signal circular pattern 15 and the secondary signal circular pattern 16 are coupled by electromagnetic induction. The primary noise detection circular pattern 17 and the secondary noise detection circular pattern 18 are coupled by electromagnetic fusion.

[0070] The primary side circuit 4 includes a first signal input terminal IV1, a second signal input terminal IV2, a first node ND1, a second node ND2, a third node ND3, a first shunt resistor 22, and a second shunt resistor 23.

[0071] The first signal input terminal IV1 is connected to an external device 2 via a cable 3. The first signal input terminal IV1 receives an input signal.

[0072] The first node ND1 is connected to the first signal input terminal IV1. The second node ND2 is connected to the second signal input terminal IV2 and the reference power supply (GND). The first shunt resistor 22 is disposed between the first node ND1 and a first end E1 of the signal primary side circular pattern 15. The second shunt resistor 23 is disposed between the first node ND1 and a first end F1 of the noise detection primary side circular pattern 17.

[0073] The second node ND2 is connected to the second end E2 of the primary side circular pattern 15 for signal and the second end F2 of the primary side circular pattern 17 for noise detection.

[0074] A first end J1 of the secondary circular signal pattern 16 is connected to a first input terminal IP1 of the signal receiving circuit 8 via the secondary circuit 6. A second end J2 of the secondary circular signal pattern 16 is connected to a reference power supply (GND).

[0075] A first end H1 of the noise detection secondary-side circular pattern 18 is connected to a second input terminal IP2 of the signal receiving circuit 8 via the secondary-side circuit 6. A second end H2 of the noise detection secondary-side circular pattern 18 is connected to the reference power supply (GND).

[0076] The signal receiving circuit 8 determines that the input signal input to the first signal input terminal IV1 is an abnormal signal when the voltage at the second input terminal IP2 is equal to or higher than the high-level input threshold voltage Vih.

[0077] The resistance values ​​of the first shunt resistor 22 and the second shunt resistor 23 are R3 and R4, respectively. In the first embodiment, the voltage Vnd1 across the noise detection primary side circular pattern 17 is adjusted by resistive voltage division, whereas in the second embodiment, the amount of current flowing through the noise detection primary side circular pattern 17 is adjusted by resistive current division. The current of the input signal (i.e., the current flowing through the primary side circuit 4 due to the input signal) is I0. The following equation is established.

[0078] Vsd1 = I0 × R4 / (R3 + R4) (B1) Vsd2=M1×Vsd1=I0×M1×R4 / (R3+R4)...(B2) VIN1=G1×Vsd2=I0×G1×M1×R4 / (R3+R4)...(B3) Vnd1 = I0 × R3 / (R3 + R4) (B4) Vnd2=M2×Vnd1=I0×M2×R3 / (R3+R4)...(B5) VIN2=G2×Vnd2=I0×G2×M2×R3 / (R3+R4)...(B6) When the input signal is normal, the following holds:

[0079] VIN2 <Vih···(B7) When the input signal is an abnormal signal, the following holds:

[0080] VIN2 ≥ Vih (B8) More specifically, the following is assumed to hold. When the input signal is a normal signal, the maximum amplitude of I0 is Ismax, and when the input signal is an abnormal signal, the amplitude (total current amount) of I0 is In. The following formula is assumed to hold.

[0081] In>>Ismax···(B9) Assume that the following equation holds when I0=Ismax.

[0082] VIN2=Ismax×G2×M2×R3 / (R3+R4) <Vih···(B10) Assume that the following equation holds when I0=In.

[0083] VIN2=In×G2×M2×R3 / (R3+R4)≧Vih...(B11) The resistance value R3 of the first shunt resistor 22 and the resistance value R4 of the second shunt resistor 23 are adjusted so that formula (B10) and formula (B11) hold. In selecting the resistance values ​​R3 and R4 in an actual product design, it is necessary to select them while evaluating according to the Ismax of each product and the magnitude In and frequency of noise expected in the usage environment. In the second embodiment, the shunt resistor is configured with two resistors as the simplest configuration, but it may be realized with three or more resistors.

[0084] Alternatively, the resistance value R3 of the first shunt resistor 22 and the resistance value R4 of the second shunt resistor 23, the voltage propagation coefficient M2 from the noise detection primary-side circular pattern 17 to the noise detection secondary-side circular pattern 18, and the propagation coefficient G2 of the signal from the noise detection secondary-side circular pattern 18 to the signal receiving circuit 8 may be adjusted so that formula (B10) and formula (B11) are satisfied. In order to adjust M2 and G2, the ring shape, ring area, number of turns, and / or circular pattern spacing of each of the noise detection primary-side circular pattern 17 and the noise detection secondary-side circular pattern 18 may be adjusted.

[0085] When the signal input to the second input terminal IP2 of the signal receiving circuit 8 is at a low level, the signal receiving circuit 8 determines that the input signal is a normal signal.

[0086] When the signal input to the second input terminal IP2 of the signal receiving circuit 8 is at a high level, the signal receiving circuit 8 determines that the input signal is an abnormal signal. In this case, the signal input to the first input terminal IP1 of the signal receiving circuit 8 is discarded. The number of detections may be set to multiple times to improve the accuracy of the noise detection determination in the signal receiving circuit 8.

[0087] As described above, according to the present embodiment, when a normal signal is input, it is possible to prevent the signal from being erroneously detected as an abnormal signal. When an abnormal signal in which noise greater than that of the normal signal is superimposed is input, it is possible to prevent the signal from being erroneously detected as a normal signal.

[0088] Embodiment 3 FIG. 8 is a diagram showing the configuration of a primary side circuit 4 and a magnetic field generating unit 9 according to the third embodiment.

[0089] The magnetic field generating unit 9 includes a primary signal circular pattern 15, a secondary signal circular pattern 16, a primary noise detection circular pattern 17, and a secondary noise detection circular pattern .

[0090] The primary signal circular pattern 15 and the secondary signal circular pattern 16 are coupled by electromagnetic induction. The primary noise detection circular pattern 17 and the secondary noise detection circular pattern 18 are coupled by electromagnetic fusion.

[0091] The primary side circuit 4 includes a first signal input terminal IV1, a second signal input terminal IV2, a first node ND1, and a second node ND2. And Prepare.

[0092] The first signal input terminal IV1 is connected to an external device 2 via a cable 3. The first signal input terminal IV1 receives an input signal.

[0093] The first node ND1 is connected to a first signal input terminal IV1.

[0094] The second node ND2 is connected to the second signal input terminal IV2 and the reference power supply (GND). The first node ND1 is connected to a first end E1 of the primary side circular pattern 15 for signal and a first end F1 of the primary side circular pattern 17 for noise detection.

[0095] A first end J1 of the secondary circular signal pattern 16 is connected to a first input terminal IP1 of the signal receiving circuit 8 via the secondary circuit 6. A second end J2 of the secondary circular signal pattern 16 is connected to a reference power supply (GND).

[0096] A first end H1 of the noise detection secondary-side circular pattern 18 is connected to a second input terminal IP2 of the signal receiving circuit 8 via the secondary-side circuit 6. A second end H2 of the noise detection secondary-side circular pattern 18 is connected to the reference power supply (GND).

[0097] The signal receiving circuit 8 determines that the input signal input to the first signal input terminal IV1 is an abnormal signal when the voltage at the second input terminal IP2 is equal to or higher than the high-level input threshold voltage Vih.

[0098] Let the voltage of the input signal be V0. The following equation holds:

[0099] Vsd1=V0 (C1) Vsd2=M1×Vsd1=V0×M1 (C2) VIN1=G1×Vsd2=V0×G1×M1...(C3) Vnd1 = V0 (C4) Vnd2=M2×Vnd1=V0×M2...(C5) VIN2=G2×Vnd2=V0×G2×M2...(C6) When the input signal is normal, the following holds:

[0100] VIN2 <Vih···(C7) When the input signal is an abnormal signal, the following holds:

[0101] VIN2 ≥ Vih (C8) More specifically, the following is assumed to hold: When the input signal is a normal signal, the maximum amplitude of V0 is Vsmax. When the input signal is an abnormal signal, the amplitude of V0 is Vn. The following formula holds:

[0102] Vn>>Vsmax···(C9) Assume that the following equation holds when V0=Vsmax.

[0103] VIN2=Vsmax×G2×M2 <Vih···(C10) When V0=Vn, the following equation holds.

[0104] VIN2=Vn×G2×M2≧Vih (C11) The voltage propagation coefficient M2 from the noise detection primary-side circular pattern 17 to the noise detection secondary-side circular pattern 18 and the signal propagation coefficient G2 from the noise detection secondary-side circular pattern 18 to the signal receiving circuit 8 are adjusted so that formula (C10) and formula (C11) hold true. In order to adjust M2 and G2, the ring shapes, ring areas, number of turns, and / or circular pattern intervals of each of the noise detection primary-side circular pattern 17 and the noise detection secondary-side circular pattern 18 may be adjusted.

[0105] When the signal input to the second input terminal IP2 of the signal receiving circuit 8 is at a low level, the signal receiving circuit 8 determines that the input signal is a normal signal.

[0106] When the signal input to the second input terminal IP2 of the signal receiving circuit 8 is at a high level, the signal receiving circuit 8 determines that the input signal is an abnormal signal. In this case, the signal input to the first input terminal IP1 of the signal receiving circuit 8 is discarded. The number of detections may be set to multiple times to improve the accuracy of the noise detection determination in the signal receiving circuit 8.

[0107] As described above, according to the present embodiment, when a normal signal is input, it is possible to prevent the signal from being erroneously detected as an abnormal signal. When an abnormal signal in which noise greater than that of the normal signal is superimposed is input, it is possible to prevent the signal from being erroneously detected as a normal signal.

[0108] Embodiment 4 FIG. 9 is a diagram showing the configuration of a primary side circuit 4 and a magnetic field generating unit 9 according to the fourth embodiment.

[0109] The magnetic field generating unit 9 includes a primary signal circular pattern 15 , a secondary signal circular pattern 16 , and a primary noise detection circular pattern 17 .

[0110] The signal primary side circular pattern 15 and the signal secondary side circular pattern 16 are coupled by electromagnetic induction. The signal primary side circular pattern 15 and the noise detection primary side circular pattern 17 are coupled by electromagnetic fusion. The winding direction of the signal primary side circular pattern 15 and the noise detection primary side circular pattern 17 are opposite to each other. This allows the magnetic field generated by the noise detection primary side circular pattern 17 to cancel out the magnetic field generated by the signal primary side circular pattern 15.

[0111] The primary side circuit 4 includes a first signal input terminal IV1, a second signal input terminal IV2, a first node ND1, a second node ND2, a third node ND3, a first voltage dividing resistor 19, a second voltage dividing resistor 20, and a transistor 24.

[0112] The first signal input terminal IV1 is connected to an external device 2 via a cable 3. The first signal input terminal IV1 receives an input signal.

[0113] The first node ND1 is connected to a first signal input terminal IV1.

[0114] The second node ND2 is connected to the second signal input terminal IV2 and the reference power supply (GND). The first voltage dividing resistor 19 is arranged between the first node ND1 and the third node ND3. The second voltage dividing resistor 20 is arranged between the third node ND3 and the second node ND2. The transistor 24 is arranged between the first node ND1 and the first end F1 of the noise detection primary side circular pattern 17. The control electrode of the transistor 24 is connected to the third node ND3.

[0115] The first node ND1 and a first end E1 of the primary side circular signal pattern 15 are connected.

[0116] The second node ND2 is connected to the second end E2 of the primary side circular pattern 15 for signal and the second end F2 of the primary side circular pattern 17 for noise detection.

[0117] A first end J1 of the secondary circular signal pattern 16 is connected to a first input terminal IP1 of the signal receiving circuit 8 via the secondary circuit 6. A second end J2 of the secondary circular signal pattern 16 is connected to a reference power supply (GND).

[0118] The voltage of the input signal is V0. The voltage across the second voltage dividing resistor 20 is Vr2. Vth is the threshold voltage of the transistor 24. The following equation is established.

[0119] Vr2 = V0 × R2 / (R1 + R2) (D1) When the input signal is normal, the following holds:

[0120] Vr2 <Vth···(D2) When the input signal is an abnormal signal, the following holds:

[0121] Vr2 ≥ Vth (D3) More specifically, the following is assumed to hold: When the input signal is a normal signal, the maximum amplitude of V0 is Vsmax. When the input signal is an abnormal signal, the amplitude of V0 is Vn. The following formula holds:

[0122] Assume that the following equation holds when V0=Vsmax.

[0123] Vr2 = Vsmax × R2 / (R1 + R2) <Vth···(D4) When V0=Vn, the following equation holds.

[0124] Vr2=Vn×R2 / (R1+R2)≧Vth··(D5) When the input signal is an abnormal signal, the transistor 24 turns on. When the transistor 24 turns on, a magnetic field is generated in the noise detection primary circular pattern 17, which cancels the magnetic field generated in the signal primary circular pattern 15. This makes it possible to prevent the abnormal signal from propagating from the signal primary circular pattern 15 to the signal secondary circular pattern 16.

[0125] The resistance value R1 of the first voltage dividing resistor 19 and the resistance value R2 of the second voltage dividing resistor 20 are adjusted so that the formula (D4) and the formula (D5) are satisfied. In selecting the resistance values ​​R1 and R2 in the actual product design, it is necessary to select them while evaluating Vsmax of each product, Vn and frequency expected in the usage environment. In the fourth embodiment, as the simplest configuration, two resistors are used for resistive voltage division to generate the base voltage of the transistor 24, but three or more resistors may be used. Also, in order to adjust the operation of the transistor 24, a series resistor or a bypass capacitor may be connected to the base terminal and collector terminal of the transistor 24.

[0126] Unlike the first to third embodiments, in this embodiment, the signal receiving circuit 8 does not have a second input terminal IP2.

[0127] The signal receiving circuit 8 receives a normal signal input to the first input terminal IP1. By providing the noise detection primary side circular pattern 17, an abnormal signal is not input to the first input terminal IP1.

[0128] As described above, according to this embodiment, by improving the structure of the magnetic field generating unit 9, it is possible to cancel abnormal signals propagating to the secondary circular signal pattern 16 without providing the signal receiving circuit 8 with a noise detection function. This makes it possible to prevent the signal receiving circuit 8 from erroneously recognizing an abnormal signal as a normal signal.

[0129] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0130] 1 board, 2 external connection device, 3 cable, 4 primary circuit, 5 insulation section, 6 secondary circuit, 7 input circuit, 8 signal receiving circuit, 9 magnetic field generating section, 15 primary circular pattern for signal, 16 secondary circular pattern for signal, 17 primary circular pattern for noise detection, 18 secondary circular pattern for noise detection, 19 first voltage dividing resistor, 20 second voltage dividing resistor, 21 AND gate, 22 first shunt resistor, 23 second shunt resistor, 24 transistor, E1, F1, H1, J1 first terminal, E2, F2, H2, J2 second terminal, 18 signal receiving IC, IP1 first input terminal, IP2 second input terminal, IV1 first signal input terminal, IV2 second signal input terminal, ND1 first node, ND2 second node, ND3 third node.

Claims

1. The power supply includes a primary circuit arranged on a substrate, a secondary circuit, an insulating unit that insulates the primary circuit from the secondary circuit, a magnetic field generating unit, and a signal receiving circuit, the magnetic field generating unit includes a signal primary pattern, a signal secondary pattern, a noise detection primary pattern, and a noise detection secondary pattern, the signal primary pattern and the signal secondary pattern are coupled by electromagnetic induction, and the noise detection primary pattern and the noise detection secondary pattern are coupled by electromagnetic fusion, the primary side circuit has a first signal input terminal for receiving an input signal, a second signal input terminal, a first node, a second node, a third node, a first voltage dividing resistor, and a second voltage dividing resistor; the first node is connected to the first signal input terminal, the second node is connected to the second signal input terminal and a reference power supply; the first voltage dividing resistor is disposed between the first node and the third node, and the second voltage dividing resistor is disposed between the third node and the second node; the first node is connected to a first end of the signal primary pattern, the third node is connected to a first end of the noise detection primary pattern, the second node is connected to a second end of the signal primary pattern and a second end of the noise detection primary pattern, a first end of the signal secondary pattern and a first input terminal of the signal receiving circuit are connected via the secondary circuit, and a first end of the noise detection secondary pattern and a second input terminal of the signal receiving circuit are connected via the secondary circuit, The signal receiving circuit determines that the input signal is an abnormal signal when the voltage of the second input terminal is equal to or higher than a threshold voltage.

2. 2. The isolation device according to claim 1, wherein: a voltage of the input signal is V0, a ​​value of the first voltage dividing resistor is R1, a value of the second voltage dividing resistor is R2, a voltage propagation coefficient from the noise detection primary side pattern to the noise detection secondary side pattern is M2, a transmission coefficient of a signal from the noise detection secondary side pattern to the signal receiving circuit is G2, a voltage of the second input terminal of the signal receiving circuit is VIN2, and a high level input threshold voltage of the second input terminal of the signal receiving circuit is Vih; VIN2 = V0 x G2 x M2 x R2 / (R1 + R2); when the input signal is a normal signal, VIN2 < Vih; and when the input signal is an abnormal signal, VIN2 ≥ Vih.

3. The power supply includes a primary circuit arranged on a substrate, a secondary circuit, an insulating unit that insulates the primary circuit from the secondary circuit, a magnetic field generating unit, and a signal receiving circuit, the magnetic field generating unit includes a signal primary pattern, a signal secondary pattern, a noise detection primary pattern, and a noise detection secondary pattern, the signal primary pattern and the signal secondary pattern are coupled by electromagnetic induction, and the noise detection primary pattern and the noise detection secondary pattern are coupled by electromagnetic fusion, the primary side circuit has a first signal input terminal for receiving an input signal, a second signal input terminal, a first node, a second node, a third node, a first shunt resistor, and a second shunt resistor; the first node is connected to the first signal input terminal, the second node is connected to the second signal input terminal and a reference power supply; the first shunt resistor is disposed between the first node and a first end of the signal primary pattern, and the second shunt resistor is disposed between the first node and a first end of the noise detection primary pattern; the second node is connected to a second end of the signal primary pattern and a second end of the noise detection primary pattern; a first end of the signal secondary pattern and a first input terminal of the signal receiving circuit are connected via the secondary circuit, and a first end of the noise detection secondary pattern and a second input terminal of the signal receiving circuit are connected via the secondary circuit, The signal receiving circuit determines that the input signal is an abnormal signal when the voltage of the second input terminal is equal to or higher than a threshold voltage.

4. 4. The isolation device according to claim 3, wherein: a current of the input signal is I0, a value of the first shunt resistor is R3, a value of the second shunt resistor is R4, a voltage propagation coefficient from the noise detection primary side pattern to the noise detection secondary side pattern is M2, a transmission coefficient of a signal from the noise detection secondary side pattern to the signal receiving circuit is G2, a voltage of the second input terminal of the signal receiving circuit is VIN2, and a high level input threshold voltage of the second input terminal of the signal receiving circuit is Vih; VIN2 = I0 x G2 x M2 x R3 / (R3 + R4); when the input signal is a normal signal, VIN2 < Vih; and when the input signal is an abnormal signal, VIN2 ≥ Vih.

5. The power supply includes a primary circuit arranged on a substrate, a secondary circuit, an insulating unit that insulates the primary circuit from the secondary circuit, a magnetic field generating unit, and a signal receiving circuit, the magnetic field generating unit includes a signal primary pattern, a signal secondary pattern, a noise detection primary pattern, and a noise detection secondary pattern, the signal primary pattern and the signal secondary pattern are coupled by electromagnetic induction, and the noise detection primary pattern and the noise detection secondary pattern are coupled by electromagnetic fusion, the primary side circuit has a first signal input terminal for receiving an input signal, a second signal input terminal, a first node, and a second node; the first node is connected to the first signal input terminal, the second node is connected to the second signal input terminal and a reference power supply; the first node is connected to a first end of the signal primary pattern and a first end of the noise detection primary pattern, the second node is connected to a second end of the signal primary pattern and a second end of the noise detection primary pattern, a first end of the signal secondary pattern and a first input terminal of the signal receiving circuit are connected via the secondary circuit, and a first end of the noise detection secondary pattern and a second input terminal of the signal receiving circuit are connected via the secondary circuit, The signal receiving circuit determines that the input signal is an abnormal signal when the voltage of the second input terminal is equal to or higher than a threshold voltage.

6. 6. The isolation device according to claim 5, wherein: a voltage of the input signal is V0, a ​​voltage propagation coefficient from the noise detection primary side pattern to the noise detection secondary side pattern is M2, a transmission coefficient of a signal from the noise detection secondary side pattern to the signal receiving circuit is G2, a voltage of the second input terminal of the signal receiving circuit is VIN2, and a high level input threshold voltage of the second input terminal of the signal receiving circuit is Vih; VIN2 = V0 x G2 x M2, and when the input signal is a normal signal, VIN2 < Vih, and when the input signal is an abnormal signal, VIN2 ≥ Vih.

7. The power supply includes a primary circuit arranged on a substrate, a secondary circuit, an insulating unit that insulates the primary circuit from the secondary circuit, a magnetic field generating unit, and a signal receiving circuit, the magnetic field generating unit includes a signal primary pattern, a signal secondary pattern, and a noise detection primary pattern, the signal primary pattern and the signal secondary pattern are coupled together by electromagnetic induction, and the signal primary pattern and the noise detection primary pattern are coupled together by electromagnetic fusion, the primary side circuit has a first signal input terminal for receiving an input signal, a second signal input terminal, a first node, a second node, a third node, a first voltage dividing resistor, a second voltage dividing resistor, and a transistor; the first node is connected to the first signal input terminal, the second node is connected to the second signal input terminal and a reference power supply; the first voltage dividing resistor is disposed between the first node and the third node, the second voltage dividing resistor is disposed between the third node and the second node, the transistor is disposed between the first node and a first end of the noise detection primary side pattern, and a control electrode of the transistor is connected to the third node; the first node is connected to a first end of the signal primary pattern, the second node is connected to a second end of the signal primary pattern and to a second end of the noise detection primary pattern, an isolation device, wherein a first end of the signal secondary pattern and a first input terminal of the signal receiving circuit are connected via the secondary circuit, and the transistor is turned on when the input signal is an abnormal signal.

8. 8. The isolation device according to claim 7, wherein, when a threshold voltage of the transistor is Vth, a voltage of the input signal is V0, a ​​voltage across the second voltage dividing resistor is Vr2, a value of the first voltage dividing resistor is R1, and a value of the second voltage dividing resistor is R2, Vr2=V0×R2 / (R1+R2), Vr2<Vth holds when the input signal is a normal signal, and Vr2≧Vth holds when the input signal is an abnormal signal.

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