Display device

Abstract

To provide a semiconductor device with high reliability, to manufacture the semiconductor device, to manufacture the semiconductor device with high yield, and to improve productivity.SOLUTION: In a semiconductor device having a transistor in which a gate electrode layer, a gate insulation film, and an oxide semiconductor film are laminated in this order, and a source electrode layer and a drain electrode layer in contact with the oxide semiconductor film is provided, a step of eliminating residue matter resultant of an etching step existing on the gate electrode layer or an oxide semiconductor film surface and in its vicinity after forming the gate electrode layer or the source electrode layer and a drain electrode layer by the etching step.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally speaking, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] A transistor (thin film transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology of constructing thin-film transistors (also called TFTs) is attracting attention. It is widely used in electronic devices such as ICs and image display devices. Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used in transistors. As another material, oxide semiconductors are attracting attention.

[0004] For example, amorphous (amorphous) alloys containing indium (In), gallium (Ga), and zinc (Zn) The semiconductor layer is made of amorphous In-Ga-Zn-O oxide. A transistor in which this is used has been disclosed (see Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2011-181801 A Summary of the Invention [Problem to be solved by the invention]

[0006] By the way, in a semiconductor device including a transistor using an oxide semiconductor, Achieving this is an important step towards commercialization.

[0007] However, semiconductor devices are made up of multiple thin films with complex structures, and many different materials, methods and Therefore, the manufacturing process may cause defects in the shape and electrical properties of the resulting semiconductor device. There is a risk of deterioration of characteristics.

[0008] In view of the above, a highly reliable semiconductor device having a transistor including an oxide semiconductor is provided. One object of the present invention is to provide an apparatus.

[0009] Another object of the present invention is to manufacture highly reliable semiconductor devices with high yield and improve productivity. It shall be one. [Means for solving the problem]

[0010] In a semiconductor device having an inverted staggered transistor with a bottom gate structure, The residues from the etching process for forming the source electrode layer, the drain electrode layer, or the This prevents the oxide semiconductor film or the surface of the gate electrode layer and its vicinity from being contaminated.

[0011] Etching to form a metal layer such as a gate electrode layer or a source electrode layer and a drain electrode layer In the process, an etching material (etching agent) is applied to the surface of the metal layer or the surface of the oxide semiconductor film and its vicinity. Residues from the etching gas or etching solution are generated. Degradation of the electrical characteristics of transistors, such as a decrease in the voltage resistance of the gate insulating film and leakage current This can be a factor in causing fluctuations.

[0012] The residues include the etchant (etching gas or etching solution), the metal layer to be processed, The oxide semiconductor film exposed to the etching agent contains an element and a compound of the element. For example, a metal layer such as a gate electrode layer or a source electrode layer and a drain electrode layer is formed. In the etching process, a gas containing a halogen is preferably used. In this case, the residue is halogen-based impurities (halogens or halides).

[0013] Residuals may include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. The residue may include metal elements (e.g., indium) contained in the oxide semiconductor film. Indium, gallium, or zinc) may be included.

[0014] In one embodiment of the structure of the invention disclosed in this specification, after forming a source electrode layer and a drain electrode layer, A layer that exists on the surface of the oxide semiconductor film and between the source electrode layer and the drain electrode layer in the vicinity of the surface of the oxide semiconductor film A step of removing residues (residue removal step) is carried out.

[0015] In another embodiment of the present invention, after a gate electrode layer is formed, A step of removing residues present on the surface (residue removal step) is carried out.

[0016] The residue removal step is carried out by treatment with water or an alkaline solution, or by plasma treatment. Specifically, water or TMAH (Tetra Methyl Treatment with a solution of ammonium hydroxide, or oxygen, nitrous oxide, Alternatively, a plasma treatment using a rare gas (typically argon) can be suitably used. Treatment using dilute hydrofluoric acid (hydrofluoric acid) may also be performed.

[0017] The surface of the oxide semiconductor film or the gate electrode layer and its vicinity can be prevented from being contaminated by residues. Therefore, a semiconductor device having an inverted staggered transistor with a bottom gate structure is an oxide semiconductor. Residues on the surface of the semiconductor film (or gate electrode layer) (typically halogens (e.g., chlorine, fluorine) The surface density of the fluorine, boron, phosphorus, aluminum, iron, or carbon is set to 1×10 13 atom s / cm 2 Less than or equal to 1×10 12 atoms / cm 2 (below) In addition, residues (typically, halogens) on the surface of the oxide semiconductor film (or the gate electrode layer) The concentration of cations (e.g., chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon) is increased by 5x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 (below) and It is possible.

[0018] Therefore, a reliable transistor including a transistor having stable electrical characteristics using an oxide semiconductor film can be obtained. In addition, it is possible to provide a highly reliable semiconductor device with a high yield. This allows for improved productivity.

[0019] One embodiment of the configuration of the invention disclosed in this specification is a gate electrode layer on an insulating surface. a gate insulating film on the gate insulating film; an oxide semiconductor film on the gate insulating film; and a source electrode on the oxide semiconductor film. the electrode layer and the drain electrode layer are in contact with a region of the oxide semiconductor film which overlaps with the gate electrode layer, and an insulating film covering the source electrode layer and the drain electrode layer; The surface density of the halogen on the surface in contact with the film is 1×10 13 atoms / cm 2Semiconductor device It is located.

[0020] One embodiment of the configuration of the invention disclosed in this specification is a gate electrode layer on an insulating surface. a gate insulating film on the gate insulating film; an oxide semiconductor film on the gate insulating film; and a source electrode on the oxide semiconductor film. the electrode layer and the drain electrode layer are in contact with a region of the oxide semiconductor film which overlaps with the gate electrode layer, and a source electrode layer and a drain electrode layer; The surface density of is 1×10 13 atoms / cm 2 The semiconductor device is as follows.

[0021] One embodiment of the configuration of the invention disclosed in this specification is a gate electrode layer on an insulating surface. a gate insulating film on the gate insulating film; an oxide semiconductor film on the gate insulating film; and a source electrode on the oxide semiconductor film. the electrode layer and the drain electrode layer are in contact with a region of the oxide semiconductor film which overlaps with the gate electrode layer, and an insulating film covering the source electrode layer and the drain electrode layer; The surface density of the halogen on the surface in contact with the film is 1×10 13 atoms / cm 2 The gate is The surface density of halogen on the electrode layer surface is 1×10 13 atoms / cm 2 A semiconductor device that is It is.

[0022] In one embodiment of the configuration of the present invention disclosed in this specification, a gate electrode layer is formed on an insulating surface, A gate insulating film is formed on the electrode layer, an oxide semiconductor film is formed on the gate insulating film, and A conductive film is formed on the conductive film, and the conductive film is etched with a gas containing halogen. A semiconductor device in which a source electrode layer and a drain electrode layer are formed and a residue removal process is performed on the oxide semiconductor film A method for making a body device.

[0023] One embodiment of the present invention disclosed in this specification is a method for forming a conductive film on an insulating surface. The gate electrode layer is formed by etching with a gas containing halogen. A residue removal step is performed, and a gate insulating film is formed on the gate electrode layer that has been subjected to the residue removal step; An oxide semiconductor film is formed on the gate insulating film, and a source electrode layer and a drain electrode layer are formed on the oxide semiconductor film. The present invention relates to a method for manufacturing a semiconductor device in which a semiconductor device electrode layer is formed.

[0024] In one embodiment of the present invention, a first conductive film is formed on an insulating surface, The conductive film is etched with a gas containing halogen to form a gate electrode layer. A residue removal process is performed on the gate electrode layer, and a gate insulator is formed on the gate electrode layer that has been subjected to the residue removal process. a gate insulating film, an oxide semiconductor film is formed over the gate insulating film, and a second conductive film is formed over the oxide semiconductor film. The second conductive film is then etched with a gas containing halogen to form a source electrode. A semiconductor device in which a power electrode layer and a drain electrode layer are formed and a residue removing process is performed on the oxide semiconductor film. This is the method of production.

[0025] One aspect of the present invention is a semiconductor device having a transistor or a circuit including a transistor. For example, a transistor in which a channel formation region is formed using an oxide semiconductor Or, it relates to a semiconductor device having a circuit including a transistor. For example, an LSI CPUs, power devices mounted on power circuits, memory, thyristors, converters, semiconductor integrated circuits including image sensors, and electro-optical devices such as liquid crystal display panels. The present invention relates to electronic equipment incorporating a light-emitting display device having a light-emitting element or a light-emitting device as a component. Effect of the Invention

[0026] A highly reliable semiconductor device including a transistor including an oxide semiconductor is provided.

[0027] Further, highly reliable semiconductor devices can be manufactured with a high yield, thereby improving productivity. [Brief description of the drawings]

[0028] [Figure 1] 1A to 1C are cross-sectional views illustrating a semiconductor device and one embodiment of a manufacturing method of the semiconductor device. [Diagram 2] 1A to 1C are cross-sectional views illustrating a semiconductor device and one embodiment of a manufacturing method of the semiconductor device. [Diagram 3] 1A to 1C are cross-sectional views illustrating a semiconductor device and one embodiment of a manufacturing method of the semiconductor device. [Figure 4] FIG. 1 is a plan view illustrating one embodiment of a semiconductor device. [Diagram 5] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 6] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 7] 1A and 1B are a circuit diagram and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 8] FIG. [Figure 9] FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] Hereinafter, embodiments of the invention disclosed in this specification will be described in detail with reference to the drawings. However, the invention disclosed in this specification is not limited to the following description, and the forms and details thereof may be changed in various ways. It will be easily understood by those skilled in the art that the invention disclosed in this specification can be modified in any manner. The present invention should not be construed as being limited to the description of the following embodiments. The ordinal numbers 2 are used for convenience and do not indicate the order of steps or stacking. In addition, the present specification does not indicate specific names as matters for identifying the invention. do not have.

[0030] (Embodiment 1) In this embodiment mode, one mode of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. In this embodiment, a transistor including an oxide semiconductor film is used as an example of a semiconductor device. 1 shows a semiconductor device including:

[0031] A transistor can have either a single-gate structure in which one channel formation region is formed or a structure in which two are formed. The gate structure may be a double gate structure in which three gates are formed, or a triple gate structure in which three gates are formed. The semiconductor device has two gate electrode layers arranged above and below the channel forming region with a gate insulating film interposed therebetween. A dual gate type may also be used.

[0032] The transistor 440 shown in FIG. 1E is a bottom-gate transistor. The transistor 440 is an example of a transistor. FIG. 2 is a cross-sectional view in the longitudinal direction of the panel.

[0033] As shown in FIG. 1E, a semiconductor device including a transistor 440 has a substrate having an insulating surface. On a substrate 400, a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, a silicon substrate 404, a silicon nitride film 405, a silicon nitride film 406, a silicon nitride film 407, a silicon nitride film 408, a silicon nitride film 409, a silicon nitride film 410, a silicon nitride film 411, a silicon nitride film 412, a silicon nitride film 413, a silicon nitride The transistor 440 has a source electrode layer 405a and a drain electrode layer 405b. An insulating film 407 is provided.

[0034] The oxide semiconductor used for the oxide semiconductor film 403 contains at least indium (In). In particular, it is preferable that the oxide semiconductor film contains In and zinc (Zn). In addition, as a stabilizer to reduce the variation in the electrical characteristics of transistors, It is preferable to use gallium (Ga) as a stabilizer. It is preferable to have hafnium (Hf) as a stabilizer. It is also preferable to have aluminum (Al) as a stabilizer. It is also preferable to have zirconium (Zr) as a stabilizer.

[0035] Other stabilizers include the lanthanides lanthanum (La) and cerium ( Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Ho, Erbium, Thulium, Ytterbium, Ru The element may contain one or more of the elements tetraethynyl (Te) and tetraethynyl (Lu).

[0036] For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and In-Zn oxide. In-Mg oxide, In-Ga oxide, In-Ga-Zn oxide (IGZO and (also written as In-Al-Zn oxide, In-Sn-Zn oxide, In-Hf-Z n-type oxide, In-La-Zn-type oxide, In-Ce-Zn-type oxide, In-Pr-Zn In-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide Oxide, In-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide oxides, In-Ho-Zn oxides, In-Er-Zn oxides, In-Tm-Zn oxides In-Yb-Zn oxide, In-Lu-Zn ​​oxide, In-Sn-Ga-Zn oxide Oxide, In-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-S n-Al-Zn oxide, In-Sn-Hf-Zn oxide, In-Hf-Al-Zn An oxide can be used.

[0037] In this case, for example, In-Ga-Zn oxide is a material containing In, Ga, and Zn as main components. The ratio of In, Ga, and Zn does not matter. Metal elements other than a and Zn may be present.

[0038] In addition, as an oxide semiconductor, InMO3(ZnO) m (m>0 and m is not an integer) In addition, M may be selected from Ga, Fe, Mn, and Co. It indicates one or more metal elements. In2SnO5 (ZnO) n A material expressed as (n>0, and n is an integer) may be used.

[0039] For example, In:Ga:Zn=1:1:1(=1 / 3:1 / 3:1 / 3), In:Ga:Z n=2:2:1 (=2 / 5:2 / 5:1 / 5), or In:Ga:Zn=3:1:2 In-Ga-Zn oxide with an atomic ratio of (=1 / 2:1 / 6:1 / 3) and its neighboring compositions Alternatively, the oxide of In:Sn:Zn=1:1:1 (=1 / 3: 1 / 3:1 / 3), In:Sn:Zn=2:1:3(=1 / 3:1 / 6:1 / 2) or In-Sn with an atomic ratio of In:Sn:Zn=2:1:5 (=1 / 4:1 / 8:5 / 8) It is preferable to use -Zn-based oxides or oxides having a composition close to that.

[0040] However, the oxide semiconductor containing indium is not limited to these, and may have the required electrical characteristics (transfer It is sufficient to use a material with an appropriate composition according to the characteristics of the material (mobility, threshold, variation, etc.). In order to obtain the desired electrical properties, the carrier concentration, impurity concentration, defect density, and the origin of metal elements and oxygen are adjusted. It is preferable to make the molecular ratio, interatomic distance, density, etc. appropriate.

[0041] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. Therefore, in the case of In-Ga-Zn oxides, the mobility can be increased by lowering the defect density in the bulk. It can be done.

[0042] For example, the atomic ratio of In, Ga, and Zn is In:Ga:Zn=a:b:c(a+b+ The composition of the oxide with the atomic ratio of In:Ga:Zn=A:B:C (A+B+C = 1), a, b, and c are in the vicinity of the oxide composition (aA) 2 +(bB) 2 + (cC) 2 ≦r 2 It means that the following condition is satisfied. For example, r can be set to 0.05. The same is true for other oxides.

[0043] The oxide semiconductor film 403 may be single-crystalline, polycrystalline (also referred to as polycrystalline), or amorphous. Which state to take?

[0044] The oxide semiconductor film 403 is preferably a C Axis Aligned Optical Coaxial (CAAC-OS) film. The film is a Crystalline Oxide Semiconductor.

[0045] The CAAC-OS film is neither completely single crystalline nor completely amorphous. The oxide semiconductor film has a crystalline-amorphous mixed phase structure in which a crystalline portion and an amorphous portion are included in the amorphous phase. The crystal part is to be small enough to fit within a cube with one side less than 100 nm. Transmission Electron Microscope (TEM) The observation image by a microscope shows the amorphous and crystalline parts in the CAAC-OS film. The grain boundaries are not always clear. Therefore, the CAAC-OS film does not have any in-boundary defects. The resulting decrease in electron mobility is suppressed.

[0046] The crystal parts in the CAAC-OS film have c-axes that are normal vectors to the surface on which the CAAC-OS film is formed. The triangle is aligned parallel to the normal vector of the ab plane and perpendicular to the ab plane. The metal atoms are arranged in a layered or hexagonal shape when viewed perpendicular to the c-axis. Metal atoms and oxygen atoms are arranged in layers. The orientation of the a-axis may be different. In this specification, when it is simply described as vertical, it means 85 This includes the range of -5° to 95°. Note that the range of the oxygen contained in the oxide semiconductor film may also be included. may be substituted with nitrogen.

[0047] In the CAAC-OS film, the distribution of the crystal parts may not be uniform. In the process of forming the C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, The proportion of crystalline parts may be higher near the surface than near the growth surface. By adding impurities to the AC-OS film, the crystalline part becomes amorphous in the impurity-added region. It may also be pawned.

[0048] The c-axis of the crystal part in the CAAC-OS film is the normal vector of the surface on which the CAAC-OS film is formed. The CAAC-OS film shape (the shape of the film on which the film is formed) is Depending on the cross-sectional shape of the surface or the cross-sectional shape of the surface, the directions may differ from each other. The direction of the c-axis of the crystal is the normal vector of the surface on which the CAAC-OS film is formed. The direction of the crystal is parallel to the normal vector of the film or surface. is formed by carrying out a crystallization treatment such as a heat treatment after the film formation.

[0049] The electrical characteristics of transistors using CAAC-OS films change when exposed to visible or ultraviolet light. Therefore, the transistor has high reliability.

[0050] Note that part of oxygen contained in the oxide semiconductor film may be replaced with nitrogen.

[0051] In addition, in an oxide semiconductor having a crystalline part such as the CAAC-OS film, defects in the bulk are more likely to be reduced. By improving the flatness of the surface, the mobility can be increased to be higher than that of an amorphous oxide semiconductor. In order to improve the flatness of the surface, an oxide semiconductor is formed on the flat surface. Specifically, the average surface roughness (Ra) is 1 nm or less, preferably 0.3 It is preferable to form the surface on a thickness of 0.1 nm or less, and more preferably on a thickness of 0.1 nm or less.

[0052] Note that Ra is defined in JIS B601:2001 (ISO4287:1997). This is a three-dimensional extension of the arithmetic mean roughness, which is currently used, so that it can be applied to curved surfaces. It can be expressed as "the average of the absolute values ​​of the deviation from the specified surface to the target surface" and is defined by the following formula.

[0053]

number

[0054] Here, the specified surface is the surface to be measured for roughness, and has coordinates ((x1, y1, f(x1, y1))(x1,y2,f(x1,y2))(x2,y1,f(x2,y1))(x2, The specified surface is projected onto the xy plane, and the area is a rectangle represented by four points (x2, y2, f(x2, y2)). The area of ​​the rectangle is S0, and the height of the reference plane (average height of the specified plane) is Z0. Can be measured using an atomic force microscope (AFM) It is Noh.

[0055] The reference plane is a plane parallel to the XY plane at the average height of the specified plane. When the average value of the height of the fixed surface is Z0, the height of the reference surface is also expressed as Z0.

[0056] However, since the transistor 440 described in this embodiment is a bottom-gate type, Below the nitride semiconductor film, there are a substrate 400, a gate electrode layer 401, and a gate insulating film 402. Therefore, in order to obtain the above-mentioned flat surface, the gate electrode layer 401 and the gate insulating film 40 After forming 2, chemical mechanical polishing (CMP) is performed. A flattening process such as polishing may be performed.

[0057] The thickness of the oxide semiconductor film 403 is 1 nm to 30 nm (preferably 5 nm to 10 nm). m or less) and sputtering method, MBE (Molecular Beam Epita xy) method, CVD method, pulsed laser deposition method, ALD (Atomic Layer Dep The oxide semiconductor film 403 can be formed by a spatulation method or the like. Film deposition is performed on multiple substrate surfaces set approximately perpendicular to the target surface. Alternatively, the film may be formed by using a sputtering apparatus which performs the above steps.

[0058] 1A to 1E show an example of a method for manufacturing a semiconductor device including a transistor 440. .

[0059] There is no significant limitation on the substrate that can be used for the substrate 400 having an insulating surface. In either case, it is necessary to have heat resistance sufficient to withstand subsequent heat treatment. Glass substrates such as borosilicate glass and aluminoborosilicate glass, ceramic substrates, A quartz substrate, a sapphire substrate, etc. can be used. In addition, a silicon substrate, a silicon carbide substrate, etc. can be used. Any single crystal semiconductor substrate, polycrystalline semiconductor substrate, compound semiconductor substrate such as silicon germanium A semiconductor device having a semiconductor element on a substrate such as a silicon-on-insulator (SOI) substrate can also be used. may be used as the substrate 400.

[0060] A semiconductor device may be manufactured using a flexible substrate as the substrate 400. In order to manufacture such a semiconductor device, a transistor including an oxide semiconductor film 403 is formed on a flexible substrate. Alternatively, a transistor including the oxide semiconductor film 403 may be formed on another substrate. The photoresist 440 may be fabricated and then peeled off and transferred to a flexible substrate. A transistor 440 including a formation substrate and an oxide semiconductor film for separation and transfer to a flexible substrate. A release layer may be provided between the film and the substrate.

[0061] An insulating film may be provided as a base film on the substrate 400. The insulating film may be formed by a plasma CVD method. Alternatively, silicon oxide, silicon oxynitride, aluminum oxide, Aluminum oxide nitride, hafnium oxide, gallium oxide, and other oxide insulating films, silicon nitride nitride insulating films such as silicon oxynitride, aluminum nitride, and aluminum oxynitride; Or, it may be formed using a mixture of these materials.

[0062] Heat treatment may be performed on the substrate 400 (or the substrate 400 and the insulating film). Gas Rapid Thermal Annealing (GRTA) is a method for performing heat treatment using a gas l) Heat treatment can be performed at 650°C for 1 to 5 minutes using a GRTA device. The hot gases used in the process include rare gases such as argon, or nitrogen, which are easily affected by the heat treatment. An inert gas that does not react with the material to be treated is used. In addition, the material is heated in an electric furnace at 500°C for 30 minutes to 40 minutes. Heat treatment may be carried out for 1 hour.

[0063] Next, a conductive film is formed on the substrate 400, and the conductive film is etched to form a gate electrode layer 4 01 is formed. Etching of the conductive film can be done by either dry etching or wet etching. Well, you can use both.

[0064] The material of the gate electrode layer 401 is molybdenum, titanium, tantalum, tungsten, aluminum, etc. Metallic materials such as aluminum, copper, chromium, neodymium, scandium, etc., or alloys containing these as their main components The gate electrode layer 401 can be formed using a gold material. Semiconductor films such as element-doped polycrystalline silicon films, nickel silicide, etc. The gate electrode layer 401 may have a single layer structure or a stacked layer structure. The structure may also be used.

[0065] The material of the gate electrode layer 401 is indium oxide containing tungsten oxide, titanium oxide, or the like. Indium oxide containing titanium, indium tin oxide, indium tin oxide containing titanium Oxide, indium tin oxide with silicon oxide, indium zinc oxide, tin oxide Alternatively, a conductive material such as indium zinc oxide containing tin can be used. Alternatively, the conductive material and the metallic material may be laminated together.

[0066] The gate electrode layer 401 in contact with the gate insulating film 402 may be formed of a metal oxide containing nitrogen. Specifically, nitrogen-containing In-Ga-Zn oxide films and nitrogen-containing In-Sn oxide films films, In-Ga oxide films containing nitrogen, In-Zn oxide films containing nitrogen, Tin oxide films containing nitrogen, indium oxide films containing nitrogen, metal nitride films (InN, SnN, etc.) ) can be used. These films have a valence of 5 eV (electron volts), preferably 5.5 eV ( When used as a gate electrode layer, it has a work function of 1000 electron volts or more. The threshold voltage of the capacitance characteristic can be made positive.

[0067] In this embodiment, a tungsten film having a thickness of 100 nm is formed by sputtering. .

[0068] After the gate electrode layer 401 is formed, the substrate 400 and the gate electrode layer 401 are subjected to heat treatment. For example, a heat treatment may be performed at 650° C. for 1 to 5 minutes using a GRTA device. Alternatively, a heat treatment may be performed in an electric furnace at 500° C. for 30 minutes to 1 hour.

[0069] Next, a gate insulating film 402 is formed on the gate electrode layer 401 .

[0070] In order to improve the coverage of the gate insulating film 402, a flat layer is formed on the surface of the gate electrode layer 401. In particular, when a thin insulating film is used as the gate insulating film 402, It is preferable that the surface of the gate electrode layer 401 has good flatness.

[0071] The thickness of the gate insulating film 402 is set to 1 nm or more and 20 nm or less. Methods such as a CVD method, a pulsed laser deposition method, and an ALD method can be used as appropriate. The insulating film 402 is formed by depositing a plurality of substrate surfaces approximately perpendicular to the sputtering target surface. The film may be formed using a sputtering device that performs film formation in a set state.

[0072] The material of the gate insulating film 402 is a silicon oxide film, a gallium oxide film, an aluminum oxide film, or the like. a silicon nitride film, a silicon oxynitride film, an aluminum oxynitride film, or a nitride oxide film. It can be formed using a silicon film.

[0073] The material of the gate insulating film 402 is hafnium oxide, yttrium oxide, hafnium Silicate (HfSi x O y (x>0, y>0)), nitrogen-doped hafnium silicate HfSiO x N y (x>0, y>0)), hafnium aluminate (HfAl x O y (x>0, y>0)), and the use of high-k materials such as lanthanum oxide for the gate In addition, the gate insulating film 402 may have a single layer structure or a stacked structure. It may also be a structure.

[0074] The gate insulating film 402 preferably contains oxygen in a portion in contact with the oxide semiconductor film 403. In particular, the gate insulating film 402 has at least a stoichiometric composition in the film (bulk). It is preferable that the amount of oxygen present exceeds the amount contained in the gate insulating film 402. When a silicon oxide film is used as the 2+α (where α>0).

[0075] The gate insulating film 402 containing a large amount (excessive amount) of oxygen, which serves as an oxygen supply source, is formed on the oxide semiconductor film 4 By providing the oxide semiconductor film 403 in contact with the gate insulating film 402, the oxide semiconductor film 403 can be easily transferred to the oxide semiconductor film 403. The oxide semiconductor film 403 and the gate insulating film 402 can be formed by supplying at least By performing heat treatment in a state where the oxide semiconductor film 403 is partially in contact with the oxide semiconductor film 403, oxygen is supplied to the oxide semiconductor film 403. You may go.

[0076] By supplying oxygen to the oxide semiconductor film 403, oxygen vacancies in the film can be filled. Furthermore, the gate insulating film 402 can be formed in a desired thickness depending on the size of the transistor to be manufactured and the thickness of the gate insulating film 402. It is preferable to form the layer 02 taking into consideration the step coverage.

[0077] In this embodiment, a silicon oxynitride film having a thickness of 200 nm is formed by a high-density plasma CVD method. Form.

[0078] After the gate insulating film 402 is formed, the substrate 400, the gate electrode layer 401, and the gate insulating film 402 are The film 402 may be subjected to a heat treatment. For example, the film 402 may be subjected to a heat treatment at 650° C. for 1 to 5 minutes using a GRTA device. Heat treatment may be performed in an electric furnace at 500°C for 30 minutes to 1 hour. The theory may also be carried out.

[0079] Next, an oxide semiconductor film 403 is formed over the gate insulating film 402 (see FIG. 1A).

[0080] In the process of forming the oxide semiconductor film 403, hydrogen or water is added to the oxide semiconductor film 403. In order to prevent the inclusion of the oxide semiconductor film 403, a sputtering process was performed as a pretreatment for the formation of the oxide semiconductor film 403. The substrate on which the gate insulating film 402 is formed is preheated in a preheating chamber of the deposition apparatus. It is also preferable to desorb and exhaust impurities such as hydrogen and moisture adsorbed on the gate insulating film 402. The exhaust means provided in the preheating chamber is preferably a cryopump.

[0081] A planarization process is performed on a region of the gate insulating film 402 that is to be formed in contact with the oxide semiconductor film 403. The planarization process may be, but is not limited to, a polishing process (e.g., CM P treatment), dry etching treatment, and plasma treatment can be used.

[0082] The plasma treatment may be, for example, a reverse sputtering treatment in which argon gas is introduced to generate plasma. Reverse sputtering is a process in which RF is applied to the substrate side in an argon atmosphere. This method involves applying voltage using a power supply to generate plasma in the vicinity of the substrate to modify the surface. Instead of the argon atmosphere, nitrogen, helium, oxygen, etc. may be used. When the cleaning is performed, powdery substances (particles, dust, etc.) adhering to the surface of the gate insulating film 402 are removed. (also called) can be removed.

[0083] As the planarization process, the polishing process, the dry etching process, and the plasma process may be performed multiple times. In addition, when performing the steps in combination, the order of the steps is not particularly limited. It is not limited to this but may be appropriately set in accordance with the unevenness of the surface of the gate insulating film 402.

[0084] Note that the oxide semiconductor film 403 is formed under conditions in which a large amount of oxygen is contained (for example, The film is formed by sputtering in a 100% oxygen atmosphere. (preferably, the oxide semiconductor has a stoichiometric composition in a crystalline state, and the content of oxygen is It is preferable that the membrane is a membrane having an excess of ZnO.

[0085] In this embodiment, the oxide semiconductor film 403 is formed using a spa A sputtering method using a sputtering device was used to deposit an In-Ga-Zn oxide film with a thickness of 35 nm. In the present embodiment, an In:Ga:Zn=1:1: An In-Ga-Zn oxide target with an atomic ratio of 1 (= 1 / 3: 1 / 3: 1 / 3) was used. The film formation conditions were oxygen and argon atmosphere (oxygen flow rate 50%), pressure 0.6 The deposition rate under these deposition conditions is 16n m / min.

[0086] The oxide semiconductor film 403 is formed using a sputtering gas of hydrogen, water, a hydroxyl group, or an arsenic compound. It is preferable to use a high-purity gas from which impurities such as hydrides have been removed.

[0087] The substrate is held in a film-forming chamber that is kept in a reduced pressure state. Then, the remaining moisture in the film-forming chamber is removed. A sputtering gas from which hydrogen and moisture have been removed is introduced, and the base is sputtered using the above target. An oxide semiconductor film 403 is formed on a plate 400. In order to remove residual moisture in a film formation chamber, , adsorption type vacuum pumps, such as cryopumps, ion pumps, titanium sublimation pumps It is preferable to use a turbo molecular pump as the exhaust means. The deposition chamber evacuated using a cryopump may be, for example, For example, hydrogen atoms, water (H2O) and other compounds containing hydrogen atoms (preferably compounds containing carbon atoms) Since the oxide semiconductor film 403 formed in the deposition chamber is exhausted, the oxide semiconductor film 403 is not included in the deposition chamber. This can reduce the concentration of impurities.

[0088] In addition, the gate insulating film 402 and the oxide semiconductor film 40 are not exposed to the air. It is preferable to form the gate insulating film 402 continuously without exposing the gate insulating film 402 to the atmosphere. When the insulating film 402 and the oxide semiconductor film 403 are formed in succession, water is deposited on the surface of the gate insulating film 402. This can prevent impurities such as oxygen and moisture from being adsorbed.

[0089] The oxide semiconductor film 403 is formed by forming an island-like oxide semiconductor film into a film-like oxide semiconductor film by a photolithography process. The insulating film can be formed by processing the oxide semiconductor film.

[0090] In addition, a resist mask for forming the island-shaped oxide semiconductor film 403 was formed by an ink-jet method. If the resist mask is formed by the inkjet method, a photomask is not used. This reduces the manufacturing cost.

[0091] Note that the etching of the oxide semiconductor film may be dry etching or wet etching. For example, an etchant used for wet etching of an oxide semiconductor film may be used. The cleaning solution can be a mixture of phosphoric acid, acetic acid, and nitric acid. O-07N (manufactured by Kanto Chemical Co., Ltd.) may also be used. Dry etching using the Inductively Coupled Plasma (ICP) etching method Alternatively, etching may be performed by etching.

[0092] In addition, excess hydrogen (including water and a hydroxyl group) is removed (dehydrated or The temperature for the heat treatment is 300° C. or higher and 700° C. or lower. The temperature should be below ℃ or below the distortion point of the substrate. Heat treatment should be performed under reduced pressure or in a nitrogen atmosphere. It is possible.

[0093] In addition, when a crystalline oxide semiconductor film is used as the oxide semiconductor film 403, A heat treatment may be carried out.

[0094] In this embodiment, the substrate is placed in an electric furnace, which is a type of heat treatment device, and the oxide semiconductor film 4 03 at 450℃ for 1 hour in a nitrogen atmosphere, and then in an atmosphere containing nitrogen and oxygen Heat treatment is carried out at 450°C for 1 hour.

[0095] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heating element such as a resistance heating element. A device that heats the workpiece by radiation may be used. For example, a GRTA device or an LRT device may be used. RTA (Rapid Thermal Anneal) equipment such as A (Lamp Rapid Thermal Anneal) The LRTA device is a halo Gen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high The light emitted by high pressure sodium lamps, high pressure mercury lamps, etc. (electromagnetic waves) The GRTA device heats the object to be treated by using high-temperature gas. The high-temperature gas is a rare gas such as argon, or nitrogen, which is suitable for heat treatment. Therefore, an inert gas that does not react with the object to be treated is used.

[0096] For example, the substrate is placed in an inert gas heated to a high temperature of 650°C to 700°C as a heat treatment. After heating for several minutes, GRTA may be performed in which the substrate is taken out of the inert gas.

[0097] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen or hydrogen introduced into the heat treatment device is not included. The purity of rare gases such as sodium, neon, and argon is preferably 6N (99.9999%) or higher. is 7N (99.99999%) or more (i.e. impurity concentration is 1 ppm or less, preferably 0.1 It is preferable to set the concentration to less than ppm.

[0098] After the oxide semiconductor film 403 is heated by heat treatment, high-purity oxygen gas, high-purity 100°C nitrous oxide gas or ultra dry air (CRDS (Cavity Ring Down Laser Dispersion) When measured using a dew point meter using the optical method, the moisture content is 20 ppm (-55°C in dew point equivalent). (air having a concentration of 1 ppm or less, preferably 10 ppb or less) may be introduced. It is preferable that the oxygen gas or nitrous oxide gas does not contain water, hydrogen, etc. Alternatively, the purity of the oxygen gas or nitrous oxide gas introduced into the heat treatment device is preferably 6N or more. or 7N or more (i.e., impurity concentration in oxygen gas or nitrous oxide gas is 1 ppm or less, Preferably, the concentration is 0.1 ppm or less. The action of dehydration or dehydrogenation reduces the amount of impurities present in the process. By supplying oxygen, which is the main component of oxide semiconductors, The semiconductor film 403 can be highly purified and made to be of I-type (intrinsic).

[0099] Note that the timing of the heat treatment for dehydration or dehydrogenation is determined based on the time when the oxide semiconductor film is heated to 1000° C. The step may be performed after the formation of the island-shaped oxide semiconductor film 403 or after the formation of the island-shaped oxide semiconductor film 403.

[0100] The heat treatment for dehydration or dehydrogenation may be carried out multiple times or may be carried out in combination with other heat treatments. You can sleep.

[0101] The heat treatment for dehydration or dehydrogenation is performed to form the oxide semiconductor film 403 into an island shape. If the oxide semiconductor film is covered with the gate insulating film 402, the gate insulating film 4 This is preferable because it can prevent the oxygen contained in 02 from being released by the heat treatment. stomach.

[0102] In addition, oxygen (at least oxygen) is added to the oxide semiconductor film 403 that has been subjected to the dehydration or dehydrogenation treatment. oxygen radicals, oxygen atoms, or oxygen ions) are introduced into the film to supply oxygen. This is also fine.

[0103] In addition, oxygen, which is a main component material of an oxide semiconductor, can be removed by the dehydration or dehydrogenation treatment. In the oxide semiconductor film, oxygen is released and the amount of the oxide semiconductor film is reduced. In the area where the oxygen is removed, oxygen vacancies exist, and these oxygen vacancies cause fluctuations in the electrical characteristics of the transistor. Therefore, donor levels are generated.

[0104] Therefore, oxygen (at least oxygen la) is added to the oxide semiconductor film that has been subjected to the dehydration or dehydrogenation treatment. It is preferable to supply an oxide, which includes any one of an oxide, an oxygen atom, and an oxygen ion. By supplying oxygen to the semiconductor film, oxygen vacancies in the film can be compensated for.

[0105] Oxygen is introduced into the oxide semiconductor film 403 that has been subjected to dehydration or dehydrogenation treatment. By supplying the oxide semiconductor film 403, the oxide semiconductor film 403 is highly purified and made to be i-type (intrinsic). A transistor including a highly purified i-type (intrinsic) oxide semiconductor film 403 can be obtained. The electrical characteristic fluctuation is suppressed, and the material is electrically stable.

[0106] The oxygen introduction method includes ion implantation, ion doping, plasma immersion An implantation method, a plasma treatment, or the like can be used.

[0107] In the step of introducing oxygen into the oxide semiconductor film 403, The oxygen may be introduced directly or through another film such as the insulating film 407 into the oxide semiconductor film 403. If oxygen is introduced through another membrane, it is possible to use ion implantation or ion doping. The plasma immersion ion implantation method, etc. can be used. In the case where the oxygen is directly introduced into the exposed oxide semiconductor film 403, plasma treatment or the like may be used. This can be done.

[0108] Oxygen is preferably introduced into the oxide semiconductor film 403 after dehydration or dehydrogenation treatment. However, the present invention is not particularly limited to this. Oxygen may be introduced into 3 multiple times.

[0109] It is preferable that the oxide semiconductor film provided in the transistor is in a crystalline state. It is preferable that the film contains a region in which the oxygen content is excessive with respect to the stoichiometric composition. In this case, the oxygen content exceeds the stoichiometric composition of the oxide semiconductor. The oxygen content is set to a level exceeding the amount of oxygen in the case of a single crystal. Oxygen may also be present.

[0110] Hydrogen or moisture is removed from the oxide semiconductor, and the semiconductor is highly purified to minimize the amount of impurities contained therein. By supplying oxygen to compensate for oxygen vacancies, an i-type (intrinsic) oxide semiconductor or an i-type By doing so, it is possible to obtain an oxide semiconductor that is as close to an intrinsic oxide semiconductor as possible. To bring the Fermi level (Ef) of a semiconductor to the same level as the intrinsic Fermi level (Ei) Therefore, by using the oxide semiconductor film in a transistor, the Reduces the variation in threshold voltage Vth of transistors and the threshold voltage shift ΔVth It is possible.

[0111] Next, a silicon oxide film was formed over the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403. Conductive film 4 which will become the source electrode layer and the drain electrode layer (including wiring formed in the same layer) 45 (see FIG. 1(B)).

[0112] The conductive film 445 is made of a material that can withstand a heat treatment to be performed later. The conductive film 445 used in the pole layer is, for example, Al, Cr, Cu, Ta, Ti, Mo, W. A metal film containing an element selected from the above, or a metal nitride film (nitride film) containing the above elements as components. The film may be a titanium film, a molybdenum nitride film, a tungsten nitride film, or the like. A high melting point metal such as Ti, Mo, W, etc. is placed on either or both of the upper and lower sides of the metal film such as Cu. films or their metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film The source electrode layer and the drain electrode layer may have a laminated structure. The conductive film 445 may be formed of a conductive metal oxide. are indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium Indium tin oxide (In2O3-SnO2, abbreviated as ITO), indium zinc oxide ( In2O3-ZnO) or these metal oxide materials containing silicon oxide are used. There can be.

[0113] Resist masks 448a and 448b are formed on the conductive film 445 by a photolithography process. Then, selective etching is performed using a halogen-containing gas 447 to form the source electrode layer 40. 5a, the drain electrode layer 405b is formed (see FIG. 1(C)). After the drain electrode layer 405b is formed, the resist masks 448a and 448b are removed.

[0114] The resist masks 448a and 448b are formed by exposure to ultraviolet light, KrF laser light, or ArF The source electrode layer 405a adjacent to each other over the oxide semiconductor film 403 is preferably a laser beam. The width of the gap between the end of the drain electrode layer 405b and the lower end of the drain electrode layer 405b determines the width of the gap between the end of the drain electrode layer 405b and the lower end of the drain electrode layer 405b. The channel length L of 440 is determined. Note that when exposure is performed with a channel length L of less than 25 nm, In this case, extreme ultraviolet rays with extremely short wavelengths of several nm to several tens of nm are used. It is preferable to use a light-exposure mask such as violet for the formation of the resist masks 448a and 448b. Extreme ultraviolet light exposure provides high resolution and a large depth of focus. It is also possible to set the channel length L of the transistor to 10 nm or more and 1000 nm or less. The operating speed can be increased.

[0115] In order to reduce the number of photomasks and steps used in the photolithography process, The resist pattern is formed by a multi-tone mask, which is an exposure mask that allows the light to be projected at multiple intensities. The etching process may be performed using a resist mask formed using a multi-tone mask. The mask has a shape with multiple film thicknesses, and the shape can be further deformed by etching. This allows for multiple etching processes to be performed to create different patterns. Therefore, one multi-tone mask can handle at least two different patterns. Therefore, the number of photomasks can be reduced. This also eliminates the need for a corresponding photolithography process, making it possible to simplify the process.

[0116] In this embodiment, a gas 447 containing halogen is used for etching the conductive film 445. The halogen-containing gas 447 may be a chlorine-containing gas, such as chlorine (Cl2), trichloride, boron tetrachloride (BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. Gases containing halogens can be used. Gases containing fluorine can also be used as halogen-containing gases 447. For example, carbon tetrafluoride (CF4), sulfur fluoride (SF6), nitrogen fluoride (NF3), Gases containing trifluoromethane (CHF3) can be used. Gas containing rare gases such as helium (He) and argon (Ar) is used. It is possible.

[0117] The etching method is parallel plate type RIE (Reactive Ion Etching) ) method or ICP etching method can be used. It can be etched into the desired shape. As shown in the figure, the etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) The amount of power supplied, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0118] In this embodiment, the conductive film 445 is a titanium film having a thickness of 100 nm formed by a sputtering method. A laminate of a 400 nm thick aluminum film and a 100 nm thick titanium film is used. The film 445 is etched by dry etching, using a titanium film, an aluminum film, a titanium The source electrode layer 405a and the drain electrode layer 405b are formed by etching the stack of the silicon films. Form.

[0119] In this embodiment, two layers, a titanium film and an aluminum film, are etched under the first etching condition. After etching, the remaining titanium film single layer is removed under the second etching conditions. The etching conditions were: etching gas (BCl3:Cl2 = 750sccm:150sccm) The bias power was set to 1500 W, the ICP power supply power was set to 0 W, and the pressure was set to 2.0 Pa. The second etching condition is etching gas (BCl3:Cl2 = 700 sccm: 100sccm), bias power was set to 750W, ICP power supply power was set to 0W, and pressure The force is 2.0 Pa.

[0120] In the etching step for forming the source electrode layer 405a and the drain electrode layer 405b, An etching material (an etching gas or an etching solution) is applied to the surface of the oxide semiconductor film and its vicinity. These residues can cause transistor voltage problems such as leakage current. In addition, the elements contained in the etching material may cause deterioration or fluctuation of the electrical properties. There is a risk that such substances may get mixed into or adhere to the semiconductor film 403 and adversely affect the transistor characteristics.

[0121] The residue includes the etching material (etching gas or etching solution), the conductive film to be processed, 445, an element contained in the oxide semiconductor film 403 exposed to an etching agent, and For example, the etching process for forming the source electrode layer and the drain electrode layer includes the compound. In this case, a gas containing halogen is preferably used, and in this case, the residue contains halogen-based impurities ( halogen, or halide).

[0122] Residuals include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. The residue may include the conductive film 445, the oxide semiconductor exposed to the etching agent, etc. Metal elements contained in the film 403 (for example, indium, gallium, or zinc), In some cases, it may contain halides of metals, oxides of metal elements, etc. The elements contained in the stop masks 448a and 448b may also be included.

[0123] In this embodiment, the etching for forming the source electrode layer 405a and the drain electrode layer 405b is performed. The halogen-containing gas 447 is used in the etching process, so the resulting residue is halogen-containing (in this embodiment In the form of chlorine, the impurities are halogens or halides. When using halogen-containing gas 447 with boron, the residue produced is boron. , or compounds containing boron. In addition, the etching agent may be phosphoric acid, acetic acid, or nitric acid. When using a solution containing a mixture of these, the residue contains phosphorus and other elements.

[0124] Therefore, after the source electrode layer 405a and the drain electrode layer 405b are formed, the oxide semiconductor film 4 03 Between the source electrode layer 405a and the drain electrode layer 405b at or near the surface A step of removing any remaining residues is carried out (see FIG. 1(D)). The residue removal step is carried out by removing water, if any This can be achieved by treatment with an alkaline solution or plasma treatment. , water, or TMAH solution, or with oxygen, nitrous oxide, or noble gases (typically In particular, plasma treatment using argon can be suitably used. Treatment using an acid may be performed. Note that the oxide semiconductor film 4 is removed by the step of removing the residue. 03 Remove any residues (mainly halogens or halides in this embodiment) adhering to the surface. It has the effect of removing

[0125] Note that the oxide semiconductor film 40 is not etched during the etching process of the conductive film 445 and the process of removing the residue. It is desirable to optimize the etching conditions so that the 3 is etched and not broken. However, only the conductive film 445 is etched and the oxide semiconductor film 403 is not etched at all. It is difficult to obtain a condition where no chipping occurs. The conductive film 403 is only partially etched, becoming an oxide semiconductor film having a groove (depression). This sometimes happens.

[0126] Through the above steps, the transistor 440 of this embodiment is manufactured.

[0127] In this embodiment, an oxide semiconductor An insulating film 407 serving as a protective insulating film is formed in contact with the film 403 (see FIG. 1E).

[0128] The insulating film 407 has a thickness of at least 1 nm. The insulating film 7 can be formed by using an appropriate method that does not allow impurities such as water and hydrogen to be mixed therein. When hydrogen is contained in the oxide semiconductor film 407, the hydrogen may enter the oxide semiconductor film 403 or may be mixed with the oxide semiconductor film 407. As a result, oxygen in the oxide semiconductor film is extracted, and a back channel of the oxide semiconductor film 403 is formed. This may result in a low resistance (n-type) and the formation of a parasitic channel. In order to make the film 407 as hydrogen-free as possible, it is preferable not to use hydrogen in the film formation method. It is important.

[0129] The insulating film 407 is typically a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or the like. aluminium film, aluminium oxide nitride film, hafnium oxide film, gallium oxide film, silicon nitride film a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, an aluminum oxynitride film, etc. A single layer or a stack of inorganic insulating films can be used.

[0130] When a heating step is performed as the dehydration or dehydrogenation treatment, oxygen is added to the oxide semiconductor film 403. By supplying oxygen to the oxide semiconductor film 403, the oxygen in the film is It is possible to compensate for the element deficiency.

[0131] In this embodiment, oxygen is supplied to the oxide semiconductor film 403 from the insulating film 407. Therefore, the insulating film 407 is an oxide insulating film containing oxygen (for example, a silicon oxide film or an oxynitride film). In the case where the insulating film 407 is used as an oxygen supply source, the insulating film 407 is a film containing a large amount (excess) of oxygen (preferably, oxygen is 0.01% or more) relative to the stoichiometric composition in the crystalline state). When the film contains an area where the content of is excessive, it functions favorably as an oxygen source. It is possible.

[0132] In this embodiment, a silicon oxide film having a thickness of 300 nm is formed as the insulating film 407 by sputtering. The substrate temperature during film formation should be between room temperature and 300°C. In the embodiment, the temperature is set to 100° C. The silicon oxide film is formed by sputtering. In a rare gas (typically argon) atmosphere, in an oxygen atmosphere, or in a mixture of rare gas and oxygen atmosphere The target may be a silicon oxide target or a silicon target. For example, a silicon target can be used to The silicon oxide film can be formed by sputtering in an atmosphere containing fluorine.

[0133] In the same manner as in the formation of the oxide semiconductor film 403, moisture remaining in the deposition chamber for the insulating film 407 is removed. For this purpose, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating film 407 formed in a deposition chamber evacuated using an opamp was reduced. In addition, the exhaust means for removing the residual moisture in the deposition chamber for the insulating film 407 may be: A turbomolecular pump plus a cold trap may also be used.

[0134] The insulating film 407 is formed using a sputtering gas that is free of impurities such as hydrogen and water. It is preferable to use high purity gases that have been stripped.

[0135] Next, a part of the oxide semiconductor film 403 (a channel formation region) is in contact with the insulating film 407. A heating step is carried out.

[0136] The temperature of the heating process is 250°C to 700°C, or 400°C to 700°C, or For example, the substrate is introduced into an electric furnace, which is one type of heat treatment device, and The oxide semiconductor film is subjected to a heating step at 250° C. for 1 hour in a nitrogen atmosphere.

[0137] This heating step uses the same heating method and heating device as the heating step for dehydration or dehydrogenation. It can be used.

[0138] The heating process can be carried out under reduced pressure or with nitrogen, oxygen, or ultra-dry air (CRDS (Cavity Ring Down When measured using a dew point meter that uses the laser spectroscopy method, the moisture content is 20 ppm (dew point equivalent). -55°C or less, preferably 1 ppm or less, preferably 10 ppb or less of air, or The above can be carried out under an atmosphere of nitrogen, oxygen, or ultra-dry gas. It is preferable that the dry air or rare gas atmosphere does not contain water, hydrogen, etc. The purity of nitrogen, oxygen, or rare gas introduced into the heat treatment device must be 6N (99.9999%) or higher. Preferably, the concentration of impurities is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to keep the concentration of the EDTA concentration at 0.1 ppm or less.

[0139] Further, a heat treatment is performed while the oxide semiconductor film 403 and the insulating film 407 containing oxygen are in contact with each other. Therefore, the oxide semiconductor film 403 is reduced in the impurity removal process. Oxygen, which is one of the main components, is supplied to the oxide semiconductor film 403 through the insulating film 407 containing oxygen. It can be provided.

[0140] Further, a dense inorganic insulating film may be provided on the insulating film 407. For example, An aluminum oxide film is formed on 407 by sputtering. High density (film density 3.2g / cm 3 More than 3.6 g / cm, preferably 3.6 g / cm 3 (or more) This allows the transistor 440 to have stable electrical characteristics. Rutherford Backscattering (RBS) Spectrometry and X-Ray Reflectometry (XRR) tion) can be measured.

[0141] An aluminum oxide film that can be used as a protective insulating film provided over the transistor 440 The membrane has a blocking effect that does not allow impurities such as hydrogen and moisture, as well as oxygen, to pass through the membrane. Blocking effect is high.

[0142] Therefore, the aluminum oxide film is free from hydrogen, which is a variable factor during and after the manufacturing process. Impurities such as moisture may be mixed into the oxide semiconductor film 403, and the main components of the oxide semiconductor may be The oxide semiconductor film 403 functions as a protective film for preventing oxygen, which is a material, from being released from the oxide semiconductor film 403.

[0143] In addition, a planarization insulating film may be formed to reduce surface irregularities caused by the transistor 440. The planarizing insulating film may be made of polyimide, acrylic resin, benzocyclobutene resin, etc. In addition to the above organic materials, low-k materials can be used. In addition, a plurality of insulating films made of these materials can be laminated. A planarization insulating film may be formed by this.

[0144] For example, an acrylic resin film having a thickness of 1500 nm may be formed as the planarizing insulating film. The acrylic resin film is applied by coating and then baked (for example, at 250°C for 1 hour in a nitrogen atmosphere) to form the film. It can be achieved.

[0145] After the planarization insulating film is formed, heat treatment may be performed. For example, heat treatment may be performed at 250° C. for 1 hour in a nitrogen atmosphere. Heat treatment is then performed for a short time.

[0146] In this manner, heat treatment may be performed after the transistor 440 is formed. This may be done several times.

[0147] As described above, by performing the step of removing the residue, the surface of the oxide semiconductor film 403 In addition, since the vicinity can be prevented from being contaminated by residues, it is possible to realize an inverted starter of a bottom gate structure. The semiconductor device including the transistor 440, which is a gate-type transistor, is formed by forming an oxide semiconductor film 40 3 Impurities on the surface resulting from the etching process (typically halogens (e.g., chlorine, fluorine) The surface density of the metal (iron, boron, phosphorus, aluminum, iron, or carbon) is set to 1×10 13 atoms / cm 2 Less than or equal to 1×10 12 atoms / cm 2 (see below). In addition, impurities (typically, halide) on the surface of the oxide semiconductor film 403 due to an etching process are removed. The concentration of halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 below ) can be used.

[0148] In addition, impurities resulting from the etching process (typically halogens (e.g., chlorine, fluorine), The concentration of uranium, phosphorus, aluminum, iron, or carbon was measured by SIMS (Secondary Electron Microscopy). It can be estimated using methods such as ion mass spectrometry. Cut.

[0149] Therefore, a transistor 440 including the oxide semiconductor film 403 and having stable electrical characteristics can be obtained. It is also possible to provide a highly reliable semiconductor device including the semiconductor device. It is possible to manufacture with a high yield and improve productivity.

[0150] (Embodiment 2) In this embodiment mode, another embodiment of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. The parts and steps having the same or similar functions as those in the above embodiment are the same as those in the above embodiment. The embodiment can be carried out in the same manner as in the first embodiment, and the repeated explanation will be omitted. The details are omitted.

[0151] The transistor 430 shown in FIG. 2E is a bottom-gate transistor. The transistor 430 is an example of a transistor also called a transistor. FIG. 2 is a cross-sectional view in the longitudinal direction of the panel.

[0152] As shown in FIG. 2E, a semiconductor device including a transistor 430 has a substrate having an insulating surface. On a substrate 400, a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, a silicon substrate 404, a silicon nitride film 405, a silicon nitride film 406, a silicon nitride film 407, a silicon nitride film 408, a silicon nitride film 409, a silicon nitride film 410, a silicon nitride film 411, a silicon nitride film 412, a silicon nitride film 413, a silicon nitride The transistor 430 has a source electrode layer 405a and a drain electrode layer 405b. An insulating film 407 is provided.

[0153] 2A to 2E show an example of a method for manufacturing a semiconductor device including a transistor 430. .

[0154] A conductive film 441 is formed over a substrate 400 (see FIG. 2A). Lithium, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, It can be formed using metal materials such as candium or alloy materials that contain these as the main components. The conductive film 441 may be a polycrystalline silicon film doped with an impurity element such as phosphorus. A semiconductor film, such as a nickel silicide film, may be used. The layer 441 may have a single layer structure or a multilayer structure.

[0155] The conductive film 441 is made of indium oxide containing tungsten oxide or titanium oxide. Indium oxide, indium tin oxide, indium tin oxide containing titanium oxide , indium tin oxide with silicon oxide added, indium zinc oxide, tungsten oxide Conductive materials such as indium zinc oxide containing fluorine can also be used. A laminated structure of a conductive material and the above-mentioned metal material may also be used.

[0156] In this embodiment, the conductive film 441 is a tongue film having a thickness of 100 nm formed by a sputtering method. A stainless film is formed.

[0157] A resist mask 442 is formed over the conductive film 441 by a photolithography process. The gate electrode layer 401 is formed by etching the gate electrode layer 401 (see FIG. 2B). After the conductive film 401 is formed, the resist mask 442 is removed. The conductive film 441 is etched as follows: Either dry etching or wet etching may be used, or both may be used.

[0158] In this embodiment, a gas 443 containing halogen is used for etching the conductive film 441. The halogen-containing gas 443 may be a chlorine-containing gas, such as chlorine (Cl2), trichloride, boron tetrachloride (BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. In addition, a gas containing fluorine can be used as the halogen-containing gas 443. For example, carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3 Gases containing fluorine (CHF3), trifluoromethane (CHF3), etc. can be used. Gases with rare gases such as helium (He) and argon (Ar) added to these gases are used. There can be.

[0159] As the etching method, a parallel plate type RIE method or an ICP etching method can be used. The etching conditions (the applied voltage to the coil-shaped electrode) are adjusted so that the desired processed shape can be etched. The amount of power supplied to the electrode on the substrate, the amount of power applied to the electrode on the substrate, the temperature of the electrode on the substrate, etc. are appropriately adjusted. .

[0160] In this embodiment mode, dry etching is used in the etching process of the conductive film 441. The gas 443 containing carbon tetrafluoride, chlorine, and oxygen (CF4:Cl2 :O2=25sccm:25sccm:10sccm) and bias power was 150W The ICP power supply power is 500 W, and the pressure is 1.0 Pa.

[0161] In the etching process for forming the gate electrode layer 401, the surface of the gate electrode layer 401 and Residues from the etching material (etching gas or etching solution) may be generated nearby. If impurities contained in such residues are present on the surface of the gate electrode layer, the gate insulating layer may be damaged. This leads to a deterioration in the voltage resistance of the insulating film 402 (a decrease in the breakdown voltage), and the gate electrode layer 401 and the source Therefore, a leakage current occurs between the source electrode layer 405a or the drain electrode layer 405b. This can cause fluctuations and degradation of the electrical characteristics of the transistor.

[0162] The residue includes the etching material (etching gas or etching solution), the conductive film to be processed, For example, the gate electrode layer 401 may include an element contained in the gate electrode layer 441 and a compound of the element. In the etching process for forming the SiO2 film, a gas containing halogen is preferably used. In this case, the residue contains halogen impurities (halogens or halides).

[0163] Residuals include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. In addition, the residue may include metal elements contained in the conductive film 441, halogens of metal elements, etc. In some cases, the residue may contain nitrates, oxides of metal elements, etc. It may also contain elements contained in Q442.

[0164] In this embodiment mode, a gas containing halogen is used in the etching process for forming the gate electrode layer 401. Since 443 is used, the residue that is generated is halogen (chlorine in this embodiment)-based impurities (halo In addition, a mixture of phosphoric acid, acetic acid, and nitric acid is used as an etching agent. When a zeolite solution is used, the residue contains phosphorus and the like.

[0165] Therefore, after the gate electrode layer 401 is formed, the residues present on the surface of the gate electrode layer 401 and in the vicinity thereof A process for removing the residue is carried out (see FIG. 2(C)). The residue removal process is carried out by using water or an alkali. This can be done by treatment with an aqueous solution or by plasma treatment. Treatment with TMAH solution or with oxygen, nitrous oxide, or rare gases (typically arsenic) Plasma treatment using dilute hydrofluoric acid can be preferably used. Processing may be carried out.

[0166] Next, a gate insulating film 402 is formed on the gate electrode layer 401. A silicon oxynitride film having a thickness of 200 nm is formed by plasma CVD.

[0167] An oxide semiconductor film 403 is formed over the gate insulating film 402 (see FIG. 2D). In the embodiment, the oxide semiconductor film 403 is formed by a sputtering apparatus having an AC power supply. A 35 nm thick In-Ga-Zn oxide film (IGZ) was deposited by sputtering using In this embodiment, a Zn:In film is formed at a ratio of In:Ga:Zn=1:1:1 (=1 / 3: An In-Ga-Zn oxide target with an atomic ratio of 1 / 3:1 / 3 is used. The conditions were: oxygen and argon atmosphere (oxygen flow rate 50%), pressure 0.6 Pa, power supply The power consumption is 5 kW and the substrate temperature is 170°C. The deposition rate under these deposition conditions is 16 nm / min. do.

[0168] The oxide semiconductor film 403 is subjected to removal of excess hydrogen (including water and a hydroxyl group) (dehydration or dehydrogenation). In this embodiment, a heat treatment is performed using a heat treatment apparatus. The substrate is placed in an electric furnace, and the oxide semiconductor film 403 is heated to 450° C. in a nitrogen atmosphere for 1 The heat treatment is then performed for 1 hour at 450° C. in a nitrogen and oxygen atmosphere.

[0169] Next, a conductive film The conductive film is then etched to form a source electrode layer 405a and a drain electrode layer The conductive film is etched by either dry etching or wet etching. Alternatively, both may be used.

[0170] In this embodiment, a titanium film having a thickness of 100 nm and a 400 nm thick film are formed by sputtering. A 100 nm thick aluminum film and a 100 nm thick titanium film are then laminated, and the titanium is then removed by dry etching. The source electrode layer 405 is formed by etching the stack of the tantalum film, the aluminum film, and the titanium film. a. The drain electrode layer 405b is formed.

[0171] Through the above steps, the transistor 430 of this embodiment is manufactured.

[0172] In this embodiment, an oxide semiconductor An insulating film 407 that serves as a protective insulating film is formed in contact with the film 403 (see FIG. 2E). For example, a silicon oxynitride film is formed to a thickness of 400 nm by the CVD method. After the film is formed, a heat treatment may be performed. For example, the film may be heated at 300° C. for 1 hour in a nitrogen atmosphere. Do the following.

[0173] In addition, a planarization insulating film may be formed to reduce surface unevenness caused by the transistor 430. stomach.

[0174] For example, a 1500 nm thick acrylic resin film is formed on the protective insulating film as a planarizing insulating film. The acrylic resin film is applied by coating and then baked (for example, at 250°C in a nitrogen atmosphere). It can be formed in 1 hour.

[0175] After the planarization insulating film is formed, heat treatment may be performed. For example, heat treatment may be performed at 250° C. for 1 hour in a nitrogen atmosphere. Heat treatment is then performed for a short time.

[0176] As described above, the surface of the gate electrode layer 401 and its vicinity can be prevented from being contaminated by residues. In order to achieve this, the transistor 420 is an inverted staggered transistor having a bottom gate structure. The semiconductor device is formed by removing impurities (typically halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) The surface density of 1×10 13 atoms / cm 2 Less than or equal to 1×10 12 atoms / cm 2 In addition, impurities on the surface of the gate electrode layer 401 due to the etching process are elements (typically halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) concentration is 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 at oms / cm 3 (see below).

[0177] Therefore, the transistor 430 including the oxide semiconductor film 403 and having stable electrical characteristics can be obtained. It is also possible to provide a highly reliable semiconductor device including the semiconductor device. It is possible to manufacture with a high yield and improve productivity.

[0178] (Embodiment 3) In this embodiment mode, another embodiment of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. The parts and steps having the same or similar functions as those in the above embodiment are the same as those in the above embodiment. The embodiment can be carried out in the same manner as in the first embodiment, and the repeated explanation will be omitted. The details are omitted.

[0179] The transistor 420 shown in FIG. 3F is a type of bottom-gate transistor. The transistor 420 is an example of a transistor. FIG. 2 is a cross-sectional view in the longitudinal direction of the panel.

[0180] As shown in FIG. 3F, a semiconductor device including a transistor 420 has a substrate having an insulating surface. On a substrate 400, a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, a silicon substrate 404, a silicon nitride film 405, a silicon nitride film 406, a silicon nitride film 407, a silicon nitride film 408, a silicon nitride film 409, a silicon nitride film 410, a silicon nitride film 411, a silicon nitride film 412, a silicon nitride film 413, a silicon nitride The transistor 420 has a source electrode layer 405a and a drain electrode layer 405b. An insulating film 407 is provided.

[0181] 3A to 3F show an example of a method for manufacturing a semiconductor device including a transistor 420. .

[0182] A conductive film is formed on a substrate 400 having an insulating surface. The material of the conductive film is molybdenum, titanium, etc. tantalum, tungsten, aluminum, copper, chromium, neodymium, scandium, etc. The conductive material can be formed by using a metal material or an alloy material containing the metal material as a main component. Semiconductor films, such as polycrystalline silicon films doped with impurity elements such as phosphorus, are used as conductive films. Alternatively, a silicide film such as nickel silicide may be used. The conductive film may have a single layer structure. Alternatively, a laminated structure may be used.

[0183] The conductive film is made of indium oxide containing tungsten oxide, indium oxide containing titanium oxide, etc. Indium oxide, indium tin oxide, indium tin oxide containing titanium oxide, oxide Silicon-doped indium tin oxide, indium zinc oxide, and tungsten oxide are among the In addition, conductive materials such as indium zinc oxide, which includes It is also possible to use a laminated structure of the above-mentioned material and the above-mentioned metal material.

[0184] In this embodiment, a 100 nm thick tungsten film is formed by sputtering. A film is formed.

[0185] A resist mask is formed on the conductive film by a photolithography process, and selective etching is performed. The gate electrode layer 401 is formed by the steps shown in FIG. 3A. After that, the resist mask is removed. The conductive film can be etched either by dry etching or by wet etching. Alternatively, hot etching may be used, or both may be used.

[0186] In this embodiment mode, a gas containing halogen is used for etching the conductive film. The gas containing chlorine includes gas containing chlorine, such as chlorine (Cl2), boron trichloride (BCl3 ), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. In addition, as the gas containing halogen, a gas containing fluorine, for example, carbon tetrafluoride, can be used. (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), trifluoromethane ( Gases containing helium (He ) or a gas containing an added rare gas such as argon (Ar), etc. can be used.

[0187] As the etching method, a parallel plate type RIE method or an ICP etching method can be used. The etching conditions (the applied voltage to the coil-shaped electrode) are adjusted so that the desired processed shape can be etched. The amount of power supplied to the electrode on the substrate, the amount of power applied to the electrode on the substrate, the temperature of the electrode on the substrate, etc. are appropriately adjusted. .

[0188] In this embodiment mode, dry etching is used in the etching process of the conductive film. Gases containing halogen include carbon tetrafluoride, chlorine, and oxygen (CF4: Cl2:O2=25sccm:25sccm:10sccm) was used, and the bias power was set at 1 The power supply voltage was set to 50 W, the ICP power supply power was set to 500 W, and the pressure was set to 1.0 Pa.

[0189] In the etching process for forming the gate electrode layer 401, the surface of the gate electrode layer 401 and Residues from the etching material (etching gas or etching solution) may be generated nearby. If impurities contained in such residues are present on the surface of the gate electrode layer, the gate insulating layer may be damaged. This leads to a decrease in the breakdown voltage of the insulating film 402, and the gate electrode layer 401 and the source electrode layer 405a or the drain electrode layer 405b are A leakage current occurs between the electrode layer 405b and the transistor. This can lead to fluctuations and declines.

[0190] The residue includes the etching material (etching gas or etching solution), the conductive film to be processed, For example, the gate electrode layer 401 may be formed by In the etching process, a gas containing a halogen is preferably used. In this case, the residue contains halogen. Contains halogen impurities (halogens or halides).

[0191] Residuals include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. In addition, the residue may contain metal elements, halides of metal elements, and metals contained in the conductive film. It may also contain oxides of elements. Residues contained in resist masks It may also contain elements.

[0192] In this embodiment mode, a gas containing halogen is used in the etching process for forming the gate electrode layer 401. Since the above-mentioned method is used, the residues that are generated are halogen (chlorine in this embodiment)-based impurities (halogens, or halide). Also, a solution of phosphoric acid, acetic acid, and nitric acid is used as an etching agent. When using, the residue contains phosphorus and the like.

[0193] Therefore, after the gate electrode layer 401 is formed, the residues present on the surface of the gate electrode layer 401 and in the vicinity thereof A process for removing the residue is carried out (see FIG. 3(B)). The residue removal process is carried out by using water or an alkali. This can be done by treatment with an aqueous solution or by plasma treatment. Treatment with TMAH solution or with oxygen, nitrous oxide, or rare gases (typically arsenic) Plasma treatment using dilute hydrofluoric acid can be preferably used. Processing may be carried out.

[0194] Next, a gate insulating film 402 is formed on the gate electrode layer 401. A silicon oxynitride film having a thickness of 200 nm is formed by plasma CVD.

[0195] An oxide semiconductor film 403 is formed over the gate insulating film 402 (see FIG. 3C). In the embodiment, the oxide semiconductor film 403 is formed by a sputtering apparatus having an AC power supply. A 35 nm thick In-Ga-Zn oxide film (IGZ) was deposited by sputtering using In this embodiment, a Zn:In film is formed at a ratio of In:Ga:Zn=1:1:1 (=1 / 3: An In-Ga-Zn oxide target with an atomic ratio of 1 / 3:1 / 3 is used. The conditions were: oxygen and argon atmosphere (oxygen flow rate 50%), pressure 0.6 Pa, power supply The power consumption is 5 kW and the substrate temperature is 170°C. The deposition rate under these deposition conditions is 16 nm / min. do.

[0196] The oxide semiconductor film 403 is subjected to removal of excess hydrogen (including water and a hydroxyl group) (dehydration or dehydrogenation). In this embodiment, a heat treatment is performed using a heat treatment apparatus. The substrate is placed in an electric furnace, and the oxide semiconductor film 403 is heated to 450° C. in a nitrogen atmosphere for 1 The heat treatment is then performed for 1 hour at 450° C. in a nitrogen and oxygen atmosphere.

[0197] Next, a silicon oxide film was formed over the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403. A conductive film to be a source electrode layer and a drain electrode layer is formed.

[0198] The conductive film is made of a material that can withstand a heat treatment to be performed later. The conductive film used is, for example, a film selected from Al, Cr, Cu, Ta, Ti, Mo, and W. Metal films containing the elements, or metal nitride films containing the above elements (titanium nitride film, nitride Molybdenum film, tungsten nitride film, etc. can be used. A high melting point metal film such as Ti, Mo, W, etc. on either or both of the upper and lower sides of the metal film. These metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film) are laminated. In addition, the conductive film used for the source electrode layer and the drain electrode layer may be Alternatively, the conductive metal oxide may be used. Indium oxide ( In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium tin oxide (I n2O3-SnO2, abbreviated as ITO), indium zinc oxide (In2O3-ZnO ) or a material obtained by incorporating silicon oxide into these metal oxide materials can be used.

[0199] A resist mask is formed on the conductive film by a photolithography process, and selective etching is performed. The source electrode layer 405a and the drain electrode layer 405b are formed (see FIG. 3D). After the source electrode layer 405a and the drain electrode layer 405b are formed, the resist mask is removed. do.

[0200] In this embodiment mode, a gas containing halogen is used for etching the conductive film. The gas containing chlorine includes gas containing chlorine, such as chlorine (Cl2), boron trichloride (BCl3 ), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. In addition, as the gas containing halogen, a gas containing fluorine, for example, carbon tetrafluoride, can be used. (CF4), sulfur fluoride (SF6), nitrogen fluoride (NF3), trifluoromethane (CH Gases containing helium (He) or A gas containing a rare gas such as argon (Ar) can be used.

[0201] As the etching method, a parallel plate type RIE method or an ICP etching method can be used. The etching conditions (the applied voltage to the coil-shaped electrode) are adjusted so that the desired processed shape can be etched. The amount of power supplied to the electrode on the substrate, the amount of power applied to the electrode on the substrate, the temperature of the electrode on the substrate, etc. are appropriately adjusted. .

[0202] In this embodiment, a titanium film having a thickness of 100 nm is formed as the conductive film by a sputtering method. A 400 nm thick aluminum film and a 100 nm thick titanium film are laminated. Etching is done by dry etching to laminate the titanium film, aluminum film, and titanium film. By etching, the source electrode layer 405a and the drain electrode layer 405b are formed.

[0203] In this embodiment, two layers, a titanium film and an aluminum film, are etched under the first etching condition. After etching, the remaining titanium film single layer is removed under the second etching conditions. The etching conditions were: etching gas (BCl3:Cl2 = 750sccm:150sccm) The bias power was set to 1500 W, the ICP power supply power was set to 0 W, and the pressure was set to 2.0 Pa. The second etching condition is etching gas (BCl3:Cl2 = 700 sccm: 100sccm), bias power was set to 750W, ICP power supply power was set to 0W, and pressure The force is 2.0 Pa.

[0204] In the etching step for forming the source electrode layer 405a and the drain electrode layer 405b, An etching material (an etching gas or an etching solution) is applied to the surface of the oxide semiconductor film and its vicinity. These residues can cause transistor voltage problems such as leakage current. In addition, the elements contained in the etching material may cause deterioration or fluctuation of the electrical properties. There is a risk that such substances may get mixed into or adhere to the semiconductor film 403 and adversely affect the transistor characteristics.

[0205] The residue includes the etching material (etching gas or etching solution), the conductive film to be processed, The elements contained in the oxide semiconductor film 403 exposed to the etching agent and compounds of the elements For example, in the etching process for forming the source electrode layer and the drain electrode layer, A gas containing halogen is preferably used. In this case, the residue contains halogen impurities (halogens). The compounds include fluorine, fluorine-containing compounds ...

[0206] Residuals include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. The residue may include a conductive film, an oxide semiconductor film 4 exposed to an etching agent, etc. Metal elements included in 03 (e.g., indium, gallium, or zinc), halo metal elements It may also contain residues such as resist matrices and oxides of metal elements. It may also contain elements contained in the scum.

[0207] In this embodiment, the etching for forming the source electrode layer 405a and the drain electrode layer 405b is performed. Since a gas containing halogen is used in the etching process, the resulting residue is halogen (in this embodiment, The impurities are halogens or halides. When boron is used in a halogen-containing gas, the resulting residue is boron or boron Also included are compounds containing. Also, a solution of phosphoric acid, acetic acid, and nitric acid is used as an etching agent. When used, the residue contains phosphorus and the like.

[0208] Therefore, after the source electrode layer 405a and the drain electrode layer 405b are formed, the oxide semiconductor film 4 03 Between the source electrode layer 405a and the drain electrode layer 405b at or near the surface A step of removing any remaining residues is carried out (see FIG. 3(E)). The residue removal step is carried out by removing water, if any This can be achieved by treatment with an alkaline solution or plasma treatment. , water, or TMAH solution, or with oxygen, nitrous oxide, or noble gases (typically In particular, plasma treatment using argon can be suitably used. Treatment using an acid may be performed. Remove the residues (mainly halogens or halides in this embodiment) attached to the surface of It has the effect of

[0209] Through the above steps, the transistor 420 of this embodiment is manufactured.

[0210] In this embodiment, an oxide semiconductor An insulating film 407 that serves as a protective insulating film is formed in contact with the film 403 (see FIG. 3F). For example, a silicon oxynitride film is formed to a thickness of 400 nm by the CVD method. After the film is formed, a heat treatment may be performed. For example, the film may be heated at 300° C. for 1 hour in a nitrogen atmosphere. Do the following.

[0211] In addition, a planarization insulating film may be formed to reduce surface unevenness caused by the transistor 430. stomach.

[0212] For example, a 1500 nm thick acrylic resin film is formed on the protective insulating film as a planarizing insulating film. The acrylic resin film is applied by coating and then baked (for example, at 250°C in a nitrogen atmosphere). , 1 hour).

[0213] After the planarization insulating film is formed, heat treatment may be performed. For example, heat treatment may be performed at 250° C. for 1 hour in a nitrogen atmosphere. Heat treatment is then performed for a short time.

[0214] As described above, the gate electrode layer 401 and the surface and vicinity of the oxide semiconductor film 403 remain. This prevents contamination by foreign objects, and is therefore possible with bottom-gate inverted staggered transistors. In a semiconductor device including a transistor 420, an edge on a surface of an oxide semiconductor film 403 is Impurities resulting from the annealing process (typically halogens (e.g., chlorine, fluorine), boron, phosphorus, etc.) , aluminum, iron, or carbon) to a surface density of 1×10 13 atoms / cm 2 Below (preferred Or 1×10 12 atoms / cm 2 The gate electrode layer 401 Impurities on the surface resulting from the etching process (typically halogens (e.g. chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon) surface density of 1×10 13 ato ms / cm 2 Less than or equal to 1×10 12 atoms / cm 2 (hereinafter)

[0215] Note that impurities (typically, halide) on the surface of the oxide semiconductor film 403 due to an etching process are The concentration of halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 below ) on the surface of the gate electrode layer 401. Typically, halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or Carbon) concentration is 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 atom s / cm 3 (see below).

[0216] Therefore, the transistor 420 including the oxide semiconductor film 403 and having stable electrical characteristics can be obtained. It is also possible to provide a highly reliable semiconductor device including the semiconductor device. It is possible to manufacture with a high yield and improve productivity.

[0217] (Embodiment 4) A semiconductor device having a display function using the transistor described in any one of Embodiments 1 to 3. In addition, a driver circuit including a transistor can be fabricated. A part or the whole of the display is formed integrally on the same substrate as the pixel section to form a system-on-panel. can be done.

[0218] In FIG. 4A, a pixel portion 4002 provided on a first substrate 4001 is surrounded by a A sealant 4005 is provided and the semiconductor device is sealed with a second substrate 4006. In A), a region surrounded by a sealant 4005 on a first substrate 4001 and The semiconductor layer is formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate in a different region. A scanning line driver circuit 4004 and a signal line driver circuit 4003 are also mounted. A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel portion 4002 are connected to the signal line driver circuit 4003 and the scanning line driver circuit 4004 or the pixel portion 4002. Various signals and potentials are transmitted via FPC (Flexible printed circuit). Powered by FPC4018a and FPC4018b.

[0219] In FIG. 4B and FIG. 4C, a pixel portion 400 is provided on a first substrate 4001. A sealant 4005 is provided so as to surround the gate electrode 2 and the scanning line driver circuit 4004. A second substrate 4006 is provided on the pixel portion 4002 and the scanning line driver circuit 4004. Therefore, the pixel portion 4002 and the scanning line driver circuit 4004 are formed on the first substrate 4001. The display element is sealed by a sealant 4005 and a second substrate 4006. In FIG. 4(B) and FIG. 4(C), the sealing material 4005 on the first substrate 4001 A single crystal semiconductor film or a multi-crystal film is formed on a separately prepared substrate in a region different from the region surrounded by the semiconductor substrate. A signal line driver circuit 4003 formed of a crystalline semiconductor film is mounted on the semiconductor device. In FIG. 4(C), a signal line driver circuit 4003 and a scanning line driver circuit 400 Various signals and potentials applied to the pixel portion 4002 are supplied from an FPC 4018. There are.

[0220] In addition, in FIG. 4B and FIG. 4C, a signal line driver circuit 4003 is formed separately. In the illustrated example, the scanning line driver is mounted on a single substrate 4001, but the present invention is not limited to this configuration. Alternatively, a driving circuit may be formed separately and mounted, or a part of a signal line driving circuit or a part of a scanning line driving circuit may be mounted. Alternatively, only the portion may be formed separately and mounted.

[0221] The method of connecting the separately formed drive circuit is not particularly limited, and may be any of the following: ip On Glass) method, wire bonding method, or TAB (Tape A The C utomated Bonding method can be used. This is an example in which a signal line driver circuit 4003 and a scanning line driver circuit 4004 are implemented by the OG method. FIG. 4B shows an example in which a signal line driver circuit 4003 is mounted by the COG method, and FIG. 4003) is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0222] The display device includes a panel in which a display element is sealed, and a controller for the panel. and modules in which ICs, etc., including the above, are mounted.

[0223] In this specification, the term "display device" refers to an image display device, a display device, or an optical This refers to the source of light (including lighting equipment).

[0224] Also, connectors such as FPC or TAB tape or TCP are attached. Module, a module with a printed wiring board attached to the end of TAB tape or TCP, or All modules in which IC (integrated circuit) is directly mounted on the display element using the COG method are also included in the display device. This is included in the location.

[0225] The pixel portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor described in any one of Embodiments 1 to 3 can be used.

[0226] Examples of display elements provided in the display device include liquid crystal elements (also called liquid crystal display elements), light-emitting elements ( A light-emitting element that emits light by applying a current or a voltage can be used. This category includes elements whose intensity can be controlled, specifically inorganic EL (Electro L uminescence, organic electroluminescence, etc. Also, electronic ink, etc. A display medium in which the contrast changes depending on the light can also be applied.

[0227] Further, one embodiment of a semiconductor device will be described with reference to FIGS. ) corresponds to a cross-sectional view at MN.

[0228] As shown in FIG. 4 and FIG. 6, the semiconductor device has a connection terminal electrode 4015 and a terminal electrode 4016. The connection terminal electrodes 4015 and the terminal electrodes 4016 are connected to an FPC 4018 (FPC 40 18a, 4018b) and the terminals of the anisotropic conductive film 4019 are electrically connected to each other. is.

[0229] The connection terminal electrode 4015 is formed from the same conductive film as the first electrode layer 4030. 016 is formed of the same conductive film as the gate electrode layers of the transistors 4010 and 4011. do.

[0230] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. The pixel portion 4002 includes a transistor 40. 10 and a transistor 4011 included in the scan line driver circuit 4004. In FIG. 6(A), an insulating film 4020 is provided over transistors 4010 and 4011. In (B), an insulating film 4021 is further provided.

[0231] The transistors 4010 and 4011 may be the transistors described in any one of Embodiments 1 to 3. In this embodiment, the transistor shown in the first embodiment can be applied. 440. An example of applying a transistor obtained by a similar structure and manufacturing method to the transistor 440 will be described.

[0232] A transistor having a structure and a manufacturing method similar to that of the transistor 440 described in Embodiment 1. The gate electrodes 4010 and 4011 are formed by depositing a source electrode layer and a drain electrode layer on an oxide semiconductor film. Remove residues present on and near the surface between the source and drain electrode layers The residue removal step is carried out by treating with water or an alkaline solution, or by spraying with a spray bottle. This can be done by plasma treatment. For example, treatment with water or TMAH solution, or The plasma treatment is carried out using oxygen, dinitrogen monoxide, or a rare gas (typically argon). Alternatively, a treatment using dilute hydrofluoric acid may be performed.

[0233] In addition, as described in the second embodiment, after the gate electrode layer is formed, the surface of the gate electrode layer and the vicinity thereof are A process for removing residues resulting from the etching process in the process may be performed. After the gate electrode layer is formed as shown in 3, the residues on the surface of the gate electrode layer and its vicinity are removed. After forming the source electrode layer and the drain electrode layer, the oxide semiconductor film surface and and removing any residue in the vicinity thereof.

[0234] Since the surface of the oxide semiconductor film and its vicinity are prevented from being contaminated by residues, The impurities ( Typically, halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or Carbon) surface density is 1×10 13 atoms / cm 2 Less than or equal to 1×10 12 ato ms / cm 2 Note that etching on the surface of the oxide semiconductor film can be performed as follows. Process-induced impurities (typically halogens (e.g., chlorine, fluorine), boron, phosphorus, arsenic, etc.) 5×10 concentration of 18 atoms / cm 3 Less than or equal to 1 ×10 18 atoms / cm 3 (see below).

[0235] Therefore, the stable electrical characteristics using the oxide semiconductor film of this embodiment shown in FIGS. A semiconductor device having high reliability as a semiconductor device including transistors 4010 and 4011 having the above structure. Moreover, it is possible to provide such a highly reliable semiconductor device with a high manufacturing yield. This can improve productivity.

[0236] In addition, the oxide semiconductor film of the driver circuit transistor 4011 overlaps with a channel formation region of the oxide semiconductor film. A conductive layer may be further provided at a position overlapping with a channel formation region of the oxide semiconductor film. By placing it at a position where The amount of change in the threshold voltage of the transistor 4011 can be further reduced. The potential of the gate electrode layer of the transistor 4011 may be the same as or different from that of the gate electrode layer of the transistor 4011. The conductive layer may also function as a second gate electrode layer. V, or may be floating.

[0237] The conductive layer also shields the external electric field, i.e., prevents the external electric field from reaching the internal (including the transistor) It also has a function (particularly an electrostatic shielding function against static electricity) to prevent the electrical resistance of the device from acting on other components (including the circuitry). The shielding function of the conductive layer prevents the transistor from being electrically damaged by external electric fields such as static electricity. Fluctuations in characteristics can be prevented.

[0238] The transistor 4010 provided in the pixel portion 4002 is electrically connected to a display element. The display element is not particularly limited as long as it can display an image. can be used.

[0239] FIG. 6(A) shows an example of a liquid crystal display device using a liquid crystal element as a display element. In the liquid crystal element 4013 which is a display element, a first electrode layer 4030 and a second electrode layer 403 1, and a liquid crystal layer 4008. The liquid crystal layer 4008 is sandwiched between two layers functioning as alignment films. The second electrode layer 4031 is formed on the second substrate. The first electrode layer 4030 and the second electrode layer 4031 are disposed on the liquid crystal layer 400 The structure is such that the layers are stacked via 8.

[0240] The spacer 4035 is a columnar spacer obtained by selectively etching an insulating film. and is provided to control the thickness (cell gap) of the liquid crystal layer 4008. Spherical spacers may also be used.

[0241] When liquid crystal elements are used as display elements, thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, etc. Liquid crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. Depending on the conditions, the liquid crystal material (liquid crystal composition) can be in a cholesteric phase, a smectic phase, or a cubic phase. The phases shown are biaxial, chiral nematic, isotropic, etc.

[0242] In addition, the liquid crystal layer 4008 may be made of a liquid crystal composition that exhibits a blue phase without using an alignment film. In this case, the liquid crystal layer 4008, the first electrode layer 4030, and the second electrode layer 4031 are The blue phase is one of the liquid crystal phases, and when the temperature of the cholesteric liquid crystal is increased, The blue phase is the phase that appears just before the transition from the cholesteric phase to the isotropic phase. It can be expressed by using a liquid crystal composition in which a chiral agent and a blue colorant are mixed. In order to expand the temperature range in which the blue phase appears, a polymerizable monomer is added to the liquid crystal composition that exhibits the blue phase. A polymerization initiator may also be added to perform a polymer stabilization process to form a liquid crystal layer. A liquid crystal composition that exhibits a blue phase has a short response time and is optically isotropic, so that No alignment treatment is required, and viewing angle dependency is small. This eliminates the need for rubbing, preventing electrostatic damage caused by rubbing. This makes it possible to reduce defects and damage to the liquid crystal display device during the manufacturing process. The productivity of the display device can be improved. Static electricity can cause the electrical characteristics of transistors to fluctuate significantly and deviate from the design range. Therefore, there is a risk that a blue light may be emitted from a liquid crystal display device including a transistor using an oxide semiconductor film. It is more effective to use a liquid crystal composition which exhibits a phase.

[0243] The specific resistance of the liquid crystal material is 1×10 9 Ω cm or more, preferably 1×10 11 Ω cm or more, and more preferably 1×10 12 In addition, this specification The resistivity values ​​stated herein are those measured at 20°C.

[0244] The size of the storage capacitor provided in the liquid crystal display device is determined by the lead of the transistor arranged in the pixel portion. The capacitance is set so that the charge can be held for a predetermined period of time, taking into account factors such as the capacitance of the capacitor. The size of the oxide film may be set in consideration of the off-state current of the transistor. By using a transistor having a semiconductor film, the liquid crystal capacitance of each pixel is It is sufficient to provide a storage volume having a size of 1 / 3 or less, preferably 1 / 5 or less, of the capacity of the do.

[0245] The transistor including the oxide semiconductor film disclosed in this specification has a current value in an off state ( Therefore, the retention time of electric signals such as image signals can be controlled to be low. The write interval can be set to a longer value when the power is on. This reduces the frequency of flash operations, thereby reducing power consumption.

[0246] In addition, a transistor including an oxide semiconductor film disclosed in this specification has a relatively high field effect For example, a transistor capable of such high speed operation can be used. By using the transistor in a liquid crystal display device, the switching transistor in the pixel portion and the driving transistor The driver transistors used in the circuit section can be formed on the same substrate. In other words, it is necessary to use a semiconductor device formed from a silicon wafer or the like as a separate driving circuit. Therefore, the number of components in the semiconductor device can be reduced. By using a transistor capable of high speed driving, a high quality image can be provided.

[0247] There are two types of LCD displays: TN (Twisted Nematic) and IPS (In-P lane-Switching) mode, FFS (Fringe Field Switching) mode ching) mode, ASM(Axially Symmetric aligned) Micro-cell mode, OCB (Optical Compensated B) irefringence mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0248] In addition, normally black type liquid crystal display devices, such as those using a vertical alignment (VA) mode, The liquid crystal display device may be a transmission type liquid crystal display device. There are several types of vertical alignment modes, including: For example, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode , ASV (Advanced Super View) mode, etc. can be used. The present invention can also be applied to VA type liquid crystal display devices. VA type liquid crystal display devices are: It is a type of method for controlling the arrangement of liquid crystal molecules in a liquid crystal display panel. VA type liquid crystal display devices are When no voltage is applied, the liquid crystal molecules are oriented vertically to the panel surface. In addition, a pixel is divided into several regions (subpixels), each of which is oriented in a different direction. This is called multi-domain or multi-domain design, which is designed to defeat molecules in a complex manner. The following method can be used.

[0249] In addition, in display devices, they are used as black matrices (light-shielding layers), polarizing members, phase difference members, reflectors, etc. Optical members (optical substrates) such as a prevention member are provided as appropriate. For example, a polarizing substrate and a retardation substrate Alternatively, a backlight or a sidelight may be used as the light source. It's fine.

[0250] The display method in the pixel section uses the progressive method, interlace method, etc. In addition, the color elements controlled by pixels when displaying colors are RGB (R is The color is not limited to the three colors red, green, and blue. For example, RGBW (W stands for white). , or RGB plus one or more colors such as yellow, cyan, magenta, etc. The size of the display area may be different for each dot of the color element. The present invention is not limited to color display devices, but is applicable to monochrome display devices. It is also possible.

[0251] In addition, a light-emitting element that utilizes electroluminescence is used as a display element included in the display device. The light-emitting element utilizing electroluminescence is made of a light-emitting material They are classified according to whether they are organic or inorganic compounds. Generally, the former are called organic E The latter is called an inorganic EL element.

[0252] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into layers containing light-emitting organic compounds, causing a current to flow. The rears (electrons and holes) recombine to form an excited state in the light-emitting organic compound. When the excited state returns to the ground state, light is emitted. Such a light-emitting element is called a current-excitation type light-emitting element. An example using an organic EL element is shown below.

[0253] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements according to their element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor reaction that utilizes the donor and acceptor levels. Thin-film inorganic EL elements are made by sandwiching a light-emitting layer between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0254] In order to extract light emitted from the light-emitting element, at least one of the pair of electrodes needs to be light-transmitting. Then, a transistor and a light emitting element are formed on the substrate, and light is emitted from the surface opposite the substrate. The top emission is from the top surface, the bottom emission is from the surface on the substrate side, and the bottom emission is from the surface on the substrate side and the opposite side to the substrate. There are light emitting devices with a double-sided emission structure that emits light from both sides, and light emitting devices of any emission structure can be used. It is possible.

[0255] 5(A), (B) and 6(B) show examples of light-emitting devices using light-emitting elements as display elements. .

[0256] FIG. 5A is a plan view of the light emitting device, and dashed lines V1-W1 and V2-W2 in FIG. , and the cross section taken along V3-W3 corresponds to FIG. 5(B). 1, the electroluminescent layer 542 and the second electrode layer 543 are omitted and are not shown.

[0257] The light emitting device shown in FIG. 5 includes a transistor 510, a capacitor element 520, a wiring layer 530, and a capacitor element 540 disposed on a substrate 500. The transistor 510 has an intersection 530 and is electrically connected to a light emitting element 540. 5 shows a bottom emission type in which light from the light emitting element 540 is extracted through the substrate 500. The light emitting device has the following structure.

[0258] The transistor 510 may be any of the transistors described in Embodiments 1 to 3. In this embodiment, the same transistor as the transistor 440 described in Embodiment 1 can be used. An example of application of a transistor obtained by a different structure and manufacturing method will be described.

[0259] The transistor 510 includes gate electrode layers 511a and 511b, a gate insulating film 502, and an oxide semiconductor layer. A conductive film 512, conductive layers 513a and 513b functioning as a source electrode layer and a drain electrode layer, Includes b.

[0260] A transistor having a structure and a manufacturing method similar to that of the transistor 440 described in Embodiment 1. The gate 510 includes conductive layers 513a and 513b which function as a source electrode layer and a drain electrode layer. After forming the oxide semiconductor film 512, the source electrode layer and the drain electrode layer on the surface of the oxide semiconductor film 512 and in the vicinity of the source electrode layer and the drain electrode layer are A process for removing residues present between the conductive layers 513a and 513b which function as electrode layers is carried out. The residue removal process is carried out by treatment with water or an alkaline solution, or by plasma treatment. For example, treatment with water or TMAH solution or with oxygen, monoacid Plasma treatment using dinitrogen fluoride or a rare gas (typically argon) is preferably used. Alternatively, a treatment using dilute hydrofluoric acid may be performed.

[0261] As shown in the second embodiment, after the gate electrode layers 511a and 511b are formed, the gate electrode Remove any residues from the etching process on or near the surfaces of layers 511a and 511b. In addition, as shown in Embodiment 3, the gate electrode layers 511a and 511 After the formation of the gate electrode layers 511a and 511b, a process for removing residues on the surfaces and in the vicinity of the gate electrode layers 511a and 511b is performed. After the conductive layers 513a and 513b are formed, the surface of the oxide semiconductor film 512 and its vicinity are A step of removing the residue in the step may be carried out.

[0262] Since the surface of the oxide semiconductor film 512 and its vicinity can be prevented from being contaminated by residues, The transistor 510 is formed by removing impurities ( Typically, halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or Carbon) surface density is 1×10 13 atoms / cm 2 Less than or equal to 1×10 12 ato ms / cm 2 Note that the edge of the surface of the oxide semiconductor film 512 can be Impurities resulting from the annealing process (typically halogens (e.g., chlorine, fluorine), boron, phosphorus, etc.) , aluminum, iron, or carbon) to a concentration of 5×10 18 atoms / cm 3 Below (preferred 1×10 18 atoms / cm 3 (see below).

[0263] Therefore, the oxide semiconductor film 512 of this embodiment shown in FIG. 5 has stable electrical characteristics. To provide a highly reliable semiconductor device including a transistor 510 for implementing the present invention. In addition, it is possible to manufacture such a highly reliable semiconductor device with a high yield and improve productivity. It can be raised.

[0264] The capacitor element 520 includes conductive layers 521a and 521b, a gate insulating film 502, and an oxide semiconductor film 5 22, the conductive layer 523 is included, and the conductive layers 521a, 521b and the conductive layer 523 form a gate insulator. A capacitor is formed by sandwiching the film 502 and the oxide semiconductor film 522.

[0265] The wiring layer intersection 530 is an intersection between the gate electrode layers 511a and 511b and the conductive layer 533. The gate electrode layers 511a and 511b and the conductive layer 533 are provided with a gate insulating film 502 therebetween. Intersect via.

[0266] In this embodiment, the gate electrode layer 511a and the conductive layer 521a are formed to a thickness of 30 nm. A titanium film having a thickness of 200 nm was used as the gate electrode layer 511b and the conductive layer 521b. Therefore, the gate electrode layer has a laminated structure of a titanium film and a copper thin film.

[0267] The oxide semiconductor films 512 and 522 are IGZO films with a thickness of 25 nm.

[0268] An interlayer insulating film 504 is formed on the transistor 510, the capacitor element 520, and the wiring layer intersection 530. A color filter is formed on the interlayer insulating film 504 in a region overlapping the light emitting element 540. A flat insulating film 504 is provided on the interlayer insulating film 504 and the color filter layer 505. An insulating film 506 that functions as a photo-insulating film is provided.

[0269] A first electrode layer 541, an electroluminescent layer 542, and a second electrode layer 543 are stacked in this order on an insulating film 506. A light emitting element 540 including a stacked structure is provided. 510 is an opening formed in the insulating film 506 and the interlayer insulating film 504 that reaches the conductive layer 513a. At this point, the first electrode layer 541 and the conductive layer 513a are electrically connected by contacting each other. A partition wall 507 is provided so as to cover a part of the first electrode layer 541 and the opening. It is being done.

[0270] The interlayer insulating film 504 is formed by a plasma CVD method using an oxide film having a thickness of 200 nm to 600 nm. The insulating film 506 may be a silicon nitride film. The photosensitive acrylic film is used for the partition wall 507, and the photosensitive polyimide film is used for the partition wall 507. This can be done.

[0271] The color filter layer 505 may be made of, for example, a transparent resin having a chromatic color. As the colored light-transmitting resin, a photosensitive or non-photosensitive organic resin can be used. By using a functional organic resin layer, the number of resist masks can be reduced, simplifying the process. And preferable.

[0272] Chromatic colors are colors other than achromatic colors such as black, gray, and white. The color filter layer is a colored It is made of materials that transmit only colored light. The chromatic colors used are red, green, and blue. Also, cyan, magenta, yellow, etc. may be used. The color filter layer transmits only light of the selected chromatic color. The color filter layer has a peak at the wavelength of light of It is advisable to appropriately control the film thickness to an optimum value, taking into consideration the relationship between the concentration of the color and the light transmittance. The thickness of the filter layer 505 may be set to 1500 nm or more and 2000 nm or less.

[0273] In the light-emitting device shown in FIG. 6B, a light-emitting element 4513 which is a display element is a pixel portion 40 The light-emitting element 4513 is electrically connected to the transistor 4010 provided in the light-emitting element 4513. The structure is a laminated structure of a first electrode layer 4030, an electroluminescent layer 4511, and a second electrode layer 4031. However, it is not limited to the configuration shown in the figure. In addition, the structure of the light-emitting element 4513 can be changed as appropriate.

[0274] The partitions 4510 and 507 are formed using an organic insulating material or an inorganic insulating material. An opening is formed on the first electrode layer 4030, 541 using a resin material having a high conductivity. It is preferable that the side wall is formed to have an inclined surface having a continuous curvature.

[0275] The electroluminescent layers 4511 and 542 may be formed of a single layer or a plurality of layers may be laminated. Either structure may be used.

[0276] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light emitting elements 4513 and 540, A protective film may be formed over the second electrode layers 4031 and 543 and the partition walls 4510 and 507. The protective film can be a silicon nitride film, a silicon oxynitride film, a DLC film, etc. do.

[0277] In addition, to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light emitting elements 4513 and 540, Alternatively, a layer containing an organic compound may be formed by deposition to cover the light emitting elements 4513 and 540. .

[0278] In addition, the first substrate 4001, the second substrate 4006, and the sealing material 4005 are sealed. The space is filled with a filler 4514 and sealed. Protective films with high airtightness and low outgassing (lamination films, UV curing resins) It is preferable to package (enclose) the product in a film or a cover material.

[0279] Filler 4514 can be inert gas such as nitrogen or argon, or ultraviolet curing resin or Thermosetting resins can be used, including PVC (polyvinyl chloride), acrylic, and polyimide. resin, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene For example, nitrogen may be used as a filler.

[0280] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0281] It is also possible to provide electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display (electrophoretic display) and is a paper-based display. It is possible to make a display that is as easy to read as a regular display, consumes less power than other displays, and is thinner and lighter in size. This has the advantage that

[0282] The electrophoretic display device may have various forms, but it has a first particle having a positive charge and The microcapsules containing the negatively charged second particles are dispersed in a solvent or solute. By applying an electric field to the microcapsules, The particles in the filter are moved in opposite directions to display only the color of the particles that have gathered on one side. In addition, the first particles or the second particles contain a dye and do not move in the absence of an electric field. In addition, the color of the first particles and the color of the second particles are different (including colorless). do.

[0283] In this way, the electrophoretic display device is a so-called This is a display that utilizes the dielectrophoretic effect.

[0284] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. A color display is also possible by using a color filter or particles having a pigment.

[0285] The first particles and the second particles in the microcapsules are made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from the group consisting of magnetochromic material, magnetophoretic material, and a composite material thereof is used. That's good.

[0286] In addition, display devices using the twist ball display method can also be used as electronic paper. The twist ball display method uses spherical particles painted in black and white on the display element. The electrode layer is disposed between the first electrode layer and the second electrode layer, which are the electrode layers to be used. This method creates a potential difference between the electrode layers to control the orientation of the spherical particles, thereby displaying information. be.

[0287] In addition, in FIG. 4 to FIG. 6, the first substrate 4001, 500 and the second substrate 4006 are In addition to a glass substrate, a substrate having flexibility can also be used. For example, a transparent plate As for plastic, FRP (Fiber Reinforced Plastic) can be used. Glass-Reinforced Plastics, PVF (Polyvinyl Fluoro) A resin film, polyester film or acrylic resin film can be used. If light transmission is not required, a metal substrate such as aluminum or stainless steel (metal frame) can be used. For example, aluminum foil may be covered with a PVF film or polyester film. A sheet having a structure sandwiched between films can also be used.

[0288] In this embodiment, an aluminum oxide film is used as the insulating film 4020. The film can be formed by sputtering or plasma CVD.

[0289] The aluminum oxide film provided as the insulating film 4020 over the oxide semiconductor film is resistant to hydrogen, moisture, and the like. The membrane has a high blocking effect against both impurities such as urea and oxygen. stomach.

[0290] Therefore, the aluminum oxide film is free from hydrogen, which is a variable factor during and after the manufacturing process. The intrusion of impurities such as moisture into the oxide semiconductor film and the intrusion of the oxide semiconductor into the main component material The oxide semiconductor film functions as a protective film for preventing release of oxygen from the oxide semiconductor film.

[0291] The insulating films 4021 and 506 functioning as planarizing insulating films are made of acrylic resin, polyimide, Heat-resistant organic materials such as benzene, benzocyclobutene resins, polyamide resins, and epoxy. In addition to the above organic materials, low-k materials, Siloxane resin, PSG (phosphosilicate glass), BPSG (borophosphorus glass), etc. In addition, by stacking multiple insulating films made of these materials, An insulating film may be formed.

[0292] The method for forming the insulating films 4021 and 506 is not particularly limited. coating method, SOG method, spin coating, dip coating, spray coating, droplet ejection method (inkjet printing method (screen printing, offset printing, etc.), doctor knife, roll coater A coater, curtain coater, knife coater, etc. can be used.

[0293] A display device transmits light from a light source or a display element to display an image. All thin films such as the substrate, insulating film, and conductive film installed in the part are designed to be transparent to light in the visible light wavelength range. It shall be translucent.

[0294] A first electrode layer and a second electrode layer (a pixel electrode layer, a common electrode layer, a pair of electrodes) for applying a voltage to the display element In the case of the electrode layer, the direction of the light to be extracted, the location of the electrode layer, and The light transmitting property or the light reflecting property can be selected depending on the pattern structure of the electrode layer.

[0295] The first electrode layer 4030, 541 and the second electrode layer 4031, 543 are made of tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter (denoted as ITO), indium zinc oxide, and indium tin oxide doped with silicon oxide. A light-transmitting conductive material such as graphene can be used.

[0296] The first electrode layers 4030 and 541 and the second electrode layers 4031 and 543 are made of tungsten ( W), Molybdenum (Mo), Zirconium (Zr), Hafnium (Hf), Vanadium ( V), Niobium (Nb), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel Ni, titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver ( Using one or more of the following metals: Ag, their alloys, or their metal nitrides. It can be formed.

[0297] In this embodiment, since the light emitting device shown in FIG. 5 is a bottom emission type, the first electrode layer 541 The first electrode layer 541 has a light-transmitting property, and the second electrode layer 543 has a reflective property. In the case of using a conductive film, the thickness of the film is thin enough to maintain the light-transmitting property, and the conductive film having the light-transmitting property is used as the second electrode layer 543. In the case of using a conductive film, a conductive film having reflectivity may be laminated.

[0298] The first electrode layers 4030 and 541 and the second electrode layers 4031 and 543 are made of highly conductive The conductive composition may be formed using conductive molecules (also called conductive polymers). As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, , polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives derivatives, or copolymers of two or more of aniline, pyrrole and thiophene, or their derivatives.

[0299] In addition, since transistors are easily damaged by static electricity, etc., a protection circuit for protecting the driver circuit is also required. It is preferable that the protection circuit is configured using a non-linear element.

[0300] As described above, by using the transistor described in any of Embodiments 1 to 3, various It is possible to provide semiconductor devices having various functions.

[0301] The structures, methods, and the like described in this embodiment may be combined as appropriate with the structures, methods, and the like described in other embodiments. They can be used in combination.

[0302] (Embodiment 5) Information on an object is read using the transistor described in any one of the first to third embodiments. A semiconductor device having an image sensor function can be manufactured.

[0303] FIG. 7A shows an example of a semiconductor device having an image sensor function. FIG. 7(B) is a cross-sectional view showing a part of the photosensor.

[0304] The photodiode 602 has one electrode connected to a photodiode reset signal line 658 and the other One electrode of the transistor 640 is electrically connected to the gate of the transistor 640. One of the source or drain is connected to the photosensor reference signal line 672, and the other of the source or drain is connected to the photosensor reference signal line 672. The other terminal is electrically connected to one of the source and drain terminals of the transistor 656. The transistor 656 has a gate connected to a gate signal line 659 and a source or drain connected to a photodiode. The sensor output signal line 671 is electrically connected to the sensor output signal line 671.

[0305] Note that in the circuit diagrams in this specification, a transistor including an oxide semiconductor film is not clearly shown. To make it easy to understand, the symbol for a transistor using an oxide semiconductor film is marked with “OS.” In FIG. 7A, a transistor 640 and a transistor 656 are the same as those in the first embodiment. A transistor including an oxide semiconductor film, to which any one of the transistors described in the above to 3 can be applied. In this embodiment, a transistor having a structure similar to that of the transistor 440 described in Embodiment 1 and An example of application of a transistor obtained by the manufacturing method will be described.

[0306] FIG. 7B shows a photodiode 602 and a transistor 640 in the photosensor. 6 is a cross-sectional view showing a TFT substrate 601 having an insulating surface, on which a TFT substrate 602 is formed. A photodiode 602 and a transistor 640 are provided. A substrate 613 is provided on the board 602 and the transistor 640 using an adhesive layer 608. do.

[0307] An insulating film 631, an interlayer insulating film 633, and an interlayer insulating film 634 are provided on the transistor 640. The photodiode 602 is provided on the interlayer insulating film 633. Electrode layers 641a and 641b formed on the interlayer insulating film 634 and an electrode layer 6 42, a first semiconductor film 606a and a second semiconductor film 606 are formed between the first semiconductor film 606a and the second semiconductor film 606b in this order from the interlayer insulating film 633 side. b, and a third semiconductor film 606c.

[0308] The electrode layer 641b is electrically connected to the conductive layer 643 formed on the interlayer insulating film 634. The layer 642 is electrically connected to the conductive layer 645 via the electrode layer 641a. is electrically connected to the gate electrode layer of the transistor 640, and 2 is electrically connected to transistor 640.

[0309] Here, the first semiconductor film 606a is a semiconductor film having a p-type conductivity, and the second semiconductor film 606b is a high resistance semiconductor film (i-type semiconductor film), and the third semiconductor film 606c is an n-type A pin-type photodiode in which semiconductor films having different conductivity types are stacked is shown as an example.

[0310] The first semiconductor film 606a is a p-type semiconductor film, and is an amorphous silicon film containing an impurity element that imparts p-type. The first semiconductor film 606a can be formed of a silicon film. Using semiconductor material gas containing elements (e.g. boron (B)), the material is formed by plasma CVD. Silane (SiH4) can be used as the semiconductor material gas. 6, SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. After forming an amorphous silicon film that does not contain pure elements, the film is then etched by using a diffusion method or ion implantation method. An impurity element may be introduced into the amorphous silicon film by ion implantation or the like. After the impurity elements are introduced, they are heated to diffuse them. The method for forming the composite film includes LPCVD, vapor phase growth, sputtering, etc. The first semiconductor film 606a is formed to have a thickness of 10 nm to 50 nm. It is preferable to do so.

[0311] The second semiconductor film 606b is an i-type semiconductor film (intrinsic semiconductor film) and is made of an amorphous silicon film. The second semiconductor film 606b is formed by using a semiconductor material gas to form an amorphous silicon film. The silicon film is formed by plasma CVD. The semiconductor material gas is silane (SiH4). Alternatively, Si2H6, SiH2Cl2, SiHCl3, SiCl4, S The second semiconductor film 606b may be formed by LPCVD, vapor phase growth, or the like. The second semiconductor film 606b may be formed by sputtering or the like. It is preferable to form it so that the thickness is 1000 nm or less.

[0312] The third semiconductor film 606c is an n-type semiconductor film and is an amorphous film containing an impurity element that imparts n-type conductivity. The third semiconductor film 606c is formed of a silicon film. The semiconductor is formed by the plasma CVD method using a semiconductor material gas containing, for example, phosphorus (P). Silane (SiH4) may be used as the conductive material gas. Alternatively, Si2H6, SiH 2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. After forming an amorphous silicon film that does not contain silicon, the amorphous silicon is diffused or implanted into the film. An impurity element may be introduced into the film. After the impurity element is introduced by ion implantation or the like, The impurity element is preferably diffused by heating or the like. In this case, an amorphous silicon film is formed. The method for forming the film may be, for example, LPCVD, vapor phase growth, or sputtering. The third semiconductor film 606c is formed to have a thickness of 20 nm or more and 200 nm or less. is preferred.

[0313] The first semiconductor film 606a, the second semiconductor film 606b, and the third semiconductor film 606c are non- Instead of an amorphous semiconductor, a polycrystalline semiconductor may be used. Semiconductors (Semi Amorphous Semiconductor: SAS) It may be formed using

[0314] In addition, the mobility of holes generated by the photoelectric effect is smaller than that of electrons, so Photodiodes exhibit better characteristics when the p-type semiconductor film side is used as the light receiving surface. From the surface of the substrate 601 on which the in-type photodiode is formed, the photodiode 602 This example shows how the light received by the semiconductor film is converted into an electrical signal. Since light from the semiconductor film side having the pattern becomes disturbance light, the electrode layer uses a conductive film with light blocking properties. In addition, the n-type semiconductor film side can be used as the light receiving surface.

[0315] The insulating film 631, the interlayer insulating film 633, and the interlayer insulating film 634 are made of an insulating material. Depending on the material, sputtering, plasma CVD, SOG, spin coating, and die deposition are used. Spray coating, droplet ejection method (inkjet method, etc.), printing method (screen printing, The printing method may be used for forming the pattern.

[0316] The insulating film 631 may be made of an inorganic insulating material such as a silicon oxide layer, a silicon oxynitride layer, An oxide insulating film such as an aluminum oxide layer or an aluminum oxynitride layer, or a silicon nitride layer , a nitride such as a silicon oxynitride layer, an aluminum nitride layer, or an aluminum oxynitride layer. A single layer or a stacked layer of an insulating film can be used.

[0317] In this embodiment, an aluminum oxide film is used as the insulating film 631. The film can be formed by a sputtering method or a plasma CVD method.

[0318] The aluminum oxide film provided as the insulating film 631 over the oxide semiconductor film is resistant to hydrogen, moisture, and the like. High blocking effect that prevents impurities and oxygen from passing through the membrane .

[0319] Therefore, the aluminum oxide film is free from hydrogen, which is a variable factor during and after the manufacturing process. The intrusion of impurities such as moisture into the oxide semiconductor film and the intrusion of the oxide semiconductor into the main component material The oxide semiconductor film functions as a protective film for preventing release of oxygen from the oxide semiconductor film.

[0320] The interlayer insulating films 633 and 634 function as planarizing insulating films to reduce surface irregularities. The interlayer insulating films 633 and 634 are preferably made of, for example, polyimide or acrylic. Heat-resistant organic resins such as resins, benzocyclobutene-based resins, polyamides, and epoxy resins In addition to the above organic insulating materials, low-dielectric materials can be used. k materials), siloxane resin, PSG (phosphosilicate glass), BPSG (boron phosphorus A single layer or a laminate of a material such as silicate glass can be used.

[0321] By detecting the light incident on the photodiode 602, information on the detected object is read. In addition, when reading the information of the detected object, a light source such as a backlight is used. It is possible.

[0322] A transistor having a structure and a manufacturing method similar to that of the transistor 440 described in Embodiment 1. The source electrode layer and the drain electrode layer are formed, and then the oxide semiconductor film surface and the vicinity thereof are A process for removing residues present between the source electrode layer and the drain electrode layer is performed. The residue removal process is carried out by treatment with water or an alkaline solution, or by plasma treatment. For example, treatment with water or TMAH solution, or with oxygen, monoxide, Plasma treatment using dinitrogen or a rare gas (typically argon) is preferably used. Alternatively, a treatment using dilute hydrofluoric acid may be performed.

[0323] In addition, as described in the second embodiment, after the gate electrode layer is formed, the surface of the gate electrode layer and the vicinity thereof are A process for removing residues resulting from the etching process in the process may be performed. After the gate electrode layer is formed as shown in 3, the residues on the surface of the gate electrode layer and its vicinity are removed. After forming the source electrode layer and the drain electrode layer, the oxide semiconductor film surface and and removing any residue in the vicinity thereof.

[0324] Since the surface of the oxide semiconductor film and its vicinity are prevented from being contaminated by residues, The impurities (typically, Halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) Degrees 1×10 13 atoms / cm 2 Less than or equal to 1×10 12 atoms / cm 2 Note that defects on the surface of the oxide semiconductor film due to an etching process can be prevented. Pure substances (typically halogens (e.g. chlorine, fluorine), boron, phosphorus, aluminum, iron , or carbon) concentration is 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 a toms / cm 3 (see below).

[0325] Therefore, the transistor having stable electrical characteristics using the oxide semiconductor film of this embodiment can be used. It is possible to provide a highly reliable semiconductor device including the semiconductor device 640. It is possible to manufacture the semiconductor device with a high yield and improve the productivity.

[0326] The structures, methods, and the like described in this embodiment may be combined as appropriate with the structures, methods, and the like described in other embodiments. They can be used in combination.

[0327] (Embodiment 6) The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). As electronic equipment, a television set (also called a television or television receiver) (hereinafter referred to as "computer monitors"), digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, portable information terminals, audio playback devices, gaming machines (Pachinko machines, slot machines, etc.) and game cabinets. An example is shown in Figure 8.

[0328] FIG. 8A shows a table 9000 having a display unit. A display unit 9003 is incorporated in the body 9001, and images are displayed on the display unit 9003. It is possible to support the housing 9001 by four legs 9002. The housing 9001 also includes a power cord 9005 for power supply.

[0329] The semiconductor device described in any of Embodiments 1 to 5 can be used for the display portion 9003. This makes it possible to provide high reliability to electronic devices.

[0330] The display unit 9003 has a touch input function, and the display unit 9003 of the table 9000 By touching the displayed display button 9004 with a finger or the like, the screen can be operated or information can be input. It can also communicate with other home appliances or control them, making the screen The control device may be a control device that controls other home appliances by the operation. If a semiconductor device having an image sensor function as shown in FIG. 5 is used, the display unit 9003 can be touched. It can have an input function.

[0331] In addition, the screen of the display unit 9003 can be vertically supported on the floor by a hinge provided on the housing 9001. It can also be set upright and used as a television set. If you install a large screen television, the free space will be narrowed, but if you put it on a table, If the display unit is built in, the space in the room can be used more effectively.

[0332] FIG. 8B shows a television device 9100. The television device 9100 includes: A display unit 9103 is incorporated in the housing 9101, and an image is displayed on the display unit 9103. In this example, the case 9101 is supported by a stand 9105. This shows the composition of the

[0333] The television device 9100 can be operated using an operation switch provided on the housing 9101 or a separate remote control. This can be done by the remote control operation device 9110. The channel and volume can be controlled by the 9109, and the display 9103 shows In addition, the remote control unit 9110 can control the image displayed on the remote control unit 9110. A display unit 9107 for displaying information output from 9110 may be provided.

[0334] A television device 9100 shown in FIG. 8(B) includes a receiver, a modem, and the like. The vision device 9100 can receive general television broadcasts using a receiver, and further By connecting to a wired or wireless communication network via a modem, Information from sender to receiver) or bidirectional (between sender and receiver, or between receivers) It is also possible to carry out communication.

[0335] The semiconductor device described in any one of Embodiments 1 to 5 is used for the display portions 9103 and 9107. This makes it possible to provide high reliability to the television device and the remote control device. can be done.

[0336] FIG. 8C shows a computer, which includes a main body 9201, a housing 9202, a display unit 9203, and a keyboard. It includes a board 9204, an external connection port 9205, a pointing device 9206, etc.

[0337] The semiconductor device described in any of Embodiments 1 to 5 can be used for the display portion 9203. This makes it possible to provide a highly reliable computer.

[0338] Figures 9(A) and 9(B) show tablet terminals that can be folded in two. The tablet terminal is in a state where the display unit 9631a is in a housing 9630. 1b, display mode changeover switch 9034, power switch 9035, power saving mode changeover It has a replacement switch 9036 , a fastener 9033 , and an operating switch 9038 .

[0339] The semiconductor device described in any of Embodiments 1 to 5 includes a display portion 9631a and a display portion 9631b. b), making it possible to create a highly reliable tablet-type terminal.

[0340] A part of the display unit 9631a can be used as a touch panel area 9632a. By touching the operation keys 9638, data can be input. In 1a, as an example, half of the area has a display function only, and the other half The display unit 963 has a touch panel function, but is not limited to this. The entire area of ​​the display unit 96 may have a touch panel function. The entire surface of 31a is made to display keyboard buttons to make it a touch panel, and the display part 9631b is displayed It can be used as a screen.

[0341] In addition, in the display unit 9631b, as in the display unit 9631a, The area 9632b of the touch panel can be used as the keyboard of the touch panel. By touching the area where the display switch button 9639 is displayed with your finger or a stylus, A keyboard button can be displayed on the display portion 9631b.

[0342] In addition, the touch panel area 9632a and the touch panel area 9632b can be touched simultaneously. You can also input the character.

[0343] A display mode changeover switch 9034 is used to change the display orientation between portrait and landscape. You can switch between black and white and color display. The 9036 tablet device is equipped with a light sensor that detects external light during use. The display brightness can be optimized according to the amount of light. In addition, it also incorporates other detection devices such as gyros, acceleration sensors, and other sensors that detect tilt. It may be stored.

[0344] FIG. 9A shows an example in which the display area of ​​the display portion 9631b is the same as that of the display portion 9631a. However, there is no particular limitation, and one size may be different from the other size. The quality may also be different. For example, one may be a display panel that can display images with higher resolution than the other. You may do so.

[0345] FIG. 9B shows the tablet terminal in a closed state. The tablet terminal includes a housing 9630 and a solar cell 963. 3. Includes a charge / discharge control circuit 9634, a battery 9635, and a DCDC converter 9636 In addition, in FIG. 9B, a battery 9635, D A configuration having a CDC converter 9636 is shown.

[0346] In addition, since the tablet device can be folded in half, the housing 9630 can be folded when not in use. Therefore, the display portions 9631a and 9631b can be protected, and thus the durability can be improved. This makes it possible to provide a tablet terminal that is highly durable and reliable even for long-term use.

[0347] In addition, the tablet terminals shown in Figs. 9(A) and 9(B) can store various information ( Functions for displaying still images, videos, text images, etc., and for displaying calendars, dates, or times, etc. A function to display information on the display unit, and a touch input device to operate or edit the information displayed on the display unit by touch input. It has the ability to control processing by various software (programs), etc. can.

[0348] The solar cell 9633 attached to the surface of the tablet device supplies power to the touch panel, The solar cell 9633 can be provided to a display unit, a video signal processor, or the like. It can be installed on one or both sides of the body 9630 to efficiently charge the battery 9635. The battery 9635 may be a lithium-ion battery. The use of such a filter has the advantage of enabling miniaturization.

[0349] The configuration and operation of the charge / discharge control circuit 9634 shown in FIG. 9B will be described with reference to FIG. A block diagram is shown and explained. In FIG. 9(C), a solar cell 9633, a battery 9635, DC-DC converter 9636, converter 9637, switches SW1 to SW3, display unit This shows the 9631, the battery 9635, the DCDC converter 9636, The inverter 9637 and the switches SW1 to SW3 are connected to the charge / discharge control circuit 963 shown in FIG. This corresponds to 4.

[0350] First, an example of operation in which power is generated by the solar cell 9633 using external light will be described. The power generated by the solar cell is converted to a DCD voltage to charge the Battery 9635. The voltage is increased or decreased by the C converter 9636. When power is being used from the battery 9633, the switch SW1 is turned on and the converter 96 37 increases or decreases the voltage to a voltage required for the display unit 9631. When not displaying the 31, turn SW1 off and SW2 on to charge the battery 96 The configuration may be such that charging is performed at 35.

[0351] The solar cell 9633 is shown as an example of a power generating means, but is not limited thereto. Batteries using other power generation methods such as piezoelectric elements and thermoelectric conversion elements For example, the device may be configured to transmit and receive power wirelessly (contactlessly). A configuration that combines a non-contact power transmission module that charges by connecting the device to the power source and other charging methods. It is also possible to use the following.

[0352] The structures, methods, and the like described in this embodiment may be combined as appropriate with the structures, methods, and the like described in other embodiments. They can be used in combination. EXAMPLES

[0353] In this example, the results of a process for removing residues from the surface of a metal film and the surface of an oxide semiconductor film are shown. .

[0354] The sample was prepared by forming an oxide semiconductor film on a silicon substrate using In:Ga:Zn=3:1:2 [primary The sputtering method used a 50 nm thick oxide target with a molecular weight of 1.0 [atomic ratio]. The film was formed under the following film forming conditions: argon and oxygen (argon:oxygen=30sccm:15s ccm) atmosphere, the pressure was 0.4 Pa, the power supply power was 0.5 kW, and the substrate temperature was 200°C.

[0355] Next, the oxide semiconductor film is subjected to an etching process by a dry etching method (etching conditions: Etching gas (BCl3:Cl2 = 60sccm:20sccm), ICP power supply power 45 0 W, bias power 100 W, pressure 1.9 Pa) was performed to prepare sample A-1.

[0356] After the etching treatment, a water treatment was further carried out to prepare sample A-2.

[0357] After the water treatment, the IGZO film was subjected to plasma treatment using oxygen (conditions: gas (O2 = 300scc m), power supply power 1800W, pressure 66.5Pa, 3 minutes) were performed to prepare sample B-1. The IGZO film after the treatment was then plasma-treated using dinitrogen monoxide (conditions: gas (N2O=20 0sccm), power supply power 100W, power supply frequency 27MHz, pressure 40Pa, substrate temperature 35 0℃, 25 minutes) to prepare sample B-2. The IGZO film after water treatment was then treated with water (conditions: 50°C, 60 seconds) to prepare sample B-3. Then, treatment with ammonia peroxide (H2O:ammonia:hydrogen peroxide = 2:2:5) (indoor After the water treatment, the IGZO film was heated at 37°C for 10 seconds to prepare sample B-4. Zuma treatment (conditions: gas (O2 = 200sccm), power supply power 100W, power supply frequency 27M The specimen B-5 was prepared by performing the following procedure: 100 Hz, pressure 40 Pa, substrate temperature 350°C, 2 min. Samples B-1 and B-5 were plasma-treated using oxygen under different processing conditions.

[0358] Total Reflection X-ray Fluorescence By the nce analysis, the surface density of chlorine on the film surface of samples A-1, A-2, B-1 to B-5 was The measurement results are shown in Tables 1 and 2.

[0359] [Table 1]

[0360] [Table 2]

[0361] In A-1, where the residue removal process was not performed after dry etching, After dry etching, the surface density of chlorine on the surface of the IGZO film increased significantly. In A-2, which was treated with water after etching, the surface density of chlorine on the surface of the IGZO film increased. It can be seen that the load is reduced.

[0362] In addition, plasma treatment using nitrous oxide, treatment with TMAH solution, and ammonia hydrogen peroxide treatment were performed. B-1 to B-2, in which a treatment with or a plasma treatment using oxygen was performed as a residue removal step, In the case of -5, after the residue removal process, the surface density of chlorine on the surface of the IGZO film was 1×10 13 atoms / cm 2 The chlorine is removed more effectively and the increase in the surface density of chlorine is suppressed. It can be confirmed that this was the case.

[0363] Next, a metal film with a thickness of 200 nm was deposited on a glass substrate by sputtering. Tungsten (W) film (film formation conditions: Argon (80sccm) atmosphere, pressure 0.8P a, power supply power 1 kW, substrate temperature 230°C).

[0364] Next, the tungsten film is etched by dry etching (etching conditions: Etching gas (CF4:Cl2:O2=25sccm:25sccm:10sccm), ICP power supply power 500W, bias power 100W, pressure 1.0Pa) was used, and the film thickness was approximately 50 nm was etched.

[0365] After the etching treatment, a water treatment was carried out.

[0366] The tungsten film after water treatment was subjected to plasma treatment using oxygen (conditions: gas (O2 = 300 s ccm, power supply power 1800 W, pressure 66.5 Pa, 3 minutes) to prepare sample C-1. After the water treatment, the tungsten film was plasma-treated using dinitrogen monoxide (conditions: gas (N2 O = 200sccm), power supply power 100W, power supply frequency 27MHz, pressure 40Pa, substrate The tungsten film after water treatment was then treated with tungsten. Treatment with MAH solution (conditions: 50°C, 60 seconds) was performed to prepare sample C-3. The tungsten film was treated with ammonia peroxide (H2O:ammonia:hydrogen peroxide = 2:2:5) The tungsten film after water treatment was then treated with water (room temperature, 10 seconds) to prepare sample C-4. Then, plasma treatment using oxygen (conditions: gas (O2 = 200 sccm), power supply power 100 2 W, power supply frequency 27 MHz, pressure 40 Pa, substrate temperature 350 °C, 2 minutes) Samples C-1 and C-5 were prepared by plasma treatment using oxygen under different treatment conditions. This is logical.

[0367] The surface density of chlorine on the film surface of samples C-1 to C-5 was measured by total reflection X-ray fluorescence analysis. The results are shown in Table 3.

[0368] [Table 3]

[0369] After dry etching and water treatment, plasma treatment using nitrous oxide and TMAH solution were used. The residue removal process is a process using ammonia water or a plasma process using oxygen. In the cases of C-1 to C-5, after the residue removal process, the surface of the tungsten film was The surface density of chlorine in 13 atoms / cm 2 The chlorine is removed and the chlorine is removed. It can be seen that the increase in surface density was suppressed.

[0370] From the above results, water treatment, plasma treatment using nitrous oxide, and treatment using TMAH solution The residue removal process, such as ammonia / hydrogen peroxide treatment or oxygen plasma treatment, It was confirmed that the method has the effect of reducing the impurity concentration on the film surface caused by the etching process. . [Explanation of symbols]

[0371] 400 Substrates 401 Gate electrode layer 402 Gate insulating film 403 Oxide Semiconductor Film 405a Source electrode layer 405b Drain electrode layer 407 Insulating Film 420 Transistor 430 Transistor 440 Transistor 441 Conductive Film 442 Resist mask 443 Gas 445 Conductive Film 447 Gas 448a Resist mask 448b Resist mask 500 boards 502 Gate insulating film 504 Interlayer insulating film 505 Color filter layer 506 Insulating film 507 Bulkhead 510 Transistor 511a Gate electrode layer 511b Gate electrode layer 512 Oxide semiconductor film 513a conductive layer 513b Conductive layer 520 Capacitive element 521a conductive layer 521b Conductive layer 522 Oxide Semiconductor Film 523 Conductive Layer 530 Wiring layer intersection 533 Conductive Layer 540 Light emitting element 541 Electrode layer 542 Electroluminescent layer 543 Electrode layer 601 Substrate 602 Photodiode 606a Semiconductor film 606b Semiconductor film 606c Semiconductor film 608 Adhesive layer 613 Substrate 631 Insulating film 633 Interlayer insulating film 634 Interlayer insulating film 640 Transistor 641a Electrode layer 641b Electrode layer 642 Electrode layer 643 Conductive Layer 645 Conductive Layer 656 Transistor 658 Photodiode reset signal line 659 Gate signal line 671 Photo sensor output signal line 672 Photosensor reference signal line 4001 Board 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 Substrate 4008 Liquid crystal layer 4010 Transistor 4011 Transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4018a FPC 4018b FPC 4019 Anisotropic conductive film 4020 Insulating film 4021 Insulating film 4030 Electrode layer 4031 Electrode layer 4032 Insulating film 4033 Insulating film 4035 Spacer 4510 Bulkhead 4511 Electroluminescent layer 4513 Light emitting element 4514 Filling material 9000 Table 9001 Case 9002 Legs 9003 Display section 9004 Display button 9005 Power Cord 9033 Fastener 9034 Switch 9035 Power Switch 9036 Switch 9038 Operation switch 9100 Television equipment 9101 Case 9103 Display section 9105 Stand 9107 Display section 9109 Operation key 9110 Remote control device 9201 Main unit 9202 Case 9203 Display section 9204 Keyboard 9205 External connection port 9206 Pointing Device 9630 Case 9631 Display section 9631a Display section 9631b Display section 9632a area 9632b area 9633 Solar Cells 9634 Charge / discharge control circuit 9635 Battery 9636 DC-DC Converter 9637 Converter 9638 Operation key 9639 Button

Claims

1. A display device including a transistor and a capacitor electrically connected to the transistor in each pixel, In a plan view of the one pixel, a first conductive layer having a function as a gate electrode of the transistor; a second conductive layer having the same material as the first conductive layer and functioning as one electrode of the capacitor; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; an oxide semiconductor layer having a region overlapping with the first conductive layer and including a channel formation region of the transistor; a third conductive layer having a region located over the oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the transistor; a fourth conductive layer having a region located over the oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode of the transistor; a fifth conductive layer having the same material as the third conductive layer and the fourth conductive layer and overlapping the second conductive layer; a sixth conductive layer having the same material as the third conductive layer and the fourth conductive layer and having an area that intersects with the first conductive layer; a second insulating layer having a region in contact with an upper surface of the third conductive layer, a region in contact with an upper surface of the fourth conductive layer, a region in contact with an upper surface of the fifth conductive layer, and a region in contact with an upper surface of the sixth conductive layer; a seventh conductive layer having a region located on the second insulating layer and functioning as a pixel electrode; the fifth conductive layer functions as the other electrode of the capacitor; A display device, wherein, in a plan view, the second conductive layer has a region extending in a first direction, and the sixth conductive layer has a region extending in the first direction.

2. A display device including a transistor and a capacitor electrically connected to the transistor in each pixel, In a plan view of the one pixel, a first conductive layer having a function as a gate electrode of the transistor; a second conductive layer having the same material as the first conductive layer and functioning as one electrode of the capacitor; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; a first oxide semiconductor layer having a region overlapping with the first conductive layer and including a channel formation region of the transistor; a second oxide semiconductor layer having a region overlapping with the second conductive layer and containing the same material as the first oxide semiconductor layer; a third conductive layer having a region located over the first oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the transistor; a fourth conductive layer having a region located over the first oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode of the transistor; a fifth conductive layer having a same material as the third conductive layer and the fourth conductive layer and having a region located above the second oxide semiconductor layer; a sixth conductive layer having the same material as the third conductive layer and the fourth conductive layer and having an area that intersects with the first conductive layer; a second insulating layer having a region in contact with an upper surface of the third conductive layer, a region in contact with an upper surface of the fourth conductive layer, a region in contact with an upper surface of the fifth conductive layer, and a region in contact with an upper surface of the sixth conductive layer; a seventh conductive layer having a region located on the second insulating layer and functioning as a pixel electrode; the fifth conductive layer functions as the other electrode of the capacitor; A display device, wherein, in a plan view, the second conductive layer has a region extending in a first direction, and the sixth conductive layer has a region extending in the first direction.

3. In claim 1 or 2, A display device, wherein, in a plan view, the first conductive layer has a region that extends in a second direction that intersects with the first direction.

Images