Semiconductor device and method for manufacturing the same

Abstract

To provide a semiconductor device and a method for manufacturing the semiconductor device in which adhesion between the polyimide film and the encapsulating resin is improved and delamination between the polyimide film and the encapsulating resin is prevented, even when polyamide resin is not used.SOLUTION: In the method for manufacturing a semiconductor device, a semiconductor element 20 is formed on a semiconductor substrate. Next, an electrode layer 21 electrically connected to the semiconductor element 20 is formed on the front surface of the semiconductor element 20. Next, a polyimide film 22 is selectively formed on the electrode layer 21. Next, unevenness 26 is formed on the surface of the polyimide film 22 by oxygen plasma ashing of irradiation with oxygen ions perpendicular to the semiconductor substrate. Next, a surface electrode film 24 is formed on the portion other than the first polyimide film 22 on the electrode layer 21.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] A power semiconductor module is a power semiconductor device that incorporates one or more power semiconductor chips, and forms part or all of a DC-AC conversion, DC-DC conversion, or AC-AC voltage / current conversion connection, and has a structure in which the power semiconductor chip is electrically insulated from the laminated substrate or metal substrate. Power semiconductor modules are used in industrial applications such as motor drive control inverters for elevators, etc. In recent years, they have also become widely used in automotive motor drive control inverters. In-vehicle inverters are required to be small and lightweight to improve fuel efficiency, and long-term reliability at high temperatures is required because they are placed near the drive motor in the engine room.

[0003] Here, in-vehicle power semiconductor modules are required to be smaller and lighter than industrial power semiconductor modules due to the constraints of installation space. In addition, as the output power density for driving the motor increases, the temperature of the semiconductor chip during operation increases, and the demand for long-term reliability during high-temperature operation is also increasing. For this reason, a power semiconductor module structure that can operate at high temperatures and has long-term reliability is required.

[0004] Fig. 11 is a cross-sectional view showing the configuration of an electrode part of a power semiconductor module having a conventional structure. As shown in Fig. 11, an AlSi (aluminum silicon) electrode 121 serving as a source electrode is provided on a semiconductor element 120 on a semiconductor substrate. The semiconductor element 120 on the semiconductor substrate is a semiconductor element having a MOS gate (insulated gate made of metal-oxide film-semiconductor) structure (element structure) formed on the semiconductor substrate.

[0005] Around the electrodes of the semiconductor element, a polyimide film (passivation film) 122 is formed on an AlSi electrode 121 as a protective film for preventing the diffusion of ions into the semiconductor element and insulating the semiconductor element. Conventionally, SiN (silicon nitride) film and inorganic materials have been used as protective films, but polyimide film, which is an organic material, is widely used. The polyimide film 122 is formed by a wet method such as a spin coating method or an inkjet method, and has the advantage that it is easier to form the polyimide film 122 than to form a film of an inorganic material.

[0006] In addition, a surface electrode film 124 made of NiP (nickel phosphorus) is provided to facilitate bonding of a lead frame wiring (not shown) to the AlSi electrode 121 with solder 125. The polyimide film 122 functions as a mask so that the plating of the surface electrode film 124 is selectively deposited on the AlSi electrode 121 when the surface electrode film 124 is formed of NiP or the like by a plating method.

[0007] Such a power semiconductor module is sealed in a case (not shown) by sealing resin 108. At this time, polyamide-based resin 128 is applied onto polyimide film 122 as an adhesive between sealing resin 108 and polyimide film 122 made of a polyimide film. Polyamide-based resin 128 ensures adhesion between the polyimide film and sealing resin 108.

[0008] In addition, a method for mounting semiconductor elements is known in which a polyimide resin layer is cured at 300 to 350°C, and then an ashing treatment is performed using oxygen plasma to form minute irregularities on the surface of the polyimide resin layer, thereby preventing deterioration of adhesion (see, for example, Patent Document 1 below).

[0009] Also, a method for manufacturing a semiconductor chip is known that adds a plasma cleaning step, a degreasing step, an acid etching step, and an electroless Ni / Au plating step including a Ni plating step and an Au plating step using a zincate method (see, for example, Patent Document 2 below). [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Japanese Patent Application Publication No. 5-166976 [Patent Document 2] Patent No. 4344560 Summary of the Invention [Problem to be solved by the invention]

[0011] Here, in order to reduce costs, a method for manufacturing a semiconductor device has been proposed that does not use polyamide resin 128. In this manufacturing method, after forming polyimide film 122 of 0.1 μm to 0.2 μm, plasma ashing is performed to remove organic matter from polyimide film 122 on AlSi electrode 121 before forming front electrode film 124, and protective tape is attached to the rear surface of semiconductor element 120 to protect the rear surface, and the protective tape is removed after front electrode film 124 is formed.

[0012] In this case, since the polyamide resin 128 is not provided between the polyimide film 122 and the sealing resin 108, the adhesive strength between the sealing resin 108 and the polyimide film 122 is reduced. This may cause peeling between the sealing resin 108 and the polyimide film 122. If peeling occurs, cracks will occur in the Al (aluminum) wire joined to the surface electrode film 124 by the solder 125 during the power cycle test, resulting in a problem of not passing the power cycle test.

[0013] In order to solve the problems associated with the conventional techniques described above, an object of the present invention is to provide a semiconductor device and a method for manufacturing a semiconductor device that can improve adhesion between a polyimide film and a sealing resin and prevent peeling between the polyimide film and the sealing resin even in the absence of a polyamide resin. [Means for solving the problem]

[0014] In order to solve the above-mentioned problems and achieve the object of the present invention, the method for manufacturing a semiconductor device according to the present invention has the following features. First, a first step is performed in which a semiconductor element is formed on a semiconductor substrate. Next, a second step is performed in which an electrode layer electrically connected to the semiconductor element is formed on the front surface of the semiconductor element. Next, a third step is performed in which a polyimide film is selectively formed on the electrode layer. Next, a fourth step is performed in which unevenness is formed on the surface of the polyimide film by oxygen plasma ashing, in which oxygen ions are irradiated perpendicularly to the semiconductor substrate. Next, 、 The above The unevenness is formed by oxygen plasma ashing. A fifth step is performed in which a surface electrode film is formed of a nickel plating film by a plating method on the portion other than the polyimide film. The surface roughness of the unevenness was reduced by the plating method. In contact with the polyimide film, Epoxy The sixth step of forming the resin is carried out.

[0015] In addition, in the method for manufacturing a semiconductor device according to the present invention, in the fourth step, the average surface roughness of the polyimide film is set to 10 nm or more and 70 nm or less.

[0016] In addition, in the method for manufacturing a semiconductor device according to the present invention, in the fourth step, an etching amount of the polyimide film is set to 0.25 μm or more and 1 μm or less.

[0017] In addition, in the method for manufacturing a semiconductor device according to the present invention, the fourth step is carried out simultaneously with plasma cleaning of the electrode layer.

[0018] In order to solve the above-mentioned problems and achieve the object of the present invention, the semiconductor device according to the present invention has the following features: The semiconductor device includes a semiconductor element provided on a semiconductor substrate, an electrode layer provided on the front surface of the semiconductor element and electrically connected to the semiconductor element, a polyimide film selectively provided on the electrode layer, a surface electrode film containing nickel provided on a portion of the electrode layer other than the polyimide film, and a surface electrode film provided in contact with the polyimide film. EpoxyThe polyimide film has an average surface roughness of: 8 nm or more and 25 nm or less.

[0019] According to the above-mentioned invention, the polyimide film is etched by oxygen plasma ashing with an etching amount of 0.25 μm or more. As a result, the surface roughness Ra of the polyimide film can be made 5 nm or more after plating. Therefore, sufficient adhesion between the polyimide film and the sealing resin can be achieved so that peeling does not occur between them.

[0020] Furthermore, since the etching of the polyimide film can be performed simultaneously with the plasma cleaning of the polyimide film, peeling between the polyimide film and the sealing resin can be prevented without increasing the number of steps. Effect of the Invention

[0021] According to the semiconductor device and the method for manufacturing the semiconductor device of the present invention, even when a polyamide-based resin is not used, it is possible to improve the adhesion between the polyimide film and the sealing resin and prevent peeling between the polyimide film and the sealing resin. [Brief description of the drawings]

[0022] [Figure 1] 1 is a cross-sectional view showing a configuration of a power semiconductor module according to an embodiment; [Diagram 2] 2 is a cross-sectional view showing a configuration of an electrode portion of a power semiconductor chip in a power semiconductor module according to an embodiment; FIG. [Diagram 3] 1 is a graph showing the relationship between polyimide surface roughness and adhesion / bulk fracture rate. [Figure 4] FIG. 2 is a perspective view showing a print test of the power semiconductor module according to the embodiment; [Diagram 5] 1 is a flowchart of a method for manufacturing a power semiconductor module according to an embodiment (part 1). [Figure 6]4 is a flowchart (part 2) of the method for manufacturing the power semiconductor module according to the embodiment. [Figure 7] 1 is a cross-sectional view (part 1) showing a state during manufacturing of an electrode portion of a power semiconductor module according to an embodiment. FIG. [Figure 8] 4 is a cross-sectional view (part 2) showing a state during manufacturing of the electrode portion of the power semiconductor module according to the embodiment. FIG. [Figure 9] FIG. 4 is a cross-sectional view (part 3) showing a state during manufacturing of the electrode portion of the power semiconductor module according to the embodiment. [Figure 10] 1 is a graph showing the relationship between the polyimide etching amount and the surface roughness Ra. [Figure 11] FIG. 1 is a cross-sectional view showing a configuration of an electrode portion of a power semiconductor module having a conventional structure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] A preferred embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail below with reference to the accompanying drawings, in which: Fig. 1 is a cross-sectional view showing the configuration of a power semiconductor module according to the embodiment.

[0024] (Embodiment) As shown in FIG. 1, a power semiconductor module 50 includes a power semiconductor chip 1, an insulating substrate 2, bonding materials 3a, 3b, and 3c, an electrode pattern 4, a metal substrate 5, lead frame wiring 6, a resin case 7, a sealing resin 8, a metal terminal 9, and a metal wire 10.

[0025] The power semiconductor chip 1 is a semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor: a MOS type field effect transistor with an insulated gate made of a three-layer structure of metal-oxide film-semiconductor), or a diode chip. The power semiconductor chip 1 may be a vertical type semiconductor element in which a main current flows in the thickness direction of the chip. An electrode pattern 4 made of a copper (Cu) plate or the like is provided on the front surface (power semiconductor chip 1 side) and the back surface (metal substrate 5 side) of an insulating substrate 2 such as a ceramic substrate that ensures insulation. Note that a substrate on which the electrode pattern 4 is provided on at least one surface of the insulating substrate 2 is referred to as a laminated substrate 12. The power semiconductor chip 1 is bonded onto the electrode pattern 4 on the front surface with a bonding material 3b such as solder. A metal substrate 5 provided with a heat dissipation fin (not shown) is bonded onto the electrode pattern 4 on the back surface with a bonding material 3c such as solder. Moreover, one end of a lead frame wiring 6 serving as wiring for electrical connection is bonded to the top surface of the power semiconductor chip 1 (the surface opposite to the surface in contact with the bonding material 3b) by a bonding material 3a such as solder. The other end of the lead frame wiring 6 is bonded to the electrode pattern 4 by a bonding material 3b.

[0026] The resin case 7 is combined with a laminated assembly in which the power semiconductor chip 1, the laminated substrate 12, and the metal substrate 5 are laminated. For example, the resin case 7 is bonded to the laminated assembly via an adhesive such as silicone. The resin case 7 is filled with a sealing resin 8 such as a hard resin such as epoxy to insulate and protect the power semiconductor chip 1 on the laminated substrate 12. In the embodiment, a hard resin such as epoxy is used as the sealing resin 8, and no lid is used. A metal wire 10 connects the power semiconductor chip 1 and the metal terminal 9. The metal terminal 9 penetrates the resin case 7 and protrudes to the outside.

[0027] FIG. 2 is a cross-sectional view showing a configuration of an electrode portion of a power semiconductor chip 1 in a power semiconductor module according to an embodiment. FIG. 2 is an enlarged view of a portion surrounded by a dotted line in FIG. 1. As shown in FIG. 2, an AlSi electrode 21 serving as an emitter electrode (when the semiconductor element 20 is an IGBT) is provided on a semiconductor element 20 (corresponding to the power semiconductor chip 1 in FIG. 1) on a semiconductor substrate. A polyimide film 22 is formed on the AlSi electrode 21. A solder 25 (corresponding to the bonding material 3a in FIG. 1) for joining a lead frame wiring 6 (see FIG. 1) is provided on a surface electrode film 24 made of NiP, and is sealed in a resin case 7 with a sealing resin 8. Also, in FIG. 2, the lead frame wiring 6 is not shown.

[0028] Here, in the embodiment, the surface of the polyimide film 22 is provided with unevenness 26 with a controlled height h. The unevenness 26 is provided in the portion where the sealing resin 8 contacts the polyimide film 22. By providing the unevenness 26 on the polyimide film 22, the sealing resin 8 enters into the unevenness 26, and the contact area between the polyimide film 22 and the sealing resin 8 increases. This increases the anchor effect between the polyimide film 22 and the sealing resin 8. The adhesion between the polyimide film 22 and the sealing resin 8 is improved, and peeling between the polyimide film 22 and the sealing resin 8 can be prevented. Here, the unevenness 26 on the surface of the polyimide film 22 can be surface roughness, and the height h can be, for example, the arithmetic mean roughness Ra of the surface of the polyimide film 22.

[0029] Fig. 3 is a graph showing the relationship between polyimide surface roughness and adhesion / bulk fracture rate. In Fig. 3, the horizontal axis shows polyimide surface roughness (Ra: arithmetic mean roughness) in units of nm. The left vertical axis shows adhesion strength in units of MPa. The right vertical axis shows bulk fracture rate in units of %. In Fig. 3, black circles show measured adhesion strength, the solid line is a straight line approximating the black circles, and white circles show measured bulk fracture rate, and the dotted line is a straight line approximating the white circles.

[0030] FIG. 3 shows the results of measuring the adhesion and bulk destruction rate of chips for which Ra was measured by measuring samples with Ra of 0 to 25 nm using an atomic force microscope (AFM) while changing the conditions of the oxygen plasma ashing process, which will be described in detail in the semiconductor device manufacturing method.

[0031] Here, the adhesion strength was measured by a pudding test. Fig. 4 is a perspective view showing a pudding test of a power semiconductor module according to an embodiment. The pudding test is a test in which a resin molded into a pudding mold is bonded onto a plate, the resin is pressed with a constant force in a lateral direction, for example, in the direction of the arrow T in Fig. 4, and the force (adhesion force) applied until the resin is removed or destroyed is measured, which indicates the adhesion (adhesion strength) between the plate and the resin. The adhesion is also indicated by the adhesion force and the adhesion force per unit area. The greater the measured force, the higher the adhesion. Here, a sample with the above Ra was used as the plate.

[0032] Next, the bulk fracture rate was evaluated by observing the fracture surface of the plate with a scanning electron microscope (SEM) after the resin had been removed or broken in the pudding test to determine whether it had undergone bulk fracture or interfacial fracture. If resin remained on the fracture surface, it was judged to have undergone bulk fracture, and if no resin remained on the fracture surface, it was judged to have undergone interfacial fracture. Interfacial fracture indicates that the adhesion was weak and the resin had been removed from the sample. On the other hand, bulk fracture indicates that the adhesion between the resin and the sample was strong and the resin had been broken without being removed, and samples with bulk fracture indicate that they had undergone strong adhesion with the resin.

[0033] In the results of FIG. 3, when Ra is low, 3 nm or less (S1 in FIG. 3), interface failure occurs, and as Ra increases, interface failure decreases and bulk failure increases. When Ra is 5 nm or more, bulk failure occurs more frequently, and when Ra is high, 8 nm or more (S2 in FIG. 3), all results are bulk failure. For this reason, in the embodiment, the average surface roughness Ra of the surface of the polyimide film 22 is set to 5 nm or more, preferably 8 nm or more, so that the average height h of the unevenness 26 of the polyimide film 22 is set to 5 nm or more, preferably 8 nm or more. This makes it possible to realize adhesion between the polyimide film 22 and the sealing resin 8 that does not cause peeling between them. In addition, in order to maintain the function of the polyimide film 22 as a protective film, the average height h of the unevenness 26 on the surface is preferably 25 nm or less.

[0034] (Method of Manufacturing a Semiconductor Device According to an Embodiment) Next, a method for manufacturing a semiconductor device according to an embodiment will be described. Fig. 5 and Fig. 6 are flowcharts of a method for manufacturing a power semiconductor module according to an embodiment. Fig. 5 is a flowchart for plating after forming a back electrode, and Fig. 6 is a flowchart for plating before a thinning step. Figs. 7 to 9 are cross-sectional views showing states during the manufacturing process of an electrode part of a power semiconductor module according to an embodiment.

[0035] First, the case of the flowchart in Fig. 5 will be described. First, as in the conventional semiconductor device manufacturing method, a surface structure is formed on a semiconductor substrate (step S11: first step). For example, if the semiconductor device is an IGBT, a drift layer and a base layer are formed on the semiconductor substrate by epitaxial growth, and an emitter region is formed on the front surface by injecting impurity ions by ion implantation. Next, a gate insulating film is selectively formed on the front surface by thermal oxidation or the like.

[0036] Next, an AlSi electrode 21 (also called a front electrode) is formed as a metal electrode electrically connected to the emitter region of the semiconductor element by, for example, a sputtering method (second process). Note that this electrode is not limited to AlSi. Next, a polyimide film 22 is selectively formed on the AlSi electrode 21 (step S12: third process). The state up to this point is shown in FIG. 7. When viewed from above, the polyimide film 22 is formed so as to surround the AlSi electrode 21 (metal electrode), and the central area of ​​the AlSi electrode 21 is exposed.

[0037] Next, the front surface of the semiconductor substrate (semiconductor wafer) is covered with a protective film (not shown) for protection, and then the semiconductor substrate is polished from the back side to thin the semiconductor substrate to the product thickness (step S13). Note that steps S12 and S13 may be reversed, and the polyimide film 22 may be formed after the semiconductor substrate is thinned.

[0038] Next, a back surface structure is formed on the semiconductor substrate (step S14). For example, if the semiconductor device is an IGBT, a collector region is formed on the back surface by injecting impurity ions by ion implantation. Next, nickel or titanium (Ti) is formed on the entire back surface of the semiconductor substrate by physical vapor deposition such as sputtering, and then annealed to form a back surface electrode (step S15). Thereafter, the protective film formed on the front surface of the semiconductor substrate is removed.

[0039] Next, plasma cleaning is performed to remove organic matter remaining on the AlSi electrode 21 and the polyimide film 22 (step S16: fourth process). The organic matter is a protective film remaining on the front surface as residue. The plasma cleaning is performed by oxygen plasma ashing, which irradiates oxygen ions 27 perpendicularly to the semiconductor substrate. The oxygen plasma ashing removes organic matter remaining on the AlSi electrode 21 and the polyimide film 22. In the embodiment, an apparatus that irradiates oxygen ions 27 perpendicularly to the semiconductor substrate is used, so that the unevenness 26 is formed on the surface of the polyimide film 22 at the same time as the plasma cleaning. Here, the plasma cleaning and the formation of the unevenness 26 are performed simultaneously, but they may be performed as separate processes.

[0040] In addition, oxygen plasma ashing does not necessarily need to be performed with 100% oxygen, and plasma ashing may be performed using a mixed gas of oxygen and 10 to 30 vol% nitrogen. In plasma ashing, for example, a frequency of about 13.56 MHz is used to generate plasma in a direction perpendicular to the semiconductor substrate, and oxygen ions 27 are irradiated onto the semiconductor substrate, so that irregularities 26 can be efficiently formed on the surface of the polyimide film 22. In order to uniformly form irregularities 26 on the polyimide surface, it is preferable to use a comb-type electrode asher in which plasma is irradiated onto the substrate surface from above. For example, the oxygen plasma ashing device is a single-wafer type, and a device with a balanced plate-type electrode is used. The state up to this point is shown in FIG. 8.

[0041] The oxygen plasma ashing according to the embodiment will be described in detail below. Fig. 10 is a graph showing the relationship between the polyimide etching amount and the surface roughness Ra. In Fig. 10, the vertical axis shows the surface roughness Ra in nm. The horizontal axis shows the polyimide (PI) etching amount in nm. In Fig. 10, in oxygen plasma ashing, the RF power was fixed at 1000 W, and the processing time was changed to prepare samples with an adjusted polyimide etching amount, and the surface roughness Ra of the prepared samples was measured.

[0042] As shown in Fig. 10, the polyimide etching amount and the surface roughness Ra are in a proportional relationship, and when the polyimide etching amount is in the range of 100 nm to 1000 nm, the surface roughness Ra is in the range of 5 nm to 25 nm. In Fig. 10, the approximation line of the measurement results is expressed as y = 0.025x - 1.1795, where x is the etching amount and y is the surface roughness Ra, and the coefficient of determination (R 2 ) is 0.9706. The surface roughness Ra in FIG. 10 is the measurement result after plating. After plating, the unevenness of the polyimide surface is reduced to 1 / 2 to 1 / 3 due to the influence of the chemicals used during plating. For this reason, the surface roughness Ra immediately after oxygen plasma ashing is within the range of 10 nm to 70 nm.

[0043] As described above, in order to improve the adhesion between the polyimide film 22 and the sealing resin 8 and to prevent peeling between the polyimide film 22 and the sealing resin 8, it is necessary to set the surface roughness Ra (average of the height h of the irregularities 26) to 5 nm or more, preferably 8 nm or more. In order to achieve a surface roughness Ra of 5 nm or more after plating, it is necessary to set the etching amount of the polyimide film 22 to 0.25 μm or more, as shown in FIG. 10. Also, in order to achieve a surface roughness Ra of 8 nm or more after plating, it is necessary to set the etching amount of the polyimide film 22 to 0.35 μm, as shown in FIG. 10.

[0044] In addition, since the surface roughness Ra is reduced to 1 / 2 to 1 / 3 after plating, in order to achieve a surface roughness of 5 nm or more after plating, the surface roughness Ra before plating must be 10 nm or more. In order to achieve a surface roughness of 8 nm or more after plating, the surface roughness Ra before plating must be 20 nm or more. In order to achieve a surface roughness of 25 nm or less after plating, the surface roughness Ra before plating must be 70 nm or less.

[0045] Here, since the thinner polyimide film 22 is, the lower the ion diffusion prevention performance and the lower the reliability, it is preferable that the etching amount is 1.0 μm or less. At this time, as shown in FIG. 10, the surface roughness Ra is 25 nm or less, and is 70 nm or less before the plating process. In this way, by adjusting the etching amount of the polyimide film 22, the surface roughness Ra after the plating process can be set to 5 nm or more and 25 nm or less, more preferably 8 nm or more and 25 nm or less.

[0046] Here, the etching amount is adjusted by adjusting the processing time, but the etching amount may also be adjusted by adjusting the RF power. For example, the RF power may be increased to increase the etching amount.

[0047] Although plasma cleaning was also performed in the conventional semiconductor device manufacturing method, the etching method used involved generating plasma in a direction parallel to the semiconductor substrate, causing oxygen ions to move in a direction parallel to the semiconductor substrate, so that the surface roughness Ra of the polyimide film 122 after plating was about 2.3 nm. As a result, the adhesion between the polyimide film 122 and the sealing resin 108 was insufficient, and peeling between the polyimide film 122 and the sealing resin 108 could not be prevented.

[0048] In contrast, in the manufacturing method of the semiconductor device according to the embodiment, the plasma cleaning is performed by oxygen plasma ashing using a comb electrode asher in which plasma is irradiated onto the substrate surface from above. As a result of performing plasma cleaning using this comb electrode asher, the surface roughness Ra of the polyimide film 22 after plating was about 9.0 nm. This resulted in sufficient adhesion between the polyimide film 22 and the sealing resin 8, and peeling between the polyimide film 22 and the sealing resin 8 could be prevented.

[0049] Next, a protective film is formed on the back surface of the semiconductor substrate to protect the back surface, and the polyimide film 22 is used as a mask to selectively form a front electrode film 24 on the AlSi electrode 21 in a portion where the polyimide film 22 is not provided, thereby forming a front electrode (step S17: fifth process). The front electrode film 24 is formed by NiP (nickel phosphorus) electroless plating or the like, but since the polyimide film 22 is an insulator and the AlSi electrode 21 is a metal, the front electrode film 24 is not deposited on the polyimide film 22 but is selectively deposited on the AlSi electrode 21. The state up to this point is shown in FIG. 9. The plating method is often used because it is inexpensive and can selectively form a thick film (1 to 10 μm) on a metal electrode. In addition, Ni or Ni alloys such as NiP (nickel phosphorus) and NiB (nickel boron) may be used, or copper, aluminum, or gold may be used. A laminated film of these may also be used. In addition, an Au plating film may be further formed on the Ni plating film. Forming an Au plating film is preferable because it can prevent the electrode portion including the Ni plating film from oxidation and also has good wettability with solder. The surface electrode film 24 is not limited to a plating film, and may be formed by sputtering. In this case, a metal mask is used to form the film on the exposed parts of the metal electrodes. Next, after removing the protective film on the back surface of the semiconductor substrate, the semiconductor substrate is diced (cut) to separate into individual chips (step S18).

[0050] Next, the power semiconductor module of Fig. 1 is assembled (step S19). The assembly method is the same as that of the power semiconductor module according to the conventional technology. For example, first, the power semiconductor chip 1 is mounted on the laminated substrate 12, and the power semiconductor chip 1 and the electrode pattern 4 provided on the insulating substrate 2 are electrically connected by the lead frame wiring 6 via the solder 25 (bonding material 3b). Next, these are bonded to the metal substrate 5 to assemble a laminated assembly consisting of the power semiconductor chip 1, the laminated substrate 12, and the metal substrate 5. A resin case 7 is bonded to this laminated assembly with a silicone-based adhesive or the like.

[0051] Next, the power semiconductor chip 1 and the metal terminal 9 are connected with a metal wire 10, and the resin case 7 is filled with a sealing resin 8 such as a hard resin such as epoxy resin. This completes the power semiconductor module according to the embodiment shown in FIG. 1. If the sealing resin 8 is not a hard resin such as epoxy resin, a lid is attached to prevent the sealing resin 8 from leaking out. As the sealing resin 8, epoxy resin, polyimide resin, polyamide resin, maleimide resin, or the like can be used as a thermosetting resin. In addition, particles such as silica or alumina can be added as a filler to adjust the linear expansion coefficient with other members. In addition, soft resins such as silicone can be used. In this manner, the power semiconductor module of FIG. 1 is completed.

[0052] Next, the case of the flowchart in Fig. 6 will be described. First, as in Fig. 5, a surface structure is formed on a semiconductor substrate (step S21: first step), an AlSi electrode 21 is formed (second step), and a polyimide film 22 is formed (step S22: third step). Next, plasma cleaning is performed on the polyimide film 22 (step S23: fourth step). The plasma cleaning conditions are the same as those in Fig. 5.

[0053] After that, a front surface electrode is formed (step S24), the semiconductor substrate is thinned to the product thickness (step S25), and a back surface electrode is formed (step S26: fifth step). After that, it is diced (step S27) and the power semiconductor module is assembled (step S28). In this manner, the power semiconductor module of FIG. 1 is completed. If there is a back surface structure, the back surface structure is formed before the thinning step of step S25.

[0054] As described above, according to the semiconductor device manufacturing method of the embodiment, the polyimide film is etched by oxygen plasma ashing with an etching amount of 0.25 μm or more. As a result, after plating, the surface roughness Ra of the polyimide film can be made 5 nm or more. This makes it possible to achieve sufficient adhesion between the polyimide film and the sealing resin to prevent peeling between them.

[0055] Furthermore, since the etching of the polyimide film can be performed simultaneously with the plasma cleaning of the polyimide film, peeling between the polyimide film and the sealing resin can be prevented without increasing the number of steps.

[0056] The present invention can be modified in various ways without departing from the spirit of the present invention, and in each of the above-mentioned embodiments, for example, the dimensions of each part and the impurity concentration are set in various ways according to the required specifications, etc. Also, in each of the above-mentioned embodiments, the semiconductor can be applied to wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) in addition to silicon (Si). [Industrial Applicability]

[0057] INDUSTRIAL APPLICABILITY As described above, the method for manufacturing a semiconductor device according to the present invention is useful for power semiconductor devices used in power conversion devices such as inverters, power supply devices for various industrial machines, igniters for automobiles, and the like. [Explanation of symbols]

[0058] 1. Power semiconductor chip 2. Insulating substrate 3a, 3b, 3c Bonding material 4 Electrode Pattern 5 Metal Substrate 6 Lead frame wiring 7 Resin case 8, 108 Sealing resin 9 Metal terminal 10 Metal Wire 12. Laminated substrate 20, 120 Semiconductor element on semiconductor substrate 21, 121 AlSi electrode 22, 122 Polyimide film 24, 124 Surface electrode film 25, 125 solder 26 Unevenness 27 Oxygen ion 50 Power Semiconductor Module 128 Polyamide resin

Claims

1. A first step of forming a semiconductor element on a semiconductor substrate; a second step of forming an electrode layer on a front surface of the semiconductor element, the electrode layer being electrically connected to the semiconductor element; a third step of selectively forming a polyimide film on the electrode layer; a fourth step of forming projections and recesses on the surface of the polyimide film by oxygen plasma ashing, which irradiates oxygen ions perpendicular to the semiconductor substrate; a fifth step of forming a surface electrode film by a plating method using a nickel plating film on a portion of the electrode layer other than the polyimide film on which the unevenness is formed by the oxygen plasma ashing; a sixth step of forming an epoxy resin so as to be in contact with the polyimide film whose surface roughness has been reduced by the plating method; 2. A method for manufacturing a semiconductor device comprising the steps of:

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein in the fourth step, the average surface roughness of the polyimide film is set to 10 nm or more and 70 nm or less.

3. 2. The method for manufacturing a semiconductor device according to claim 1, wherein in the fourth step, the amount of etching of the polyimide film is set to be 0.25 [mu]m or more and 1 [mu]m or less.

4. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the fourth step is carried out simultaneously with plasma cleaning of the electrode layer.

5. A semiconductor element provided on a semiconductor substrate; an electrode layer provided on a front surface of the semiconductor element and electrically connected to the semiconductor element; a polyimide film selectively provided on the electrode layer; a surface electrode film containing nickel provided on the electrode layer in a portion other than the polyimide film; an epoxy resin provided in contact with the polyimide film; Equipped with The semiconductor device is characterized in that the average surface roughness of the polyimide film is 8 nm or more and 25 nm or less.

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