Wafer package and method of manufacturing same

Abstract

To provide a wafer package which can be stored so as to keep cleanliness of a wafer from an external environment, and provide a manufacturing method of them.SOLUTION: A package houses a plurality of wafers. The plurality of wafers is housed in the package in a state of being contacted each other via a liquid. An inner part of the package is sealed in a deaeration state.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] This specification discloses techniques relating to wafer packages and methods for manufacturing the same. [Background technology]

[0002] In order to store the wafers in a clean state away from the external environment, a technique for wrapping the wafers in a package is known. A related technique is disclosed in Patent Document 1. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 11-204627 Summary of the Invention [Problem to be solved by the invention]

[0004] When the wafer surface is exposed to gas inside the package, contaminants in the gas are adsorbed onto the wafer surface, which can result in leakage and reduced reliability when manufacturing semiconductor devices. [Means for solving the problem]

[0005] Disclosed herein is a package containing multiple wafers, the multiple wafers being in liquid contact with one another within the package, the package being sealed with the interior evacuated.

[0006] A liquid film can be formed between a pair of wafers that are in contact with each other, with one acting as a lid for the other. Because the wafer surface can be covered with liquid, it is possible to prevent contaminants in the gas from being adsorbed onto the wafer surface. Furthermore, the inside of the package is sealed, which prevents the liquid from evaporating. Therefore, the wafer surface can be kept covered with liquid.

[0007] The liquid may be a silicon-free liquid. The liquid may be a volatile liquid. The liquid may be an alcohol-based liquid.

[0008] The surface roughness of one of a pair of wafers in contact with each other may be greater than the surface roughness of the other.

[0009] The plurality of wafers may include compound semiconductor wafers.The plurality of wafers may include GaN wafers.

[0010] The multiple wafers may include multiple first type wafers and one second type wafer. The multiple first type wafers may be stacked such that the front surface of one wafer is in contact with the back surface of the other wafer via a liquid. The second type wafer may be in contact with the front surface of the wafer located at the top of the multiple stacked first type wafers via a liquid.

[0011] This specification also discloses a method for manufacturing a wafer package. The manufacturing method includes a contacting step of contacting a plurality of wafers with each other in a liquid. The manufacturing method includes a step of housing the plurality of wafers in a package while the wafers are in contact with each other via the liquid. The manufacturing method includes a step of degassing air within the package. The manufacturing method includes a step of sealing the package while the inside of the package is degassed.

[0012] By contacting multiple wafers with each other in a liquid, a liquid film can be formed between the wafers without exposing the wafer surfaces to gas, preventing contaminants in the gas from being adsorbed onto the wafer surfaces.

[0013] The plurality of wafers may include a plurality of first type wafers and one second type wafer. The contacting step may include a step of stacking the plurality of first type wafers such that a front surface of one wafer and a back surface of the other wafer are in contact with each other via a liquid. The contacting step may include a step of contacting the second type wafer with a front surface of a wafer located at the top of the plurality of stacked first type wafers via a liquid. [Brief description of the drawings]

[0014] [Figure 1] 1 is a schematic cross-sectional view of a wafer package 1. FIG. [Diagram 2] 2 is a flow diagram illustrating a manufacturing method of the wafer package 1. FIG. [Diagram 3] 2A to 2C are schematic explanatory views illustrating a manufacturing method of the wafer package 1. [Figure 4] 2A to 2C are schematic explanatory views illustrating a manufacturing method of the wafer package 1. [Diagram 5] 2A to 2C are schematic explanatory views illustrating a manufacturing method of the wafer package 1. [Figure 6] FIG. 2 is a flow diagram illustrating a method of using the wafer package 1. [Figure 7] 1A to 1C are schematic explanatory diagrams illustrating a method of using the wafer package 1. [Figure 8] 1 is a schematic cross-sectional view of a lateral electronic device. [Figure 9] FIG. 1 is a schematic cross-sectional view of a vertical MOSFET. [Figure 10] FIG. 11 is a schematic cross-sectional view of a wafer package according to a modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] <Wafer package structure> 1 shows a schematic cross-sectional view of a wafer package 1. The wafer package 1 includes a package 2, GaN wafers 11 to 15, and a sapphire wafer 21. The package 2 is a packaging bag formed of a plastic film. The package 2 may be formed of a polyethylene layer, an aluminum film-coated polyethylene layer, or the like.

[0016] The GaN wafer 11 includes a GaN layer 11g grown by vapor phase growth on a sapphire substrate 11s. In this embodiment, the thickness of the GaN layer 11g is 3.5 micrometers. The surface of the GaN layer 11g is the surface 11a of the GaN wafer 11. The surface of the sapphire substrate 11s is the back surface 11b of the GaN wafer 11. The surface 11a is a mirror surface, and the back surface 11b is a rough surface. The structures of the GaN wafers 12 to 15 are similar to those of the GaN wafer 11, and therefore description thereof will be omitted. The sapphire wafer 21 has a surface 21a that is a mirror surface, and a back surface 21b that is a rough surface.

[0017] The GaN wafers 11-15 are stacked such that the front surface of one wafer and the back surface of the other wafer are in contact with each other via isopropyl alcohol 30. Isopropyl alcohol 30 is a volatile liquid that does not contain silicon. Hereinafter, isopropyl alcohol may be abbreviated as "IPA." The sapphire wafer 21 is in contact with the front surface 15a of the GaN wafer 15 located at the top of the stacked GaN wafers 11-15 via the IPA 30.

[0018] The GaN wafers 11-15 and the sapphire wafer 21 are housed inside the package 2 through the opening 2a. After the air inside the package 2 is evacuated through the opening 2a, the opening 2a is sealed by thermocompression bonding. As a result, the package 2 is sealed in a deaerated state.

[0019] <Siloxane contamination on the wafer surface> Siloxane is a compound whose skeleton is made up of silicon and oxygen, and is a general term for compounds that have siloxane bonds. Siloxanes are widely used in daily necessities, electronic devices, construction materials, etc., and siloxanes volatilize into the atmosphere.

[0020] GaN has a large spontaneous polarization and therefore a large surface charge. This causes the surface of a GaN wafer to adsorb siloxane from the air. The silicon in the adsorbed siloxane strongly bonds with the nitrogen in GaN, making it difficult to remove. Therefore, it is important to prevent siloxane from being adsorbed on the wafer surface. On the other hand, non-polar materials such as sapphire and silicon are electrically neutral, so they hardly adsorb siloxane from the air, or if they do adsorb it, it can be desorbed relatively easily.

[0021] <Method of Manufacturing Wafer Package 1> The method for manufacturing the wafer package 1 will be described with reference to the flow in Fig. 2 and the schematic diagrams in Fig. 3 to 5. In step S1, GaN wafers 11 to 15 are prepared. Surfaces 11a to 15a of GaN wafers 11 to 15 are exposed to the air and are therefore contaminated with siloxane.

[0022] In step S2, a process of cleaning both sides of the GaN wafers 11-15 is performed. Specifically, a wet cleaning tank is filled with a chemical solution, and the wafers are immersed in the chemical solution. In this embodiment, cleaning with a first organic solvent (acetone) and cleaning with a second organic solvent (methanol) are performed consecutively. Then, cleaning with a mixed chemical solution of KOH and H2O2 is performed. This makes it possible to reduce the siloxane concentration on the surfaces 11a-15a of the GaN wafers 11-15. In this embodiment, the siloxane concentration on the GaN wafer surfaces can be reduced to 1 / 10 or less by cleaning.

[0023] In step S3, the GaN wafers 11-15 and the sapphire wafer 21 are brought into contact with each other in the liquid IPA 30. Specifically, as shown in FIG. 3, the GaN wafers 11-15 and the sapphire wafer 21 are immersed in a tank 31 filled with IPA 30. Then, as shown in FIG. 4, the front surface of one wafer is brought into contact with the back surface of the other wafer in the IPA 30. This brings the GaN wafers 11-15 and the sapphire wafer 21 into contact with each other via the IPA 30.

[0024] In step S4, the GaN wafers 11 to 15 and the sapphire wafer 21 are removed from the tank while maintaining contact with each other via the IPA 30. Then, the wafers are housed in a package 2.

[0025] In step S5, a process is performed to evacuate the air inside the package 2. Specifically, as shown in Fig. 5, an air suction nozzle 50 is inserted into the opening 2a, and the inside of the package 2 is suctioned and exhausted. At this time, the pressure is reduced to a level that does not dry out the IPA 30 present between the wafers.

[0026] In step S6, a process of sealing the package 2 is performed while the inside of the package 2 is degassed. Specifically, as shown in Fig. 5, the opening 2a is sealed by heat and pressure bonding with a sealer 51. This allows the package 2 to be sealed while IPA 30 is present at the contact interfaces between the multiple wafers.

[0027] <How to use wafer package 1> The process will be described with reference to the flow chart in Fig. 6 and the schematic diagram in Fig. 7. In step S11, the wafer package 1 is opened in a clean atmosphere. As shown in Fig. 7, the process may be opened in a glove box 60 in which the siloxane concentration in the atmosphere is sufficiently reduced.

[0028] In step S12, the GaN wafers are removed from the package 2 and set in a semiconductor manufacturing apparatus. Specifically, as shown in Fig. 7, the topmost GaN wafer of the stacked GaN wafers is separated and set in a chamber of an epitaxial growth apparatus 61.

[0029] In step S13, processing of the GaN wafer is started. Specifically, a new GaN layer is regrown on the GaN layer using epitaxial growth apparatus 61. Note that the shorter the time from removing the GaN wafer from package 2 to starting processing, the more preferable it is. This is because this makes it possible to suppress adsorption of siloxane in the atmosphere onto the surface of the GaN wafer.

[0030] <Effects> When a GaN layer is regrown on a GaN substrate by epitaxial growth, a high concentration (e.g., 1×10 18 cm -3 The amount of silicon segregated at 1000 Å or more is due to the adsorption of siloxane, as described above. For example, in a lateral electronic device such as a HEMT 70 shown in FIG. 8, a GaN layer 72 is regrown on a GaN substrate 71. If silicon segregates at a high concentration at this regrowth interface IF1, it will cause buffer leakage. If a layer doped with C or Fe is provided to insulate the leakage, this will result in a large loss in homoepitaxial growth using a semi-insulating substrate. Also, in a vertical MOSFET 80 shown in FIG. 9, for example, n-type GaN is formed on a GaN substrate 81. - The n-GaN layer 82 is regrown. After the p-GaN layer 83 is grown, a trench is formed, and an n-GaN layer 84 is formed in the trench. - The -GaN layer 84 is then regrown. As a result, silicon is segregated at high concentrations at the regrowth interfaces IF2 and IF3, which may adversely affect reliability.

[0031] In the technology of this specification, after removing siloxane from the GaN wafer surfaces (step S2), multiple GaN wafers are brought into contact with each other in IPA 30 (step S3). This allows a film of liquid IPA 30 to be formed between the GaN wafers without exposing the clean GaN wafer surfaces to gas. In addition, one of a pair of GaN wafers in contact with each other serves as a lid for the other, so that the film of IPA 30 formed between the GaN wafers can be held by surface tension. Since the GaN wafer surfaces can be kept covered with IPA 30, it is possible to prevent siloxane in the gas from being adsorbed onto the GaN wafer surfaces.

[0032] Since the inside of the package 2 is degassed, evaporation of the IPA 30 can be suppressed. Therefore, the state in which the surface of the GaN wafer is covered with the IPA 30 can be maintained for a long period of time. The GaN wafer can be transported in a clean state without siloxane contamination and used in the next process.

[0033] A plurality of GaN wafers can be brought into contact with each other via the IPA 30. Since the surfaces of the GaN wafers do not come into direct contact with each other, it is possible to prevent the surfaces from being scratched. In addition, since it is possible to prevent the GaN wafers from adhering to each other, it is possible to easily separate the GaN wafers (step S12).

[0034] The multiple GaN wafers are stacked so that the front surface (mirror surface) of one wafer is in contact with the back surface (rough surface) of the other wafer. In other words, the surface roughness of one of the pair of wafers in contact with each other is made larger than the surface roughness of the other. This makes it possible to prevent the GaN wafers from sticking together.

[0035] When the GaN wafer is removed from the package 2 and set in the semiconductor manufacturing equipment (step S12), IPA 30 may remain on the front and back surfaces. However, since IPA 30 is volatile, it evaporates in a short time. Therefore, it is possible to proceed to the next process of the GaN wafer without performing pretreatment to remove IPA 30.

[0036] <Modification> Although the embodiments of the present invention have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples exemplified above.

[0037] The manner in which the multiple wafers are brought into contact may vary. The number of wafers brought into contact is not limited to that of the present embodiment. For example, as shown in FIG. 10, the surfaces 11a and 12a of two GaN wafers 11 and 12 may be brought into contact with each other via an IPA 30. Two GaN wafers, or one GaN wafer and one sapphire wafer, are the minimum number of wafers included in the wafer package 1.

[0038] The wafer to be brought into contact with the surface of the topmost GaN wafer is not limited to a sapphire wafer, and various wafers can be used. For example, the surface of an inverted GaN wafer may be brought into contact with the surface of the topmost GaN wafer.

[0039] The substrate of the GaN wafer (the substrate on which the GaN layer is grown) is not limited to sapphire, and various materials can be used. For example, Si, SiC, GaN, etc. may be used as the substrate. The GaN wafer may also be a free-standing GaN substrate.

[0040] The back surface of the GaN wafer or sapphire wafer is not limited to a rough surface, but may be a mirror surface. The surface to be brought into contact with the front surface (mirror surface) of the GaN wafer is not limited to a rough surface, but may be a mirror surface.

[0041] The volatile liquid placed between the wafers is not limited to IPA, but may be ethanol, methanol, etc. The liquid placed between the wafers is not limited to volatile liquid, but may be various liquids, for example, pure water.

[0042] The process of cleaning the wafer (step S2) may be various. For example, cleaning with an organic solvent alone may be performed, or cleaning with an organic solvent followed by cleaning with HCl may be performed. Also, only the wafer surface may be cleaned using a single wafer processing apparatus.

[0043] The size of the pair of wafers in contact with each other via the liquid may be different, which makes it easier to separate the wafers from each other.

[0044] The shape of the package 2 is not limited to a bag shape, but may be various shapes such as a box shape.

[0045] The wafer housed in the wafer package 1 is not limited to GaN, but may be a wafer of gallium arsenide (GaAs), indium phosphide (InP), SiC, Ga2O3, diamond, aluminum nitride (AlN), indium nitride (InN), or the like.

[0046] The wafer housed in the wafer package 1 may be a wafer on which a pattern is being formed. The next process performed on the wafer taken out of the wafer package 1 is not limited to a film growth process, and may be various processes such as pattern formation.

[0047] The technical elements described in this specification or drawings have technical utility either alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technologies illustrated in this specification or drawings can achieve multiple objectives simultaneously, and achieving one of these objectives is itself technically useful. [Explanation of symbols]

[0048] 1: Wafer package 2: Package 2a: Opening 11-15: GaN wafer 11s-15s: Sapphire substrate 11g-15g: GaN layer 21: Sapphire wafer 30: Isopropyl alcohol

Claims

1. A package containing multiple wafers, the plurality of wafers are accommodated in the package in a state of contacting each other via a liquid; The package is sealed in a degassed state. package.

2. The package of claim 1 , wherein the liquid is a silicone-free liquid.

3. 3. The package of claim 1 or 2, wherein the liquid is a volatile liquid.

4. 4. The package of claim 3, wherein the liquid is an alcohol-based liquid.

5. 5. The package according to claim 1, wherein the surface roughness of one of the pair of wafers in contact with each other is greater than the surface roughness of the other of the pair of wafers.

6. The package of any one of claims 1 to 5, wherein the plurality of wafers includes compound semiconductor wafers.

7. The package of claim 6 , wherein the plurality of wafers includes GaN wafers.

8. The plurality of wafers includes a plurality of first type wafers and one second type wafer, the plurality of first type wafers are stacked such that a front surface of one wafer and a back surface of another wafer are in contact with each other via the liquid; The package described in any one of claims 1 to 7, wherein the second type of wafer is in contact with a surface of a wafer located at the top of the plurality of stacked first type wafers via the liquid.

9. a contacting step of contacting a plurality of wafers with each other in a liquid; housing the plurality of wafers in a package in a state where the wafers are in contact with each other via a liquid; Degassing the package; sealing the package in a degassed state; A method for manufacturing a wafer package comprising:

10. The method for manufacturing a package according to claim 9, further comprising the step of cleaning at least one of both surfaces of the plurality of wafers prior to the contacting step.

11. The method for manufacturing a package according to claim 9 or 10, wherein the package is sealed in a state where a liquid is present at the contact interfaces between the plurality of wafers.

12. The method for manufacturing a package according to any one of claims 9 to 11, wherein the liquid is an alcohol-based liquid.

13. The method for manufacturing a package according to any one of claims 9 to 12, wherein the plurality of wafers includes GaN wafers.

14. The plurality of wafers includes a plurality of first type wafers and one second type wafer, The contacting step comprises: stacking the plurality of first type wafers such that a front surface of one wafer and a back surface of another wafer are in contact with each other via the liquid; bringing the second type of wafer into contact with a surface of a wafer located at the top of the plurality of stacked first type of wafers via the liquid; The method for manufacturing the package according to any one of claims 9 to 13, comprising:

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