Chip alignment device and method for semiconductor packaging

Abstract

To provide a chip array system and method for semiconductor packaging capable increasing production yield, improving price competitiveness, and preventing breakage of semiconductor chips.SOLUTION: A array system for semiconductor chip packaging 1 according to an embodiment disclosed in the present document comprises: a radioactive source for applying radiation to a plurality of semiconductor chips; the plurality of semiconductor chips vertically arranged in relation to the ground; a radiation sensor for detecting the radiation transmitted through the plurality of semiconductor chips; and an alignment section for aligning and connecting the plurality of semiconductor chips.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] SUMMARY OF THE DISCLOSURE The embodiments disclosed herein relate to an alignment apparatus and method for semiconductor chip packaging. [Background technology]

[0002] As artificial intelligence technology advances, research and development of artificial intelligence modules is ongoing. Along with this, research into miniaturizing single chips through process miniaturization, technology that can package chips with various functions to realize multi-function chips is attracting attention in the field of artificial intelligence modules.

[0003] For this reason, 2.5D / 3D integration technologies using silicon interposers, TSVs, etc. are being developed, but until now, when bonding semiconductor chips together (chip to chip bonding), the bonding position is confirmed using an optical method, and the bonding position is memorized and then bonded mechanically. Summary of the Invention [Problem to be solved by the invention]

[0004] Generally, in semiconductor processes, when aligning semiconductor chips for deposition or packaging, alignment is performed in advance using an optical method, and then the bonding accuracy is dependent on the precision of the machine. That is, before bonding the semiconductor chips, the semiconductor chips are aligned by optically checking their positions using a camera or the like, and once the alignment is completed, no further alignment is performed during the bonding process. Therefore, there is a problem that alignment errors occur due to errors caused by mechanical movement, which reduces the yield. In particular, in processes on the order of nm, even minute errors can cause defects, so a method that can improve the accuracy of alignment was needed. [Means for solving the problem]

[0005] According to an embodiment disclosed in this document, an alignment device for semiconductor chip packaging may include a radiation source that irradiates radiation onto a plurality of semiconductor chips, a plurality of semiconductor chips arranged one above the other with respect to a ground surface, a radiation sensor that detects the radiation that has passed through the plurality of semiconductor chips, and an alignment unit that aligns and joins the plurality of semiconductor chips based on detection information obtained by the radiation sensor.

[0006] According to an embodiment disclosed herein, an alignment method for semiconductor chip packaging may include the steps of irradiating radiation onto a plurality of semiconductor chips, detecting the radiation that has passed through the plurality of semiconductor chips using a radiation sensor, and aligning and bonding the plurality of semiconductor chips based on detection information obtained by the radiation sensor. Effect of the Invention

[0007] The alignment apparatus for semiconductor chip packaging according to the embodiments disclosed herein can detect a radiation source and continuously perform fine alignment of the semiconductor chips during the bonding process of multiple semiconductor chips, thereby improving the bonding accuracy and thereby increasing the semiconductor production yield.

[0008] The alignment apparatus for semiconductor chip packaging according to the embodiments disclosed herein can improve packaging yields by improving alignment accuracy compared to bonding based on existing optical alignment methods, thereby reducing production costs and improving price competitiveness.

[0009] The alignment apparatus for semiconductor chip packaging according to the embodiments disclosed herein can prevent damage to the semiconductor chip by irradiating a low dose of radiation or by allowing the radiation to penetrate only a portion of the area where the alignment marks and / or TSVs are located, rather than the entire area of ​​the semiconductor chip.

[0010] In addition, various other effects that are directly or indirectly understood by this document may be provided. [Brief description of the drawings]

[0011] [Figure 1] 1 is a block diagram of an alignment apparatus for semiconductor chip packaging according to one embodiment disclosed herein; [Figure 2a] 1 illustrates an exemplary layout of an alignment device for semiconductor chip packaging according to one embodiment disclosed herein; [Figure 2b] 1 illustrates an exemplary layout of an alignment device for semiconductor chip packaging according to one embodiment disclosed herein; [Figure 3a] FIG. 1 illustrates an example of phase-matched alignment marks according to one embodiment disclosed herein. [Figure 3b] FIG. 2 illustrates an example of TSV phase matching according to one embodiment disclosed herein. [Figure 4] 1 is a flow chart illustrating an alignment method for semiconductor chip packaging according to one embodiment disclosed herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Various embodiments of the present invention will now be described with reference to the accompanying drawings, however, it should be understood that this is not intended to limit the present invention to the particular embodiments, but rather includes various modifications, equivalents, and / or alternatives of the embodiments of the present invention.

[0013] In this document, the singular form of a noun corresponding to an item can include one or more of the items, unless the relevant context clearly dictates otherwise. In this document, each of the sentences such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" can include any one of the items listed together in the sentence, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" can be used simply to distinguish the component from other components, and do not limit the component in other aspects (e.g., importance or order). When a (e.g., first) component is referred to as "coupled" or "connected" to another (e.g., second) component, with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., by wire), wirelessly, or via a third component.

[0014] Each component (e.g., a module or a program) of the components described in this document may include one or more individuals. According to various embodiments, one or more of the components or operations may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., modules or programs) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as performed by the multiple components before the integration. According to various embodiments, operations performed by a module, program, or other component may be performed sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations may be performed in another order, omitted, or one or more other operations may be added.

[0015] Each component (e.g., a module or a program) of the components described in this document may include one or more individuals. According to various embodiments, one or more of the components or operations may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., modules or programs) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as performed by the multiple components before the integration. According to various embodiments, operations performed by a module, program, or other component may be performed sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations may be performed in another order, omitted, or one or more other operations may be added.

[0016] The terms "module" or "part" as used herein may include units implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integrated component or the smallest unit or part of such a component that performs one or more functions. For example, in one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0017] Various embodiments of this document may be realized as software (e.g., a program or application) including one or more instructions stored in a storage medium (e.g., a memory) readable by a machine. For example, a processor of the machine may retrieve and execute at least one instruction from the one or more instructions stored in the storage medium. This allows the machine to be operated to perform at least one function in response to the retrieved at least one instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, "non-transitory" only means that the storage medium is a tangible device and does not include a signal (e.g., electromagnetic wave), and this term does not distinguish between a case where data is stored semi-permanently and a case where data is stored temporarily in the storage medium.

[0018] FIG. 1 is a block diagram of an alignment apparatus for semiconductor chip packaging according to one embodiment disclosed herein.

[0019] Referring to FIG. 1, an alignment apparatus 1 for packaging semiconductor chips may include a radiation source 100 , a plurality of semiconductor chips 200 , a radiation sensor 300 and an alignment unit 400 .

[0020] The alignment apparatus 1 for packaging semiconductor chips can perform a packaging process in a series of processes for producing semiconductors, and the packaging process can be performed after, for example, a deposition process, an etching process, an exposure process, etc.

[0021] According to the embodiment, the radiation source 100 can irradiate the plurality of semiconductor chips 200 with radiation. The radiation source 100 can include a device that emits radiation from the decay of a radioactive element, or a material, or an X-ray generator that generates X-rays by colliding accelerated electrons with a target. The alignment apparatus 1 for packaging semiconductor chips can include a shield in a direction other than a direction in which the plurality of semiconductor chips 200 are positioned, in order to irradiate the plurality of semiconductor chips 200 with radiation emitted from the radiation source 100.

[0022] According to the embodiment, the radiation source 100 may be an X-ray source. X-rays may have a wavelength of 10 nm to 0.01 nm and may pass through the semiconductor chips with almost no error due to the thickness of the semiconductor chips, and the radiation sensor 300 may detect the radiation that has passed through the semiconductor chips. Therefore, the alignment apparatus 1 for packaging semiconductor chips may check the alignment of the semiconductor chips even in a semiconductor packaging process in nm units, and may reduce the defective rate due to alignment errors between the semiconductor chips and significantly increase the yield.

[0023] According to an embodiment, the plurality of semiconductor chips 200 may include two or more semiconductor chips to be aligned and bonded for packaging. The plurality of semiconductor chips 200 may include various semiconductor chips configured in a semiconductor package.

[0024] Each semiconductor chip included in the plurality of semiconductor chips 200 may be a volatile memory such as a dynamic random access memory (DRAM) or a static random access memory (SRAM), or a non-volatile memory such as a phase-change random access memory (PRAM), a magneto-resistive random access memory (MRAM), a ferroelectric random access memory (FeRAM), or a resistive random access memory (RRAM).

[0025] Each of the multiple semiconductor chips 200 may be a semiconductor device composed of multiple individual devices, and the multiple individual devices may include various microelectronics devices, for example, metal-oxide-semiconductor field effect transistors (MOSFETs) such as complementary metal-insulator-semiconductor transistors (CMOS transistors), system large scale integration (LSI), image sensors such as CMOS imaging sensors (CISs), micro-electro-mechanical systems (MEMSs), active elements and / or passive elements.

[0026] Each of the semiconductor chips 200 may include a logic semiconductor chip and / or a memory semiconductor chip. For example, the logic semiconductor chip may include an AP (Application Processor), a microprocessor, a CPU (Central Processing Unit), a controller, a GPU (Graphic Processor Unit), an NPU (Neural Processing Unit), an HBM (High Bandwidth Memory), an FPGA (Field Programmable Gate Array), or an ASIC (Application Specific Integrated Circuit), etc.

[0027] According to the embodiment, the radiation sensor 300 can detect radiation transmitted through the multiple semiconductor chips 200. The radiation sensor 300 can include a detector that detects radiation. For example, the radiation sensor 300 can detect radiation by sensing a change in current or voltage caused by collision of particles (e.g., photons) emitted from the radiation source 100. As an example, the radiation sensor 300 can sense a current caused by collision of particles emitted from the radiation source 100, and an integral value of the current generated at this time can be proportional to the radiation energy incident on the radiation sensor 300.

[0028] The radiation sensor 300 can obtain detection information by detecting radiation that has passed through the multiple semiconductor chips 200. The detection information can include, for example, the count rate of radiation, radiation energy, and the like.

[0029] For example, the radiation sensor 300 may detect radiation in a specific area including the area of ​​the semiconductor chips 200, and the radiation sensor 300 may detect the count rate of radiation particles incident on each point of the specific area. Here, the area of ​​the semiconductor chips 200 may include a phase area that occurs when the semiconductor chips 200 are irradiated with light perpendicularly. Here, the radiation sensor 300 may generate a visualized image based on the count rate of each point. As an example, the radiation sensor 300 may generate a visualized image using a shading effect by displaying an area with a higher count rate as a region where more radiation is transmitted darker and displaying an area with a lower count rate as a region where less radiation is transmitted transparently. For this purpose, the radiation sensor 300 may include an image sensor for visualizing the detection information. A user of the alignment apparatus 1 for packaging semiconductor chips may check whether the semiconductor chips 200 are aligned by checking the image visualized by the radiation sensor 300.

[0030] According to an embodiment, the radiation source 100 may be an X-ray source, and the radiation sensor 300 may have a resolution in nm units so as to detect and clearly visualize radiation emitted from the radiation source. For example, the radiation sensor 300 may have a resolution of 3 nm or less. As an example, since X-rays have a wavelength of 0.1 to 10 nm, the radiation sensor 300 may have a resolution of 10 nm or less so as to effectively detect X-rays. In addition, the radiation sensor 300 may use sensors having different resolutions depending on the radiation source 100 used.

[0031] According to the embodiment, the alignment unit 400 may align and bond the plurality of semiconductor chips 200 based on the detection information acquired by the radiation sensor 300. For example, the alignment unit 400 may align the plurality of semiconductor chips 200 so that the phases of the respective semiconductor chips match. To this end, the alignment unit 400 may include a moving device (not shown) for changing the position of at least one of the plurality of semiconductor chips 200. For example, the moving device may include a robot arm or a nanostage, and the alignment unit 400 may grip a particular semiconductor chip with the robot arm or move it using the nanostage.

[0032] The alignment unit 400 may be operated by a user directly to change the positions of the semiconductor chips 200 based on the detection information, or may be operated by a program, software, etc. to automatically change the positions of the semiconductor chips 200. As an example, the alignment unit 400 generally automatically aligns the positions of the semiconductor chips 200, and in special situations such as an emergency situation or a failure, a user can intervene and passively operate the alignment unit 400 to align the positions of the semiconductor chips 200.

[0033] The alignment apparatus 1 for packaging semiconductor chips may include additional components such as silicon interposers, conductive bumps, solder balls, connection pads, insulating adhesive layers, etc. for bonding between multiple semiconductor chips 200. Also, bonding between multiple semiconductor chips 200 may be achieved by various contact methods such as direct metal bonding, oxide bonding, and / or direct contact of bonding pads.

[0034] 2a and 2b are diagrams illustrating an example layout of an alignment apparatus for semiconductor chip packaging according to one embodiment disclosed herein.

[0035] 3a and 3b are diagrams illustrating exemplary phase-matched alignment marks and TSVs, respectively, according to one embodiment disclosed herein.

[0036] 2a and 2b, the alignment apparatus 1 for semiconductor chip packaging can arrange and align a plurality of semiconductor chips 200 one above the other.

[0037] According to an embodiment, each of the plurality of semiconductor chips 200 may include at least one of an alignment mark, a through silicon via (TSV), or a combination thereof. For example, the plurality of semiconductor chips 200 may all include an alignment mark or all include a TSV.

[0038] The alignment mark may include a mark formed in a specific region of each semiconductor chip in order to align the semiconductor chips 200. The TSV may include a through hole formed for electrical connection between the semiconductor chips when bonding the semiconductor chips. The TSV may transmit an electrical signal by connecting electrodes inside the semiconductor chips 200 through minute holes in the semiconductor chips 200. The alignment mark and the TSV may be generated in a process such as an exposure process, a deposition process, etc., prior to a packaging process using the alignment apparatus 1 for packaging semiconductor chips.

[0039] The alignment marks and TSVs can be formed at specific positions of each semiconductor chip in order to align the multiple semiconductor chips 200. Here, the alignment apparatus 1 for semiconductor chip packaging can form the alignment marks such that matching the positions of the alignment marks (or phases) can result in the multiple semiconductor chips 200 being aligned. Similarly, the alignment apparatus 1 for semiconductor chip packaging can form the TSVs such that matching the positions of the TSVs (or phases) can result in the multiple semiconductor chips 200 being aligned.

[0040] According to the embodiment, the detection information of the radiation sensor 300 may include position information of the alignment marks and the TSVs. Here, the alignment unit 400 may align the multiple semiconductor chips 200 based on the position information of the alignment marks and the TSVs.

[0041] According to the embodiment, the alignment unit 400 may align the plurality of semiconductor chips 200 so that the phases of the alignment marks match or the phases of the TSVs match. For example, if the plurality of semiconductor chips 200 include alignment marks, the alignment unit 400 may align the plurality of semiconductor chips 200 so that the phases of the alignment marks match, and if the plurality of semiconductor chips 200 include TSVs, the alignment unit 400 may align the plurality of semiconductor chips 200 so that the phases of the TSVs match. As an example, the TSVs may be formed at the same position of each semiconductor chip, and in this case, the alignment unit 400 may align the plurality of semiconductor chips 200 so that the positions of the TSVs match. As another example, the TSVs may not be formed at the same position of each semiconductor chip, and the positions of the plurality of semiconductor chips 200 may be adjusted and aligned so that one end and the other end are connected.

[0042] For example, in FIG. 2a, the first semiconductor chip 200_1 may include a first alignment mark 210_1, and the second semiconductor chip 200_2 may include a second alignment mark 210_2. Here, the first alignment mark 210_1 and the second alignment mark 210_2 may have a similar shape to each other so that it can be confirmed whether their positions match. As an example, in FIG. 3a, the first alignment mark 210_1 has a cross shape, and the second alignment mark 210_2 has a square shape, and it can be confirmed whether the phase of the first alignment mark 210_1 contacts the phase of the second alignment mark 210_2 to align the positions of the multiple semiconductor chips 200_1 and 200_2. Although two semiconductor chips 200_1 and 200_2 are illustrated in FIG. 2a, it can be said that the number of semiconductor chips is not limited, and the formation positions and shapes of the alignment marks 210_1 and 210_2 are also not limited.

[0043] 2b, the first semiconductor chip 200_1 may include a first TSV 220_1, and the second semiconductor chip 200_2 may include a second TSV 220_2. Here, the first TSV 220_1 and the second TSV 220_2 may be formed at the same position, for example, and the first semiconductor chip 200_1 and the second semiconductor chip 220_2 may be aligned by vertically connecting the first TSV 220_1 and the second TSV 220_2. As an example, in FIG. 3b, the first TSV 220_1 and the second TSV 220_2 may have a cylindrical structure, and the phases of the first TSV 220_1 and the second TSV 220_2 detected by the radiation sensor 300 may overlap with circular phases. In Fig. 3b, the first TSV 220_1 and the second TSV 220_2 are illustrated as being partially spaced apart from each other for the sake of convenience, and the first TSV 220_1 and the second TSV 220_2 may be completely overlapped. In Fig. 2b, two semiconductor chips 200_1 and 200_2 are illustrated, but the number of semiconductor chips is not limited, and the formation positions and shapes of the TSVs 220_1 and 220_2 are not limited.

[0044] According to the embodiment, the alignment marks and the TSVs may be formed of a material having a transmittance of radiation emitted from the radiation source 100 lower than a preset value. Here, the preset value may be set so that the radiation sensor 300 can confirm that the material has a low transmittance when it detects radiation. For example, the alignment marks and the TSVs may be formed of a material having a low X-ray transmittance and a high absorption rate, such as nickel or tin. In this case, when the radiation sensor 300 detects radiation that has passed through the semiconductor chips 200, no radiation or a small amount of radiation is detected in the portion corresponding to the position where the alignment marks and the TSVs are formed, and thus the position information of the alignment marks and the TSVs of each of the semiconductor chips 200 can be obtained. As a result, the alignment apparatus 1 for packaging semiconductor chips can align the semiconductor chips 200 by matching the positions of the alignment marks (or phases) or matching the positions of the TSVs (or phases). The alignment apparatus 1 for packaging semiconductor chips can use the TSVs configured for electrical connection between the chips for alignment without using a separate alignment mark.

[0045] According to the embodiment, the plurality of semiconductor chips 200 may be arranged vertically with respect to the ground. This may be understood as being for 3D bonding in semiconductor packaging. Here, the radiation source 100 may be located above the uppermost semiconductor chip of the plurality of semiconductor chips 200, and the radiation sensor 300 may be located below the lowermost semiconductor chip of the plurality of semiconductor chips 200. By arranging them in this manner, the radiation sensor 300 may detect radiation emitted from the radiation source 100 and transmitted through the plurality of semiconductor chips 200 to obtain detection information.

[0046] According to the embodiment, the semiconductor chip alignment apparatus 1 may further include a camera (not shown) for photographing the plurality of semiconductor chips 200. The camera may photograph the alignment marks and TSVs included in each of the plurality of semiconductor chips 200. For example, the camera may be inserted above a first semiconductor chip and an upper part of a second semiconductor chip of the plurality of semiconductor chips 200 to photograph a lower part of the first semiconductor chip and an upper part of the second semiconductor chip, thereby photographing the plurality of semiconductor chips 200. The camera may include multiple lenses so as to photograph both sides simultaneously.

[0047] According to an embodiment, the radiation source 100 can emit radiation to a predetermined area that is set based on the positions of the alignment marks and the TSVs obtained from the camera.

[0048] In the case of semiconductor chips, the radiation may affect semiconductor elements included in the semiconductor chip by exciting some electrons during the radiation penetration process. Since semiconductor elements are sensitive components that are greatly affected by even the smallest influences, it is impossible to eliminate the possibility of the semiconductor chip being damaged when the radiation source penetrates. Therefore, the alignment apparatus 1 for packaging semiconductor chips can prevent damage to the semiconductor chips by transmitting radiation only to some areas where alignment marks and / or TSVs are located, rather than the entire area of ​​the semiconductor chip. Depending on the case, the alignment apparatus 1 for packaging semiconductor chips can irradiate the entire area of ​​the semiconductor chip with radiation, but in this case, a low-dose radiation source can be used to minimize damage to the semiconductor chip.

[0049] The predetermined region may be set differently for each of the plurality of semiconductor chips 200, and may be set to include a formation position of an alignment mark and / or a TSV included in each of the plurality of semiconductor chips 200. Here, the alignment marks and / or TSVs of the plurality of semiconductor chips 200 may be formed to have the same coordinates in a plane perpendicular to the direction in which radiation is irradiated.

[0050] According to an embodiment, the alignment apparatus 1 for packaging semiconductor chips may optically align the plurality of semiconductor chips 200 based on the positions of the plurality of semiconductor chips 200 primarily photographed by a camera. Here, the optical alignment of the plurality of semiconductor chips 200 may also be performed by a process of matching the positions of alignment marks or TSVs included in the plurality of semiconductor chips 200. In addition, the alignment apparatus 1 for packaging semiconductor chips may set a predetermined area for irradiating the radiation source 100 in order to perform fine alignment by detecting radiation after optical alignment. Thus, the alignment apparatus 1 for packaging semiconductor chips may perform fine alignment of the plurality of semiconductor chips 200 based on detection information of the radiation sensor 300.

[0051] According to the embodiment, the alignment apparatus 1 for packaging semiconductor chips may include a database or memory that stores position coordinates of alignment marks and / or TSVs formed on each of the plurality of semiconductor chips 200. Position coordinates of each alignment mark and / or TSV may be stored in the database or memory when the alignment mark and / or TSV is formed. Here, the alignment unit 400 may align the plurality of semiconductor chips 200 based on the stored coordinates of the alignment marks and / or TSVs. For example, the alignment apparatus 1 for packaging semiconductor chips may align the plurality of semiconductor chips 200 primarily based on the position coordinates stored in the database or memory, and perform fine alignment of the plurality of semiconductor chips 200 using the radiation source 100.

[0052] According to the embodiment, the alignment apparatus 1 for packaging semiconductor chips may further include a display unit (not shown) on which a user can check the detection information. Here, the radiation sensor 300 may visualize and provide the detection information so that the user can check it, and the user may check the visualized detection information through the display unit. The user may check this and check in real time whether the multiple semiconductor chips 200 are aligned, and may directly operate the alignment unit 400 to align the multiple semiconductor chips 200 as necessary.

[0053] In this manner, the alignment apparatus 1 for semiconductor chip packaging can perform semiconductor packaging by aligning and bonding a plurality of semiconductor chips 200. The alignment apparatus 1 for semiconductor chip packaging can produce a semiconductor package including a plurality of semiconductor chips 200, and the semiconductor package can be a System In Package (SIP) in which a plurality of different types of semiconductor chips 200 are electrically connected to each other and operate as a single system.

[0054] FIG. 4 is a flow chart illustrating an alignment method for semiconductor chip packaging according to one embodiment disclosed herein.

[0055] Referring to FIG. 4, the semiconductor chip alignment method may include a step (S100) of irradiating radiation onto multiple semiconductor chips, a step (S200) of a radiation sensor detecting radiation that has passed through the multiple semiconductor chips, and a step (S300) of aligning and bonding the multiple semiconductor chips based on the detection information acquired by the radiation sensor.

[0056] In step S100, the radiation source 100 can irradiate a plurality of semiconductor chips 200 with radiation.

[0057] In step S200, the radiation sensor 300 can detect radiation that has passed through the multiple semiconductor chips 200.

[0058] In step S300, the alignment unit 400 can align and bond the multiple semiconductor chips 200 based on the detection information acquired by the radiation sensor 300. Here, the detection information can include position information of alignment marks and / or TSVs included in the multiple semiconductor chips 200.

[0059] Although it has been described above that all components constituting the embodiments disclosed in this document are combined or operate in combination, the embodiments disclosed in this document are not necessarily limited to such embodiments. In other words, within the scope of the purpose of the embodiments disclosed in this document, all components may be selectively combined and operate in one or more combinations.

[0060] In addition, the terms "comprise", "constitute", or "have" described above, unless otherwise specified to the contrary, should be interpreted as meaning that the relevant element may be contained therein, and not excluding other elements, but may further include other elements. All terms, including technical and scientific terms, have the same meaning as commonly understood by a person of ordinary skill in the art to which the embodiments disclosed in this document belong, unless otherwise defined. Commonly used terms, such as terms defined in a dictionary, should be interpreted to be consistent with the contextual meaning of the relevant art, and should not be interpreted in an ideal or overly formal sense unless expressly defined in this document.

[0061] The above description is merely an illustrative explanation of the technical ideas disclosed in this document, and a person having ordinary knowledge in the technical field to which the embodiments disclosed in this document belong can make various modifications and variations without departing from the essential characteristics of the embodiments disclosed in this document. Therefore, the embodiments disclosed in this document are not intended to limit the technical ideas of the embodiments disclosed in this document, but are intended to explain them, and such embodiments do not limit the scope of the technical ideas disclosed in this document. The scope of protection of the technical ideas disclosed in this document should be interpreted according to the scope of the claims below, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of rights of this document. [Explanation of symbols]

[0062] 100 radiation source 200 Multiple Semiconductor Chips 200_1 First semiconductor chip 200_2 Second semiconductor chip 210_1 1st alignment mark 210_2 2nd alignment mark 220_1 1st TSV 220_2 2nd TSV 300 Radiation Sensor 400 Alignment Section

Claims

1. a radiation source for irradiating a plurality of semiconductor chips with radiation; a radiation sensor that detects the radiation that has passed through the semiconductor chips; an alignment unit that aligns and bonds the plurality of semiconductor chips based on detection information acquired by the radiation sensor; a camera for photographing the plurality of semiconductor chips; Each of the plurality of semiconductor chips includes at least one of an alignment mark, a through silicon via (TSV), or a combination thereof; The radiation source irradiates a predetermined area that is set based on the positions of the alignment mark and the TSV acquired from the camera, the radiation source being an alignment apparatus for semiconductor chip packaging.

2. the detection information includes position information of the alignment mark and the TSV, 2. The alignment apparatus for semiconductor chip packaging according to claim 1, wherein the alignment unit aligns the plurality of semiconductor chips based on the position information.

3. 3. The alignment apparatus for semiconductor chip packaging according to claim 2, wherein the alignment unit aligns the plurality of semiconductor chips so as to align the phases of the alignment marks or the phases of the TSVs based on the position information.

4. 2. The alignment apparatus of claim 1, wherein the alignment mark and the TSV are made of a material having a radiation transmittance lower than a preset value.

5. The plurality of semiconductor chips are arranged vertically with respect to the ground, the radiation source is located above a topmost semiconductor chip among the plurality of semiconductor chips; 2. The apparatus of claim 1, wherein the radiation sensor is positioned below a lowermost semiconductor chip among the plurality of semiconductor chips.

6. a display unit for allowing a user to check the detection information; 2. The alignment apparatus for packaging semiconductor chips according to claim 1, further comprising an operating portion for operating the alignment portion.

7. 2. The alignment apparatus for semiconductor chip packaging as claimed in claim 1, wherein the radiation source is an X-ray source.

8. 2. The alignment apparatus for semiconductor chip packaging according to claim 1, wherein the radiation sensor has a resolution in nm units.

9. A step of photographing a plurality of semiconductor chips with a camera; irradiating the plurality of semiconductor chips with radiation; a radiation sensor detecting the radiation transmitted through the plurality of semiconductor chips; and aligning and bonding the plurality of semiconductor chips based on detection information acquired by the radiation sensor; the irradiating step further includes irradiating the radiation to a predetermined area that is set based on the positions of an alignment mark and a through silicon via (TSV) acquired from the camera; Each of the plurality of semiconductor chips includes at least one of the alignment mark, the TSV, or a combination thereof.

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