Semiconductor Device

Abstract

To provide a technology capable of suppressing occurrence of a surge voltage and improving heat dissipation property in a semiconductor device.SOLUTION: A semiconductor device 1 includes: a semiconductor element having a first electrode and a second electrode; sealing resin 2 which is formed in a rectangular shape in top view and seals the semiconductor element; a first heat radiation plate 7 which is electrically connected with the first electrode, and projects in top view from a first side of the sealing resin 2; a second heat radiation plate 8 which is electrically connected with the second electrode, and projects from a second side facing the first side of the sealing resin 2 in top view; a first terminal 4 which is electrically connected with the first electrode, and projects from a third side crossing the first side of the sealing resin 2 in top view; and a second terminal 5 which is electrically connected with the second electrode, and projects from the third side of the sealing resin. The first heat radiating plate 7 and the second heat radiating plate 8 can be fixed to a heat sink 9.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] When constructing a bridge circuit using semiconductor devices in a through-hole package, it is necessary to connect multiple semiconductor devices via bonding wires, lead terminals, and a substrate. This increases parasitic inductance, making it easy for surge voltages to occur. In order to suppress the surge voltage, it is necessary to reduce the switching speed of the semiconductor element included in the semiconductor device. In particular, when the semiconductor material of the semiconductor element is a wide band gap semiconductor, the switching speed is faster than that of conventional Si, so suppressing the surge voltage is an issue.

[0003] For example, Patent Document 1 discloses a semiconductor device in a surface mount package. The semiconductor device described in Patent Document 1 includes a sealing resin, a plurality of leads protruding from the sealing resin, and a plurality of semiconductor elements electrically connected to the plurality of leads, and the plurality of semiconductor devices can be connected via a metal plate (corresponding to a heat sink) among the plurality of leads. The semiconductor device described in Patent Document 1 has a reduced parasitic inductance compared to a through-hole package, making it possible to suppress the occurrence of surge voltage. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2020 / 255663 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the semiconductor device described in Patent Document 1, although the input lead and the output lead are provided as metal plates, it is not assumed that these will be fixed to a heat sink, making it difficult to improve the heat dissipation performance of the semiconductor device.

[0006] In view of the above, an object of the present disclosure is to provide a technique capable of suppressing the occurrence of surge voltage and improving heat dissipation in a semiconductor device. [Means for solving the problem]

[0007] A semiconductor device according to the present disclosure is a semiconductor device connectable to a heat sink, comprising: a semiconductor element having a first electrode and a second electrode; a sealing resin formed in a rectangular shape in a top view and sealing the semiconductor element; a first heat sink electrically connected to the first electrode and protruding from a first side of the sealing resin in a top view; a second heat sink electrically connected to the second electrode and protruding from a second side of the sealing resin opposite to the first side in a top view; Around a first terminal protruding from the sealing resin and electrically connected to the second electrode, 2 A second terminal protruding from the side of 、 wherein the first heat dissipation plate and the second heat dissipation plate are fixable to the heat sink. Effect of the Invention

[0008] According to the present disclosure, for example, when connecting two semiconductor devices, it is possible to connect a first heat sink of one semiconductor device to a second heat sink of the other semiconductor device, thereby reducing parasitic inductance and suppressing the occurrence of surge voltage.

[0009] Moreover, by fixing the first heat dissipation plate and the second heat dissipation plate to a heat sink, the heat dissipation performance of the semiconductor device can be improved. [Brief description of the drawings]

[0010] [Figure 1] 1 is a perspective view of a semiconductor device according to a first embodiment. [Diagram 2] 1A and 1B are a top view and a front view of a semiconductor device according to a first embodiment. [Diagram 3] 1 is a front view showing a state in which a plurality of semiconductor devices according to a first embodiment are connected and fixed to a heat sink. [Figure 4] FIG. 13 is a perspective view of a semiconductor device according to a modified example of the first embodiment. [Diagram 5] 4A and 4B are a top view and a front view of a semiconductor device according to a modification of the first embodiment. [Figure 6] FIG. 11 is a perspective view of a semiconductor device according to a second embodiment. [Figure 7] 11A and 11B are a top view and a front view of a semiconductor device according to a second embodiment. [Figure 8] 11 is a front view showing a state in which a plurality of semiconductor devices according to the second embodiment are connected and fixed to a heat sink. FIG. [Figure 9] FIG. 11 is a perspective view of a semiconductor device according to a third embodiment. [Figure 10] 11A and 11B are a top view and a front view of a semiconductor device according to a third embodiment. [Figure 11] 13 is a front view showing a state in which a plurality of semiconductor devices according to the third embodiment are connected and fixed to a heat sink. FIG. [Figure 12] FIG. 11 is a perspective view of a semiconductor device according to a fourth embodiment. [Figure 13] 13A and 13B are a top view and a front view of a semiconductor device according to a fourth embodiment. [Figure 14] FIG. 11 is a front view showing a state in which a plurality of semiconductor devices according to the fourth embodiment are connected and fixed to a heat sink. [Figure 15] FIG. 13 is a perspective view of a semiconductor device according to a fifth embodiment. [Figure 16] 13A and 13B are a top view and a front view of a semiconductor device according to a fifth embodiment. [Figure 17] 13 is a front view showing a state in which a plurality of semiconductor devices according to the fifth embodiment are connected and fixed to a heat sink. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] <Embodiment 1> The first embodiment will be described below with reference to the drawings. Fig. 1 is a perspective view of a semiconductor device 1 according to the first embodiment. Fig. 2(a) is a top view of the semiconductor device 1, and Fig. 2(b) is a front view of the semiconductor device 1. Fig. 3 is a front view showing a state in which a plurality of semiconductor devices 1 are connected and fixed to a heat sink 9.

[0012] In FIG. 1, the X direction, the Y direction, and the Z direction are mutually orthogonal. The X direction, the Y direction, and the Z direction shown in the following figures are also mutually orthogonal. In the following, the direction including the X direction and the -X direction opposite to the X direction is also referred to as the "X-axis direction". In the following, the direction including the Y direction and the -Y direction opposite to the Y direction is also referred to as the "Y-axis direction". In the following, the direction including the Z direction and the -Z direction opposite to the Z direction is also referred to as the "Z-axis direction".

[0013] As shown in Figures 1, 2(a) and (b), semiconductor device 1 is a surface mount package semiconductor device, and includes a semiconductor element (not shown), a sealing resin 2, a gate terminal 3, two drain terminals 4 as first terminals, two source terminals 5 as second terminals, a driver source terminal 6, a heat sink 7 as a first heat sink, and a heat sink 8 as a second heat sink.

[0014] In the first embodiment, the semiconductor element is a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), and when a signal is input from a gate electrode, a current flows from a source electrode to a drain electrode. The sealing resin 2 is formed in a rectangular shape in a top view, and seals the semiconductor element. The sealing resin 2 has a first side, a second side, a third side, and a fourth side in a top view. Here, the first side is a side in the X direction of the sealing resin 2, and the second side is a side in the -X direction of the sealing resin 2. The third side is a side in the -Y direction of the sealing resin 2, and the fourth side is a side in the Y direction of the sealing resin 2.

[0015] The two drain terminals 4 are electrically connected to the drain electrodes of the semiconductor element and protrude upward (Z direction) from a third side intersecting with the first side of the sealing resin 2 in a top view. The two source terminals 5 are electrically connected to the source electrodes of the semiconductor element and protrude upward (Z direction) from the third side of the sealing resin 2 in a top view. The gate terminal 3 is electrically connected to the gate electrode of the semiconductor element and protrudes upward (Z direction) from a fourth side facing the third side of the sealing resin 2 in a top view. The driver source terminal 6 is electrically connected to the driver source electrode of the semiconductor element and protrudes upward (Z direction) from the fourth side of the sealing resin 2 in a top view. Here, the drain electrode corresponds to the first electrode, and the source electrode corresponds to the second electrode.

[0016] As shown in Fig. 3, the heat sink 7 and the heat sink 8 are fixed to a heat sink 9 via an insulating sheet 10, and transfer heat generated by the semiconductor element to the heat sink 9. As shown in Figs. 1, 2(a) and 2(b), the heat sink 7 is electrically connected to the drain electrode of the semiconductor element and protrudes in the X direction from a first side of the sealing resin 2 in a top view. The heat sink 8 is electrically connected to the source electrode of the semiconductor element and protrudes in the -X direction from a second side opposite to the first side of the sealing resin 2 in a top view. The two drain terminals 4 are provided on the heat sink 7 side (X direction) of the third side of the sealing resin 2, and the two source terminals 5 are provided on the heat sink 8 side (-X direction) of the third side of the sealing resin 2.

[0017] The heat sink 7 is formed of, for example, a copper plate-like member, and has no steps. A screw hole 7a is provided at the tip of the heat sink 7, penetrating from the top surface to the bottom surface. As shown in FIG. 3, a screw 12 is inserted into the screw hole 7a. The screw 12 has a function of fixing the semiconductor device 1 to the heat sink 9, and a function of connecting the multiple semiconductor devices 1 arranged along the X-axis direction to each other. Here, the base end of the heat sink 7 is a portion of the heat sink 7 in the -X direction from the screw hole 7a.

[0018] 1 and 2(a) and (b), the heat sink 8 is formed by joining ends of two copper plate-like members, for example, in a state where they are overlapped in the Z direction, so as to have a step 8b. A screw hole 8a is provided at the tip of the heat sink 8, penetrating from the top surface to the bottom surface. As shown in FIG. 3, a screw 12 is inserted into the screw hole 8a. Here, the base end of the heat sink 8 is a portion of the heat sink 8 in the X direction beyond the screw hole 8a.

[0019] Heat sink 7 and heat sink 8 protrude from the same height position of sealing resin 2. A step 8b is provided between the underside of the tip end and the underside of the base end of heat sink 8, and the height position of the underside of the tip end of heat sink 8 and the height position of the upper surface of the base end of heat sink 7 are the same.

[0020] 3, when two semiconductor devices 1 are fixed to the upper surface (surface in the +Z direction) of the heat sink 9 via the insulating sheet 10, in the semiconductor device 1 on the left side (-X direction), a spacer 11b is placed on the lower surface (surface in the -Z direction) of the tip of the heat sink 8 to eliminate the step 8b of the heat sink 8, that is, the distance between the tip of the heat sink 8 and the insulating sheet 10, and the spacer 11b is fixed to the heat sink 9 together with the heat sink 8 by the screw 12. Also, a spacer 11a is interposed between the screw 12 and the heat sink 9 to insulate the screw 12 from the heat sink 9.

[0021] The lower surface (-Z direction surface) of the tip end of the heat sink 8 of the semiconductor device 1 on the right side (X direction) is brought into close contact with the upper surface (Z direction surface) of the base end of the heat sink 7 of the semiconductor device 1 on the left side (-X direction). When the heat sink 7 and the heat sink 8 are in close contact with each other, the screw holes 7a of the heat sink 7 and the screw holes 8a of the heat sink 8 are in communication with each other. The heat sink 8 and the heat sink 7 are fixed to the heat sink 9 with screws 12. In addition, a spacer 11a is interposed between the screws 12 and the heat sink 9 to insulate the screws 12 from the heat sink 9.

[0022] In the semiconductor device 1 on the right side (X direction), a spacer 11b is placed on the upper surface (surface in the Z direction) of the heat sink 7 in order to align the height position of the screw 12 used in the heat sink 7 of the semiconductor device 1 with the height position of other screws 12, and the spacer 11b is fixed together with the heat sink 7 by the screw 12. Also, in order to insulate the screw 12 from the heat sink 9, a spacer 11a is interposed between the screw 12 and the heat sink 9. Although not shown, each of the lead terminals 3 to 6 is electrically connected to a pattern provided on a substrate on which the semiconductor device 1 is mounted.

[0023] As described above, the height position of the underside of the tip end of heat sink 7 is the same as the height position of the upper surface of the base end of heat sink 8, so the two semiconductor devices 1 do not float up from their mounting locations, and the heat sink 8 of the semiconductor device 1 on the right side (X direction) and the heat sink 7 of the semiconductor device 1 on the left side (-X direction) can be connected in a tightly contacted state.

[0024] In addition, the fact that the height position of the underside of the tip end of heat sink 7 and the height position of the upper surface of the base end of heat sink 8 are the same does not only mean that they are exactly the same, but also includes cases where there is a slight difference due to manufacturing errors, etc.

[0025] Moreover, it is sufficient that one of the heat sinks 7 and 8 has a step, and the step may be provided on the heat sink 7.

[0026] As described above, the semiconductor device 1 of the first embodiment is a semiconductor device 1 connectable to a heat sink 9, and includes a semiconductor element having a drain electrode and a source electrode, a sealing resin 2 formed in a rectangular shape when viewed from above and sealing the semiconductor element, a heat sink 7 electrically connected to the drain electrode and protruding from a first side of the sealing resin 2 when viewed from above, a heat sink 8 electrically connected to the source electrode and protruding from a second side opposite the first side of the sealing resin 2 when viewed from above, a drain terminal 4 electrically connected to the drain electrode and protruding from a third side intersecting the first side of the sealing resin 2 when viewed from above, and a source terminal 5 electrically connected to the source electrode and protruding from the third side of the sealing resin when viewed from above, and the heat sink 7 and the heat sink 8 are capable of being fixed to the heat sink 9.

[0027] Therefore, for example, when connecting two semiconductor devices 1, the heat sink 7 of one semiconductor device 1 can be connected to the heat sink 8 of the other semiconductor device 1, thereby reducing parasitic inductance and suppressing the occurrence of surge voltage.

[0028] Moreover, by fixing the heat dissipation plates 7 and 8 to the heat sink 9, the heat dissipation performance of the semiconductor device 1 can be improved.

[0029] In addition, when configuring a bridge circuit or the like using multiple products, it is easy to maintain the symmetry of the circuit pattern between the products or parallel arms, so that current imbalance between the products or parallel arms can be suppressed.

[0030] Furthermore, one of the heat sinks 7 and 8 has a step, and the height position of the underside of the tip end of one heat sink is the same as the height position of the upper surface of the base end of the other heat sink. Therefore, the semiconductor device 1 does not float up from the mounting location, and the heat sink 8 provided on the semiconductor device 1 on the right side (X direction) and the heat sink 7 provided on the semiconductor device 1 on the left side (-X direction) can be connected in a tightly contacted state.

[0031] Furthermore, the heat sink 7 and the heat sink 8 are provided with screw holes 7 a and 8 a for fixing to the heat sink 9 , respectively, so that the heat sinks 7 and 8 can be easily connected to each other with screws 12 .

[0032] <Modification of the first embodiment> Next, a modification of the first embodiment will be described. The semiconductor element may be a transistor other than a MOSFET. An example of a transistor other than a MOSFET is an IGBT (Insulated Gate Bipolar Transistor). Alternatively, the semiconductor element may be a diode. The same applies to the following embodiments.

[0033] Next, a semiconductor device 1A in which the semiconductor element is a diode will be described. Fig. 4 is a perspective view of the semiconductor device 1A according to a modification of the first embodiment. Fig. 5(a) is a top view of the semiconductor device 1A, and Fig. 5(b) is a front view of the semiconductor device 1A.

[0034] As shown in Figures 4, 5(a) and (b), the semiconductor device 1A includes a semiconductor element (not shown), a sealing resin 2, two cathode terminals 24 as first terminals, two anode terminals 25 as second terminals, a heat sink 7 as a first heat sink, and a heat sink 8 as a second heat sink.

[0035] The two cathode terminals 24 are electrically connected to the cathode electrodes of the semiconductor element, and protrude upward (in the Z direction) from a third side intersecting with the first side of the sealing resin 2 in top view. The two anode terminals 25 are electrically connected to the anode electrodes of the semiconductor element, and protrude upward (in the Z direction) from the third side of the sealing resin 2 in top view.

[0036] The heat sink 7 is electrically connected to the cathode electrode of the semiconductor element, and protrudes in the X direction from a first side of the sealing resin 2 in top view. The heat sink 8 is electrically connected to the anode electrode of the semiconductor element, and protrudes in the -X direction from a second side opposite to the first side of the sealing resin 2 in top view. Note that other configurations of the semiconductor device 1A are the same as those of the semiconductor device 1, so description thereof will be omitted.

[0037] <Embodiment 2> Next, a semiconductor device 1B according to a second embodiment will be described. Fig. 6 is a perspective view of the semiconductor device 1B according to the second embodiment. Fig. 7(a) is a top view of the semiconductor device 1B, and Fig. 7(b) is a front view of the semiconductor device 1B. Fig. 8 is a front view showing a state in which a plurality of semiconductor devices 1B are connected and fixed to a heat sink 9. In the second embodiment, the same components as those described in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

[0038] As shown in FIGS. 6 to 8, a semiconductor device 1B according to the second embodiment is a semiconductor device in a surface mount package, and in the second embodiment, the positions of the terminals are different from those in the first embodiment.

[0039] The two drain terminals 4 as first terminals protrude upward (Z direction) from the first side of the sealing resin 2 in top view. The two drain terminals 4 are provided in front of the heat sink 7 (-Y direction).

[0040] The two source terminals 5 as the second terminals protrude upward (Z direction) from the second side of the sealing resin 2 in top view. The two source terminals 5 are provided in front of the heat sink 7 (-Y direction).

[0041] The gate terminal 3 and the driver source terminal 6 protrude upward (Z direction) from the second side of the sealing resin 2 in a top view. The gate terminal 3 and the driver source terminal 6 are provided behind the heat sink 7 (Y direction).

[0042] As described above, the semiconductor device 1B of the second embodiment is a semiconductor device 1B connectable to a heat sink 9, and includes a semiconductor element having a drain electrode and a source electrode, a sealing resin 2 formed in a rectangular shape when viewed from above and sealing the semiconductor element, a heat sink 7 electrically connected to the drain electrode and protruding from a first side of the sealing resin 2 when viewed from above, a heat sink 8 electrically connected to the source electrode and protruding from a second side opposite the first side of the sealing resin 2 when viewed from above, a drain terminal 4 electrically connected to the drain electrode and protruding from the first side of the sealing resin 2 when viewed from above, and a source terminal 5 electrically connected to the source electrode and protruding from the second side of the sealing resin 2 when viewed from above, and the heat sink 7 and the heat sink 8 are capable of being fixed to the heat sink 9.

[0043] Therefore, in the semiconductor device 1B, it is possible to suppress the occurrence of surge voltage and improve heat dissipation, similarly to the case of embodiment 1. Furthermore, since the creepage distance between the drain terminal 4 and the source terminal 5 can be made longer than in the case of embodiment 1, it is possible to achieve a high withstand voltage for the semiconductor device 1B.

[0044] <Embodiment 3> Next, a semiconductor device 1C according to a third embodiment will be described. Fig. 9 is a perspective view of the semiconductor device 1C according to the third embodiment. Fig. 10(a) is a top view of the semiconductor device 1C, and Fig. 10(b) is a front view of the semiconductor device 1C. Fig. 11 is a front view showing a state in which a plurality of semiconductor devices 1C according to the third embodiment are connected and fixed to a heat sink 9. In the third embodiment, the same components as those described in the first and second embodiments are denoted by the same reference numerals, and description thereof will be omitted.

[0045] 9 to 11, semiconductor device 1C according to embodiment 3 is a through-hole package semiconductor device, and embodiment 3 has a different shape of heat sink 8 from embodiment 1. Specifically, heat sink 7 and heat sink 8 protrude from sealing resin 2 at the same height position and have no step.

[0046] 11, an insulating ceramic plate 13 is provided on the upper surface (surface in the +Z direction) of the heat sink 9, and a copper pattern 14 is provided on the upper surface (surface in the +Z direction) of the insulating ceramic plate 13. When connecting a plurality of semiconductor devices 1C to the upper surface (surface in the +Z direction) of the heat sink 9 via the copper pattern 14 and the insulating ceramic plate 13, screws 12 are inserted into the screw holes 7a of the heat sink 7 and the screw holes 8a of the heat sink 8, respectively. In addition, in order to insulate the screws 12 from the heat sink 9, spacers 11a are interposed between the screws 12 and the heat sink 9.

[0047] In the third embodiment, the heat sink 7 of the semiconductor device 1C on the left side (-X direction) and the heat sink 8 of the semiconductor device 1C on the right side (X direction) are not directly connected, but are electrically connected via the copper pattern 14. This makes it possible to reduce the inductance of the drain terminal 4 and the source terminal 5, and to connect the drain terminal 4 and the source terminal 5 with low impedance.

[0048] It is possible to adopt the arrangement positions of the terminals in the second embodiment in the third embodiment.

[0049] As described above, in the semiconductor device 1C according to the third embodiment, the heat sink 7 and the heat sink 8 protrude from the same height position of the sealing resin 2 and have no step. The semiconductor device 1C is a through-hole package semiconductor device, and the insulating ceramic plate 13 is provided on the upper surface (surface in the +Z direction) of the heat sink 9, and the copper pattern 14 is provided on the upper surface (surface in the +Z direction) of the insulating ceramic plate 13. Therefore, by tightening the screws, the heat sink 7 provided in the semiconductor device 1C on the left side (-X direction) and the heat sink 8 provided in the semiconductor device 1C on the right side (X direction) can be electrically connected via the copper pattern 14.

[0050] This makes it possible to suppress the occurrence of surge voltage and improve heat dissipation in semiconductor device 1C, similarly to embodiment 1. Furthermore, since heat sink 7 and heat sink 8 are not directly connected, spacer 11b is not required, and the number of types of spacers can be reduced compared to embodiment 1.

[0051] <Fourth embodiment> Next, a semiconductor device 1D according to a fourth embodiment will be described. Fig. 12 is a perspective view of the semiconductor device 1D according to the fourth embodiment. Fig. 13(a) is a top view of the semiconductor device 1D, and Fig. 13(b) is a front view of the semiconductor device 1D. Fig. 14 is a front view showing a state in which a plurality of semiconductor devices 1D according to the fourth embodiment are connected and fixed to a heat sink 9. In the fourth embodiment, the same components as those described in the first to third embodiments are denoted by the same reference numerals, and description thereof will be omitted.

[0052] 12 to 14, a semiconductor device 1D according to the fourth embodiment is a through-hole package semiconductor device, and in the fourth embodiment, unlike the third embodiment, the heat sink 7 and the heat sink 8 are not provided with screw holes 7a and 8a, respectively. Therefore, the heat sink 7 and the heat sink 8 are joined to the copper pattern 14 via the solder 15.

[0053] It is possible to adopt the arrangement positions of the terminals in the second embodiment in the fourth embodiment.

[0054] As described above, in the semiconductor device 1D according to the fourth embodiment, the heat sink 7 and the heat sink 8 are not provided with the screw holes 7a and 8a for fixing them to the heat sink 9. Therefore, similar to the first embodiment, the semiconductor device 1D can suppress the generation of surge voltage and improve the heat dissipation. Furthermore, since the screws 12 are not used to fix the heat sink 7 and the heat sink 8 to the heat sink 9 via the copper pattern 14, the spacers 11a and 11b are not required.

[0055] <Embodiment 5> Next, a semiconductor device 1E according to a fifth embodiment will be described. Fig. 15 is a perspective view of the semiconductor device 1E according to the fifth embodiment. Fig. 16(a) is a top view of the semiconductor device 1E, and Fig. 16(b) is a front view of the semiconductor device 1E. Fig. 17 is a front view showing a state in which a plurality of semiconductor devices 1E are connected and fixed to a heat sink 9. In the fifth embodiment, the same components as those described in the first to fourth embodiments are denoted by the same reference numerals, and description thereof will be omitted.

[0056] 15 to 17, a semiconductor device 1E according to the fifth embodiment is a through-hole type package semiconductor device, and in the fifth embodiment, unlike the fourth embodiment, a base end 8c of a heat sink 8 extends toward the inner periphery of the sealing resin 2 and is exposed from a surface (Z-direction surface) of the sealing resin 2 opposite to a surface (-Z-direction surface) fixed to a heat sink 9. That is, a part of the heat sink 8 is exposed from the upper surface (Z-direction surface) of the sealing resin 2. This increases the exposed area of ​​the heat sink 8 compared to the first to fourth embodiments.

[0057] It is possible to adopt the structure of the heat sink 8 of the fifth embodiment to the first to third embodiments.

[0058] As described above, in the semiconductor device 1E according to the fifth embodiment, the base end 8c of the heat sink 8 extends toward the inner periphery of the sealing resin 2 and is exposed from the surface (Z-direction surface) of the sealing resin 2 opposite to the surface (-Z-direction surface) fixed to the heat sink 9. Therefore, similar to the first embodiment, the semiconductor device 1E can suppress the occurrence of surge voltage and improve heat dissipation. Furthermore, since the exposed area of ​​the heat sink 8 is larger than in the first to fourth embodiments, it is possible to further improve the heat dissipation of the semiconductor device 1E.

[0059] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate. [Explanation of symbols]

[0060] 1, 1A, 1B, 1C, 1D, 1E semiconductor device, 2 sealing resin, 4 drain terminal, 5 source terminal, 7, 8 heat sink, 7a, 8a screw holes, 8b step, 8c base end, 9 heat sink, 24 cathode terminal, 25 anode terminal.

Claims

1. A semiconductor device connectable to a heat sink, comprising: a semiconductor element having a first electrode and a second electrode; a sealing resin that is formed in a rectangular shape when viewed from above and seals the semiconductor element; a first heat sink electrically connected to the first electrode and protruding from a first side of the sealing resin in a top view; a second heat sink electrically connected to the second electrode and protruding from a second side of the sealing resin opposite to the first side in a top view; a first terminal electrically connected to the first electrode and protruding from the first side of the sealing resin in a top view; a second terminal electrically connected to the second electrode and protruding from the second side of the sealing resin in a top view, The first heat dissipation plate and the second heat dissipation plate are capable of being fixed to the heat sink.

2. one of the first heat sink and the second heat sink has a step; 2. The semiconductor device according to claim 1, wherein a lower surface of the tip end of said one heat sink is positioned at the same height as an upper surface of a base end of said other heat sink.

3. 2. The semiconductor device according to claim 1, wherein said first heat sink and said second heat sink protrude from said sealing resin at the same height position and have no step.

4. 4. The semiconductor device according to claim 1, wherein said first heat dissipation plate and said second heat dissipation plate are each provided with a screw hole for fastening said first heat dissipation plate to said heat sink.

5. 4. The semiconductor device according to claim 3, wherein said first heat dissipation plate and said second heat dissipation plate are not provided with screw holes for fastening said first heat dissipation plate to said heat sink.

6. 6. The semiconductor device according to claim 1, wherein a base end of the second heat sink extends toward an inner periphery of the sealing resin and is exposed from a surface of the sealing resin opposite to a surface fixed to the heat sink.

7. The semiconductor device according to claim 1 , wherein the semiconductor element is a transistor or a diode.

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