Semiconductor device and method for manufacturing the same

By employing support portions on the heat sink to maintain alignment and uniform pressure, the semiconductor device addresses the challenges of heat sink thickness variations, enhancing bonding quality and manufacturing efficiency.

JP7657368B2Active Publication Date: 2025-04-04MITSUBISHI ELECTRIC CORP
View PDF 8 Cites 0 Cited by

Patent Information

Application Number
JP2024517622
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-04-25
Publication Date
2025-04-04
Estimated Expiration
2042-04-25

AI Technical Summary

Technical Problem

In semiconductor devices where an insulating substrate is bonded to a heat sink, variations in the thickness of the heat sink across its in-plane direction cause manufacturing challenges, including uneven pressure application and terminal misalignment due to the insulating substrate's tilt.

Method used

The semiconductor device incorporates a heat sink with varying thickness, where support portions are strategically placed on the heat sink's surface to maintain contact with the insulating substrate, ensuring parallel alignment with the heat sink's surface, thus compensating for thickness variations and ensuring uniform pressure application.

Benefits of technology

This configuration allows for uniform pressure application and improved bonding quality of terminals to the insulating substrate, effectively mitigating the issues arising from heat sink thickness variations during the manufacturing process.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007657368000001
    Figure 0007657368000001
  • Figure 0007657368000002
    Figure 0007657368000002
  • Figure 0007657368000003
    Figure 0007657368000003
Patent Text Reader

Abstract

The present invention provides a semiconductor device which is capable of reducing the problems that are caused by thickness variation of a heat dissipation plate in the in-plane direction. A semiconductor device according to the present invention is provided with a heat dissipation plate, an insulating substrate, a bonding material and a semiconductor element; the insulating substrate is bonded to the upper surface of the heat dissipation plate with the bonding material being interposed therebetween; the semiconductor element is bonded to the upper surface of the insulating substrate; the thickness of the heat dissipation plate varies in the in-plane direction of the heat dissipation plate; a plurality of support parts are provided in a region of the upper surface of the heat dissipation plate, in said region the insulating substrate and the heat dissipation plate being bonded to each other; each one of the plurality of support parts is in contact with the insulating substrate; and the upper surface of the heat dissipation plate and the upper surface of the insulating substrate are not parallel to each other in a region that overlaps with the region where the insulating substrate and the heat dissipation plate are bonded to each other when viewed in plan.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]

[0002] Patent Document 1 proposes an apparatus equipped with a mechanism for correcting the inclination of an object to be bonded in tape bonding to a semiconductor element that is not fixed horizontally. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2007-250571 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the conventional technology, in a semiconductor device in which an insulating substrate is bonded onto a heat sink, if the thickness of the heat sink varies depending on the in-plane position, there is a problem in the manufacturing process. For example, when the heat sink is fixed to the base plate of an ultrasonic bonding device, the insulating substrate is tilted due to the difference in the thickness of the heat sink depending on the in-plane position, so that the terminal pressed vertically against the base plate of the ultrasonic bonding device comes into contact with the tilted insulating substrate on one side, and it is not possible to apply a uniform pressure.

[0005] The present disclosure is devised to solve the above-mentioned problems, and aims to provide a semiconductor device in which an insulating substrate is bonded to a heat sink, which can alleviate problems caused by the thickness of the heat sink varying depending on the in-plane position. [Means for solving the problem]

[0006] The semiconductor device of the present disclosure includes a heat sink, an insulating substrate, a bonding material, and a semiconductor element. The insulating substrate is bonded via the bonding material on the upper surface of the heat sink, the semiconductor element is bonded on the upper surface of the insulating substrate, the thickness of the heat sink varies depending on the in-plane position of the heat sink, and a plurality of support portions are provided in a region on the upper surface of the heat sink where the insulating substrate and the heat sink are bonded. Each of the plurality of support portions is in contact with the insulating substrate, and in a region overlapping the region where the insulating substrate and the heat sink are bonded in plan view, the upper surface of the heat sink and the upper surface of the insulating substrate are not parallel. This is the semiconductor device.

Effects of the Invention

[0007] According to the present disclosure, there is provided a semiconductor device in which an insulating substrate is bonded on a heat sink, and which can reduce problems caused by the thickness of the heat sink varying depending on the in-plane position.

[0008] Also, the objects, features, aspects, and advantages related to the technology disclosed in the present specification will become more apparent from the following detailed description and the accompanying drawings.

Brief Description of the Drawings

[0009] [Figure 1] It is a diagram showing the semiconductor device of Embodiment 1. [Diagram 2] It is a diagram showing a state during the manufacture of the semiconductor device of Embodiment 1. [Diagram 3] It is a diagram showing an enlarged part of the semiconductor device of Embodiment 1 shown in FIG. 1. [Figure 4] It is a diagram showing an enlarged part of the semiconductor device of Embodiment 2. [Diagram 5] It is a diagram showing an enlarged part of the semiconductor device of Embodiment 3. [Figure 6] It is a flowchart of the manufacturing method of the semiconductor device of Embodiment 1.

Modes for Carrying Out the Invention

[0010] <A. Embodiment 1> <A-1. Structure> FIG. 1 is a diagram showing a semiconductor device 10 according to Embodiment 1.

[0011] As shown in FIG. 1, the semiconductor device 10 includes a terminal 11, an insulating substrate 21, a heat sink 31, a bonding material 35, a semiconductor element 41, a bonding material 42, a wire 43, and a plurality of support portions 50.

[0012] The insulating substrate 21 includes an insulating layer 22, a conductor pattern 23, and a conductor pattern 24.

[0013] The conductor pattern 23 is provided on the upper surface of the insulating layer 22. The conductor pattern 24 is provided on the lower surface of the insulating layer 22.

[0014] The material of the insulating layer 22 is, for example, silicon nitride, aluminum nitride, or alumina.

[0015] The materials of the conductor pattern 23 and the conductor pattern 24 are each, for example, copper, aluminum, a copper alloy, or an aluminum alloy.

[0016] The insulating substrate 21 is bonded to the heat sink 31 by a bonding material 35. The lower surface 241 of the conductor pattern 24 and the upper surface 34 of the heat sink 31 are bonded by a bonding material 35. The bonding material 35 is, for example, solder or a sintered material.

[0017] The semiconductor element 41 is bonded to the upper surface of the conductor pattern 23 by a bonding material 42. The bonding material 42 is, for example, solder or a sintered material.

[0018] The terminal 11 is bonded to the conductor pattern 23. Electric power is supplied to the semiconductor element 41 from the outside of the semiconductor device 10 via the terminal 11.

[0019] The heat sink 31 is provided with a screw hole 32. The screw hole 32 is a screw hole for fastening the heat sink 31 to a fin or a surface plate using a screw.

[0020] The material of the heat sink 31 is, for example, copper, aluminum, a copper alloy, or an aluminum alloy. The material of the heat sink 31 may be a composite material. The composite material is, for example, AlSiC or MgSiC.

[0021] The thickness of the heat sink 31 varies depending on the position in the in-plane direction of the heat sink 31 .

[0022] The heat sink 31 has a thickness of, for example, 3 mm to 8 mm.

[0023] For example, the heat sink 31 is thickest at the center of the heat sink 31 in a plan view. The following description will be given assuming this case.

[0024] For example, the thickness of the heat sink 31 decreases from the center of the heat sink 31 toward the outer periphery at a rate of 0.1 mm to 0.5 mm per 100 mm.

[0025] When the heat sink 31 is not fastened to a fin or a base plate, etc., and the lower surface 33 of the heat sink 31 is not pressed against other elements (hereinafter referred to as the non-fastened state), the upper surface 34 of the heat sink 31 is, for example, a flat surface.

[0026] In the unfastened state, the lower surface 33 of the heat sink 31 is, for example, a downwardly convex curved surface.

[0027] In the unfastened state, the lower surface 33 of the heat sink 31 is located lower at the center of the heat sink 31 than at the outer periphery of the heat sink 31 .

[0028] In the unfastened state, the lower surface 33 of the heat sink 31 is located at the lowest position, for example, in the center of the heat sink 31 in a plan view.

[0029] In the unfastened state, the lower surface 33 of the heat sink 31 is shifted upward at a rate of 0.1 mm to 0.5 mm per 100 mm from the center of the heat sink 31 toward the outer periphery in a plan view. In other words, the lower surface 33 of the heat sink 31 has an inclination of about 0.06° to 0.3°, for example.

[0030] The lower surface 33 of the heat sink 31 has a shape, for example, of a part of a sphere.

[0031] For example, when mounting the semiconductor device 10 on a cooling fin of an inverter or the like, the grease between the heat sink 31 and the cooling fin can be spread by pressing the lower surface 33, which is a downwardly convex curved surface, against the cooling fin, and the grease can be thinned to, for example, about several tens of μm. Since the thermal conductivity of grease is low, for example, about several W / mK, thinning the grease in this way improves heat dissipation.

[0032] It is also possible to use a heat sink made by warping a flat plate, that is, a plate with a constant thickness in the in-plane direction, so that the bottom surface is a downwardly convex curved surface, instead of heat sink 31. However, when heat sink 31 is used, it is possible to spread the grease more thinly with higher pressure than when a heat sink made of a flat plate with a warp is used, and the heat dissipation performance can be improved.

[0033] Each support portion 50 is disposed on the upper surface 34 of the heat sink 31 in a region where the insulating substrate 21 is bonded by the bonding material 35. In the present embodiment, each support portion 50 is a spacer 44. The spacer 44 is formed, for example, using aluminum wire as a material.

[0034] Each support portion 50 is in contact with the heat sink 31 and the insulating substrate 21. Therefore, the inclination of the insulating substrate 21 with respect to the heat sink 31 is determined by the height of each support portion 50.

[0035] FIG. 3 is an enlarged view of a portion of the semiconductor device 10 shown in FIG.

[0036] The thickness of the heat sink 31 at the position of the support portion 50 (hereinafter referred to as the support portion 50a) provided at the position closest to the center of the heat sink 31 in a plan view is T1, and the height of the support portion 50a is D. The height of the remaining support portions 50 is, for example, D+H, where H is the difference between the thickness T2 of the heat sink 31 at the position of each support portion 50 and T1 (H=T1-T2). As a result, the distance from the lower surface 33 of the heat sink 31 to the upper end of each support portion 50 at each position of the support portion 50 becomes the same. As a result, when the lower surface 33 of the heat sink 31 is pressed against the mounting surface of the surface plate and the heat sink 31 is deformed to become flat, the mounting surface of the surface plate and the upper surface 231 of the insulating substrate 21 become parallel. Here, the upper surface 231 of the insulating substrate 21 is the upper surface of the conductor pattern 23.

[0037] The height of the supports 50 other than the support 50a is, for example, D+0.9×H or more and D+1.1×H or less, where H is the difference between the thicknesses T2 and T1 of the heat sink 31 at the position of each support 50 (H=T1−T2).

[0038] Since the first support part, which is the support part 50 arranged at a position where the heat sink 31 is thinner, is higher than the second support part, which is the support part 50 arranged at a position where the heat sink 31 is thicker, the influence of differences in the thickness of the heat sink 31 due to the position in the in-plane direction is mitigated.

[0039] Since the thickness of heat sink 31 varies depending on the position in the in-plane direction, without support portion 50, lower surface 33 of heat sink 31 and upper surface 231 of insulating substrate 21 are not parallel. Therefore, without support portion 50, when heat sink 31 is fastened to a fin or a surface plate, or the like, that is, when lower surface 33 of heat sink 31 is pressed against the flat mounting surface of a base, upper surface 231 of insulating substrate 21 is not parallel to the mounting surface of the base.

[0040] In the semiconductor device 10 of the present embodiment, since a plurality of support portions 50 are provided, in a region overlapping with the region where the insulating substrate 21 and the heat sink 31 are joined in a plan view, the upper surface 34 of the heat sink 31 and the upper surface 231 of the insulating substrate 21 are not parallel. The plurality of support portions 50 are provided such that in a region overlapping with the region where the insulating substrate 21 and the heat sink 31 are joined in a plan view, the lower surface 33 of the heat sink 31 and the upper surface 231 of the insulating substrate 21 are closer to being parallel than the upper surface 34 of the heat sink 31 and the upper surface 231 of the insulating substrate 21. Thereby, when the lower surface 33 of the heat sink 31 is pressed against the placement surface of the flat table, for example, the placement surface of the surface plate, the upper surface 231 of the insulating substrate 21 becomes closer to being parallel to the plane compared to the case where there are no plurality of support portions 50. As a result, when joining the terminal 11 to the conductor pattern 23 of the insulating substrate 21, for example, when ultrasonically joining the terminal 11 to the conductor pattern 23 of the insulating substrate 21, the vertical force applied to the terminal 11 is uniformly transmitted by the contact surface between the terminal 11 and the conductor pattern 23, and the quality of the joining between the terminal 11 and the conductor pattern 23 is improved. For example, the joining surface 12 of the terminal 11 is firmly joined to the upper surface 231 of the insulating substrate 21 over the entire surface. In this way, the semiconductor device 10 is a semiconductor device that can reduce the problems caused by the thickness of the heat sink varying depending on the in-plane position.

[0041] When the insulating substrate 21 is inclined, it is also conceivable to use a sensor that measures the inclination of the insulating substrate 21 and correct the direction of applying force to the terminal 11 according to the inclination. However, in such a case, there may occur a problem that the correction function does not work correctly when foreign matter such as metal powder adheres to the portion measured by the sensor. When manufacturing the semiconductor device of the present embodiment, the problems caused by the inclination of the insulating substrate 21 can be reduced without using a sensor that measures the inclination of the insulating substrate 21. However, when manufacturing the semiconductor device of the present embodiment, it is also possible to use a sensor that measures the inclination of the insulating substrate 21, perform correction based on the measurement of the inclination of the insulating substrate 21, and further reduce the influence caused by the inclination of the insulating substrate 21 as a whole.

[0042] <A-2. Manufacturing Method> FIG. 6 is a flowchart showing a method of manufacturing a semiconductor device according to the present embodiment. The method of manufacturing a semiconductor device according to the present embodiment includes steps S1 to S5.

[0043] First, in step S1, a support portion 50 is provided on the upper surface 34 of the heat sink 31.

[0044] Next, in step S2, the insulating substrate 21 is bonded to the upper surface 34 of the heat sink 31 with a bonding material 35.

[0045] Next, in step S3, the semiconductor element 41 is bonded to the insulating substrate 21 with a bonding material 42.

[0046] Next, in step S4, wiring is performed using the wire 43 (see FIG. 2).

[0047] Next, in step S5, from the state shown in FIG. 2, the terminal 11 is ultrasonically bonded onto the upper surface 231 of the insulating substrate 21. Thereby, the semiconductor device 10 shown in FIG. 1 is obtained. In step S5, the heat sink 31 is fastened and fixed to the worktable of the ultrasonic bonding apparatus using a screw, and ultrasonic bonding is performed in a state where the lower surface 33 of the heat sink 31 is pressed against the mounting surface of the worktable having a flat surface. Ultrasonic bonding is performed by pressing the ultrasonic bonding tool against the ultrasonic bonding tool pressing surface 13 of the terminal 11.

[0048] <B. Embodiment 2> FIG. 4 is an enlarged view showing a part of the semiconductor device 10b according to the present embodiment, and is a view corresponding to FIG. 3 of Embodiment 1.

[0049] In the semiconductor device 10b, at least a part of the plurality of support portions 50 is constituted by a spacer 44 and a protrusion 51 provided integrally with the heat sink 31 on the upper surface of the heat sink 31. The semiconductor device 10b is the same as the semiconductor device 10 in other respects.

[0050] In semiconductor device 10b, similarly to semiconductor device 10 of embodiment 1, multiple support parts 50 are provided, so that upper surface 34 of heat sink 31 and upper surface 231 of insulating substrate 21 are not parallel in a region overlapping with a region where insulating substrate 21 and heat sink 31 are joined in a plan view. Multiple support parts 50 are provided so that lower surface 33 of heat sink 31 and upper surface 231 of insulating substrate 21 are closer to parallel than upper surface 34 of heat sink 31 and upper surface 231 of insulating substrate 21 are to each other in a region overlapping with a region where insulating substrate 21 and heat sink 31 are joined in a plan view.

[0051] Support portion 50 (hereinafter referred to as support portion 50a) located at a position closest to the center of heat sink 31 in a planar view does not include a protrusion and is formed by spacer 44, as shown in Figure 4, for example, but support portion 50a may also be formed by spacer 44 and a protrusion 51 formed integrally with heat sink 31 on the upper surface of heat sink 31.

[0052] The thickness of the heat sink 31 at the position of the support portion 50a is T1, and the height of the support portion 50a is D. At the positions of the remaining support portions 50, for example, protrusions 51 having a height H (H=T1-T2) which is the difference between the thickness T2 of the heat sink 31 at the position of each support portion 50 and T1, are provided, and the support portion 50 is constituted by the protrusions 51 and the spacers 44 having a height D arranged on the protrusions 51. As a result, for example, when the lower surface 33 of the heat sink 31 is pressed against the mounting surface of the surface plate and the heat sink 31 is deformed to become flat, the mounting surface of the surface plate and the upper surface of the insulating substrate 21 become parallel. In this way, in the semiconductor device 10b, by changing the height of the protrusions 51 according to the position of the support portion 50, the spacers 44 having the same height can be used at each support portion 50, and the cost of the spacers 44 can be reduced. Here, the use of spacers 44 of the same height in each support portion 50 refers to the case where the height of the highest spacer among the spacers 44 used in the multiple support portions 50 is 1.05 times or less the height of the lowest spacer.

[0053] The heights of the spacers 44 included in each support portion 50 may differ from one another.

[0054] The protrusion 51 is formed, for example, by press working.

[0055] <C. Embodiment 3> FIG. 5 is a diagram showing an enlarged part of the semiconductor device 10c of the present embodiment, and is a diagram corresponding to FIG. 3 of Embodiment 1.

[0056] In the semiconductor device 10c, each of the plurality of support portions 50 is a protrusion 51 provided integrally with the heat sink 31 on the upper surface of the heat sink 31. The semiconductor device 10c is the same as the semiconductor device 10 in other respects.

[0057] Also in the semiconductor device 10c, as in the case of the semiconductor device 10 of Embodiment 1, since a plurality of support portions 50 are provided, in a region overlapping with the region where the insulating substrate 21 and the heat sink 31 are joined in a plan view, the upper surface 34 of the heat sink 31 and the upper surface 231 of the insulating substrate 21 are not parallel. The plurality of support portions 50 are provided such that in a region overlapping with the region where the insulating substrate 21 and the heat sink 31 are joined in a plan view, the lower surface 33 of the heat sink 31 and the upper surface 231 of the insulating substrate 21 are closer to being parallel than the upper surface 34 of the heat sink 31 and the upper surface 231 of the insulating substrate 21.

[0058] In the semiconductor device 10c, the height of the plurality of support portions 50 is determined, for example, as follows. Assuming that the thickness of the heat sink 31 at the position of the support portion 50 (hereinafter referred to as the support portion 50a) provided at the position closest to the center in the plan view of the heat sink 31 is T1 and the height of the support portion 50a is D, then at the positions of the remaining support portions 50, for example, taking the difference between the thickness T2 of the heat sink 31 at the position of each support portion 50 and T1 as H (H = T1 - T2), protrusions 51 having a height of D + H are provided as the support portions 50.

[0059] In the present embodiment, the step of arranging the spacer is unnecessary.

[0060] It should be noted that the respective embodiments can be freely combined, or each embodiment can be appropriately modified or omitted.

Explanation of Reference Numerals

[0061] 10, 10b, 10c semiconductor device, 11 terminal, 12 bonding surface, 13 ultrasonic bonding tool pressing surface, 21 insulating substrate, 22 insulating layer, 23, 24 conductor pattern, 31 heat sink, 32 screw hole, 33, 241 lower surface, 34, 231 upper surface, 35 bonding material, 41 semiconductor element, 42 bonding material, 43 wire, 44 spacer, 50 support portion, 51 protrusion.

Claims

1. A heat sink; An insulating substrate; A bonding material; A semiconductor element; Equipped with the insulating substrate is bonded onto the upper surface of the heat sink via the bonding material, the semiconductor element is bonded onto the upper surface of the insulating substrate; the thickness of the heat sink varies depending on the position in the in-plane direction of the heat sink, a plurality of support portions are provided on the upper surface of the heat sink in a region where the insulating substrate and the heat sink are joined; Each of the plurality of support portions is in contact with the insulating substrate, the upper surface of the heat sink and the upper surface of the insulating substrate are not parallel to each other in a region overlapping a region where the insulating substrate and the heat sink are joined in a plan view; Semiconductor device.

2. 2. The semiconductor device according to claim 1, In a region overlapping a region where the insulating substrate and the heat sink are joined in a plan view, a lower surface of the heat sink and an upper surface of the insulating substrate are closer to being parallel to each other than the upper surface of the heat sink and the upper surface of the insulating substrate. Semiconductor device.

3. 3. The semiconductor device according to claim 1, The lower surface of the heat sink is located lower at the center of the heat sink than at the outer periphery of the heat sink. Semiconductor device.

4. 2. The semiconductor device according to claim 1, The lower surface of the heat sink is a downward convex curved surface. Semiconductor device.

5. 2. The semiconductor device according to claim 1, the heat sink is thinner at a position where a first support portion of the plurality of support portions is arranged than at a position where a second support portion of the plurality of support portions is arranged; The first support portion is higher than the second support portion. Semiconductor device.

6. 2. The semiconductor device according to claim 1, Each of the plurality of support portions is a spacer provided on the upper surface of the heat sink in contact with the upper surface of the heat sink. Semiconductor device.

7. 2. The semiconductor device according to claim 1, Each of the plurality of supports is a support that is a spacer provided on the upper surface of the heat sink in contact with the upper surface of the heat sink, or a support that includes a protrusion provided on the upper surface of the heat sink and integral with the heat sink and a spacer provided on the protrusion. Semiconductor device.

8. 8. The semiconductor device according to claim 7, The spacers included in each of the plurality of support parts have the same height. Semiconductor device.

9. 2. The semiconductor device according to claim 1, Each of the plurality of support portions is a protrusion provided on the upper surface of the heat sink and integral with the heat sink. Semiconductor device.

10. 2. The semiconductor device according to claim 1, Further comprising a terminal; the terminal is ultrasonically bonded onto the top surface of the insulating substrate; Semiconductor device.

11. A method for manufacturing the semiconductor device according to claim 1, comprising the steps of: The semiconductor device further includes a terminal. the insulating substrate and the heat sink are bonded together, and then the heat sink is fixed to a base of an ultrasonic bonding device, and the terminal is ultrasonically bonded onto the upper surface of the insulating substrate. A method for manufacturing a semiconductor device.

Citation Information

Patent Citations

  • Heat dissipating board for hybrid IC

    JP1982160150A

  • Semiconductor module

    JP1995183436A

  • Power semiconductor device

    JP2004228352A

  • Heat insulating board for semiconductor module

    JP2005039081A

  • Tape bonding equipment and method therefor

    JP2007250571A