Semiconductor Device

Abstract

To provide a technique capable of suppressing peeling of solder from a copper block.SOLUTION: A copper block is bonded onto a copper pattern via a first solder, and an electrode terminal is bonded onto a copper block via a second solder. A sealing resin covers the copper pattern, the first solder, the copper block, the second solder, the electrode terminal, and the semiconductor element. The area of the portion of the copper block that is joined with the first solder is larger than the area of the portion of the copper block that is joined with the second solder.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] 2. Description of the Related Art As a semiconductor device such as a power semiconductor device, a semiconductor device in which a semiconductor element and a copper block, which is a conductive block having a relatively large thickness, are sealed with a sealing resin has been proposed (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2013-131592 A Summary of the Invention [Problem to be solved by the invention]

[0004] Semiconductor devices are required to operate in high-temperature environments. However, when a sealing resin for high-temperature operation is cured during manufacturing, the temperature difference between the temperature at which the resin begins to cure and room temperature is large, so the stress of thermal expansion and contraction of the sealing resin is relatively large. As a result, the stress of the sealing resin is concentrated on the solder used to join the copper block, and there is a possibility that the solder will peel off from the copper block.

[0005] Therefore, the present disclosure has been made in consideration of the above-mentioned problems, and has an object to provide a technique capable of preventing the solder from peeling off from the copper block. [Means for solving the problem]

[0006] A semiconductor device according to the present disclosure includes a copper pattern, a copper block joined onto the copper pattern via a first solder, an electrode terminal joined onto the copper block via a second solder, a semiconductor element electrically connected to the copper pattern, and a sealing resin covering the copper pattern, the first solder, the copper block, the second solder, the electrode terminal, and the semiconductor element. a wire connected to the semiconductor element; an area of ​​a portion of the copper block that is joined with the first solder is larger than an area of ​​a portion of the copper block that is joined with the second solder; and the upper end of the sealing resin above the portion of the electrode terminal that is joined with the second solder is lower than the highest portion of the wire. stomach. Effect of the Invention

[0007] According to the present disclosure, a copper block is bonded onto a copper pattern via a first solder, an electrode terminal is bonded onto the copper block via a second solder, and the area of ​​the portion of the copper block bonded with the first solder is larger than the area of ​​the portion of the copper block bonded with the second solder. With this configuration, it is possible to prevent the solder from peeling off from the copper block. [Brief description of the drawings]

[0008] [Figure 1] 1 is a cross-sectional view showing a configuration of a semiconductor device according to a first embodiment. [Diagram 2] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device according to a second embodiment. [Diagram 3] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device according to a third embodiment. [Figure 4] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device according to a fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments will be described with reference to the accompanying drawings. The features described in each of the following embodiments are merely examples, and not all features are necessarily required. In addition, in the following description, similar components in multiple embodiments are given the same or similar reference numerals, and different components are mainly described. In addition, in the following description, specific positions and directions such as "upper", "lower", "left", "right", "front" or "back" do not necessarily correspond to positions and directions in actual implementation.

[0010] <Embodiment 1> Fig. 1 is a cross-sectional view showing the configuration of a semiconductor device according to the present embodiment 1. The semiconductor device in Fig. 1 includes an insulating base substrate 1, a copper pattern 2, a first solder 3, a copper block 4, a second solder 5, an electrode terminal 6, a third solder 7, a semiconductor element 8, a wire 9, an electrode terminal 10, an adhesive member 11, a case 12, and a sealing resin 13.

[0011] The insulating base substrate 1 includes a copper base plate 1a and a resin insulating layer 1b. The resin insulating layer 1b is provided on the copper base plate 1a and is integrated with the copper base plate 1a.

[0012] The copper pattern 2 is provided on the resin insulating layer 1b. The copper pattern 2 may be included in the insulating base substrate 1.

[0013] The copper block 4 is joined onto the copper pattern 2 via the first solder 3. In the present embodiment 1, the thickness of the copper block 4 is greater than the thickness of the copper pattern 2.

[0014] The electrode terminal 6 is joined onto the copper block 4 via the second solder 5. The area of ​​the portion of the copper block 4 joined with the first solder 3 is larger than the area of ​​the portion of the copper block 4 joined with the second solder 5.

[0015] The semiconductor element 8 includes at least one of a semiconductor switching element and a diode. The semiconductor switching element is, for example, an IGBT (Insulated Gate Bipolar Transistor), an RC-IGBT (Reverse Conducting - IGBT), or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and the diode is, for example, a PND (PN junction diode) or an SBD (Schottky Barrier Diode). In the following, a case where the semiconductor element 8 is a semiconductor switching element will be described as an example.

[0016] The material of the semiconductor element 8 may be ordinary silicon (Si) or a wide band gap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), diamond, etc. When the material of the semiconductor element 8 is a wide band gap semiconductor, stable operation under high temperature and high voltage and high switching speed are possible.

[0017] The semiconductor element 8 is electrically connected to the copper pattern 2. In the present embodiment 1, the semiconductor element 8 is electrically connected to the copper pattern 2 by being joined to the copper pattern 2 via the third solder 7. As a result, the semiconductor element 8 is electrically connected to the copper block 4 and the electrode terminal 6 via the copper pattern 2, and the electrode terminal 6 functions as, for example, a collector electrode of the semiconductor element 8.

[0018] The semiconductor element 8 is electrically connected to an electrode terminal 10 via a wire 9, and the electrode terminal 10 functions, for example, as an emitter electrode of the semiconductor element 8. The wire 9 is made of, for example, aluminum. A circuit is formed in the space surrounded by the case 12 by the connection of the wire 9 and the joining of the first solder 3, the second solder 5, and the third solder 7.

[0019] Case 12 is bonded to an end of insulating base substrate 1 with adhesive member 11. Case 12 is made of, for example, insulating resin. In the example of FIG. 1, the center of electrode terminal 6 and the center of electrode terminal 10 are embedded in case 12.

[0020] The sealing resin 13 fills the space surrounded by the case 12 and covers the copper pattern 2, the first solder 3, the copper block 4, the second solder 5, the electrode terminals 6, and the semiconductor element 8. The sealing resin 13 has a glass transition temperature (Tg) that exceeds the operating temperature of the semiconductor element 8.

[0021] <Summary of the first embodiment> In the semiconductor device according to the first embodiment, the area of ​​the portion of the copper block 4 joined with the first solder 3 is larger than the area of ​​the portion of the copper block 4 joined with the second solder 5. With this configuration, the joining area between the first solder 3 and the copper block 4 is relatively large, so that it is possible to prevent the first solder 3 from peeling off from the copper block 4.

[0022] On the other hand, the second solder 5 is located closer to the upper surface of the sealing resin 13 than the first solder 3. The closer the second solder 5 is to the upper surface of the sealing resin 13, the more the stress of the sealing resin 13 can be released into the space above the sealing resin 13, so the stress that the second solder 5 receives from the sealing resin 13 is lower than the stress that the first solder 3 receives from the sealing resin 13. Therefore, even if the bonding area between the second solder 5 and the copper block 4 is relatively small, it is possible to prevent the second solder 5 from peeling off from the copper block 4.

[0023] Moreover, in the present embodiment 1, the thickness of the copper block 4 is greater than the thickness of the copper pattern 2. With this configuration, the second solder 5 can be brought even closer to the upper surface of the sealing resin 13, which can further prevent the second solder 5 from peeling off from the copper block 4. In addition, the contact area between the copper block 4 and the sealing resin 13 becomes relatively large, which can prevent the sealing resin 13 from peeling off from the copper block 4.

[0024] <Embodiment 2> 2 is a cross-sectional view showing the configuration of a semiconductor device according to the present embodiment 2. In the present embodiment 2, unevenness 4a is provided on the surface of the copper block 4 that is joined with the second solder 5. In other words, the surface of the copper block 4 that is joined with the second solder 5 is roughened.

[0025] The range of the unevenness 4a may be any range that can be wetted by the second solder 5, and may be, for example, a circular range with a diameter of 200 to 300 μm, or a rectangular range with one side of 200 to 300 μm. The step of the unevenness 4a is, for example, about 200 μm, and the unevenness 4a is formed by, for example, router processing. Apart from the above, the configuration of the present embodiment 2 is the same as that of the embodiment 1.

[0026] The semiconductor device according to the second embodiment as described above can provide the same effects as those of the first embodiment. Furthermore, in the second embodiment, the irregularities 4a of the copper block 4 provide an anchor effect between the second solder 5 and the copper block 4, so that the second solder 5 can be prevented from peeling off from the copper block 4.

[0027] Although not shown, the surface of the electrode terminal 6 to be joined with the second solder 5 may also be provided with irregularities, thereby preventing the second solder 5 from peeling off from the electrode terminal 6.

[0028] <Embodiment 3> 3 is a cross-sectional view showing the configuration of a semiconductor device according to the third embodiment. In FIG. 3, the position of the upper surface of the sealing resin 13 in the first embodiment is indicated by a two-dot chain line. In the third embodiment, the thickness D of the sealing resin 13 above the portion of the electrode terminal 6 that is joined by the second solder 5 is 2.0 mm or more and 2.5 mm or less. In other words, the thickness D from the upper portion of the electrode terminal 6 that is not in contact with the second solder 5 to the upper surface of the sealing resin 13 is 2.0 mm or more and 2.5 mm or less, which is relatively thin. Except for the above points, the configuration of the third embodiment is the same as that of the first embodiment.

[0029] According to the semiconductor device of the third embodiment as described above, it is possible to obtain the same effects as those of the first embodiment. Furthermore, in the third embodiment, the thickness D of the sealing resin 13 above the portion of the electrode terminal 6 joined by the second solder 5 is relatively thin, so that the stress that the second solder 5 receives from the sealing resin 13 can be reduced, and the second solder 5 can be prevented from peeling off from the copper block 4. Furthermore, the hardening of the sealing resin 13 can be promoted. The configuration of the third embodiment may also be applied to the second embodiment.

[0030] <Fourth embodiment> FIG. 4 is a cross-sectional view showing the configuration of a semiconductor device according to the fourth embodiment. In the fourth embodiment, a coating film 14 is provided between the copper block 4 and the sealing resin 13. In the example of FIG. 4, the coating film 14 is also provided between each of the resin insulating layer 1b, the copper pattern 2, the semiconductor element 8, and the wire 9 and the sealing resin 13. The material of the coating film 14 is, for example, polyimide, and the thickness of the coating film 14 is, for example, 100 nm or less. The thermal expansion coefficient of the coating film 14 is preferably equal to the thermal expansion coefficient of copper. Except for the above points, the configuration of the fourth embodiment is the same as that of the first embodiment.

[0031] According to the semiconductor device of the fourth embodiment as described above, the same effects as those of the first embodiment can be obtained. Furthermore, in the fourth embodiment, the coating film 14 can increase the adhesion between the copper block 4 and the sealing resin 13, so that the sealing resin 13 can be prevented from peeling off from the copper block 4. According to the configuration as shown in FIG. 4, the sealing resin 13 can be prevented from peeling off from the resin insulating layer 1b, the copper pattern 2, the semiconductor element 8, and the wires 9. The configuration of the fourth embodiment may also be applied to the second and third embodiments.

[0032] It should be noted that the embodiments and modifications may be freely combined, and the embodiments and modifications may be modified or omitted as appropriate. [Explanation of symbols]

[0033] 2 copper pattern, 3 first solder, 4 copper block, 4a unevenness, 5 second solder, 6 electrode terminal, 8 semiconductor element, 13 sealing resin, 14 coating film.

Claims

1. Copper pattern, a copper block joined onto the copper pattern via a first solder; an electrode terminal joined onto the copper block via a second solder; a semiconductor element electrically connected to the copper pattern; a sealing resin that covers the copper pattern, the first solder, the copper block, the second solder, the electrode terminals, and the semiconductor element; A wire connected to the semiconductor element; Equipped with an area of ​​a portion of the copper block joined with the first solder is larger than an area of ​​a portion of the copper block joined with the second solder; a top end of the sealing resin above a portion of the electrode terminal that is joined with the second solder is lower than a highest portion of the wire.

2. 2. The semiconductor device according to claim 1, The semiconductor device, wherein the thickness of the copper block is greater than the thickness of the copper pattern.

3. 3. The semiconductor device according to claim 1, The semiconductor device further comprises a surface of the copper block to be joined with the second solder, the surface being provided with projections and recesses.

4. 4. The semiconductor device according to claim 1, a thickness of the sealing resin on a portion of the electrode terminal joined with the second solder is 2.0 mm or more and 2.5 mm or less.

5. 5. The semiconductor device according to claim 1, The semiconductor device further comprises a coating film containing polyimide provided between the copper block and the sealing resin.

Images