Defect inspection system and defect inspection method

Abstract

To provide a defect inspection system and the like for inspecting the presence / absence of defects of objects to be inspected in units of dice.SOLUTION: A defect inspection system 100 comprises: an image generating section 3a for irradiating an object T1 to be inspected including dice D1 joined to a semiconductor wafer W1 with ultrasonic sound or X ray to acquire an inspection target image; a defect detection section 3b for comparing the acquired inspection target image with a reference image indicating an image where dice D1 are appropriately joined to a semiconductor wafer W1 to detect a defect region; and a defect classification section 3c for analyzing the defect region by referring to design information on the dice D1 to determine the presence / absence of defects in units of dice.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a defect inspection system and the like. [Background technology]

[0002] A known technology for inspecting for the presence or absence of defects based on an image of an object to be inspected is, for example, that described in Patent Document 1. That is, Patent Document 1 describes that "the brightness of an image of the object to be inspected is collated with that of a reference image to calculate a defect probability, and the calculated defect probability is compared with a created multi-value mask to detect defects." [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2017-72501 A Summary of the Invention [Problem to be solved by the invention]

[0004] For example, when the object to be inspected is a semiconductor wafer in which multiple regularly-arranged dies are bonded, the technology described in Patent Document 1 makes it difficult to inspect each die for defects, and there is room for improvement.

[0005] Therefore, an object of the present invention is to provide a defect inspection system that inspects an object to be inspected for defects on a die-by-die basis. [Means for solving the problem]

[0006] In order to solve the above-mentioned problems, the defect inspection system of the present invention comprises an inspection image acquisition unit that irradiates an object to be inspected, which is an object having a die bonded to a semiconductor wafer, with ultrasound or X-rays to acquire an image of the object to be inspected, a defect area detection unit that compares the acquired image of the object to be inspected with a reference image that shows an image of the die properly bonded to the semiconductor wafer to detect defective areas, and a defect analysis unit that determines the presence or absence of defects on a die-by-die basis by analyzing the defective areas with reference to design information of the die. Effect of the Invention

[0007] According to the present invention, it is possible to provide a defect inspection system that inspects an object to be inspected for defects on a die-by-die basis. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is an explanatory diagram of a defect inspection system according to a first embodiment. [Diagram 2] 1 is a configuration diagram of a defect inspection system according to a first embodiment. [Diagram 3] 2 is an explanatory diagram showing types of defects in an object to be inspected in the defect inspection system according to the first embodiment. FIG. [Figure 4] 4 is an example of an image of a bonding surface of an object to be inspected in the defect inspection system according to the first embodiment. [Figure 5A] 4 is an image showing an example of a reference image used in the defect inspection system according to the first embodiment. [Figure 5B] 1 is an image showing an example of die design information used in the defect inspection system according to the first embodiment. [Figure 6] 4 is a flowchart relating to processing of the defect inspection system according to the first embodiment. [Figure 7] 4 is an example of images for each type of defect in the defect inspection system according to the first embodiment. [Figure 8] 4 is an example of an image showing a detection result of a defect in an inspected object in the defect inspection system according to the first embodiment. [Figure 9]4A to 4C are explanatory diagrams relating to a detection result in the case of incomplete bonding, which is one type of die defect, in the defect inspection system according to the first embodiment. [Figure 10] FIG. 11 is an explanatory diagram of a defect inspection system according to a second embodiment. [Figure 11] 13 is an explanatory diagram relating to processing by an image processing unit included in a defect inspection system according to a second embodiment. FIG. [Figure 12] FIG. 13 is a plan view of an object to be inspected in the defect inspection system according to the third embodiment. [Figure 13] 13 is an explanatory diagram relating to processing by an image processing unit included in a defect inspection system according to a third embodiment. FIG. [Figure 14] FIG. 13 is an explanatory diagram showing the results of comparing the luminance of each pixel of a reference image and a die image in a comparative example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] First Embodiment FIG. 1 is an explanatory diagram of a defect inspection system 100 according to the first embodiment. The defect inspection system 100 shown in Fig. 1 is a system that inspects the presence or absence of defects in an object to be inspected T1. In addition, the defect inspection system 100 also has a function of identifying the type of defect when the object to be inspected T1 has a defect. In the first embodiment, as an example, a defect inspection of an object to be inspected T1 having a configuration in which a plurality of dies D1 arranged in a predetermined manner are bonded to a semiconductor wafer W1 (die-to-wafer bonding) will be described. Note that a "die" is a chip-shaped semiconductor on which a predetermined circuit is formed.

[0010] The test object T1 shown in FIG. 1 is a hybrid bonded semiconductor wafer in which electrodes formed on the surface of a semiconductor wafer W1 and electrodes formed on the surface of a die D1 are bonded. Such a hybrid bonded semiconductor wafer is formed by heating a copper electrode on the surface of the semiconductor wafer W1 and a copper electrode on the surface of the die D1 in a state of facing each other. In the example of FIG. 1, a plurality of rectangular dies D1 are bonded to the surface of a disk-shaped semiconductor wafer W1 in a state of being arranged vertically and horizontally. The copper electrodes of the semiconductor wafer W1 and the die D1 are slightly recessed, but when the semiconductor wafer W1 and the die D1 are heated in a state of being pressed against each other, the copper electrodes thermally expand and are bonded by mutual diffusion. The method of achieving high integration of circuits by bonding the semiconductor wafer W1 and the die D1 in this way is called hybrid bonding.

[0011] Among the many dies D1 bonded to the semiconductor wafer W1, some may be bonded in an inclined state with respect to the surface of the semiconductor wafer W1, or may be bonded in a warped state. Also, it may happen that the die D1 is not present at a location on the semiconductor wafer W1 where it should be bonded. Therefore, in the first embodiment, the defect inspection system 100 is configured to identify the type of such defects on a die-by-die basis (referred to as "die defects").

[0012] As shown in Fig. 1, the defect inspection system 100 includes a detection unit 1, an A / D converter 2, an image processing unit 3, and a control unit 4. The detection unit 1 irradiates an object T1 with ultrasonic waves and generates a predetermined reflection intensity signal based on the reflected waves. As shown in Fig. 1, the detection unit 1 includes an ultrasonic probe 1a and a flaw detector 1b. The ultrasonic probe 1a irradiates the object T1 with ultrasonic waves based on a pulse signal from the flaw detector 1b, and further receives the reflected waves from the object T1.

[0013] Ultrasonic waves propagating inside the object T1 are reflected by the boundary surface with different acoustic impedance. Also, since the intensity of the reflected waves differs depending on the presence or absence of defects in the object T1, defects in the object T1 can be revealed by imaging the reflected intensity signal. In particular, most of the ultrasonic waves are reflected at the location where there is a gap at the bonding surface between the die D1 and the semiconductor wafer W1, so defects such as peeling of the die D1 can be detected with high sensitivity.

[0014] The flaw detector 1b outputs a pulse signal to the ultrasonic probe 1a, thereby causing the ultrasonic probe 1a to irradiate ultrasonic waves toward the test object T1. The flaw detector 1b also converts the reflected wave received by the ultrasonic probe 1a into a predetermined reflection intensity signal.

[0015] The A / D converter 2 converts the reflection intensity signal (analog signal) input from the flaw detector 1b into predetermined waveform data (digital signal). The image processing unit 3 inspects the presence or absence of defects in the inspection object T1 based on the waveform data input from the A / D converter 2, and identifies the type of defect. As shown in Fig. 1, the image processing unit 3 includes an image generating unit 3a (inspection image acquiring unit), a defect detecting unit 3b (defect area detecting unit), and a defect classifying unit 3c (defect analyzing unit).

[0016] The image generating unit 3a generates image data of the bonding surface of the object to be inspected T1 based on the waveform data input from the A / D converter 2. Specifically, the image generating unit 3a extracts the maximum value of reflection intensity from the waveform data, and further converts it into a predetermined brightness value to generate image data of the bonding surface of the object to be inspected T1. That is, the image generating unit 3a (inspection image acquiring unit) irradiates ultrasonic waves (or X-rays) to the object to be inspected T1, which is an object to be inspected in which a die D1 is bonded to a semiconductor wafer W1, to acquire an inspection target image.

[0017] The defect detection unit 3b (defective area detection unit) detects a defective area by comparing the acquired inspection target image with a reference image showing an image in which the die D1 is properly bonded to the semiconductor wafer W1. The defect classification unit 3c (defect analysis unit) refers to the die design information (design information) of the die D1 and analyzes the defect area to determine the presence or absence of a defect on a die-by-die basis. The defect classification unit 3c also generates data on the type of defect and an image for observation of the bonding surface, and outputs this data to the control unit 4.

[0018] The control unit 4 is, for example, a microcomputer, and includes a RAM (Random Access Memory) which is a volatile storage element, a ROM (Read Only Memory) which is a non-volatile storage element, and a CPU (Central Processing Unit) which performs predetermined calculations. The control unit 4 reads out a program stored in the ROM and loads it into the RAM, and the CPU executes various processes. The control unit 4 has a function of displaying data output from the defect classification unit 3c on a display device 8 (see FIG. 2), as well as controlling the detection unit 1, the A / D converter 2, and the image processing unit 3.

[0019] FIG. 2 is a configuration diagram of the defect inspection system 100. The detection unit 1 shown in FIG. 2 includes the ultrasonic probe 1a and the flaw detector 1b, as well as a scanner stand 1c, a water tank 1d, a scanner 1e, and a holder 1f. The scanner stand 1c is a horizontal base on which the water tank 1d and the scanner 1e are placed. The water tank 1d is a container for immersing the test object T1 in water (the water surface is shown by a broken line in FIG. 2), and is installed on the scanner stand 1c. The test object T1 is placed on the bottom of the water tank 1d, and water is stored up to a predetermined position higher than the test object T1. The water is a medium for propagating ultrasonic waves from the ultrasonic probe 1a to the test object T1. As described above, the test object T1 is a semiconductor wafer W1 (see FIG. 1) to which a plurality of dies D1 (see FIG. 1) are bonded.

[0020] The scanner 1e is a device for moving the ultrasonic probe 1a in the x-axis, y-axis, and z-axis directions, and is installed on the scanner table 1c while straddling the water tank 1d. The holder 1f holds the ultrasonic probe 1a. The scanner 1e irradiates ultrasonic waves in a predetermined measurement range while moving the ultrasonic probe 1a in the x-axis and y-axis directions (horizontal direction). As a result, two-dimensional image data (image data of the joint surface of the test object T1) in the predetermined measurement range is generated by the image generation unit 3a.

[0021] In addition to the above-mentioned configuration, the detection unit 1 includes a parameter setting unit 3d. The parameter setting unit 3d reads parameters such as measurement conditions input by a user through an input device (not shown) from the database 6, and outputs the parameters to the defect detection unit 3b and the defect classification unit 3c.

[0022] The defect inspection system 100 further includes a mechanical controller 5, a database 6, a storage unit 7, and a display device 8. The mechanical controller 5 moves the scanner 1e in the x-axis, y-axis, and z-axis directions. The database 6 stores parameters such as measurement conditions when inspecting the object T1 for defects.

[0023] The memory unit 7 stores the processing results of the image processing unit 3 and the control unit 4. For example, the types of defects detected by the image processing unit 3 are stored in the memory unit 7 in association with image data of the defects. The display device 8 displays the processing results of the image processing unit 3 and the control unit 4 in a predetermined manner. For example, the display device 8 displays images and the number of defects in the object T1, as well as the positions and dimensions of the defects.

[0024] FIG. 3 is an explanatory diagram showing types of defects in the inspection object T1. The left edge of Fig. 3 shows a state in which the die D1 is properly bonded to the semiconductor wafer W1. The types of defects in the inspected object T1 are broadly classified into die defects and random defects. A "die defect" is a defect that occurs on a die-by-die basis due to a bonding error between the die D1 and the semiconductor wafer W1. As examples of such "die defects," Fig. 3 shows a "no die" defect F1, a "floating die" defect F2, an "incompletely bonded die" defect F3, and a "warped die" defect F4.

[0025] The "missing die" defect F1 is a defect in which the die D1 is missing from the semiconductor wafer W1. In other words, the "missing die" defect F1 is a defect in which the die D1 is not present in the original position on the semiconductor wafer W1. The "floating die" defect F2 is a defect in which the die D1 is bonded in a floating state from the semiconductor wafer W1. The "incomplete bonding" defect F3 is a defect in which a part of the die D1 is not bonded to the semiconductor wafer W1, the bonding position of the die D1 on the semiconductor wafer W1 is not appropriate, or there is a gap between the die D1 and the semiconductor wafer W1. The "incomplete bonding" defect F3 also includes a case in which at least a part of the die D1 is bonded in a tilted state with respect to the surface of the semiconductor wafer W1. The "deformed die" defect F4 is a defect in which the die D1 is bonded to the semiconductor wafer W1 in a warped state (distorted state). Other types of die defects, such as a foreign object between the die D and the semiconductor wafer W1, can also be identified. These die defects are bonding defects that occur on a die-by-die basis, which are specific to die-to-wafer bonding.

[0026] The above-mentioned "random defect" is a defect that may occur randomly between the semiconductor wafer W1 and the die D1. As examples of such "random defects," FIG. 3 shows a "void" defect F5 and a "crack" defect F6. The "void" defect F5 is a relatively large gap that occurs across multiple dies D1. The "crack" defect F6 is a minute gap that occurs on the bonding surface between the semiconductor wafer W1 and the die D1. These two types of defects (random defects) may occur in bonding forms other than die-to-wafer bonding, but may also occur in die-to-wafer bonding. The defect classification unit 3c (defect analysis unit: see FIG. 1) has a function of determining the presence or absence of defects (random defects) caused by voids or cracks in addition to defects in die units.

[0027] FIG. 4 is an example of an image of the bonding surface of the test object T1. The example of FIG. 4 shows an image of a bonding surface when a plurality of rectangular dies D1 are arranged vertically and horizontally and bonded to a disk-shaped semiconductor wafer W1. The area surrounded by a dashed frame K1 in FIG. 4 corresponds to one die D1. It is assumed that the circuit structures of the plurality of dies D1 bonded to one semiconductor wafer W1 are the same. In the example of FIG. 4, in addition to a white rectangular area, there are circular, elliptical, and triangular areas. The type of defect is identified based on the position, size, shape, and brightness of these areas as well as the circuit pattern of the die D1.

[0028] FIG. 5A is an image showing an example of the reference image. In addition, in FIG. 5A, the circuit pattern of the die D1 (see FIG. 4) is shown in a simplified form. The "reference image" shown in FIG. 5A is a partial image of the state in which the die D1 is properly bonded to the semiconductor wafer W1. The reference image may be generated by statistical processing based on the image of the inspected object T1 (see FIG. 4). As such statistical processing, for example, a method using μ_brightness, which is a statistical feature, may be mentioned.

[0029] When using μ_brightness, the defect inspection system 100 performs the calculation of the following formula (1) for the position (x, y) of each pixel of a plurality of die images included in the image of the object T1 to be inspected. Note that the "die image" is an image of a region (die region) corresponding to one die D1 included in the object T1 to be inspected. For example, the partial image surrounded by the dashed frame K1 in FIG. 4 is the "die image". d1(x, y) to dN(x, y) included in formula (1) are the luminance values ​​at the positions (x, y) in each die image. Also, "maxCounter" is a filter used when determining the most frequent luminance value based on the luminance values ​​d1(x, y) to dN(x, y). The defect inspection system 100 generates a reference image G(x, y) based on the most frequent luminance value at the position (x, y) in the die image.

[0030]

number

[0031] Such data of the reference image G(x,y) is used when comparing the die image with the reference image in defect inspection. The data of the reference image G(x,y) is stored in the database 6 (see FIG. 2) in association with the type of the die D1.

[0032] FIG. 5B is an image showing an example of die design information. "Die design information" refers to data including the position, shape, and brightness of a die area corresponding to one die D1 (see FIG. 4), as well as pattern structure information of the die area. Here, the "position" of the die area refers to data indicating the relative position of the die area (area within the dashed frame K1 in FIG. 5B) with respect to one image (image in FIG. 5B) when the image of the inspected object T1 (see FIG. 4) is divided into a predetermined number of pixels in the vertical and horizontal directions. Since an image obtained by regularly cutting out the die D1 one by one from the image of the inspected object T1 (see FIG. 4) may contain parts other than the die D1, the relative "position" of the die area is specified.

[0033] The "shape" of the die area included in the die design information is the shape of the dashed frame K1 shown in FIG. 5B. Moreover, the "pattern structure information" included in the die design information is information indicating the circuit pattern of the die area. For example, design data of the die D1 is used as such pattern structure information. The pattern structure information may be generated based on texture features of the reference image (see FIG. 5A). Such texture features include the density and orientation of a predetermined pattern included in the reference image, as well as pattern pitch, pattern brightness value, etc.

[0034] Alternatively, the pattern structure information of the die region may be represented by a predetermined brightness gradient code. That is, for each pixel of the reference image or die image, a 5-bit brightness gradient code from 0 to 16 may be generated by searching for a direction in which the brightness gradient is maximum among the surrounding 8 neighboring pixels. That is, the brightness gradient code is a 5-bit code representing the circuit pattern of the die D1. The die design information including such pattern structure information is used when inspecting the object T1 for defects.

[0035] FIG. 6 is a flowchart relating to the processing of the defect inspection system 100 (also see FIG. 1 as appropriate). At the time of "START" in FIG. 6, it is assumed that image data (image of inspection object) in the case where the object T1 is irradiated with ultrasonic waves has been generated by the image generating unit 3a (inspection image acquisition process). In step S101, the defect inspection system 100 extracts an image of each die D1 from the image of the object to be inspected T1. For example, the defect inspection system 100 extracts rectangular images each including one die D1 by dividing the image of the object to be inspected T1 shown in Fig. 4 into a predetermined number of pixels in the vertical and horizontal directions. Identification information of the die D1 is associated with each of these rectangular images.

[0036] In step S102, the defect inspection system 100 selects one of the multiple dies D1 included in the object to be inspected T1. In step S103, the defect inspection system 100 extracts a die image from the image including the die D1 selected in step S102. As described above, a "die image" is an image of a die area corresponding to one die D1.

[0037] In step S104, defect inspection system 100 detects a defect area from the die image by defect detection unit 3b. That is, defect inspection system 100 detects a defect area by comparing a predetermined reference image with the image to be inspected (defect area detection process). As a result, a group of pixels in the die image that have a different luminance from the pixels in the reference image are detected as a predetermined defect area.

[0038] In step S105, the defect inspection system 100 extracts pattern structure information. For example, the defect inspection system 100 extracts the pattern structure information of the die image by expressing the texture feature of the die image extracted in step S103 with a predetermined brightness gradient code. In the same manner, the pattern structure information of the reference image (see FIG. 5A) is also extracted.

[0039] In step S106, defect inspection system 100 determines whether the pattern matching rate (matching rate) of the die image with respect to the reference image is higher than a predetermined value P0. Note that the "pattern matching rate" is a numerical value indicating the degree to which the circuit pattern of the die image matches the circuit pattern of the reference image. For example, the pattern matching rate is calculated based on whether the luminance gradient signs of corresponding positions in the reference image and the die image match.

[0040] If the pattern matching rate is higher than the predetermined value P0 in step S106 (S106: Yes), the process of defect inspection system 100 proceeds to step S107. In step S107, the defect inspection system 100 determines "no defect" by the defect classification unit 3c. That is, the defect inspection system 100 determines that, for the die D1 selected in step S102, no defect exists on the bonding surface with the semiconductor wafer W1.

[0041] Also, if the pattern matching rate is less than or equal to the predetermined value P0 in step S106 (S106: No), the defect classification unit 3c determines that there is some defect on the bonding surface between the die D1 and the semiconductor wafer W1, and proceeds to the processing of step S108, although this is omitted in FIG. 6. In step S108, the defect inspection system 100 determines whether or not the pattern matching rate of the die image to the reference image is less than a predetermined value P1 (first predetermined value). Note that the predetermined value P1 is a threshold value for the pattern matching rate, and is set in advance as a threshold value lower than the predetermined value P0 used in step S106.

[0042] In step S108, if the pattern matching rate of the die image with respect to the reference image is less than the predetermined value P1 (S108: Yes), the process of defect inspection system 100 proceeds to step S109. In step S109, the defect inspection system 100 determines whether or not the contour matching rate between the flat brightness region of the die image and the die region is higher than a predetermined value M1 (a second predetermined value). Note that the "contour matching rate" is a numerical value indicating the degree to which the contour positions of the two shapes approximately match.

[0043] For example, in the "no die" image shown in Fig. 7, substantially all of the pixels within the dashed frame K1 are black. Also, for example, in the "floating die" image shown in Fig. 7, substantially all of the pixels within the dashed frame K1 are white. In this way, a region in the die image where the brightness difference between adjacent pixels is equal to or less than a predetermined value is a "flat brightness region." The "flat brightness region" substantially coincides with a defect region in the bonding surface between the die D1 and the semiconductor wafer W1.

[0044] In step S109 of FIG. 6, if the contour matching rate between the flat luminance region of the die image and the die region is higher than the predetermined value M1 (S109: Yes), the process of defect inspection system 100 proceeds to step S110. In step S110, defect inspection system 100 determines whether the average luminance of a defect region (flat luminance region) included in the die image is less than a predetermined value L1 (third predetermined value). If the average luminance of the defect region is less than the predetermined value L1 (S110: Yes), the process of defect inspection system 100 proceeds to step S111.

[0045] In step S111, the defect inspection system 100 uses the defect classification unit 3c to determine that the type of defect is "no die". In this way, when the pattern matching rate (matching rate) of the circuit pattern of the die image to the normal circuit pattern of the die D1 is less than a predetermined value P1 (first predetermined value) (S108: Yes), and the following condition is further satisfied, the defect classification unit 3c determines that the type of defect is "no die". That is, when the contour matching rate between the contour of the flat brightness region of the die image and the contour of the die image is higher than a predetermined value M1 (second predetermined value) (S109: Yes), and further, the average brightness of the defect region is less than a predetermined value L1 (third predetermined value) (S110: Yes), the defect classification unit 3c determines that the die D1 is not present in its original position on the semiconductor wafer W1 (i.e., "no die") (S111).

[0046] FIG. 7 shows example images for each type of defect. In the "no die" case shown in Fig. 7, the die D1 is not present at the position where it should be joined, and there is no joining surface that reflects ultrasonic waves, so as a result, almost the entire image of the die area is black. Note that in both the "no die" and "floating die" cases, the contour matching rate (S109 in Fig. 6) is close to "1", but the average brightness of the defect area is different (S110 in Fig. 6).

[0047] In step S110 of FIG. 6, if the average luminance value of the defective area is equal to or greater than the predetermined value L1 (S110: No), the process of defect inspection system 100 proceeds to step S112. In step S112, the defect inspection system 100 uses the defect classification unit 3c to determine that the type of defect is "die floating." In other words, the defect classification unit 3c determines that most of the die D1 is floating from the semiconductor wafer W1. In the "die floating" shown in FIG. 7, a gap exists between the die D1 and the semiconductor wafer W1, and ultrasonic waves are reflected at the interface of this gap. As a result, substantially the entire image of the die area becomes white (or gray).

[0048] Furthermore, in step S109 of FIG. 6, if the contour matching rate between the flat luminance region and the die region is equal to or less than the predetermined value M1 (S109: No), the process of defect inspection system 100 proceeds to step S113. In step S113, the defect inspection system 100 uses the defect classification unit 3c to determine that the type of defect is "incomplete bonding." That is, the defect classification unit 3c determines that the bonding of the die D1 to the semiconductor wafer W1 is incomplete. In the "incomplete bonding" in the upper right of the page in FIG. 7, the bonding at the corner within the dashed frame K1 is incomplete, so the pixels in the triangular part at the corner are white. In another "incomplete bonding" in the lower left of the page in FIG. 7, the bonding near the left end within the dashed frame K1 is incomplete, so the pixels in this part are gray (shown as dots in FIG. 7).

[0049] Moreover, in step S108 of FIG. 6, if the pattern matching rate is equal to or greater than the predetermined value P1 (S108: No), the process of defect inspection system 100 proceeds to step S114. In step S114, the defect inspection system 100 determines whether the contour matching rate between the flat brightness region of the die image and the die region is higher than a predetermined value M2 (fourth predetermined value). Note that the predetermined value M2 is a threshold value of the contour matching rate for distinguishing die defects such as "incomplete bonding" (see FIG. 7) and "die bending" (see FIG. 7) from other random defects, and is preset as a value lower than the predetermined value M1 in step S109.

[0050] In step S114, if the contour matching rate between the flat luminance region of the die image and the die region is higher than the predetermined value M2 (S114: Yes), the process of defect inspection system 100 proceeds to step S115. In step S115, defect inspection system 100 determines whether or not the shape of the defect area (flat luminance area) is rectangular. If the shape of the defect area is rectangular (S115: Yes), the process of defect inspection system 100 proceeds to step S116.

[0051] In step S116, the defect inspection system 100 uses the defect classification unit 3c to determine that the type of defect is "die bending". That is, when the pattern matching rate (matching rate) of the circuit pattern of the die image to the normal circuit pattern of the die D1 is equal to or higher than a predetermined value P1 (first predetermined value) (S108: No), and the following condition is further satisfied, the defect classification unit 3c determines that the type of defect is "die bending". That is, when the contour matching rate between the contour of the flat brightness region of the die image and the contour of the die image is higher than a predetermined value M2 (fourth predetermined value) (S114: Yes), and further, when the shape of the defective area is rectangular (S115: Yes), the defect classification unit 3c determines that the die D1 is bonded to the semiconductor wafer W1 in a bent state (S116). Although not particularly shown in FIG. 7, when the die D1 is bent in the vertical or horizontal direction, the defective area in the die image often becomes rectangular.

[0052] If the defect area is not rectangular in step S115 (S115: No), the process of the defect inspection system 100 proceeds to step S115. In step S115, defect inspection system 100 uses defect classification unit 3c to determine that the type of defect is "incomplete bonding." For example, in the "mixed" area at the bottom right of the page in Fig. 7, part of the edge of defect area A1 is arc-shaped, and the remaining edge roughly coincides with part of dashed frame K (the outline of the die area). Therefore, the type of defect for defect area A1 is determined to be "incomplete bonding."

[0053] Furthermore, in step S114 of FIG. 6, if the contour matching rate between the flat luminance region of the die image and the die region is equal to or less than the predetermined value M2 (S114: No), the process of defect inspection system 100 proceeds to step S117. In step S117, the defect inspection system 100 uses the defect classification unit 3c to determine that the type of defect is a "random defect." That is, the defect classification unit 3c determines that a predetermined random defect exists on the bonding surface between the die D1 and the semiconductor wafer W1. In the "void" shown in FIG. 7, the circular void portion is colored white in the die image. In the "mixed" of FIG. 7, the void exists across multiple dies so as to include the defective area A2.

[0054] Although not shown in Fig. 6, when a die image contains multiple defect areas, the type of defect is identified for each defect area. Also, a "defect analysis process" for determining the presence or absence of a defect on a die-by-die basis by analyzing the defect areas with reference to the design information of the die D1 includes the processes of steps S105 to S117 in Fig. 6. Such a "defect analysis process" is performed by the defect classification unit 3c (see Fig. 1).

[0055] 6, the process of defect inspection system 100 proceeds to step S118. In step S118, defect inspection system 100 stores the inspection result. That is, defect inspection system 100 associates the identification information of die D1 selected in step S102 with the type of defect, etc., related to this die D1, and stores the identification information in storage unit 7 (see FIG. 2).

[0056] Next, in step S119, defect inspection system 100 determines whether or not there is another uninspected die D1. If there is another uninspected die D1 (S119: Yes), the process of defect inspection system 100 returns to step S102. If there is no another uninspected die D1 in step S119 (S119: No), the process of defect inspection system 100 proceeds to step S120.

[0057] In step S120, defect inspection system 100 causes control unit 4 to display the inspection results on display device 8 (see FIG. 2). For example, control unit 4 assigns a predetermined label indicating the type of defect to each defect, and causes predetermined images for defects to be superimposed on the image of object T1 to be displayed using an identifiable display method such as color coding.

[0058] FIG. 8 is an example of an image showing the detection result of a defect in an object to be inspected. The image in FIG. 8 shows an example of the display of the inspection result when the image of the object T1 shown in FIG. 4 is used. In the example of FIG. 8, the defect image of the defect F1 of "no die" is displayed in a white rectangle. The defect image of the defect F2 of "die floating" is displayed in a diagonally shaded rectangle. The defect F3 of "incomplete bonding" and the defect F4 of "die bending" as well as the defect F5 of "void" and the defect F6 of "crack" are displayed in a predetermined manner so as to be identifiable. In this way, the control unit 4 superimposes a predetermined defect image corresponding to the type of defect in the defect area on the position of the defect area in the image of the object T1 based on the processing result of the defect classification unit 3c. By looking at such an image, the user can see at a glance which type of defect has occurred in which part of the object T1. The classification results of these defects are appropriately reflected in changes to process conditions such as temperature conditions when heating the die D1 and the semiconductor wafer W1.

[0059] FIG. 14 is an explanatory diagram showing the results of comparing the luminance of each pixel of a reference image and a die image in a comparative example. In FIG. 14, pixels with a relatively small difference in luminance from the reference image are indicated by dots. Also, pixels with a higher luminance than the reference image (areas recognized as defects) are indicated in white, and pixels with a lower luminance than the reference image (areas recognized as defects) are indicated in black. In the comparative example on the upper side of FIG. 14, the luminance of the defective area is equivalent to the luminance of the circuit pattern of the reference image, so the circuit pattern portion is not detected as a defect. Also, in the comparative example on the lower side of FIG. 14, the luminance difference from the reference image is large in the portion corresponding to the circuit pattern, so the portion other than the circuit pattern is not detected as a defect. In this way, the method of simply comparing the luminance of each pixel makes it difficult to detect defects on a die basis, such as "incomplete bonding" or "no die."

[0060] In contrast, in the first embodiment, the type of defect is classified for each die based on the position, size, shape, and brightness of the defective area as well as the die design information. This makes it possible to detect defects for each die, such as "missing die," "floating die," "die bending," and "incomplete bonding," with high accuracy.

[0061] FIG. 9 is an explanatory diagram regarding a detection result in the case of incomplete bonding, which is one type of die defect. As shown in Fig. 9, pattern structure information is extracted from the reference image, and other pattern structure information is extracted from the die image (in the case of incomplete bonding). In the example of Fig. 9, the matching rate of the pattern structure information within the dashed frame K1 (within the die area) is approximately 0%, so it is determined that "there is a die defect." Furthermore, based on a comparison between the flat brightness area (white area) extracted from the die image and the die area, it is determined that the shape of the lower right corner does not match, and it is determined that there is "incomplete bonding."

[0062] <Effects> According to the first embodiment, the defect inspection system 100 identifies the type of defect on a die-by-die basis based on image data obtained when the object to be inspected T1 is irradiated with ultrasonic waves. This allows, for example, the type of die defect specific to die-to-wafer bonding to be identified, allowing the manager to change the process conditions appropriately based on the inspection results. This allows for early improvement of the process conditions, thereby improving the yield rate when mass-producing semiconductor products.

[0063] Second Embodiment The second embodiment differs from the first embodiment in that the defect detection unit 3Ab (see FIG. 10) includes a first defect detection unit 31b (see FIG. 10) that detects defective areas in die units, and a second defect detection unit 32b (see FIG. 10) that detects random defects. The rest of the second embodiment is similar to the first embodiment. Therefore, only the parts that differ from the first embodiment will be described, and a description of the overlapping parts will be omitted.

[0064] FIG. 10 is an explanatory diagram of a defect inspection system 100A according to the second embodiment. 10, the image processing unit 3A includes an image generating unit 3a, a defect detecting unit 3Ab, and a defect classifying unit 3Ac. The defect detecting unit 3Ab also includes a first defect detecting unit 31b that detects a defective area for each die D1, and a second defect detecting unit 32b that detects random defects in the inspected object T1.

[0065] The processing of the first defect detection unit 31b is similar to that of the defect detection unit 3b (see FIG. 1) in the first embodiment. That is, the first defect detection unit 31b identifies a defect area for each die based on the position, size, shape, and brightness of the defect area as well as the die design information. The second defect detection unit 32b detects random defects such as voids and cracks based on a comparison of the brightness of each pixel between the reference image and the die image.

[0066] FIG. 11 is an explanatory diagram relating to the processing of the image processing unit (also refer to FIG. 10 as appropriate). First, the image processor 3A generates an image of the object T1 by the image generator 3a based on a reflection intensity signal when the object T1 is irradiated with ultrasonic waves. Then, the image processor 3A extracts die images of multiple dies D1 and further aligns the die images. Specifically, the image processor 3A makes the coordinate values ​​of pixels that correspond to each other in the n die images G1, G2, . . . , Gn common to each other.

[0067] Then, the image processing unit 3A performs feature integration for each pixel of the die image (S201). Here, "feature integration" refers to a process of calculating a representative value (e.g., average brightness value or median brightness value) of n pixels whose positions correspond in n die images G1, G2, ..., Gn. This feature integration process is performed for all pixels included in the die image, thereby generating a reference image.

[0068] The image processing unit 3A also generates a multi-value mask shown in FIG. 11. The multi-value mask is a dynamic threshold set for each pixel based on the image features, and is set based on a predetermined statistical process. The image processing unit 3A then performs defect inspection by integrated comparison based on the die images G1, G2, . . . , Gn included in the inspection object T1, as well as the above-mentioned reference image and the multi-value mask (S202). Specifically, the image processing unit 3A compares each of the n die images with the reference image by the second defect detection unit 32b (see FIG. 10). The image processing unit 3A then detects defects in the inspection object T1 based on the multi-value mask, which is a dynamic threshold. This makes it possible to detect minute defects (random defects such as voids and cracks) that would not be detected by the configuration of the first embodiment. The detection result of the second defect detection unit 32b (see FIG. 10) is displayed in a predetermined manner on the display device 8 (see FIG. 2) by the control unit 4 (see FIG. 10).

[0069] The image processing unit 3A also performs defect inspection for each die D1 in the object to be inspected T1 by the first defect detection unit 31b (see FIG. 10) and the defect classification unit 3c (see FIG. 10). This allows the detection of die defects in the object to be inspected T1. Note that the process of detecting die defects is the same as that in the first embodiment (see FIG. 6), and therefore a description thereof will be omitted.

[0070] <Effects> According to the second embodiment, the image processor 3A mainly detects die defects by the first defect detector 31b and detects random defects by the second defect detector 32b. This makes it possible to detect random defects such as minute voids and cracks in addition to die defects with high accuracy.

[0071] Third Embodiment The third embodiment differs from the first embodiment in that a plurality of IC packages 92 (see FIG. 12) placed on an IC (Integrated Circuit) tray 91 (see FIG. 12) are used as the object to be inspected T2 (see FIG. 12). The third embodiment also differs from the first embodiment in that defect inspection is performed based on a predetermined inspection recipe and tray matrix information. Note that the other aspects (use of ultrasonic waves, overall configuration of defect inspection system 100, etc.: see FIGS. 1 and 2) are the same as those of the first embodiment. Therefore, only the parts that differ from the first embodiment will be described, and explanations of overlapping parts will be omitted.

[0072] FIG. 12 is a plan view of an inspected object T2 in the defect inspection system according to the third embodiment. As shown in Fig. 12, the object to be inspected T2 has a configuration in which a plurality of IC packages 92 (IC chips, which are dies) are placed on an IC tray 91. The IC tray 91 has a plurality of pockets (reference numbers not shown) arranged in the vertical and horizontal directions. Each pocket has one IC package 92 placed therein. The IC package 92 is an electronic component having a configuration in which a silicon semiconductor on which a predetermined integrated circuit is formed is housed in a package. An image of the object to be inspected T2 is generated by irradiating such an object to be inspected T2 with ultrasonic waves.

[0073] FIG. 13 is an explanatory diagram relating to the processing of the image processing unit (also refer to FIG. 12 as appropriate). 13, defect inspection is performed based on an image (IC package image) of the object T2 to be inspected, as well as an inspection recipe and tray matrix information. The inspection recipe includes information on the vertical and horizontal lengths (number of pixels) of an IC package 92 in the image of the object T2 to be inspected, as well as the vertical and horizontal spacing (number of pixels) between adjacent IC packages 92, and an image of a normal IC package 92. The tray matrix information includes the type, model number, and identification information of each IC package 92.

[0074] It is not necessary that the types of the multiple IC packages 92 placed on the IC tray 91 are all the same, and different types may be mixed together. The defect inspection system 100 (see FIG. 1) groups the multiple IC packages 92 placed in each pocket of the IC tray 91 by type (S301).

[0075] Then, the defect detection unit 3b (see FIG. 1) collects images of IC packages 92 belonging to a common group (S302) and performs defect detection (S303). The defect classification unit 3c (see FIG. 1) identifies the type of defect in a predetermined defect area for each IC package 92. This allows appropriate defect inspection to be performed even when different types of IC packages 92 are mixed on one IC tray 91. Note that types of defects of the inspected object T2 include "missing IC" where no IC is present in the package and "no package" where no IC package is placed where it should be. The processes of steps S302 and S303 in FIG. 13 are performed for each group of IC packages 92.

[0076] <Effects> According to the third embodiment, it is possible to properly inspect for defects in a plurality of IC packages 92 placed on an IC tray 91. Furthermore, even if different types of IC packages 92 are mixed on one IC tray 91, it is possible to individually inspect the IC packages 92 for defects.

[0077] <<Variations>> Although the defect inspection systems 100 and 100A according to the present invention have been described in the above in terms of the respective embodiments, the present invention is not limited to these descriptions and various modifications can be made. For example, in each embodiment, the case where an image of the object T1 is generated by irradiating the object T1 with ultrasonic waves has been described, but the present invention is not limited to this. That is, an image of the object T1 may be generated based on the amount of X-ray transmission when the object T1 is irradiated with X-rays. In this case, the processing contents of the image processing unit 3 (see FIG. 1) are the same as those in the first and second embodiments, and therefore will not be described.

[0078] In the first embodiment, the case where the die design information is created based on the design data of the die D1 has been described, but the present invention is not limited to this. That is, the die design information may be created based on a user's operation via an input device (not shown). The die design information may be generated based on an ultrasonic image of the bonding surface of the test object T1. In addition, the test object T1 immediately after bonding the semiconductor wafer W1 and the die D1 may be imaged by an optical microscope (not shown), and the die design information may be generated based on the optical image. In the first embodiment, the position of the die D1 when the die D1 is properly bonded to the semiconductor wafer W1, the shape of the die D1, the circuit pattern of the die D1, and the luminance value in the die D1 are included in the die design information (design information), but this is not limited thereto. That is, any of the position of the die D1 when the die D1 is properly bonded to the semiconductor wafer W1, the shape of the die D1, the circuit pattern of the die D1, and the luminance value in the die D1 may be included in the die design information (design information). In this case, the defect classification unit 3c (defect analysis unit) judges the presence or absence of a defect based on whether or not the matching rate between the reference image and the inspection target image exceeds a threshold value for any information included in the die design information (design information). As the above-mentioned "matching rate", for example, a matching rate regarding the position of the die D1, a matching rate regarding the shape of the die D1, a matching rate of the circuit pattern of the die D1, a matching rate of the luminance value in the die D1 in the image, or the like may be appropriately used.

[0079] In addition, in each embodiment, a case where the characteristics of each type of defect are set in advance has been described, but this is not limited thereto. For example, the characteristics of each type of defect may be learned based on teaching-learning type deep learning. In the first and second embodiments, the case where the multiple dies D1 bonded to the semiconductor wafer W1 have a common circuit structure has been described, but this is not limited to the above. That is, the semiconductor wafer W1 may include a die having a different circuit structure from the multiple dies D1. In this case, defect inspection is performed for each die D1 of the same type.

[0080] Furthermore, the process of determining the type of defect is not limited to those described in each embodiment. For example, when the type of defect in a defect area is a random defect, and the average brightness of the defect area is less than a fifth predetermined value, the defect classification unit 3c (see FIG. 1) may determine that the random defect is a defect in the circuit pattern of the die D1. This is because ultrasonic waves are hardly reflected in the area where the circuit pattern of the die D1 is missing, resulting in low brightness on the image.

[0081] Furthermore, when the type of defect in the defect area is a random defect, the defect classification unit 3c (see FIG. 1) may determine that the random defect is a void or a crack when the average brightness of the defect area is equal to or greater than a fifth predetermined value. This is because ultrasonic waves are reflected at the interface of the gap (void or crack) between the semiconductor wafer W1 and the die D1, and the brightness on the image becomes relatively high. In this case, the defect classification unit 3c (see FIG. 1) may also determine the presence or absence of a void or a crack for the die image of another die adjacent to the die via a side that overlaps with the void or crack among the sides that form the outline of the die image. This makes it possible to prevent voids or cracks in the test object T1 from being overlooked.

[0082] In the first and second embodiments, the case where the test object is formed by die-to-wafer bonding has been described, but the present invention is not limited to this. For example, the first and second embodiments can be applied to a multi-layer substrate such as a MEMS (Micro Electro Mechanical) wafer. In the third embodiment, the defect inspection of the inspected object T2 having the IC packages 92 (IC chips as dies: see FIG. 12) placed one by one in the pockets of the IC tray 91 (see FIG. 12) has been described, but the present invention is not limited to this. For example, the third embodiment can be applied to the defect inspection of IC packages (IC chips as dies) on a strip substrate (not shown). In addition, the third embodiment can be applied to the defect inspection of various inspected objects having a configuration in which predetermined electronic components are placed on a plate-like body.

[0083] In addition, each embodiment can be appropriately combined. For example, the first embodiment and the second embodiment may be combined, and if the pattern matching rate is equal to or less than the predetermined value P1 in step S108 of Fig. 6 (S108: No), the integrated comparison process of the second embodiment (S202 in Fig. 11) may be performed. Also, the integrated comparison process (S202 in Fig. 11) may be performed for die images in which no die defects are detected.

[0084] Furthermore, the programs executed by defect inspection systems 100 and 100A (programs for defect inspection methods and the like) can be provided via communication lines, or can be written onto a recording medium such as a CD-ROM and distributed. In addition, the embodiments have been described in detail to clearly explain the present disclosure, and are not necessarily limited to those including all of the configurations described. In addition, some of the configurations of the embodiments can be added to, deleted from, or replaced with other configurations. Furthermore, the above-mentioned mechanisms and configurations are those considered necessary for the explanation, and do not necessarily show all mechanisms and configurations of the product. [Explanation of symbols]

[0085] 1. Detection section 2. A / D Converter 3,3A Image processing unit 3a Image generation unit (inspection image acquisition unit) 3b, 3Ab Defect detection section (defect area detection section) 3c Defect Classification Section (Defect Analysis Section) 4. Control section 31b First defect detection section 32b Second defect detection section 91 IC tray 92 IC packages (dies, IC chips) 100,100A Defect Inspection System D1 Die T1, T2 Test subject W1 Semiconductor wafer

Claims

1. an inspection image acquisition unit that irradiates an object to be inspected, which is an object having a die bonded to a semiconductor wafer, with ultrasonic waves or X-rays to acquire an image of the object to be inspected; a defect area detection unit that detects a defect area by comparing a reference image showing an image in which the die is properly bonded to the semiconductor wafer with the acquired inspection target image; A defect analysis unit that determines whether or not there is a defect on a die-by-die basis by analyzing a defective area with reference to design information of the die.

2. 2. The defect inspection system of claim 1, wherein the design information includes any one of a position of the die when the die is properly bonded to a semiconductor wafer, a shape of the die, a circuit pattern of the die, and a brightness value within the die.

3. 3. The defect inspection system according to claim 2, wherein the die-by-die defect is a defect caused by a bonding error between the die and the semiconductor wafer.

4. 3. The defect inspection system of claim 2, wherein the die-by-die defects include any one of the following: a die missing from a semiconductor wafer; a die bonded to a semiconductor wafer in a distorted state; a portion of the die not bonded to the semiconductor wafer; a die bonded in a floating state above the semiconductor wafer; a gap between the die and the semiconductor wafer; a foreign object between the die and the semiconductor wafer; and an improper bonding position of the die on the semiconductor wafer.

5. 4. The defect inspection system according to claim 3, wherein the defect analysis unit determines the presence or absence of defects caused by voids or cracks in addition to the die-by-die defects.

6. 5. The defect inspection system according to claim 4, wherein the defect analysis unit determines the presence or absence of defects caused by voids or cracks in addition to the die-by-die defects.

7. 3. The defect inspection system according to claim 2, wherein the defect analysis section determines the presence or absence of a defect based on whether or not a matching rate between the reference image and the inspection target image exceeds a threshold value for any information included in the design information.

8. 2. The defect inspection system according to claim 1, wherein the object to be inspected is a hybrid bonded semiconductor wafer in which electrodes formed on a surface of a semiconductor wafer and electrodes formed on a surface of a die are bonded together.

9. 2. The defect inspection system of claim 1, wherein the die is an IC chip.

10. an inspection image acquisition process for acquiring an inspection target image by irradiating an object to be inspected, which is an object having a die bonded to a semiconductor wafer, with ultrasonic waves or X-rays; a defect area detection process for detecting a defect area by comparing a reference image showing an image in which the die is properly bonded to the semiconductor wafer with the acquired inspection target image; and a defect analysis process for determining the presence or absence of defects on a die-by-die basis by analyzing the defect area with reference to design information of the die.

Images