Power control of optical animation performed in optical module

Abstract

The present invention relates to a system for performing light animation on a light module (110). The system receives a first signal derived from a light power signal INP1 and a second signal derived from an animation power signal. The system consists of a microprocessor (200) that controls the light module and is powered by the second signal. A storage module (220) is capable of storing the initial state of the first signal when the microprocessor is activated by the second signal. After activation, the microprocessor determines the light animation to be performed based on the initial state and the current state of the second signal.

Description

Technical Field

[0001] The present invention relates to the technical field of power control of optical modules, particularly power control of optical modules for vehicles.

[0002] More specifically, it relates to power control of an optical module for performing optical animation.

Background Art

[0003] Optical animation can be executed in addition to the signaling / optical function of the optical module and is generally executed by a dedicated microprocessor. The microprocessor may attach input lines for each animation to be executed, which complicates the optical system. Also, since the microprocessor generally operates simultaneously with the vehicle, the microprocessor operates during periods when no animation is being executed in the optical module.

[0004] Therefore, it is necessary to execute optical animation in the optical module while limiting the number of wirings connected to the microprocessor and suppressing the power consumption of the microprocessor.

Summary of the Invention

[0005] The present invention improves this situation.

[0006] For this purpose, a first aspect of the present invention relates to a system for executing at least one optical animation on an optical module, the system being configured to receive a first signal derived from an optical power signal INP1 that supplies power to the optical function or signaling function of the optical module and a second signal derived from an animation power signal INP2 that supplies power to the optical animation of the optical module, the system including a microprocessor used to output an optical power control signal LIGHT_O for controlling the optical module to execute at least one optical animation.

[0007] The microprocessor is configured to be powered by a second signal, and the system further includes a memory module configured to store the initial state of the first signal at the time when the microprocessor is activated. The microprocessor is further configured to determine the executed light animation based on the initial state and the current state of the first signal after the startup period, and accordingly control the light power control signal LIGHT_O.

[0008] Therefore, the microprocessor is advantageously powered on only when necessary, that is, when receiving the second signal derived from the animation power signal. Thereby, the power consumption is reduced and the lifespan of the microprocessor can be extended. Further, this is done while allowing the execution of multiple animations based only on the values of the first signal at different instants. Thereby, the congestion caused by the lighting system is alleviated. Therefore, by storing the initial state of the first signal, the following becomes possible.

[0009] · Executing multiple animations considering the initial state and the current state.

[0010] · Supplying power to the microprocessor only when necessary. In fact, the microprocessor generally takes a certain amount of time to start up, for example, 20 microseconds. If the initial state is not stored during that time, the initial state will be lost, and the microprocessor cannot determine which animation should be executed.

[0011] According to some embodiments, the memory module may include a latch that includes an input, a clock input, and an output. The input may be derived from a first signal. The clock input receives a second signal. When a rising edge of the second signal is detected, the latch calculates an output based on the input and maintains the output until a new rising edge of the second signal is detected at the clock input. The output supplies the initial state of the first signal to the microprocessor.

[0012] This makes it possible to store the initial state of the first signal. As described above, it becomes possible to execute a plurality of animations while supplying power to the microprocessor only when necessary. Also, the storage of the initial state can be performed with simple electronic components such as a latch.

[0013] Complementarily, the memory module may further include a blanking circuit arranged to delay the first signal before it is supplied to the first input of the latch.

[0014] By introducing a delay, the first signal can be removed. Therefore, the high-speed fluctuations of the first signal are not supplied to the input of the latch. There is no limit to the delay introduced by the blanking circuit, and it may be several milliseconds, for example, 2 milliseconds. This can improve the accuracy of the memory module.

[0015] More complementarily, the blanking circuit may be arranged to delay the first signal from a duration ranging from 1 millisecond to 5 milliseconds.

[0016] This makes it possible to remove the first signal while introducing a delay shorter than the time required for the microprocessor to start up.

[0017] According to some embodiments, the microprocessor may be configured to be stopped hereinafter.

[0018] · At the falling edge of the second signal,

[0019] · When the animation ends, or

[0020] · After the animation ends and a predetermined period has elapsed.

[0021] Therefore, the power consumption of the microprocessor is optimized.

[0022] According to some embodiments, the system may further include a first receiving stage including the following.

[0023] · A first receiving module including a first detection stage arranged to derive a first detection signal from the optical power signal INP1,

[0024] · A second receiving module including a second detection stage arranged to derive a second detection signal from the animation power signal INP2.

[0025] Therefore, since the detection stage is used to derive a signal from the power supply circuit, the power supply circuit is not changed.

[0026] According to some embodiments, the first detection signal may be a first signal derived from the optical power signal INP1, and the second receiving stage may further include a conversion stage arranged to convert the second detection signal into an input animation signal, and the input animation signal is a second signal for supplying power to the microprocessor.

[0027] The conversion stage can supply an input signal optimal for the microprocessor, for example, a nominal value of about 5 volts.

[0028] According to some embodiments, the microprocessor may be configured to control the optical power control signal to execute at least two animations.

[0029] Accordingly, at least two animations are executed based only on the first signal, or more precisely, based on the values of the first signal at different instants. Thereby, it is possible to execute a plurality of animations while alleviating the congestion associated with the optical system.

[0030] According to some embodiments, the microprocessor may be configured to execute a welcome animation when the initial state of the first signal is low and the current state of the first signal is high.

[0031] This is advantageous because the welcome animation is executed when the optical module is operating. According to the present invention, since power is also supplied to the microprocessor at the same time, the power consumption of the optical system can be reduced.

[0032] According to some embodiments, the microprocessor is configured to control the optical power control signal LIGHT_O as an output lamp for executing a welcome animation.

[0033] Thereby, it becomes possible to shift from the reactive power value to the nominal power value of the optical module.

[0034] Other features and advantages of the present invention will become apparent from the description and the accompanying drawings detailed below.

Brief Description of the Drawings

[0035]

Figure 1

[0036]

Figure 2

[0037]

Figure 3

[0038]

Figure 4

[0039]

Figure 5

[0040] FIG. 1 shows a power supply system for supplying power to an optical module 110 according to some embodiments of the present invention.

[0041] The optical module 110 may be mounted on a vehicle.

[0042] The optical module 110 can be powered by two different input signals generated from one or more power sources of the vehicle. The first input signal is an optical power signal for supplying power to the optical module 110 particularly when the optical module performs an optical function or a signal function. The second input signal is an animation power signal for supplying power to the optical module 110 when an animation is executed.

[0043] There is no limitation on what "animation" means. Animation encompasses any function that is different from the main optical function or signaling function of the optical module. For example, the first animation scenario may be a welcome animation when the optical module 110 is activated, and the second animation scenario may be a goodbye animation when the optical module stops. These two scenarios are used for illustration purposes below. It will be understood that the present invention also covers other animation scenarios not described below.

[0044] The optical module 110 may be a taillight module, a daytime running light (DRL) module, a front facia lighting module, a rear facia lighting module, or any module arranged to display optical animation and perform an optical function. There is no limitation on the technology corresponding to the optical module 110. For example, the optical module 110 may be based on LED, laser, or other optical technologies powered by an external source.

[0045] The first protection circuit 101 is implemented between the first input signal and the optical module 110. The second protection circuit 102 is implemented between the second input signal and the optical module 110. There is no limitation on the architecture, design, and usage technology of the protection circuit. According to the present invention, any circuit that can protect the optical module 110 from inrush current, overvoltage, and other electrical problems is included in the expression "protection circuit".

[0046] The first protection circuit 101 and the second protection circuit 102 are optional components.

[0047] The power supply system further includes a first receiving module 103 and a second receiving module 104.

[0048] The first receiving module 103 may include a first detection stage and a first conversion stage. The first detection stage is used to derive a first detection signal LIGHT_DET from a first input signal INP1, and the first conversion stage is used to convert the first detection signal LIGHT_DET into an optical input signal LIGHT_S that can be used as an input to a microcontroller described later. For example, the first input signal INP1 may take discrete values of 0 volts and 14 volts. The first receiving module 103 may be configured to generate an optical input signal LIGHT_S that takes discrete values of 0 volts and 5 volts. This example is disclosed for illustrative purposes only.

[0049] The second receiving module 104 may include a second detection stage and a second conversion stage. The second detection stage is used to derive a second detection signal ANIM_DET from a second input signal INP2, and the second conversion stage is used to convert the second detection signal ANIM_DET into an animation input signal ANIM_S that can be used as an input to a microcontroller described later. For example, the second input signal INP2 may take discrete values of 0 volts and 14 volts. The second receiving module 104 may be configured to generate an animation input signal ANIM_S that takes discrete values of 0 volts and 5 volts. This example is disclosed for illustrative purposes only.

[0050] The designs and architectures of the first and second receiving modules 103 and 104 are not particularly limited and may be electronic circuits. The method of converting input power into optimal power for output components is well known to those skilled in the art.

[0051] In the embodiment of FIG. 1, two power input signals INP1 and INP2 are considered. However, as will be understood from the following description, the present invention is applicable to a larger number of power input signals. Hereinafter, the context of two animations including a welcome light animation and a goodbye light animation is considered. However, there is no limitation on the number and type of animations managed by the microprocessor. In the system according to the present invention, in particular, when two or more power input signals are received by the optical module 110, two or more animations can be executed.

[0052] FIG. 2 shows a system for executing at least one animation according to some embodiments of the present invention.

[0053] The system includes a processor 200 such as a microcontroller 200 and a memory module 220.

[0054] The memory module 220 includes a first input 220.1, a second input 220.2, and an output 220.3.

[0055] The first input 220.1 may receive a first detection signal LIGHT_DET or an optical input signal LIGHT_S. More generally, the first input terminal 220.1 receives a signal derived from the first input signal INP1, that is, a signal derived from the optical power signal of the optical module 110. Hereinafter, for the purpose of disclosure for illustrative purposes only, it is considered that the first input 220.1 receives the first detection signal LIGHT_DET.

[0056] The second input 220.2 of the memory module 220 may receive an animation input signal ANIM_S or a second detection signal ANIM_DET. More generally, the second input 220.2 receives a signal derived from the second input signal INP2, that is, a signal derived from the animation power signal of the optical module 110. Hereinafter, it is considered that the second input 220.2 receives the animation input signal ANIM_S.

[0057] The memory module 220 is configured to store the initial state of the signal received on the first input terminal 220.1, that is, the initial state of the signal derived from the optical power signal of the optical module 110. To do this, the memory module 220 may be able to maintain the output LIGHT_I on the output terminal 220.3. The output LIGHT_I is the initial state of the signal LIGHT_S or the signal LIGHT_DET in order to represent the initial state of the power signal of the optical module 110.

[0058] According to the present invention, the expression "initial" refers to the moment when power is supplied to the microprocessor by a signal derived from a second input signal INP2, such as the animation input signal ANIM_S. This is the reason why the animation input signal ANIM_S is received by the second input terminal 220.2, and it constitutes a time reference for storing the initial state of the signal received at the first input terminal 220.1. This will be better understood from the description of FIG. 3.

[0059] The microcontroller 200 includes a first microcontroller input terminal 210.1, a second microcontroller input terminal 210.2, a third microcontroller input terminal 210.3, and a microcontroller output terminal 210.4. The microcontroller 200 may include other pins not shown in FIG. 2 and not described later. There is no limit to the number of terminals of the microcontroller 200.

[0060] The first microcontroller input terminal 210.1 is configured to receive an animation input signal ANIM_S that supplies power to the microcontroller 220 according to the present invention. When the animation input signal ANIM_S is in a low state such as 0V, this means that the microcontroller 220 is in a non-operating state, thereby reducing the power consumption of the microcontroller 220 and the consumption of its lifespan. Therefore, the microcontroller 220 is only activated when necessary, that is, only when the animation is executed by the optical module 110, as will be better understood from the following description.

[0061] However, when the microcontroller 220 is activated as needed, a problem occurs in that the activation of the microcontroller 220 is not instantaneous. In fact, the activation time of the microcontroller 220 is, for example, between 10 milliseconds and 30 milliseconds, and is approximately equal to, for example, 20 milliseconds. The memory module 220 can store the initial state of the optical input signal LIGHT_S by outputting it as the output LIGHT_I. Therefore, once activated, the microcontroller 220 may determine the initial state LIGHT_I of the optical input signal LIGHT_S, or may determine whether to trigger an optical animation as further described below by comparing it with the current optical input signal LIGHT_S.

[0062] The second microcontroller input terminal 210.2 is configured to receive an optical input signal LIGHT_S derived from the first input INP1.

[0063] The third microcontroller input terminal 210.3 is configured to receive the output LIGHT_I emitted from the memory module 220.

[0064] Based on the optical input signal LIGHT_S and the output LIGHT_I, the microcontroller 220 is configured to determine an optical power control signal LIGHT_O for executing at least one optical animation on the optical module 110. According to some embodiments of the present invention, the microcontroller 220 is configured to execute at least two animations by controlling the optical power control signal LIGHT_O.

[0065] To determine LIGHT_O based on the signals LIGHT_S and LIGHT_I, the microcontroller 220 may be configured to execute a truth table, such as the following truth table for example.

[0066] · If TAIL_I is low and TAIL_S is low, wait for TAIL_S to rise to execute a first optical animation, such as a welcome animation.

[0067] · If TAIL_I is low and TAIL_S is high, control the optical power control signal LIGHT_O to execute the first optical animation. In fact, the fact that TAIL_I is low means that when the microprocessor is activated, the optical module 110 is first stopped. Once the microprocessor 200 is activated, TAIL_S transitions from low to high, and thus, the execution of the first optical animation can be determined.

[0068] · If TAIL_I is high and TAIL_S is high, wait for TAIL_S to fall to execute a second optical animation, such as a goodbye animation.

[0069] · If TAIL_I is high and TAIL_S is low, control the optical power control signal LIGHT_O to execute the second optical animation. In fact, the fact that TAIL_I is high means that when the microprocessor is activated, the optical module 110 is activated first. Once the microprocessor 200 is activated, TAIL_S transitions from high to low, and thus can determine the execution of the second optical animation.

[0070] Note that the above truth table is disclosed only for illustrative purposes, and the present invention is not limited thereto. For example, when the input signal is inverted, the microcontroller 220 may be configured based on a complementary truth table. Also, when two or more input signals are received and two or more animation scenarios are executed, the microcontroller 220 may be configured based on different truth tables.

[0071] FIG. 3 shows a preferred structure of the memory module 220 according to some embodiments of the present invention.

[0072] The memory module 220 according to the present invention may include a latch or a flip-flop 301. The latch 301 may include an input D302, a clock input CLK303, a ground pin 304, a power input VCC305, and an output 306. In the example described here, the output 306 is the Q bar, which means that the input D is inverted as further described. However, the output 306 may be Q by adapting the architecture of the memory module 220.

[0073] The latch 301 may be powered by the second detection signal ANIM_DET via the power supply circuit 330. Alternatively, the latch 301 may be powered by an external power supply. The power supply circuit 330 has been represented as including the resistor R3, the Zener diode D1, and the capacitor Cs. However, the design of the power supply circuit 330 can vary widely, particularly based on the power constraints of the latch 301 and the available power sources.

[0074] As described above, the memory module 220 is configured to receive the first detection signal LIGHT_DET and the animation input signal ANIM_S as inputs.

[0075] The animation input signal ANIM_S may be supplied to the clock input 303, as shown in FIG. 3.

[0076] According to some embodiments of the present invention, the first detection signal LIGHT_DET may be delayed by the blanking circuit 310 and inverted by the inversion circuit 320 in order to obtain an inverted and delayed signal LIGHT_DATA that is supplied to the input D of the latch 301.

[0077] The blanking circuit 310 introduces a delay to filter the first detection signal LIGHT_DET. Therefore, the high-speed fluctuations of the first detection signal LIGHT_DET are not supplied to the input D. There is no limit to the delay introduced by the blanking circuit 310, and it may be several milliseconds, for example, 2 milliseconds. This can improve the accuracy of the memory module 220.

[0078] The blanking circuit 310 is shown as including the resistor R1, the resistor R2, the capacitor C1, and the transistor Q1. However, there is no limit to the design of the delay circuit 310, and it may include different components arranged in different ways.

[0079] The inversion circuit 320 is shown as including the resistor R3. However, there is no limitation in the design of the delay circuit 310, and it may include different components arranged in different ways.

[0080] The inversion circuit 320 and the blanking circuit 310 are arbitrary components according to the present invention, and the first detection signal LIGHT_DET, or the optical input signal LIGHT_S, may be directly supplied to the input D302 according to some embodiments.

[0081] The latch 301 may apply the following rules to obtain the output LIGHT_I.

[0082] · If the input CLK rises and the input D is high, Q bar is low.

[0083] · If the input CLK rises and the input D is low, Q bar is high.

[0084] As described above, in an embodiment where the first detection signal is not inverted, Q can be used as the output. Also, according to some embodiments, the falling edge of CLK can be used instead of the rising edge.

[0085] Therefore, the output LIGHT_I represents the initial state of the first detection signal LIGHT_DET, or LIGHT_S, derived from the first input signal INP1, because it is stored by the latch 301 at the time when the animation input signal ANIM_S rises, that is, at the time when the microprocessor 200 operates.

[0086] The operations performed by the memory module 320, particularly the latch 301, will be better understood from the descriptions of FIGS. 4 and 5.

[0087] FIG. 4 is a timing diagram in a first situation of different signals processed by the system according to the present invention.

[0088] The timing diagram shows the signals LIGHT_DET, ANIM_S, LIGHT_DATA, LIGHT_I, and LIGHT in a first situation. LIGHT is a signal that supplies power to the optical module 110 and can be supplied by the first input signal INP1 or the output LIGHT_O of the microcontroller 200.

[0089] In the first situation, the first input signal INP1 and the second input signal INP2 rise simultaneously. This is detected by the first detection signal LIGHT_DET rising from a low state to a high state and the animation input signal ANIM_S rising from a low state to a high state. As described above, the animation input signal ANIM_S supplies power to the microprocessor 200, and thus the microprocessor 200 starts operation at the rising edge of the animation input signal ANIM_S.

[0090] As described above, the signal LIGHT_DATA corresponds to the delayed and inverted first detection signal LIGHT_DET. Before the rising edge, LIGHT_DET was low, so LIGHT_DATA remains high until the delay introduced by the blanking circuit 310 ends.

[0091] As described above, at the first instant 400, due to the rising edge of the animation input signal ANIM_S supplied to the clock input 303, the latch 301 copies the inverse of LIGHT_DATA, which is in the low state. Thus, LIGHT_I is in the low state at the first instant 400 and is maintained in the low state.

[0092] Since the microprocessor 200 requires a startup period to operate, the signal LIGHT is low at the first instant 400.

[0093] The second moment 401 is delayed by the delay of the blanking circuit 310 after the first moment 400. Therefore, at the second moment 401, the signal LIGHT_DATA drops due to the rising edge of the first detection signal LIGHT_DET. This is because LIGHT_DATA corresponds to the first detection signal LIGHT_DET after being delayed and inverted.

[0094] The third moment 402 corresponds to the moment when the microprocessor 200 is activated and starts operating. Therefore, the activation period of the microprocessor 200 is between the first moment 400 and the third moment 402, and can be made equal to 20 ms as described above.

[0095] At the third moment 402, the microprocessor 200 compares the initial state LIGHT_I with the current first detection signal LIGHT_DET and determines the optical power control signal LIGHT_O. Based on the above truth table, the microprocessor 200 determines to execute the first animation, that is, the welcome animation. To do so, it controls the optical power control signal LIGHT_O to execute the first animation. In the example shown in FIG. 4, the signal LIGHT is controlled based on the output LIGHT_O which is the output lamp.

[0096] At the fourth moment 403, after the output lamp reaches the maximum power value such as the maximum current value, the first animation ends. After the fourth moment 403, the signal LIGHT can maintain its maximum value based on the first input signal INP1, and the optical module 101 can perform signal functions and / or optical functions.

[0097] At the fifth moment 404, the second input signal INP2, that is, the animation input signal ANIM_S, falls and reaches the low state. Since the animation input signal ANIM_S supplies power to the microprocessor 404, the microprocessor 200 stops at moment 404. Alternatively, the microprocessor 404 can also be stopped in the following cases.

[0098] · At the moment 403 when the first animation ends, or

[0099] · When a predetermined duration has elapsed after the moment 403.

[0100] The optical module 110 is powered at the maximum power value by the first input signal INP1 even after the microprocessor 200 is stopped.

[0101] FIG. 5 is a timing diagram in a second situation of different signals processed by the system according to the present invention.

[0102] The timing diagram according to FIG. 5 shows the same signals as those described with reference to FIG. 4.

[0103] In the second situation, the first input signal INP1, i.e., the first detection signal LIGHT_DET, is already in the high state when the second input signal INP2, i.e., the animation input signal, rises.

[0104] As described above, the animation input signal ANIM_S supplies power to the microprocessor 200, and thus the microprocessor 200 starts to activate at the rising edge of the animation input signal ANIM_S.

[0105] As described above, the signal LIGHT_DATA corresponds to the delayed and inverted first detection signal LIGHT_DET. Before the rising edge, since the first detection signal LIGHT_DET was high, LIGHT_DATA is low.

[0106] At the first moment 500, due to the rising edge of the animation input signal ANIM_S supplied to the clock input 303, the latch 301 copies the reciprocal of LIGHT_DATA which is in the high state. Thus, LIGHT_I rises to the high state at the first moment 500 and is maintained in the high state.

[0107] Since the optical power control signal LIGHT is supplied from the first input signal INP1, it is high at the first instant 500.

[0108] The second instant 501 is delayed by the delay of the blanking circuit 310 after the first instant 500. Therefore, at the second instant 501, since the first detection signal LIGHT_DET remains high, the signal LIGHT_DATA remains low. This is because LIGHT_DATA corresponds to the first detection signal LIGHT_DET after being delayed and inverted.

[0109] The third instant 502 corresponds to the instant when the microprocessor 200 is activated and operates. Therefore, the activation period of the microprocessor 200 is between the first instant 500 and the third instant 502, and can be made equal to 20 ms as described above.

[0110] At the third instant 502, the microprocessor 200 compares the initial state LIGHT_I with the current first detection signal LIGHT_DET and determines the optical power control signal LIGHT_O. Based on the truth table described above, the microprocessor determines to wait until the first detection signal LIGHT_DET drops and the second animation, i.e., the goodbye animation, is executed.

[0111] Therefore, the output LIGHT_O is low and the signal LIGHT is not changed.

[0112] At the fourth instant 503, the second input signal INP2, i.e., the animation input signal ANIM_S, rises and reaches the low state. Since the animation input signal ANIM_S supplies power to the microprocessor 404, the microprocessor 200 stops at instant 404.

[0113] The present invention is not limited to the embodiments described above as examples.

Claims

1. A system for performing at least one light animation on a light module (110), the system being configured to receive a first signal derived from a light power signal INP1 that powers the light module and a second signal derived from an animation power signal INP2 that powers the light animation of the light module, The system includes a microprocessor (200) configured to output a light power control signal LIGHT_O to control the light module to perform at least one light animation, the microprocessor is configured to be powered by the second signal; The system further includes a storage module (220) configured to store an initial state of the first signal at the time the microprocessor is powered up; The system, wherein the microprocessor is further configured to determine a light animation to be performed based on the initial state of the first signal and a current state of the first signal after a start-up period, and to control the light power control signal LIGHT_O accordingly.

2. The storage module (220) includes a latch (301) having an input (302), a clock input (303) and an output (306), the input being derived from the first signal, the clock input receiving the second signal, and when a rising edge of the second signal is detected, the latch calculates the output based on the input and maintains the output until a new rising edge of the second signal is detected at the clock input; The system of claim 1 , wherein the output provides the initial state of the first signal to the microprocessor (200).

3. 3. The system of claim 2, wherein the storage module (220) further comprises a blanking circuit (310) arranged to delay the first signal before being provided to the input of the latch (301).

4. The system of claim 3 , wherein the blanking circuit is configured to delay the first signal from a duration comprised between 1 millisecond and 5 milliseconds.

5. The microprocessor (200) At a falling edge of the second signal, when the light animation has ended, or When a predetermined period of time has elapsed after the light animation has ended, The system of any one of claims 1 to 4, configured to shut down.

6. The system further includes a first receiving stage, the first receiving stage comprising: a first receiver module (103) including a first detection stage arranged to derive a first detection signal from said optical power signal INP1; A system according to any one of claims 1 to 4, further comprising: a second receiving module (104) including a second detection stage arranged to derive a second detection signal from the animation power signal INP2.

7. the first detection signal is a first signal derived from the optical power signal INP1; 7. The system of claim 6, wherein the second receiving module (104) further includes a conversion stage arranged to convert the second detection signal into an input animation signal, the input animation signal being the second signal that supplies power to the microprocessor (200).

8. The system of any one of claims 1 to 4, wherein the microprocessor (200) is configured to control the light power control signal LIGHT_O to perform at least two animations.

9. The system of any one of claims 1 to 4, wherein the microprocessor (200) is configured to execute a welcome animation when the initial state of the first signal is low and the current state of the first signal is high.

10. 10. The system of claim 9, wherein the microprocessor (200) is configured to control the light power control signal LIGHT_O as an output lamp for performing the welcome animation.

Images