Power supply device and image forming apparatus

Abstract

To reduce power loss and to reduce noise in a power supply device.SOLUTION: A power supply device includes: a transformer 204 having a primary winding N1, a secondary winding N2, and an auxiliary winding N3; a first circuit in which a clamp capacitor 206 and a diode 207 are connected in series and is connected to the primary winding N1 in parallel: FET 205 whose one end is connected to one end of the primary winding N1 and which is switched to an on-state or an off-state; a second circuit in which the auxiliary winding N3 and a diode 208 are connected in series and which is connected between a connection point where the clamp capacitor 206 and the diode 207 are connected and another end of the FET 205; and a gate driving circuit 300 which has resistors 214 and 215 and a diode 213 and is connected to a gate terminal of the FET 205. In the gate driving circuit 300, a resistance value in a direction in which current flows into the gate terminal of the FET 205 is smaller than a resistance value in a direction in which current flows out from the gate terminal.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a power supply device and an image forming apparatus, and more particularly to a power supply device that aims to achieve both reduction of power loss and reduction of noise.

Background Art

[0002] In a switching power supply device using a switching element, a surge voltage is generated at the turn-off of the switching element due to the leakage inductance of the transformer, the output capacitance of the switching element itself, and the peak current immediately before turn-off. In order to suppress this surge voltage, a method has been proposed that achieves high conversion efficiency and high suppression of the surge voltage by a clamp circuit composed of a clamp capacitor, two diodes, and an auxiliary winding of the transformer (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the conventional method, the current discharged from the clamp capacitor flows through the switching element immediately after the switching element is turned on. Therefore, the current immediately after the switching element is turned on becomes larger than that in a general flyback converter configuration. Accordingly, there is a problem that the power loss, which is the product of the current flowing through the switching element and the applied voltage, also increases, and the power loss generated in the switching element during turn-on increases. For this reason, it is required to achieve both reduction of power loss and reduction of noise in the power supply device.

[0005] The present invention has been made under such circumstances, and an object thereof is to achieve both reduction of power loss and reduction of noise in a power supply device.

Means for Solving the Problems

[0006] In order to solve the above-described problems, the present invention includes the following configuration. (1) A transformer having a primary winding, a secondary winding, and an auxiliary winding, and a first circuit in which a first capacitor and a first rectifying element are connected in series, the first circuit being connected in parallel to the primary winding, a switching element having one end connected to one end of the primary winding and being switchable between an on state and an off state, a second circuit in which the auxiliary winding and a second rectifying element are connected in series, the second circuit being connected between a connection point where the first capacitor and the first rectifying element are connected and the other end of the switching element, and a third circuit having one or more resistors and a third rectifying element and being connected to the gate terminal of the switching element, wherein the third circuit is characterized in that a resistance value in a direction in which current flows into the gate terminal of the switching element is smaller than a resistance value in a direction in which current flows out from the gate terminal. A power supply device. (2) An image forming apparatus including image forming means for forming an image on a recording material, and the power supply device according to (1) for supplying power to the image forming means.

Effects of the Invention

[0007] According to the present invention, it is possible to achieve both reduction of power loss and reduction of noise in a power supply device.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Mode for Carrying Out the Invention

[0009] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Examples

[0010] [Image forming apparatus] FIG. 1 shows an example of the schematic configuration of an image forming apparatus. A laser beam printer 100 (hereinafter referred to as printer 100) includes a photosensitive drum 101, a charging unit 102, and a developing unit 103. The photosensitive drum 101 is an image carrier on which an electrostatic latent image is formed. The charging unit 102 uniformly charges the photosensitive drum 101. The developing unit 103 forms a toner image by developing the electrostatic latent image formed on the photosensitive drum 101 with toner. The toner image formed on the photosensitive drum 101 (on the image carrier) is transferred to a sheet P as a recording material supplied from a cassette 104 by a transfer unit 105, and the unfixed toner image transferred to the sheet P is fixed by a fixing unit 106. The photosensitive drum 101, the charging unit 102, the developing unit 103, and the transfer unit 105 are an image forming unit (image forming means). The fixed sheet P is discharged to a tray 107. Further, the printer 100 includes a power supply device 108, and supplies power from the power supply device 108 to a drive unit such as a motor and a control unit 109. The control unit 109 has a CPU (not shown) and controls an image forming operation by the image forming unit, a conveyance operation of the sheet P, and the like. Note that the image forming apparatus to which the power supply device of the present invention can be applied is not limited to the configuration illustrated in FIG. 1.

[0011] [Power supply device] Fig. 2(a) shows the circuit configuration diagram of the power supply device 108 of the first embodiment. The AC voltage input from the AC power supply 201 is input to the power supply device 108 of the printer 100. The AC voltage input to the power supply device 108 is full-wave rectified through the bridge diode 202 which is a rectifier circuit, and smoothed into a DC voltage by the primary smoothing capacitor 203 which is a second capacitor connected in parallel between the two output terminals 202a and 202b. The DC voltage charged in the primary smoothing capacitor 203 is applied to the field effect transistor (hereinafter referred to as FET) 205 which is a switching element through the primary winding N1 of the transformer 204. The primary winding N1 of the transformer 204 and the FET 205 constitute a series circuit connected in series. The power supply IC 212 which is a control unit has a DRV terminal which is a control terminal. The power supply IC 212 outputs a drive pulse to the gate terminal of the FET 205 through the diode 213 which is a third rectifying element, the resistor 214 which is a first resistor, and the resistor 215 which is a second resistor from the DRV terminal, and switches the FET 205 to the on state or the off state.

[0012] Here, the circuit in which the diode 213 and the resistor 214 are connected in series and the resistor 215 are connected in parallel. The diode 213, the resistor 214, and the resistor 215 constitute the gate drive circuit 300 which is a third circuit. The anode terminal of the diode 213 is connected to the DRV terminal, and the cathode terminal is connected to one end of the resistor 214. The other end of the resistor 214 is connected to the gate terminal, and one end of the resistor 215 is connected to the DRV terminal and the other end is connected to the gate terminal. The resistance value R 214 of the resistor 214 in the direction in which current flows into the gate terminal of the FET 205 215 is smaller than the resistance value R 214 of the resistor 215 in the direction in which current flows out from the gate terminal (R 215 < R 215 214 ). In other words, the resistance value R 215

[0013] When FET205 turns on, the energy stored in transformer 204 is rectified by diode 209 and capacitor 210 via the secondary winding N2 of transformer 204 when FET205 turns off, generating a DC voltage 211. The auxiliary winding N3 coupled to the primary winding N1 and secondary winding N2 of transformer 204, in combination with the clamp capacitor 206 which is the first capacitor, the diode 207 which is the first rectifying element, and the diode 208 which is the second rectifying element, constitutes a snubber circuit 310. Note that the diode 207 and the clamp capacitor 206 are connected in series to form the first circuit. Also, the diode 208 and the auxiliary winding N3 are connected in series to form the second circuit. The snubber circuit 310 suppresses the surge voltage when FET205 turns off.

[0014] [Operation Waveforms of Power Supply Device] Fig. 3 shows the waveforms of the typical switching operations of the power supply device 108 of Example 1. Fig. 3(i) shows the voltage (high level, low level) of the DRV terminal of the power supply IC 212, (ii) shows the current flowing through FET205. (iii) shows the current of the clamp capacitor 206 (charging current (negative), discharging current (positive)), and (iv) shows the voltage of the drain terminal of FET205. In all cases, the horizontal axis represents time t, and t1, t2, etc. on the horizontal axis represent times (timings).

[0015] At time t1, when the DRV terminal becomes high level, a gate current flows from the DRV terminal toward the gate terminal of FET205 through diode 213, resistor 214, and resistor 215. Then, FET205 turns on with a time constant determined by the gate current and the parasitic capacitance including the gate capacitance of FET205. When FET205 turns on, the DC voltage charged in the primary smoothing capacitor 203 is applied to the primary winding N1, and a current flows through FET205 via the primary winding N1. At the same time, the energy stored in the clamp capacitor 206 at the previous turn-off flows as a discharge current to FET205 via the auxiliary winding N3 and diode 208. At time t2, when the discharge current of the clamp capacitor 206 becomes zero, diode 208 becomes non-conductive, and current flows through FET205 only from the primary smoothing capacitor 203 via the primary winding N1.

[0016] At time t3, when the DRV terminal becomes low level, a gate current flows from the gate terminal of FET205 toward the DRV terminal through resistor 215. Then, FET205 turns off with a time constant determined by the gate current and the parasitic capacitance of FET205. When FET205 turns off, the leakage inductance component of the transformer 204, the clamp capacitor 206, and diode 207 form a resonant circuit, and a resonant current flows through the clamp capacitor 206. This resonant circuit acts as a snubber circuit 310 to suppress the generation of a surge voltage at the drain terminal of FET205.

[0017] At time t4, when the resonant current to the clamp capacitor 206 becomes zero, diode 207 becomes non-conductive. The drain terminal voltage of FET205 becomes a voltage obtained by adding a value obtained by multiplying the DC voltage 211 by the ratio of the number of turns of the primary winding N1 to the number of turns of the secondary winding N2 (turns ratio) to the DC voltage charged in the primary smoothing capacitor 203.

[0018] [Waveform at the time of FET turn-on] FIG. 4 shows the waveforms at the time of turning on the FET 205 of the power supply device 108 of Example 1 compared with the conventional configuration. The horizontal axis in both cases indicates time t, and “t1” indicates the same time as in FIG. 3. The dashed line indicates the voltage at the drain terminal of the FET 205, and the solid line indicates the current flowing through the FET 205. FIG. 4(a) shows the turn-on waveform when the snubber circuit 310 having the auxiliary winding N3 of the transformer 204, the clamp capacitor 206, the diode 207, and the diode 208 is removed in the power supply configuration of Example 1 shown in FIG. 2. That is, it is the turn-on waveform of a general flyback converter configuration. Since current flows through the FET 205 only via the primary winding N1, the current flowing through the FET 205 immediately after turn-on is small, and it increases as it approaches turn-off. Therefore, the power loss, which is the product of the voltage and current of the FET 205, is less likely to occur during turn-on.

[0019] Generally, the speed of the switching operation of turning on and off an FET that performs a switching operation (hereinafter referred to as the switching speed) is in a trade-off relationship between power loss and noise. That is, the faster the switching speed of the switching operation, the lower the power loss, and the slower the switching speed, the lower the high-frequency noise. Therefore, in a general flyback converter, the switching speed is slowed down from the viewpoint of noise reduction during turn-on when power loss is less likely to occur. On the other hand, during turn-off when the current flowing through the FET is large, the power loss can be reduced by increasing the switching speed. However, since increasing the switching speed increases high-frequency noise, an appropriate switching speed is determined while considering the balance between power loss and high-frequency noise generation.

[0020] Figure 4(b) shows the turn-on waveform of the power supply configuration of Example 1 shown in Figure 2. The power supply configuration equipped with the snubber circuit 310 composed of the auxiliary winding N3 of the transformer 204, the clamp capacitor 206, and the diode 207 as in Example 1 is different from a general flyback converter. That is, as described above, the energy stored in the clamp capacitor 206 immediately after the turn-on of the FET 205 flows as a current into the FET 205. Therefore, the peak value of the current flowing through the FET 205 immediately after turn-on becomes as large as that at turn-off. Depending on the set values of the transformer 204 and the clamp capacitor 206, the current may be the largest immediately after turn-on. Therefore, power loss in the FET 205 is likely to occur during turn-on as well as or even more than during turn-off. Thus, as shown in Figure 4(c), by increasing the turn-on speed (hereinafter referred to as the turn-on speed), the power loss generated in the FET 205 during turn-on can be reduced. In other words, the time from the time t1 when a high-level signal is input to the gate terminal of the FET 205 until the time when the current flowing through the FET 205 due to the discharge current of the clamp capacitor 206 reaches its peak is shortened.

[0021] Specifically, the time ΔT from the time t1 in Figure 4(c) until the time tp when the current flowing through the FET 205 reaches its peak is made shorter than the time ΔT' from the time t1 in Figure 4(b) until the time tp' when the current flowing through the FET 205 reaches its peak. In Example 1, in the gate drive circuit 300 composed of the diode 213, the resistor 214, and the resistor 215, the anode terminal of the diode 213 is connected to the DRV terminal side of the power supply IC 212. The gate drive circuit 300 is configured such that the resistance value in the direction in which current flows into the gate terminal of the FET 205 is smaller than the resistance value in the direction in which current flows out from the gate terminal (R 214 <R 215 ). Thus, in Example 1, the turn-on speed is made faster than the turn-off speed (hereinafter referred to as the turn-off speed).

[0022] As described above, according to Example 1, in a power supply configuration including a clamp capacitor, two diodes, and a clamp circuit composed of an auxiliary winding of a transformer, the turn-on speed is made faster than the turn-off speed. Thereby, while reducing the power loss during turn-on, it is possible to reduce the generation of high-frequency noise during turn-off.

[0023] In Example 1, the circuit for determining the turn-on and turn-off speeds is constituted by diode 213, resistor 214, and resistor 215, but it is not limited to this configuration. For example, as shown in Fig. 2(b), a circuit in which a resistor is connected in series to a parallel circuit of a diode and a resistor, or as shown in Fig. 2(c), a circuit composed only of a parallel circuit of a diode and a resistor may be realized with another circuit configuration.

[0024] Specifically, as shown in Fig. 2(b), for diode 213, the anode terminal may be connected to the DRV terminal, the cathode terminal may be connected to one end of resistor 214, and for resistor 214, the other end may be connected to the gate terminal. And for resistor 215, one end may be connected to the DRV terminal and the other end may be connected to one end of resistor 214. Also, as shown in Fig. 2(c), for diode 213, the anode terminal may be connected to the DRV terminal, the cathode terminal may be connected to the gate terminal, and for resistor 215, one end may be connected to the DRV terminal and the other end may be connected to the gate terminal. In any case, it is sufficient that the gate drive circuit has one or more resistors and diodes, and the anode terminal of the diode is connected to the DRV terminal side of the power supply IC. As described above, according to Example 1, it is possible to achieve both reduction of power loss and reduction of noise in the power supply device.

Example

[0025] [Power Supply Device] The case where the snubber circuit 310 of Example 1 is applied to a power supply configuration having a power factor improvement function will be described in Example 2. The description of the main parts is the same as that of Example 1, and the same components as those in the configuration of Example 1 are denoted by the same reference numerals and the description thereof is omitted. Here, only the parts different from Example 1 will be described.

[0026] FIG. 5 shows a circuit configuration diagram of the power supply device 108 in the second embodiment. In the power supply configuration of the second embodiment, the output terminal 202a of the bridge diode 202 is connected to the inductor 401. Further, the transformer 204 of the second embodiment has a first primary winding N1 (hereinafter simply referred to as the primary winding N1) and a second primary winding N4 (hereinafter simply referred to as the primary winding N4). The diode 402, which is the fourth rectifying element, has its anode side connected to the inductor 401 and its cathode side connected to the connection point (hereinafter referred to as the intermediate tap) between the divided primary windings N1 and N4 of the transformer 204. To the other side of the primary winding N4, the primary smoothing capacitor 203 and the cathode side of the diode 207 are connected. With this power supply configuration, the power factor can be improved as compared with the power supply configuration of the first embodiment. Other connections and functions are the same as those in the first embodiment, and the description thereof is omitted.

[0027] [Switching operation] (At turn-on) Next, the switching operation of the second embodiment will be described. First, the operation when the FET 205 is turned on will be described. At this time, when the output voltage of the bridge diode 202 is higher than the voltage at the intermediate tap between the primary winding N1 and the primary winding N4 (hereinafter referred to as the intermediate tap voltage), current flows through the inductor 401, the diode 402, and the primary winding N1 to the FET 205. At the same time, energy is charged in the inductor 401. Further, current flows from the primary smoothing capacitor 203 through the primary winding N4 to the FET 205. When the output voltage of the bridge diode 202 is lower than the intermediate tap voltage, current flows through the FET 205 only from the primary smoothing capacitor 203 through the primary winding N4.

[0028] (At turn-off) When FET205 turns off, due to the energy charged in inductor 401 during turn-on, a charging current flows through inductor 401, diode 402, and primary winding N4 to charge primary smoothing capacitor 203. In this way, the input current output from AC power supply 201 does not directly charge primary smoothing capacitor 203 via bridge diode 202, but is charged when FET205 turns off. As a result, the power factor is improved from the capacitor input type current waveform to a current waveform with improved power factor.

[0029] In the power supply configuration of Embodiment 2, since a boost circuit is constituted by inductor 401, diode 402, and FET205, the voltage applied to FET205 is also higher than that in the power supply configuration of Embodiment 1. Therefore, similar to Embodiment 1, it is necessary to suppress the surge voltage when FET205 turns off by snubber circuit 310 constituted by auxiliary winding N3 of transformer 204, clamp capacitor 206, diode 207, and diode 208. However, similar to Embodiment 1, the energy stored in clamp capacitor 206 immediately after FET205 turns on flows through FET205 as a current. Therefore, by increasing the turn-on speed, the power loss generated in FET205 during turn-on can be reduced. Note that the configuration of gate drive circuit 300 may be any of FIGS. 2(a), 2(b), and 2(c) of Embodiment 1.

[0030] From the above, according to Embodiment 2, even when a clamp circuit constituted by a clamp capacitor, two diodes, and an auxiliary winding of a transformer is applied to a power supply configuration having a power factor improvement function, the turn-on speed is made faster than the turn-off speed. Thereby, the power loss during turn-on can be reduced, and the generation of high-frequency noise during turn-off can be prevented. As described above, according to Embodiment 2, it is possible to achieve both reduction of power loss and reduction of noise in the power supply device.

Description of Reference Numerals

[0031] 204 Transformer 205 Field Effect Transistor 206 Clamping capacitor 207 Diode 213 Diode 214 Resistor 215 Resistor

Claims

1. A transformer having a primary winding, a secondary winding, and an auxiliary winding; A first circuit in which a first capacitor and a first rectifying element are connected in series, the first circuit being connected in parallel to the primary winding; A switching element having one end connected to one end of the primary winding and being switchable between an on state and an off state; A second circuit in which the auxiliary winding and a second rectifying element are connected in series, the second circuit being connected between a connection point where the first capacitor and the first rectifying element are connected and the other end of the switching element; A third circuit having one or more resistors and a third rectifying element, the third circuit being connected to the gate terminal of the switching element; Comprising; The third circuit is characterized in that a resistance value in a direction in which current flows into the gate terminal of the switching element is smaller than a resistance value in a direction in which current flows out from the gate terminal. A power supply device.

2. Comprising a control unit having a control terminal for controlling the switching element; The third circuit has a first resistor and a second resistor having a resistance value larger than that of the first resistor; The third rectifying element is a diode having an anode terminal connected to the control terminal and a cathode terminal connected to one end of the first resistor; The other end of the first resistor is connected to the gate terminal; The second resistor has one end connected to the control terminal and the other end connected to the gate terminal. The power supply device according to claim 1.

3. Comprising a control unit having a control terminal for controlling the switching element; The third circuit has a first resistor and a second resistor having a resistance value larger than that of the first resistor; The third rectifying element is a diode having an anode terminal connected to the control terminal and a cathode terminal connected to one end of the first resistor; The other end of the first resistor is connected to the gate terminal; The second resistor has one end connected to the control terminal and the other end connected to one end of the first resistor. The power supply device according to claim 1.

4. Comprising a control unit having a control terminal for controlling the switching element; The third circuit has a second resistor; The third rectifying element is a diode having an anode terminal connected to the control terminal and a cathode terminal connected to the gate terminal; The power supply device according to claim 1, wherein one end of the second resistor is connected to the control terminal and the other end is connected to the gate terminal.

5. A rectifier circuit having two output terminals for rectifying an AC voltage; A second capacitor connected in parallel between the two output terminals; Comprising: The two output terminals of the rectifier circuit are connected in parallel to a series circuit in which the primary winding and the switching element are connected in series, the power supply device according to any one of claims 1 to 4.

6. A rectifier circuit having two output terminals for rectifying an AC voltage; An inductor having one end connected to the rectifier circuit and the other end connected to a fourth rectifying element; A second capacitor connected in parallel to a series circuit in which the primary winding and the switching element are connected in series; Comprising: The fourth rectifying element is a diode having an anode terminal connected to the inductor and a cathode terminal connected to an intermediate tap of the primary winding, the power supply device according to any one of claims 1 to 4.

7. Image forming means for forming an image on a recording material; The power supply device according to any one of claims 1 to 6 for supplying power to the image forming means; An image forming apparatus comprising the same.

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