Indicating device

Abstract

To prevent a reduction in display quality in a display that includes an area having a relatively small pixel density and an area having a relatively large pixel density.SOLUTION: A display includes a plurality of dummy pixels arranged outside a display area, one or more light shielding films covering the plurality of dummy pixels on a visible side, and a control circuit. The display area includes a first area and a second area having a smaller display pixel density than that of the first area. The dummy pixels are associated with display pixels arranged in the second area. The control circuit applies, for the same gradation level of image data, a larger drive current to the display pixels in the second area than the drive current applied to display pixels in the first area. The control circuit applies, to the dummy pixels, the same data signals as those to the associated display pixels in the second area. The control circuit measures deterioration of light emitting elements of the dummy pixels. The control circuit corrects data signals to the display pixels in the second area based on a result of measurement.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present disclosure relates to a display device.

Background Art

[0002] Since an OLED (Organic Light-Emitting Diode) element is a current-driven self-luminous element, it does not require a backlight and has advantages such as low power consumption, a wide viewing angle, and a high contrast ratio, and is expected in the development of flat panel displays.

[0003] The display area of an OLED display device may include regions with different pixel densities. For example, in some portable terminals such as smartphones and tablet computers, a camera for image capturing is disposed below the display area. Since the camera receives light from the outside, the camera is disposed below a region with a smaller pixel density than the surroundings.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0005] In order to suppress a decrease in the display quality of an image in a display area, it is necessary to make the luminance per pixel in an area with a relatively low pixel density higher than the luminance per pixel in a normal area with a relatively high pixel density. Since the OLED element is a current-driven element, more current is supplied to the pixels in the area with a low pixel density than to the pixels in the normal area with a high pixel density. Therefore, the degradation of the pixels in the area with a relatively low pixel density progresses faster than that of the pixels in the area with a relatively high pixel density. This is the same for display devices using other current-driven elements.

[0006] All the pixels in the display area deteriorate over time. Therefore, the display device estimates the deterioration of each pixel and corrects the luminance accordingly. However, as the deterioration rate increases, it becomes more difficult to accurately estimate the deterioration, and the correction accuracy decreases. Therefore, in a display device including an area with a relatively low pixel density and an area with a high pixel density, a technique for suppressing a decrease in display quality is desired.

Means for Solving the Problem

[0007] A display device according to an aspect of the present disclosure includes a display area including a plurality of display pixels that display an image of image data input from the outside, a plurality of dummy pixels disposed outside the display area, one or more light-shielding films that cover the plurality of dummy pixels on the viewing side, and a control circuit that controls the display area and the plurality of dummy pixels. The display area includes a first area and a second area having a lower display pixel density than the first area. Each dummy pixel of the plurality of dummy pixels is associated with a display pixel disposed in the second area. The plurality of display pixels and the plurality of dummy pixels each include a light-emitting element that emits light according to a drive current. The control circuit supplies a drive current larger than that of the display pixels in the first area to the display pixels in the second area for the same gradation level of the image data, supplies the same data signal as the associated display pixel in the second area to each dummy pixel of the plurality of dummy pixels, measures deterioration of the light-emitting element of each dummy pixel of the plurality of dummy pixels, and corrects the data signal to the display pixel in the second area associated with each of the plurality of dummy pixels based on the result of the measurement.

Effect of the Invention

[0008] According to an aspect of the present disclosure, it is possible to suppress a decrease in display quality of the display device.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2A

Figure 2B

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Embodiments for Carrying Out the Invention

[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be noted that this embodiment is only an example for realizing the present disclosure and does not limit the technical scope of the present disclosure.

[0011] In the following description, a pixel is the smallest unit in the display area and indicates an element that emits light of a single color, and may also be called a sub-pixel. A set of pixels of a plurality of different colors, for example, red, blue, and green pixels, constitutes an element that displays one color dot and may be called a main pixel. In the following, when distinguishing between an element that performs single-color display and an element that performs color display for the sake of clarity of explanation, they are called sub-pixels and main pixels, respectively. Note that the features of this specification can be applied to a display device that performs monochrome display, and its display area is composed of monochrome pixels.

[0012] Hereinafter, a configuration example of a display device will be described. The display area of the display device includes a second area (also referred to as a low-density area) with a relatively low pixel density and a first area (also referred to as a normal area) with a relatively high pixel density. In order to suppress a decrease in the display quality of an image in the display area, for the same gradation level of image data, the luminance of pixels in the low-density area is controlled to be higher than the luminance of pixels in the normal area. Note that a plurality of low-density areas with a lower pixel density than the normal area may be arranged, and these pixel densities may be different.

[0013] In the example described below, the light-emitting element of a pixel is a current-driven element, for example, an OLED (Organic Light-Emitting Diode) element. Therefore, for image data of the same gradation level, more current is supplied to pixels in the low-density area than to pixels in the normal area. For this reason, the degradation of pixels in the low-density area progresses earlier than that of pixels in the normal area. Pixels degrade as the display time elapses. The display device can estimate the degradation of each pixel and perform luminance correction accordingly. However, when the degradation speed increases, it becomes more difficult to accurately estimate the degradation of pixels, and the correction accuracy may decrease.

[0014] The display device described below includes dummy pixels corresponding to pixels in the low-density area and arranged outside the display area. The dummy pixels are controlled to emit light with the same luminance as the corresponding pixels. The dummy pixels are covered with a light-shielding film on the viewing side. Thereby, it is possible to prevent the dummy pixels from being viewed by the user.

[0015] The dummy pixels are pixels for degradation measurement. The display device measures the degree of degradation of the light-emitting elements of the dummy pixels and feeds back the measurement results to the luminance correction control of the corresponding pixels in the low-density area. By measuring the degradation of the dummy pixels that have nothing to do with the display of the image, it is possible to more appropriately perform the luminance correction of the pixels in the low-density area while avoiding the influence on the image display.

[0016] [Configuration of Display Device] Referring to FIG. 1, the overall configuration of the display device according to the present embodiment will be described. Note that, for clarity of explanation, the dimensions and shapes of the illustrated objects may be exaggerated in some cases. Hereinafter, an OLED display device will be described as an example of the display device.

[0017] FIG. 1 schematically shows a configuration example of an OLED display device 10. The OLED display device 10 includes a TFT (Thin Film Transistor) substrate 100 on which OLED elements (light-emitting elements) are formed, and a sealing structure portion 200 that seals the OLED elements. A control circuit is disposed around a cathode electrode formation region 114 outside a display region 125 of the TFT substrate 100. Specifically, a scanning driver 131, an emission driver 132, an electrostatic discharge protection circuit 133, a driver IC 134, and a demultiplexer 136 are disposed.

[0018] The driver IC 134 is connected to an external device via an FPC (Flexible Printed Circuit) 135. The scanning driver 131 drives the scanning lines of the TFT substrate 100. The emission driver 132 drives emission control lines to control the light emission of each pixel. The electrostatic discharge protection circuit 133 prevents electrostatic breakdown of elements on the TFT substrate. The driver IC 134 is mounted using, for example, an anisotropic conductive film (ACF: Anisotropic Conductive Film).

[0019] The driver IC 134 supplies a control signal including a power supply and a timing signal to the scanning driver 131 and the emission driver 132. Further, the driver IC 134 supplies a power supply and a data signal to the demultiplexer 136. The demultiplexer 136 sequentially outputs the output of one pin of the driver IC 134 to d data lines (d is an integer of 2 or more). The demultiplexer 136 drives d times as many data lines as the number of output pins of the driver IC 134 by switching the output destination data line of the data signal from the driver IC 134 d times within a scanning period.

[0020] [Pixel Circuit Configuration] On the TFT substrate 100, a plurality of pixel circuits are formed to control the current supplied to the anode electrodes of a plurality of sub-pixels respectively. FIG. 2A shows a configuration example of the pixel circuit. Each pixel circuit includes a driving transistor T1, a selection transistor T2, an emission transistor T3, and a holding capacitor C1. The pixel circuit controls the light emission of the OLED element E1. The transistor is a TFT.

[0021] The selection transistor T2 is a switch for selecting a sub-pixel. The selection transistor T2 is a p-channel type TFT, and its gate terminal is connected to the scanning line 106. The source terminal is connected to the data line 105. The drain terminal is connected to the gate terminal of the driving transistor T1.

[0022] The driving transistor T1 is a transistor (driving TFT) for driving the OLED element E1. The driving transistor T1 is a p-channel type TFT, and its gate terminal is connected to the drain terminal of the selection transistor T2. The source terminal of the driving transistor T1 is connected to the power supply line 108 for transmitting the power supply potential VDD. The drain terminal is connected to the source terminal of the emission transistor T3. A holding capacitor C1 is formed between the gate terminal and the source terminal of the driving transistor T1.

[0023] The emission transistor T3 is a switch for controlling the supply and stop of the driving current to the OLED element E1. The emission transistor T3 is a p-channel type TFT, and its gate terminal is connected to the emission control line 107. The source terminal of the emission transistor T3 is connected to the drain terminal of the driving transistor T1. The drain terminal of the emission transistor T3 is connected to the OLED element E1. The cathode power supply potential VSS is applied to the cathode of the OLED element E1.

[0024] Next, the operation of the pixel circuit will be described. The scanning driver 131 outputs a selection pulse to the scanning line 106, turning on the selection transistor T2. The data voltage supplied from the driver IC 134 via the data line 105 is stored in the holding capacitor C1. The holding capacitor C1 holds the stored voltage throughout one frame period. Due to the holding voltage, the conductance of the driving transistor T1 changes analogously, and the driving transistor T1 supplies a forward bias current corresponding to the emission gradation to the OLED element E1.

[0025] The emission transistor T3 is located on the supply path of the driving current. The emission driver 132 outputs a control signal to the emission control line 107 to control the on / off of the emission transistor T3. When the emission transistor T3 is in the on state, the driving current is supplied to the OLED element E1. When the emission transistor T3 is in the off state, this supply is stopped. By controlling the on / off of the emission transistor T3, the lighting period (duty ratio) within one frame period can be controlled.

[0026] Figure 2B shows another configuration example of the pixel circuit. The pixel circuit has a reset transistor T4 instead of the emission transistor T3 in Figure 2A. The reset transistor T4 controls the electrical connection between the reference voltage supply line 110 and the anode of the OLED element E1. This control is performed by supplying a reset control signal from the reset control line 109 to the gate of the reset transistor T4.

[0027] The reset transistor T4 can be used for various purposes. For example, the reset transistor T4 may be used to reset the anode electrode of the OLED element E1 to a sufficiently low voltage below the black signal level once in order to suppress crosstalk due to leakage current between the OLED elements E1.

[0028] The pixel circuits in FIGS. 2A and 2B are examples, and the pixel circuits may have other circuit configurations. Although the pixel circuits in FIGS. 2A and 2B use p-channel type TFTs, the pixel circuits may use n-channel type TFTs.

[0029] [Cross-sectional structure of the OLED display device] Hereinafter, the structure of the OLED display device will be described. FIG. 3 schematically shows the cross-sectional structure of the substrate of the TFT substrate 100, the driving TFT and the OLED element, and the sealing structure portion 200. The substrate is, for example, a flexible substrate or may be a rigid substrate. In the following description, up and down indicate up and down in the drawing. Note that the sealing structure portion 200 may use a sealing substrate.

[0030] The OLED display device includes a TFT substrate 100 and a sealing structure portion 200. The TFT substrate 100 includes a substrate 202, a pixel circuit (TFT array) formed on a flexible substrate, and an OLED element. The pixel circuit and the OLED element are formed between the substrate 202 and the sealing structure portion 200.

[0031] The substrate 202 is a flexible substrate composed of a plurality of layers including an organic layer, such as a polyimide layer, and an inorganic layer, such as a silicon oxide layer or a silicon nitride layer. A pixel circuit (TFT array) and an OLED element are formed on the substrate 202. The OLED element includes a lower electrode (for example, an anode electrode 308), an upper electrode (for example, a cathode electrode 302), and an organic light-emitting multilayer film 304. The organic light-emitting multilayer film 304 is disposed between the cathode electrode 302 and the anode electrode 308. The plurality of anode electrodes 308 are disposed on the same plane (for example, on the planarization film 321), and one organic light-emitting multilayer film 304 is disposed on one anode electrode 308. In the example of FIG. 3, the cathode electrode 302 of one sub-pixel is a part of a continuous conductor film.

[0032] Figure 3 shows an example of the pixel structure of a top emission type (OLED element). In the pixel structure of the top emission type, a common cathode electrode 302 is arranged on the side where light is emitted (the upper side and the viewing side in the drawing) for a plurality of pixels. The cathode electrode 302 has a shape that covers the entire surface of the display area 125. In the pixel structure of the top emission type, the anode electrode 308 reflects light, and the cathode electrode 302 has light transmissivity. Thus, the configuration is such that light from the organic light-emitting multilayer film 304 is emitted toward the sealing structure portion 200.

[0033] In the top emission type, compared with the bottom emission type that extracts light to the substrate 202 side, since there is no need to provide a transmission region for light extraction within the pixel region, the light-emitting portion can also be formed on the pixel circuit and wiring, etc., and it has a high degree of freedom in the layout of the pixel circuit.

[0034] Note that the pixel structure of the bottom emission type has a transparent anode electrode and a reflective cathode electrode, and emits light to the outside (viewing side) through the substrate. Also, a transparent display device can be realized by forming both the anode electrode and the cathode electrode with a light-transmissive material. The flexible substrate structure of the present disclosure can be applied to any type of OLED display device among these, and further can be applied to a display device including a light-emitting element different from OLED.

[0035] Sub-pixels generally display one of the colors red, green, or blue in a full-color OLED display device. One main pixel is composed of red, green, and blue sub-pixels. A pixel circuit including a plurality of thin film transistors controls the light emission of the corresponding OLED element. The OLED element is composed of an anode electrode which is a lower electrode, an organic light-emitting layer, and a cathode electrode which is an upper electrode.

[0036] The OLED display device has a plurality of pixel circuits (TFT array), each of which includes a plurality of switches. Each of the plurality of pixel circuits is formed between the flexible substrate 202 and the anode electrode 308, and controls the current supplied to each of the plurality of anode electrodes 308. The driving TFT shown in FIG. 3 has a top-gate structure. Similarly, other TFTs also have a top-gate structure.

[0037] A polysilicon layer exists on the substrate 202. In the polysilicon layer, a channel 315 that provides transistor characteristics of the TFT is present at a position where a gate electrode 314 will be formed later. At both ends thereof, source / drain regions 316, 317 doped with high-concentration impurities are present for electrical connection to the upper wiring layer.

[0038] In some cases, a lightly doped drain (LDD) doped with low-concentration impurities is formed between the channel 315 and the source / drain regions 316, 317. Note that the illustration of the LDD is omitted because it becomes complicated. On the polysilicon layer, a gate electrode 314 is formed via a gate insulating film 323. An interlayer insulating film 322 is formed on the layer of the gate electrode 314.

[0039] In the display region 125, source / drain electrodes 310, 312 are formed on the interlayer insulating film 322. The source / drain electrodes 310, 312 are connected to the source / drain regions 316, 317 of the polysilicon layer through contact holes 311, 313 formed in the interlayer insulating film 322 and the gate insulating film 323.

[0040] An insulating organic planarization film 321 is formed on the source / drain electrodes 310, 312. An anode electrode 308 is formed on the planarization film 321. The anode electrode 308 is connected to the source / drain electrode 312 through a contact hole 309 in the planarization film 321. The TFT of the pixel circuit is formed below the anode electrode 308.

[0041] The anode electrode 308 is composed of, for example, a central reflective metal layer and a transparent conductive layer sandwiching the reflective metal layer. An insulating pixel defining layer (PDL) 307 that separates the OLED elements is formed on the anode electrode 308. The OLED elements are formed in the openings 306 of the pixel defining layer 307.

[0042] An organic light-emitting multilayer film 304 is formed on the anode electrode 308. The organic light-emitting multilayer film 304 adheres to the pixel defining layer 307 at the openings 306 of the pixel defining layer 307 and their peripheries. For each RGB color, an organic light-emitting material is formed into a film, and the organic light-emitting multilayer film 304 is formed on the anode electrode 308.

[0043] The film formation of the organic light-emitting multilayer film 304 uses a metal mask to deposit the organic light-emitting material at positions corresponding to the pixels. The organic light-emitting multilayer film 304 is composed of, for example, a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer from the lower layer side. The laminated structure of the organic light-emitting multilayer film 304 is determined by design.

[0044] A cathode electrode 302 is formed on the organic light-emitting multilayer film 304. The cathode electrode 302 is an electrode having light transmissibility. The cathode electrode 302 transmits a part of the visible light from the organic light-emitting multilayer film 304. The layer of the cathode electrode 302 is formed by depositing a metal such as Al, Mg, or an alloy containing these metals. When the resistance of the cathode electrode 302 is high and the uniformity of the emission luminance is impaired, an auxiliary electrode layer is further added with a material for forming a transparent electrode such as ITO or IZO.

[0045] The laminated film of the anode electrode 308, the organic light-emitting multilayer film 304, and the cathode electrode 302 formed in the opening 306 of the pixel defining layer 307 constitutes the OLED element. A sealing structure portion 200 is formed in direct contact on the cathode electrode 302. The sealing structure portion (thin film sealing portion) 200 includes an inorganic insulator layer 301, an organic planarization film 331, and an inorganic insulator layer 332 from the lower layer. The inorganic insulator layers 301 and 332 are the lower and upper passivation layers, respectively, for improving reliability.

[0046] On the sealing structure portion 200, from the lower layer, a touch screen 333, a λ / 4 plate 334, a polarizing plate 335, and a resin cover lens 336 are laminated. The λ / 4 plate 334 and the polarizing plate 335 suppress the reflection of light incident from the outside. Note that the laminated structure of the OLED display device described with reference to FIG. 3 is an example, and a part of the layers shown in FIG. 3 may be omitted, or layers not shown in FIG. 3 may be added. Instead of laminating the touch screen on the TFT substrate 100 as described above, a touch screen manufactured by a separate process from the TFT substrate 100 may be aligned with the TFT substrate 100 and bonded thereto.

[0047] [Dummy pixel layout] FIG. 4 schematically shows a display region 125 and dummy pixels arranged outside the display region. The OLED display device 10 is mounted on, for example, a mobile terminal. The display region 125 includes a normal region 451 having a normal pixel density and a low-density region 453 having a pixel density lower than that of the normal region 451. One or more cameras 465 are arranged below the low-density region 453. In FIG. 4, one of the plurality of cameras is indicated by reference numeral 465 as an example. Hereinafter, a sub-pixel or a main pixel in the display region 125 may be referred to as a display sub-pixel or a display main pixel.

[0048] The low-density region 453 is arranged on the viewing side of the camera 465, and the camera 465 captures an object on the viewing side with the light that has passed through the low-density region 453. So as not to interfere with the shooting by the camera 465, the pixel density of the low-density region 453 is lower than the pixel density of the surrounding normal region 451. A control device (not shown) transmits, for example, data of an image captured by the camera 465 to the OLED display device 10. Note that FIG. 4 shows, as an example of the low-density region, a region where a camera is arranged below it, but the features in this specification can be applied to a display device including a region with a relatively low pixel density for other purposes.

[0049] The low-density region 453 is composed of main pixels arranged in N columns and M rows. The main pixel columns are composed of main pixels arranged along the Y-axis, which is the vertical direction in FIG. 4. The main pixel rows are composed of main pixels arranged along the X-axis, which is the horizontal direction in FIG. 4.

[0050] As shown in FIG. 4, dummy pixels (dummy sub-pixels) are arranged outside the display region 125 of the OLED display panel. As will be described later, the dummy sub-pixels are used to estimate the degradation of the corresponding sub-pixels in the low-density region 453. The driver IC 134 controls the dummy sub-pixels to emit light with the same luminance as the corresponding sub-pixels in the low-density region 453, and measures the degradation of the dummy sub-pixels. Thereby, the degradation of the corresponding sub-pixels can be accurately evaluated.

[0051] In the example of FIG. 4, dummy main pixels corresponding to each of the main pixels in the low-density region 453 are arranged outside the display region 125. In the example of FIG. 4, M×N / 2 dummy main pixels are arranged on each of the left and right sides of the display region 125. Note that only dummy sub-pixels for some of the sub-pixels in the low-density region 453 may be prepared, and the layout of the dummy sub-pixels is not limited to the layout of FIG. 4 and is arbitrary.

[0052] FIG. 5 shows the details of the region 455 surrounded by the dashed-dotted line in FIG. 4. FIG. 5 shows the pixel layout of the delta nabla arrangement (also simply called the delta arrangement). Note that the features in this embodiment can be applied to display devices having other pixel layouts.

[0053] The region 455 is a region near the boundary between the normal region 451 and a part of the low-density region 453. In the example shown in FIG. 5, the pixel density of the low-density region 453 is 1 / 4 of that of the normal region 451. The sub-pixels in the low-density region 453 are controlled to emit light with a luminance four times that of the sub-pixels in the normal region 451 for the same image data.

[0054] The display area 125 is composed of a plurality of red sub-pixels 51R, a plurality of green sub-pixels 51G, and a plurality of blue sub-pixels 51B, which are arranged in the plane. In FIG. 5, one red sub-pixel, one green sub-pixel, and one blue sub-pixel are indicated by reference numerals as an example. In FIG. 5, the (round-cornered) squares with the same hatching indicate sub-pixels of the same color. In FIG. 5, the shape of the sub-pixels is square, but the shape of the sub-pixels is arbitrary and may be, for example, hexagonal or octagonal.

[0055] The sub-pixel column is an array extending along the Y-axis, consisting of sub-pixels at the same X-axis position. In the sub-pixel column, the red sub-pixels 51R, the blue sub-pixels 51B, and the green sub-pixels 51G are arranged cyclically. For example, the sub-pixels of the sub-pixel column are connected to the same data line. The sub-pixel row is an array extending along the X-axis, consisting of sub-pixels of the same color at the same Y-axis position. For example, the sub-pixels of the sub-pixel row are connected to the same scanning line.

[0056] In the configuration example of FIG. 5, the normal area 451 includes two types of main pixels, the first type of main pixel 53A and the second type of main pixel 53B, which are arranged in a matrix. In FIG. 5, only one first type of main pixel is indicated by the reference numeral 53A as an example. Also, only one second type of main pixel is indicated by the reference numeral 53B as an example. Note that when the sub-pixel rendering technology is used, the main pixels of the external image data do not match the main pixels of the panel.

[0057] In FIG. 5, the first type of main pixel 53A is shown as a triangle with one vertex on the left side and two vertices on the right side. Also, the second type of main pixel 53B is shown as a triangle with one vertex on the right side and two vertices on the left side.

[0058] In the first type of main pixel 53A, the red sub-pixels 51R and the blue sub-pixels 51B are arranged continuously in the same sub-pixel column. The sub-pixel column containing the green sub-pixel 51G is adjacent to the left of the sub-pixel column containing the red sub-pixels 51R and the blue sub-pixels 51B. The green sub-pixel 51G is located at the center of the red sub-pixel 51R and the blue sub-pixel 51B in the Y-axis position.

[0059] In the second type of main pixel 53B, the red sub-pixels 51R and the blue sub-pixels 51 are arranged continuously in the same sub-pixel column. The sub-pixel column including the green sub-pixels 51G is adjacent to the right of the sub-pixel column including the red sub-pixels 51R and the blue sub-pixels 51B. The green sub-pixels 51G are located at the center of the red sub-pixels 51R and the blue sub-pixels 51B in the Y direction.

[0060] The low-density region 453 is composed of main pixels 53C having the same configuration as the first type of main pixel 53A. FIG. 5 shows the main pixels of 5 columns and 4 rows. 53C The main pixels 53C are regularly arranged, and the distance between the main pixels along the X-axis and the Y-axis is constant. Also, adjacent main pixel rows are shifted from each other by half a pitch.

[0061] The sub-pixel layout of the low-density region 453 has a configuration in which some sub-pixels are removed from the layout of the normal region 451. The sub-pixels of the low-density region 453 form sub-pixel rows and sub-pixel columns together with the sub-pixels of the normal region. Each sub-pixel column of the low-density region 453 forms one sub-pixel column together with the corresponding sub-pixel column of the normal region 451 and is connected to the same data line. Each sub-pixel row of the low-density region 453 forms one sub-pixel row together with the corresponding sub-pixel row of the normal region 451 and is connected to the same scanning line.

[0062] FIG. 6 shows the dummy pixel layout of the region 461 surrounded by the dashed-dotted line in FIG. 4. The region 461 includes a part of the dummy pixels arranged outside the display region 125. FIG. 6 shows a plurality of dummy red sub-pixels 61R, a plurality of dummy blue sub-pixels 61B, and a plurality of dummy green sub-pixels 61G. One dummy red sub-pixel, one dummy blue sub-pixel, and one dummy green sub-pixel are indicated by reference numerals 61R, 61B, and 61G as an example.

[0063] In the layout example of FIG. 6, two types of main pixels, the first type of dummy main pixel 63A and the second type of dummy main pixel 63B, are arranged in a matrix. In FIG. 6, one first type of dummy main pixel and one second type of dummy main pixel are indicated by corresponding reference numerals 63A and 63B, respectively. The first type of dummy main pixel 63A and the second type of dummy main pixel 63B have the same configuration as the first type of main pixel 53A and the second type of main pixel 53B in the normal region 451, respectively.

[0064] Each dummy red sub-pixel 61R is associated with one red sub-pixel 51R in the low-density region 453. In one example, those OLED elements have the same size and structure. Different dummy red sub-pixels 61R are associated with different red sub-pixels 51R in the low-density region 453. 。

[0065] Each dummy blue sub-pixel 61B is associated with one blue sub-pixel 51B in the low-density region 453. In one example, those OLED elements have the same size and structure. Different dummy blue sub-pixels 61B are associated with different blue sub-pixels 51B in the low-density region 453.

[0066] Each dummy green sub-pixel 61G is associated with one green sub-pixel 51G in the low-density region 453. In one example, those OLED elements have the same size and structure. Different dummy green sub-pixels 61G are associated with different green sub-pixels 51G in the low-density region 453.

[0067] In the example of FIG. 6, each first type of dummy main pixel 63A is associated with one main pixel 53C in the low-density region 453. Similarly, each second type of dummy main pixel 63B is associated with one main pixel 53C in the low-density region 453. Different first type of dummy main pixels 63A and second type of dummy main pixels 63B are associated with different main pixels 53C in the low-density region 453.

[0068] The same data signal is applied to the associated dummy main pixel and the display main pixel in the low-density region 453. That is, the dummy sub-pixel is given the same data signal as the display sub-pixel in the corresponding low-density region 453, and is controlled to emit light with the same luminance as the corresponding sub-pixel. Thus, by measuring the degradation of the dummy sub-pixel, the degradation of the corresponding display sub-pixel can be accurately estimated.

[0069] In the example of FIG. 6, six red, blue, and green dummy sub-pixels are arranged in each row, and the measured values of the degradation states of these six dummy pixels are averaged to estimate the degradation state of the display color pixels in the corresponding low-density region 453. By using a plurality of dummy pixels in this way, the error in estimating degradation due to manufacturing variations can be minimized, and more accurate degradation compensation becomes possible. Note that the number of dummy sub-pixels only needs to be at least one set of red, blue, and green, and the optimal number of dummy pixels is determined in consideration of the balance between the area where the dummy pixels can be arranged and the required degradation compensation accuracy.

[0070] FIG. 6 shows a plurality of opaque light-shielding films 621 separated from each other. In FIG. 6, one light-shielding film indicated by a dashed rounded rectangle is indicated by reference numeral 621 as an example. By arranging a plurality of light-shielding films 621, the size of one light-shielding film can be reduced. Thereby, an unfavorable influence on touch detection by the touch screen 333 can be reduced. In particular, this is effective when the light-shielding film 621 is formed in the same layer as the metal film of the touch electrode of the touch screen, as will be described later.

[0071] The plurality of light-shielding films 621 are arranged so as to cover the plurality of dummy sub-pixels from the viewing side. The light-shielding film 621 blocks the light of the sub-pixels below it so that it is not visible to the user. FIG. 6 shows the light-shielding film 621 that covers some of the dummy sub-pixels on the left side when viewed from the viewing side, but all of the dummy pixels on both the left and right sides are covered by the light-shielding film 621. Element? Blocks the light of the sub-pixels below it so that it is not visible to the user. FIG. 6 shows the light-shielding film 621 that covers some of the dummy sub-pixels on the left side when viewed from the viewing side, but all of the dummy pixels on both the left and right sides are covered by the light-shielding film 621.

[0072] The number of sub-pixels covered by the light-shielding film 621 is arbitrary and may be one. In the example of FIG. 6, the light-shielding films 621 are formed in the same layer (same material and same process), but some of the light-shielding films 621 may be included in a layer different from the other light-shielding films 621. The shape of the light-shielding film 621 is arbitrary and is not limited to the example shown in FIG. 6, and different light-shielding films 621 may have different shapes. On one or both sides of the display area 125, all the dummy sub-pixels may be covered by one light-shielding film 621.

[0073] In the example of FIG. 6, in the example of dummy sub-pixels extending along the Y axis, similar to the normal region 451, dummy red sub-pixels 61R, dummy blue sub-pixels 61B, and dummy green sub-pixels 61G are cyclically arranged. For example, the dummy sub-pixels in the dummy sub-pixel column are connected to the same data line. The dummy sub-pixel row is an arrangement extending along the X axis and consisting of dummy sub-pixels of the same color at the same Y-axis position. For example, the dummy sub-pixels in the dummy sub-pixel row are connected to the same scanning line.

[0074] The layout pattern of the dummy sub-pixels may be different from that of the normal region 451. For example, the sub-pixels constituting the dummy main pixel corresponding to the display main pixel may not be adjacent and may be arranged at positions separated so as to sandwich other sub-pixels. For example, the layouts of the dummy sub-pixels on both sides of the display area 125 may be the same or different, and the number of dummy sub-pixels may also be the same or different. The position of the dummy sub-pixels is not particularly limited outside the display area 125.

[0075] [Light-shielding pattern layout] FIG. 7 is a plan view showing an example of a light-shielding pattern and a touch electrode pattern formed on the touch screen 333. FIG. 7 shows, as an example, an electrode pattern of a projection-type capacitance method. The touch screen 333 includes X touch electrodes 671 extending along the X axis and arranged along the Y axis, and Y touch electrodes 681 extending along the Y axis and arranged along the X axis. FIG. 7 shows one X touch electrode and one Y touch electrode, as examples, denoted by reference numerals 671 and 681, respectively.

[0076] The X-touch electrode 671 is composed of electrode pieces 651 arranged along the X-axis in a rhombus or triangle shape, and rectangular connecting parts 653 thinner than the electrode pieces 651 that connect the corners of adjacent electrode pieces 651. The electrode pieces 651 and the connecting parts 653 are formed of a transparent conductor, for example, ITO. The X-touch electrode 671 is formed of a continuous transparent conductor, and the electrode pieces 651 and the connecting parts 653 are included in the same layer.

[0077] The Y-touch electrode 681 is composed of electrode pieces 661 arranged along the Y-axis in a rhombus or triangle shape, and rectangular connecting parts 663 thinner than 661 that connect the corners of adjacent electrode pieces 661. The electrode pieces 661 are formed of a transparent conductor, for example, ITO or IZO. In the example of FIG. 7, the electrode pieces 661 are included in the same layer as the X-touch electrode 671. The connecting parts 663 are formed in a layer above the electrode pieces 661 and are formed of a light-shielding conductor (metal). The connecting parts 663 can be formed of, for example, Al or Mo.

[0078] The electrode pieces 651 of the X-touch electrode 671 and the electrode pieces 661 of the Y-touch electrode 681 are arranged in a matrix. The driver IC 134 or a detection circuit (not shown) detects a capacitance change between the X-touch electrode 671 and the Y-touch electrode 681 due to an indicator such as a finger or a touch pen brought close to the touch screen 333 via the wirings 673 and 683. Thereby, the touch position is identified.

[0079] The connecting part 663 of the Y-touch electrode is arranged so as to intersect the connecting part 653 of the X-touch electrode 671 in a plan view. An insulating layer (not shown) is formed between the layer of the connecting part 663 and the layer of the X-touch electrode 671. The connecting part 663 and the connecting part 653 intersect via an insulating film, and electrical insulation is maintained.

[0080] The touch screen 333 further includes a light-shielding film pattern composed of a plurality of light-shielding films 621. The light-shielding film 621 is disposed outside the touch detection region where the touch electrodes 671 and 681 are arranged. As described above, the light-shielding film 621 is formed of a light-shielding material. In the example of FIG. 7, it is formed in the same layer as the connection portion 663 of the Y touch electrode, that is, formed of a light-shielding metal. Thus, by forming the light-shielding film 621 in the same layer as the light-shielding element of the touch screen 333, the manufacturing of the display device can be made efficient. With the plurality of light-shielding films 621, the size of one light-shielding film becomes smaller, and an unfavorable influence on touch detection can be reduced.

[0081] In the configuration example shown in FIG. 7, one light-shielding film row is arranged on each of the left and right sides of the touch detection region. The number of rows and the number of light-shielding films constituting the row are arbitrary. As described above, the light-shielding film 621 is aligned so as to cover the dummy sub-pixels. Note that the pattern of the light-shielding film 621 is arbitrary. For example, the pattern shapes (the number and shape of the light-shielding films 621) on both sides of the touch detection region may be different. Note that the light-shielding film 621 may be formed in the same layer as another light-shielding element different from the touch electrodes included in the touch screen 333, or may be formed in a layer different from the touch screen 333. The method of the touch screen 333 is arbitrary, and the touch screen 333 may be omitted.

[0082] [Wiring Layout] Hereinafter, a wiring layout example of the OLED display device 10 will be described. FIG. 8 schematically shows the layout of control wirings on the TFT substrate 100. In the configuration example of FIG. 8, the layout of pixel circuits in the normal region 451 is in a stripe arrangement. Specifically, sub-pixel columns extending along the Y axis are composed of sub-pixels of the same color. Sub-pixel rows extending along the X axis are composed of red sub-pixels, green sub-pixels, and blue sub-pixels arranged cyclically. The low-density region 453 has a configuration in which some pixels are thinned out from the pixel layout of the normal region 451. In the blank region in the low-density region 453, pixel circuits including OLED elements are not formed, and only wirings pass through.

[0083] Dummy pixel regions 457A and 457B are present on both sides of the display region 125, respectively. FIG. 8 shows one dummy red sub-pixel column, one dummy green sub-pixel column, and one dummy blue sub-pixel column in each of the dummy pixel regions 457A and 457B, but a plurality of dummy sub-pixels may be arranged to improve the degradation compensation accuracy.

[0084] A plurality of scanning lines 106 extend from the scanning driver 131 along the X-axis. Also, a plurality of emission control lines 107 extend from the emission driver 132 along the X-axis. FIG. 8 indicates one scanning line and one emission control line with reference numerals 106 and 107, respectively, as an example.

[0085] In the configuration example shown in FIG. 8, the scanning line 106 transmits selection signals for the dummy pixel regions 457A and 457B in addition to the normal region 451 and the low-density region 453. Since the dummy sub-pixels are connected to the common scanning line 106 with the sub-pixels in the display region 125, the number of wirings can be reduced.

[0086] Also, the emission control line 107 transmits emission control signals for the dummy pixel regions 457A and 457B in addition to the normal region 451 and the low-density region 453. Since the dummy sub-pixels are connected to the common emission control line 107 with the sub-pixels in the display region 125, the number of wirings can be reduced.

[0087] The driver IC 134 transmits a control signal to the scanning driver 131 through the wiring 711 and transmits a control signal to the emission driver 132 through the wiring 713. The driver IC 134 controls the timing of the scanning signal (selection pulse) from the scanning driver 131 and the emission control signal of the emission driver 132 based on external image data (image signal).

[0088] Driver IC 134 supplies data signals of the sub-pixels in the normal region 451 and the low-density region 453 to the demultiplexer 136 via the wiring 705. FIG. 8 shows one wiring as an example, indicated by reference numeral 705. Driver IC 134 determines the data signals of the sub-pixels in the normal region 451 and the low-density region 453 from the gradation levels of one or more sub-pixels of the externally supplied image data (frame). The demultiplexer 136 sequentially outputs one output of Driver IC 134 to N data lines 105 (N is an integer of 2 or more) during the scanning period. In FIG. 8, one of the plurality of data lines extending along the Y-axis is indicated by reference numeral 105 as an example.

[0089] Driver IC 134 further supplies the data signals of the dummy sub-pixels to the dummy pixel region 457A via a plurality of wirings 723A. Driver IC 134 supplies the data signals of the dummy sub-pixels to the dummy pixel region 457B via a plurality of wirings 723B. All the dummy sub-pixels through which one wiring 723A transmits the data signal are selected by different scanning lines 106. All the dummy sub-pixels through which one wiring 723B transmits the data signal are selected by different scanning lines 106.

[0090] Driver IC 134 transmits a control signal for deterioration measurement to the dummy pixel region 457A via the wiring 721A, and transmits a control signal for deterioration measurement to the dummy pixel region 457B via the wiring 721B. The wiring 721A is connected to all the dummy sub-pixels in the dummy pixel region 457A. The wiring 721B is connected to all the dummy sub-pixels in the dummy pixel region 457B. Details of the deterioration measurement control signal will be described later.

[0091] Driver IC 134 receives the deterioration measurement signals of the dummy sub-pixels in the dummy pixel region 457A via a plurality of wirings 725A. In the configuration example of FIG. 8, all the dummy sub-pixels through which one wiring 725A transmits the deterioration measurement signal are selected by different scanning lines 106. In the example of FIG. 8, the group of dummy sub-pixels connected to each wiring 725A is common with the group of dummy sub-pixels connected to each wiring 723A that transmits the data signal.

[0092] The driver IC 134 receives the degradation measurement signals of the dummy sub-pixels in the dummy pixel region 457A via a plurality of wirings 725B. In the configuration example of FIG. 8, all the dummy sub-pixels through which one wiring 725B transmits the degradation measurement signals are selected by different scanning lines 106. Details of the method for measuring the degradation of the dummy sub-pixels will be described later.

[0093] FIG. 9 schematically shows the layout of the anode power line and the cathode electrode on the TFT substrate 100. The driver IC 134 includes a DC-DC converter, generates a plurality of different power supply potentials, and supplies them to the OLED display panel. In the configuration example shown in FIG. 9, the driver IC 134 outputs the anode power supply potential VDD to the anode power line 108 and outputs the cathode power supply potential VSS to the cathode electrode 302.

[0094] The anode power line 108 is in a mesh shape and transmits the anode power supply potential VDD to the sub-pixels in the normal region 451, the low-density region 453, and the dummy pixel regions 457A and 457B. The cathode electrode 302 has a sheet shape and covers the entire normal region 451, the low-density region 453, and the dummy pixel regions 457A and 457B. The cathode electrodes of the sub-pixels in these regions 451, 453, 457A, and 457B are part of a single sheet-shaped cathode electrode 302.

[0095] [Emission control method] Hereinafter, the emission control method for the sub-pixels of the OLED display device 10 will be described. The driver IC 134 controls the emission luminance of each of the sub-pixels in the normal region 451, the low-density region 453, and the dummy pixel regions 457A and 457B. FIG. 10 is a graph schematically showing the relationship between the data signal voltage (also simply referred to as the data signal) to the sub-pixels in the normal region 451 and the low-density region 453 and the emission luminance of the OLED element.

[0096] In the graph of FIG. 10, curve 771 shows the characteristics of the sub-pixels in the normal region 451 and the sub-pixels before degradation in the low-density region 453. Corresponding to the white gradation level, the data signal voltage Vd0 is applied to the sub-pixels in the normal region 451, and the data signal voltage Vd1 is applied to the sub-pixels in the low-density region 453. In this example, the sub-pixels in the low-density region 453 emit light with a luminance four times that of the sub-pixels in the normal region 451.

[0097] As the emission time elapses, the sub-pixels (OLED elements) in the low-density region 453 deteriorate at a rate more than one digit faster than that of the sub-pixels in the normal region 451. Here, it is assumed that the sub-pixels in the normal region 451 do not deteriorate and maintain their characteristics, while the sub-pixels in the low-density region 453 deteriorate as the emission time elapses. By doing so, it is possible to realize sufficient degradation compensation performance as a display system with a minimum circuit configuration.

[0098] In the graph of FIG. 10, curve 773 shows the characteristics of the deteriorated sub-pixels in the low-density region 453. In order to emit light with the same luminance (400%) as before degradation, a data signal voltage Vd2 larger than the data signal voltage Vd1 is applied to the sub-pixels in the low-density region 453. The data signal voltage Vd2 is calculated based on the correction coefficient A corresponding to the degradation.

[0099] Curve 775 shows the characteristics of the further deteriorated sub-pixels in the low-density region 453. In order to emit light with the same luminance (400%) as before degradation, a data signal voltage Vd3 larger than the data signal voltage Vd2 is applied to the sub-pixels in the low-density region 453. The data signal voltage Vd3 is calculated based on the correction coefficient B corresponding to the degradation. As will be described later, the correction coefficient A and the correction coefficient B are determined based on the measurement results of the degradation of the dummy sub-pixels.

[0100] The degradation of the sub-pixels in the normal region 451 is slower compared to the degradation of the sub-pixels in the low-density region 453. Therefore, the driver IC 134 may output, for example, the data signals of the sub-pixels in the normal region 451 without correcting them according to the degradation of the sub-pixels. In other examples, the driver IC 134 may correct the data signals of the normal region 451 according to the degradation. Since no dummy sub-pixels corresponding to the sub-pixels in the normal region 451 are provided, the driver IC 134 can, for example, retain the history of the data signals of the sub-pixels and determine a correction coefficient corresponding to the history by referring to a preset look-up table.

[0101] Next, a method for controlling the dummy sub-pixels will be described. FIG. 11 shows a configuration example of the pixel circuit of the dummy sub-pixels. FIG. 11 shows the pixel circuits of the red, green, and blue dummy sub-pixels in the n-th row. The pixel circuits of all the dummy sub-pixels are common except for the color of the OLED element. The scan line 106 simultaneously transmits the scan signal SCAN_n to the three dummy sub-pixels. The emission control line 107 simultaneously transmits the emission control signal Emit_n to the three dummy sub-pixels.

[0102] Different wirings 723A transmit the data signals VtestR, VtestG, and VtestB to the pixel circuits of the red, green, and blue dummy sub-pixels, respectively. The wiring 721A simultaneously transmits the control signal Vtest for degradation measurement to the pixel circuits of the three dummy sub-pixels. Different wirings 725A transmit the degradation measurement signals Voled_R, Voled_G, and Voled_B of the red, green, and blue dummy sub-pixels to the driver IC 134, respectively.

[0103] Next, the configuration of the pixel circuit of the dummy sub-pixel will be described. The pixel circuit configuration is common for dummy sub-pixels of different colors. FIG. 11 indicates the components of the pixel circuit of the red dummy sub-pixel by reference numerals as an example. Hereinafter, the configuration of the pixel circuit of the red sub-pixel will be described. The pixel circuit shown in FIG. 11 has a configuration in which a switch transistor T5 and a threshold voltage compensation circuit 753 are added to the pixel circuit shown in FIG. 2A. Note that the pixel circuit of the display sub-pixel in the display area 125 can be configured by removing the switch transistor T5 from the pixel circuit of the dummy sub-pixel.

[0104] The threshold voltage compensation circuit 753 compensates for the threshold voltage of the driving transistor T1. The switch transistor T5 is connected to the anode of the OLED element E1 and the wiring 725A. Specifically, one of its source / drain is connected to the node between the anode of the OLED element E1 and the transistor T3, and the other of the source / drain is connected to the wiring 725A. The gate of the switch transistor T5 is connected to the wiring 721A. The ON / OFF of the switch transistor T5 is controlled by the degradation measurement control signal Vtest. The driver IC 134 maintains the switch transistor T5 in the OFF state during normal operation and maintains the switch transistor T5 in the ON state while measuring the degradation of the OLED element E1, as will be described later.

[0105] Next, the light emission control of the dummy sub-pixel in the normal operation and the degradation measurement operation will be described. FIG. 12 shows an example of a signal timing chart for the dummy sub-pixel in the normal operation. The signals of the red, green, and blue dummy sub-pixels that are simultaneously selected and light emission controlled are shown. These may constitute, for example, dummy main pixels corresponding to the main pixels in the low-density region 453.

[0106] VtestR, VtestG, and VtestB respectively indicate data signals applied to the dummy red sub-pixel column, the dummy green sub-pixel column, and the dummy blue sub-pixel column. Here, as shown in FIG. 8, it is assumed that dummy sub-pixels of the same color are connected to one wiring 723A. The dummy pixel data signals VtestR, VtestG, and VtestB have the same values as the sub-pixels of the corresponding low-density region 453 to which the dummy sub-pixels correspond.

[0107] When the scan signal SCAN_n for selecting the n-th row is at the Low level, the dummy sub-pixels of the n-th row are selected, and the dummy pixel data signals VtestR, VtestG, and VtestB are respectively written into the pixel circuits. During the writing of the data signals, the emission control signal Emit_n is High, and the transistor T3 is OFF. Therefore, the OLED element E1 does not emit light.

[0108] After the data signal writing, the emission control signal Emit_n changes to Low, and the OLED element E1 emits light. As described above, since the dummy sub-pixels are covered by the light-shielding film 621 arranged on the viewing side, there is no influence on the image display in the display area 125 due to the light emission of the dummy sub-pixels. In normal operation, the degradation measurement control signal Vtest is always High, and the switch transistors T5 of the pixel circuits of all the dummy sub-pixels are maintained OFF.

[0109] Next, the degradation measurement operation of the OLED elements of the dummy sub-pixels will be described. In one example, the driver IC 134 measures the degradation of the OLED elements of the dummy sub-pixels outside the image display period (non-display period) of the external image data. The driver IC 134 can perform the measurement, for example, in the startup sequence from when the power of the OLED display device 10 is turned on until the image display according to the external image data, or in the standby mode in which the image display is stopped while the power is on. The standby mode starts, for example, when the input image data is interrupted for a predetermined period or more.

[0110] FIG. 13 shows a signal timing chart in the degradation measurement operation of the OLED element E1 of the dummy sub-pixel. The dummy sub-pixel in the n-th row is the object of degradation measurement. During the degradation measurement operation, while performing the degradation measurement of the selected row, the degradation measurement control signal Vtest is Low, and the switch transistors T5 of the pixel circuits of all the dummy sub-pixels are maintained ON. 。

[0111] In the dummy sub-pixel connected to the wiring 725A for transmitting the degradation measurement signal, for all the dummy sub-pixels other than the dummy sub-pixel to be measured, a 0 (zero) data signal is written. Thereby, the light emission of other dummy sub-pixels is stopped, and the SN ratio of the degradation measurement of the dummy sub-pixel to be measured can be improved.

[0112] When the scan signal SCAN_n for selecting the n-th row is at the Low level, the dummy sub-pixels in the n-th row are selected, and the dummy pixel data signals VtestR, VtestG, and VtestB for degradation measurement are written into the pixel circuits respectively. In the example of FIG. 13, the data signal indicates the maximum luminance. Thereby, the degradation of the OLED element E1 can be measured more accurately. Note that the data signal during the degradation measurement may be a different value.

[0113] During the writing of the data signal for degradation measurement, the light emission control signal Emit_n is High, and the transistor T3 is OFF. After the data signal is written, the light emission control signal Emit_n changes to Low, and the OLED element E1 emits light. The light from the OLED element E1 is blocked by the light shielding film 621.

[0114] The driver IC 134 receives the degradation measurement signals Voled_R, Voled_G, and Voled_B of each dummy sub-pixel via the wiring 725A. The degradation measurement signals Voled_R, Voled_G, and Voled_B respectively indicate the anode potential of the corresponding OLED element. The resistance of the OLED element increases with degradation.

[0115] Therefore, by measuring the voltage (the voltage between the anode and the cathode) of the OLED element while applying a constant current to the OLED element, the resistance of the OLED element, that is, the degree of degradation can be measured. The driver IC 134 AD-converts the potential of the wiring 725A and records it as the degradation state of each Dummy display corresponding to the sub-pixel Sub pixel. Note that any method can be used for measuring the degradation of the OLED element. For example, in FIG. 11, the drive TFT T1 is linearly operated, a constant voltage is applied to the OLED element, and the current value flowing through the element is directly measured using a current sense amplifier to determine the degree of degradation.

[0116] Based on the measurement result of the degradation of the dummy sub-pixel, the driver IC 134 corrects the data signal of the corresponding sub-pixel in the low-density region 453. For example, the driver IC 134 determines a correction coefficient for compensating the degradation amount of the OLED element by referring to a look-up table that associates the resistance value (degree of degradation) of the dummy sub-pixel with the correction coefficient. By measuring the degradation of the dummy pixel that emits light with the same data signal pattern as the sub-pixel in the low-density region 453, the degradation of the sub-pixel with a high degradation rate can be accurately estimated, and the display quality of the OLED display device 10 can be appropriately maintained.

[0117] As described above, the embodiments of the present disclosure have been described, but the present disclosure is not limited to the above-described embodiments. Those skilled in the art can easily change, add, and convert each element of the above-described embodiments within the scope of the present disclosure. It is possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment.

Explanation of Reference Numerals

[0118] 10 OLED display device, 51B blue sub-pixel, 51G green sub-pixel, 51R red sub-pixel, 53A - 53C main pixels, 61B dummy blue sub-pixel, 61G dummy green sub-pixel, 61R dummy red sub-pixel, 100 TFT substrate, 105 data line, 106 scanning line, 107 emission control line, 108 anode power line, 109 reset control line, 110 reference voltage supply line, 114 cathode electrode formation region, 125 display region, 131 scanning driver, 132 emission driver, 133 electrostatic discharge protection circuit, 134 driver IC, 136 demultiplexer, 333 touch screen, 451 normal region, 453 low density region, 457A, 457B dummy pixel regions, 465 camera, 621 light shielding film, 651, 661 electrode pieces, 653, 663 connection parts, 705, 711, 703, 721A, 721B, 723A, 723B, 725A, 725B wirings, 753 threshold voltage compensation circuit, C1 holding capacitance, E1 OLED element, T1 - T5 transistors

Claims

1. A display area including a plurality of display pixels for displaying an image of image data input from the outside; A plurality of dummy pixels disposed outside the display area; One or more light-shielding films covering the plurality of dummy pixels on the viewing side; A control circuit for controlling the display area and the plurality of dummy pixels; Comprising; The display area includes: A first area; A second area having a lower display pixel density than the first area; Comprising; Each of all the display pixels in the second area is associated with one dummy pixel of the same color among the plurality of dummy pixels; Each of the plurality of display pixels and the plurality of dummy pixels includes a light-emitting element that emits light according to a drive current; The control circuit: For the same gradation level of the image data, a larger drive current is applied to the display pixels in the second area than to the display pixels in the first area; In the display operation of the image data, each dummy pixel of the plurality of dummy pixels is given the same drive current as the drive current of the image data of the display pixels of the same color in the second area associated therewith; In the degradation measurement operation, each dummy pixel of the plurality of dummy pixels is given a drive current for degradation measurement having a value independent of the value of the drive current of the image data of the display pixels of the same color in the second area associated therewith, and the resistance value between the anode and the cathode of the light-emitting element of each dummy pixel of the plurality of dummy pixels is measured to perform degradation measurement; Based on the result of the measurement, correct the data signal to the display pixels in the second area associated with each of the plurality of dummy pixels; A display device.

2. The display device according to Claim 1, further comprising a touch screen disposed on the viewing side of the display area, The touch screen includes a light-shielding conductor film connecting transparent electrode pieces, The one or more light-shielding films are formed in the same layer as the light-shielding conductor film. A display device.

3. The display device according to Claim 1, including the plurality of light-shielding films, Each light-shielding film of the plurality of light-shielding films covers one or more dummy pixels among the plurality of dummy pixels on the viewing side. A display device.

4. The display device according to Claim 1, wherein each dummy pixel of the plurality of dummy pixels is connected to a scanning line for selecting a display pixel row of the display area. A display device.

5. The display device according to Claim 1, ​ ​ ​ During the measurement of the degradation of one or more dummy pixels to be measured, the control circuit stops the light emission of all other dummy pixels. Display device. **Claim 6** The display device according to claim 1, During the measurement of the degradation of one or more dummy pixels to be measured, the control circuit supplies a data signal indicating the maximum luminance to the pixel circuits of the one or more dummy pixels to be measured. Display device. **Claim 7** The display device according to claim 1, One or more cameras disposed under the second region, A terminal including the same.

Images