Thermal ink jet printhead and printing assembly and printing device including the thermal ink jet printhead - Patents.com
The thermal inkjet printhead addresses issues of parasitic capacitive coupling and electrical shorts by using separate tantalum cavitation islands and a composite dielectric layer, enhancing reliability and manufacturing yield.
Patent Information
- Application Number
- JP2022549884
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-02-24
- Filing Date
- 2021-02-23
- Publication Date
- 2025-06-06
- Estimated Expiration
- 2041-02-23
AI Technical Summary
Prior art thermal inkjet printheads face issues with parasitic capacitive coupling and electrical shorts due to the continuous tantalum conductive film used for protection, which overlaps with circuitry and can create defects in the dielectric layer.
The solution involves a thermal ink jet printhead with separate cavitation islands made of tantalum, each covering a different heater resistor, and a composite dielectric layer of silicon nitride and silicon carbide, reducing the overlap with circuitry and dielectric film defects.
This design significantly reduces parasitic capacitive coupling and the risk of electrical shorts, improving the reliability of the printhead and manufacturing yield by minimizing the surface area of the cavitation layer and increasing the distance from underlying logic circuitry.
Smart Images

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Abstract
Description
FIELD OF THEINVENTION
[0001]
[0001] The present invention relates to the field of thermal ink jet printing technology, and more particularly to thermal ink jet printheads.
[0002]
[0002] Thermal inkjet printing technology has been relatively well developed. Various thermal inkjet printheads have existed. For example, U.S. Patent No. 6,123,419 discloses a thermal inkjet printhead that uses high resistance segmented heater resistors to overcome inefficient power dissipation in parasitic resistance. U.S. Patent No. 6,582,062 discloses a large array inkjet printhead that uses multiplexing devices to reduce parasitic resistance and the number of input leads.
[0003] In a thermal inkjet printhead, the ejection of an ink drop through a nozzle is achieved by quickly heating a volume of ink present in an ink ejection chamber, the heating of the ink being achieved by a short current pulse applied to a heater resistor located in the ink ejection chamber. The heating of the ink causes an ink vapor bubble to rapidly form and expand, thus forcing the liquid ink through the nozzle. When the pulse ends and an ink drop is ejected, the ink ejection chamber is refilled with ink by an ink channel. The heater resistor is made of a resistive film, and a thermal inkjet printhead comprises a plurality of such heater resistors as a resistor array. The heater resistors are electrically connected to associated logic and power circuitry by conductive traces and / or pads so that each of the heater resistors is appropriately controlled. Metal lines are used to implement the logic and power circuitry.
[0004] In prior art thermal inkjet printhead devices, all heater resistors are usually covered by a continuous protective layer, which prevents the sudden collapse of ink vapor bubbles during printhead operation from damaging the underlying resistive film. For this reason, certain refractory metals such as tantalum, which exhibit both high mechanical strength and good thermal conductivity, are used for the protective layer. Such tantalum films are generally deposited continuously over the entire resistor area spanning the entire resistor array. Due to the electrical conductivity of tantalum, a large area of the device is covered by a continuous tantalum conductive film. Meanwhile, this tantalum conductive film may capacitively couple with nearby metal lines underneath it, since the voltage levels of the metal lines across the device actually change over time, and therefore the tantalum conductive film may cause certain problems for the logic circuitry. On the other hand, possible pinholes or discontinuities in the dielectric layer between the tantalum layer and the underlying metal line can create parasitic electrical shorting paths whose effects can cause both electrical defects and electrochemical effects with the ink.US6441838 discloses an inkjet printhead with a tantalum passivation layer deposited over the heater resistors and extending beyond the ink chamber and over the associated ink channel to provide mechanical passivation to the ink ejection resistors by absorbing the cavitation pressure of a collapsing actuation bubble. Summary of the Invention
[0005]
[0005] It is an object of the present invention to provide a solution which is able to alleviate or overcome at least some of the above-mentioned problems in the prior art. The above-mentioned problems are solved by the subject matter of the independent claims. Further preferred embodiments are defined in the dependent claims.
[0006] According to one aspect of the present invention, there is provided a thermal ink jet printhead comprising: A substrate; a nozzle layer including a plurality of nozzles formed through the nozzle layer; a plurality of ink ejection chambers corresponding to a plurality of nozzles; a plurality of heater resistors formed in the substrate and corresponding to the plurality of ink ejection chambers, each of the heater resistors being located in a different one of the ink ejection chambers such that ink drop ejection through each of the nozzles is caused by heating of one of the heater resistors located in the corresponding ink ejection chamber; a plurality of separate cavitation islands formed on the plurality of heater resistors and corresponding to the plurality of heater resistors, each of the cavitation islands covering a different heater resistor of the heater resistor; a dielectric layer interposed between the heater resistor and the cavitation island, the dielectric layer being a composite film made of silicon nitride and silicon carbide and having a thickness in the range of about 0.4 μm to about 0.65 μm; Equipped with.
[0007] According to another aspect of the present invention, there is provided a printing assembly including a thermal ink jet printhead as described above.
[0008] According to yet another aspect of the present invention, there is provided a printing device, for example a printer, including a thermal inkjet printhead as described above.
[0009]
[0009] The solution of the present invention allows to reduce the overlap of each cavitation island with the circuitry nearby the cavitation island, and therefore the possibility of generating parasitic capacitive coupling between the cavitation layer and the circuitry nearby the cavitation layer is dramatically reduced compared to the possibility with the prior art. Furthermore, the relatively small surface area of a single cavitation island reduces the possibility of the cavitation island overlapping with possible defects in the thin dielectric film below the cavitation island, i.e. reduces the probability that a defect in the dielectric film will be present directly below a cavitation island and thus cause an electrical short circuit. Therefore, it is clearly advantageous to provide an "electrically" isolated cavitation island by a specific composition and thickness of the dielectric layer (much thinner than the dielectric layers of the prior art). As a result, the present invention provides an optimized heat transfer with a reduced risk of having pinholes with undesirable conductive bridges between different layers. The use of the present invention therefore helps to substantially improve the reliability of the printhead and can improve the yield of the manufacturing process.
[0010]
[0010] Non-limiting and non-exhaustive embodiments of the present invention are described by way of example with reference to the following figures: [Brief description of the drawings]
[0011] [Figure 1] FIG. 2 is a schematic diagram illustrating an exemplary layout of a thermal inkjet printhead in accordance with one embodiment of the present invention. [Diagram 2] FIG. 2 is a schematic diagram illustrating an exemplary wafer before being diced. [Diagram 3] FIG. 1 is a schematic diagram illustrating a perspective view of an exemplary printing assembly incorporating the thermal inkjet printhead of the present invention. [Figure 4] FIG. 1 illustrates a schematic diagram of a portion of an exemplary microfluidic circuit in perspective view. [Diagram 5]FIG. 5 is a schematic cross-sectional view of a portion of the microfluidic circuit of FIG. 4. [Figure 6] FIG. 6 is a cross-sectional view showing a portion of FIG. 5 in more detail. [Figure 7] FIG. 2 is a schematic diagram of a portion of the thermal inkjet printhead of FIG. 1; [Figure 8] 1 is a schematic diagram of a portion of a prior art thermal inkjet printhead; [Figure 9a] FIG. 9 illustrates a possible scenario for a thermal inkjet printhead, the portion of which is shown in FIG. 8. [Figure 9b] FIG. 9b shows an equivalent circuit corresponding to the situation in FIG. 9a. [Figure 9c] FIG. 2 shows a modified version of the equivalent circuit. [Figure 10a] FIG. 9 illustrates another possible scenario for the thermal inkjet printhead of which the portion is shown in FIG. 8. [Figure 10b] FIG. 10b shows one possible equivalent circuit corresponding to the situation in FIG. 10a. [Figure 10c] FIG. 10b shows another possible equivalent circuit corresponding to the situation in FIG. 10a. Detailed Description of the Embodiments
[0012]
[0021] To make the above and other features and advantages of the present invention more apparent, the present invention will be further described below in conjunction with the accompanying drawings. It will be understood that the specific embodiments shown herein are for the purpose of illustrating the invention to those skilled in the art and are merely exemplary and not limiting.
[0013]
[0022] FIG. 1 shows a schematic diagram of an exemplary layout of a thermal inkjet printhead according to an embodiment of the present invention. The thermal inkjet printhead of FIG. 1 comprises a substrate 1 provided on its surface with a plurality of heater resistors 2 arranged in one or more rows 3. The thermal inkjet printhead may be in the form of a chip. As shown in FIG. 2, a plurality of such chips, each carried by the substrate 1, may be fabricated in a single silicon wafer 5, which is then diced into individual chips using suitable semiconductor techniques including thin film deposition, photolithography, wet and dry etching techniques, ion implantation, oxidation, etc. The rows of heater resistors 2 may be located in close proximity to through slots 4 made in the interior portion of the printhead chip to allow ink refilling. Each of the heater resistors 2 may be made of a resistive film and may be in contact with a corresponding conductive trace(s). In the peripheral area of the printhead, there may be a set of contact pads 6, which are typically bonded to a flexible printed circuit using a TAB (Tape Automated Bonding) process. Each of the heater resistors can be electrically connected to the flexible printed circuit via corresponding conductive trace(s) and corresponding contact pad(s) 6. In the active portion 10 of the substrate 1, there can be an array of MOS transistors 11 for addressing the resistors, one or more logic circuit portions 12, one or more programmable memories 13, and other possible components, especially when the electronic layout related to the heater resistors becomes relatively complex as the number of heater resistors increases. In addition to the resistive film forming the heater resistors, the thermal inkjet printhead of the present application can comprise other layers / films, which will be described later.
[0014]
[0023] 3 which illustrates a printing assembly incorporating the present invention, a flexible printed circuit 7 is attached to a printhead cartridge body 8 to which a thermal inkjet printhead of the present invention can be mounted and connected. The flexible printed circuit 7 includes larger contact pads 9 for exchanging electrical signals with a printer with which the thermal inkjet printhead is used. The thermal inkjet printhead, such as the thermal inkjet printhead shown in FIG. 1, can be mounted and connected to the printhead cartridge body 8 in any suitable manner.
[0015]
[0024] 4 and 5, a microfluidic circuit can be deposited and realized on the substrate surface of the thermal inkjet printhead of the present invention, where a stack of resistive, conductive and dielectric films has been deposited and patterned, as shown diagrammatically in region 14, so that ink can flow through suitable channels 15 into the deposited microfluidic circuit and reach ink ejection chambers 16 whose walls surround corresponding heater resistors 2. The channels 15 are in fluid communication with through slots 4, which can lead to an ink reservoir (not shown). The microfluidic circuit is patterned in a suitable polymer layer 17, often called a barrier layer. A nozzle layer 18, for example in the form of a plate, is provided on top of the barrier layer. A number of nozzles 19, each aligned with a heater resistor on the underlying side, can be formed through the nozzle plate 18, from which ink droplets 20 are ejected. During operation of a thermal inkjet printhead, when a heater resistor 2 is required to be activated, a short current pulse is applied to heat the resistor, which in turn causes vaporization of a thin layer of ink directly above the resistor, thus forming a vapor bubble 21. The pressure within the vaporized layer rises suddenly, causing the ejection of a portion of the overlying liquid ink from the corresponding nozzle above the activated resistor. The ink droplet travels towards a medium (e.g., a sheet of paper), creating an ink dot on the surface of the medium. Fresh ink is then drawn into the ink ejection chamber 16 to replace the ejected droplet until a steady state is reached.
[0016]
[0025] To optimize the energy transfer from the heater resistor 2 (heated by a current pulse via the Joule effect) to the ink, it is necessary that the resistor is preferably insulated from the substrate so that heat flow occurs towards the overlying ink, which is further separated from the resistive film layer by a thin dielectric film to avoid electrical leakage. The substrate can be made of silicon, which has a significant thermal conductivity, in which case it is necessary to interpose an insulating layer of sufficient thickness between the substrate and the resistor: in other words, the resistor should be deposited over a suitable insulating layer that is grown or deposited on the substrate. Both thermally grown silicon oxide and BPSG (Boron Phosphorus Silicon Glass), produced in high temperature processes, are suitable materials for insulating the resistor and can be used alone or in combination. The temperatures for the growth or deposition and / or annealing of these materials are higher than the operating temperatures of the heater resistors of the printhead, so that these materials will remain stable during normal operation of the printhead.
[0017]
[0026] The resistive film, which undergoes rapid and large temperature changes during the operation of the printhead, should have stable characteristics and good resistance to thermomechanical stress. Typically, the resistance value of the heater resistor 2 is several tens of ohms; although different shapes and different resistance values can be used, square heater resistors with a resistance of about 30 ohms are often adopted. A widespread and long-lasting choice for the heater resistor is a composite film made of a tantalum aluminum alloy: a film thickness of about 900 angstroms gives a sheet resistance of 30 ohms per square, i.e. a square resistor made of such a film has a resistance of 30 ohms. According to a preferred embodiment of the present invention, the heater resistor is a U-shaped heater resistor, which means that there is a gap between adjacent conductors biased to different voltages.
[0018]
[0027] Various known solutions for addressing and driving multiple heater resistors are available. When the number of nozzles in the printhead is relatively small, up to a few tens, each heater resistor can be directly connected to a corresponding contact pad through an electric line, while the current return can generally be collected by one or a few ground pads. As the number of nozzles increases, direct individual driving, which requires a large number of contact pads to address the resistors, becomes difficult to realize: in practice, the pads are usually distributed along the outer boundary of the printhead chip, and the number of pads cannot be increased indefinitely. A more practical solution is to employ an addressing matrix, which allows the driving of a large number of resistors using a reduced number of contact pads. The addressing matrix is preferably realized using a plurality of MOS transistors, each of which is in electrical communication with a determined heater resistor. The individual heater resistors can be connected in an appropriate manner to electrodes of the transistor matrix so that they can be activated on demand, causing the ejection of ink drops from the printhead.
[0019]
[0028] As indicated above, the dielectric layer above the heater resistor provides electrical insulation for the ink: typically, silicon nitride films, alone or in combination with silicon carbide, are used to form the dielectric layer for this purpose. The insulating film for the dielectric layer should be thin enough to allow strong heat flow while withstanding the thermomechanical stresses experienced during the operation of the printhead as well as the shocks caused by the collapse of the bubbles. According to the invention, the dielectric layer is a composite film made of silicon nitride and silicon carbide, the thickness of which is at least 4000 angstroms (0.4 μm) and at most 6500 angstroms (0.65 μm). In fact, the rapid expansion of the vapor bubble due to the heating of the heater resistor has the effect of significantly reducing the internal pressure of the bubble to a level well below the external atmospheric pressure. At the maximum of the expansion of the bubble, the bubble becomes a cavity with a low-pressure interior, bounded in its lower part by the floor of the ink ejection chamber and surrounded by ink. The greater external atmospheric pressure pushes back the liquid ink present above the cavity, causing a violent shock against the floor of the chamber. This impact, resulting from the collapse of preformed cavities in the ink, can damage the floor of the chamber, i.e. the membrane that constitutes the resistive membrane and the overlying insulating membrane. Often the thin insulating membrane is not strong enough and a further protective membrane called cavitation layer, made of a high melting point metal, for example tantalum, is deposited on top of the insulating membrane. The tantalum membrane is thermally conductive and a strong heat flux from the resistive membrane towards the ink is maintained even in the presence of the further layer. According to the invention, a novel arrangement for the cavitation layer is proposed. The idea is to reduce the membrane surface area of the cavitation layer without affecting its function. In particular, the cavitation layer can consist of a number of separate cavitation islands, each patterned on a corresponding heater resistor of the heater resistor. Such a cavitation layer will be further explained later with reference to FIG. 7.
[0020]
[0029] The schematic representation of region 14 of Fig. 5 comprising the resistive, dielectric and cavitation layers can be seen in more detail in the cross-sectional view of Fig. 6. Beneath the barrier layer 17 there is a cavitation layer 22, which is deposited on a dielectric film 23 as a protection. In the heater resistor area shown, the dielectric film 23 is placed directly on top of the resistive film 24, while just outside the heater resistor where a conductive metal line 25 is realized, the dielectric film 23 is deposited on the conductor. In a preferred embodiment the cavitation layer is made of tantalum, but other choices can be made and such choices may be known in the art.
[0021]
[0030] Figure 7 shows a schematic of a portion of the thermal inkjet printhead of Figure 1. As shown in Figure 7, a series of heater resistors 2 are surrounded by a barrier layer 17 such that each of the heater resistors 2 is contained within an ink ejection chamber defined by two vertical walls of the barrier layer 17. Ink flows from the edges 26 of the through slots 4 through the channels 15 towards the ink inlet chamber. In this embodiment, the slot edges are straight, but an edge shape that follows a staggered arrangement of the heater resistors can be adopted to equalize the refill time for all of the heater resistors.
[0022]
[0031] In Fig. 7, a number of cavitation islands 33 are shown which together constitute a cavitation layer. Such a cavitation layer can be called a split cavitation layer or a segmented cavitation layer, and each of the cavitation islands can also be called a cavitation segment. These cavitation islands 33 are separated from each other. Each cavitation island 33 corresponds to and covers a single different heater resistor 2, and its area can be slightly larger than the area of the resistor covered by the cavitation island 33. Each cavitation island 33 can be made of a piece of tantalum, but other suitable materials can be used, in particular high melting point conductive materials.
[0023]
[0032] In one preferred embodiment, the cavitation island 33 is floating, ie, it cannot be connected to any voltage source.
[0024]
[0033] Each cavitation island 33 has only a small overlap area with its neighboring circuitry 29, and therefore the possibility of generating parasitic capacitive coupling due to the presence of the cavitation layer is dramatically reduced compared to the possibility with the prior art. Furthermore, because the total area covered by the segmented cavitation layer is relatively small, the probability of having possible undesirable pinholes and discontinuities in the dielectric layer between the cavitation layer and the underlying metal lines directly below the cavitation islands can also be dramatically reduced. Moreover, using the novel layout increases the distance between the cavitation layer and the underlying logic circuitry, helping to reduce possible parasitic capacitance and capacitive coupling. Using the segmented cavitation layer shown in FIG. 7 helps to increase and substantially improve the reliability of the printhead and can improve the yield of the manufacturing process.
[0025]
[0034] Although the presence of the segmented cavitation layer may make the surface onto which the barrier layer 17 is deposited slightly rough, deposition and subsequent patterning of the barrier layer can be performed anyway, providing a flat surface and good adhesion close to the resistor array.
[0026]
[0035] The advantages of the thermal ink jet printhead of the present invention employing the above-described segmented cavitation layer, including the cavitation layer described above, over the prior art will become more apparent from the following description.
[0027]
[0036] Figure 8 shows a schematic of a portion of a prior art thermal inkjet printhead device. As shown in Figure 8, a series of heater resistors 102 are surrounded by a barrier layer 117 whose vertical walls bound ink ejection chambers corresponding to the heater resistors. Ink flows from edges 126 of through slots 104 through channels 115 towards the chambers.
[0028]
[0037] The leading edge 127 of the continuous cavitation layer 122, shown diagrammatically by the dotted area, is at a certain distance from the slot edge 126 to prevent the slot formation process from damaging the layer. The same care is taken for the dielectric layer (not shown) below the cavitation layer. The edges of the mentioned layers do not necessarily have to coincide: the edge of the dielectric layer can be closer to the slot edge 126 than the edge of the cavitation layer, or vice versa, without affecting the reliability of the device. The trailing edge 128 of the cavitation layer 122 is well behind the resistor 102. There are several reasons for such an implementation: a cavitation layer of tantalum generally provides good adhesion to the overlying barrier layer, which is highly desirable in areas where the hermeticity around the chamber and between adjacent chambers is crucial to ensure the correct performance of the device. This adhesion is even further improved by the continuity of the surface of the tantalum layer close to the ejection area of the device, since a smooth topography without sharp edges provides easier deposition and patterning of the polymer barrier layer.
[0029]
[0038] Nevertheless, there are drawbacks resulting from the large area covered by the tantalum cavitation layer 122, as will be shown below.
[0030]
[0039] The printhead device is controlled and powered through suitable electrical circuitry 129, shown diagrammatically by the dotted region, in close proximity to the ejection area, and thus the electrical circuitry 129 is partially overlapped by the tantalum cavitation layer, but the circuitry and cavitation layer are separated by an intervening dielectric layer made of silicon nitride and silicon carbide.
[0031]
[0040] The tantalum cavitation layer and the metal lines of the underlying electrical circuitry, separated by a thin dielectric layer, work together as capacitors, but they are not designed for that purpose. Even if these parasitic capacitors do not belong to the electrical circuitry of the device, they can still have unexpected and undesirable effects on the device behavior, mainly when sophisticated logic circuits are present. The presence of parasitic capacitors throughout the device is due to the close proximity of conductive parts, either because they are side-by-side and separated by small gaps, or because they are stacked with insulating layers between them. It is difficult to avoid the presence of parasitics in monolithic electronic devices, because the cost requirements for the fabrication process strongly encourage designers to increase the surface density of electrical components, which also entails a higher risk of susceptibility to parasitics.
[0032]
[0041] Due to the large surface of the tantalum cavitation layer, there are many conductive lines belonging to the lower level that can be overlapped by the tantalum plate itself, and therefore there are also many parasitic capacitors with the upper tantalum plate as the top electrode. This may cause some capacitive coupling between different conductors at the lower level during voltage commutation, since the lower conductive lines may be at voltage levels that dynamically change with time according to the operation mode of the device.
[0033]
[0042] As an example, in FIG. 9a, a certain situation is shown in cross-section: there are two conductive lines 130 and 131 that are not necessarily close to each other. Both lines are covered by a dielectric layer 123, and the dielectric layer 123 is further overlapped by a wide continuous cavitation layer 122. At a certain point in time, the conductive lines 130 and 131, also called conductors, can be set to voltages V1 and V2 respectively, as shown in FIG. 9b, which shows a simplified equivalent circuit corresponding to this situation. In FIG. 9b, the resistance value RT of the conductive path through the tantalum layer 122 and the resistance values R1 and R2 of the conductive lines 130 and 131 are considered.
[0034]
[0043] According to the model of FIG. 9b, when the value of voltage V1 undergoes a sudden change ΔV, as in the case of a stepped waveform, it causes a sudden disturbance on the lower plate of capacitor C2 corresponding to conductor 131. It is easy for those skilled in the art to understand that the magnitude and trend of the disturbance on conductor 131 compared to ΔV actually depend on the resistance values R1, R2, and RT and the capacitance values of capacitors C1 and C2. Generally, immediately after the voltage V1 changes, the sudden change ΔV is distributed across the resistors with resistance values R1 and R2 shown in FIG. 9b, because the capacitors act as short circuits for sudden voltage fluctuations. Therefore, when R1 and RT << R2, the sudden change ΔV will initially be transmitted almost completely to conductor 131. Then, due to the gradual charge accumulation on the capacitor plates, the system tends to reach a new steady state after a certain period of time, at which point the magnitude of the disturbance drops to almost zero: the larger the capacitance values of the parasitic capacitors C1 and C2, the longer the duration of the disturbance.
[0035]
[0044] A similar situation can be found, for example, when the conductor 131 is connected to the gate of a MOS transistor. In most cases, the transistor gates in a circuit are not left floating and can be connected to ground through a pull-down or pull-up resistor, and the resistance value of the pull-down or pull-up resistor is significantly larger than that of the conductive layer; thus, the conditions R1 and RT << R2 are satisfied. A sudden change in the voltage V1 can cause an undesirable switching of the transistor state if the disturbance on the gate electrode lasts long enough. This can mainly cause device malfunction when the disturbed gate is part of a logic circuit and an undesirable operation can be triggered by this electrical disturbance. Furthermore, in a print head, the power line supplying power to the nozzle heater resistor is often biased to a voltage higher than 10 volts, while typically the power supply of the logic circuit section is in the range of 3 to 5 volts. Therefore, a sudden voltage change in the power line parasitically coupled to the logic transistor can have a profound impact on the logic transistor, even if the disturbance on the gate is attenuated with respect to ΔV.
[0036]
[0045] Increasing the thickness of the dielectric layer 123 to reduce the capacitance values of the parasitic capacitors C1 and C2, and further reducing the disturbance duration, are not recommended because a dielectric layer with a weak effect of heat transfer from the heater resistor to the ink is used. On the other hand, using two different thickness dielectric layers for the heater resistor region and for the circuit section behind means a more complex manufacturing process and thus higher costs.
[0037]
[0046] A possible solution to solve this problem can be obtained by connecting the tantalum cavitation layer to ground to decouple the parasitic capacitors from each other, as shown in Figure 9c, where the resistances RT' and RT'' of the conductive paths from the tantalum cavitation layer to ground are reflected. This implementation will be very effective in reducing crosstalk caused by capacitive coupling with the cavitation layer; nevertheless, this implementation tends to increase the probability of suffering from other drawbacks.
[0038]
[0047] In reality, during the fabrication of a device, many processes such as deposition, patterning, and etching follow one another, and often it is impossible to avoid the presence of certain defects in the layers of the device. For example, if residual particles remain on the surface after an etching process, they can impair the integrity of the subsequent layer deposited directly above. If this layer is a dielectric film, pinholes or zones lacking material can occur throughout the film surface, impairing the uniformity of the insulation. If a conductive layer is deposited on a defective dielectric layer, some of the conductive material can penetrate the holes on the film and, in the worst case, make some contact with the conductive line(s) present under the insulating dielectric layer itself. This can happen when the upper conductive layer covers a large surface area for a continuous cavitation layer according to the prior art: the large overlap area increases the probability that tantalum blocks some through holes in the dielectric film directly above the conductive lines, as shown in Figure 10a.
[0039]
[0048] Figure 10a shows a cross-section of the layer stack, where a defect in the intermediate dielectric layer 123, in particular a through hole, is filled by the material of the top cavitation layer, creating a conductive bridge 132 towards the underlying conductive trace 130. This defect will act as a short circuit between two conductive layers that should be electrically isolated in a defect-free device, or at least as a resistive path. Depending on whether the cavitation layer is left floating or connected to ground, the equivalent circuit corresponding to this situation can be shown in Figure 10b or Figure 10c. The conductive bridge 132 between the metal cavitation layer and the underlying metal trace 130 is shown by a resistor RB.
[0040]
[0049] In the case shown in Figure 10b, the entire buoyant cavitation layer is brought to the same potential V1 as that applied to the conductor 130. The parasitic capacitive coupling between the cavitation layer and the underlying circuitry becomes even stronger because the voltage V1, even though it is a variable amount, directly affects the tantalum cavitation layer. Furthermore, since the ink very often exhibits a certain amount of electrical conductivity, other electrical problems may be diffused across the device circuitry by defects in the dielectric film; furthermore, ink-related electrochemical effects may also occur, possibly closing off current paths through the bulk of the silicon die.
[0041]
[0050] On the other hand, in the case shown in FIG. 10c, where the resistances RT′ and RT″ of the conductive paths from the tantalum cavitation layer to ground are shown, the voltage of the cavitation layer is fixed to ground, which suppresses or greatly reduces the possible effects of capacitive coupling related to the tantalum film. However, if the voltage V1 differs from zero (assumed to be the value of ground potential), a short circuit or a low resistivity current path will be established, with detrimental effects on the device integrity: in most cases these problems can be detected during electrical testing of the device carried out during fabrication, which further leads to the rejection of the device and therefore reduces the yield of the manufacturing process.
[0042]
[0051] In summary, the presence of a large continuous cavitation layer in a prior art thermal ink jet printhead, whatever its electrical state, has several serious implications. Meanwhile, there is a need to prevent the membrane in the ejection area from being damaged by the collapsing vapor bubbles during operation of the printhead.
[0043]
[0052] In contrast, the solution of the present invention, which employs the novel layout of the cavitation layer described above, keeps the presence of the cavitation layer only in a smaller area surrounding only the heater resistors of the resistor array, and the film surface area of the cavitation layer is dramatically reduced. Due to the reduced film surface area, the cavitation layer is less likely to overlap with possible defects in the dielectric film below, i.e., the probability that a defect in the dielectric film will be present just below the cavitation layer and cause an electrical short is reduced. Meanwhile, using the novel layout helps to increase the distance between the cavitation layer and the underlying logic circuitry. The smaller cavitation layer area and the longer distance between the cavitation layer and the critical logic circuitry help to reduce the parasitic capacitance. Therefore, the thermal inkjet printhead of the present invention is more robust and less susceptible to undesirable electrical interference.
[0044]
[0053] The various technical features described above may be combined in any combination. Although all possible combinations of these technical features have not been described, any combination of these technical features should be considered to be covered by this specification, and no conflicts exist regarding such combinations.
[0045]
[0054] While the present invention has been described with reference to examples, those skilled in the art will understand that the above description and illustrations are illustrative rather than restrictive, and that the invention is not limited to the disclosed examples. Various changes and modifications are possible without departing from the spirit of the invention.
Claims
1. A substrate (1), a nozzle layer (18) including a plurality of nozzles (19) formed through said nozzle layer (18); a plurality of ink ejection chambers (16) corresponding to said plurality of nozzles (19); a plurality of heater resistors (2) formed in the substrate (1) and corresponding to the plurality of ink ejection chambers (16), each of the heater resistors (2) being located in a different one of the ink ejection chambers (16) such that ink drop ejection through each of the nozzles (19) is caused by heating of one of the heater resistors (2) located in the corresponding ink ejection chamber (16); a plurality of separate cavitation islands (33) formed in the plurality of heater resistors (2) and corresponding to the plurality of heater resistors (2), each of the cavitation islands (33) covering a different heater resistor of the heater resistors (2); a dielectric layer (23) interposed between the heater resistor (2) and the cavitation island (33), the dielectric layer (23) being an integral composite film made of a mixture of silicon nitride and silicon carbide and having a thickness in the range of about 0.4 μm to about 0.65 μm; Equipped with A thermal inkjet printhead, wherein said heater resistor (2) is a U-shaped heater resistor.
2. 2. The thermal ink jet printhead of claim 1, wherein each of said cavitation islands (33) is made of a refractory metal film.
3. 3. The thermal ink jet printhead of claim 2, wherein said refractory metal film is a tantalum film.
4. 2. The thermal ink jet printhead of claim 1, wherein each of said cavitation islands (33) is large enough to completely cover a corresponding heater resistor of said heater resistor array (2) while having a minimized surface area.
5. a barrier layer (17) covering the plurality of cavitation islands (33) and formed below the nozzle layer (18); The thermal ink jet printhead of claim 1 , wherein the ink ejection chamber (16) is defined by the barrier layer (17).
6. 6. The thermal ink jet printhead of claim 5, wherein the barrier layer (17) is patterned to form a plurality of ink channels (15) corresponding to the plurality of ink ejection chambers (16), each of the ink channels (15) leading to a different one of the ink ejection chambers (16).
7. The thermal inkjet printhead of claim 1, further comprising an insulating layer interposed between said substrate (1) and said heater resistor (2).
8. The thermal ink jet printhead of claim 1 , wherein each of said cavitation islands (33) is buoyant.
9. A printing assembly comprising a thermal ink jet printhead according to any one of the preceding claims.
10. A printing device comprising the thermal inkjet printhead according to any one of claims 1 to 8.
Citation Information
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