Display device

Abstract

To provide a display device whose image quality can be enhanced.SOLUTION: A display device includes an addition circuit provided in and out of a display region. The addition circuit has a function of adding a plurality of pieces of data supplied from a source driver. A part of elements in the addition circuit is divided and disposed in the display region. Therefore, the restriction on a size of the element of the addition circuit can be relieved and the data addition can be performed efficiently. By providing another element of the addition circuit outside the display region, the number of wires in the display region can be reduced and an opening ratio of pixels can be increased.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification etc. relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a memory device, an imaging device, an operation method thereof, or a manufacturing method thereof.

[0003] Note that in this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are one embodiment of a semiconductor device. Further, a memory device, a display device, an imaging device, and an electronic device may include a semiconductor device. [Background technology]

[0004] Techniques for constructing transistors using metal oxides formed on a substrate have been attracting attention. For example, Patent Documents 1 and 2 disclose techniques for using transistors using zinc oxide or In-Ga-Zn oxide as switching elements for pixels of display devices.

[0005] Furthermore, Patent Document 3 discloses a memory device having a structure in which a transistor with extremely low off-state current is used as a memory cell.

[0006] Furthermore, various improvements and applications of liquid crystal display devices have been attempted. For example, Patent Document 4 discloses a transparent display that performs display by a field sequential operation. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A [Patent Document 3] JP 2011-119674 A [Patent Document 4] JP 2018-21974 A Summary of the Invention [Problem to be solved by the invention]

[0008] Display devices are becoming increasingly high-resolution, with hardware being developed that can display images at 8K4K (7680 x 4320 pixels) or higher resolutions. In addition, the introduction of HDR (High Dynamic Range) display technology, which improves image quality by adjusting brightness, is also progressing.

[0009] To display clear gradations, it is desirable to have a wide range of data potentials that can be supplied to the display elements. However, for example, the output voltage of a source driver for a liquid crystal display device is about 15V, and to supply a voltage higher than this to the display elements, a high-output source driver must be used. High-output source drivers consume a lot of power, and in some cases a new driver IC must be developed.

[0010] In addition, to display moving images more smoothly, it is necessary to increase the frame frequency, but as the number of pixels increases, the horizontal period becomes shorter, making it difficult to increase the frame frequency. By realizing a configuration that makes it easy to increase the frame frequency, it will also be easier to apply to display devices that use the field sequential liquid crystal method.

[0011] While it is desirable to solve the above problems, it is preferable to configure the pixel circuit with fewer elements, since an increase in the number of components of the pixel circuit reduces the aperture ratio.

[0012] Therefore, an object of one embodiment of the present invention is to provide a display device capable of improving image quality. Another object is to provide a display device capable of supplying a voltage equal to or higher than an output voltage of a source driver to a display element. Another object is to provide a display device capable of increasing the luminance of a display image. Another object is to provide a display device capable of increasing a frame frequency. Another object is to provide a display device capable of increasing an aperture ratio of a pixel.

[0013] Another object is to provide a display device with low power consumption. Another object is to provide a display device with high reliability. Another object is to provide a novel display device or the like. Another object is to provide a driving method for the display device. Another object is to provide a novel semiconductor device or the like.

[0014] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract problems other than these from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0015] One aspect of the present invention relates to a display device capable of improving image quality.

[0016] One embodiment of the present invention is a display device having a pixel and a first circuit, the pixel and the first circuit being electrically connected to each other, the first circuit having a transistor and a first capacitor, the transistor being provided outside a display region and the first capacitor being provided within the display region, the first circuit having a function of generating third data by adding first data and second data, and the pixel having a function of retaining the third data and a function of performing display in accordance with the third data.

[0017] The first capacitance element has a plurality of second capacitance elements, and the plurality of second capacitance elements are configured to be connected in parallel.

[0018] The first circuit has a first transistor, a second transistor, a third transistor, and a first capacitor, and one of a source or a drain of the first transistor is electrically connected to a pixel, one of a source or a drain of the first transistor is electrically connected to one electrode of the first capacitor, the other electrode of the first capacitor is electrically connected to one of a source or a drain of the second transistor, one of a source or a drain of the second transistor is electrically connected to one of a source or a drain of the third transistor, and the other of the source or a drain of the first transistor can be electrically connected to the other of the source or a drain of the second transistor.

[0019] The pixel has a fourth transistor and a second circuit, one of a source or a drain of the fourth transistor is electrically connected to a first circuit, and the other of the source or the drain of the fourth transistor is electrically connected to a second circuit, and the second circuit can have a display element.

[0020] The second circuit has a fifth transistor, a third capacitor, and a light-emitting element as a display element, and the gate of the fifth transistor is electrically connected to the other of the source or drain of the fourth transistor, one of the source or drain of the fifth transistor is electrically connected to one electrode of the light-emitting element, one electrode of the light-emitting element is electrically connected to one electrode of the third capacitor, and the other electrode of the third capacitor is electrically connected to the gate of the fifth transistor.

[0021] The second circuit may further have a sixth transistor, one of a source or a drain of the sixth transistor being electrically connected to one electrode of the light-emitting element, and the other of the source or the drain of the sixth transistor being electrically connected to one of the source or the drain of the fifth transistor.

[0022] Alternatively, the second circuit may have a liquid crystal element as a display element, and one electrode of the liquid crystal element may be electrically connected to one of the source and drain of the fourth transistor. The second circuit may further have a fourth capacitor, and one electrode of the fourth capacitor may be electrically connected to one electrode of the liquid crystal element.

[0023] The transistor included in the first circuit and the pixel preferably has a metal oxide in a channel formation region, and the metal oxide preferably contains In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf).

[0024] The channel width of the transistor in the first circuit is preferably larger than the channel width of the transistor in the pixel. Effect of the Invention

[0025] By using one embodiment of the present invention, a display device capable of improving image quality can be provided. Alternatively, a display device capable of supplying a voltage equal to or higher than an output voltage of a source driver to a display element can be provided. Alternatively, a display device capable of increasing the luminance of a display image can be provided. Alternatively, a display device capable of increasing a frame frequency can be provided. Alternatively, a display device capable of increasing an aperture ratio of a pixel can be provided.

[0026] Alternatively, a display device with low power consumption can be provided. Alternatively, a display device with high reliability can be provided. Alternatively, a novel display device or the like can be provided. Alternatively, a method for operating the display device can be provided. Alternatively, a novel semiconductor device or the like can be provided. [Brief description of the drawings]

[0027] [Figure 1] 1A and 1B are diagrams illustrating a display device. [Diagram 2] FIG. 2 is a diagram for explaining an adder circuit and a pixel. [Diagram 3] 1A and 1B are diagrams illustrating a display device. [Figure 4] 4 is a timing chart illustrating the operation of an adder circuit and a pixel. [Diagram 5] FIG. 2 is a diagram for explaining an adder circuit and a pixel. [Figure 6] 1A to 1D are diagrams illustrating circuit blocks. [Figure 7] 1A to 1D are diagrams illustrating circuit blocks. [Figure 8] 1A to 1C are diagrams illustrating circuit blocks. [Figure 9] 1A and 1B are diagrams illustrating an adder circuit and a pixel. [Figure 10] FIG. 4 is a diagram for explaining the configuration of an adder circuit and a pixel used in a simulation. [Figure 11] 4 is a timing chart used in the simulation. [Figure 12] (A) to (D) Illustrative diagrams illustrating the simulation results. [Figure 13] FIG. 2 is a diagram for explaining a pixel layout. [Figure 14] 1A to 1C are diagrams illustrating a display device. [Figure 15] (A) and (B) are diagrams explaining a touch panel. [Figure 16] 1A and 1B are diagrams illustrating a display device. [Figure 17] 1A and 1B are diagrams illustrating a display device. [Figure 18] 1A and 1B are diagrams illustrating a display device. [Figure 19] 1A and 1B are diagrams illustrating a display device. [Figure 20] 1A to 1E are diagrams illustrating a display device. [Figure 21]1A to 1C are diagrams illustrating transistors. [Figure 22] 1A to 1C are diagrams illustrating transistors. [Figure 23] 1A to 1C are diagrams illustrating transistors. [Figure 24] 1A to 1C are diagrams illustrating transistors. [Diagram 25] 1A to 1F are diagrams illustrating electronic devices. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details of the present invention can be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention is not interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same reference numerals are used in common between different drawings for the same parts or parts having similar functions, and repeated explanations may be omitted. In addition, hatching of the same elements constituting the drawings may be omitted or changed as appropriate between different drawings.

[0029] In addition, even if a circuit diagram shows a single element, the element may be configured as a plurality of elements as long as there is no functional problem. For example, a plurality of transistors operating as a switch may be connected in series or parallel. A capacitor may also be divided and placed in multiple positions.

[0030] In addition, one conductor may have multiple functions such as wiring, an electrode, and a terminal, and in this specification, multiple names may be used for the same element. Even if elements are shown as being directly connected to each other on a circuit diagram, the elements may actually be connected to each other via multiple conductors, and in this specification, such a configuration is also included in the category of direct connection.

[0031] (Embodiment 1) In this embodiment, a display device which is one embodiment of the present invention will be described with reference to drawings.

[0032] One embodiment of the present invention is a display device in which a circuit having a function of adding data (hereinafter, an adder circuit) is provided inside and outside a display area. The adder circuit has a function of adding data supplied from a source driver. Therefore, a voltage equal to or higher than the output of the source driver can be generated.

[0033] The summing circuit is electrically connected to all pixels in the column direction of the display area, and some of its elements are divided and arranged within the display area. Therefore, it is possible to relax the constraints on the size of the elements of the summing circuit, and data addition can be performed efficiently. In addition, by providing other elements of the summing circuit outside the display area, it is possible to reduce the number of wirings in the display area, and the aperture ratio of the pixels can be increased.

[0034] 1 is a diagram illustrating a display device according to one embodiment of the present invention. The display device includes pixels 10 arranged in a column direction and a row direction, a source driver 12, a gate driver 13, and a circuit 11. The source driver 12 is electrically connected to the circuit 11. The gate driver 13 is electrically connected to the pixels 10. The circuit 11 is electrically connected to the pixels 10. Note that, although an example in which one gate driver 13 is provided at one end of a display region 15 is shown, one more gate driver 13 may be provided at the other opposing end, and the pixels 10 may be driven by two gate drivers.

[0035] The circuit 11 can be provided for each column and is electrically connected to all the pixels 10 arranged in the same column. Moreover, the elements of the circuit 11 can be provided inside or outside the display area.

[0036] The circuit 11 is an adder circuit and has a function of generating third data by adding the first data and the second data supplied from the source driver 12 by capacitive coupling. The pixel 10 has a transistor and a display element and has a function of retaining the third data and a function of performing display on the display element in accordance with the third data.

[0037] FIG. 2 is a diagram illustrating a circuit 11 and pixels 10 (pixels 10[m,1] to [m,n] (m and n are natural numbers equal to or greater than 1)) arranged in any one column (the mth column) of the display device shown in FIG. 1.

[0038] The circuit 11 can include a transistor 101, a transistor 102, a transistor 103, and a capacitor 104. One of a source or a drain of the transistor 101 is electrically connected to one electrode of the capacitor 104. The other electrode of the capacitor 104 is electrically connected to one of a source or a drain of the transistor 102. One of a source or a drain of the transistor 102 is electrically connected to one of a source or a drain of the transistor 103.

[0039] Here, the capacitor 104 is configured by connecting a plurality of capacitors 106 in parallel. By distributing the capacitors 106 in the display region, the total area of ​​the capacitors 104 can be easily increased. In addition, the area occupied by the circuit 11 outside the display region can be reduced, and a narrow frame can be achieved. Note that several capacitors 106 may also be provided outside the display region. In addition, the number of capacitors 106 does not have to match the number of pixels 10. By adjusting the number of capacitors 106 connected in parallel, the capacitance value of the capacitor 104 can be set to a desired value.

[0040] The capacitor 106 is configured such that the wiring 125 serves as one electrode and another wiring overlapping with the wiring 125 serves as the other electrode. Therefore, even if the capacitor 106 is disposed in the display region as shown in FIG. 2, the aperture ratio is not significantly reduced.

[0041] The pixel 10 can include a transistor 105 and a circuit block 110. The circuit block 110 can include a transistor, a capacitor, a display element, and the like. One of a source and a drain of the transistor 105 is electrically connected to one of a source and a drain of the transistor 101. The other of the source and the drain of the transistor 105 is electrically connected to the circuit block 110.

[0042] Here, a wiring (wiring 125) that connects one of the source or drain of the transistor 101, one electrode of the capacitor 104, and one of the source or drain of the transistor 105 is a node NM. A wiring that connects the other of the source or drain of the transistor 105 and the circuit block 110 is a node NP. The node NP can be floating, and a display element included in the circuit block 110 operates according to the potential of the node NP.

[0043] The connections between the elements of the circuit 11 and the pixel 10 and various wirings will be described. The gate of the transistor 101 is electrically connected to a wiring 121. The gate of the transistor 102 is electrically connected to a wiring 122. The gate of the transistor 103 is electrically connected to a wiring 121. The gate of the transistor 105 is electrically connected to a wiring 123. One of the source and the drain of the transistor 101 is electrically connected to a wiring 125. The other of the source and the drain of the transistor 102 and the other of the source and the drain of the transistor 101 are electrically connected to a wiring 124. The other of the source and the drain of the transistor 103 is electrically connected to a wiring 125. ref The resistor R is electrically connected to a wiring that can supply a reference potential (for example, a reference potential such as 0 V).

[0044] The wirings 121, 122, and 123 (123[1] to [n]) function as gate lines. For example, the wirings 121 and 122 can be electrically connected to a circuit that controls the operation of the circuit 11. The wiring 123 can be electrically connected to the gate driver 13. The wiring 124 can be electrically connected to the source driver 12 (see FIG. 1).

[0045] In the circuit 11, first, the first data (weight: W) is written to the node NM. At this time, the other electrode of the capacitance element 104 is connected to a potential “V ref " is supplied to the capacitance element 104, and "WV ref Next, the node NM is set to a floating state, and second data (data: D) is supplied to the other electrode of the capacitor 104.

[0046] At this time, the capacitance value of the capacitance element 104 is C 104 , the capacitance value of node NM is C NM Then, the potential of node NM is W+(C 104 / (C 104 +C NM ))×(DV ref ) where C 104 Increase the value of C NM If the value of can be ignored, the potential of node NM will be "W+DV ref In one embodiment of the present invention, the total area of ​​the capacitor 104 can be increased as described above, and the capacitance value can be easily increased; therefore, data can be added efficiently.

[0047] Therefore, “W” = “D”, “V ref "=0V, and C 104 C NM If this potential is sufficiently larger than "2D" or "2W", the potential of the node NM approaches "2D" or "2W", and a potential approximately twice the output of the source driver 12 can be supplied to the node NM.

[0048] This function allows a high voltage to be generated even when a general-purpose driver IC is used. For example, it is possible to drive liquid crystal elements that require a high voltage for gradation control. In addition, the voltage supplied from the source driver 12 to drive general liquid crystal elements or light-emitting elements can be reduced to about half, thereby reducing the power consumption of the display device.

[0049] In addition, correction data may be supplied as the first data (weight: W). For example, by adding the brightness correction data to the image data, it is possible to correct the brightness variation inherent to the display device. Or, since the brightness can be corrected on a pixel-by-pixel basis, it may be used for HDR display. Furthermore, when a light-emitting element is used as a display element, the display quality is affected by the threshold voltage variation of the driving transistor, so that the threshold voltage correction data of the transistor may be supplied as the first data (weight: W) to improve the display quality. Note that the first data (weight: W) and the second data (data: D) may be interchanged.

[0050] In one embodiment of the present invention, the transistor 105 of a specific pixel 10 is turned on in accordance with the above-described operation of adding potentials, and the potential of the node NP (=the potential of the node NM) is determined. By sequentially performing such an operation for the pixels 10[m,1] to [m,n], the potential of the node NP of each pixel 10 can be determined. In other words, different image data can be supplied to each pixel 10.

[0051] The nodes NM and NP act as storage nodes. Data can be written to each node by making a transistor connected to each node conductive. The data can be held in each node by making the transistor nonconductive. By using a transistor with an extremely low off-state current as the transistor, leakage current can be suppressed, and the potential of each node can be held for a long time. For example, a transistor using a metal oxide for a channel formation region (hereinafter, referred to as an OS transistor) can be used as the transistor.

[0052] Specifically, it is preferable to use OS transistors for any one or all of the transistors 101, 102, 103, and 105. OS transistors may also be used for the elements of the circuit block 110. When the circuit block 110 operates within an allowable range of leakage current, a transistor having Si in a channel formation region (hereinafter, referred to as a Si transistor) may also be used. Alternatively, an OS transistor and a Si transistor may be used in combination. Examples of the Si transistor include a transistor having amorphous silicon and a transistor having crystalline silicon (typically, low-temperature polysilicon or single crystal silicon).

[0053] As a semiconductor material used for an OS transistor, a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used. A typical example is an oxide semiconductor containing indium, for example, CAAC-OS or CAC-OS described later can be used. CAAC-OS has stable atoms constituting the crystal, and is suitable for transistors that emphasize reliability. In addition, CAC-OS has high mobility characteristics, and is suitable for transistors that operate at high speed.

[0054] OS transistors have a large energy gap in the semiconductor layer, and therefore exhibit extremely low off-current characteristics of a few yA / μm (current value per 1 μm of channel width). OS transistors also have characteristics different from Si transistors, such as the absence of impact ionization, avalanche breakdown, and short channel effects, and can form highly reliable circuits. OS transistors are also less susceptible to variations in electrical characteristics caused by non-uniformity in crystallinity, which is a problem with Si transistors.

[0055] The semiconductor layer of the OS transistor can be, for example, a film represented by an In-M-Zn-based oxide containing indium, zinc, and M (a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium).

[0056] When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide film preferably satisfies In≧M and Zn≧M. As the atomic ratio of the metal elements of such a sputtering target, In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, etc. are preferable. Note that the atomic ratio of the semiconductor layer to be formed includes a variation of ±40% of the atomic ratio of the metal elements contained in the above sputtering target.

[0057] The semiconductor layer is made of an oxide semiconductor with a low carrier density. For example, the semiconductor layer has a carrier density of 1×10 17 / cm 3 Less than or equal to 1×10 15 / cm 3 Less than 1×10, more preferably 13 / cm 3 Less than or equal to 1×10 11 / cm 3 Less than 1×10, more preferably 10 / cm 3 Less than 1 x 10 -9 / cm 3 An oxide semiconductor having a carrier density of 1000 or more can be used. Such an oxide semiconductor is called a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. The oxide semiconductor has a low density of defect states and is stable in characteristics.

[0058] Note that the composition is not limited to these, and may be appropriate depending on the required semiconductor characteristics and electrical characteristics (field-effect mobility, threshold voltage, etc.) of the transistor. In order to obtain the required semiconductor characteristics of the transistor, it is preferable to appropriately set the carrier density, impurity concentration, defect density, atomic ratio of metal element to oxygen, interatomic distance, density, and the like of the semiconductor layer.

[0059] When silicon or carbon, which is one of the group 14 elements, is contained in the oxide semiconductor constituting the semiconductor layer, oxygen vacancies increase and the semiconductor layer becomes n-type. For this reason, the concentration of silicon or carbon in the semiconductor layer (concentration obtained by secondary ion mass spectrometry (SIMS)) is set to 2×10 18 atoms / cm 3 Less than or equal to 2×10 17 atoms / cm 3 The following applies.

[0060] In addition, when an alkali metal or an alkaline earth metal is bonded to an oxide semiconductor, carriers may be generated, which may increase the off-state current of a transistor. For this reason, the concentration of an alkali metal or an alkaline earth metal in a semiconductor layer (concentration obtained by SIMS) is set to 1×10 18 atoms / cm 3 Less than or equal to 2×10 16 atoms / cm 3 To the following:

[0061] In addition, when nitrogen is contained in the oxide semiconductor constituting the semiconductor layer, electrons that act as carriers are generated, and the carrier density increases, making the semiconductor layer more likely to be n-type. As a result, a transistor using an oxide semiconductor that contains nitrogen is likely to have normally-on characteristics. For this reason, the nitrogen concentration in the semiconductor layer (concentration obtained by SIMS) is 5×10 18 atoms / cm 3 It is preferable to do the following:

[0062] Furthermore, when hydrogen is contained in an oxide semiconductor constituting a semiconductor layer, it reacts with oxygen bonded to a metal atom to form water, which may form oxygen vacancies in the oxide semiconductor. When oxygen vacancies are present in a channel formation region in an oxide semiconductor, the transistor may have normally-on characteristics. Furthermore, defects in which hydrogen has entered the oxygen vacancies may function as donors and generate electrons that serve as carriers. In addition, some of the hydrogen may bond with oxygen that is bonded to a metal atom to generate electrons that serve as carriers. Therefore, a transistor using an oxide semiconductor that contains a large amount of hydrogen is likely to have normally-on characteristics.

[0063] A defect in which hydrogen has entered an oxygen vacancy can function as a donor for an oxide semiconductor. However, it is difficult to quantitatively evaluate the defect. Thus, an oxide semiconductor may be evaluated by its carrier concentration instead of its donor concentration. Thus, in this specification and the like, a carrier concentration assuming a state in which no electric field is applied may be used as a parameter of an oxide semiconductor instead of the donor concentration. In other words, the "carrier concentration" described in this specification and the like may be rephrased as the "donor concentration".

[0064] Therefore, it is preferable to reduce hydrogen in the oxide semiconductor as much as possible. 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 When an oxide semiconductor in which impurities such as hydrogen are sufficiently reduced is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0065] The semiconductor layer may have a non-single crystal structure. The non-single crystal structure includes, for example, a C-Axis Aligned Crystalline Oxide Semiconductor (CAAC-OS) having crystals oriented along the c-axis, a polycrystalline structure, a microcrystalline structure, or an amorphous structure. Among the non-single crystal structures, the amorphous structure has the highest density of defect states, and the CAAC-OS has the lowest density of defect states.

[0066] An oxide semiconductor film having an amorphous structure has, for example, a disordered atomic arrangement and does not include a crystalline component, or an oxide film having an amorphous structure has, for example, a completely amorphous structure and does not include a crystalline portion.

[0067] The semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have a single layer structure or a multilayer structure including two or more of the above-mentioned regions.

[0068] The following describes the structure of a cloud-aligned composite (CAC)-OS, which is one type of non-single crystal semiconductor layer.

[0069] CAC-OS is, for example, a material in which elements constituting an oxide semiconductor are unevenly distributed with a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or thereabouts. Note that, hereinafter, a state in which one or more metal elements are unevenly distributed in an oxide semiconductor and regions containing the metal elements are mixed with a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or thereabouts, is also referred to as a mosaic or patch shape.

[0070] The oxide semiconductor preferably contains at least indium, particularly indium and zinc, and may further contain one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like.

[0071] For example, the CAC-OS in In-Ga-Zn oxide (In-Ga-Zn oxide among CAC-OS may be specifically referred to as CAC-IGZO) is an indium oxide (hereinafter, InO X1 (X1 is a real number greater than 0).) or indium zinc oxide (hereinafter, In X2 Zinc Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0.) and gallium oxide (GaO X3 (X3 is a real number greater than 0). ) or gallium zinc oxide (Ga X4 Zinc Y4 O Z4 (X4, Y4, and Z4 are real numbers greater than 0).) The material is separated into a mosaic shape, and the mosaic shape of InO X1 , or In X2 Zinc Y2 O Z2 However, the structure is such that the particles are uniformly distributed in the film (hereinafter, also referred to as a cloud-like structure).

[0072] In other words, CAC-OS is X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 In this specification, for example, when the atomic ratio of In to element M in the first region is greater than the atomic ratio of In to element M in the second region, the first region is said to have a higher In concentration than the second region.

[0073] IGZO is a common name and may refer to a compound made of In, Ga, Zn, and O. A typical example is InGaO 3 (ZnO) m1 (m1 is a natural number), or In (1+x0) Ga (1-x0) O 3 (ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number).

[0074] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure, where multiple IGZO nanocrystals have a c-axis orientation and are connected without being oriented in the ab plane.

[0075] On the other hand, CAC-OS is a material composition of oxide semiconductor. CAC-OS is a material composition containing In, Ga, Zn, and O, in which some regions observed as nanoparticles mainly composed of Ga and some regions observed as nanoparticles mainly composed of In are randomly distributed in a mosaic pattern. Therefore, in CAC-OS, the crystal structure is a secondary element.

[0076] Note that the CAC-OS does not include a laminated structure of two or more films with different compositions, such as a two-layer structure consisting of a film mainly containing In and a film mainly containing Ga.

[0077] In addition, GaO X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 In some cases, it may be difficult to observe a clear boundary between the region in which the main component is the

[0078] In addition, when one or more elements selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. are contained instead of gallium, the CAC-OS has a configuration in which some regions observed to be in the form of nanoparticles mainly composed of the metal element and some regions observed to be in the form of nanoparticles mainly composed of In are randomly dispersed in a mosaic pattern.

[0079] CAC-OS can be formed, for example, by a sputtering method under conditions where the substrate is not intentionally heated. When CAC-OS is formed by a sputtering method, any one or more selected from an inert gas (typically argon), oxygen gas, and nitrogen gas may be used as a deposition gas. The lower the flow rate ratio of oxygen gas to the total flow rate of deposition gas during deposition, the more preferable it is, for example, 0% or more and less than 30%, preferably 0% or more and 10% or less.

[0080] CAC-OS has the characteristic that no clear peaks are observed when it is measured using the θ / 2θ scan by the out-of-plane method, which is one of the X-ray diffraction (XRD) measurement methods. In other words, the X-ray diffraction measurement shows that there is no orientation in the ab plane direction or the c axis direction in the measurement area.

[0081] In addition, in the electron beam diffraction pattern obtained by irradiating CAC-OS with an electron beam (also called nano-beam electron beam) with a probe diameter of 1 nm, a ring-shaped region of high brightness (ring region) and multiple bright spots are observed in the ring region. Therefore, the electron beam diffraction pattern shows that the crystal structure of CAC-OS has an nc (nano-crystal) structure that does not have orientation in the planar direction and cross-sectional direction.

[0082] For example, in the case of CAC-OS of In-Ga-Zn oxide, EDX mapping obtained using EDX (Energy Dispersive X-ray spectroscopy) revealed that GaO X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 It can be seen that the region in which the main component is the crystalline silicon is unevenly distributed and mixed.

[0083] CAC-OS has a different structure from IGZO compounds in which metal elements are uniformly distributed, and has different properties from IGZO compounds. X3 The main components are In X2 Zinc Y2 O Z2 , or InO X1 The structure is such that the regions containing each element as the main component are separated from each other in a mosaic pattern.

[0084] Here, In X2 Zinc Y2 O Z2 , or InO X1 The area where GaO is the main component X3 This region has a higher electrical conductivity than the region where In is the main component. X2 Zinc Y2 O Z2 , or InO X1 When carriers flow through the region where In is the main component, the conductivity of the oxide semiconductor is expressed. X2 Zinc Y2 O Z2 , or InO X1 When the region mainly composed of is distributed in a cloud shape in the oxide semiconductor, high field-effect mobility (μ) can be achieved.

[0085] On the other hand, GaO X3 The region where the main components are In X2 Zinc Y2 O Z2 , or InOX1 This region has higher insulating properties than the region where GaO is the main component. X3 When a region containing these as main components is distributed in an oxide semiconductor, leakage current can be suppressed and favorable switching operation can be achieved.

[0086] Therefore, when CAC-OS is used in a semiconductor device, GaO X3 Insulation caused by X2 Zinc Y2 O Z2 , or InO X1 The conductivity caused by the MOSFET and the MOSFET's resistance to the MOSFET's resistance work in a complementary manner, resulting in a high on-state current (I on ), and high field-effect mobility (μ).

[0087] In addition, semiconductor elements using CAC-OS have high reliability, making CAC-OS suitable as a constituent material for various semiconductor devices.

[0088] 3A, in the display device of one embodiment of the present invention, elements other than the capacitor 104 of the circuit 11 may be incorporated in the source driver 12. With this structure, the frame can be narrowed.

[0089] When the pixel circuit and the source driver 12 are monolithically integrated on a substrate, a stack structure may be used having an area where any element of the source driver 12 and the circuit 11 overlap with each other. By adopting such a configuration, it is possible to increase the degree of freedom in designing the elements of the circuit 11, and improve the electrical characteristics.

[0090] 1 shows an example in which a circuit 11 is provided for each column, but as shown in FIG. 3B, a selection circuit 16 may be provided between the circuit 11 and the pixel 10, and data writing to pixels in multiple columns may be performed by one circuit 11. With this configuration, the number of circuits 11 can be reduced, enabling a narrower frame. Note that, while FIG. 3B shows an example in which writing is performed to pixels for three columns by a combination of one circuit 11 and one selection circuit 16, the present invention is not limited to this example, and the number of columns may be determined within an allowable range of writing time.

[0091] Since the transistors 101, 102, and 103 in the circuit 11 are provided outside the display area, they are less subject to size restrictions and can have a larger channel width than transistors provided in pixels. By using transistors with a larger channel width, the charge / discharge time for the wiring 125 and the like can be shortened, making it easier to increase the frame frequency. In addition, the circuit 11 can be easily applied to high-definition displays with a large number of pixels and a short horizontal period.

[0092] Furthermore, by using OS transistors for the transistors 101, 102, and 103, the circuit 11 can withstand high voltage, and can operate stably even if the voltage generated in data addition is several tens of volts. Furthermore, when the transistors 101, 102, and 103 are Si transistors provided in an IC chip, the operation can be faster. Note that when the transistors 101, 102, and 103 are provided in an IC chip, the transistors may be OS transistors.

[0093] Next, a method of writing data to the pixel 10 using the circuit 11 will be described with reference to the timing chart shown in FIG. 4. In the following description, high potential is represented by "H" and low potential is represented by "L". The weight supplied to the pixel 10[1] is "W[1]", the image data is "D[1]", the weight supplied to the pixel 10[2] is "W[2]", and the image data is "D[2]". ref " may be, for example, 0V, a GND potential, or a specific reference potential.

[0094] In addition, detailed changes in distribution, coupling, or loss of potential due to circuit configuration, operation timing, etc. are not taken into consideration here. In addition, although changes in potential due to capacitive coupling depend on the capacitance ratio between the supplying side and the supplied side, for clarity of explanation, the capacitance value of the circuit block 110 is assumed to be sufficiently small.

[0095] At time T1, when “W[1]” is supplied to the wiring 124 and the potentials of the wirings 121 and 123[1] are set to “H”, the transistor 103 is turned on and the potential of the other electrode of the capacitor 104 becomes “V ref This operation is a reset operation for performing the subsequent addition operation (capacitive coupling operation).

[0096] Furthermore, the transistors 101 and 105 are turned on, and the potential of the wiring 124 is written to the node NP[1]. This is a weight writing operation, and the potential of the node NP[1] becomes “W[1]”.

[0097] At time T2, when the potential of the wiring 121 is set to "L" and the potential of the wiring 123[1] is set to "H", the transistors 101 and 103 are turned off. At this time, "W[1]" is held in the node NP[1]. In addition, "W[1]-V ref This completes the write operation of “W[1]” in pixel 10[1].

[0098] At time T3, when "D[1]" is supplied to the wiring 124, the potential of the wiring 121 is set to "L" and the potentials of the wirings 122 and 123[1] are set to "H", the transistors 102 and 105 become conductive. At this time, the potential of the other electrode of the capacitor 104 becomes "D[1]", and "D[1]" is added to the potential of the node NP[1] by capacitive coupling. This operation is an addition operation, and the potential of the node NP[1] becomes "W[1]+D[1]-V ref " At this time, "V ref If "=0," the potential of the node NP[1] becomes "W[1]+D[1]." The potential of the node NP[1] is supplied to the display element, and display is performed.

[0099] When the potentials of the wirings 121, 122, and 123[1] are set to “L” at time T4, the transistor 105 is turned off, the potential of the node NP[1] is held, and display continues until the operation of the next frame. This concludes the description of the operation of the pixel 10[1].

[0100] By applying a similar operation to pixel 10[2] at times T5 to T8, it is possible to perform display according to "W[2]+D[2]" in pixel 10[2].

[0101] The circuit 11 may be provided not only on one end side of the display area 15 as shown in FIG. 5, but also on the other opposing end side.

[0102] Here, the circuit 11 provided on one end of the display region 15 is referred to as a circuit 11a. The operation of the circuit 11a is controlled by signals supplied from wirings 121a and 122a. The circuit 11a is electrically connected to a source driver 12a. The circuit 11 provided on the other end of the display region 15 is referred to as a circuit 11b. The operation of the circuit 11b is controlled by signals supplied from wirings 121b and 122b. The circuit 11b is electrically connected to a source driver 12b.

[0103] The circuits 11a and 11b are operated so as to output the same data at the same timing. That is, the source drivers 12a and 12b output the same data at the same timing, and the same operation signals are supplied to the wirings 121a and 121b and the wirings 121a and 121b at the same timing.

[0104] By operating in this manner, the circuits 11a and 11b can be operated simultaneously, and the same data can be output to the wiring 125. Therefore, the wiring 125 can be charged and discharged at high speed, and the wiring 125 can be easily adapted to a display device with a large number of pixels and a short horizontal period, a large display device in which the parasitic capacitance of the wiring 125 is large, and the like.

[0105] 6A to 6C are examples of a configuration that can be applied to the circuit block 110 and includes a light-emitting element as a display element.

[0106] 6A includes a transistor 111, a capacitor 113, and a light-emitting element 114. One of a source or a drain of the transistor 111 is electrically connected to one electrode of the light-emitting element 114. One electrode of the light-emitting element 114 is electrically connected to one electrode of the capacitor 113. The other electrode of the capacitor 113 is electrically connected to the gate of the transistor 111. The gate of the transistor 111 is electrically connected to a node NP.

[0107] The other of the source and the drain of the transistor 111 is electrically connected to a wiring 128. The other electrode of the light-emitting element 114 is electrically connected to a wiring 129. The wirings 128 and 129 have a function of supplying power. For example, the wiring 128 can supply high-potential power, and the wiring 129 can supply low-potential power.

[0108] 6A, a current flows through the light-emitting element 114 when the potential of the node NM becomes equal to or higher than the threshold voltage of the transistor 111. Therefore, the light-emitting element 114 may start emitting light when the weight (W) is written to the node NP, which may limit applications.

[0109] 6B, one electrode of the light-emitting element 114 may be electrically connected to the wiring 128, and the other electrode of the light-emitting element 114 may be electrically connected to the other of the source and drain of the transistor 111. This configuration can also be applied to other circuit blocks 110 including the light-emitting element 114.

[0110] 6(C) shows a structure in which a transistor 112 is added to the structure in FIG. 6(A). One of the source and the drain of the transistor 112 is electrically connected to one of the source and the drain of the transistor 111. The other of the source and the drain of the transistor 112 is electrically connected to the light-emitting element 114. A gate of the transistor 112 is electrically connected to a wiring 130. The wiring 130 can function as a signal line that controls the conduction of the transistor 112.

[0111] In this configuration, when the potential of the node NP is equal to or higher than the threshold voltage of the transistor 111 and the transistor 112 is turned on, a current flows through the light-emitting element 114. Therefore, the light-emitting element 114 can start emitting light at any timing after the addition operation of the weight (W) and the data (D).

[0112] 6(D) shows a structure in which a transistor 115 is added to the structure in FIG. 6(C). One of the source and the drain of the transistor 115 is electrically connected to one of the source and the drain of the transistor 111. The other of the source and the drain of the transistor 115 is electrically connected to a wiring 131. A gate of the transistor 115 is electrically connected to a wiring 132. The wiring 132 can function as a signal line that controls the conduction of the transistor 115.

[0113] The wiring 131 can be electrically connected to a supply source of a specific potential such as a reference potential. By supplying a specific potential from the wiring 131 to one of the source and the drain of the transistor 111, writing of image data can also be stabilized.

[0114] The wiring 131 can be connected to the circuit 120 and can also function as a monitor line. The circuit 120 can have one or more of the following functions: a source of the specific potential, a function of acquiring electrical characteristics of the transistor 111, and a function of generating correction data.

[0115] 7A to 7D are examples of a configuration that can be applied to the circuit block 110 and includes a liquid crystal element as a display element.

[0116] 7A includes a capacitor 116 and a liquid crystal element 117. One electrode of the liquid crystal element 117 is electrically connected to one electrode of the capacitor 116. One electrode of the capacitor 116 is electrically connected to a node NP.

[0117] The other electrode of the capacitor 116 is electrically connected to a wiring 133. The other electrode of the liquid crystal element 117 is electrically connected to a wiring 134. The wirings 133 and 134 have a function of supplying power. For example, the wirings 133 and 134 can supply a reference potential such as GND or 0 V or an arbitrary potential.

[0118] Note that a configuration may be used in which the capacitor 116 is omitted as shown in FIG. 7B. As described above, an OS transistor can be used as the transistor connected to the node NP. Since the leakage current of an OS transistor is extremely small, even if the capacitor 116 functioning as a storage capacitor is omitted, the display can be maintained for a relatively long time. In addition, it is effective to omit the capacitor 116 not only in the transistor configuration but also in the case where the display period can be shortened by high-speed operation such as field sequential driving. By omitting the capacitor 116, the aperture ratio can be improved. Alternatively, the transmittance of the pixel can be improved.

[0119] 7(A) and (B), the operation of the liquid crystal element 117 starts when the potential of the node NP is determined to be equal to or higher than the operation threshold value of the liquid crystal element 117. Therefore, the display operation may start at the stage when the weight is written to the node NP, which may limit the use. However, in the case of a transmissive liquid crystal display device, by combining this with an operation such as turning off the backlight until the timing when the addition operation of the weight (W) and the data (D) is completed, it is possible to suppress the visibility of unnecessary display operations even if they are performed.

[0120] 7(C) shows a structure in which a transistor 118 is added to the structure in FIG. 7(A). One of the source and the drain of the transistor 118 is electrically connected to one electrode of the capacitor 116. The other of the source and the drain of the transistor 118 is electrically connected to a node NP. A gate of the transistor 118 is electrically connected to a wiring 127. The wiring 127 can function as a signal line that controls the conduction of the transistor 118.

[0121] In this configuration, when the transistor 118 is turned on, the potential of the node NP is applied to the liquid crystal element 117. Therefore, the operation of the liquid crystal element can be started at any timing after the addition operation of the weight (W) and the data (D).

[0122] Note that since the potential supplied to the capacitor 116 and the liquid crystal element 117 is held while the transistor 118 is off, it is preferable to reset the potential supplied to the capacitor 116 and the liquid crystal element 117 before rewriting image data. For example, the resetting can be performed by supplying a reset potential to the wiring 124 to simultaneously turn on the transistor 101 and the transistor 118.

[0123] 7(D) shows a structure in which a transistor 119 is added to the structure in FIG. 7(C). One of the source and the drain of the transistor 119 is electrically connected to one electrode of the liquid crystal element 117. The other of the source and the drain of the transistor 119 is electrically connected to a wiring 131. A gate of the transistor 119 is electrically connected to a wiring 138. The wiring 138 can function as a signal line that controls the conduction of the transistor 119.

[0124] The circuit 120 electrically connected to the wiring 131 is similar to that described with reference to FIG. 6C, and may also have a function of resetting the potential supplied to the capacitor 116 and the liquid crystal element 117.

[0125] 8A to 8C are diagrams showing the “V ref8A is a diagram showing a specific example of wiring for supplying "V ref The wiring 128 can be applied to the wiring for supplying "V ref Since the potential “V” is preferably 0 V, GND, or a low potential, the wiring 128 also has a function of supplying at least one of these potentials. ref 8B, the wiring 129 for supplying a low potential may be connected to “V ref " may be applied as wiring for supplying ".

[0126] Also, as shown in FIG. 8(C), when a liquid crystal element is used as a display element, ref The wiring 133 can be used as a wiring for supplying “V ref A dedicated common line may be provided to supply the

[0127] In one embodiment of the present invention, a backgate may be provided in a transistor as illustrated in Figures 9A and 9B. Figure 9A shows a structure in which the backgate is electrically connected to the front gate, which has the effect of increasing the on-state current. Figure 9B shows a structure in which the backgate is electrically connected to a wiring 135 that can supply a constant potential, which can control the threshold voltage of the transistor. Note that a backgate may also be provided in the transistor included in the circuit block 110.

[0128] Next, the results of a simulation of pixel operation will be described. Figure 10 shows the configuration of one column of pixels (PIX) used in the simulation and the circuit 11 connected to that column. The number of pixels was assumed to be 100 to 2000, and the configuration (liquid crystal element and capacitive element) shown in Figure 7(A) was used as the circuit block 110. The simulation was performed on the voltage change of the node NP when the number of pixels was changed.

[0129] The parameters used in the simulation were as follows: transistor sizes L / W = 4 μm / 30 μm (transistors Tr1, Tr2, Tr3), L / W = 4 μm / 10 μm (transistor Tr4), capacitance value of capacitive element Cs was 100 fF, capacitance value of liquid crystal element Clc was 100 fF, and common electrodes VCOM and TCOM were 0 V. In addition, the voltage applied to the gates of the transistors was +15 V for "H" and -10 V for "L."

[0130] In addition, the wiring PL connecting the circuit 11 and the pixel PIX incorporates a resistance R1 equivalent to the parasitic resistance and a capacitance C3 equivalent to the parasitic capacitance in the same number as the pixels. Note that the capacitance of the capacitive element C1 (sum of C2), the parasitic capacitance of the wiring PL (sum of C3), and the resistance of the wiring PL (sum of R1) depend on the number of pixels, so the values ​​shown in Table 1 were used. Note that SPICE was used as the circuit simulation software.

[0131] [Table 1]

[0132] Figure 11 shows the timing chart used in the simulation. Here, the weight (W) and data (D) are all set to 5V. ref " was set to 0V.

[0133] 12A to 12D show the simulation results when the number of pixels is 100, 500, 1000, and 2000. Each figure shows the change in voltage at node NP over time when a write operation is performed on pixels PIX[1] to [4].

[0134] With 100 pixels, writing is stable, but the total capacitance value of C1 is small, so data addition is not sufficient.

[0135] At a pixel count of 500, the simulation parameters used here are suitable, and it is possible to add up data corresponding to the capacitance ratio.

[0136] In the case of 1000 pixels, the total capacitance value of C1 is somewhat large, so the writing of W does not finish completely within the writing time in the first pixel PIX[1], and the data potential does not rise sufficiently. From pixel PIX[2] onwards, writing becomes stable due to the influence of the charge remaining in the wiring PL.

[0137] When the number of pixels is 2000, the total capacitance value of C1 becomes too large, and the writing of W to pixel PIX[1] cannot keep up, resulting in a low voltage state. Because the total capacitance value of C1 is too large, this effect also extends to pixels PIX[2] and onwards.

[0138] From the above simulation results, it was confirmed that data addition can be performed stably by combining appropriate operating parameters with an appropriate number of pixels.

[0139] Although the total capacitance of the capacitance element C1 strongly influences the operation, the capacitance of the capacitance element C1 can be easily adjusted by the number of capacitance elements C2 connected in parallel. Therefore, even if the number of pixels arranged in a column is 1000, 2000 or more, appropriate operation as shown in FIG. 12(B) can be achieved by adjusting the number of capacitance elements C2.

[0140] Next, a simulation result regarding the pixel layout will be described. Fig. 13 is a diagram showing an example of a layout of three vertical pixels, which corresponds to the pixels PIX[1] to [3] shown in Fig. 10.

[0141] In the layout shown in Fig. 13, the capacitance element Cs is omitted, and only the pixel electrode PE corresponding to the node NP is illustrated. As an example of the transistor, a bottom gate type (with a back gate) is illustrated. The pixel pitch is assumed to be 136 μm.

[0142] The capacitance element C1 has a pair of electrodes, a conductive layer fabricated in the same process as the gate wiring and a conductive layer fabricated in the same process as the source wiring. The two conductive layers have an overlapping area in the display area with an insulating layer (e.g., a gate insulating film) interposed therebetween. That is, one capacitance element C2 is provided for each pixel. In addition, the capacitance elements C2 are connected in parallel, so they are equivalent to one large capacitance element.

[0143] That is, since the capacitance element C1 is divided, the aperture ratio and transmittance of the pixel can be improved. Note that, for electrically connecting one of the conductive layers constituting the capacitance element, it is preferable to use a connection wiring BR that bridges the gate wiring. The connection wiring BR can be manufactured, for example, in the same process as the source wiring. At a pixel pitch of 136 μm, the aperture ratio ((area of ​​pixel electrode PE) / (area of ​​pixel)) was estimated to be about 90.5%.

[0144] From the above simulation results, the effect of one embodiment of the present invention could be confirmed.

[0145] This embodiment mode can be implemented in appropriate combination with structures described in other embodiment modes.

[0146] (Embodiment 2) In this embodiment, a configuration example of a display device using a liquid crystal element and a configuration example of a display device using a light emitting element are described. Note that in this embodiment, the description of the elements, operations, and functions of the display device described in the first embodiment are omitted.

[0147] 14A to 14C are diagrams showing the structure of a display device to which one embodiment of the present invention can be applied.

[0148] The display device described in this embodiment can use the adder circuit and the pixel described in Embodiment 1. Note that the scanning line driver circuit described below corresponds to a gate driver, and the signal line driver circuit corresponds to a source driver.

[0149] In FIG. 14A, a sealant 4005 is provided so as to surround a display portion 215 provided over a first substrate 4001 , and the display portion 215 is sealed by the sealant 4005 and a second substrate 4006 .

[0150] 14A, the scan line driver circuit 221a, the signal line driver circuit 231a, the signal line driver circuit 232a, and the common line driver circuit 241a each have a plurality of integrated circuits 4042 provided on a printed board 4041. The integrated circuits 4042 are formed of a single crystal semiconductor or a polycrystalline semiconductor. The common line driver circuit 241a has a function of supplying a prescribed potential to the wirings 128, 129, 132, 133, and 135 described in Embodiment 1.

[0151] Various signals and potentials are supplied to the scanning line driving circuit 221a, the common line driving circuit 241a, the signal line driving circuit 231a, and the signal line driving circuit 232a via an FPC (Flexible printed circuit) 4018.

[0152] The integrated circuits 4042 included in the scan line driver circuit 221a and the common line driver circuit 241a have a function of supplying a selection signal to the display portion 215. The integrated circuits 4042 included in the signal line driver circuit 231a and the signal line driver circuit 232a have a function of supplying image data to the display portion 215. The integrated circuits 4042 are mounted in a region on the first substrate 4001 that is different from a region surrounded by the sealant 4005.

[0153] The method for connecting the integrated circuit 4042 is not particularly limited, and may be wire bonding, COG (Chip On Glass), TCP (Tape Carrier Package), COF (Chip On Film), or the like.

[0154] 14B shows an example in which an integrated circuit 4042 included in the signal line driver circuit 231a and the signal line driver circuit 232a is mounted by a COG method. In addition, a part or the whole of the driver circuit can be integrally formed over the same substrate as the display portion 215 to form a system-on-panel.

[0155] 14B shows an example in which the scanning line driver circuit 221a and the common line driver circuit 241a are formed on the same substrate as the display portion 215. By forming the driver circuit simultaneously with the pixel circuit in the display portion 215, the number of components can be reduced, thereby improving productivity.

[0156] 14B, a sealant 4005 is provided so as to surround the display portion 215, the scanning line driver circuit 221a, and the common line driver circuit 241a, which are provided over the first substrate 4001. A second substrate 4006 is provided over the display portion 215, the scanning line driver circuit 221a, and the common line driver circuit 241a. Thus, the display portion 215, the scanning line driver circuit 221a, and the common line driver circuit 241a are sealed together with the display elements by the first substrate 4001, the sealant 4005, and the second substrate 4006.

[0157] 14B shows an example in which the signal line driver circuit 231a and the signal line driver circuit 232a are formed separately and mounted on the first substrate 4001, but the present invention is not limited to this configuration. The scanning line driver circuit may be formed separately and mounted, or a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed separately and mounted. As shown in FIG. 14C, the signal line driver circuit 231a and the signal line driver circuit 232a may be formed on the same substrate as the display unit 215.

[0158] Further, the display device may include a panel in which a display element is sealed, and a module in which an IC including a controller and the like are mounted on the panel.

[0159] The display portion and the scan line driver circuit provided over the first substrate include a plurality of transistors, and any of the transistors described in the above embodiment modes can be used as the transistors.

[0160] The structures of the transistors included in the peripheral driver circuit and the transistors included in the pixel circuits of the display area may be the same or different. The transistors included in the peripheral driver circuit may all have the same structure, or may have two or more types of transistors. Similarly, the transistors included in the pixel circuits may all have the same structure, or may have two or more types of transistors.

[0161] In addition, an input device 4200 can be provided over the second substrate 4006. The display device in which the input device 4200 is provided in any of the displays shown in FIGS.

[0162] There is no limitation on a sensing element (also referred to as a sensor element) included in a touch panel of one embodiment of the present invention. Various sensors capable of detecting the proximity or contact of a sensing object such as a finger or a stylus can be used as the sensing element.

[0163] As the sensor type, various types can be used, such as a capacitance type, a resistive film type, a surface acoustic wave type, an infrared type, an optical type, and a pressure sensitive type.

[0164] In this embodiment, a touch panel having capacitance type sensing elements will be described as an example.

[0165] The capacitance type includes a surface capacitance type, a projected capacitance type, etc. The projected capacitance type includes a self-capacitance type, a mutual capacitance type, etc. The mutual capacitance type is preferable because it enables simultaneous multi-point detection.

[0166] The touch panel of one embodiment of the present invention can have various configurations, such as a configuration in which a display device and a detector element that are separately manufactured are bonded to each other, or a configuration in which electrodes that constitute a detector element are provided on one or both of a substrate supporting a display element and an opposing substrate.

[0167] An example of a touch panel is shown in Fig. 15(A) and (B). Fig. 15(A) is a perspective view of a touch panel 4210. Fig. 15(B) is a schematic perspective view of an input device 4200. For clarity, only representative components are shown.

[0168] The touch panel 4210 has a configuration in which a display device and a sensing element, which are separately manufactured, are bonded together.

[0169] The touch panel 4210 includes an input device 4200 and a display device, which are provided one on top of the other.

[0170] The input device 4200 has a substrate 4263, an electrode 4227, an electrode 4228, a plurality of wirings 4237, a plurality of wirings 4238, and a plurality of wirings 4239. For example, the electrode 4227 can be electrically connected to the wiring 4237 or the wiring 4239. Also, the electrode 4228 can be electrically connected to the wiring 4239. The FPC 4272b is electrically connected to each of the plurality of wirings 4237 and the plurality of wirings 4238. The FPC 4272b can be provided with an IC 4273b.

[0171] Alternatively, a touch sensor may be provided between the first substrate 4001 and the second substrate 4006 of the display device. When a touch sensor is provided between the first substrate 4001 and the second substrate 4006, an optical touch sensor using a photoelectric conversion element may be used in addition to a capacitive touch sensor.

[0172] 16(A) and (B) are cross-sectional views of the portion indicated by the chain line N1-N2 in FIG. 14(B). The display device shown in FIG. 16(A) and (B) has an electrode 4015, which is electrically connected to a terminal of an FPC 4018 via an anisotropic conductive layer 4019. In FIG. 16(A) and (B), the electrode 4015 is electrically connected to a wiring 4014 in an opening formed in an insulating layer 4112, an insulating layer 4111, and an insulating layer 4110.

[0173] The electrode 4015 is formed from the same conductive layer as the first electrode layer 4030 , and the wiring 4014 is formed from the same conductive layer as the source and drain electrodes of the transistor 4010 and the transistor 4011 .

[0174] 16A and 16B show a transistor 4010 included in the display portion 215 and a transistor 4011 included in the scanning line driver circuit 221a as an example. Note that although bottom-gate transistors are shown as the transistors 4010 and 4011 in FIGS. 16A and 16B, they may be top-gate transistors.

[0175] 16A and 16B, an insulating layer 4112 is provided over the transistor 4010 and the transistor 4011. In addition, in FIG.

[0176] The transistor 4010 and the transistor 4011 are provided over an insulating layer 4102. The transistor 4010 and the transistor 4011 each have an electrode 4017 formed over an insulating layer 4111. The electrode 4017 can function as a backgate electrode.

[0177] 16A and 16B also include a capacitor 4020. The capacitor 4020 includes an electrode 4021 formed in the same process as the gate electrode of the transistor 4010, and electrodes formed in the same process as the source electrode and the drain electrode of the transistor 4010. The electrodes overlap with each other with an insulating layer 4103 interposed therebetween.

[0178] In general, the capacitance of a capacitor provided in a pixel portion of a display device is set so that a charge can be held for a predetermined period in consideration of a leakage current of a transistor disposed in the pixel portion, etc. The capacitance of the capacitor may be set in consideration of an off-current of the transistor, etc.

[0179] A transistor 4010 provided in the display portion 215 is electrically connected to a display element. FIG. 16A shows an example of a liquid crystal display device using a liquid crystal element as a display element. In FIG. 16A, a liquid crystal element 4013 serving as a display element includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033 functioning as alignment films are provided to sandwich the liquid crystal layer 4008. The second electrode layer 4031 is provided on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 overlap with each other with the liquid crystal layer 4008 interposed therebetween.

[0180] A liquid crystal element to which various modes are applied can be used as the liquid crystal element 4013. For example, a liquid crystal element to which a VA (Vertical Alignment) mode, a TN (Twisted Nematic) mode, an IPS (In-Plane-Switching) mode, an ASM (Axially Symmetric aligned Micro-cell) mode, an OCB (Optically Compensated Bend) mode, an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (AntiFerroelectric Liquid Crystal) mode, an ECB (Electrically Controlled Birefringence) mode, a VA-IPS mode, a guest-host mode, or the like can be applied.

[0181] The liquid crystal display device shown in this embodiment may be a normally black type liquid crystal display device, for example, a transmissive type liquid crystal display device that employs a vertical alignment (VA) mode. As the vertical alignment mode, a multi-domain vertical alignment (MVA) mode, a patterned vertical alignment (PVA) mode, an advanced super view (ASV) mode, or the like may be used.

[0182] A liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of liquid crystal. The optical modulation action of liquid crystal is controlled by an electric field (including a horizontal electric field, a vertical electric field, or an oblique electric field) applied to the liquid crystal. As liquid crystals used in liquid crystal elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, polymer dispersed liquid crystals (PDLC: Polymer Dispersed Liquid Crystal), ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. These liquid crystal materials exhibit cholesteric phases, smectic phases, cubic phases, chiral nematic phases, isotropic phases, etc. depending on the conditions.

[0183] FIG. 16 shows an example of a liquid crystal display device having a vertical electric field type liquid crystal element, but a liquid crystal display device having a horizontal electric field type liquid crystal element can be applied to one embodiment of the present invention. When the horizontal electric field type is adopted, a liquid crystal exhibiting a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and is a phase that appears immediately before the cholesteric phase transitions to an isotropic phase when the temperature of a cholesteric liquid crystal is increased. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008 in order to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and exhibits optical isotropy. In addition, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent does not require an alignment treatment and has a small viewing angle dependency. In addition, since an alignment film is not required, a rubbing treatment is also not required, so that electrostatic breakdown caused by the rubbing treatment can be prevented, and defects or damage to the liquid crystal display device during the manufacturing process can be reduced.

[0184] The spacer 4035 is a columnar spacer obtained by selectively etching an insulating layer, and is provided to control the gap (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. Note that a spherical spacer may also be used.

[0185] In addition, optical members (optical substrates) such as a black matrix (light-shielding layer), a colored layer (color filter), a polarizing member, a phase difference member, and an anti-reflection member may be provided as necessary. For example, circularly polarized light produced by a polarizing substrate and a phase difference substrate may be used. In addition, a backlight, a sidelight, or the like may be used as the light source. In addition, a micro LED may be used as the backlight and the sidelight.

[0186] In the display device shown in FIG. 16A, a light-shielding layer 4132 , a coloring layer 4131 , and an insulating layer 4133 are provided between a second substrate 4006 and a second electrode layer 4031 .

[0187] Materials that can be used as the light-shielding layer include carbon black, titanium black, metals, metal oxides, and composite oxides containing solid solutions of multiple metal oxides. The light-shielding layer may be a film containing a resin material, or a thin film of an inorganic material such as a metal. In addition, a laminated film of films containing the material of the colored layer may be used for the light-shielding layer. For example, a laminated structure of a film containing a material used for a colored layer that transmits light of a certain color and a film containing a material used for a colored layer that transmits light of another color can be used. By using a common material for the colored layer and the light-shielding layer, it is possible to standardize the equipment and simplify the process, which is preferable.

[0188] Materials that can be used for the colored layer include metal materials, resin materials, resin materials containing pigments or dyes, etc. The light-shielding layer and the colored layer can be formed, for example, by using an inkjet method or the like.

[0189] 16A and 16B each have an insulating layer 4111 and an insulating layer 4104. Insulating layers that are less permeable to impurity elements are used as the insulating layer 4111 and the insulating layer 4104. By sandwiching a semiconductor layer of a transistor between the insulating layer 4111 and the insulating layer 4104, entry of impurities from the outside can be prevented.

[0190] Furthermore, a light-emitting element can be used as a display element included in a display device. For example, an EL element that utilizes electroluminescence can be used as the light-emitting element. The EL element has a layer (also called an "EL layer") containing a light-emitting compound between a pair of electrodes. When a potential difference larger than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side, and electrons are injected from the cathode side. The injected electrons and holes are recombined in the EL layer, and the light-emitting substance included in the EL layer emits light.

[0191] The EL element may be, for example, an organic EL element or an inorganic EL element. Note that an LED (including a micro LED) that uses a compound semiconductor as a light-emitting material is also one type of EL element, and an LED may also be used.

[0192] In organic EL elements, when a voltage is applied, electrons are injected from one electrode and holes are injected from the other electrode into the EL layer. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state, and light is emitted when the excited state returns to the ground state. Due to this mechanism, such light-emitting elements are called current-excited light-emitting elements.

[0193] In addition to the light-emitting compound, the EL layer may contain a substance with high hole injection properties, a substance with high hole transport properties, a hole blocking material, a substance with high electron transport properties, a substance with high electron injection properties, a bipolar substance (a substance with high electron transport properties and high hole transport properties), or the like.

[0194] The EL layer can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0195] Inorganic EL elements are classified into dispersion-type inorganic EL elements and thin-film inorganic EL elements according to the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination-type light emission that utilizes donor and acceptor levels. Thin-film inorganic EL elements have a structure in which a light-emitting layer is sandwiched between dielectric layers, which are further sandwiched between electrodes, and the light-emitting mechanism is localized light emission that utilizes inner-shell electron transitions of metal ions. Note that the following description will be given using an organic EL element as the light-emitting element.

[0196] The light-emitting element only needs to have at least one of a pair of electrodes transparent in order to extract light emission. The transistor and light-emitting element are formed on a substrate, and light-emitting elements may have a top emission structure in which light emission is extracted from the surface opposite the substrate, a bottom emission structure in which light emission is extracted from the surface on the substrate side, or a dual emission structure in which light emission is extracted from both sides, and any light-emitting element with any emission structure may be used.

[0197] 16B is an example of a light-emitting display device using a light-emitting element as a display element (also referred to as an "EL display device"). A light-emitting element 4513 which is a display element is electrically connected to a transistor 4010 provided in the display portion 215. Note that the structure of the light-emitting element 4513 is a stacked structure of a first electrode layer 4030, a light-emitting layer 4511, and a second electrode layer 4031, but is not limited to this structure. The structure of the light-emitting element 4513 can be changed as appropriate according to the direction of light extracted from the light-emitting element 4513, or the like.

[0198] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. In particular, it is preferable to form an opening on the first electrode layer 4030 using a photosensitive resin material so that the side surface of the opening becomes an inclined surface having a continuous curvature.

[0199] The light-emitting layer 4511 may be either a single layer or a laminate of a plurality of layers.

[0200] The light emitting element 4513 can emit light of any color, such as white, red, green, blue, cyan, magenta, or yellow, depending on the material that constitutes the light emitting layer 4511 .

[0201] There are two methods for achieving color display: a method of combining a light-emitting element 4513 that emits white light with a colored layer, and a method of providing light-emitting elements 4513 that emit different colors for each pixel. The former method has higher productivity than the latter method. On the other hand, the latter method requires a different light-emitting layer 4511 to be produced for each pixel, and therefore has lower productivity than the former method. However, the latter method can obtain an emitted light color with higher color purity than the former method. In addition to the latter method, the color purity can be further improved by providing a microcavity structure to the light-emitting element 4513.

[0202] The light-emitting layer 4511 may contain an inorganic compound such as quantum dots. For example, quantum dots can be used in the light-emitting layer to function as a light-emitting material.

[0203] A protective layer may be formed over the second electrode layer 4031 and the partition wall 4510 to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513. As the protective layer, silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, DLC (diamond like carbon), or the like can be formed. A filler 4514 is provided in the space sealed by the first substrate 4001, the second substrate 4006, and the sealant 4005 to seal the space. In this way, it is preferable to package (enclose) the light-emitting element 4513 with a protective film (such as a lamination film or an ultraviolet curing resin film) or a cover material that is highly airtight and has little degassing so as not to be exposed to the outside air.

[0204] In addition to inert gas such as nitrogen or argon, ultraviolet curing resin or thermosetting resin can be used as the filler 4514, and PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral), EVA (ethylene vinyl acetate), etc. can be used. Also, the filler 4514 may contain a desiccant.

[0205] The sealant 4005 can be made of a glass material such as glass frit, a resin material such as a two-liquid mixed resin that hardens at room temperature, a photocurable resin, or a thermosetting resin. The sealant 4005 may also contain a desiccant.

[0206] If necessary, an optical film such as a polarizing plate, a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), or a color filter may be provided on the light-emitting surface of the light-emitting element. An anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. For example, an anti-glare treatment may be applied to the surface to diffuse reflected light and reduce glare by using unevenness on the surface.

[0207] In addition, by making the light-emitting element have a microcavity structure, it is possible to extract light with high color purity. Furthermore, by combining the microcavity structure with a color filter, it is possible to reduce glare and improve the visibility of the displayed image.

[0208] In the first electrode layer and the second electrode layer (also called a pixel electrode layer, a common electrode layer, a counter electrode layer, etc.) that apply a voltage to the display element, the light transmittance and reflectivity can be selected depending on the direction of the extracted light, the location where the electrode layer is provided, and the pattern structure of the electrode layer.

[0209] The first electrode layer 4030 and the second electrode layer 4031 can be formed using a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide has been added.

[0210] In addition, the first electrode layer 4030 and the second electrode layer 4031 can be formed using one or more metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), or alloys thereof, or metal nitrides thereof.

[0211] The first electrode layer 4030 and the second electrode layer 4031 can be formed using a conductive composition containing a conductive macromolecule (also referred to as a conductive polymer). As the conductive macromolecule, a so-called π-electron conjugated conductive macromolecule can be used. For example, polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, or a copolymer of two or more of aniline, pyrrole, and thiophene or a derivative thereof can be used.

[0212] In addition, since a transistor is easily damaged by static electricity, etc., it is preferable to provide a protection circuit for protecting the driver circuit. The protection circuit is preferably configured using a nonlinear element.

[0213] As shown in Fig. 17, a stack structure may be used in which transistors and capacitors overlap in the height direction. For example, a transistor 4011 and a transistor 4022 that constitute a driver circuit may be arranged to overlap with each other, thereby making it possible to provide a display device with a narrow frame. Furthermore, an aperture ratio and a resolution can be improved by arranging a transistor 4010, a transistor 4023, a capacitor 4020, and the like that constitute a pixel circuit so as to have at least a partial overlapping region. Although Fig. 17 shows an example in which a stack structure is applied to the liquid crystal display device shown in Fig. 16(A), the stack structure may also be applied to the EL display device shown in Fig. 16(B).

[0214] In addition, in a pixel circuit, by using a light-transmitting conductive film having high light-transmitting properties for electrodes and wirings, the transmittance of light in the pixel can be increased, and the aperture ratio can be substantially improved. Note that, when an OS transistor is used, the semiconductor layer also has light-transmitting properties, so that the aperture ratio can be further increased. These are also effective in cases where the transistors and the like are not formed into a stack structure.

[0215] A display device may also be constructed by combining a liquid crystal display device and a light emitting device.

[0216] The light-emitting device is disposed on the opposite side of the display surface or at the end of the display surface. The light-emitting device has a function of supplying light to the display element. The light-emitting device can also be called a backlight.

[0217] Here, the light-emitting device can have a plate- or sheet-shaped light-guiding section (also called a light-guiding plate) and a number of light-emitting elements that emit light of different colors. When the light-emitting elements are arranged near the side of the light-guiding section, light can be emitted from the side of the light-guiding section to the inside. The light-guiding section has a mechanism for changing the light path (also called a light extraction mechanism), which allows the light-emitting device to uniformly irradiate light to the pixel section of the display panel. Alternatively, a configuration may be adopted in which the light-emitting device is arranged directly under the pixel without providing a light-guiding section.

[0218] The light emitting device preferably has light emitting elements of three colors, red (R), green (G), and blue (B). It may also have a white (W) light emitting element. It is preferable to use light emitting diodes (LEDs) as these light emitting elements.

[0219] Furthermore, the light-emitting element is preferably a light-emitting element having extremely high color purity, with the full width at half maximum (FWHM) of its emission spectrum being 50 nm or less, preferably 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. The smaller the full width at half maximum of the emission spectrum, the better, but it can be, for example, 1 nm or more. This allows for a vivid display with high color reproducibility when performing color display.

[0220] The red light emitting element preferably has an emission spectrum having a peak wavelength in the range of 625 nm to 650 nm, the green light emitting element preferably has an emission spectrum having a peak wavelength in the range of 515 nm to 540 nm, and the blue light emitting element preferably has an emission spectrum having a peak wavelength in the range of 445 nm to 470 nm.

[0221] The display device sequentially blinks the three color light emitting elements and drives the pixels in synchronization with the blinking to display colors based on the time-sequential additive color mixing method, which can also be called field sequential driving.

[0222] Field sequential driving can display vivid color images. It can also display smooth moving images. By using the above driving method, it is not necessary to configure one pixel with multiple sub-pixels of different colors, and the effective reflection area (also called effective display area or aperture ratio) of one pixel can be increased, resulting in a bright display. Furthermore, since it is not necessary to provide a color filter in the pixel, it is possible to improve the transmittance of the pixel, resulting in an even brighter display. It can also simplify the manufacturing process and reduce manufacturing costs.

[0223] 18(A) and (B) are examples of schematic cross-sectional views of a display device capable of field sequential driving. A backlight unit capable of emitting RGB colors is provided on the first substrate 4001 side of the display device. Note that in field sequential driving, since colors are expressed by time-division emission of RGB colors, color filters are not required.

[0224] 18A has a structure in which a plurality of light-emitting elements 4342 are provided directly under pixels via a diffusion plate 4352. The diffusion plate 4352 has a function of diffusing light emitted from the light-emitting elements 4342 toward the first substrate 4001 to uniformize luminance within the display surface. A polarizing plate may be provided between the light-emitting elements 4342 and the diffusion plate 4352 as necessary. The diffusion plate 4352 does not have to be provided if it is not necessary. The light-shielding layer 4132 may be omitted.

[0225] The backlight unit 4340a can provide a bright display because it can accommodate many light-emitting elements 4342. In addition, there is an advantage that a light guide plate is not required and the light efficiency of the light-emitting elements 4342 is not easily impaired. Note that the light-emitting elements 4342 may be provided with a lens 4344 for diffusing light, if necessary.

[0226] 18B has a configuration in which a light guide plate 4341 is provided directly under pixels via a diffusion plate 4352. A plurality of light emitting elements 4342 are provided at an end of the light guide plate 4341. The light guide plate 4341 has an uneven shape on the side opposite to the diffusion plate 4352, and can scatter guided light by the uneven shape and emit it in the direction of the diffusion plate 4352.

[0227] The light emitting elements 4342 can be fixed to a printed circuit board 4347. Although the light emitting elements 4342 of each color of R, G, and B are illustrated as overlapping in Fig. 18B, the light emitting elements 4342 of each color of R, G, and B can also be arranged side by side in the depth direction. In addition, a reflective layer 4348 that reflects visible light may be provided on the side surface of the light guide plate 4341 opposite to the light emitting elements 4342.

[0228] The backlight unit 4340b can have a small number of light-emitting elements 4342, and therefore can be made low-cost and thin.

[0229] The liquid crystal element may be a light scattering type liquid crystal element. As the light scattering type liquid crystal element, it is preferable to use an element having a composite material of liquid crystal and polymer. For example, a polymer dispersion type liquid crystal element may be used. Alternatively, a polymer network type liquid crystal (PNLC (Polymer Network Liquid Crystal)) element may be used.

[0230] The light scattering type liquid crystal element has a structure in which a liquid crystal portion is provided in a three-dimensional network structure of a resin portion sandwiched between a pair of electrodes. For example, nematic liquid crystal can be used as a material for the liquid crystal portion. Also, a photocurable resin can be used as the resin portion. For example, the photocurable resin can be a monofunctional monomer such as acrylate or methacrylate, a polyfunctional monomer such as diacrylate, triacrylate, dimethacrylate, trimethacrylate, or a polymerizable compound obtained by mixing these.

[0231] A light-scattering liquid crystal element uses the anisotropy of the refractive index of the liquid crystal material to transmit or scatter light, thereby performing display. The resin part may also have anisotropy of the refractive index. When the liquid crystal molecules are aligned in a certain direction according to the voltage applied to the light-scattering liquid crystal element, a direction is generated in which the difference in the refractive index between the liquid crystal part and the resin part becomes small, and light incident along this direction is transmitted without being scattered by the liquid crystal part. Therefore, the light-scattering liquid crystal element is viewed as being transparent from this direction. On the other hand, when the alignment of the liquid crystal molecules becomes random according to the applied voltage, there is no significant change in the difference in the refractive index between the liquid crystal part and the resin part, so the incident light is scattered by the liquid crystal part. Therefore, the light-scattering liquid crystal element is in an opaque state regardless of the viewing direction.

[0232] 19(A) shows a configuration in which the liquid crystal element 4013 of the display device in FIG. 18(A) is replaced with a light-scattering type liquid crystal element 4016. The light-scattering type liquid crystal element 4016 has a composite layer 4009 having a liquid crystal portion and a resin portion, a first electrode layer 4030, and a second electrode layer 4031. The elements related to the field sequential driving are the same as those in FIG. 18(A), but when the light-scattering type liquid crystal element 4016 is used, the alignment film and the polarizing plate are not required. Note that the spacer 4035 is illustrated in a spherical form, but may be columnar.

[0233] Fig. 19(B) shows a configuration in which the liquid crystal element 4013 of the display device in Fig. 18(B) is replaced with a light-scattering type liquid crystal element 4016. In the configuration in Fig. 18(B), it is preferable that the light-scattering type liquid crystal element 4016 is configured to transmit light when no voltage is applied thereto, and to operate in a mode in which the light is scattered when a voltage is applied thereto. With this configuration, a display device that is transparent in a normal state (a state in which no display is made) can be obtained. In this case, color display can be made when the light-scattering operation is performed.

[0234] Modified examples of the display device shown in Fig. 19(B) are shown in Fig. 20(A) to (E). Note that in Fig. 20(A) to (E), for clarity, some elements of Fig. 19(B) are used and other elements are omitted.

[0235] 20A shows a structure in which a first substrate 4001 functions as a light guide plate. An uneven shape may be provided on the outer surface of the first substrate 4001. In this structure, it is not necessary to provide a separate light guide plate, and therefore manufacturing costs can be reduced. In addition, since there is no attenuation of light due to the light guide plate, light emitted from the light-emitting element 4342 can be efficiently used.

[0236] 20(B) shows a configuration in which light is incident from the vicinity of an end of the composite layer 4009. Light can be emitted to the outside from the light-scattering liquid crystal element by utilizing total reflection at the interface between the composite layer 4009 and the second substrate 4006 and at the interface between the composite layer 4009 and the first substrate 4001. For the resin part of the composite layer 4009, a material having a higher refractive index than the first substrate 4001 and the second substrate 4006 is used.

[0237] Note that the light-emitting element 4342 may be provided not only on one side of the display device, but also on two opposing sides as shown in Fig. 20C. Furthermore, it may be provided on three or four sides. By providing the light-emitting element 4342 on a plurality of sides, attenuation of light can be compensated for, and a large-area display element can also be used.

[0238] 20D shows a structure in which light emitted from a light-emitting element 4342 is guided to a display device via a mirror 4345. This structure makes it easier to guide light to the display device from a certain angle, and therefore, total internal reflection can be efficiently achieved.

[0239] 20(E) shows a structure having a laminate of layers 4003 and 4004 on a composite layer 4009. One of layers 4003 and 4004 is a support such as a glass substrate, and the other can be formed of an inorganic film, an organic resin coating film, or a film. A material having a higher refractive index than layer 4004 is used for the resin portion of composite layer 4009. Also, a material having a higher refractive index than layer 4003 is used for layer 4004.

[0240] A first interface is formed between the composite layer 4009 and the layer 4004, and a second interface is formed between the layer 4004 and the layer 4003. With this configuration, light that is not totally reflected at the first interface and passes through can be totally reflected at the second interface and returned to the composite layer 4009. Therefore, the light emitted by the light emitting element 4342 can be efficiently utilized.

[0241] It should be noted that the configurations in FIG. 19(B) and FIGS. 20(A) to (E) can be combined with each other.

[0242] This embodiment mode can be implemented in appropriate combination with structures described in other embodiment modes.

[0243] (Embodiment 3) In this embodiment, examples of transistors that can be used in place of the transistors described in the above embodiment will be described with reference to the drawings.

[0244] The display device of one embodiment of the present invention can be manufactured using transistors of various types such as bottom-gate transistors and top-gate transistors, etc. Therefore, the material of the semiconductor layer and the transistor structure to be used can be easily replaced in accordance with an existing manufacturing line.

[0245] [Bottom-gate transistor] 21A1 is a cross-sectional view in the channel length direction of a channel protective transistor 810, which is a type of bottom-gate transistor. In FIG. 21A1, the transistor 810 is formed over a substrate 771. The transistor 810 has an electrode 746 over the substrate 771 with an insulating layer 772 interposed therebetween. The transistor 810 also has a semiconductor layer 742 over the electrode 746 with an insulating layer 726 interposed therebetween. The electrode 746 can function as a gate electrode. The insulating layer 726 can function as a gate insulating layer.

[0246] The semiconductor layer 742 further includes an insulating layer 741 over a channel formation region of the semiconductor layer 742. An electrode 744a and an electrode 744b are provided over the insulating layer 726 in contact with part of the semiconductor layer 742. The electrode 744a can function as one of a source electrode and a drain electrode. The electrode 744b can function as the other of the source electrode and the drain electrode. Part of the electrode 744a and part of the electrode 744b are formed over the insulating layer 741.

[0247] The insulating layer 741 can function as a channel protective layer. Providing the insulating layer 741 over the channel formation region can prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. Thus, the channel formation region of the semiconductor layer 742 can be prevented from being etched when the electrodes 744a and 744b are formed. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be provided.

[0248] The transistor 810 further includes an insulating layer 728 over the electrode 744 a, the electrode 744 b, and the insulating layer 741 , and an insulating layer 729 over the insulating layer 728 .

[0249] When an oxide semiconductor is used for the semiconductor layer 742, it is preferable to use a material capable of removing oxygen from a part of the semiconductor layer 742 and generating oxygen vacancies for at least the portions of the electrodes 744a and 744b in contact with the semiconductor layer 742. The carrier concentration increases in the region in the semiconductor layer 742 where oxygen vacancies are generated, and the region becomes n-type, and becomes an n-type region (n + Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, examples of a material that can remove oxygen from the semiconductor layer 742 and cause oxygen vacancies include tungsten, titanium, and the like.

[0250] The source and drain regions are formed in the semiconductor layer 742, whereby the contact resistance between the electrodes 744a and the semiconductor layer 742 and between the electrodes 744b and the semiconductor layer 742 can be reduced. As a result, the electrical characteristics of the transistor, such as the field-effect mobility and the threshold voltage, can be improved.

[0251] When a semiconductor such as silicon is used for the semiconductor layer 742, a layer functioning as an n-type semiconductor or a p-type semiconductor is preferably provided between the semiconductor layer 742 and the electrode 744a and between the semiconductor layer 742 and the electrode 744b. The layer functioning as an n-type semiconductor or a p-type semiconductor can function as a source region or a drain region of a transistor.

[0252] The insulating layer 729 is preferably formed using a material that has a function of preventing or reducing diffusion of impurities from the outside into the transistor. Note that the insulating layer 729 can be omitted as necessary.

[0253] 21A2 differs from the transistor 810 in that an electrode 723 that can function as a backgate electrode is provided over an insulating layer 729. The electrode 723 can be formed using a material and a method similar to those of the electrode 746.

[0254] In general, the backgate electrode is formed of a conductive layer and is arranged so that the gate electrode and the backgate electrode sandwich the channel formation region of the semiconductor layer. Therefore, the backgate electrode can function in the same manner as the gate electrode. The potential of the backgate electrode may be the same as that of the gate electrode, or may be the ground potential (GND potential) or any other potential. In addition, the threshold voltage of the transistor can be changed by changing the potential of the backgate electrode independently of the gate electrode.

[0255] The electrode 746 and the electrode 723 can both function as gate electrodes. Thus, the insulating layers 726, 728, and 729 can each function as a gate insulating layer. Note that the electrode 723 may be provided between the insulating layers 728 and 729.

[0256] Note that when one of the electrode 746 or the electrode 723 is referred to as a "gate electrode," the other is referred to as a "back gate electrode." For example, when the electrode 723 of the transistor 811 is referred to as a "gate electrode," the electrode 746 is referred to as a "back gate electrode." When the electrode 723 is used as a "gate electrode," the transistor 811 can be considered as a type of top-gate transistor. Furthermore, one of the electrode 746 or the electrode 723 may be referred to as a "first gate electrode," and the other may be referred to as a "second gate electrode."

[0257] By providing the electrode 746 and the electrode 723 with the semiconductor layer 742 therebetween and further by making the electrode 746 and the electrode 723 have the same potential, the region through which carriers flow in the semiconductor layer 742 becomes larger in the film thickness direction, and the amount of carrier movement increases. As a result, the on-state current of the transistor 811 becomes larger and the field-effect mobility becomes higher.

[0258] Therefore, the transistor 811 has a large on-state current relative to the area it occupies. That is, the area occupied by the transistor 811 can be made small relative to the required on-state current. According to one embodiment of the present invention, the area occupied by the transistor can be made small. Thus, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized.

[0259] In addition, since the gate electrode and the back gate electrode are formed of a conductive layer, they have a function of preventing an electric field generated outside the transistor from acting on the semiconductor layer in which the channel is formed (particularly, an electric field shielding function against static electricity, etc.) Note that the electric field shielding function can be improved by forming the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode.

[0260] In addition, by forming the back gate electrode using a conductive film having a light-shielding property, it is possible to prevent light from entering the semiconductor layer from the back gate electrode side, thereby preventing photodegradation of the semiconductor layer and deterioration of electrical characteristics such as a shift in the threshold voltage of the transistor.

[0261] According to one embodiment of the present invention, a highly reliable transistor and a highly reliable semiconductor device can be provided.

[0262] 21B1 is a cross-sectional view in the channel length direction of a channel-protective transistor 820 having a different structure from that in FIG. 21A1. The transistor 820 has a structure similar to that of the transistor 810, but is different in that an insulating layer 741 covers an end portion of a semiconductor layer 742. In addition, the semiconductor layer 742 and an electrode 744a are electrically connected to each other in an opening formed by selectively removing a part of the insulating layer 741 that overlaps with the semiconductor layer 742. In addition, the semiconductor layer 742 and an electrode 744b are electrically connected to each other in another opening formed by selectively removing a part of the insulating layer 741 that overlaps with the semiconductor layer 742. A region of the insulating layer 729 that overlaps with a channel formation region can function as a channel protective layer.

[0263] A transistor 821 in FIG. 21B2 differs from the transistor 820 in that an electrode 723 which can function as a backgate electrode is provided over an insulating layer 729.

[0264] The insulating layer 741 can prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. Thus, the semiconductor layer 742 can be prevented from being thinned when the electrodes 744a and 744b are formed.

[0265] In addition, in the transistors 820 and 821, the distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 746 are longer than in the transistors 810 and 811. Thus, the parasitic capacitance generated between the electrode 744a and the electrode 746 can be reduced. In addition, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be provided.

[0266] 21C1 is a cross-sectional view in the channel length direction of a channel-etched transistor 825, which is one of bottom-gate transistors. In the transistor 825, the electrode 744a and the electrode 744b are formed without using the insulating layer 741. Therefore, part of the semiconductor layer 742 that is exposed when the electrode 744a and the electrode 744b are formed may be etched. On the other hand, since the insulating layer 741 is not provided, productivity of the transistor can be improved.

[0267] A transistor 826 illustrated in FIG. 21C2 differs from the transistor 825 in that an electrode 723 which can function as a backgate electrode is provided over an insulating layer 729.

[0268] 22A1 to 22C2 are cross-sectional views of transistors 810, 811, 820, 821, 825, and 826 in the channel width direction, respectively.

[0269] 22B2 and 22C2, the gate electrode and the back gate electrode are connected to each other, and the gate electrode and the back gate electrode have the same potential. Also, the semiconductor layer 742 is sandwiched between the gate electrode and the back gate electrode.

[0270] The length in the channel width direction of each of the gate electrode and the back gate electrode is longer than the length in the channel width direction of the semiconductor layer 742, and the entire channel width direction of the semiconductor layer 742 is covered by the gate electrode or the back gate electrode with insulating layers 726, 741, 728, and 729 sandwiched therebetween.

[0271] With this structure, the semiconductor layer 742 included in the transistor can be electrically surrounded by the electric fields of the gate electrode and the backgate electrode.

[0272] A device structure of a transistor in which the semiconductor layer 742 in which a channel formation region is formed is electrically surrounded by the electric field of the gate electrode and the backgate electrode, like the transistor 821 or 826, can be called a surrounded channel (S-channel) structure.

[0273] By adopting the S-channel structure, an electric field for inducing a channel can be effectively applied to the semiconductor layer 742 by one or both of the gate electrode and the back gate electrode, so that the current drive capability of the transistor is improved and high on-current characteristics can be obtained. In addition, since the on-current can be increased, the transistor can be miniaturized. In addition, by adopting the S-channel structure, the mechanical strength of the transistor can be increased.

[0274] [Top-gate transistor] 23A1 is a top-gate transistor. The electrodes 744a and 744b are electrically connected to the semiconductor layer 742 in openings formed in the insulating layers 728 and 729.

[0275] Also, by removing a part of the insulating layer 726 that does not overlap with the electrode 746 and introducing an impurity into the semiconductor layer 742 using the electrode 746 and the remaining insulating layer 726 as a mask, an impurity region can be formed in a self-aligned manner in the semiconductor layer 742. The transistor 842 has a region in which the insulating layer 726 extends beyond the end of the electrode 746. The impurity concentration in the region of the semiconductor layer 742 into which the impurity is introduced via the insulating layer 726 is lower than that in the region into which the impurity is introduced without via the insulating layer 726. Thus, an LDD (Lightly Doped Drain) region is formed in the region of the semiconductor layer 742 that overlaps with the insulating layer 726 but does not overlap with the electrode 746.

[0276] 23A2 differs from the transistor 842 in that it includes an electrode 723. The transistor 843 includes the electrode 723 formed over a substrate 771. The electrode 723 has a region that overlaps with the semiconductor layer 742 with an insulating layer 772 interposed therebetween. The electrode 723 can function as a backgate electrode.

[0277] 23B1 and a transistor 845 shown in FIG 23B2, the insulating layer 726 may be entirely removed from a region that does not overlap with the electrode 746. Alternatively, the insulating layer 726 may be left as in a transistor 846 shown in FIG 23C1 and a transistor 847 shown in FIG 23C2.

[0278] In the transistors 842 to 847, after the electrode 746 is formed, impurities are introduced into the semiconductor layer 742 using the electrode 746 as a mask, so that an impurity region can be formed in a self-aligned manner in the semiconductor layer 742. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be realized. According to another embodiment of the present invention, a semiconductor device with high integration density can be realized.

[0279] 24A1 to 24C2 are cross-sectional views of transistors 842, 843, 844, 845, 846, and 847 in the channel width direction, respectively.

[0280] The transistors 843, 845, and 847 each have the S-channel structure described above. However, this is not limiting, and the transistors 843, 845, and 847 do not necessarily have to have the S-channel structure.

[0281] This embodiment mode can be implemented in appropriate combination with structures described in other embodiment modes.

[0282] (Embodiment 4) Examples of electronic devices that can use the display device according to one embodiment of the present invention include display devices, personal computers, image storage devices or image playback devices equipped with a recording medium, mobile phones, game machines including portable types, portable data terminals, electronic book terminals, cameras such as video cameras and digital still cameras, goggle-type displays (head-mounted displays), navigation systems, audio playback devices (car audio, digital audio players, etc.), copiers, facsimiles, printers, printer-combined machines, automated teller machines (ATMs), vending machines, etc. Specific examples of these electronic devices are shown in FIG.

[0283] 25A shows a digital camera, which includes a housing 961, a shutter button 962, a microphone 963, a speaker 967, a display portion 965, operation keys 966, a zoom lever 968, a lens 969, and the like. By using the display device of one embodiment of the present invention for the display portion 965, various images can be displayed.

[0284] 25B shows a digital signage having a large display area 922. For example, the digital signage is attached to the side surface of a pillar 921. By using the display device of one embodiment of the present invention for the display area 922, display with high display quality can be performed.

[0285] 25C shows an example of a mobile phone, which includes a housing 951, a display portion 952, operation buttons 953, an external connection port 954, a speaker 955, a microphone 956, a camera 957, and the like. The mobile phone includes a touch sensor in the display portion 952. Any operation, such as making a call or inputting text, can be performed by touching the display portion 952 with a finger, a stylus, or the like. The housing 951 and the display portion 952 are flexible and can be folded as shown in the figure when used. By using a display device of one embodiment of the present invention for the display portion 952, various images can be displayed.

[0286] 25D shows a video camera, which includes a first housing 901, a second housing 902, a display portion 903, operation keys 904, a lens 905, a connection portion 906, a speaker 907, and the like. The operation keys 904 and the lens 905 are provided in the first housing 901, and the display portion 903 is provided in the second housing 902. By using the display device of one embodiment of the present invention for the display portion 903, various images can be displayed.

[0287] 25E shows a television including a housing 971, a display portion 973, operation keys 974, a speaker 975, a communication connection terminal 976, an optical sensor 977, and the like. A touch sensor is provided in the display portion 973, and an input operation can also be performed. By using the display device of one embodiment of the present invention for the display portion 973, various images can be displayed.

[0288] 25F shows a portable data terminal, which includes a housing 911, a display portion 912, a speaker 913, a camera 919, and the like. Information can be input and output through a touch panel included in the display portion 912. By using the display device of one embodiment of the present invention for the display portion 912, various images can be displayed.

[0289] This embodiment mode can be implemented in appropriate combination with structures described in other embodiment modes. [Explanation of symbols]

[0290] 10: pixel, 11: circuit, 11a: circuit, 11b: circuit, 12: source driver, 12a: source driver, 12b: source driver, 13: gate driver, 15: display area, 16: selection circuit, 101: transistor, 102: transistor, 103: transistor, 104: capacitance element, 105: transistor, 106: capacitance element, 110: circuit block, 111: transistor, 112: transistor, 113: capacitance element, 114: light-emitting element, 115: transistor, 116: capacitance element, 117: liquid crystal element, 118: transistor, 119: transistor sta, 120: circuit, 121: wiring, 121a: wiring, 121b: wiring, 122: wiring, 122a: wiring, 122b: wiring, 123: wiring, 124: wiring, 125: wiring, 127: wiring, 128: wiring, 129: wiring, 130: wiring, 131: wiring, 132: wiring, 133: wiring, 134: wiring, 135: wiring, 136: pixel pitch, 138: wiring, 215: display unit, 221a: scanning line driving circuit, 231a: signal line driving circuit, 232a: signal line driving circuit, 241a: common line driving circuit, 723: electrode, 724a: electrode, 724b: electrode, 726: insulating layer, 72 8: insulating layer, 729: insulating layer, 741: insulating layer, 742: semiconductor layer, 744a: electrode, 744b: electrode, 746: electrode, 771: substrate, 772: insulating layer, 810: transistor, 811: transistor, 820: transistor, 821: transistor, 825: transistor, 826: transistor, 842: transistor, 843: transistor, 844: transistor, 845: transistor, 846: transistor, 847: transistor, 901: housing, 902: housing, 903: display unit, 904: operation key, 905: lens, 906: connection unit, 90 7: speaker, 911: housing, 912: display unit, 913: speaker, 919: camera, 921: pillar, 922: display unit, 951: housing, 952: display unit, 953: operation button, 954: external connection port, 955: speaker, 956: microphone, 957: camera, 961: housing, 962: shutter button, 963: microphone, 965: display unit, 966: operation key, 967: speaker, 968: zoom lever, 969: lens, 971: housing, 973: display unit, 974: operation key, 975: speaker, 976: communication connection terminal, 977: optical sensor, 4001: board,4003: layer, 4004: layer, 4005: sealing material, 4006: substrate, 4008: liquid crystal layer, 4009: composite layer, 4010: transistor, 4011: transistor, 4013: liquid crystal element, 4014: wiring, 4015: electrode, 4016: light scattering type liquid crystal element, 4017: electrode, 4018: FPC, 4019: anisotropic conductive layer, 4020: capacitance element, 4021: electrode, 4022: transistor, 4023: transistor, 4030: electrode layer, 4031: electrode layer, 4032: insulating layer, 4033: insulating layer, 4035: spacer, 4041: printed circuit board, 4042: integrated circuit, 4102: insulating layer, 4103: insulating layer, 4104: insulating layer, 4110: insulating layer, 4111: insulating layer, 4112: insulating layer, 4131: colored layer, 4132: light shielding layer, 4133: insulating layer, 4200: input device, 4210: touch panel, 4227: electrode, 4228: electrode, 4237: wiring, 4238: wiring, 4239: wiring, 4263: substrate, 4272b: FPC, 4273b: IC, 4340a: backlight unit, 4340b: backlight unit, 4341: light guide plate, 4342: light emitting element, 4344: lens, 4345: mirror, 4347: printed circuit board, 4348: reflective layer, 4352: diffusion plate, 4510: partition wall, 4511: light emitting layer, 4513: light emitting element, 4514: filling material,

Claims

[Claim 1] A display device having a first pixel, a second pixel, a first source driver, a second source driver, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitance element, a second capacitance element, a first wiring, and a second wiring, the first to sixth transistors are provided outside a display area, the first capacitive element, the second capacitive element, the first pixel, and the second pixel are provided in a display region; the first pixel includes a seventh transistor; the second pixel includes an eighth transistor; one electrode of the first capacitance element is electrically connected to one electrode of the second capacitance element; the other electrode of the first capacitance element is electrically connected to the other electrode of the second capacitance element; the other electrode of the first capacitance element is electrically connected to one of the source and the drain of the seventh transistor; the other electrode of the second capacitance element is electrically connected to one of the source and the drain of the eighth transistor; one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the seventh transistor and one electrode of the first capacitance element; the other of the source and the drain of the first transistor is electrically connected to the first source driver; the other electrode of the first capacitance element is electrically connected to one of a source or a drain of the second transistor and one of a source or a drain of the third transistor; the other of the source and the drain of the third transistor is electrically connected to the first wiring; the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the second transistor; one of a source and a drain of the fourth transistor is electrically connected to one of a source and a drain of the eighth transistor and one electrode of the first capacitance element; the other of the source and the drain of the fourth transistor is electrically connected to the second source driver; the other electrode of the first capacitance element is electrically connected to one of a source or a drain of the fifth transistor and one of a source or a drain of the sixth transistor; the other of the source and the drain of the sixth transistor is electrically connected to the second wiring; the other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the fifth transistor.

Images