Indicating device
The pixel configuration with a transistor, holding capacitors, and switches effectively addresses the issue of threshold voltage variations in display devices, achieving low power consumption, uniform luminance, and reduced risk of screen burn-in.
Patent Information
- Application Number
- JP2024129042
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2006-10-26
- Filing Date
- 2024-08-05
- Publication Date
- 2025-06-13
- Estimated Expiration
- 2027-10-25
AI Technical Summary
Existing display devices with light-emitting elements face issues of high power consumption and luminance non-uniformity due to variations in the threshold voltage of transistors, leading to low duty ratio and increased risk of screen burn-in.
A pixel configuration that includes a transistor, a first holding capacitor, a second holding capacitor, and first to fourth switches, where the threshold voltage of the transistor is held in the second holding capacitor, and a potential corresponding to a video signal is input to the pixel, allowing for the suppression of current variations caused by threshold voltage fluctuations.
This configuration enables the supply of a desired current to light-emitting elements, reducing luminance deviations and achieving a display device with low power consumption and high brightness, along with improved reliability by minimizing screen burn-in.
Smart Images

Figure 0007692519000009 
Figure 0007692519000010 
Figure 0007692519000011
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor device provided with a function of controlling a current supplied to a load by a transistor. The present invention also relates to a display device including pixels formed of a display element whose luminance changes according to a signal, and a signal line drive circuit and a scanning line drive circuit for driving the pixels. The present invention further relates to a driving method thereof. Furthermore, the present invention relates to an electronic device having the display device in a display unit.
Background Art
[0002] In recent years, self-emitting display devices using light-emitting elements such as electroluminescence (EL), so-called light-emitting devices, have attracted attention. As such light-emitting elements used in self-emitting display devices, organic light-emitting diodes (OLEDs) and EL elements have attracted attention and are being used in EL displays and the like. Since these light-emitting elements emit light by themselves, they have higher visibility of pixels than liquid crystal displays, do not require a backlight, and have advantages such as a high response speed. Note that the luminance of the light-emitting element is often controlled by the value of the current flowing through it. In addition, the development of an active matrix type display device in which a transistor for controlling the light emission of a light-emitting element is provided for each pixel has been advanced. The active matrix type display device enables high-definition display and large-screen display, which are difficult in a passive matrix type display device, and is expected to be put into practical use because it operates with lower power consumption than a passive matrix type display device.
[0003]
[0004] The pixel configuration of a conventional active matrix display device is shown in Fig. 62 (Patent Document 1). Fig. The pixel shown in Fig. 62 has a thin film transistor (TFT) 11, a TFT 12, a capacitive element 13, and a light emitting element 14, and is connected to a signal line 15 and a scanning line 16. Note that a power supply potential Vdd is supplied to either the source electrode or the drain electrode of the TFT 12 and one electrode of the capacitive element 13, and a ground potential is supplied to the counter electrode of the light emitting element 14. At this time, when amorphous silicon is used for the semiconductor layer of the TFT 12 that controls the current value supplied to the light emitting element, that is, the driving TFT, the threshold voltage (Vth) fluctuates due to deterioration or the like. In this case, although the same potential is applied from the signal line 15 to different pixels,
[0005] the current flowing through the light emitting element 14 differs for each pixel, and the displayed luminance becomes non-uniform depending on the pixel. Even when polysilicon is used for the semiconductor layer of the driving TFT, the characteristics of the transistor deteriorate or vary. To improve this problem, a method of operating using the pixel of Fig. 63 has been proposed in Patent Document 2. The pixel shown in Fig. 63 has a transistor 21, a driving transistor 22 that controls the current value supplied to the light emitting element 24, a capacitive element 23, and a light emitting element 24, and the pixel is connected to a signal line 25 and a scanning line 26. Note that the driving transistor 22 is an NMOS transistor
[0006] and a ground potential is supplied to either the source electrode or the drain electrode of the driving transistor 22, and Vca is supplied to the counter electrode of the light emitting element 24.
[0007] The timing chart in the operation of this pixel is shown in FIG. 64. In FIG. 64, one frame - The frame period is divided into an initialization period 31, a threshold voltage (Vth) write period 32, a data write - The period 33 and the light emission period 34. Note that one frame period corresponds to the period for displaying one screen of an image, and the initialization period, the threshold voltage (Vth) write period, and the data write - The period is collectively referred to as the address period.
[0008] First, in the threshold voltage write period 32, the threshold voltage of the driving transistor 22 is - Written into the capacitive element. Then, in the data write period 33, the data voltage (Vdata) indicating the luminance of the pixel is - Written into the capacitive element, and Vdata + Vth is - Accumulated in the capacitive element. And in the light emission period, the driving transistor 22 is turned on, and by changing Vca - The light emitting element 24 emits light with the luminance specified by the data voltage. By such an operation, the variation in luminance due to the variation in the threshold voltage of the driving transistor is reduced - Diminished.
[0009] Also in Patent Document 3, it is disclosed that the voltage obtained by adding the data potential to the threshold voltage of the driving TFT becomes the gate - Source voltage, and even when the threshold voltage of the TFT varies, the flowing current does not - Change. As described above, in the display device, it has been required to suppress the variation in the current value caused by the variation in the threshold voltage of the driving TFT.
Prior Art Documents
Patent Documents
[0010]
Patent Document 1
[0011] In any of the operation methods described in Patent Documents 2 and 3, the potential of Vca is changed several times per frame period to perform the above-described initialization, writing of the threshold voltage loading, and light emission. In these pixels, since one of the electrodes of the light-emitting element to which Vca is supplied, that is, the counter electrode, is formed over the entire pixel region, if there is even one pixel performing a data writing operation other than the initialization and writing of the threshold voltage loading, the light-emitting element cannot emit light. Therefore, as shown in FIG. 65, the ratio of the light emission period (i.e., the duty ratio) in one frame period becomes small. When the duty ratio is low, it is necessary to increase the current value flowing through the light-emitting element and the driving transistor, so the voltage applied to the light-emitting element increases and the power consumption increases. Also, since the light-emitting element and the driving transistor are likely to deteriorate, screen burn-in occurs, or more power is required to obtain the same brightness as before deterioration.
[0012] Since a low duty ratio requires increasing the current value flowing through the light-emitting element and the driving transistor, the voltage applied to the light-emitting element increases and the power consumption increases. Also, since the light-emitting element and the driving transistor are likely to deteriorate, screen burn-in occurs, or more power is required to obtain the same brightness as before deterioration.
[0013] In addition, since the counter electrode is connected to all pixels, the light-emitting element functions as an element with a large capacitance. Therefore, high power consumption is required to change the potential of the counter electrode.
[0014] In view of the above problems, an object of the present invention is to provide a display device with low power consumption and high brightness. is performed. Further, it is an object to obtain a pixel configuration, a semiconductor device, and a display device with little deviation from the luminance specified by the data potential. Note that not only a display device having a light-emitting element is targeted, and the present invention aims to suppress variations in current values caused by variations in the threshold voltage of a transistor. In addition, it is not the case that only a display device having a light-emitting element is targeted, and the present invention aims to suppress variations in current values caused by variations in the threshold voltage of a transistor.
Means for Solving the Problem
Means for Solving the Problem
[0015] One aspect of the present invention has a transistor, a holding capacitor, a first switch, a second switch, a third switch, and a fourth switch. One of the source electrode and the drain electrode of the transistor is electrically connected to a pixel electrode, and the other of the source electrode and the drain electrode of the transistor is electrically connected to a first wiring via the second switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the transistor via the third switch. One aspect of the present invention has a pixel including a transistor that controls the current value supplied to a load, a first holding capacitor, a second holding capacitor, and first to fourth switches. After holding the threshold voltage of the transistor in the second holding capacitor, a potential corresponding to a video signal is input to the pixel. In this way, by holding in the second holding capacitor a voltage obtained by adding a potential capacitively divided with the first holding capacitor to the threshold voltage among the potentials corresponding to the video signal, variations in current values caused by variations in the threshold voltage of the transistor are suppressed. Therefore, it is possible to supply a desired current to a load such as a light-emitting element. Further, it becomes possible to provide a display device with little deviation from the luminance specified by the video signal. After holding the threshold voltage of the transistor in the second holding capacitor, a potential corresponding to a video signal is input to the pixel. In this way, by holding in the second holding capacitor a voltage obtained by adding a potential capacitively divided with the first holding capacitor to the threshold voltage among the potentials corresponding to the video signal, variations in current values caused by variations in the threshold voltage of the transistor are suppressed. Therefore, it is possible to supply a desired current to a load such as a light-emitting element. Further, it becomes possible to provide a display device with little deviation from the luminance specified by the video signal. One aspect of the present invention has a transistor, a holding capacitor, a first switch, a second switch, a third switch, and a fourth switch. One of the source electrode and the drain electrode of the transistor is electrically connected to a pixel electrode, and the other of the source electrode and the drain electrode of the transistor is electrically connected to a first wiring via the second switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the transistor via the third switch.
[0016] One aspect of the present invention has a transistor, a holding capacitor, a first switch, a second switch, a third switch, and a fourth switch. One of the source electrode and the drain electrode of the transistor is electrically connected to a pixel electrode, and the other of the source electrode and the drain electrode of the transistor is electrically connected to a first wiring via the second switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the transistor via the third switch. One of the source electrode and the drain electrode of the transistor is electrically connected to a pixel electrode, and the other of the source electrode and the drain electrode of the transistor is electrically connected to a first wiring via the second switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the transistor via the third switch. One of the source electrode and the drain electrode of the transistor is electrically connected to a pixel electrode, and the other of the source electrode and the drain electrode of the transistor is electrically connected to a first wiring via the second switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the transistor via the third switch. Is electrically connected to the gate electrode of the stage, and the gate electrode of the transistor is the holding capacitor And is electrically connected to the second wiring via the fourth switch, and the gate of the transistor The electrode is electrically connected to the third wiring via the holding capacitor and the first switch It is a semiconductor device that is connected.
[0017] One aspect of the present invention includes a transistor, a first holding capacitor, a second holding capacitor, a first switch A second switch, a third switch, and a fourth switch, and one of the source electrode and the drain electrode of the transistor is electrically connected to the pixel electrode, and the source electrode and the drain electrode of the transistor One of them is electrically connected to the gate electrode of the transistor via the second holding capacitor, and the other of the source electrode and the drain electrode of the transistor Is electrically connected to the first wiring via the second switch, and the other of the source electrode and the drain electrode of the transistor Is electrically connected to the gate electrode of the transistor via the third switch, and the gate electrode of the transistor is electrically connected to the second wiring via the first holding capacitor and The fourth switch, and the gate electrode of the transistor is electrically connected to the third wiring via the first holding capacitor and the first switch It is a semiconductor device that is connected. The gate electrode of the transistor is electrically connected to the second wiring via the first holding capacitor and The fourth switch, and the gate electrode of the transistor is electrically connected to the third wiring via the first holding capacitor and the first switch It is a semiconductor device that is connected. Is connected.
[0018] One aspect of the present invention includes a transistor, a first holding capacitor, a second holding capacitor, a first switch A second switch, a third switch, a fourth switch, and a fifth switch, and one of the source electrode and the drain electrode of the transistor is electrically connected to the pixel electrode, and one of the source electrode and the drain electrode of the transistor is via the second holding capacitor Connected, and one of the source electrode and the drain electrode of the transistor is electrically connected to the pixel electrode, and one of the source electrode and the drain electrode of the transistor is via the second holding capacitor Connected, and one of the source electrode and the drain electrode of the transistor is via the second holding capacitor is electrically connected to the gate electrode of the transistor, and one of the source electrode and the drain electrode of the transistor is electrically connected to the fourth wiring via a fifth switch, and the other of the source electrode and the drain electrode of the transistor is electrically connected to the first wiring via the second switch, and the other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch, and the gate electrode of the transistor is electrically connected to the second wiring via the first holding capacitor and the fourth switch, and the gate electrode of the transistor is electrically connected to the third wiring via the first holding capacitor and the first switch, which is a semiconductor device. In the above configuration, the second wiring may be the same as the wiring for controlling the first switch. Further, the second wiring may be any of the scanning lines for controlling the first switch to the fourth switch in the previous row or the next row. One aspect of the present invention includes a transistor, a first holding capacitor, a second holding capacitor, a first switch, a second switch, a third switch, and a fourth switch. One of the source electrode and the drain electrode of the transistor is electrically connected to a pixel electrode. One of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. The other of the source electrode and the drain electrode of the transistor is electrically connected to the first wiring via the second switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch.
[0019] In the above configuration, the second wiring may be the same as the wiring for controlling the first switch. Further, the second wiring may be any of the scanning lines for controlling the first switch to the fourth switch in the previous row or the next row. In the above configuration, the second wiring may be the same as the wiring for controlling the first switch. Further, the second wiring may be any of the scanning lines for controlling the first switch to the fourth switch in the previous row or the next row. It may be any of the scanning lines for controlling the first to fourth switches.
[0020] One aspect of the present invention includes a transistor, a first holding capacitor, a second holding capacitor, a first switch, a second switch, a third switch, and a fourth switch. One of the source electrode and the drain electrode of the transistor is electrically connected to a pixel electrode. One of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. The other of the source electrode and the drain electrode of the transistor is electrically connected to the first wiring via the second switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch. One of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. The other of the source electrode and the drain electrode of the transistor is electrically connected to the first wiring via the second switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch. One of the source electrode and the drain electrode of the transistor is electrically connected to a pixel electrode, and one of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor, and the other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor, and the other of the source electrode and the drain electrode of the transistor is electrically connected to the first wiring via the second switch, and the other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch, and the gate electrode of the transistor is electrically connected to the gate electrode of the transistor, and the gate electrode of the transistor is connected to the first holding capacitor and is electrically connected to the first wiring via the fourth switch, and the gate electrode of the transistor is electrically connected to the third wiring via the first holding capacitor and the first switch in a semiconductor device.
[0021] One aspect of the present invention includes a transistor, a first holding capacitor, a second holding capacitor, a first switch , a second switch, a third switch, and a rectifying element. One of the source electrode and the drain electrode of the transistor is electrically connected to the pixel electrode, and one of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. The other of the source electrode and the drain electrode of the transistor is electrically connected to the first wiring via the second switch, and the other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch. The gate electrode of the transistor is electrically connected to the second wiring via the first holding capacitor and the rectifying element, and the gate electrode of the transistor is electrically connected to the third wiring via the first holding capacitor and the first switch. One of the source electrode and the drain electrode of the transistor is electrically connected to the pixel electrode, and one of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. One of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. The other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch. The gate electrode of the transistor is electrically connected to the second wiring via the first holding capacitor and the rectifying element, and the gate electrode of the transistor is electrically connected to the third wiring via the first holding capacitor and the first switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the first wiring via the second switch, and the other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch. The other of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the third switch. The gate electrode of the transistor is electrically connected to the second wiring via the first holding capacitor and the rectifying element, and the gate electrode of the transistor is electrically connected to the third wiring via the first holding capacitor and the first switch. The gate electrode of the transistor is electrically connected to the second wiring via the first holding capacitor and the rectifying element, and the gate electrode of the transistor is electrically connected to the third wiring via the first holding capacitor and the first switch. in a semiconductor device. in a semiconductor device.
[0022] One aspect of the present invention includes a transistor, a first holding capacitor, a second holding capacitor, a first switch , a second switch, a third switch, and a fourth switch. One of the source electrode and the drain electrode of the transistor is electrically connected to the pixel electrode, and one of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. One of the source electrode and the drain electrode of the transistor is electrically connected to the pixel electrode, and one of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. One of the source electrode and the drain electrode of the transistor is electrically connected to the gate electrode of the transistor via the second holding capacitor. is electrically connected to the gate electrode, and in addition to the source electrode and the drain electrode of the transistor the other is electrically connected to the first wiring via the second switch, and the source of the transistor the other of the electrode and the drain electrode is electrically connected to the gate electrode of the transistor via the third switch, and the gate electrode of the transistor is connected to the first holding capacitor and is electrically connected to the third wiring via the first switch, and the fourth switch is connected to the is electrically connected in parallel with the first holding capacitor and is also electrically connected to the third wiring via the first switch. It is a semiconductor device connected.
[0023] The transistor may be an N-channel transistor. Further, the semiconductor layer of the transistor may be characterized by being made of an amorphous semiconductor film. Furthermore, the semiconductor layer of the transistor may be characterized by being made of amorphous silicon.
[0024] Further, the semiconductor layer of the transistor may be characterized by being made of a crystalline semiconductor film.
[0025] In the above invention, the potential of the first wiring may be characterized by being higher than a value obtained by adding the threshold voltage of the transistor to the potential of the pixel electrode.
[0026] Further, the transistor may be a P-channel transistor. In that case, in the above invention, the potential of the first wiring may be characterized by being lower than a value obtained by subtracting the threshold voltage of the transistor from the potential of the pixel electrode.
[0027] One aspect of the present invention is a first holding capacitor, and one of the source electrode and the drain electrode is electrically connected to a load is connected, and the other of the source electrode and the drain electrode is electrically connected to the first wiring, and the gate electrode is a transistor electrically connected to the second wiring via the first holding capacitor; a second holding capacitor for holding the gate-source voltage of the transistor; means for holding a first voltage in the first holding capacitance and a second voltage in the second holding capacitance; means for discharging the second voltage of the second holding capacitance to the threshold voltage of the transistor; and means for supplying the current set in the transistor to the load by inputting a potential corresponding to the video signal from the second wiring to the first holding capacitance. A semiconductor device characterized by comprising: The transistor may be an N-channel type transistor. Further, the semiconductor layer of the transistor may be characterized by being made of an amorphous semiconductor film. Furthermore, the semiconductor layer of the transistor may be characterized by being made of amorphous silicon. The transistor may also be characterized in that its semiconductor layer is made of a crystalline semiconductor film. The transistor may also be a P-channel type transistor. Further, one aspect of the present invention is a display device having the semiconductor device described above. Further, it is an electronic device having the display device.
[0028] Note that switches shown in the specification can be of various forms. Examples include electrical switches and mechanical switches. That is, anything that can control the flow of current can be used.
[0029]
[0030]
[0031]
[0032] It is sufficient and not limited to specific ones. For example, as the switch, transistors (e.g., bipolar transistors, MOS transistors, etc.), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Ins ulator Metal) diodes, MIS (Metal Insulator S emiconductor) diodes, transistors in diode connection, etc.), thyristors etc. can be used. Also, a logic circuit combining these can be used as a switch.
[0033] When using a transistor as a switch, since the transistor operates merely as a switch, the polarity (conductivity type) of the transistor is not particularly limited. However, it is desirable to use a transistor with a lower off-current polarity. Examples of transistors with a low off-current include transistors having an LDD region and transistors having a multi-gate structure. Also, when the potential of the source electrode of the transistor operating as a switch is close to the low-potential side power supply (Vss, GND, 0V, etc.), an N-channel type is used, and conversely, when the potential of the source electrode is close to the high-potential side power supply (Vdd, etc.), a P-channel type transistor is preferably used. By operating in this way, the absolute value of the gate-source voltage can be increased, making the operation as a switch easier. Also, since it is less likely to perform source follower operation, it is possible to prevent
[0034] the output voltage from becoming small. An S-shaped switch may be used as the switch. When a CMOS-type switch is used, it is easy to control the output voltage with respect to various input voltages, and appropriate operations can be performed. Furthermore, since the voltage amplitude value of the signal for turning the switch on and off can be reduced, power consumption can also be reduced.
[0035] When a transistor is used as the switch, one of the source electrode and the drain electrode serves as the input terminal of the switch, the other of the source electrode and the drain electrode serves as the output terminal, and the gate electrode functions as the terminal for controlling the conduction of the switch. On the other hand, when a diode is used as the switch, the switch may not have a terminal for controlling conduction. Therefore, using a diode as the switch rather than a transistor can eliminate the need for wiring for controlling the terminals, thus reducing the number of wirings.
[0036] In the present invention, being connected means being electrically connected. Therefore, in the configuration disclosed by the present invention, in addition to the predetermined connection relationship, for example, the connection relationship shown in the figure or the text, other elements (for example, switches, transistors, capacitive elements, inductors, resistive elements, diodes, etc.) that enable electrical connection therebetween may be arranged. Of course, they may be arranged without other elements in between, and being electrically connected shall include the case of being directly connected. The load is not limited to a light-emitting element typified by an electroluminescent element, and a display medium in which brightness, color tone, polarization, etc. change when current flows can be applied. In addition, as long as a desired current can be supplied to the load, the load may be, for example, an electron-emitting element sub, liquid crystal element, electronic ink, electrophoresis element, grating light valve (GLV), plasma display (PDP), digital micromirror device (DMD), and other display media whose contrast changes due to magnetic action can also be applied. In addition, it is also possible to use carbon nanotubes for electron-emitting elements. Note that as a display device using an EL element, there is an EL display, and as a display device using an electron-emitting element, there are a field emission display (FED) and a surface-conduction electron-emitter display (SED). In addition, as a display device using a liquid crystal element, there are a liquid crystal display, a transmissive liquid crystal display, a transflective liquid crystal display, and a reflective liquid crystal display, and as a display device
[0037] using electronic ink, there is electronic paper. Note that a transistor is an element having at least three terminals including a gate electrode, a drain region, and a source region, and has a channel formation region between the drain region and the source region. Here, since the source region and the drain region change depending on the structure and operating conditions of the transistor, etc., it is difficult to accurately limit the range of the source region or the drain region. Therefore, when explaining the
[0038] connection relationship of the transistor, for the two terminals of the drain It may be an element having an emitter and a collector, where either the emitter or the collector corresponds to the first electrode and the other corresponds to the second electrode.
[0039] In the present invention, various forms of transistors can be applied, and there is no particular limitation on the type. For example, a thin-film transistor (TFT) having a non-single-crystalline semiconductor film typified by amorphous silicon, polycrystalline silicon, microcrystalline (also referred to as semi-amorphous) silicon, etc. can be used. When using a TFT, there are various merits. For example, since it can be manufactured at a lower temperature than in the case of single-crystalline silicon, the manufacturing cost can be reduced and the size of the manufacturing apparatus can be increased. By making it possible to increase the size of the manufacturing apparatus, it can be manufactured on a large substrate, and at the same time, a large number of display devices can be manufactured. Thus, it becomes possible to manufacture at a lower cost. Also, since the manufacturing temperature is low, a substrate with weak heat resistance can be used, and for example, a transistor can be manufactured on a substrate having translucency such as a glass substrate.
[0040] When manufacturing polycrystalline silicon, by using a catalyst (such as nickel), the crystallinity can be further improved, and it becomes possible to manufacture a transistor with good electrical characteristics. As a result, it becomes possible to integrally form a gate driver circuit (scanning line driving circuit), a source driver circuit (signal line driving circuit), and a signal processing circuit (signal generation circuit, gamma correction circuit, DA conversion circuit, etc.) on the substrate. Note that it is not always necessary to use a catalyst.
[0041] Also, when using microcrystalline silicon, it is possible to integrally form a part of the gate driver circuit (scanning line driving circuit) and the source driver circuit (such as an analog switch) on the substrate.
[0042] In addition, transistors can be formed using a semiconductor substrate, an SOI substrate, or the like. In such a case, MOS transistors, junction transistors, bipolar transistors, etc. can be used as transistors. By these, transistors with little variation in characteristics, size, shape, etc. and high current supply ability can be manufactured. Therefore, low power consumption of the circuit, high integration of the circuit, etc. can be achieved.
[0043] In addition, transistors having any compound semiconductor or oxide semiconductor such as ZnO, a-InGaZnO, SiGe, GaAs, IZO, ITO, SnO, etc., and further thin film transistors in which these compound semiconductors or oxide semiconductors are thinned can be used. By these, the manufacturing temperature can be lowered, and for example, it becomes possible to manufacture transistors at room temperature. As a result, transistors can be directly formed on a substrate with low heat resistance, such as a plastic substrate or a film substrate. Note that these compound semiconductors or oxide semiconductors can be used not only for the channel portion of the transistor but also for other applications. For example, these compound semiconductors or oxide semiconductors can be used as resistance elements, pixel electrodes, transparent electrodes. Furthermore, since these can be formed simultaneously with the
[0044] transistor, the cost can be reduced. In addition, transistors formed using an inkjet or a printing method can also be used. By this, manufacturing can be performed at room temperature, at low vacuum, or on a large The layout can be easily changed. Furthermore, since there is no need to use a resist, the number of processes is reduced, and the manufacturing cost can be lowered. Also, since film formation is performed only on the necessary parts, the material is not wasted compared to the case of etching after forming a film over the entire surface, and it is possible to
[0045] manufacture at low cost. In addition, transistors having an organic semiconductor or a carbon nanotube can be used. Since such a transistor can also be provided on a flexible substrate, it has excellent impact resistance. Not limited to these, various other transistors can be used.
[0046] In addition, regarding the type of substrate on which the transistor is formed, various ones can be used and are not limited to a specific one. Examples of the substrate on which the transistor is formed include, for example, a single crystal substrate, an SOI substrate, a glass substrate, a quartz substrate, a plastic substrate, a paper substrate, a cellophane substrate, a stone substrate, a wood substrate, a cloth substrate (including natural fibers (silk, cotton, hemp), synthetic fibers (nylon, polyurethane, polyester) or regenerated fibers (acetate, cupra, rayon, recycled polyester), etc.), a rubber substrate, a stainless steel substrate, a substrate having a stainless steel foil, etc. can be used. Also, a transistor can be formed on a certain substrate, and then the transistor can be transferred to another substrate and arranged on another substrate. Examples of the substrate to which the transistor is transferred include a single crystal substrate, an SOI substrate, a glass (c) or contains regenerated fibers (acetate, cupra, rayon, regenerated polyester), etc. (d) Substrates having a leather substrate, a rubber substrate, a stainless steel substrate, a stainless steel foil, etc. can be used. By using these substrates, formation of transistors with higher characteristics, improvement of heat resistance, and weight reduction can be achieved.
[0047] Note that the configuration of the transistor can take various forms and is not limited to a specific configuration. For example, a multi-gate structure with two or more gate electrodes may be used. When a multi-gate structure is adopted, since the channel regions are connected in series, a configuration in which a plurality of transistors are connected in series is obtained. With such a multi-gate structure, the reliability of the transistor can be made more excellent by reducing the off-current and improving the breakdown voltage of the transistor. Also, with the multi-gate structure, when operating in the saturation region, even if the drain-source voltage changes, the drain-source current does not change much, and a flat voltage-current characteristic with a flat slope can be obtained. By using the flat voltage-current characteristic with a flat slope, an ideal current source circuit and an active load having a very high resistance value can be realized. As a result, a differential circuit and a current mirror circuit with good characteristics can be realized. Also, a structure in which gate electrodes are disposed above and below the channel region may be used. By disposing gate electrodes above and below the channel region, an effective channel region increases, so that an increase in the amount of current and a reduction in the S value due to the easy formation of a depletion layer can be achieved. Note that when gate electrodes are disposed above and below the channel region, a configuration is obtained in which a plurality of transistors are connected in parallel.
[0048] Also, a structure in which a gate electrode is disposed over the channel region may be used, or a structure in which a gate electrode is disposed under the channel region may be used. Alternatively, a positive stagger structure or an inverse stagger structure may be used. Further, the channel region may be divided into a plurality of regions, or the channel regions may be connected in parallel or in series. Furthermore, a source electrode or a drain electrode may overlap with the channel region (or a part thereof). By adopting such a structure in which a source electrode or a drain electrode overlaps with the channel region (or a part thereof), it is possible to prevent charge from accumulating in a part of the channel region and the operation from becoming unstable. Also, an LDD region may be provided. By providing the LDD region, it is possible to reduce the off-current and improve the breakdown voltage of the transistor, thereby making the reliability of the transistor better. Alternatively, by providing the LDD region, when operating in the saturation region, even if the drain-source voltage changes, it is possible to obtain a voltage-current characteristic with a flat slope in which the drain-source current does not change much.
[0049] Note that, as described above, the transistor in the present invention can use various types of transistors and can be formed on various substrates. Therefore, all of the circuits necessary to realize a predetermined function may be formed on the same substrate. For example, all of the circuits necessary to realize a predetermined function may be formed on a glass substrate, a plastic substrate, a single crystal substrate, or an SOI substrate. By forming all of the circuits necessary to realize a predetermined function on the same substrate in this way, it is possible to reduce the cost by reducing the number of parts and improve the reliability by reducing the number of connection points with circuit components. Part of the circuit necessary to realize a predetermined function may be formed on a certain substrate, and another part of the circuit necessary to realize the predetermined function may be formed on another substrate. That is, it is not necessary for all of the circuits necessary to realize a predetermined function to be formed on the same substrate. For example, part of the circuit necessary to realize a predetermined function may be formed on a glass substrate, and another part may be formed on a single crystal substrate. In this way, an IC chip composed of transistors on the single crystal substrate is
[0050] connected to the glass substrate by COG (Chip On Glass) and arranged on the glass substrate. Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Automated Bonding) or a printed circuit board. In this way, since part of the circuit is formed on the same substrate, it is possible to reduce costs by reducing the number of parts and improve reliability by reducing the number of connection points with circuit components. Also, since the circuit in the part with a high drive voltage or a high drive frequency consumes a large amount of power, the circuit in such a part is not formed on the same substrate as other circuits. For example, by using an IC chip formed on a single crystal substrate, an increase in power consumption can be prevented. In this specification, one pixel indicates one element that can control brightness. As an example, one pixel indicates one color element, and the brightness is expressed by one such color element. Therefore, in the case of a color display device composed of color elements of R (red), G (green), and B (blue) at that time, the minimum unit of the image is composed of three pixels: an R pixel, a G pixel, and a B pixel. Note that the color elements are not limited to three colors, and more than three colors may be used, or colors other than RGB may be used. For example, RGBW (W is white), RGB, for example, yellow, cyan There are also those with one or more additional colors such as cyan, magenta, emerald green, and vermilion. Also , a color similar to at least one of RGB may be added to RGB. For example, it may be R, G, B1, B2. Both B1 and B2 are blue, but have slightly different frequencies . Similarly, it may be R1, R2, G, B or R, G1, G2, B. By using such color elements, a display closer to the real thing can be achieved. Also, by using such color elements, power consumption can be reduced. Also, as another example, when controlling brightness using multiple regions for one color element, each region can be regarded as one pixel. As an example, the case of performing area gradation or having sub-pixels can be mentioned. In such a case, there are multiple regions for controlling the brightness of one color element, and the gradation is expressed as a whole. However, each region for controlling the brightness can also be regarded as one pixel, and in this case, one color element will be composed of multiple pixels. Also, even if there are multiple regions for controlling brightness within one color element, they can be grouped together and one color element can be regarded as one pixel. In that case, one color element will constitute one pixel. Also, when controlling brightness using multiple regions for one color element, the size of the region contributing to the display may vary depending on the pixel. Also, in the multiple regions for controlling the brightness of one color element, the signals supplied to each region can be made slightly different so as to widen the viewing angle. That is, by making the potentials of the pixel electrodes of the multiple regions of one color element different from each other, the voltage applied to the liquid crystal molecules can be made different , and the viewing angle can also be improved. . Also, when there are multiple regions for controlling the brightness of one color element, the size of the region contributing to the display may vary depending on the pixel. Also, in the multiple regions for controlling the brightness of one color element, the signals supplied to each region can be made slightly different so as to widen the viewing angle. That is, by making the potentials of the pixel electrodes of the multiple regions of one color element different from each other, the voltage applied to the liquid crystal molecules can be made different , and the viewing angle can also be improved. That is, by making the potentials of the pixel electrodes of the multiple regions of one color element different from each other, the voltage applied to the liquid crystal molecules can be made different , and the viewing angle can be improved.
[0051] In this specification, a semiconductor device refers to a device having a circuit including semiconductor elements (such as transistors and diodes). ). Further, it may be a general device that can function by utilizing semiconductor characteristics. In addition, a display device includes not only a display panel main body on which a plurality of pixels including loads and peripheral drive circuits for driving these pixels are formed, but also those to which a flexible printed circuit (FPC) or a printed wiring board (PWB) is attached.
[0052] In the present invention, descriptions such as formed on a certain object or ~ formed on ~, on ~, or on ~ are not limited to being in direct contact with a certain object. If they are not in direct contact, that is, if another object is sandwiched in between, it is also included. Therefore, for example, when it is described that layer B is formed on (or on) layer A, it includes the case where layer B is directly formed on layer A and the case where another layer (such as layer C or layer D) is formed on layer A, and layer B is formed thereon. The same applies to the description of above ~. It is not limited to being in direct contact with a certain object, and also includes the case where another object is sandwiched in between. Therefore, for example, when it is described that layer B is formed above layer A, it includes the case where layer B is directly formed on layer A and the case where another layer (such as layer C or layer D) is formed on layer A, and layer B is formed thereon. Note that for the description of under ~ or below ~, similarly, it includes both the case of being in direct contact and the case of not being in direct contact.
Advantages of the Invention
[0053] According to the present invention, variations in current values caused by variations in the threshold voltage of transistors can be suppressed. Therefore, a desired current can be supplied to a load such as a light-emitting element. In particular, when a light-emitting element is used as the load, a display device with less variation in luminance and a high ratio of the light-emitting period in one frame period can be provided.
Brief Description of the Drawings
[0054]
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure 24
Figure 25
Figure 26
Figure 27
Figure 28
Figure 29
Figure 30
Figure 31
Figure 32
Figure 33
Figure 34
Figure 35
Figure 36
Figure 37
Figure 38
Figure 39
Figure 40
Figure 41
Figure 42
Figure 43
Figure 44
Figure 45
Figure 46
Figure 47
Figure 48
Figure 49
Figure 50
Figure 51
Figure 52
Figure 53
Figure 54
Figure 55
Figure 56
Figure 57
Figure 58
Figure 59
Figure 60
Figure 61
Figure 62
Figure 63
Figure 64
Figure 65
Mode for Carrying Out the Invention
[0055] Hereinafter, one aspect of the present invention will be described. However, the present invention can be implemented in many different aspects, and it will be easily understood by those skilled in the art that the form and details thereof can be variously changed without departing from the spirit and scope of the present invention. Therefore, the description of the present form should not be construed as being limited thereto. In the configuration of the present invention described below, the same reference numerals are used in common among different drawings. (Embodiment 1) (Embodiment 1) The basic configuration of the pixel of the present invention will be described with reference to FIG. 1. The pixel shown in FIG. 1 includes a transistor 110, a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a first capacitive element 115, a second capacitive element 116, and a light emitting element 117. Note that the pixel is connected to a signal line 118, a first scanning line 119, a second scanning line 120, a third scanning line 121, a power supply line 122, and a potential supply line 123. In the present embodiment, the transistor 110 is an N-channel type transistor, and the voltage between its gate and source is connected to the signal line 118, the first scanning line 119, the second scanning line 120, the third scanning line 121, the power supply line 122, and the potential supply line 123. In the present embodiment, the transistor 110 is an N-channel type transistor, and the voltage between its gate and source When the voltage (Vgs) exceeds the threshold voltage (Vth), it is assumed to be in the conducting state. Also, the pixel electrode of the light-emitting element 117 functions as an anode, and the counter electrode 124 functions as a cathode. Note that The voltage between the gate and source of the transistor is Vgs, the voltage between the drain and source is Vds, and the threshold voltage is Vth. The voltages stored in the first capacitor element 115 and the second capacitor element 116 are denoted as Vc1 and Vc2 respectively. The power supply line 122, the potential supply line 123, and the signal line 118 are also referred to as the first wiring, the second wiring, and the third wiring respectively. Also, the first scanning line 119, the second scanning line 120, and the third scanning line 121 may also be referred to as the fourth wiring, the fifth wiring, and the sixth wiring respectively.
[0056] One of the first electrodes (either the source electrode or the drain electrode) of the transistor 110 is connected to the pixel electrode of the light-emitting element 117, and the second electrode (the other of the source electrode and the drain electrode) is connected to the power supply line 122 via the second switch 112. The gate electrode is connected to the power supply line 122 via the third switch 113 and the second switch 112. Note that the third switch 113 is connected between the gate electrode of the transistor 110 and the second switch 112 and is.
[0057] Also, if the connection point between the gate electrode of the transistor 110 and the third switch 113 is defined as node 130, then node 130 is connected to the signal line 118 via the first capacitor element 115 and the first switch 111. That is, the first electrode of the first capacitor element 115 is connected to the signal line 118 via the first switch 111, and the second electrode is connected to the gate electrode of the transistor 110. Also, the first electrode of the first capacitor element 115 is connected to the fourth switch 114 via the first switch 111, and the second electrode is connected to the gate electrode of the transistor 110. Also, the first electrode of the first capacitor element 115 is connected to the fourth switch 114 is also connected to the potential supply line 123 via. Node 130 is further connected to the first electrode of the transistor 110 via the second capacitive element 1 16. That is, the first electrode of the second capacitive element 116 is connected to the gate electrode of the transistor 110, and the second electrode is connected to the first electrode of the transistor 110 110. These capacitive elements may be formed by sandwiching an insulating film with wiring, a semiconductor layer, and electrodes. In some cases, as shown in FIG. 55, the second capacitive element 116 may be omitted by using the gate capacitance of the transistor 110 110. The means for holding these voltages is called a holding capacitor. Also, the connection between node 130 and the wiring to which the second electrode of the first capacitive element 1 15 and the first electrode of the second capacitive element 116 are connected is the node 131, the connection between the first electrode of the transistor 110 and the wiring to which the second electrode of the second capacitive element 116 and the pixel electrode of the light emitting element 117 are connected is the node 132 132, and the connection between the second electrode of the transistor 110 and the wiring to which the second switch 112 and the third switch 11 13 are connected is the node 133 133. Note that by inputting signals to the first scanning line 119, the second scanning line 120, and the third scanning line 121, the on / off states of the first switch 111, the second switch 112, the third switch 113, and the fourth switch 114 are controlled respectively 114 are controlled respectively. A signal corresponding to the gradation of the pixel corresponding to the video signal, that is, a potential corresponding to the luminance data, is input to the signal line 118
[0058]
[0059]
[0060] Next, the operation of the pixel shown in FIG. 1 will be described with reference to the timing chart of FIG. 2 and FIG. 3
[0060] will be described. In FIG. 2, one frame period corresponding to the period of displaying an image for one screen is divided into an initialization period, a threshold voltage writing period, a data writing period, and a light emission period . Also, the initialization period, the threshold voltage writing period, and the data writing period are collectively referred to as the address period. The one frame period is not particularly limited, but it is preferably at least 1 / 60 second or less so that a person viewing the image does not feel flicker (flicker).
[0061] Note that a potential of V1 (V1: an arbitrary number) is input to the counter electrode 124 of the light emitting element 117. Also, let V be the potential difference required at least for the light emitting element 117 to emit light EL . Then, a potential of V1 + V EL + Vth + α (α: an arbitrary positive number) is input to the power supply line 122. That is, the power supply line 122 may have a potential of V1 + V EL + Vth + α or higher. The potential of the power supply line 123 is not particularly limited, but it is preferably within the range of the potential input to the panel on which the pixels are formed. By doing so, there is no need to separately fabricate a power supply. Here, the potential of the power supply line 123 is set to V2.
[0062] First, as shown in FIGS. 2(A) and 3(A), in the initialization period, the first switch 111 is turned off, and the second switch 112, the third switch 113, and the fourth switch 114 are turned on. At this time, the transistor 110 is in a conductive state, and V1 + V + Vth + α - V2 is applied to the first capacitor element 115, and Vth + α is held in the second capacitor element 116. EL Note that in the initialization period, a predetermined voltage may be applied to the first capacitor element 115, and a voltage higher than at least Vth may be held in the second capacitor element 116.
[0063] In the threshold voltage writing period shown in FIGS. 2(B) and 3(B), the second switch 11 2 is turned off. Therefore, the potential of the first electrode, i.e., the source electrode, of the transistor 110 rises next ly, and when the gate-source voltage Vgs of the transistor 110 reaches the threshold voltage (Vth ), the transistor 110 becomes non-conductive. Thus, the voltage Vc2 held in the second capacitor element 1 16 becomes approximately Vth.
[0064] In the subsequent data writing period shown in FIGS. 2(C) and 3(C), after turning off the third switch 113 and the fourth switch 114, the first switch 111 is turned on , and a potential (V2 + Vdata) corresponding to the luminance data is input from the signal line 118. At this time , if the capacitances of the first capacitor element 115, the second capacitor element 116, and the light emitting element 117 are C1, C2, and C3, respectively, and C3 > > C1, C2, it can be expressed as in Equation (1).
[0065]
Equation
[0066] Although C1 and C2 are necessary when determining the potential supplied from the signal line 118, these relationships are not particularly limited. When C1 > C2, it is possible to reduce the amplitude of Vdata accompanying the luminance change, so that the power consumption can be reduced. On the other hand, when C2 > C1, it is possible to suppress the change in Vc2 due to the on / off of the surrounding switches and the off-current. Due to these conflicting effects, C1 and C2 are equal, and the first capacitor element 115 > C1, it is possible to suppress the change in Vc2 due to the on / off of the surrounding switches and the off-current. Due to these conflicting effects, C1 and C2 are equal, and the first capacitor element 115 and the second capacitance element 116 preferably have the same size.
[0067] In addition, when it is desired to make the light emitting element 117 non-emitting in the next light emitting period, Vdata≦ Simply input a voltage of 0.
[0068] Next, in the light emission period shown in FIG. 2(D) and FIG. 3(D), the first switch 111 is turned off. After that, the second switch 112 is turned on. At this time, the gate The source voltage is Vgs=Vth+Vdata×(C1 / (C1+C2)), and the brightness data is A current corresponding to the data flows through the transistor 110 and the light emitting element 117, and the light emitting element 117 emits light. Of course, the potential corresponding to the brightness data input from the signal line 118 is applied to the transistor. The gate-source voltage of the capacitor 110 is Vgs=Vth+Vdata×(C1 / (C1+C2 )) is taken into consideration when determining Vdata.
[0069] The current I flowing through the light emitting element 117 is the current I that flows when the transistor 110 is operated in the saturation region. In this case, it is expressed by equation (2).
[0070]
number
[0071] In addition, when the transistor 110 is operated in the linear region, the current flowing through the light emitting element 117 is I is expressed by equation (3).
[0072]
number
[0073] where W is the channel width of the transistor 110, L is the channel length, μ is the mobility, and Cox refers to the storage capacity.
[0074] From equations (2) and (3), regardless of whether the operating region of transistor 110 is in the saturation region or the linear region, the current flowing through light-emitting element 117 does not depend on the threshold voltage (Vth) of transistor 110. Therefore, variations in the current value caused by variations in the threshold voltage of transistor 110 can be suppressed, and a current corresponding to the luminance data can be supplied to light-emitting element 117. regardless of whether the operating region of transistor 110 is in the saturation region or the linear region, the current flowing through light-emitting element 117 does not depend on the threshold voltage (Vth) of transistor 110. Therefore, variations in the current value caused by variations in the threshold voltage of transistor 110 can be suppressed, and a current corresponding to the luminance data can be supplied to light-emitting element 117. From equations (2) and (3), regardless of whether the operating region of transistor 110 is in the saturation region or the linear region, the current flowing through light-emitting element 117 does not depend on the threshold voltage (Vth) of transistor 110. Therefore, variations in the current value caused by variations in the threshold voltage of transistor 110 can be suppressed, and a current corresponding to the luminance data can be supplied to light-emitting element 117. From equations (2) and (3), regardless of whether the operating region of transistor 110 is in the saturation region or the linear region, the current flowing through light-emitting element 117 does not depend on the threshold voltage (Vth) of transistor 110. Therefore, variations in the current value caused by variations in the threshold voltage of transistor 110 can be suppressed, and a current corresponding to the luminance data can be supplied to light-emitting element 117. From equations (2) and (3), regardless of whether the operating region of transistor 110 is in the saturation region or the linear region, the current flowing through light-emitting element 117 does not depend on the threshold voltage (Vth) of transistor 110. Therefore, variations in the current value caused by variations in the threshold voltage of transistor 110 can be suppressed, and a current corresponding to the luminance data can be supplied to light-emitting element 117.
[0075] From the above, variations in luminance caused by variations in the threshold voltage of transistor 110 can be suppressed. Also, since the potential of the counter electrode is operated to be constant, the power consumption can be reduced. From the above, variations in luminance caused by variations in the threshold voltage of transistor 110 can be suppressed. Also, since the potential of the counter electrode is operated to be constant, the power consumption can be reduced. From the above, variations in luminance caused by variations in the threshold voltage of transistor 110 can be suppressed. Also, since the potential of the counter electrode is operated to be constant, the power consumption can be reduced.
[0076] Furthermore, when transistor 110 is operated in the saturation region, variations in luminance due to degradation of light-emitting element 117 can also be suppressed. Note that the degradation of the light-emitting element is not limited to the case where its current-voltage characteristics shift parallel to those before degradation. For example, it also includes cases where the slope of the characteristics or the differential value when the characteristics are represented by a curve is different from that before degradation. When light-emitting element 117 degrades, the V of light-emitting element 117 increases, and the potential of the first electrode of transistor 110, i.e., the source electrode, rises. At this time, the source electrode of transistor 110 is connected to the second electrode of second capacitive element 116, and the gate electrode of transistor 110 is connected to the first electrode of second capacitive element 116, and moreover, the gate electrode side is in a floating state. Therefore, as the source potential rises, the gate potential of transistor 110 also rises by the same potential. Thus, since the Vgs of transistor 110 does not change, even if the light-emitting element degrades, the transistor Furthermore, when transistor 110 is operated in the saturation region, variations in luminance due to degradation of light-emitting element 117 can also be suppressed. Note that the degradation of the light-emitting element is not limited to the case where its current-voltage characteristics shift parallel to those before degradation. For example, it also includes cases where the slope of the characteristics or the differential value when the characteristics are represented by a curve is different from that before degradation. When light-emitting element 117 degrades, the V of light-emitting element 117 increases, and the potential of the first electrode of transistor 110, i.e., the source electrode, rises. At this time, the source electrode of transistor 110 is connected to the second electrode of second capacitive element 116, and the gate electrode of transistor 110 is connected to the first EL electrode of second capacitive element 116, and moreover, the gate electrode side is in a floating state. Therefore, as the source potential rises, the gate potential of transistor 110 also rises by the same potential. Thus, since the Vgs of transistor 110 does not change, even if the light-emitting element degrades, the transistor Furthermore, when transistor 110 is operated in the saturation region, variations in luminance due to degradation of light-emitting element 117 can also be suppressed. Note that the degradation of the light-emitting element is not limited to the case where its current-voltage characteristics shift parallel to those before degradation. For example, it also includes cases where the slope of the characteristics or the differential value when the characteristics are represented by a curve is different from that before degradation. When light-emitting element 117 degrades, the V of light-emitting element 117 increases, and the potential of the first electrode of transistor 110, i.e., the source electrode, rises. At this time, the source electrode of transistor 110 is connected to the second electrode of second capacitive element 116, and the gate electrode of transistor 110 is connected to the first electrode of second capacitive element 116, and moreover, the gate electrode side is in a floating state. Therefore, as the source potential rises, the gate potential of transistor 110 also rises by the same potential. Thus, since the Vgs of transistor 110 does not change, even if the light-emitting element degrades, the transistor Furthermore, when transistor 110 is operated in the saturation region, variations in luminance due to degradation of light-emitting element 117 can also be suppressed. Note that the degradation of the light-emitting element is not limited to the case where its current-voltage characteristics shift parallel to those before degradation. For example, it also includes cases where the slope of the characteristics or the differential value when the characteristics are represented by a curve is different from that before degradation. When light-emitting element 117 degrades, the V of light-emitting element 117 increases, and the potential of the first electrode of transistor 110, i.e., the source electrode, rises. At this time, the source electrode of transistor 110 is connected to the second electrode of second capacitive element 116, and the gate electrode of transistor 110 is connected to the first It does not affect the currents flowing through the transistor 110 and the light-emitting element 117. Also, in Equation (2), It can be seen that the current I flowing through the light-emitting element does not depend on the source potential or the drain potential.
[0077] Therefore, when the transistor 110 is operated in the saturation region, the variations in the threshold voltage of the transistor 1 10 and the variations in the current flowing through the transistor 110 due to the deterioration of the light-emitting element 117 can be suppressed.
[0078] Note that when the transistor 110 is operated in the saturation region, the shorter the channel length L, the more easily a large amount of current flows when the drain voltage is significantly increased due to the pinch-off phenomenon.
[0079] Also, when the drain voltage is increased beyond the pinch-off voltage, the pinch-off point moves toward the source side, and the effective channel length that functions as the actual channel decreases. As a result, the current value increases. This phenomenon is called channel length modulation. Note that the pinch-off point is the boundary where the channel disappears and the channel thickness becomes 0 under the gate, and the pinch-off voltage refers to the voltage when the pinch-off point becomes the drain end. This phenomenon also occurs more easily when the channel length L is shorter. For example, a model diagram of the voltage-current characteristics due to channel length modulation is shown in FIG. 4. Note that in FIG. 4, the channel length L of the transistor is (a) > (b) > (c).
[0080] From the above, when the transistor 110 is operated in the saturation region, it is preferable that the current I with respect to the drain-source voltage Vds is closer to being constant. Therefore, it is more preferable that the channel length L of the transistor 11 0 is longer. For example, the channel length L of the transistor is preferably It is preferably larger than the channel width W. Also, the channel length L is 10 μm or more and 50 μm or less, more preferably 15 μm or more and 40 μm or less. However, the channel length L and the channel width W are not limited to this.
[0081] As described above, since the variation in the current value due to the variation in the threshold voltage of the transistor can be suppressed, in the present invention, the supply destination of the current controlled by the transistor is not particularly limited. Therefore, the light emitting element 117 shown in FIG. 1 can typically be an EL element (organic EL element, inorganic EL element, or EL element containing an organic substance and an inorganic substance). In addition, instead of the light emitting element 117, an electron emitting element, a liquid crystal element, an electronic ink, etc. can also be applied. FIG. 5 shows an example in which an EL element 517 is used as the light emitting element 117. Note that FIG. 5 shows a state in which current is flowing from the pixel electrode 511 to the counter electrode 124.
[0082] Also, since the transistor 110 only needs to have a function of controlling the current supplied to the light emitting element 117, the type of the transistor is not particularly limited, and various types can be used. For example, a thin film transistor (TFT) using a crystalline semiconductor film, a thin film transistor using a non-single crystal semiconductor film typified by amorphous silicon and polycrystalline silicon, a transistor formed using a semiconductor substrate or an SOI substrate, a MOS type transistor, a junction type transistor, a bipolar transistor, a transistor using a compound semiconductor such as ZnO or a-InGaZnO, a transistor using an organic semiconductor or a carbon nanotube, and other transistors can be applied to the transistor 110.
[0083] The first switch 111 supplies a potential corresponding to the luminance data, that is, a video signal, from a signal line 118. The timing of inputting the voltage to the pixel is selected, and the voltage held mainly in the first capacitance element 115, and The voltage held in the second capacitance element 116, i.e., the gate-source voltage of the transistor 110 The second switch 112 changes the second voltage of the transistor 110. The timing for supplying a predetermined potential to the first electrode is selected. The second electrode of the first capacitance element 115 and the first electrode of the second capacitance element 116 are also supplied with the predetermined voltage. The third switch 113 connects the gate electrode and the second electrode of the transistor 110 to The fourth switch 114 controls the connection between the first capacitor and the second capacitor for each frame period. The timing for holding a predetermined voltage in the element 115 is selected, and the first capacitance element 115 The first switch controls whether or not a predetermined potential is supplied to the electrode. 111, the second switch 112, the third switch 113, and the fourth switch 114 are There is no particular limitation as long as it has a function. For example, it may be a transistor or a diode. Alternatively, a logic circuit that combines these may be used. The fourth switch 112 and the fourth switch 114 apply a signal or potential to the pixel at the above timing. In addition, the third switch 113 may also perform the above function. If you can do this, there's no particular need to do so.
[0084] For example, in the initialization period and the threshold voltage writing period, A constant voltage can be maintained, and a signal according to the pixel gradation is written during the data writing period. In the case where the pixel can be directly inputted, the first switch 111 and the fourth switch 112 are provided in the pixel. In addition, the pixel may be set to V1+V EL If it is possible to supply +Vth+α (α>0), the second switch can be used as shown in Figure 43. The pixel shown in FIG. The pixel electrode 4300 includes a capacitor 115, a third switch 113, and a pixel electrode 4300. The first electrode (one of the source electrode and the drain electrode) of the transistor 110 is connected to the pixel electrode 4300. The gate electrode of the transistor 110 is connected to the second electrode of the transistor 110 via the third switch 113. The gate electrode of the transistor 110 is connected to the first capacitor element 115. The first electrode of the first capacitor 115 is also connected to the second electrode. The signal, that is, the potential according to the luminance data (that is, V2+Vdata) and the first capacitance element 1 An arbitrary potential (i.e., V2) is supplied to 15 for a predetermined period of time to maintain a predetermined voltage. In addition, since the gate capacitance 4310 of the transistor 110 is used as a storage capacitance, In this case, it is not necessary to provide the second capacitor element 116 in FIG. In the same manner as the timing chart shown in FIG. 2, a desired potential can be supplied to each electrode. Therefore, the variation in the current value caused by the variation in the threshold voltage of the transistor 110 is suppressed. Therefore, a desired current can be supplied to the pixel electrode 4300. Of course, the second capacitance element 116 in FIG. It is possible to use and omit it.
[0085] Next, the first switch 111, the second switch 112, the third switch 113, and The case where an N-channel transistor is applied to the fourth switch 114 is shown. Note that the parts common to the configuration of FIG. 1 are denoted by common reference numerals and their description is omitted.
[0086] The first switching transistor 611 corresponds to the first switch 111 in FIG. 1 , the second switching transistor 612 corresponds to the second switch 112, the third switch ing transistor 613 corresponds to the third switch 113, and the fourth switching transistor 614 corresponds to the fourth switch 114. Note that the channel length of the transistor 110 is preferably longer than the channel length of any of the transistors of the first switching transistor 611, the second switching transistor 61 2, the third switching transistor 613, and the fourth switching transistor 614.
[0087] The gate electrode of the first switching transistor 611 is connected to the first scanning line 119, the first electrode is connected to the signal line 118, and the second electrode is connected to the first electrode of the first capacitive element 115.
[0088] Also, the gate electrode of the second switching transistor 612 is connected to the second scanning line 120, the first electrode is connected to the node 133, and the second electrode is connected to the power supply line 122.
[0089] The gate electrode of the third switching transistor 613 is connected to the third scanning line 121, the first electrode is connected to the node 130, and the second electrode is connected to the node 133.
[0090] Also, the gate electrode of the fourth switching transistor 614 is connected to the third scanning line 121, the first The first electrode is connected to the first electrode of the first capacitor 115, and the second electrode is connected to a potential It is connected to the supply line 123.
[0091] Each switching transistor is turned on when the signal input to the corresponding scanning line is at H level. When the input signal is at L level, it is turned on and when the input signal is at L level, it is turned off.
[0092] FIG. 44 shows a top view of one example of the layout of the pixel shown in FIG. The configurations of the resistors, capacitance elements, light emitting elements, etc. will be described in the following embodiments, so Only the layout will be described. Also, the transistor 110 and the first The switching transistor 611 to the fourth switching transistor 614 are The transistor uses a bottom gate type transistor in which the gate electrode is located below the body layer.
[0093] The conductive layer 4410 shown in FIG. 44 is connected to the first scanning line 119 and the first switching transistor. The conductive layer 4411 includes a portion that functions as a gate electrode of the first electrode 611. The first electrode of the switching transistor 611 is also included. The layer 4412 is a second electrode of the first switching transistor 611 and a first capacitor element 115 and serves as a first electrode of the fourth switching transistor 614. The conductive layer 4413 includes a second electrode of the first capacitor 115 and a second electrode of the second capacitor 116. The first electrode of the element 116 and the portion that functions as the gate electrode of the transistor 110 are included. The conductive layer 4413 is connected to the third switching transistor 4414 via a wiring 4414. The conductive layer 4415 is connected to the conductive layer 4415 including a portion that functions as a first electrode of the conductive layer 613. 4416 includes a portion that functions as the second electrode of the second capacitive element 116 and the first electrode of the transistor 110, and is connected to the pixel electrode 4455 of the light-emitting element through a contact. Further, the conductive layer 4417 includes a portion that functions as the second electrode of the transistor 110, the second electrode of the third switching transistor 613, and the first electrode of the second switching transistor 612. The conductive layer 4418 includes a portion that functions as the power supply line 122 and the second electrode of the second switching transistor 612. The conductive layer 4419 includes a portion that functions as the second scanning line 120 and the gate electrode of the second switching transistor 612. The conductive layer 4420 includes a portion that functions as the gate electrode of the third switching transistor 613 and the gate electrode of the fourth switching transistor 614, and is connected to the third scanning line 121 through the wiring 4421. Further, the conductive layer 4422 that includes a portion that functions as the second electrode of the fourth switching transistor 614 is connected to the potential supply line 123 through the wiring 4423. Note that, among each conductive layer, the portion that functions as the gate electrode, the first electrode, and the second electrode of the first switching transistor 611 is a portion formed by overlapping the conductive layer including each of them and the semiconductor layer 4431. The portion that functions as the gate electrode, the first electrode, and the second electrode of the second switching transistor 612 is a portion formed by overlapping the conductive layer including each of them and the semiconductor layer 4432. Further, among each conductive layer, the portion that functions as the gate electrode, the first electrode, and the second electrode of the third switching transistor 613 is a portion formed by overlapping the conductive layer including each of them and the semiconductor layer 4433.
[0094] and the portions functioning as the gate electrode, the first electrode, and the second electrode of the fourth switching transistor 614 overlap with a conductive layer containing each of them and the semiconductor layer 4434 and are formed. Similarly, in the transistor 110, the portions functioning as the gate electrode, the first electrode, and the second electrode are conductive layer portions formed by overlapping with a conductive layer containing each of them and the semiconductor layer 4430. Note that the first capacitor element 115 is formed in a portion where the conductive layer 4412 and the conductive layer 4413 overlap, and the second capacitor element 116 is formed in a portion where the conductive layer 4413 and the conductive layer 4416 overlap. Note that the conductive layer 4410, the conductive layer 4413, the conductive layer 4419, the conductive layer 4420, the third inspection line 121, and the potential supply line 123 can be manufactured using the same material and the same layer.
[0095] The semiconductor layer 4430, the semiconductor layer 4431, the semiconductor layer 4432, the semiconductor layer 4433, and the semiconductor layer 4434, and the conductive layer 4411, the conductive layer 4412, the conductive layer 4415, the conductive layer 4416, the conductive layer 4417, the conductive layer 4418, and the conductive layer 4422 can each be manufactured using the same material and the same layer. Also, using the same material and the same layer as the pixel electrode 4455, the wiring 4 414, the wiring 4421, and the wiring 4423 can be manufactured. As shown in FIG. 44, in each transistor except the first switching transistor 611, a structure is adopted in which one of the source electrode and the drain electrode surrounds the other electrode, so that the channel width can be increased. Therefore, this is particularly effective when an amorphous semiconductor layer having a lower mobility than the crystalline semiconductor layer is used for the semiconductor layer of the transistor constituting the pixel.
[0096] Of course, in the first switching transistor 611 as well, the source electrode and the drain electrode may have a structure in which one of the electrodes surrounds the other electrode.
[0097] Next, a form of layout different from that of pixel 44 shown in FIG. 6 is shown in FIG. 4 5 using a top view. Note that the transistors 110 and the first switching transistor 611 to the fourth switching transistor 614 shown in FIG. 45 use a top gate type transistor such as a sequential staggered type in which the gate electrode is located on the semiconductor layer.
[0098] In FIG. 45, the conductive layer 4510 includes a portion that functions as the gate electrode of the first scanning line 119 and the first switching transistor 611, and the conductive layer 4511 includes a portion that functions as the first electrode of the signal line 118 and the first switching transistor 611. The semiconductor film 4520 includes a portion that functions as the semiconductor layer and the second electrode of the first switching transistor 611, a portion that functions as the first electrode and the semiconductor layer of the fourth switching transistor 614, and a portion that functions as the first electrode of the first capacitor element 115. Note that the semi conductor film 4520 is connected to the potential supply line 123 via the wiring 4512, and the wiring 451 2 functions as the second electrode of the fourth switching transistor 614. Further, the conductive layer 4513 includes a portion that functions as the second electrode of the first capacitor element 115, the first electrode of the second capacitor element 116 and a portion that functions as the gate electrode of the transistor 110. Note that the conductive layer 4513 is connected to the semiconductor film 4521 via the wiring 4514 that functions as the first electrode of the third switching transistor 613 This semiconductor film 4521 is the third switching transistor The semiconductor layer of the transistor 613, the portion functioning as the second electrode, and the second switching transistor The first electrode of the transistor 612, the portion functioning as the semiconductor layer, and the transistor 110 The first electrode, the semiconductor, and the portion functioning as the second electrode, and further the second electrode of the second capacitor element 116 The conductive layer 4515 includes the second scanning line 120 and the portion functioning as the gate electrode of the second switching transistor 612. The conductive layer 4 516 includes the power supply line 122 and the portion functioning as the second electrode of the second switching transistor 612. The conductive layer 4 516 includes the power supply line 122 and the portion functioning as the second electrode of the second switching transistor 612. The conductive layer 4517 includes the portion functioning as the gate electrode of the third switching transistor 613 and the portion functioning as the gate electrode of the fourth switching transistor 614, and is connected to the third scanning line 121 via the wiring 4518. Note that the pixel electrode 4545 of the light-emitting element is connected to the semiconductor film 4521 via the wiring 4519. Note that the first capacitor element 115 is formed in the portion where the semiconductor film 4520 and the conductive layer 4513 overlap, and the second capacitor element 116 is formed in the portion where the semiconductor film 4521 and the conductive layer 4513 overlap. In addition, the conductive layer 4510, the conductive layer 4513, the conductive layer 4515, the conductive layer 4517, the third scanning line 121, and the potential supply line 123 can be formed using the same material and the same layer. The semiconductor film 4520 and the semiconductor film 4521 can also be formed using the same material and the same layer. In addition, the wiring 4512, the wiring 4514, the conductive layer 4516, and the wiring 4518 can be formed using the same material and the same layer as the conductive layer 4511.
[0099]
[0100]
[0101] Note that the pixel layout is not limited to the above.
[0102] Even in the pixel configuration of FIG. 6, the threshold voltage of the transistor 110 can be suppressed by the same operation method as in FIG. 1. Variations in the current value caused by variations in the threshold voltage can be suppressed. Therefore, a current corresponding to the luminance data can be supplied to the light-emitting element 117, and variations in luminance can be suppressed. Moreover, when the transistor 110 is operated in the saturation region, variations in luminance caused by deterioration of the light-emitting element 117 can also be suppressed. In addition, since the pixel can be configured only with N-channel transistors, the manufacturing process can be simplified. Further, an amorphous semiconductor, a semi-amorphous semiconductor, or the like can be used for the semiconductor layer of the transistor constituting the pixel. For example, amorphous silicon (a-Si:H) can be cited as the amorphous semiconductor. By using these semiconductors, the manufacturing process can be further simplified. Therefore, the manufacturing cost can be reduced and the yield can be improved. Note that the first switching transistor 611, the second switching transistor 612, the third switching transistor 613, and the fourth switching transistor 614 operate merely as switches, so the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use a transistor with a small off-current. Examples of transistors with a large off-current include those provided with an LDD region and those having a multi-gate structure. Also, a CMOS-type switch may be formed using both N-channel and P-channel types.
[0103] In addition, since the pixel can be configured only with N-channel transistors, the manufacturing process can be simplified. Further, an amorphous semiconductor, a semi-amorphous semiconductor, or the like can be used for the semiconductor layer of the transistor constituting the pixel. For example, amorphous silicon (a-Si:H) can be cited as the amorphous semiconductor. By using these semiconductors, the manufacturing process can be further simplified. Therefore, the manufacturing cost can be reduced and the yield can be improved. In addition, since the pixel can be configured only with N-channel transistors, the manufacturing process can be simplified. Further, an amorphous semiconductor, a semi-amorphous semiconductor, or the like can be used for the semiconductor layer of the transistor constituting the pixel. For example, amorphous silicon (a-Si:H) can be cited as the amorphous semiconductor. By using these semiconductors, the manufacturing process can be further simplified. Therefore, the manufacturing cost can be reduced and the yield can be improved. In addition, since the pixel can be configured only with N-channel transistors, the manufacturing process can be simplified. Further, an amorphous semiconductor, a semi-amorphous semiconductor, or the like can be used for the semiconductor layer of the transistor constituting the pixel. For example, amorphous silicon (a-Si:H) can be cited as the amorphous semiconductor. By using these semiconductors, the manufacturing process can be further simplified. Therefore, the manufacturing cost can be reduced and the yield can be improved. In addition, since the pixel can be configured only with N-channel transistors, the manufacturing process can be simplified. Further, an amorphous semiconductor, a semi-amorphous semiconductor, or the like can be used for the semiconductor layer of the transistor constituting the pixel. For example, amorphous silicon (a-Si:H) can be cited as the amorphous semiconductor. By using these semiconductors, the manufacturing process can be further simplified. Therefore, the manufacturing cost can be reduced and the yield can be improved. In addition, since the pixel can be configured only with N-channel transistors, the manufacturing process can be simplified. Further, an amorphous semiconductor, a semi-amorphous semiconductor, or the like can be used for the semiconductor layer of the transistor constituting the pixel. For example, amorphous silicon (a-Si:H) can be cited as the amorphous semiconductor. By using these semiconductors, the manufacturing process can be further simplified. Therefore, the manufacturing cost can be reduced and the yield can be improved. In addition, since the pixel can be configured only with N-channel transistors, the manufacturing process can be simplified. Further, an amorphous semiconductor, a semi-amorphous semiconductor, or the like can be used for the semiconductor layer of the transistor constituting the pixel. For example, amorphous silicon (a-Si:H) can be cited as the amorphous semiconductor. By using these semiconductors, the manufacturing process can be further simplified. Therefore, the manufacturing cost can be reduced and the yield can be improved.
[0104] Note that the first switching transistor 611, the second switching transistor 612, the third switching transistor 613, and the fourth switching transistor 614 operate merely as switches, so the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use a transistor with a small off-current. Examples of transistors with a large off-current include those provided with an LDD region and those having a multi-gate structure. Also, a CMOS-type switch may be formed using both N-channel and P-channel types. Note that the first switching transistor 611, the second switching transistor 612, the third switching transistor 613, and the fourth switching transistor 614 operate merely as switches, so the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use a transistor with a small off-current. Examples of transistors with a large off-current include those provided with an LDD region and those having a multi-gate structure. Also, a CMOS-type switch may be formed using both N-channel and P-channel types. Note that the first switching transistor 611, the second switching transistor 612, the third switching transistor 613, and the fourth switching transistor 614 operate merely as switches, so the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use a transistor with a small off-current. Examples of transistors with a large off-current include those provided with an LDD region and those having a multi-gate structure. Also, a CMOS-type switch may be formed using both N-channel and P-channel types. Note that the first switching transistor 611, the second switching transistor 612, the third switching transistor 613, and the fourth switching transistor 614 operate merely as switches, so the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use a transistor with a small off-current. Examples of transistors with a large off-current include those provided with an LDD region and those having a multi-gate structure. Also, a CMOS-type switch may be formed using both N-channel and P-channel types. Note that the first switching transistor 611, the second switching transistor 612, the third switching transistor 613, and the fourth switching transistor 614 operate merely as switches, so the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use a transistor with a small off-current. Examples of transistors with a large off-current include those provided with an LDD region and those having a multi-gate structure. Also, a CMOS-type switch may be formed using both N-channel and P-channel types. Note that the first switching transistor 611, the second switching transistor 612, the third switching transistor 613, and the fourth switching transistor 614 operate merely as switches, so the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use a transistor with a small off-current. Examples of transistors with a large off-current include those provided with an LDD region and those having a multi-gate structure. Also, a CMOS-type switch may be formed using both N-channel and P-channel types. Note that the first switching transistor 611, the second switching transistor 612, the third switching transistor 613, and the fourth switching transistor 614 operate merely as switches, so the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use a transistor with a small off-current. Examples of transistors with a large off-current include those provided with an LDD region and those having a multi-gate structure. Also, a CMOS-type switch may be formed using both N-channel and P-channel types.
[0105] Also, as long as it performs the same operation as in FIG. 1, the connection of the switch can take various configurations and is not limited to FIG. 1. As can be seen from FIG. 3, which illustrates the operation of the pixel configuration of FIG. 1, in the present invention, during the initialization period, the threshold voltage writing period, the data writing period, and the light emitting period, it is sufficient that conduction is established as shown by the solid lines in FIGS. 53(A) to (D), respectively. Therefore, any configuration in which a switch or the like is arranged and operated to satisfy this condition is acceptable.
[0106] Also, during the initialization period, as long as a predetermined voltage is applied to the first capacitive element 115 and a voltage higher than at least the threshold voltage Vth of the transistor 110 is held in the second capacitive element 116, it is acceptable. Therefore, as shown in FIG. 54, the node 132 may be connected to the potential supply line 5401 via the fifth switch 5405. This fifth switch 5405 is turned on only during the initialization period, and in FIG. 54, the scanning line for controlling the on and off of the fifth switch 5405 is not shown. Note that the potential of the potential supply line 5401 may be a potential lower than V1 + V EL More preferably, it is a potential equal to or lower than V1. By setting such a potential, a reverse bias voltage can be applied to the light emitting element 117, so that short-circuited portions in the light emitting element can be insulated, and deterioration of the light emitting element can be suppressed. Therefore, the life of the light emitting element can be extended.
[0107] Subsequently, a display device having the pixel of the present invention described above will be described with reference to FIG. 7.
[0108] The display device includes a signal line driving circuit 711, a scanning line driving circuit 712, and a pixel portion 713, The pixel section 713 has a plurality of signal lines S extending in the column direction from the signal line driving circuit 711 1 to Sm and power supply lines P1_1 to Pm_1, and a plurality of first scanning lines G1_1 to Gn_1, second scanning lines G1_2 to Gn_2, third scanning lines G1_3 to Gn_3 and potential supply lines P1_2 to Pn_2 extending in the row direction from the scanning line driving circuit 712, and a plurality of pixels 714 arranged in a matrix corresponding to the signal lines S1 to Sm. Each pixel 7 14 is connected to a signal line Sj (any one of the signal lines S1 to Sm), a power supply line Pj_1, a first scanning line Gi_1 (any one of the scanning lines G1_1 to Gn_1), a second scanning line Gi_2, a third scanning line Gi_3 and a potential supply line Pi_2. Note that the signal line Sj, the power supply line Pj_1, the first scanning line Gi_1, the second scanning line Gi_2, the third scanning line Gi_3, and the potential supply line Pi_2 correspond to the signal line 118, the power supply line 1 22, the first scanning line 119, the second scanning line 120, the third scanning line 121, and the potential supply line 12
[0109] 3 in FIG. 1, respectively. The signal output from the scanning line driving circuit 712 is used to select the row of pixels to be operated, and at the same time, the operation shown in FIG. 2 is performed on each pixel belonging to the same row. During the data writing period in FIG. 2, the video signal output from the signal line driving circuit 711 is written into the pixels of the selected row. At this time, potentials corresponding to the luminance data of each pixel are input to the respective signal lines S1 to Sm. As shown in FIG. 8, for example, when the data writing period of the i-th row ends, data is written into the pixels belonging to the (i + 1)-th row. Note that FIG. 8 shows the data writing period for each row.
[0110] The row of pixels to be operated is selected by the signal output from the scanning line driving circuit 712, and at the same time, the operation shown in FIG. 2 is performed on each pixel belonging to the same row. During the data writing period in FIG. 2, the video signal output from the signal line driving circuit 711 is written into the pixels of the selected row. At this time, potentials corresponding to the luminance data of each pixel are input to the respective signal lines S1 to Sm. Note that during the data writing period in FIG. 2, the video signal output from the signal line driving circuit 711 is written into the pixels of the selected row. At this time, potentials corresponding to the luminance data of each pixel are input to the respective signal lines S1 to Sm. As shown in FIG. 8, for example, when the data writing period of the i-th row ends, data is written into the pixels belonging to the (i + 1)-th row. Note that FIG. 8 shows the data writing period for each row. The row of pixels to be operated is selected by the signal output from the scanning line driving circuit 712, and at the same time, the operation shown in FIG. 2 is performed on each pixel belonging to the same row. During the data writing period in FIG. 2, the video signal output from the signal line driving circuit 711 is written into the pixels of the selected row. At this time, potentials corresponding to the luminance data of each pixel are input to the respective signal lines S1 to Sm. As shown in FIG. 8, for example, when the data writing period of the i-th row ends, data is written into the pixels belonging to the (i + 1)-th row. Note that FIG. 8 shows the data writing period for each row.
[0111] As shown in FIG. 8, for example, when the data writing period of the i-th row ends, data is written into the pixels belonging to the (i + 1)-th row. Note that FIG. 8 shows the data writing period for each row. Note that FIG. 8 shows the data writing period for each row. The operation of the first switch 111 in FIG. 2 that can faithfully represent this is extracted and described Here. And the pixel that has finished the data writing period in the i-th row shifts to the light emission period, and emits light according to the signal written to that pixel.
[0112] Therefore, as long as the data writing periods in each row do not overlap, the start initialization time can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light emission period in one frame period (i.e., the duty ratio) can be made extremely large, and it can be made approximately 100%. Therefore, a display device with little variation in luminance and a high duty ratio can be obtained.
[0113] Also, since it is possible to set a long threshold voltage writing period, the threshold voltage of the transistor can be written more accurately into the capacitive element. Therefore, as a display device, the reliability can be improved.
[0114] Note that the configuration of the display device shown in FIG. 7 is an example, and the present invention is not limited thereto. For example, the potential supply lines P1_2 to Pn_2 do not have to be arranged parallel to the first scanning lines G1_1 to Gn_1, and may be arranged parallel to the signal lines S1 to Sm. Also, in the power supply lines P1 _1 to Pm_1, there is no need to be arranged parallel to the signal lines S1 to Sm, and they may be arranged parallel to the first scanning lines G1_1 to Gn_1.
[0115] In this embodiment, the case where the on / off of the third switch 113 and the fourth switch 114 is controlled using the same scanning line, i.e., the third scanning line 121, is shown, but they may be different Each switch may be controlled according to the timing chart of FIG. 2 using the scanning line thus obtained. .
[0116] Note that the variations in the threshold voltage include, in addition to the differences in the threshold voltages of the transistors between the pixels, the changes in the threshold voltage over time when focusing on one transistor. Furthermore, the differences in the threshold voltages of the transistors shall also include those due to the differences in the transistor characteristics during the fabrication of the transistors. Here, the transistor refers to a transistor having a function of supplying current to a load such as a light-emitting element. (Embodiment 2) In this embodiment, pixels with a configuration different from that of Embodiment 1 are shown in FIG. 9. For those similar to Embodiment 1, the same reference numerals are used, and detailed descriptions of the same parts or parts having the same functions are omitted. The pixel shown in FIG. 9(A) includes a transistor 110, a first switch 111, a second switch 112, a third switch 113, a rectifying element 914, a first capacitive element 115, a second capacitive
[0117] element 116, and a light-emitting element 117. The pixel is connected to a signal line 118, a first scanning line 11 9, a second scanning line 120, a third scanning line 921, a fourth scanning line 922, and a power supply line 122. The pixel shown in FIG. 9(A) has a configuration using the rectifying element 914 for the fourth switch 114 in FIG. 1. The first electrode of the first capacitive element 115 is connected to the fourth scanning line 922 via the rectifying element 914. That is, the rectifying element 914 is connected so that current flows from the first electrode of the first capacitive element 115 to the fourth scanning line 922. Of course, as shown in Embodiment 1, the first switch 111, the second switch 11 2, and the third switch 113 are also connected to the scanning lines in a similar manner. The second and fourth switches 114 may use transistors or the like. Also, for the rectifying element 914 diodes such as the Schottky barrier type 951, PIN type 952, and PN type 953 shown in FIG. 9(B), in addition to other diodes, transistors 954, 955, etc. connected in diode configuration can be used However, for transistors 954 and 955, it is necessary to appropriately select the polarity of the transistor according to the direction of current flow
[0118] When an H-level signal is input to the fourth scanning line 922, no current flows through the rectifying element 914, and when an L-level signal is input, current flows through the rectifying element 914. Therefore, when operating the pixel of FIG. 9 in the same manner as the pixel shown in FIG. 1, during the initialization period and the threshold voltage writing period, an L-level signal is input to the fourth scanning line 922, and an H-level signal is input during other periods The L-level signal not only allows current to flow through the rectifying element 914, but also, similar to Embodiment 1, sets the potential of the first electrode of the second capacitive element 116 to V2 according to the luminance data input to the pixel. When it is set to (V2 +Vdata), it is necessary to lower the potential to V2. Therefore, it is the potential obtained by subtracting the threshold voltage in the forward direction of the rectifying element 914 from V2 However, V2 is an arbitrary value. When it is desired to turn off the light-emitting element 117 during the light-emitting period, a potential of Vdata = 0 may be input. Also, for the H-level signal, as described above, it is only necessary that no current flows through the rectifying element 914. Therefore, it may be greater than the value obtained by subtracting the threshold voltage in the forward direction of the rectifying element 914 from V2 Considering the above matters, by operating the pixel configuration of FIG. 9 in the same manner as FIG. 1, the transistor
[0119] can also be made to operate in the same manner as in FIG. 1 Variations in the current value caused by variations in the threshold voltage of transistor 110 can be suppressed. Therefore, a current corresponding to the luminance data can be supplied to the light-emitting element 117, and variations in luminance can be suppressed. Further, when the transistor 110 is operated in the saturation region, variations in luminance caused by deterioration of the light-emitting element 117 can also be suppressed.
[0120] Also, the pixel shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods in each row do not overlap, the initialization start timing can be freely set for each row. In addition, since each pixel can emit light except during its own address period, the ratio of the light-emitting period in one frame period (i.e., the duty ratio) can be made extremely large and can be made approximately 100%. Therefore, a display device with little variation in luminance and a high duty ratio can be obtained.
[0121] Also, since it is possible to set the threshold voltage writing period long, the threshold voltage of the transistor that controls the current value flowing through the light-emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved.
[0122] This embodiment can be freely combined with the pixel configurations shown in other embodiments in addition to FIG. 1 described above. That is, the rectifying element 914 can also be applied to the pixels shown in other embodiments. (Embodiment 3) In this embodiment, pixels having a configuration different from those of Embodiments 1 and 2 are shown in FIGS. 10 and 11. Specifically, pixels having a configuration in which the potential supply line 123 shown in FIG. 1 is replaced with another wiring will be described. That is, any potential may be supplied to the first electrode of the first capacitive element 115, so such a configuration can be adopted. Regarding those similar to Embodiment 1, common reference numerals are used, and detailed descriptions of the same parts or parts having similar functions are omitted. That is, any potential may be supplied to the first electrode of the first capacitive element 115, so such a configuration can be adopted. Regarding those similar to Embodiment 1, common reference numerals are used, and detailed descriptions of the same parts or parts having similar functions are omitted. That is, any potential may be supplied to the first electrode of the first capacitive element 115, so such a configuration can be adopted. Regarding those similar to Embodiment 1, common reference numerals are used, and detailed descriptions of the same parts or parts having similar functions are omitted.
[0123] The pixel shown in FIG. 10(A) includes a transistor 110, a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a first capacitive element 115, a second capacitive element 116, and a light-emitting element 117. The pixel is connected to a signal line 118, a first scanning line 119, a second scanning line 120, a third scanning line 121, and a power supply line 122. The pixel shown in FIG. 10(A) includes a transistor 110, a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a first capacitive element 115, a second capacitive element 116, and a light-emitting element 117. The pixel is connected to a signal line 118, a first scanning line 119, a second scanning line 120, a third scanning line 121, and a power supply line 122. The pixel shown in FIG. 10(A) includes a transistor 110, a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a first capacitive element 115, a second capacitive element 116, and a light-emitting element 117. The pixel is connected to a signal line 118, a first scanning line 119, a second scanning line 120, a third scanning line 121, and a power supply line 122. The pixel shown in FIG. 10(A) includes a transistor 110, a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a first capacitive element 115, a second capacitive element 116, and a light-emitting element 117. The pixel is connected to a signal line 118, a first scanning line 119, a second scanning line 120, a third scanning line 121, and a power supply line 122. .
[0124] In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 10(A), it can be connected to the power supply line 122. This is because as long as a predetermined voltage can be held in the first capacitive element 115 during the initialization period and the threshold voltage writing period, the potential may be supplied to the first electrode not only via the potential supply line 123. Therefore, the power supply line 122 can be used instead of the potential supply line. By substituting the wiring for supplying the potential to the first electrode of the first capacitive element 115 with the power supply line 122 in this way, the number of wirings can be reduced, and the aperture ratio can be improved. In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 10(A), it can be connected to the power supply line 122. This is because as long as a predetermined voltage can be held in the first capacitive element 115 during the initialization period and the threshold voltage writing period, the potential may be supplied to the first electrode not only via the potential supply line 123. Therefore, the power supply line 122 can be used instead of the potential supply line. By substituting the wiring for supplying the potential to the first electrode of the first capacitive element 115 with the power supply line 122 in this way, the number of wirings can be reduced, and the aperture ratio can be improved. In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 10(A), it can be connected to the power supply line 122. This is because as long as a predetermined voltage can be held in the first capacitive element 115 during the initialization period and the threshold voltage writing period, the potential may be supplied to the first electrode not only via the potential supply line 123. Therefore, the power supply line 122 can be used instead of the potential supply line. By substituting the wiring for supplying the potential to the first electrode of the first capacitive element 115 with the power supply line 122 in this way, the number of wirings can be reduced, and the aperture ratio can be improved. In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 10(A), it can be connected to the power supply line 122. This is because as long as a predetermined voltage can be held in the first capacitive element 115 during the initialization period and the threshold voltage writing period, the potential may be supplied to the first electrode not only via the potential supply line 123. Therefore, the power supply line 122 can be used instead of the potential supply line. By substituting the wiring for supplying the potential to the first electrode of the first capacitive element 115 with the power supply line 122 in this way, the number of wirings can be reduced, and the aperture ratio can be improved. In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 10(A), it can be connected to the power supply line 122. This is because as long as a predetermined voltage can be held in the first capacitive element 115 during the initialization period and the threshold voltage writing period, the potential may be supplied to the first electrode not only via the potential supply line 123. Therefore, the power supply line 122 can be used instead of the potential supply line. By substituting the wiring for supplying the potential to the first electrode of the first capacitive element 115 with the power supply line 122 in this way, the number of wirings can be reduced, and the aperture ratio can be improved. In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 10(A), it can be connected to the power supply line 122. This is because as long as a predetermined voltage can be held in the first capacitive element 115 during the initialization period and the threshold voltage writing period, the potential may be supplied to the first electrode not only via the potential supply line 123. Therefore, the power supply line 122 can be used instead of the potential supply line. By substituting the wiring for supplying the potential to the first electrode of the first capacitive element 115 with the power supply line 122 in this way, the number of wirings can be reduced, and the aperture ratio can be improved. In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 10(A), it can be connected to the power supply line 122. This is because as long as a predetermined voltage can be held in the first capacitive element 115 during the initialization period and the threshold voltage writing period, the potential may be supplied to the first electrode not only via the potential supply line 123. Therefore, the power supply line 122 can be used instead of the potential supply line. By substituting the wiring for supplying the potential to the first electrode of the first capacitive element 115 with the power supply line 122 in this way, the number of wirings can be reduced, and the aperture ratio can be improved. In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 10(A), it can be connected to the power supply line 122. This is because as long as a predetermined voltage can be held in the first capacitive element 115 during the initialization period and the threshold voltage writing period, the potential may be supplied to the first electrode not only via the potential supply line 123. Therefore, the power supply line 122 can be used instead of the potential supply line. By substituting the wiring for supplying the potential to the first electrode of the first capacitive element 115 with the power supply line 122 in this way, the number of wirings can be reduced, and the aperture ratio can be improved.
[0125] Also, as shown in FIG. 10(B), the fourth switch 114 may be connected in parallel with the first capacitive element 115. That is, the first electrode of the first capacitive element 115 is the fourth switch 114 Also, as shown in FIG. 10(B), the fourth switch 114 may be connected in parallel with the first capacitive element 115. That is, the first electrode of the first capacitive element 115 is the fourth switch 114 It may be connected to node 131 via this. Even in such a configuration, during the initialization period and also a predetermined voltage can be held in the first capacitive element 115 during the threshold voltage writing period so that a potential can be supplied to the first electrode.
[0126] Also, as shown in the pixel of FIG. 11, the first electrode of the first capacitive element 115 is connected to the counter electrode 124 of the light emitting element 117 or to the wiring that supplies a predetermined potential to the counter electrode 124 via a fourth switch 114. That is, instead of the potential supplied from the potential supply line 123 in FIG. 1, a predetermined potential supplied to the counter electrode 124 may be used. As described above it becomes possible to reduce the number of wirings and improve the aperture ratio.
[0127] Also, the wiring connecting the first electrode of the first capacitive element 115 and the counter electrode 124 of the light emitting element 117 is not only connected to the counter electrode 124, but also contacts the counter electrode 124 and extends in parallel to be used as auxiliary wiring on the counter electrode. Of course, the auxiliary wiring is not limited to within one pixel and may extend over adjacent pixels or the entire pixel region. By such auxiliary wiring, the resistance of the counter electrode 124 can be reduced. Therefore, when the counter electrode is thinned, an increase in the resistance value can be prevented. In particular, it is effective when a transparent electrode is used for the counter electrode. Also, when the resistance value of the counter electrode becomes high, the variation in the luminance of the light emitting element 117 caused by the non-uniform in-plane potential distribution of the counter electrode due to voltage drop can be suppressed. Therefore, the reliability can be further improved.
[0128] Also, in the pixel configurations shown in FIGS. 10 and 11, the same operations as in Embodiment 1 are performed By doing so, variations in the current value due to variations in the threshold voltage of the transistor 110 can be suppressed. Therefore, a current corresponding to the luminance data can be supplied to the light-emitting element 117, and variations in luminance can be suppressed. Also, since the potential of the counter electrode is operated at a constant level, the power consumption can be reduced. Note that the operation region of the transistor 110 is not particularly limited, but when it is operated in the saturation region, variations in the current flowing through the transistor 110 due to deterioration of the light-emitting element 117 can also be suppressed. In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch. Furthermore, the pixel shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods in each row do not overlap, the start time of initialization can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light-emitting period (i.e., the duty ratio) in one frame period can be set freely. Note that the operation region of the transistor 110 is not particularly limited, but when it is operated in the saturation region, variations in the current flowing through the transistor 110 due to deterioration of the light-emitting element 117 can also be suppressed.
[0129] In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch. In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch. In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch. In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch. In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch. In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch. In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch. In addition, the potential supply line in FIG. 1 supplies an arbitrary potential to the first electrode of the first capacitive element 115 during the initialization period and the threshold voltage writing period, and it is sufficient that a predetermined voltage is held in the first capacitive element 115. Therefore, the wiring substituting for the potential supply line is not limited to the above, and any wiring that does not change in potential during the initialization period and the threshold voltage writing period may be used. For example, as shown in FIG. 12, it is also possible to use the first scanning line 119 or the third scanning line 121. However, when the third scanning line 121 is used, it should be noted that the fourth switch 114 may function as the rectifying element shown in Embodiment 2, and it is necessary to select the type of switch.
[0130] Furthermore, the pixel shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods in each row do not overlap, the start time of initialization can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light-emitting period (i.e., the duty ratio) in one frame period can be set freely. Note that the operation region of the transistor 110 is not particularly limited, but when it is operated in the saturation region, variations in the current flowing through the transistor 110 due to deterioration of the light-emitting element 117 can also be suppressed. It can be made very large and can be made approximately 100%. Therefore, a display device with little variation in luminance and a high duty ratio can be obtained.
[0131] In addition, since it is also possible to set a long threshold voltage writing period, the threshold voltage of the transistor that controls the current value flowing through the light-emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved.
[0132] Not limited to the above, the present embodiment can be freely combined with the pixel configurations shown in other embodiments. (Embodiment 4) In the present embodiment, pixels having a configuration different from those of Embodiments 1 to 3 are shown in FIGS. 13 to 16. In Embodiment 3, although a single pixel was described, it is also possible to reduce the number of wirings by sharing the wirings connected to each pixel among the pixels. In this case, various wirings can be shared as long as they operate normally. For example, it is possible to share a wiring with an adjacent pixel, and an example of the method will be described in the present embodiment. For those similar to Embodiment 1, the same reference numerals are used, and detailed descriptions of the same parts or parts having the same functions are omitted.
[0133] The pixel 1300 shown in FIG. 13 includes a transistor 110, a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a first capacitive element 115, a second capacitive element 116, and a light-emitting element 117. The pixel is connected to a signal line 118, a first scan line 119, a second scan line 120, a third scan line 121, and a power supply line 1322 of the previous row.
[0134] In the pixel of FIG. 1 shown in Embodiment 1, the first electrode of the first capacitive element 115 was connected to the potential supply line 123 via the fourth switch 114, whereas in FIG. 13, it can be connected to the front row power supply line 1322. This is because it is only necessary to supply a potential to the first electrode of the first capacitive element 115 so that a predetermined voltage can be held in the first capacitive element 115 not only during the initialization period and the threshold voltage writing period but also during the potential supply line 123. Therefore, the front row power supply line 1322 can be used instead of the potential supply line. In this way, the pixel 1300 can reduce the number of wirings by sharing the wiring with the front row pixels, and the aperture ratio can be improved. In FIG. 13, it can be connected to the front row power supply line 1322. This is because it is only necessary to supply a potential to the first electrode of the first capacitive element 115 so that a predetermined voltage can be held in the first capacitive element 115 not only during the initialization period and the threshold voltage writing period but also during the potential supply line 123. Therefore, it is only necessary to supply a potential to the first electrode of the first capacitive element 115 so that a predetermined voltage can be held in the first capacitive element 115 not only during the initialization period and the threshold voltage writing period but also during the potential supply line 123. Therefore, it is only necessary to supply a potential to the first electrode of the first capacitive element 115 so that a predetermined voltage can be held in the first capacitive element 115 not only during the initialization period and the threshold voltage writing period but also during the potential supply line 123. Therefore, the front row power supply line 1322 can be used instead of the potential supply line. In this way, the pixel 1300 can reduce the number of wirings by sharing the wiring with the front row pixels, and the aperture ratio can be improved. In this way, the pixel 1300 can reduce the number of wirings by sharing the wiring with the front row pixels, and the aperture ratio can be improved.
[0135] In addition, even in the pixel configuration shown in FIG. 13, by operating in the same manner as in Embodiment 1, it is possible to suppress variations in the current value caused by variations in the threshold voltage of the transistor 110. Therefore, it is possible to supply a current corresponding to the luminance data to the light emitting element 117 and suppress variations in luminance. In addition, since the potential of the counter electrode is kept constant and the operation is performed, the power consumption can be reduced. The operation region of the transistor 110 is not particularly limited, but when operating in the saturation region, variations in the current flowing through the transistor 110 caused by deterioration of the light emitting element 117 can also be suppressed. In addition, even in the pixel configuration shown in FIG. 13, by operating in the same manner as in Embodiment 1, it is possible to suppress variations in the current value caused by variations in the threshold voltage of the transistor 110. Therefore, it is possible to supply a current corresponding to the luminance data to the light emitting element 117 and suppress variations in luminance. Therefore, it is possible to supply a current corresponding to the luminance data to the light emitting element 117 and suppress variations in luminance. In addition, since the potential of the counter electrode is kept constant and the operation is performed, the power consumption can be reduced. The operation region of the transistor 110 is not particularly limited, but when operating in the saturation region, variations in the current flowing through the transistor 110 caused by deterioration of the light emitting element 117 can also be suppressed. The operation region of the transistor 110 is not particularly limited, but when operating in the saturation region, variations in the current flowing through the transistor 110 caused by deterioration of the light emitting element 117 can also be suppressed.
[0136] In addition, as shown in the pixel 1400 of FIG. 14, the potential supply line 123 of FIG. 1 may be shared with the first scanning line 1419 of the next row. Even in the pixel 1400, the same operation as in Embodiment 1 can be performed. However, during the initialization period and the threshold voltage writing period of the row to which the pixel 1400 belongs, In addition, as shown in the pixel 1400 of FIG. 14, the potential supply line 123 of FIG. 1 may be shared with the first scanning line 1419 of the next row. Even in the pixel 1400, the same operation as in Embodiment 1 can be performed. The data write period must not overlap with the data write period of the row that shares the wiring. be.
[0137] 15, the potential supply line 123 in FIG. 1 is turned on in the second scanning direction of the next row. The pixel 1500 may also share the same operation as that of the first embodiment. However, the initialization period and threshold voltage writing period of the row to which the pixel 1500 belongs can be The write period overlaps with the threshold voltage write period and data write period of the row that shares the wiring. It is necessary to operate it so that it overlaps with these, or not at all. The potential to be supplied to the first electrode of the first capacitor element 115 is turned on or off by turning on the second switch 112. Either one of the signals to turn on the output of the power supply or the output of the power supply is used.
[0138] In addition to the above, the potential supply line 123 in FIG. 1 is connected to the third scanning line 1 in the previous row as shown in FIG. However, the initialization period and threshold voltage of the row to which the pixel 1600 belongs may be shared with the pixel 621. The voltage write period is the threshold voltage write period and data write period for rows that share wiring. It is necessary to operate it so that it does not overlap with.
[0139] In this embodiment, the potential supply line 123 in FIG. 1 is the power supply line of the previous column, or the power supply line of the next row or the previous row. The case where the scanning line is shared with the row scanning line has been shown, but the initialization period and the threshold voltage writing period A potential is supplied to the first electrode so that a predetermined voltage is held in the first capacitor element 115. Any other wiring may be used as long as it is possible to achieve this.
[0140] Furthermore, the pixel shown in this embodiment can be applied to the display device shown in FIG. In the display device, the constraints on the operation of each pixel and the data in each row shown in FIG. The initialization start time for each row can be set freely within the range where the data writing period does not overlap. In addition, each pixel can emit light except during its own address period, so The ratio of the light emission period to the light emission period (i.e., the duty ratio) can be made very large, so that Therefore, the brightness variation is small and the duty ratio is A high-quality display device can be obtained.
[0141] In addition, it is possible to set the threshold voltage writing period to be long, so that the current It is possible to write the threshold voltage of the transistor that controls the current value to the capacitor more accurately. This improves the reliability of the display device.
[0142] This embodiment is not limited to the above, and can be freely combined with the pixel configurations shown in other embodiments. It is possible. (Embodiment 5) In this embodiment, a pixel having a different configuration from that in the first embodiment is shown in FIG. The same reference numerals are used for the same parts as those in the first embodiment, and the same parts or similar functions are shown. A detailed description of the included parts will be omitted.
[0143] The pixel shown in FIG. 29 includes a transistor 2910, a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a first capacitance element 115, a second The pixel includes a capacitor 116 and a light-emitting element 117. 119, a second scanning line 120, a third scanning line 121, a power supply line 122, and a potential supply line 12 3 is connected.
[0144] The transistor 2910 in this embodiment is a multi-gate transistor in which two transistors are connected in series, and is provided at the same position as the transistor 110 in Embodiment 1. However, the number of transistors connected in series is not particularly limited. By operating the pixel shown in FIG. 29 in the same manner as the pixel in FIG. 1, it is possible to suppress variations in the current value caused by variations in the threshold voltage of the transistor 2910. Therefore, a current corresponding to the luminance data can be supplied to the light-emitting element 117, and variations in luminance can be suppressed. In addition, since the potential of the counter electrode is operated to be constant, power consumption can be reduced. Note that the operation region of the transistor 2910 is not particularly limited, but when it is operated in the saturation region, variations in the current flowing through the transistor 2910 due to deterioration of the light-emitting element 117 can also be suppressed. When the channel widths of the two transistors connected in series are equal, the channel length L of the transistor 2910 in this embodiment acts as the sum of the channel lengths of each transistor. Therefore, regardless of the drain-source voltage Vds in the saturation region, a current value closer to being constant can be easily obtained. In particular, this is effective when it is difficult to fabricate a transistor having a long channel length L. Note that the connection portion of the two transistors functions as a resistance.
[0145] Note that the transistor 2910 only needs to have a function of controlling the current value supplied to the light-emitting element 117, and the type of transistor is not particularly limited. Therefore, a crystalline semiconductor film can be used. By operating the pixel shown in FIG. 29 in the same manner as the pixel in FIG. 1, it is possible to suppress variations in the current value caused by variations in the threshold voltage of the transistor 2910. Therefore, a current corresponding to the luminance data can be supplied to the light-emitting element 117, and variations in luminance can be suppressed. In addition, since the potential of the counter electrode is operated to be constant, power consumption can be reduced. Note that the operation region of the transistor 2910 is not particularly limited, but when it is operated in the saturation region, variations in the current flowing through the transistor 2910 due to deterioration of the light-emitting element 117 can also be suppressed. When the channel widths of the two transistors connected in series are equal, the channel length L of the transistor 2910 in this embodiment acts as the sum of the channel lengths of each transistor. Therefore, regardless of the drain-source voltage Vds in the saturation region, a current value closer to being constant can be easily obtained. In particular, this is effective when it is difficult to fabricate a transistor having a long channel length L. Note that the connection portion of the two transistors functions as a resistance. Note that the transistor 2910 only needs to have a function of controlling the current value supplied to the light-emitting element 117, and the type of transistor is not particularly limited. Therefore, a crystalline semiconductor film can be used. By operating the pixel shown in FIG. 29 in the same manner as the pixel in FIG. 1, it is possible to suppress variations in the current value caused by variations in the threshold voltage of the transistor 2910. Therefore, a current corresponding to the luminance data can be supplied to the light-emitting element 117, and variations in luminance can be suppressed. In addition, since the potential of the counter electrode is operated to be constant, power consumption can be reduced. Note that the operation region of the transistor 2910 is not particularly limited, but when it is operated in the saturation region, variations in the current flowing through the transistor 2910 due to deterioration of the light-emitting element 117 can also be suppressed. When the channel widths of the two transistors connected in series are equal, the channel length L of the transistor 2910 in this embodiment acts as the sum of the channel lengths of each transistor. Therefore, regardless of the drain-source voltage Vds in the saturation region, a current value closer to being constant can be easily obtained. In particular, this is effective when it is difficult to fabricate a transistor having a long channel length L. Note that the connection portion of the two transistors functions as a resistance. Note that the transistor 2910 only needs to have a function of controlling the current value supplied to the light-emitting element 117, and the type of transistor is not particularly limited. Therefore, a crystalline semiconductor film can be used.
[0146] The channel length L of the transistor 2910 in this embodiment acts as the sum of the channel lengths of the two transistors connected in series when the channel widths of the two transistors are equal. Therefore, regardless of the drain-source voltage Vds in the saturation region, a more constant current value can be easily obtained. In particular, the transistor 2910 is effective when it is difficult to fabricate a transistor having a long channel length L. Note that the connection portion of the two transistors functions as a resistance. Note that the transistor 2910 only needs to have a function of controlling the current value supplied to the light-emitting element 117, and the type of transistor is not particularly limited. Therefore, a crystalline semiconductor film can be used. The channel length L of the transistor 2910 in this embodiment acts as the sum of the channel lengths of the two transistors connected in series when the channel widths of the two transistors are equal. Therefore, regardless of the drain-source voltage Vds in the saturation region, a more constant current value can be easily obtained. In particular, the transistor 2910 is effective when it is difficult to fabricate a transistor having a long channel length L. Note that the connection portion of the two transistors functions as a resistance. Note that the transistor 2910 only needs to have a function of controlling the current value supplied to the light-emitting element 117, and the type of transistor is not particularly limited. Therefore, a crystalline semiconductor film can be used. The channel length L of the transistor 2910 in this embodiment acts as the sum of the channel lengths of the two transistors connected in series when the channel widths of the two transistors are equal. Therefore, regardless of the drain-source voltage Vds in the saturation region, a more constant current value can be easily obtained. In particular, the transistor 2910 is effective when it is difficult to fabricate a transistor having a long channel length L. Note that the connection portion of the two transistors functions as a resistance. Note that the transistor 2910 only needs to have a function of controlling the current value supplied to the light-emitting element 117, and the type of transistor is not particularly limited. Therefore, a crystalline semiconductor film can be used.
[0147] Note that the transistor 2910 only needs to have a function of controlling the current value supplied to the light-emitting element 117, and the type of transistor is not particularly limited. Therefore, a crystalline semiconductor film can be used. Note that the transistor 2910 only needs to have a function of controlling the current value supplied to the light-emitting element 117, and the type of transistor is not particularly limited. Therefore, a crystalline semiconductor film can be used. The thin film transistors (TFTs) that can be applied include those using an amorphous semiconductor film typified by amorphous silicon and polycrystalline silicon, thin film transistors using a semiconductor substrate or an SOI substrate, transistors formed using a MOS type transistor, a junction type transistor, a bipolar transistor, transistors using a compound semiconductor such as ZnO or a-InGaZnO, transistors using an organic semiconductor or a carbon nanotube, and other transistors. In addition, the pixels shown in FIG. 29 can use transistors or the like for the first switch 111, the second switch 112, the third switch 113, and the fourth switch 114, similar to the pixels shown in FIG. 1. Furthermore, the pixels shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods for each row do not overlap, the start time of initialization can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light emission period (i.e., the duty ratio) in one frame period can be made very large and can be approximately 100%. Therefore, a display device with less variation in luminance and a high duty ratio can be obtained. Also, since it is possible to set the threshold voltage writing period longer, the threshold voltage of the transistor that controls the current value flowing through the light emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved. Note that the transistor 2910 is not limited to transistors connected in series, and can also be the transistors in FIG. 30.
[0148] In addition, the pixels shown in FIG. 29 can use transistors or the like for the first switch 111, the second switch 112, the third switch 113, and the fourth switch 114, similar to the pixels shown in FIG. 1. Furthermore, the pixels shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods for each row do not overlap, the start time of initialization can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light emission period (i.e., the duty ratio) in one frame period can be made very large and can be approximately 100%. Therefore, a display device with less variation in luminance and a high duty ratio can be obtained. Also, since it is possible to set the threshold voltage writing period longer, the threshold voltage of the transistor that controls the current value flowing through the light emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved.
[0149] Furthermore, the pixels shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods for each row do not overlap, the start time of initialization can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light emission period (i.e., the duty ratio) in one frame period can be made very large and can be approximately 100%. Therefore, a display device with less variation in luminance and a high duty ratio can be obtained. Also, since it is possible to set the threshold voltage writing period longer, the threshold voltage of the transistor that controls the current value flowing through the light emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved. Note that the transistor 2910 is not limited to transistors connected in series, and can also be the transistors in FIG. 30. Furthermore, the pixels shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods for each row do not overlap, the start time of initialization can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light emission period (i.e., the duty ratio) in one frame period can be made very large and can be approximately 100%. Therefore, a display device with less variation in luminance and a high duty ratio can be obtained. Also, since it is possible to set the threshold voltage writing period longer, the threshold voltage of the transistor that controls the current value flowing through the light emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved. Note that the transistor 2910 is not limited to transistors connected in series, and can also be the transistors in FIG. 30.
[0150] Also, since it is possible to set the threshold voltage writing period longer, the threshold voltage of the transistor that controls the current value flowing through the light emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved. Note that the transistor 2910 is not limited to transistors connected in series, and can also be the transistors in FIG. 30. Furthermore, the pixels shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods for each row do not overlap, the start time of initialization can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light emission period (i.e., the duty ratio) in one frame period can be made very large and can be approximately 100%. Therefore, a display device with less variation in luminance and a high duty ratio can be obtained.
[0151] Note that the transistor 2910 is not limited to transistors connected in series, and can also be the transistors in FIG. 30. It may also be configured such that transistors are connected in parallel as shown in the transistor 3010. The transistor 3010 can supply a larger current to the light-emitting element 117. In addition, the characteristics of the transistors are averaged by two transistors connected in parallel, so that the variation in the original characteristics of the transistors constituting the transistor 3010 can be made smaller. Therefore, when the variation is small, it is easier to suppress the variation in the current value caused by the variation in the threshold voltage of the transistor.
[0152] Further, each of the transistors connected in parallel shown in the transistor 3010 may be further connected in series like the transistor 2910 shown in FIG. 29.
[0153] Not limited to the above, the present embodiment can be freely combined with the pixel configurations shown in other embodiments. That is, the transistor 2910 or the transistor 3010 can also be applied to the pixel configurations shown in other embodiments. (Embodiment 6) In the present embodiment, a pixel configuration for averaging the deterioration of a transistor over time by switching the transistor that controls the current value supplied to the light-emitting element in the pixel of the present invention for each period will be described with reference to FIG. 31. The pixel shown in FIG. 31 includes a first transistor 3101, a second transistor 3102, a
[0154] first switch 3111, a second switch 3112, a third switch 3113, a fourth switch 3114, a fifth switch 3103, a sixth switch 3104, a first capacitive element 31 15, a second capacitive element 3116, and a light-emitting element 3117. Note that the pixel has signal lines 31 18. The first scanning line 3119, the second scanning line 3120, the third scanning line 3121, and the power supply line 3 are connected to the 122 and the potential supply line 3123. Although not shown in FIG. 31 , the fourth and the fifth scanning lines are also connected to the fifth switch 3103 and the sixth switch 3104 to control their on and off states. In this embodiment, the first transistor 3101 and the second transistor 3102 are N-channel transistors, and each transistor enters the conducting state when the gate-source voltage (Vgs) exceeds the threshold voltage. Also, the pixel electrode of the light-emitting element 3117 is an anode, and the counter electrode 3124 is a cathode. Note that the gate-source voltage of the transistor is Vgs, and the voltages stored in the first capacitor element 3115 and the second capacitor element 3116 are denoted as Vc1 and Vc2, respectively. Also, the threshold voltage of the first transistor 3101 is denoted as Vth1, and the threshold voltage of the second transistor 3102 is denoted as Vth2. The power supply line 3122, the potential supply line 3123, and the signal line 3118 are also referred to as the first wiring, the second wiring, and the third wiring, respectively.
[0155] One of the first electrodes (either the source electrode or the drain electrode) of the first transistor 3101 is connected to the pixel electrode of the light-emitting element 3117 via the fifth switch 3103, and the second electrode ( the other of the source electrode and the drain electrode) is connected to the power supply line 3122 via the second switch 3112. Also, the gate electrode of the first transistor 3101 is connected to the power supply line 3122 via the third switch 3113 and the second switch 3112. Note that the third switch 3113 connects the gate electrode of the first transistor 3101 to the second switch 3112. is connected between the first transistor 3101 and the second electrode, and the second electrode of the first transistor 3101 and the second The connection point between the wiring to which the switch 3112 and the third switch 3113 are connected is the node 3133.
[0156] One of the first electrodes (either the source electrode or the drain electrode) of the second transistor 3102 is connected to the pixel electrode of the light-emitting element 3117 via the sixth switch 3104, and the second electrode ( the other of the source electrode and the drain electrode) is connected to the second electrode of the first transistor 3101 . If the connection point between the second electrode of the first transistor 3101 and the second electrode of the second transistor 31 02 is the node 3132, the node 3132 is connected to the node 31 33. Also, the gate electrode of the second transistor 3102 is connected to the node 3133 via the third switch 3113. Note that the gate electrode of the first transistor 310 1 and the gate electrode of the second transistor 3102 are connected.
[0157] Also, if the connection point between the gate electrodes of the first transistor 3101 and the second transistor 3102 and the third switch 3113 is the node 3130, the node 3130 is connected to the signal line 3118 via the first capacitor element 3115 and the first switch 3111. That is, the first electrode of the first capacitor element 3115 is connected to the signal line 3118 via the first switch 3111, and the second electrode is connected to the gate electrodes of the first transistor 3101 and the second transistor 31 02. Also, the first electrode of the first capacitor element 3115 is also connected to the potential supply line 3123 via the fourth switch 3114. The node 3130 is also connected to the potential supply line 3123 via the fourth switch 3114. The node 3130 is It is also connected to the pixel electrode of the light-emitting element 3117 via the second capacitive element 3116. That is, the first electrode of the second capacitive element 3116 is the gate electrode of the first transistor 3101 and the second transistor 3102, and the second electrode is connected to the first electrode of the first transistor 3101 and the second transistor 3102 via the fifth switch 3103 or the sixth switch 3104. These capacitive elements may be formed by sandwiching an insulating film with wiring, a semiconductor layer, and an electrode. In some cases, the second capacitive element 3116 may be omitted by using the gate capacitance of the first transistor 3101 and the second transistor 3102. and the second transistor 3102. It is also possible to omit the second capacitive element 3116 by using the gate capacitance of the first transistor 3101 and the second transistor 3102.
[0158] Note that by inputting signals to the first scanning line 3119, the second scanning line 3120, and the third scanning line 3121, the on / off states of the first switch 3111, the second switch 3112, the third switch 3113, and the fourth switch 3114 are controlled respectively. As described above, in FIG. 31, the scanning lines for controlling the on / off states of the fifth switch 3103 and the sixth switch 3104 are omitted. switch 3113, and the fourth switch 3114 are controlled respectively. As described above, in FIG. 31, the scanning lines for controlling the on / off states of the fifth switch 3103 and the sixth switch 3104 are omitted. switch 3113, and the fourth switch 3114 are controlled respectively. As described above, in FIG. 31, the scanning lines for controlling the on / off states of the fifth switch 3103 and the sixth switch 3104 are omitted. switch 3113, and the fourth switch 3114 are controlled respectively. As described above, in FIG. 31, the scanning lines for controlling the on / off states of the fifth switch 3103 and the sixth switch 3104 are omitted.
[0159] A signal corresponding to the gradation of the pixel corresponding to the video signal, that is, a potential corresponding to the luminance data, is input to the signal line 3118. A signal corresponding to the gradation of the pixel corresponding to the video signal, that is, a potential corresponding to the luminance data, is input to the signal line 3118.
[0160] Next, the operation of the pixel shown in FIG. 31 will be described using the timing chart of FIG. 32. Note that in FIG. 32, one frame period corresponding to the period of displaying one screen of an image is divided into an initialization period, a threshold voltage writing period, a data writing period, and a light-emitting period. Next, the operation of the pixel shown in FIG. 31 will be described using the timing chart of FIG. 32. Note that in FIG. 32, one frame period corresponding to the period of displaying one screen of an image is divided into an initialization period, a threshold voltage writing period, a data writing period, and a light-emitting period. Next, the operation of the pixel shown in FIG. 31 will be described using the timing chart of FIG. 32. Note that in FIG. 32, one frame period corresponding to the period of displaying one screen of an image is divided into an initialization period, a threshold voltage writing period, a data writing period, and a light-emitting period. Next, the operation of the pixel shown in FIG. 31 will be described using the timing chart of FIG. 32. Note that in FIG. 32, one frame period corresponding to the period of displaying one screen of an image is divided into an initialization period, a threshold voltage writing period, a data writing period, and a light-emitting period.
[0161] Note that a potential of V1 (V1: an arbitrary number) is input to the counter electrode 3124 of the light-emitting element 3117. Also, let V be the potential difference that is at least required for the light-emitting element 3117 to emit light. EL Then, a potential of V1 + V EL + Vth + α (α: an arbitrary positive number) is input to the power supply line 3122. That is, the power supply line 3122 may have a potential of V1 + V EL + Vth + α or higher. Note that Vth is the larger value of Vth1 or Vth2. The potential of the potential supply line 312 3 is not particularly limited, but it is preferably within the range of the potential input to the panel on which the pixels are formed. This makes it unnecessary to separately fabricate a power supply. Here, let the potential of the potential supply line 3123 be V2.
[0162] First, as shown in FIG. 32(A), in the initialization period, the first switch 3111 and the sixth switch 3104 are turned off, and the second switch 3112, the third switch 3113, the fourth switch 3114, and the fifth switch 3103 are turned on. At this time, the first transistor 3101 is in a conductive state, and V1 + V EL + Vth + α - V2 is held in the first capacitive element 3115, and Vth + α is held in the second capacitive element 3116. Note that during this initialization period, a predetermined voltage may be held in the first capacitive element 3115, and a voltage higher than at least Vth1 may be held in the second capacitive element 3116.
[0163] In the threshold voltage writing period shown in FIG. 32(B), the second switch 3112 is turned off. Therefore, the potential of the first electrode, i.e., the source electrode, of the first transistor 3101 gradually rises, and the gate - source voltage Vgs of the first transistor 3101 becomes the threshold voltage. When it reaches Vth1), the first transistor 3101 becomes non-conductive. Therefore, the voltage Vc2 held in the second capacitor element 3116 becomes approximately Vth1.
[0164] In the subsequent data writing period shown in Fig. 32(C), after turning off the third switch 3113 and the fourth switch 3114, the first switch 3111 is turned on, and a potential (V2 + Vdata) corresponding to the luminance data is input from the signal line 3118. At this time, the voltage Vc2 held in the second capacitor element 3116 is Vth1 + Vdata×(C1 / (C1 + C2)) when the capacitances of the first capacitor element 3115, the second capacitor element 3116, and the light emitting element 3117 are C1, C2, and C3 respectively, where C 3 >> C1, C2.
[0165] Although C1 and C2 are necessary when determining the potential supplied from the signal line 3118, these relationships are not particularly limited. When C1 > C2, the amplitude of Vdata associated with the luminance change can be reduced, so the power consumption can be reduced. On the other hand, when C 2 > C1, changes in Vc2 due to the on / off of surrounding switches and off-currents can be suppressed . Due to these conflicting effects, it is preferable that C1 and C2 are equal, and the sizes of the first capacitor element 31 15 and the second capacitor element 3116 are the same.
[0166] If it is desired to turn off the light emitting element 3117 in the next light emitting period, a potential of Vdata ≦0 may be input.
[0167] Next, in the light emitting period shown in Fig. 32(D), after turning off the first switch 3111, the Turn on the switch 3112 of 2. At this time, the gate-source voltage Vgs of the first transistor 3101 is Vth1 + Vdata×(C1 / (C1 + C2)), and a current corresponding to the luminance data flows through the first transistor 3101 and the light-emitting element 3117, and the light-emitting element 3117 emits light. The voltage between the gate and the source of the first transistor 3101 becomes Vth1 + Vdata×(C1 / (C1 + C2)), and a current corresponding to the luminance data flows through the first transistor 3101 and the light-emitting element 3117, and the light-emitting element 3117 emits light. The voltage between the gate and the source of the first transistor 3101 becomes Vth1 + Vdata×(C1 / (C1 + C2)), and a current corresponding to the luminance data flows through the first transistor 3101 and the light-emitting element 3117, and the light-emitting element 3117 emits light. The voltage between the gate and the source of the first transistor 3101 becomes Vth1 + Vdata×(C1 / (C1 + C2)), and a current corresponding to the luminance data flows through the first transistor 3101 and the light-emitting element 3117, and the light-emitting element 3117 emits light.
[0168] By such an operation, the current flowing through the light-emitting element 3117 does not depend on the threshold voltage (Vth1) of the first transistor 3101 regardless of whether the operating region of the first transistor 3101 is the saturation region or the linear region. By such an operation, the current flowing through the light-emitting element 3117 does not depend on the threshold voltage (Vth1) of the first transistor 3101 regardless of whether the operating region of the first transistor 3101 is the saturation region or the linear region. By such an operation, the current flowing through the light-emitting element 3117 does not depend on the threshold voltage (Vth1) of the first transistor 3101 regardless of whether the operating region of the first transistor 3101 is the saturation region or the linear region.
[0169] Furthermore, in the initialization period in the next one-frame period shown in Fig. 32(E), turn off the fifth switch 3103, and turn on the third switch 3113, the fourth switch 3114, and the sixth switch 3104. The second transistor 3102 is turned on, and V1 + V + Vth + α - V2 is held in the first capacitive element 3115, and Vth + α is held in the second capacitive element 3116. Note that in this initialization period, it is sufficient that a predetermined voltage is held in the first capacitive element 3115 and a voltage higher than at least Vth2 is held in the second capacitive element 3116. Furthermore, in the initialization period in the next one-frame period shown in Fig. 32(E), turn off the fifth switch 3103, and turn on the third switch 3113, the fourth switch 3114, and the sixth switch 3104. The second transistor 3102 is turned on, and V1 + V + Vth + α - V2 is held in the first capacitive element 3115, and Vth + α is held in the second capacitive element 3116. Note that in this initialization period, it is sufficient that a predetermined voltage is held in the first capacitive element 3115 and a voltage higher than at least Vth2 is held in the second capacitive element 3116. EL + Vth + α - V2 is held in the first capacitive element 3115, and Vth + α is held in the second capacitive element 3116. Note that in this initialization period, it is sufficient that a predetermined voltage is held in the first capacitive element 3115 and a voltage higher than at least Vth2 is held in the second capacitive element 3116. + Vth + α - V2 is held in the first capacitive element 3115, and Vth + α is held in the second capacitive element 3116. Note that in this initialization period, it is sufficient that a predetermined voltage is held in the first capacitive element 3115 and a voltage higher than at least Vth2 is held in the second capacitive element 3116. + Vth + α - V2 is held in the first capacitive element 3115, and Vth + α is held in the second capacitive element 3116. Note that in this initialization period, it is sufficient that a predetermined voltage is held in the first capacitive element 3115 and a voltage higher than at least Vth2 is held in the second capacitive element 3116. + Vth + α - V2 is held in the first capacitive element 3115, and Vth + α is held in the second capacitive element 3116. Note that in this initialization period, it is sufficient that a predetermined voltage is held in the first capacitive element 3115 and a voltage higher than at least Vth2 is held in the second capacitive element 3116.
[0170] Next, in the threshold voltage writing period shown in Fig. 32(F), turn off the second switch 3112. Therefore, the potential of the first electrode, that is, the source electrode, of the second transistor 3102 gradually increases, and when the gate-source voltage Vgs of the second transistor 3102 becomes the threshold voltage (Vth2), the second transistor 3102 becomes non-conductive. Thus, the voltage Vc2 held in the second capacitive element 3116 becomes approximately Vth2. Next, in the threshold voltage writing period shown in Fig. 32(F), turn off the second switch 3112. Therefore, the potential of the first electrode, that is, the source electrode, of the second transistor 3102 gradually increases, and when the gate-source voltage Vgs of the second transistor 3102 becomes the threshold voltage (Vth2), the second transistor 3102 becomes non-conductive. Thus, the voltage Vc2 held in the second capacitive element 3116 becomes approximately Vth2. Next, in the threshold voltage writing period shown in Fig. 32(F), turn off the second switch 3112. Therefore, the potential of the first electrode, that is, the source electrode, of the second transistor 3102 gradually increases, and when the gate-source voltage Vgs of the second transistor 3102 becomes the threshold voltage (Vth2), the second transistor 3102 becomes non-conductive. Thus, the voltage Vc2 held in the second capacitive element 3116 becomes approximately Vth2. Next, in the threshold voltage writing period shown in Fig. 32(F), turn off the second switch 3112. Therefore, the potential of the first electrode, that is, the source electrode, of the second transistor 3102 gradually increases, and when the gate-source voltage Vgs of the second transistor 3102 becomes the threshold voltage (Vth2), the second transistor 3102 becomes non-conductive. Thus, the voltage Vc2 held in the second capacitive element 3116 becomes approximately Vth2. Next, in the threshold voltage writing period shown in Fig. 32(F), turn off the second switch 3112. Therefore, the potential of the first electrode, that is, the source electrode, of the second transistor 3102 gradually increases, and when the gate-source voltage Vgs of the second transistor 3102 becomes the threshold voltage (Vth2), the second transistor 3102 becomes non-conductive. Thus, the voltage Vc2 held in the second capacitive element 3116 becomes approximately Vth2.
[0171] During the data writing period shown in FIG. 32(G) thereafter, after turning off the third switch 3113 and the fourth switch 3114, turn on the first switch 3111 and input a potential (V2 + Vdata) corresponding to the luminance data from the signal line 3118. At this time, the voltage Vc2 held in the second capacitor element 116 becomes Vth2 + Vdata×(C1 / (C 1 + C2)).
[0172] Next, in the light emitting period shown in FIG. 32(H), after turning off the first switch 3111, turn on the second switch 3112. At this time, the gate-source voltage Vgs of the second transistor 3102 becomes Vth2 + Vdata×(C1 / (C1 + C2)), and a current corresponding to the luminance data flows through the second transistor 3102 and the light emitting element 3117, and the light emitting element 3117 emits light. 3117 emits light.
[0173] Also, regardless of whether the operating region of the second transistor 3102 is the saturation region or the linear region the current flowing through the light emitting element 3117 does not depend on the threshold voltage (Vth2).
[0174] Therefore, even if the current supplied to the light emitting element is controlled using either the first transistor 3101 or the second transistor 3102, the variation in the current value due to the dispersion of the threshold voltage of the transistor can be suppressed, and a current value corresponding to the luminance data can be supplied to the light emitting element 31 17. By switching between the first transistor 3101 and the second transistor 3102 and using them, the load applied to one transistor can be reduced, and the change in the threshold voltage of the transistor over time can be made small. 3102, the change in the threshold voltage of the transistor over time can be made small. This can make the change in the threshold voltage of the transistor over time small.
[0175] From the above, it is possible to suppress the variation in luminance caused by the threshold voltages of the first transistor 3101 and the second transistor 3102. Also, since the potential of the counter electrode is made constant, it is possible to reduce the power consumption. Moreover, when the first transistor 3101 and the second transistor 3102 are operated in the saturation region, the variation in the current flowing through each transistor due to the deterioration of the light-emitting element 3117 can also be suppressed. When the first transistor 3101 and the second transistor 3102 are operated in the saturation region, it is more preferable that the channel length L of these transistors is longer.
[0176] Furthermore, since the present invention can suppress the variation in the current value caused by the variation in the threshold voltage of the transistor, the supply destination of the current controlled by the transistor is not particularly limited. Therefore, the light-emitting element 3117 shown in FIG. 31 can typically be an EL element (organic EL element, inorganic EL element, or EL element including an organic substance and an inorganic substance). Also, instead of the light-emitting element 3117, an electron-emitting element, a liquid crystal element, electronic ink, etc. can be applied. In addition, the first transistor 3101 and the second transistor 3102 only need to have a function of controlling the current value supplied to the light-emitting element 3117, so the type of the transistor is not particularly limited. Therefore, a thin-film transistor (TFT) using a crystalline semiconductor film, a thin-film transistor using a non-single-crystalline semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor
[0177] Note that when the first transistor 3101 and the second transistor 3102 are operated in the saturation region, the channel length L of these transistors is preferably longer. In addition, since the present invention can suppress the variation in the current value caused by the variation in the threshold voltage of the transistor, the supply destination of the current controlled by the transistor is not particularly limited. Therefore, the light-emitting element 3117 shown in FIG. 31 can typically be an EL element (organic EL element, inorganic EL element, or EL element including an organic substance and an inorganic substance). Also, instead of the light-emitting element 3117, an electron-emitting element, a liquid crystal element, electronic ink, etc. can be applied.
[0178] Moreover, since the present invention can suppress the variation in the current value caused by the variation in the threshold voltage of the transistor, the supply destination of the current controlled by the transistor is not particularly limited. Therefore, the light-emitting element 3117 shown in FIG. 31 can typically be an EL element (organic EL element, inorganic EL element, or EL element including an organic substance and an inorganic substance). Also, instead of the light-emitting element 3117, an electron-emitting element, a liquid crystal element, electronic ink, etc. can be applied. Furthermore, since the present invention can suppress the variation in the current value caused by the variation in the threshold voltage of the transistor, the supply destination of the current controlled by the transistor is not particularly limited. Therefore, the light-emitting element 3117 shown in FIG. 31 can typically be an EL element (organic EL element, inorganic EL element, or EL element including an organic substance and an inorganic substance). Also, instead of the light-emitting element 3117, an electron-emitting element, a liquid crystal element, electronic ink, etc. can be applied. Moreover, since the present invention can suppress the variation in the current value caused by the variation in the threshold voltage of the transistor, the supply destination of the current controlled by the transistor is not particularly limited. Therefore, the light-emitting element 3117 shown in FIG. 31 can typically be an EL element (organic EL element, inorganic EL element, or EL element including an organic substance and an inorganic substance). Also, instead of the light-emitting element 3117, an electron-emitting element, a liquid crystal element, electronic ink, etc. can be applied. Moreover, since the present invention can suppress the variation in the current value caused by the variation in the threshold voltage of the transistor, the supply destination of the current controlled by the transistor is not particularly limited. Therefore, the light-emitting element 3117 shown in FIG. 31 can typically be an EL element (organic EL element, inorganic EL element, or EL element including an organic substance and an inorganic substance). Also, instead of the light-emitting element 3117, an electron-emitting element, a liquid crystal element, electronic ink, etc. can be applied. In addition, since the first transistor 3101 and the second transistor 3102 only need to have a function of controlling the current value supplied to the light-emitting element 3117, the type of the transistor is not particularly limited. Therefore, a thin-film transistor (TFT) using a crystalline semiconductor film, a thin-film transistor using a non-single-crystalline semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor
[0179] In addition, the first transistor 3101 and the second transistor 3102 only need to have a function of controlling the current value supplied to the light-emitting element 3117, so the type of the transistor is not particularly limited. Therefore, a thin-film transistor (TFT) using a crystalline semiconductor film, a thin-film transistor using a non-single-crystalline semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor In addition, since the first transistor 3101 and the second transistor 3102 only need to have a function of controlling the current value supplied to the light-emitting element 3117, the type of the transistor is not particularly limited. Therefore, a thin-film transistor (TFT) using a crystalline semiconductor film, a thin-film transistor using a non-single-crystalline semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor In addition, since the first transistor 3101 and the second transistor 3102 only need to have a function of controlling the current value supplied to the light-emitting element 3117, the type of the transistor is not particularly limited. Therefore, a thin-film transistor (TFT) using a crystalline semiconductor film, a thin-film transistor using a non-single-crystalline semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor In addition, since the first transistor 3101 and the second transistor 3102 only need to have a function of controlling the current value supplied to the light-emitting element 3117, the type of the transistor is not particularly limited. Therefore, a thin-film transistor (TFT) using a crystalline semiconductor film, a thin-film transistor using a non-single-crystalline semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor Transistors formed using solid-state or SOI substrates, MOS transistors, junction transistors Transistors, bipolar transistors, compound semiconductors such as ZnO and a-InGaZnO transistors using organic semiconductors and carbon nanotubes, Other transistors may be applied.
[0180] The first switch 3111 outputs a potential corresponding to the luminance data, that is, a signal, from a signal line 3118 to the image display. The timing of inputting the voltage to the first capacitance element 3115 is selected, and the voltage held in the first capacitance element 3115 and the The voltage held in the second capacitance element 3116, i.e., the voltage of the first transistor 3101 or the second transistor The gate-source voltage of the second transistor 3102 is changed. The switch 3112 is connected to the first transistor 3101 or the second transistor 3102. The timing for supplying a predetermined potential to the second electrode is selected. In addition, the second electrode of the first capacitor 3115 and the first electrode of the second capacitor 3116 are The third switch 3113 supplies the predetermined potential. The connection between the gate electrode of the second transistor 3102 and the second electrode of each transistor The fourth switch 3114 controls the connection of the first capacitance element The timing for holding a predetermined voltage in the first capacitance element 3115 is selected. The first switch controls whether or not a predetermined potential is supplied to the electrode. 3111, a second switch 3112, a third switch 3113, and a fourth switch 3114 There are no particular limitations on the type of the semiconductor device as long as it has the above-mentioned function. For example, the semiconductor device may be a transistor or a diode. Alternatively, a logic circuit that combines these may be used. The second switch 3112 and the fourth switch 3114 are not particularly necessary as long as they can supply signals or electric potential to the pixels at the above timing. Also, the third switch 3113 is not particularly necessary as long as it can realize the above function.
[0181] For example, when N-channel type transistors are used for the first switch 3111, the second switch 3112, the third switch 3113, the fourth switch 3114, the fifth switch 3103, and the sixth switch 3104, the pixels can be composed of only N-channel type transistors, so that the manufacturing process can be simplified. Also, amorphous semiconductors, semi-amorphous semiconductors, etc. can be used for the semiconductor layers of the transistors constituting the pixels. For example, amorphous silicon (a-Si:H) can be cited as an amorphous semiconductor. By using these semiconductors, further simplification of the manufacturing process is possible. Therefore, it is possible to reduce the manufacturing cost and improve the yield.
[0182] Incidentally, when transistors are used for the first switch 3111, the second switch 3112, the third switch 3113, the fourth switch 3114, the fifth switch 3103, and the sixth switch 3104, the polarity (conductivity type) of the transistors is not particularly limited. However, it is desirable to use transistors with low off-current.
[0183] Also, the first transistor 3101 and the fifth switch 3103 and the second transistor 3102 and the sixth switch 3104 may be interchanged as shown in FIG. 37. That is, the first The electrode is connected to the gate electrodes of the first transistor 3101 and the second transistor 3102 via the second capacitive element 3116. Also, the second electrode of the first transistor 3101 is connected to the node 3132 via the fifth switch 3103, and the second electrode of the second transistor 3102 is connected to the node 3132 via the sixth switch 3104.
[0184] Also, in FIGS. 31 and 37, the case where the number of parallel transistors and switches is set to 2, that is, the first transistor 3101 and the fifth switch 3103, and the second transistor 3102 and the sixth switch 3104 are set, is described. However, the number of elements arranged in parallel is not particularly limited.
[0185] Also, by applying the pixel shown in this embodiment to the display device of FIG. 7, similar to Embodiment 1, as long as the data writing periods in each row do not overlap, the initialization start timing can be freely set for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light emission period in one frame period (i.e., the duty ratio) can be made very large, and can be approximately 100%. Therefore, a display device with little variation in luminance and a high duty ratio can be obtained.
[0186] Also, since it is possible to set the threshold voltage writing period long, the threshold voltage of the transistor that controls the current value flowing through the light emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved.
[0187] Note that also in this embodiment, as shown in Embodiment 3, the potential supply line 3123 is the same It may be substituted with the wiring within the pixel or shared with the wiring of other rows as in Embodiment 4. Also , for each of the first transistor 3101 and the second transistor 3102, a multi-gate transistor in which transistors are connected in series or transistors arranged in parallel may be used. Not limited to these, this embodiment can be applied to the pixel configurations shown in Embodiments 1 to 5. is applicable. (Embodiment 7) In this embodiment, a pixel having a configuration different from that of Embodiment 1 is shown. Regarding the same matters as in Embodiment 1, common reference numerals are used, and detailed descriptions of the same parts or parts having similar functions are omitted. Note that these operate in the same manner as in Embodiment 1.
[0188] In this embodiment, a pixel configuration that prevents current from flowing through the light-emitting element 117 will be described. That is, by forcibly creating a non-light-emitting state, afterimages are less likely to be seen, and the purpose is to obtain a display device with excellent moving image characteristics.
[0189] One such pixel configuration is shown in FIG. 38. The pixel shown in FIG. 38 includes a transistor 110, a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a first capacitor element 115, a second capacitor element 116, a light-emitting element 117, and a fifth switch 3801. Note that the pixel is connected to a signal line 118, a first scanning line 119, a second scanning line 120, a third scanning line 121, a power supply line 122, a potential supply line 123, and also to a fourth scanning line 3802.
[0190] In FIG. 38, the fifth switch 3801 is connected in parallel with the second capacitor element 116 is in this state. Therefore, when the fifth switch 3801 is turned on, the gate of the transistor 110 will be short-circuited between the electrode and the first electrode. Thus, the voltage between the gate and source of the transistor 110 held in the second capacitor element 116 can be set to 0V, so that the transistor 110 turns off and the light-emitting element 117 can be made non-luminous. Note that the on / off control of the fifth switch 3801 scans each row of pixels according to the signal input to the fourth scanning line 3802.
[0191] By such an operation, the signal written in the pixel is erased. Therefore, an erasure period can be provided in which the pixel is forced to be in a non-luminous state until the next initialization period. That is, black display is inserted. Thus, afterimages are less likely to be seen, and the video characteristics can be improved.
[0192] By the way, the driving methods for expressing the gradation of the display device include an analog gradation method and a digital gradation method. The analog gradation method includes a method of analog-controlling the light emission intensity of the light-emitting element and a method of analog-controlling the light emission time of the light-emitting element. In the analog gradation method, the method of analog-controlling the light emission intensity of the light-emitting element is often used. On the other hand, the digital gradation method turns the light-emitting element on and off by digital control to express gradation. In the case of the digital gradation method, since it can be processed by a digital signal, it has the advantage of being resistant to noise. However, since there are only two states of light emission and non-light emission, only two gradations can be expressed as it is. Therefore, another technique is combined to achieve multi-gradation. As a technique for multi-gradation, there are an area gradation method in which weights are assigned to the light-emitting area of the pixel and gradation display is performed by selecting it, and a method in which weights are assigned to the light emission time and gradation display is performed by selecting it, and a method in which weights are assigned to the light emission time There is a time gradation method that performs gradation display by that selection.
[0193] When this digital gradation method and the time gradation method are combined, as shown in FIG. 39, one frame period is divided into a plurality of sub-frame periods (SFn). Each sub-frame period has an address period (T a) having an initialization period, a threshold voltage writing period, and a data writing period, and a light emission period (Ts). Note that the number of sub-frame periods provided in one frame period is determined according to the number of display bits n. Also, the ratio of the lengths of the light emission (n-1) periods in each sub-frame period is set to 2 (n-2) :2 :···:2:1, and light emission or non-light emission of the light-emitting element is selected in each light emission period, and gradation expression is performed by using the difference in the total time during one frame period when the light-emitting element is emitting light. In one frame period, if the total time of light emission is long, the luminance is high, and if it is short, the luminance is low. Note that FIG. 39 shows an example of 4-bit gradation, and one frame period is divided into 4 four sub-frame periods, and 2 =16 gradations can be expressed by the combination of the light emission periods. Note that the ratio of the lengths of the light emission periods does not have to be a ratio of powers of 2 in
[0194] particular, and gradation expression is possible. Also, a certain sub-frame period may be further divided. When attempting to start the data writing operation of the next sub-frame period immediately after the end of the light emission period, since the length of the light emission period of the lower By doing so, it is also possible to express light emission that is shorter than the data writing period required for the entire row. That is to say, the light emission period can be freely set.
[0195] The present invention is of course particularly effective in the analog gradation method, and also in a method combining the digital gradation method and the time gradation method, since the light emission period can be freely set, it is effective to provide an erasure period.
[0196] Also, an erasure period may be provided by interrupting the current path between the power supply line 122 and the pixel electrode of the light emitting element 117 via the transistor 110. For example, a new switch is provided in the current path between the power supply line 122 and the pixel electrode of the light emitting element 117 via the transistor 110, and the pixels are scanned one by one to turn off the switch, thereby providing an erasure period.
[0197] One such configuration is shown in FIG. 40. The configuration of FIG. 40, in addition to the pixel configuration of FIG. 1, has a fifth switch 4001 connected between the first electrode of the transistor 110 and the node 132. And the on / off of the fifth switch 4001 is controlled by a signal input to the fourth scanning line 4002. By turning off this fifth switch 4001, it is possible to provide an erasure period.
[0198] Also, a fifth switch may be connected between the second electrode of the transistor 110 and the node 133, or between the pixel electrode of the light emitting element 117 and the node 132 as shown in FIG. 41 to provide an erasure period.
[0199] Of course, in the pixel in FIG. 1, the second switch 112 is turned off and the power supply line 122 or By cutting off the current path from the light emitting element 117 to the light emitting element 117, a clearing period can be provided without providing a new switch. That's fine.
[0200] In addition, the potential of the gate electrode of the transistor 110 is changed to forcibly shorten the erasing period. It can also be set up.
[0201] One such configuration is shown in Fig. 42. The configuration in Fig. 42 has a rectifier element in addition to the pixel configuration in Fig. 1. The rectifying element 4201 is connected to the gate electrode of the transistor 110 and the The transistor 110 is an N-channel type transistor. If the rectifying element 4201 is a fourth transistor from the gate electrode of the transistor 110, The fourth scanning line 4202 is connected so that a current flows through it. A L level signal is input only when resistor 110 is forcibly turned off; otherwise, a H level signal is input. When the fourth scanning line 4202 is at H level, the rectifying element 4201 When the transistor 110 goes low, no current flows through the fourth scan line. In this way, a current flows to the fourth scanning line 4202. The gate-source voltage of the transistor 110 is set to a threshold voltage (Vth) or less, and the transistor The L level potential is applied to the gate of the transistor 110. The potential of the gate electrode is the L level potential plus the threshold voltage of the rectifier element 4201 in the forward direction. The potential must be determined taking into consideration that the potential will not fall below the specified value.
[0202] The rectifying element 4201 may be a Schottky barrier type or a PIN type as shown in FIG. , in addition to a PN-type diode, a transistor connected in a diode configuration or the like can be used. It is possible.
[0203] Note that the pixel configuration is not particularly limited to the above configuration because if it has a means to forcibly make it non-emissive, the afterimage can be made less visible by inserting a black display. It is not particularly limited to the above configuration because the afterimage can be made less visible by inserting a black display.
[0204] The switch or the like for providing the erasure period shown in this embodiment can be applied not only to the pixel configuration of FIG. 1 described above but also to the pixel configurations shown in other embodiments. It is applicable not only to the pixel configuration shown in FIG. 1 above but also to the pixel configurations shown in other embodiments.
[0205] Also, even if such a switch is not provided, by setting the initialization period long, the initialization period can also serve as the erasure period. Therefore, when operating the pixels described in Embodiments 1 to 6, by setting the period during which black display is desired to make the afterimage less visible to the length of the initialization period, the video characteristics can also be improved. Note that, as described above, it is also possible to provide an erasure period by turning off the second switch. Also, during the emission period, black display may be inserted by making the potential of the power line 122 the same as the potential of the counter electrode 124. By making the potential of the power line 122 the same as the potential of the counter electrode 124 during the emission period, black display may be inserted. When operating the pixels described in Embodiments 1 to 6, by setting the period during which black display is desired to make the afterimage less visible to the length of the initialization period, the video characteristics can also be improved. Note that, as described above, it is also possible to provide an erasure period by turning off the second switch. Also, during the emission period, black display may be inserted by making the potential of the power line 122 the same as the potential of the counter electrode 124. Note that, as described above, it is also possible to provide an erasure period by turning off the second switch. Also, during the emission period, black display may be inserted by making the potential of the power line 122 the same as the potential of the counter electrode 124. Also, during the emission period, black display may be inserted by making the potential of the power line 122 the same as the potential of the counter electrode 124. Also, during the emission period, black display may be inserted by making the potential of the power line 122 the same as the potential of the counter electrode 124.
[0206] Note that the pixels shown in this embodiment can be applied to the display device shown in Embodiment 1. From the above, a display device with little variation in luminance and excellent video characteristics can be obtained. Note that the pixels shown in this embodiment can be applied to the display device shown in Embodiment 1. From the above, a display device with little variation in luminance and excellent video characteristics can be obtained. A display device with little variation in luminance and excellent video characteristics can be obtained. (Embodiment 8) In this embodiment, the case where a P-channel transistor is applied to a transistor that controls the current value supplied to the light-emitting element will be described with reference to FIG. 46. It will be described with reference to FIG. 46.
[0207] The pixel shown in FIG. 46 includes a transistor 4610, a first switch 4611, and a second switch. a fourth switch 4612, a third switch 4613, a fourth switch 4614, and a first capacitive element 461 5, a second capacitive element 4616, and a light-emitting element 4617. The pixel is connected to a signal line 4618, a first scanning line 4619, a second scanning line 4620, a third scanning line 4621, a power supply line 4622, and a potential supply line 4623. In the present embodiment, the transistor 461 0 is a P-channel transistor, and when the absolute value of the gate-source voltage (|Vgs|) exceeds the threshold voltage (|Vth|) (that is, when Vgs is less than Vth ), it is assumed to be in the conductive state. Also, the pixel electrode of the light-emitting element 4617 is the cathode, and the counter electrode 4 624 functions as the anode. Note that the absolute value of the gate-source voltage of the transistor is denoted as | Vgs|, the absolute value of the threshold voltage is denoted as |Vth|, and the voltages accumulated in the first capacitive element 4615 and the second capacitive element 4616 are denoted as Vc1 and Vc2, respectively. Also, the power supply line 4622 , the potential supply line 4623, and the signal line 4618 are also referred to as the first wiring, the second wiring, and the third wiring, respectively. Further, the first scanning line 4619, the second scanning line 4620, and the third scanning line 4621 may also be referred to as the fourth wiring, the fifth wiring, and the sixth wiring, respectively.
[0208] One of the first electrodes (either the source electrode or the drain electrode) of the transistor 4610 is connected to the pixel electrode of the light-emitting element 4617, the second electrode (the other of the source electrode and the drain electrode) is connected to the power supply line 4622 via the second switch 4612, and the gate electrode is connected to the power supply line 4622 via the third switch 4613 and the second switch 4612. Note that , the third switch 4613 is connected between the gate electrode of the transistor 4610 and the second switch 46 12.
[0209] In addition, the connection point between the gate electrode of the transistor 4610 and the third switch 4613 is The node 4630 is connected to the first capacitor 4615 and the first switch 4620. 611. That is, the first capacitor element 4615 is connected to the signal line 4618 through the first capacitor element 4615. The first electrode is connected to a signal line 4618 via a first switch 4611, and the second electrode is connected to a transistor The first electrode of the first capacitor 4615 is connected to the gate electrode of the first capacitor 4610. The node 46 is also connected to a potential supply line 4623 via a fourth switch 4614. The capacitor 30 is also connected to a first electrode of the transistor 4610 through a second capacitor 4616. That is, the first electrode of the second capacitor 4616 is connected to the transistor 4610. The gate electrode and the second electrode of the transistor 4610 are connected to the first electrode of the transistor 4610. These capacitance elements may be formed by sandwiching an insulating film between wiring, a semiconductor layer, and an electrode. In some cases, the second capacitance element 4616 can be omitted by using the gate capacitance of the transistor 4610. It is also possible to omit it.
[0210] In addition, signals are input to the first scanning line 4619, the second scanning line 4620, and the third scanning line 4621. By inputting, the first switch 4611, the second switch 4612, and the third switch 4613 are turned on, respectively. The on / off of the first switch 4613 and the fourth switch 4614 is controlled.
[0211] A signal corresponding to the gradation of the pixel, which corresponds to a video signal, i.e., luminance data, is input to the signal line 4618. A potential according to the input is input.
[0212] Next, the operation of the pixel shown in FIG. 46 will be described with reference to the timing chart in FIG. 47 and FIG. This will be described below. In FIG. 47, one frame period corresponding to the period for displaying one-screen image is divided into an initialization period, a threshold voltage writing period, a data writing period, and a light emission period. The initialization period, the threshold voltage writing period, and the data writing period are collectively called an address period. The one frame period is not particularly limited, but it is preferably at least 1 / 60 second or less so that a person viewing the image does not feel flicker. The one frame period corresponding to the period for displaying one-screen image in FIG. 47 is divided into an initialization period, a threshold voltage writing period, a data writing period, and a light emission period. Also, the initialization period, the threshold voltage writing period, and the data writing period are collectively called an address period. The one frame period is not particularly limited, but it is preferably at least 1 / 60 second or less so that a person viewing the image does not feel flicker (flicker).
[0213] Note that a potential V1 (V1: arbitrary number) is input to the counter electrode 4624 of the light emitting element 4617. Also, assuming that the potential difference required for the light emitting element 4617 to emit light is V, a potential of V1 - V - |Vth| - α (α: arbitrary positive number) is input to the power supply line 4622. That is, the power supply line 4622 may have a potential of V1 - V - |Vth| - α or less. The potential of the potential supply line 4623 is not particularly limited, but it is preferably within the range of the potential input to the panel on which the pixels are formed. By doing so, it becomes unnecessary to separately fabricate a power supply. Here, the potential of the potential supply line 4623 is set to V2. Also, assuming that the potential difference required for the light emitting element 4617 to emit light is V, EL a potential of V1 - V EL - |Vth| - α (α: arbitrary positive number) is input to the power supply line 4622. That is, the power supply line 4622 EL may have a potential of V1 - V - |Vth| - α or less. The potential of the potential supply line 4623 is not particularly limited, but it is preferably within the range of the potential input to the panel on which the pixels are formed. By doing so, it becomes unnecessary to separately fabricate a power supply. Here, the potential of the potential supply line 4623 is set to V2. By doing so, it becomes unnecessary to separately fabricate a power supply. Note that here, the potential of the potential supply line 4623 is set to V2.
[0214] First, as shown in FIGS. 47(A) and 48(A), in the initialization period, the first switch 4611 is turned off, and the second switch 4612, the third switch 4613, and the fourth switch 4614 are turned on. At this time, the transistor 4610 is in a conductive state, and a potential of V1 - V - |Vth| - α - V2 is applied to the first capacitor element 4615, and |Vth| + α is held in the second capacitor element 4616. Note that in the initialization period, a predetermined potential is applied to the first capacitor element 4615. the first switch 4611 is turned off, and the second switch 4612, the third switch 4613, and the fourth switch 4614 are turned on. At this time, the transistor 4610 is in a conductive state, and a potential of V1 - V EL - |Vth| - α - V2 is applied to the first capacitor element 4615, and |Vth| + α is held in the second capacitor element 4616. Note that in the initialization period, a predetermined potential is applied to the first capacitor element 4615. A fixed voltage that is at least higher than |Vth| in absolute value needs to be maintained across the second capacitive element 4616. This is all that is required.
[0215] During the threshold voltage write period shown in FIGS. 47(B) and 48(B), the second switch 4612 is turned off. As a result, the gate electrode of transistor 4610 gradually rises, and when the gate-source voltage Vgs of transistor 4610 reaches the threshold voltage |Vth|, transistor 4610 enters a non-conductive state. Thus, the voltage Vc2 held across the second capacitive element 4616 becomes approximately |Vth|.
[0216] During the subsequent data write period shown in FIGS. 2(C) and 3(C), after turning off the third switch 4613 and the fourth switch 4614, the first switch 4611 is turned on, and a potential (V2 - Vdata) corresponding to the luminance data is input from the signal line 4618. At this time, the voltage Vc2 held across the second capacitive element 4616, considering the capacitances of the first capacitive element 461 5, the second capacitive element 4616, and the light-emitting element 4617 as C1, C2, and C 3 respectively, can be expressed as in Equation (4) since C3 >> C1, C2.
[0217]
Equation
[0218] Note that C1 and C2 are necessary when determining the potential supplied from the signal line 4618, but these relationships are not particularly limited. When C1 > C2, it is possible to reduce the amplitude of Vdat a associated with the luminance change, thereby reducing the power consumption. On the other hand, C When it is C1, changes in Vc2 due to the on / off states of surrounding switches and the off-current are suppressed. This can be achieved. Due to these opposing effects, C1 and C2 are equal, and it is preferable that the sizes of the first capacitor element 4615 and the second capacitor element 4616 are the same. 15 and the second capacitor element 4616 are the same.
[0219] In addition, when it is desired to turn off the light-emitting element 4617 in the next light-emitting period, a potential of Vdata ≤0 may be input.
[0220] Next, in the light-emitting periods shown in FIGS. 47(D) and 48(D), after turning off the first switch 4611, the second switch 4612 is turned on. At this time, the gate-source voltage of the transistor 4610 is Vgs = -|Vth| - Vdata×(C1 / (C1 + C2)) , and a current corresponding to the luminance data flows through the transistor 4610 and the light-emitting element 4617 , and the light-emitting element 4617 emits light. Of course, the potential corresponding to the luminance data input from the signal line 4618 needs to determine Vdata in consideration of the fact that the gate-source voltage of the transistor 4610 is Vgs = -|Vth| - Vdata×(C1 / (C1 + C2)). There is a need.
[0221] In addition, the current I flowing through the light-emitting element 4617 is expressed by Equation (5) when the transistor 4610 operates in the saturation region. When the transistor 4610 is operated in the saturation region, it is expressed by Equation (5).
[0222]
Equation
[0223] Since the transistor 4610 is a P-channel type transistor, Vth < 0. Therefore, Equation (5) can be transformed into Equation (6).
[0224]
Number
[0225] Also, when the transistor 4610 is operated in the linear region, the current I flowing through the light-emitting element is represented by Equation (7).
[0226]
Number
[0227] Since Vth < 0, Equation (7) can be transformed into Equation (8).
[0228]
Number
[0229] Here, W is the channel width of the transistor 4610, L is the channel length, μ is the mobility, and Co x refers to the storage capacitance.
[0230] From Equations (6) and (8), regardless of whether the operating region of the transistor 4610 is the saturation region or the linear region, the current flowing through the light-emitting element 4617 does not depend on the threshold voltage (Vth) of the transistor 4610. Therefore, the variation in the current value caused by the variation in the threshold voltage of the transistor 4610 can be suppressed, and a current corresponding to the luminance data can be supplied to the light-emitting element 461 7. Therefore, the variation in luminance caused by the variation in the threshold voltage of the transistor 4610 can be suppressed. Also, since the potential of the counter electrode is operated at a constant level, the power consumption can be reduced. 7.
[0231] From the above, the variation in luminance caused by the variation in the threshold voltage of the transistor 4610 can be suppressed. Also, since the potential of the counter electrode is operated at a constant level, the power consumption can be reduced. Also, it becomes possible to lower the power consumption.
[0232] Furthermore, when the transistor 4610 is operated in the saturation region, variations in luminance due to degradation of the light-emitting element 46 17 can also be suppressed. When the light-emitting element 4617 degrades, the V of the light-emitting element 4617 increases, and the electric potential of the first electrode of the transistor 4610, i.e., the source electrode, decreases. At this time, the source electrode of the transistor 4610 is connected to the second electrode of the second capacitor element 4616, the gate electrode of the transistor 4610 is connected to the first electrode of the second capacitor element 4616, and the gate electrode side is in a floating state. Therefore, as the source potential decreases, the gate potential of the transistor 4610 also decreases by the same potential. Thus, since the Vgs of the transistor 4610 does not change, even if the light-emitting element degrades, it does not affect the current flowing through the transistor 4610 and the light-emitting element 4617. It can be seen that the current I flowing through the light-emitting element in Equation (6) does not depend on the source potential or the drain potential. EL That is, when the transistor 4610 is operated in the saturation region, variations in the threshold voltage of the transistor 4610 and variations in the current flowing through the transistor 4610 due to degradation of the light-emitting element 4617 can be suppressed. When the transistor 4610 is operated in the saturation region, in order to suppress an increase in the amount of current due to the avalanche phenomenon or channel length modulation, it is more preferable that the channel length L of the transistor 4610 be longer. As described above, since variations in the current value due to variations in the threshold voltage of the transistor can be suppressed, in the present invention, the supply of the current controlled by the transistor is not affected by the degradation of the light-emitting element. That is, when the transistor 4610 is operated in the saturation region, variations in the threshold voltage of the transistor 4610 and variations in the current flowing through the transistor 4610 due to degradation of the light-emitting element 4617 can be suppressed. Furthermore, when the transistor 4610 is operated in the saturation region, variations in luminance due to degradation of the light-emitting element 4617 can also be suppressed. When the light-emitting element 4617 degrades, the V of the light-emitting element 4617 increases, and the electric potential of the first electrode of the transistor 4610, i.e., the source electrode, decreases. At this time, the source electrode of the transistor 4610 is connected to the second electrode of the second capacitor element 4616, the gate electrode of the transistor 4610 is connected to the first electrode of the second capacitor element 4616, and the gate electrode side is in a floating state. Therefore, as the source potential decreases, the gate potential of the transistor 4610 also decreases by the same potential. Thus, since the Vgs of the transistor 4610 does not change, even if the light-emitting element degrades, it does not affect the current flowing through the transistor 4610 and the light-emitting element 4617. It can be seen that the current I flowing through the light-emitting element in Equation (6) does not depend on the source potential or the drain potential. That is, when the transistor 4610 is operated in the saturation region, variations in the threshold voltage of the transistor 4610 and variations in the current flowing through the transistor 4610 due to degradation of the light-emitting element 4617 can be suppressed.
[0233] Furthermore, when the transistor 4610 is operated in the saturation region, variations in luminance due to degradation of the light-emitting element 4617 can also be suppressed. When the light-emitting element 4617 degrades, the V of the light-emitting element 4617 increases, and the electric potential of the first electrode of the transistor 4610, i.e., the source electrode, decreases. At this time, the source electrode of the transistor 4610 is connected to the second electrode of the second capacitor element 4616, the gate electrode of the transistor 4610 is connected to the first electrode of the second capacitor element 4616, and the gate electrode side is in a floating state. Therefore, as the source potential decreases, the gate potential of the transistor 4610 also decreases by the same potential. Thus, since the Vgs of the transistor 4610 does not change, even if the light-emitting element degrades, it does not affect the current flowing through the transistor 4610 and the light-emitting element 4617. It can be seen that the current I flowing through the light-emitting element in Equation (6) does not depend on the source potential or the drain potential. That is, when the transistor 4610 is operated in the saturation region, variations in the threshold voltage of the transistor 4610 and variations in the current flowing through the transistor 4610 due to degradation of the light-emitting element 4617 can be suppressed. Furthermore, when the transistor 4610 is operated in the saturation region, variations in luminance due to degradation of the light-emitting element 4617 can also be suppressed. When the light-emitting element 4617 degrades, the V of the light-emitting element 4617 increases, and the electric potential of the first electrode of the transistor 4610, i.e., the source electrode, decreases. At this time, the source electrode of the transistor 4610 is connected to the second electrode of the second capacitor element 4616, the gate electrode of the transistor 4610 is connected to the first electrode of the second capacitor element 4616, and the gate electrode side is in a floating state. Therefore, as the source potential decreases, the gate potential of the transistor 4610 also decreases by the same potential. Thus, since the Vgs of the transistor 4610 does not change, even if the light-emitting element degrades, it does not affect the current flowing through the transistor 4610 and the light-emitting element 4617. It can be seen that the current I flowing through the light-emitting element in Equation (6) does not depend on the source potential or the drain potential.
[0234] Furthermore, when the transistor 4610 is operated in the saturation region, in order to suppress an increase in the amount of current due to the avalanche phenomenon or channel length modulation, it is more preferable that the channel length L of the transistor 4610 be longer. That is, when the transistor 4610 is operated in the saturation region, variations in the threshold voltage of the transistor 4610 and variations in the current flowing through the transistor 4610 due to degradation of the light-emitting element 4617 can be suppressed. As described above, since variations in the current value due to variations in the threshold voltage of the transistor can be suppressed, in the present invention, the supply of the current controlled by the transistor
[0235] As described above, variations in the current value due to variations in the threshold voltage of the transistor can be suppressed. Therefore, in the present invention, the supply of the current controlled by the transistor The destination is not particularly limited. Therefore, the light-emitting element 4617 shown in FIG. 46 typically applies an EL element (organic EL element, inorganic EL element, or EL element including organic and inorganic substances). Alternatively, instead of the light-emitting element 4617, an electron-emitting element, a liquid crystal element, an electronic ink, etc. can also be applied. FIG. 49 shows an example in which the EL element 4917 is used for the light-emitting element 4617. Note that FIG. 49 shows a state in which current is flowing from the counter electrode 4624 to the pixel electrode 4911.
[0236] Also, the transistor 4610 only needs to have a function of controlling the current value supplied to the light-emitting element 4617, so its type is not particularly limited, and various types can be used. For example, a thin-film transistor (TFT) using a crystalline semiconductor film, a thin-film transistor using a non-single-crystalline semiconductor film typified by amorphous silicon or polycrystalline silicon, a transistor formed using a semiconductor substrate or an SOI substrate, a MOS-type transistor, a junction-type transistor, a bipolar transistor, a transistor using a compound semiconductor such as ZnO or a-InGaZnO, a transistor using an organic semiconductor or a carbon nanotube, and other transistors can be applied to the transistor 4610.
[0237] The first switch 4611 selects the potential according to the luminance data, that is, the timing for inputting a signal to the pixel from the signal line 4618, and mainly changes the voltage held in the first capacitor element 4615 and the voltage held in the second capacitor element 4616, that is, the gate-source voltage of the transistor 4610. The second switch 4612 selects the timing for supplying a predetermined potential to the second electrode of the transistor 4610. In some cases, In addition, the second electrode of the first capacitor 4615 and the first electrode of the second capacitor 4616 are The third switch 4613 supplies the gate voltage of the transistor 4610. The fourth switch 4614 controls the connection between the first electrode and the second electrode during each frame period. The timing for holding a predetermined voltage in the first capacitor 4615 is selected for each period. It controls whether or not a predetermined potential is supplied to the first electrode of the capacitance element 4615. Therefore, the first switch 4611, the second switch 4612, the third switch 4613, The fourth switch 4614 is not particularly limited as long as it has the above-mentioned functions. The first resistor or diode may be used, or a logic circuit that combines them may be used. The switch 4611, the second switch 4612, and the fourth switch 4614 are If a signal or potential can be applied to the pixel by switching, this is not necessary. There is no particular need for the switch 4613 as long as it can achieve the above functions.
[0238] In the case where a transistor is used, the polarity (conductivity type) of the transistor is not particularly limited. However, it is preferable to use a transistor with low off-state current. The transistors include those with LDD regions and those with multi-gate structures. In addition, a CMOS switch can be made by using both N-channel and P-channel types. You may do so.
[0239] For example, the first switch 4611, the second switch 4612, the third switch 461 When a P-channel transistor is applied to the third and fourth switches 4614, For the scanning line that controls the on / off of the switch, an L-level signal is input when it is desired to turn it on, and an H-level signal is input when it is desired to turn it off. In this case, since the pixel can be composed of only P-channel transistors, the manufacturing process can be simplified. Furthermore, the pixel shown in this embodiment can be applied to the display device of FIG. 7. Similar to Embodiment 1, as long as the data writing periods in each row do not overlap, the initialization start time can be set freely for each row. Also, since each pixel can emit light except during its own address period, the ratio of the light emission period (i.e., the duty ratio) in one frame period can be made extremely
[0240] large, and can be made approximately 100%. Therefore, a display device with little variation in brightness and a high duty ratio can be obtained. Moreover, since it is also possible to set a long threshold voltage writing period, the threshold voltage of the transistor that controls the current value flowing through the light emitting element can be written more accurately into the capacitive element. Therefore, the reliability of the display device is improved. Note that this embodiment can be freely combined with the pixel configurations shown in other embodiments. For example, similar to Embodiment 2, a rectifying element can be used for the fourth switch 4614, or the potential supply line 4623 can be substituted with other wirings as in Embodiments 3 and 4. Also, the transistor 4610 can be configured as the transistors shown in Embodiments 5 and 6. In addition, the configurations and operations shown in Embodiment 7 can also be applied.
[0241] In addition to these, the transistor 4610 described in this embodiment can be combined with other embodiments.
[0242] Note that this embodiment can be freely combined with the pixel configurations shown in other embodiments. For example, similar to Embodiment 2, a rectifying element can be used for the fourth switch 4614, or the potential supply line 4623 can be substituted with other wirings as in Embodiments 3 and 4. That is, a rectifying element may be used for the fourth switch 4614 as in Embodiment 2, or the potential supply line 4623 may be substituted with other wirings as in Embodiments 3 and 4. Also, the transistor 4610 can be configured as the transistors shown in Embodiments 5 and 6. Moreover, the configurations and operations shown in Embodiment 7 can also be applied. In addition to these, the transistor 4610 described in this embodiment can be combined with other embodiments. It is also applicable to the pixels shown.
[0243] However, depending on the polarity of the transistor that controls the current flowing through the light-emitting element, it is necessary to make the direction of the current flowing through the rectifying element different. For example, the case where a rectifying element is used to provide an erasure period will be described with reference to FIG. 50. When a rectifying element is used to provide an erasure period, for example, this will be described with reference to FIG. 50. When a rectifying element is used to provide an erasure period, for example, this will be described with reference to FIG. 50.
[0244] When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. When the transistor 4610 is a P-channel type transistor, the rectifying element 5001 is connected so that current flows from the fourth scanning line 5002 to the node 4630. The fourth scanning line 5002 has an H-level signal input only when the transistor 4610 is forced to turn off, and an L-level signal is input otherwise. When the fourth scanning line 5002 is at the L level, no current flows through the rectifying element 5001, and when it becomes H level, current flows from the fourth scanning line 5002 to the node 4630. By flowing current to the node 4630 in this way, the gate potential of the transistor 4610 is raised, and the gate-source voltage of the transistor 4610 is made equal to or lower than the threshold voltage (|Vth|) to forcibly turn off the transistor 4610. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. By such an operation, black display is inserted and afterimages are less likely to be seen, and the video characteristics can be improved. (Embodiment 9) In this embodiment, one form of the partial cross-sectional view of the pixel of the present invention will be described with reference to FIG. 17. Note that the transistor shown in the partial cross-sectional view in this embodiment is a transistor having a function of controlling the current value supplied to the light-emitting element. In this embodiment, one form of the partial cross-sectional view of the pixel of the present invention will be described with reference to FIG. 17. Note that the transistor shown in the partial cross-sectional view in this embodiment is a transistor having a function of controlling the current value supplied to the light-emitting element. In this embodiment, one form of the partial cross-sectional view of the pixel of the present invention will be described with reference to FIG. 17. Note that the transistor shown in the partial cross-sectional view in this embodiment is a transistor having a function of controlling the current value supplied to the light-emitting element.
[0245] First, a base film 1712 is formed on a substrate 1711 having an insulating surface. Examples of the substrate 1711 include insulating substrates such as glass substrates, quartz substrates, plastic substrates (polyimide, acryl, polyethylene terephthalate, polycarbonate, polyarylate, polyethersulfone, etc.), and ceramic substrates. In addition, those obtained by forming an insulating film on the surface of a metal substrate (tantalum, tungsten, molybdenum, etc.) or a semiconductor substrate can also be used. However, it is necessary to use a substrate that can withstand at least the heat generated during the process.
[0246] As the underlayer film 1712, an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiON) is used, and these insulating films are formed as a single layer or a plurality of two or more layers. The underlayer film 1712 may be formed using a sputtering method, a CVD method, or the like. In this embodiment, the underlayer film 1712 is a single layer, but of course, it may be a plurality of two or more layers. x N y
[0247] Next, a transistor 1713 is formed on the underlayer film 1712. The transistor 1713 is composed of at least a semiconductor layer 1714, a gate insulating film 1715 formed on the semiconductor layer 1714, and a gate electrode 1716 formed on the semiconductor layer 1714 with the gate insulating film 1715 interposed therebetween. The semiconductor layer 1714 has a source region and a drain region.
[0248] Examples of the semiconductor layer 1714 include amorphous silicon (a-Si:H), amorphous semiconductors mainly composed of silicon, silicon germanium (SiGe), etc., semi-amorphous semiconductors in which an amorphous state and a crystalline state are mixed, microcrystalline semiconductors in which crystal grains of 0.5 nm to 20 nm can be observed in the amorphous semiconductor, and crystalline semiconductors such as polysilicon (p-Si:H). A film can be used. Note that crystal grains of 0.5 nm to 20 nm can be observed. The microcrystalline state is so-called microcrystal. For example, in the semiconductor layer 1714 When an amorphous semiconductor film is used, it may be formed by using a sputtering method, a CVD method, etc., and when a crystalline semiconductor film is used, for example, after forming an amorphous semiconductor film, it may be crystallized further. Also, if necessary, in addition to the above main components, a trace amount of impurity elements (phosphorus, arsenic, boron, etc.) may be contained in order to control the threshold voltage of the transistor.
[0249] Next, a gate insulating film 1715 is formed to cover the semiconductor layer 1714. For the gate insulating film 17 15, for example, single-layer or multiple films are formed by using silicon oxide, silicon nitride, silicon oxynitride, etc. Note that for the film formation method, a CVD method, a sputtering method, etc. can be used.
[0250] Subsequently, gate electrodes 1716 are formed via the gate insulating film 1715 above the semiconductor layer 1714, respectively. The gate electrode 1716 may be formed as a single layer or by laminating a plurality of metal films. Note that the gate electrode can be formed of an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (C r), niobium (Nb), etc., or an alloy material or a compound material having these elements as main components. For example, a gate electrode composed of a first conductive film and a second conductive film, using tantalum nitride as the first conductive layer and tungsten (W) as the second conductive layer, may be used.
[0251] Next, a gate electrode 1716 or a resist is formed and used as a mask in a desired shape and selectively add impurities that impart n-type or p-type conductivity to the semiconductor layer 1714. In this way, a channel formation region and impurity regions (including a source region, a drain region, a GOLD region, and an LDD region) are formed in the semiconductor layer 1714. Also, an N-channel transistor or a P-channel transistor can be fabricated by distinguishing them based on the conductivity type of the added impurity element. Note that FIG. 17 shows that in order to self-alignedly fabricate the LDD region 1720, a silicon compound, such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film, is formed to cover the gate electrode 1716, and then etched back to form the sidewall 1717. Thereafter, by adding impurities that impart conductivity to the semiconductor layer 1714, a source region 1718, a drain region 1719, and an LDD region 1720 can be formed.
[0252] Therefore, the LDD region 1720 is located below the sidewall 1717. Note that the sidewall 1717 is provided for self-aligned formation of the LDD region 1720, and it is not necessarily provided. Note that phosphorus, arsenic, boron, etc. are used as the impurities that impart conductivity. Next, a first interlayer insulating film 1730 is formed by laminating a first insulating film 1721 and a second insulating film 1722 to cover the gate electrode 1716. As the first insulating film 1721 and the second insulating film 1722, an inorganic insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO N ) or a low dielectric constant organic resin film (a photosensitive or non-photosensitive organic resin film) is used. Note that FIG. 17 shows that in order to self-alignedly fabricate the LDD region 1720, a silicon compound, such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film, is formed to cover the gate electrode 1716, and then etched back to form the sidewall 1717. Therefore, the LDD region 1720 is located below the sidewall 1717. Note that the sidewall 1717 is provided for self-aligned formation of the LDD region 1720, and it is not necessarily provided. Note that phosphorus, arsenic, boron, etc. are used as the impurities that impart conductivity.
[0253] Next, a first interlayer insulating film 1730 is formed by laminating a first insulating film 1721 and a second insulating film 1722 to cover the gate electrode 1716. As the first insulating film 1721 and the second insulating film 1722, an inorganic insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO N x y ) or a low dielectric constant organic resin film (a photosensitive or non-photosensitive organic resin film) is used. Thereafter, by adding impurities that impart conductivity to the semiconductor layer 1714, a source region 1718, a drain region 1719, and an LDD region 1720 can be formed. This is possible. Also, a film containing siloxane may be used. Note that siloxane is a material whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O), and as substituents, organic groups (for example, alkyl groups, aromatic hydrocarbons) are used. Also, the substituents may contain a fluoro group.
[0254] Note that insulating films of the same material may be used for the first insulating film 1721 and the second insulating film 1722. In this embodiment, the first interlayer insulating film 1730 has a two-layer stacked structure, but it may be a single layer or a stacked structure of three or more layers.
[0255] Note that the first insulating film 1721 and the second insulating film 1722 may be formed using a sputtering method, a CVD method, a spin coating method, etc. When using an organic resin film or a film containing siloxane, it may be formed using a coating method.
[0256] Thereafter, a source electrode and a drain electrode 1723 are formed on the first interlayer insulating film 1730. Note that the source electrode and the drain electrode 1723 are each connected to the source region 1718 and the drain region 1719 via a contact hole.
[0257] Note that the source electrode and the drain electrode 1723 are made of silver (Ag), gold (Au), copper (Cu), nickel (Ni), platinum (Pt), palladium (Pd), iridium (Ir), rhodium (Rh), tungsten (W), aluminum (Al), tantalum (Ta), molybdenum (Mo), cadmium (Cd), zinc (Zn), iron (Fe), titanium (Ti), silicon ( Si), germanium (Ge), zirconium (Zr), barium (Ba), neodymium ( metals such as Nd) or their alloys, or their metal nitrides, or laminated films thereof can be used can be achieved.
[0258] Next, a second interlayer insulating film 1731 is formed to cover the source electrode and the drain electrode 1723 The second interlayer insulating film 1731 can be an inorganic insulating film, a resin film, or a laminate thereof. As the inorganic insulating film, a silicon nitride film, a silicon oxide film, a silicon oxynitride film, or a film obtained by laminating these can be used. As the resin film, polyimide, polyamide, acrylic, polyimide amide, epoxy, etc. can be used.
[0259] A pixel electrode 1724 is formed on the second interlayer insulating film 1731. Next, an insulator 1725 is formed to cover the ends of the pixel electrode 172 4. The insulator 1725 is preferably formed such that the upper end or the lower end thereof has a curved surface with a curvature in order to ensure good film formation of the layer 1726 containing the light-emitting substance to be formed later. For example, when positive photosensitive acrylic is used as the material of the insulator 172 5, it is preferable to provide a curved surface having a radius of curvature (0.2 μm to 3 μm) only at the upper end of the insulator 1725. Further, as the insulator 1 725, either a negative type that becomes insoluble in the etchant by photosensitive light or a positive type that becomes soluble in the etchant by light can be used. Furthermore, not only organic substances but also inorganic substances such as silicon oxide and silicon oxynitride can be used as the material of the insulator 1725.
[0260] Next, a layer 1726 containing a light-emitting substance and a counter electrode 1727 are formed on the pixel electrode 1724 and the insulator 1725.
[0261] Note that a layer 1726 containing a light-emitting substance is sandwiched between the pixel electrode 1724 and the counter electrode 1727. In the region where it is sandwiched, a light-emitting element 1728 is formed.
[0262] Next, the details of the light-emitting element 1728 will be described with reference to FIG. 18. Note that the pixel electrode 1724 and the counter electrode 1727 shown in FIG. 17 correspond to the pixel electrode 1801 and the counter electrode 1802 in FIG. 18, respectively. Also, in FIG. 18(a), the pixel electrode is used as the anode and the counter electrode is used as the cathode. As shown in FIG. 18(a), between the pixel electrode 1801 and the counter electrode 1802, in addition to the light-emitting layer 1813, a hole injection layer 1811, a hole transport layer 1812, an electron transport layer 1814, an electron injection layer 1815, etc. are also provided. These layers are laminated so that when a voltage is applied such that the potential of the pixel electrode 1801 is higher than the potential of the counter electrode 1802, holes are injected from the pixel electrode 1801 side and electrons are injected from the counter electrode 1802 side. As shown in FIG. 18(a), between the pixel electrode 1801 and the counter electrode 1802, in addition to the light-emitting layer 1813, a hole injection layer 1811, a hole transport layer 1812, an electron transport layer 1814, an electron injection layer 1815, etc. are also provided. These layers are laminated so that when a voltage is applied such that the potential of the pixel electrode 1801 is higher than the potential of the counter electrode 1802, holes are injected from the pixel electrode 1801 side and electrons are injected from the counter electrode 1802 side. As shown in FIG. 18(a), between the pixel electrode 1801 and the counter electrode 1802, in addition to the light-emitting layer 1813, a hole injection layer 1811, a hole transport layer 1812, an electron transport layer 1814, an electron injection layer 1815, etc. are also provided. These layers are laminated so that when a voltage is applied such that the potential of the pixel electrode 1801 is higher than the potential of the counter electrode 1802, holes are injected from the pixel electrode 1801 side and electrons are injected from the counter electrode 1802 side.
[0263] As shown in FIG. 18(a), between the pixel electrode 1801 and the counter electrode 1802, in addition to the light-emitting layer 1813, a hole injection layer 1811, a hole transport layer 1812, an electron transport layer 1814, an electron injection layer 1815, etc. are also provided. These layers are laminated so that when a voltage is applied such that the potential of the pixel electrode 1801 is higher than the potential of the counter electrode 1802, holes are injected from the pixel electrode 1801 side and electrons are injected from the counter electrode 1802 side. As shown in FIG. 18(a), between the pixel electrode 1801 and the counter electrode 1802, in addition to the light-emitting layer 1813, a hole injection layer 1811, a hole transport layer 1812, an electron transport layer 1814, an electron injection layer 1815, etc. are also provided. These layers are laminated so that when a voltage is applied such that the potential of the pixel electrode 1801 is higher than the potential of the counter electrode 1802, holes are injected from the pixel electrode 1801 side and electrons are injected from the counter electrode 1802 side. As shown in FIG. 18(a), between the pixel electrode 1801 and the counter electrode 1802, in addition to the light-emitting layer 1813, a hole injection layer 1811, a hole transport layer 1812, an electron transport layer 1814, an electron injection layer 1815, etc. are also provided. These layers are laminated so that when a voltage is applied such that the potential of the pixel electrode 1801 is higher than the potential of the counter electrode 1802, holes are injected from the pixel electrode 1801 side and electrons are injected from the counter electrode 1802 side. In such a light-emitting element, the holes injected from the pixel electrode 1801 and the electrons injected from the counter electrode 1802 recombine in the light-emitting layer 1813, exciting the light-emitting substance to an excited state. Then, when the excited light-emitting substance returns to the ground state, it emits light. Note that the light-emitting substance may be any substance that can obtain luminescence (electroluminescence). In such a light-emitting element, the holes injected from the pixel electrode 1801 and the electrons injected from the counter electrode 1802 recombine in the light-emitting layer 1813, exciting the light-emitting substance to an excited state. Then, when the excited light-emitting substance returns to the ground state, it emits light. Note that the light-emitting substance may be any substance that can obtain luminescence (electroluminescence).
[0264] In such a light-emitting element, the holes injected from the pixel electrode 1801 and the electrons injected from the counter electrode 1802 recombine in the light-emitting layer 1813, exciting the light-emitting substance to an excited state. Then, when the excited light-emitting substance returns to the ground state, it emits light. Note that the light-emitting substance may be any substance that can obtain luminescence (electroluminescence). In such a light-emitting element, the holes injected from the pixel electrode 1801 and the electrons injected from the counter electrode 1802 recombine in the light-emitting layer 1813, exciting the light-emitting substance to an excited state. Then, when the excited light-emitting substance returns to the ground state, it emits light. Note that the light-emitting substance may be any substance that can obtain luminescence (electroluminescence). In such a light-emitting element, the holes injected from the pixel electrode 1801 and the electrons injected from the counter electrode 1802 recombine in the light-emitting layer 1813, exciting the light-emitting substance to an excited state. Then, when the excited light-emitting substance returns to the ground state, it emits light. Note that the light-emitting substance may be any substance that can obtain luminescence (electroluminescence). In such a light-emitting element, the holes injected from the pixel electrode 1801 and the electrons injected from the counter electrode 1802 recombine in the light-emitting layer 1813, exciting the light-emitting substance to an excited state. Then, when the excited light-emitting substance returns to the ground state, it emits light. Note that the light-emitting substance may be any substance that can obtain luminescence (electroluminescence).
[0265] There is no particular limitation on the substance forming the light-emitting layer 1813, and it may be a layer formed only of a light-emitting substance. However, when concentration quenching occurs, the light-emitting substance is dispersed in a layer made of a substance (host) having an energy gap larger than the energy gap of the light-emitting substance. There is no particular limitation on the substance forming the light-emitting layer 1813, and it may be a layer formed only of a light-emitting substance. However, when concentration quenching occurs, the light-emitting substance is dispersed in a layer made of a substance (host) having an energy gap larger than the energy gap of the light-emitting substance. There is no particular limitation on the substance forming the light-emitting layer 1813, and it may be a layer formed only of a light-emitting substance. However, when concentration quenching occurs, the light-emitting substance is dispersed in a layer made of a substance (host) having an energy gap larger than the energy gap of the light-emitting substance. It is preferably a layer mixed in such a manner. By doing so, concentration quenching of the light-emitting substance can be prevented. Here, the energy gap refers to the energy difference between the lowest unoccupied molecular orbital (LUMO) level and the highest occupied molecular orbital (HOMO) level. There are no particular limitations on the light-emitting substance either, and a substance that can emit light with a desired emission wavelength may be used. For example, when it is desired to obtain red emission, 4-dicyanomethylene-2-isopropyl-6-[2-(1,1,7,7-tetramethylduloridin-9-yl)ethenyl]-4H-pyran (abbreviation: DCJTI), 4-dicyanomethylene-2-methyl-6-[2-(1,1,7,7-tetramethylduloridin-9-yl)ethenyl]-4H-pyran
[0266] (abbreviation: DCJT), 4-dicyanomethylene-2-tert-butyl-6-[2-(1,1,7,7-tetramethylduloridin-9-yl)ethenyl]-4H-pyran (abbreviation: DCJTB), periflanthene, 2,5-dicyano-1,4-bis[2-(10-methoxy-1,1,7,7-tetramethylduloridin-9-yl)ethenyl]benzene, etc., a substance that exhibits emission having a peak in the emission spectrum at 600 nm to 680 nm can be used. When it is desired to obtain green emission, N,N'-dimethylquinacridone (abbreviation: DMQd), coumarin 6, coumarin 545T, tris(8-quinolinolato)aluminum (abbreviation: Alq), N,N'-diphenylquinacridone (abbreviation: DPQd), etc., a substance that exhibits emission having a peak in the emission spectrum at 500 nm to 550 nm can be used. (abbreviation: DCJT), 4-dicyanomethylene-2-tert-butyl-6-[2-(1,1,7,7-tetramethylduloridin-9-yl)ethenyl]-4H-pyran (abbreviation: DCJTB), periflanthene, 2,5-dicyano-1,4-bis[2-(10-methoxy-1,1,7,7-tetramethylduloridin-9-yl)ethenyl]benzene, etc., a substance that exhibits emission having a peak in the emission spectrum at 600 nm to 680 nm can be used. When it is desired to obtain green emission, N,N'-dimethylquinacridone (abbreviation: DMQd), coumarin 6, coumarin 545T, tris(8-quinolinolato)aluminum (abbreviation: Alq), N,N'-diphenylquinacridone (abbreviation: DPQd), etc., a substance that exhibits emission having a peak in the emission spectrum at 500 nm to 550 nm can be used. is achievable. Also, when desiring to obtain blue emission, 9,10-bis(2-naphthyl)-tert -butylanthracene (abbreviation: t-BuDNA), 9,9'-bianthryl, 9,1 0-diphenylanthracene (abbreviation: DPA), 9,10-bis(2-naphthyl)anthracene (abbreviation: DNA), bis(2-methyl-8-quinolinolato)-4-phenylphenolato- gallium (BGaq), bis(2-methyl-8-quinolinolato)-4-phenylphenolato- aluminum (BAlq), etc., substances exhibiting emission with a peak in the emission spectrum from 420 nm to 500 nm can be used.
[0267] There is no particular limitation on the substance used to disperse the luminescent substance either. For example, 9, 10-di(2-naphthyl)-2-tert-butylanthracene (abbreviation: t-BuDNA ), etc., anthracene derivatives, or 4,4'-bis(N-carbazolyl)biphenyl (abbreviation : CBP), etc., carbazole derivatives, as well as bis[2-(2-hydroxyphenyl)pyridine dionato]zinc (abbreviation: Znpp 2 ), bis[2-(2-hydroxyphenyl)benzoxazolato]zinc (abbreviation: ZnBOX), etc., metal complexes, etc. can be used.
[0268] The anode material for forming the pixel electrode 1801 is not particularly limited, but it is preferable to use a metal, alloy, electrically conductive compound, and mixtures thereof having a large work function (work function of 4.0 eV or more). Specific examples of such anode materials include, as oxides of metal materials, indium tin oxide (abbreviation: ITO), ITO containing silicon oxide (abbreviation: ITSO), and using a target in which 2 to 20 [wt%] of zinc oxide (ZnO) is mixed with indium oxide In addition to indium zinc oxide (abbreviation: IZO) to be formed, gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe ), cobalt (Co), copper (Cu), palladium (Pd), or nitrides of metal materials (e.g., titanium nitride) and the like can be mentioned.
[0269] On the other hand, as the material for forming the counter electrode 1802, metals, alloys, electroconductive compounds, and mixtures thereof with a small work function (work function 3.8 eV or less) can be used. Specific examples of such cathode materials include elements belonging to Group 1 or Group 2 of the periodic table, namely alkali metals such as lithium (Li) and cesium (Cs) or magnesium (Mg) , alkaline earth metals such as calcium (Ca) and strontium (Sr), and alloys containing these (Mg:Ag, Al:Li). Further, by laminating and providing a layer with excellent electron injection properties between the counter electrode 1802 and the light-emitting layer 18 , regardless of the magnitude of the work function, various conductive materials including the materials mentioned as the material for the pixel electrode 1 801 such as Al, Ag, ITO, and ITO containing silicon oxide can be used as the counter electrode 1802. Further, by using a material with particularly excellent electron injection function for the electron injection layer 1815 described later, the same effect can be obtained. 13.
[0270] In order to extract the emitted light to the outside, it is preferable that either one or both of the pixel electrode 1801 and the counter electrode 1802 are transparent electrodes such as ITO, or electrodes formed with a thickness of several to several tens nm through which visible light can pass.
[0271] Between the pixel electrode 1801 and the light-emitting layer 1813, there is a hole transport layer as shown in Fig. 18(a). 1812. The hole transport layer is a layer having a function of transporting holes injected from the pixel electrode 1801 to the light-emitting layer 18 13. Thus, by providing the hole transport layer 1812 and separating the pixel electrode 18 01 from the light-emitting layer 1813, it is possible to prevent light emission from being quenched due to metal.
[0272] Note that the hole transport layer 1812 is preferably formed using a substance having a high hole transport property, and particularly a substance having a hole mobility of 1×10 cm -6 / Vs or more is preferably used. The substance having a high hole transport property means a substance having a higher hole mobility than electrons. Specific examples of substances that can be used to form the hole transport layer 1812 include 4, 2 4'-bis[N-(1-naphthyl)-N-phenylamino]biphenyl (abbreviation: NPB) , 4,4'-bis[N-(3-methylphenyl)-N-phenylamino]biphenyl (abbreviation: TPD), 4,4',4''-tris(N,N-diphenylamino)triphenylamine (abbreviation: TDATA), 4,4',4''-tris[N-(3-methylphenyl)- N-phenylamino]triphenylamine (abbreviation: MTDATA), 4,4'-bis{N -[4-(N,N-di-m-tolylamino)phenyl]-N-phenylamino}biphenyl (abbreviation: DNTPD), 1,3,5-tris[N,N-di(m-tolyl)amino]benzene (abbreviation: m-MTDAB), 4,4',4''-tris(N-carbazolyl)triphenylamine (abbreviation: TCTA), phthalocyanine (abbreviation: H Pc), copper phthalocyanine (abbreviation: CuPc), etc. 2 Examples include phthalocyanine (abbreviation: CuPc), vanadyl phthalocyanine (abbreviation: VOPc), etc. Also, the hole transport layer 1812 may be a layer having a multilayer structure formed by combining two or more layers made of the substances described above.
[0273] Also, an electron transport layer 1814 may be provided between the counter electrode 1802 and the light emitting layer 1813 as shown in Fig. 18(a). Here, the electron transport layer is a layer having a function of transporting electrons injected from the counter electrode 1802 to the light emitting layer 1813. In this way, by providing the electron transport layer 1814 and separating the counter electrode 1802 and the light emitting layer 1813, it is possible to prevent light emission from being quenched due to the metal of the electrode material.
[0274] There is no particular limitation on the electron transport layer 1814, and tris(8-quinolinolato)aluminum (abbreviation: Alq), tris(4-methyl-8-quinolinolato)aluminum (abbreviation: Almq), bis(10-hydroxybenzo[h]-quinolinato)beryllium (abbreviation: BeBq), bis(2-methyl-8-quinolinolato)-4-phenylphenolato-aluminum (abbreviation: BAlq), etc., formed by metal complexes having a quinoline skeleton or a benzoquinoline skeleton can be used. In addition, those formed by metal complexes having oxazole-based and thiazole-based ligands such as bis[2-(2-hydroxyphenyl)-benzoxazolato]zinc (abbreviation: Zn(BOX)), bis[2-(2-hydroxyphenyl)-benzothiazolato]zinc (abbreviation: Zn(BTZ)) may also be used. Also, 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1 lmq 3 eBq 2 2 2 , 3, 4-oxadiazole (abbreviation: PBD), 1, 3-bis[5-(p-tert- butylphenyl)-1, 3, 4-oxadiazol-2-yl]benzene (abbreviation: OXD -7), 3-(4-tert-butylphenyl)-4-phenyl-5-(4-biphenylyl )-1, 2, 4-triazole (abbreviation: TAZ), 3-(4-tert-butylphenyl )-4-(4-ethylphenyl)-5-(4-biphenylyl)-1, 2, 4-triazolo -l (abbreviation: p-EtTAZ), bathophenanthroline (abbreviation: BPhen), bathocuproin (abbreviation: BCP), etc. may also be used. The electron transport layer 181 4 may be formed using a substance with a higher electron mobility than the hole mobility as described above. Also, the electron transport layer 1814 preferably has an electron mobility of 10 cm / Vs or more. Note that the electron transport layer 1814 may have a multilayer structure formed by combining two or more layers composed of the substances described above. -6 cm 2 / Vs or more. Additionally, between the pixel electrode 1801 and the hole transport layer 1812, as shown in Fig. 18(a), there may be a hole injection layer 1811. Here, the hole injection layer is a layer having a function of promoting the injection of holes from the electrode functioning as the anode to the hole transport layer 1812. There is no particular limitation on the hole injection layer 1811, and those formed of metal oxides such as molybdenum oxide, vanadium oxide,
[0275] ruthenium oxide, tungsten oxide, manganese oxide, etc. can be used. In addition, phthalocyanine (abbreviation: H Pc) or copper phthal ocyanine can also be used.
[0276] There is no particular limitation on the hole injection layer 1811, and those formed of metal oxides such as molybdenum oxide, vanadium oxide, ruthenium oxide, tungsten oxide, manganese oxide, etc. can be used. In addition, phthalocyanine (abbreviation: H Pc) or copper phthal 2 ocyanine (abbreviation: CuPc) can also be used. Phthalocyanine compounds such as cyanine (CuPc), 4,4-bis(N-(4-(N, N-di-m-tolylamino)phenyl)-N-phenylamino)biphenyl (abbreviation: DN TPD) and other aromatic amine compounds, or poly(ethylenedioxythiophene) / p oly(styrenesulfonic acid) aqueous solution (PEDOT / PSS) and other polymers can also form the hole injection layer 1811.
[0277] Alternatively, a mixture of the metal oxide and a substance with high hole transportability may be provided between the pixel electrode 180 1 and the hole transport layer 1812. Since such a layer does not cause an increase in the driving voltage even when thickened, by adjusting the film thickness of the layer, an optical design utilizing the microcavity effect and the light interference effect can be performed. Therefore, a high-quality light-emitting device with excellent color purity and small color changes depending on the viewing angle can be fabricated. Also, the film thickness can be selected to prevent short circuits between the pixel electrode 1801 and the counter electrode 1802 due to irregularities generated during film formation on the surface of the pixel electrode 1801 or minute residues remaining on the electrode surface.
[0278] Also, between the counter electrode 1802 and the electron transport layer 1814, as shown in Fig. 18(a), an electron injection layer 1815 may be provided. Here, the electron injection layer is a layer having a function of promoting the injection of electrons from the electrode functioning as a cathode to the electron transport layer 1814. When the electron transport layer is not particularly provided, an electron injection layer may be provided between the electrode functioning as a cathode and the light-emitting layer to assist the injection of electrons into the light-emitting layer.
[0279] There are no particular limitations on the electron injection layer 1815, and lithium fluoride (LiF), cesium fluoride um (CsF), calcium fluoride (CaF2 ) such as alkali metals or alkaline earth compounds formed using can be used. In addition, Alq or 4 ,4-bis(5-methylbenzoxazol-2-yl)stilbene (BzOs), etc. with a substance having high electron transport properties and a mixture of an alkali metal or an alkaline earth metal such as magnesium or lithium can also be used as the electron injection layer 1815.
[0280] Note that the hole injection layer 1811, the hole transport layer 1812, the light emitting layer 1813, the electron transport layer 181 4, and the electron injection layer 1815 can be formed by any method such as vapor deposition, inkjet printing, or coating. Also, for the pixel electrode 1801 or the counter electrode 1802, either method such as sputtering or vapor deposition can be used for formation.
[0281] Also, the layer structure of the light emitting device is not limited to that described in FIG. 18(a), and may be fabricated in order from the electrode that functions as the cathode as shown in FIG. 18(b). That is, the pixel electrode 180 1 can be used as the cathode, and the electron injection layer 1815, the electron transport layer 1814, the light emitting layer 1813, the hole transport layer 1812, the hole injection layer 1811, and the counter electrode 1802 may be laminated in this order on the pixel electrode 1801. Note that the counter electrode 1802 functions as an anode.
[0282] Note that the light emitting device has been described for the case where there is one light emitting layer, but it may have a plurality of light emitting layers. By providing a plurality of light emitting layers and mixing the light emitted from each light emitting layer, white light can be obtained. For example, in the case of a light emitting device having two light emitting layers, between the first light emitting layer and the second light emitting layer, a spacer layer, a layer that generates holes, and a layer that generates electrons may be provided. It is preferable to do so. With such a configuration, each emission emitted to the outside is visually mixed and recognized as white light. Therefore, white light can be obtained.
[0283] Also, the emission is taken out to the outside through either one or both of the pixel electrode 1724 or the counter electrode 1727 in FIG. 17. Therefore, either one or both of the pixel electrode 1724 or the counter electrode 1727 is made of a translucent material.
[0284] When only the counter electrode 1727 is made of a translucent material, as shown in FIG. 19(a), the emission is taken out from the side opposite to the substrate through the counter electrode 1727. Also, when only the pixel electrode 1724 is made of a translucent material, as shown in FIG. 19(b), the emission is taken out from the substrate side through the pixel electrode 1724. When both the pixel electrode 1724 and the counter electrode 1727 are made of a translucent material, as shown in FIG. 19(c), the emission is taken out from both the substrate side and the side opposite to the substrate through the pixel electrode 1724 and the counter electrode 1727.
[0285] The wiring and electrodes are not limited to the materials described above, and include one or more elements selected from the group such as aluminum (Al), tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), neodymium (Nd), chromium ( Cr), nickel (Ni), platinum (Pt), gold (Au), silver (Ag), copper (Cu), magnesium ( Mg), scandium (Sc), cobalt (Co), zinc (Zn), niobium ( Nb), silicon (Si), phosphorus (P), boron (B), arsenic (As), gallium (Ga ), indium (In), tin (Sn), etc., or Compounds or alloy materials composed of one or more elements selected from the above group (for example, indium tin oxide (ITO), indium zinc oxide (IZO), ITO containing silicon oxide (ITSO), zinc oxide (ZnO), aluminum neodymium (Al-Nd), magnesium silver ( Mg-Ag), etc.), or substances formed by combining these compounds can be used to form the like. Also, compounds of these elements with silicon (silicide) (for example, aluminum sil icon, molybdenum silicon, nickel silicide, etc.) or compounds of nitrogen (for example, nitrided titanium, tantalum nitride, molybdenum nitride, etc.) can be used for formation. Note that silicon ( Si) may contain a large amount of n-type impurities (such as phosphorus) or p-type impurities (such as boron). By including these impurities, the conductivity is improved, making it easier to use as wiring or electrodes. Note that for silicon, any of single crystal, polycrystal (polysilicon), or amorphous (amorphous silicon can be used. When single crystal silicon or polycrystalline silicon is used, the resistance can be reduced, and when amorphous silicon is used, it can be fabricated with a simple manufacturing process.
[0286] When aluminum or silver is used, since the conductivity is high, it is possible to reduce signal delay. Also, since etching is easy, it is easy to pattern and perform microfabrication. can be done. Also, in the case of copper, since the conductivity is high, signal delay can be reduced. Moly bdenum can be manufactured without causing problems such as material defects even when it comes into contact with oxide semiconductors such as ITO and IZO or silicon. Also, it is easy to perform patterning and etching, and it is desirable because of its excellent heat resistance. In the case of titanium, ITO, IZO, etc. is also It is desirable that it can be manufactured without causing problems such as material defects even when it comes into contact with any oxide semiconductor or silicon, and it has excellent heat resistance. Also, tungsten and neodymium are desirable because they have excellent heat resistance. Note that when neodymium is alloyed with aluminum, its heat resistance is improved and the hillock of aluminum can be suppressed. Silicon can be formed simultaneously with the semiconductor layer of a transistor and has high heat resistance. In addition, indium tin oxide (ITO), indium zinc oxide (IZO), ITO containing silicon oxide (ITSO), zinc oxide (ZnO), and silicon (Si) have translucency, so they are particularly desirable when used in parts that transmit light, and these can be used, for example, as pixel electrodes or common electrodes. In addition, it is desirable because it has excellent heat resistance. Note that when neodymium is alloyed with aluminum, its heat resistance is improved and the hillock of aluminum can be suppressed. Silicon can be formed simultaneously with the semiconductor layer of a transistor and has high heat resistance. In addition, indium tin oxide (ITO), indium zinc oxide (IZO), ITO containing silicon oxide (ITSO), zinc oxide (ZnO), and silicon (Si) have translucency, so they are particularly desirable when used in parts that transmit light, and these can be used, for example, as pixel electrodes or common electrodes. In addition, indium tin oxide (ITO), indium zinc oxide (IZO), ITO containing silicon oxide (ITSO), zinc oxide (ZnO), and silicon (Si) have translucency, so they are particularly desirable when used in parts that transmit light, and these can be used, for example, as pixel electrodes or common electrodes. In addition, indium tin oxide (ITO), indium zinc oxide (IZO), ITO containing silicon oxide (ITSO), zinc oxide (ZnO), and silicon (Si) have translucency, so they are particularly desirable when used in parts that transmit light, and these can be used, for example, as pixel electrodes or common electrodes. In addition, indium tin oxide (ITO), indium zinc oxide (IZO), ITO containing silicon oxide (ITSO), zinc oxide (ZnO), and silicon (Si) have translucency, so they are particularly desirable when used in parts that transmit light, and these can be used, for example, as pixel electrodes or common electrodes. In addition, indium tin oxide (ITO), indium zinc oxide (IZO), ITO containing silicon oxide (ITSO), zinc oxide (ZnO), and silicon (Si) have translucency, so they are particularly desirable when used in parts that transmit light, and these can be used, for example, as pixel electrodes or common electrodes.
[0287] Note that the wiring and electrodes are not limited to a single-layer structure formed using the above materials, and a multilayer structure may also be used. For example, when forming a single-layer structure, the manufacturing process can be simplified and the cost can be reduced. Also, in a multilayer structure, since the merits of each material can be utilized and the demerits can be reduced, it is possible to form wiring and electrodes with excellent performance. For example, by adopting a configuration in which a material with low resistance (such as aluminum) is included in a part of the multilayer structure, the resistance of the wiring can be reduced. Also, by adopting a configuration that includes a material with high heat resistance (for example, a laminated structure in which a material with low heat resistance but other merits is sandwiched between materials with high heat resistance), it is possible to have high heat resistance and utilize the merits that could not be utilized in a single layer. Therefore, for example, it is desirable to use wiring and electrodes having a configuration in which a layer containing aluminum is sandwiched between layers containing molybdenum or titanium. For example, when forming a single-layer structure, the manufacturing process can be simplified and the cost can be reduced. For example, when forming a single-layer structure, the manufacturing process can be simplified and the cost can be reduced. Also, in a multilayer structure, since the merits of each material can be utilized and the demerits can be reduced, it is possible to form wiring and electrodes with excellent performance. Also, in a multilayer structure, since the merits of each material can be utilized and the demerits can be reduced, it is possible to form wiring and electrodes with excellent performance. For example, by adopting a configuration in which a material with low resistance (such as aluminum) is included in a part of the multilayer structure, the resistance of the wiring can be reduced. Also, by adopting a configuration that includes a material with high heat resistance (for example, a laminated structure in which a material with low heat resistance but other merits is sandwiched between materials with high heat resistance), it is possible to have high heat resistance and utilize the merits that could not be utilized in a single layer. Also, by adopting a configuration that includes a material with high heat resistance (for example, a laminated structure in which a material with low heat resistance but other merits is sandwiched between materials with high heat resistance), it is possible to have high heat resistance and utilize the merits that could not be utilized in a single layer. Therefore, for example, it is desirable to use wiring and electrodes having a configuration in which a layer containing aluminum is sandwiched between layers containing molybdenum or titanium. Therefore, for example, it is desirable to use wiring and electrodes having a configuration in which a layer containing aluminum is sandwiched between layers containing molybdenum or titanium.
[0288] In addition, when there are parts where wiring or electrodes are in direct contact with wiring or electrodes of other materials, etc., it may have an adverse effect on each other. For example, one material may mix into the other material, changing the properties of each material, making it impossible to achieve the original purpose, or causing problems during manufacturing, and it may even become impossible to manufacture normally. In such cases, it can be solved by sandwiching or covering a certain layer with other layers. For example, when it is desired to bring indium tin oxide (ITO) into contact with aluminum, it is desirable to interpose titanium or molybdenum in between. Similarly, when it is desired to bring silicon into contact with aluminum, it is also desirable to interpose titanium or molybdenum in between. Next, a transistor with a normal staggered structure using an amorphous semiconductor film as a semiconductor layer in transistor 1713 will be described. A partial cross-sectional view of a pixel is shown in FIG. 20. In FIG. 20, a transistor with a normal staggered structure is shown, and the capacitive element included in the pixel will also be described together.
[0289] As shown in FIG. 20, a base film 2012 is formed on a substrate 2011. Furthermore, a pixel electrode 2013 is formed on the base film 2012. Also, a first electrode 2014 made of the same material is formed in the same layer as the pixel electrode 2013.
[0290] Furthermore, wirings 2015 and 2016 are formed on the base film 2012, and the end of the pixel electrode 2013 is covered by the wiring 2015. An N-type semiconductor layer 2017 and an N-type semiconductor layer 2018 having an N-type conductivity type are formed on the wirings 2015 and 2016.
[0291] 13 is covered by the wiring 2015. N-type semiconductor layers 2017 and 2018 having an N-type conductivity type are formed on the wirings 2015 and 2016. between wiring 2015 and wiring 2016, a semiconductor layer 2019 is formed on the base film 2012 and a part of the semiconductor layer 2019 extends onto the N-type semiconductor layer 2017 and the N-type semiconductor layer 2018. This semiconductor layer is formed of an amorphous semiconductor such as amorphous silicon (a-Si:H). Note that it is not limited to an amorphous semiconductor, and it may be a semi-amorphous semiconductor, a microcrystalline semiconductor, or the like. Further, a gate insulating film 2020 is formed on the semiconductor layer 2019. Also, an insulating film 2021 made of the same material as the gate insulating film 2020 is formed on the first electrode 2014. body layer 2018. This semiconductor layer is formed of an amorphous semiconductor such as amorphous silicon (a-Si :H). Note that it is not limited to an amorphous semiconductor, and it may be a semi-amorphous semiconductor, a microcrystalline semiconductor, or the like. Further, a gate insulating film 2020 is formed on the semiconductor layer 2019. Also, an insulating film 2021 made of the same material as the gate insulating film 2020 is formed on the first electrode 2014. In addition, an insulating film 2021 made of the same material as the gate insulating film 2020 is formed on the first electrode 2014. Further, a gate insulating film 2020 is formed on the semiconductor layer 2019. Also, an insulating film 2021 made of the same material as the gate insulating film 2020 is formed on the first electrode 2014. Further, a gate insulating film 2020 is formed on the semiconductor layer 2019. Also, an insulating film 2021 made of the same material as the gate insulating film 2020 is formed on the first electrode 2014.
[0292] Furthermore, a gate electrode 2022 is formed on the gate insulating film 2020, and a transistor 2 025 is formed. Also, a second electrode 2023 made of the same material as the gate electrode 2022 is formed on the first electrode 2014 via the insulating film 2021, and a capacitive element 2024 having a configuration in which the insulating film 2021 is sandwiched between the first electrode 2014 and the second electrode 2023 is formed. 2023 is formed on the first electrode 2014 via the insulating film 2021, and a capacitive element 2024 having a configuration in which the insulating film 2021 is sandwiched between the first electrode 2014 and the second electrode 2023 is formed. 2023 is formed on the first electrode 2014 via the insulating film 2021, and a capacitive element 2024 having a configuration in which the insulating film 2021 is sandwiched between the first electrode 2014 and the second electrode 2023 is formed. Also, an interlayer insulating film 2026 is formed to cover the end portion of the pixel electrode 2013, the transistor 2025, and the capacitive element 2024. Also, an interlayer insulating film 2026 is formed to cover the end portion of the pixel electrode 2013, the transistor 2025, and the capacitive element 2024.
[0293] A layer 2027 containing a light-emitting substance and a counter electrode 2028 are formed on the interlayer insulating film 2026 and the pixel electrode 2013 located in the opening thereof, and a light-emitting element 2029 is formed in a region where the layer 2027 containing the light-emitting substance is sandwiched between the pixel electrode 201 3 and the counter electrode 2028. 3 and the counter electrode 2028.
[0294] Also, the first electrode 2014 shown in FIG. 20(a) is formed of the same material as the wirings 201 5 and 2016 as shown in FIG. 20(b), and the insulating film 2021 is formed between the first electrode 2030 and the second The capacitor 2031 may be sandwiched between the first electrode 2023 and the second electrode 2024. In this case, an N-channel transistor was used for the transistor 2025, but a P-channel transistor was used. Jista is fine too.
[0295] A substrate 2011, a base film 2012, a pixel electrode 2013, a gate insulating film 2020, a gate electrode The electrode 2022, the interlayer insulating film 2026, the layer 2027 containing a light-emitting material, and the counter electrode 2028 are The materials that can be used are the substrate 1711, the undercoat film 1712, the pixel electrode 1713, and the like, which are described in FIG. 24, gate insulating film 1715, gate electrode 1716, interlayer insulating films 1730 and 1731, The same materials as those of the layer 1726 containing a light-emitting material and the counter electrode 1727 can be used. The wiring 2015 and the wiring 2016 correspond to the source electrode and the drain electrode in FIG. The same material as pole 1723 may be used.
[0296] Next, as another structure of a transistor using an amorphous semiconductor film as a semiconductor layer, The gate electrode is sandwiched between the semiconductor layers, i.e., the gate electrode is located under the semiconductor layer. FIG. 21 shows a partial cross-sectional view of a pixel having a multi-gate transistor.
[0297] An undercoat film 2112 is formed on a substrate 2111. A gate An electrode 2113 is formed. In addition, a second insulating film made of the same material as the gate electrode 2113 is formed in the same layer. The gate electrode 2113 is made of the same material as the gate electrode in FIG. In addition to the materials used for the 1716 electrode, phosphorus-doped polycrystalline silicon and metal-silica Silicide, which is a compound of silicide, may also be used.
[0298] Also, a gate insulating film 2115 is formed so as to cover the gate electrode 2113 and the first electrode 2114. It is formed.
[0299] A semiconductor layer 2116 is formed on the gate insulating film 2115. Also, a semiconductor layer 21 16 and a semiconductor layer 2117 made of the same material in the same layer are formed on the first electrode 2114 It is. Note that this semiconductor layer is made of an amorphous semiconductor such as amorphous silicon (a-Si:H). It is formed, and not limited to this, it may be a semi-amorphous semiconductor, a microcrystalline semiconductor, etc. It may be.
[0300] An N-type semiconductor layer 2118 having an N-type conductivity type and an N-type semiconductor layer 2119 are formed on the semiconductor layer 2116, and an N-type semiconductor layer 2120 is formed on the semiconductor layer 2117.
[0301] Wiring 2121 and wiring 2 122 are respectively formed on the N-type semiconductor layer 2118 and the N-type semiconductor layer 2119, and a transistor 2129 is formed. Also, on the N-type semiconductor layer 212 0, a conductive layer 2123 made of the same material in the same layer as the wiring 2121 and the wiring 2122 is formed And the second electrode is constituted by this conductive layer 2123, the N-type semiconductor layer 2120, and the semiconductor layer 2117. Note that a capacitive element 2130 having a configuration in which the gate insulating film 211 5 is sandwiched between this second electrode and the first electrode 2114 is formed.
[0302] Also, one end of the wiring 2121 extends, and a pixel electrode 2124 is formed in contact with the upper part of the extended wiring 2121. It is formed.
[0303] Also, an insulator 2125 is formed so as to cover the end of the pixel electrode 2124, the transistor 2129, and the capacitive element 2130. It is formed.
[0304] On the pixel electrode 2124 and the insulator 2125, a layer 2126 containing a light-emitting substance and a counter electrode 2 127 are formed, and a light-emitting element 2128 is formed in a region where the layer 2126 containing the light-emitting substance is sandwiched between the pixel electrode 2124 and the counter electrode 2127.
[0305] The semiconductor layer 2117 and ...
Claims
1. a first transistor, a second transistor, a third transistor, a capacitor, a light-emitting element, and a power line extending in a first direction; one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to the power supply line; a gate of the second transistor electrically connected to a first scan line; one of a source and a drain of the third transistor is electrically connected to a gate of the first transistor; the other of the source and the drain of the third transistor is electrically connected to one of the source and the drain of the first transistor; a gate of the third transistor electrically connected to a second scan line; a first terminal of the capacitance element electrically connected to a gate of the first transistor; a second terminal of the capacitance element electrically connected to the light emitting element; the light-emitting element is electrically connected to the other of the source and the drain of the first transistor, a channel length direction of the second transistor is aligned along the first direction in a plan view; a channel length direction of the third transistor is a direction different from the first direction in a plan view; the first transistor has a first region functioning as a channel formation region in a semiconductor layer; the semiconductor layer has a second region that functions as a channel formation region of the second transistor, and a third region that is connected to the first region and the second region; the power supply line has a fourth region overlapping with the third region and a fifth region that is wider than the fourth region; the power supply line has a region overlapping a first conductive layer having a region functioning as a gate electrode of the second transistor; the power supply line has a region overlapping a second conductive layer having a region functioning as a gate electrode of the third transistor; the power supply line has a region that contacts the semiconductor layer through an opening, The fifth region has an area overlapping with the opening.
2. a first transistor, a second transistor, a third transistor, a capacitor, a light-emitting element, and a power line extending in a first direction; one of a source and a drain of the first transistor is always electrically connected to one of a source and a drain of the second transistor; the other of the source and the drain of the second transistor is always electrically connected to the power supply line; The gate of the second transistor is always electrically connected to the first scan line; one of the source and the drain of the third transistor is always electrically connected to the gate of the first transistor; the other of the source and the drain of the third transistor is always electrically connected to one of the source and the drain of the first transistor; the gate of the third transistor is always electrically connected to the second scan line; a first terminal of the capacitance element is always electrically connected to a gate of the first transistor; a second terminal of the capacitance element that is always electrically connected to the light emitting element; when the power supply line is in a conductive state with the light emitting element via at least a channel formation region of the first transistor and a channel formation region of the second transistor, a current of the power supply line is input to the light emitting element via at least a channel formation region of the first transistor and a channel formation region of the second transistor, a channel length direction of the second transistor is aligned along the first direction in a plan view; a channel length direction of the third transistor is a direction different from the first direction in a plan view; the first transistor has a first region functioning as a channel formation region in a semiconductor layer; the semiconductor layer has a second region that functions as a channel formation region of the second transistor, and a third region that is connected to the first region and the second region; the power supply line has a fourth region overlapping with the third region and a fifth region that is wider than the fourth region; the power supply line has a region overlapping a first conductive layer having a region functioning as a gate electrode of the second transistor; the power supply line has a region overlapping a second conductive layer having a region functioning as a gate electrode of the third transistor; the power supply line has a region that contacts the semiconductor layer through an opening, The fifth region has an area overlapping with the opening.
3. a first transistor, a second transistor, a third transistor, a capacitor, a light-emitting element, and a power line extending in a first direction; the third transistor has an oxide semiconductor in a channel formation region, one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to the power supply line; a gate of the second transistor electrically connected to a first scan line; one of a source and a drain of the third transistor is electrically connected to a gate of the first transistor; the other of the source and the drain of the third transistor is electrically connected to one of the source and the drain of the first transistor; a gate of the third transistor electrically connected to a second scan line; a first terminal of the capacitance element electrically connected to a gate of the first transistor; a second terminal of the capacitance element electrically connected to the light emitting element; the light-emitting element is electrically connected to the other of the source and the drain of the first transistor, a channel length direction of the second transistor is aligned along the first direction in a plan view; a channel length direction of the third transistor is a direction different from the first direction in a plan view; the first transistor has a first region functioning as a channel formation region in a semiconductor layer; the semiconductor layer has a second region that functions as a channel formation region of the second transistor, and a third region that is connected to the first region and the second region; the power supply line has a fourth region overlapping with the third region and a fifth region that is wider than the fourth region; the power supply line has a region overlapping a first conductive layer having a region functioning as a gate electrode of the second transistor; the power supply line has a region overlapping a second conductive layer having a region functioning as a gate electrode of the third transistor; the power supply line has a region that contacts the semiconductor layer through an opening, The fifth region has an area overlapping with the opening.
4. a first transistor, a second transistor, a third transistor, a capacitor, a light-emitting element, and a power line extending in a first direction; the third transistor has an oxide semiconductor in a channel formation region, one of a source and a drain of the first transistor is always electrically connected to one of a source and a drain of the second transistor; the other of the source and the drain of the second transistor is always electrically connected to the power supply line; The gate of the second transistor is always electrically connected to the first scan line; one of the source and the drain of the third transistor is always electrically connected to the gate of the first transistor; the other of the source and the drain of the third transistor is always electrically connected to one of the source and the drain of the first transistor; the gate of the third transistor is always electrically connected to the second scan line; a first terminal of the capacitance element is always electrically connected to a gate of the first transistor; a second terminal of the capacitance element that is always electrically connected to the light emitting element; when the power supply line is in a conductive state with the light emitting element via at least a channel formation region of the first transistor and a channel formation region of the second transistor, a current of the power supply line is input to the light emitting element via at least a channel formation region of the first transistor and a channel formation region of the second transistor, a channel length direction of the second transistor is aligned along the first direction in a plan view; a channel length direction of the third transistor is a direction different from the first direction in a plan view; the first transistor has a first region functioning as a channel formation region in a semiconductor layer; the semiconductor layer has a second region that functions as a channel formation region of the second transistor, and a third region that is connected to the first region and the second region; the power supply line has a fourth region overlapping with the third region and a fifth region that is wider than the fourth region; the power supply line has a region overlapping a first conductive layer having a region functioning as a gate electrode of the second transistor; the power supply line has a region overlapping a second conductive layer having a region functioning as a gate electrode of the third transistor; the power supply line has a region that contacts the semiconductor layer through an opening, The fifth region has an area overlapping with the opening.
5. In any one of claims 1 to 4, The display device, wherein each of the first to third transistors is an n-channel transistor.
Citation Information
Patent Citations
Display device
CN1822385A
TFT- el display panel using organic electroluminescent medium
JP1996234683A
Display device
JP2003091245A
Display device
JP2004280059A
Drive circuit for display device
JP2004295131A